amd-iommu.h 6.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215
  1. /*
  2. * Copyright (C) 2007-2010 Advanced Micro Devices, Inc.
  3. * Author: Joerg Roedel <joerg.roedel@amd.com>
  4. * Leo Duran <leo.duran@amd.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License version 2 as published
  8. * by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. */
  19. #ifndef _ASM_X86_AMD_IOMMU_H
  20. #define _ASM_X86_AMD_IOMMU_H
  21. #include <linux/types.h>
  22. /*
  23. * This is mainly used to communicate information back-and-forth
  24. * between SVM and IOMMU for setting up and tearing down posted
  25. * interrupt
  26. */
  27. struct amd_iommu_pi_data {
  28. u32 ga_tag;
  29. u32 prev_ga_tag;
  30. u64 base;
  31. bool is_guest_mode;
  32. struct vcpu_data *vcpu_data;
  33. void *ir_data;
  34. };
  35. #ifdef CONFIG_AMD_IOMMU
  36. struct task_struct;
  37. struct pci_dev;
  38. extern int amd_iommu_detect(void);
  39. extern int amd_iommu_init_hardware(void);
  40. /**
  41. * amd_iommu_enable_device_erratum() - Enable erratum workaround for device
  42. * in the IOMMUv2 driver
  43. * @pdev: The PCI device the workaround is necessary for
  44. * @erratum: The erratum workaround to enable
  45. *
  46. * The function needs to be called before amd_iommu_init_device().
  47. * Possible values for the erratum number are for now:
  48. * - AMD_PRI_DEV_ERRATUM_ENABLE_RESET - Reset PRI capability when PRI
  49. * is enabled
  50. * - AMD_PRI_DEV_ERRATUM_LIMIT_REQ_ONE - Limit number of outstanding PRI
  51. * requests to one
  52. */
  53. #define AMD_PRI_DEV_ERRATUM_ENABLE_RESET 0
  54. #define AMD_PRI_DEV_ERRATUM_LIMIT_REQ_ONE 1
  55. extern void amd_iommu_enable_device_erratum(struct pci_dev *pdev, u32 erratum);
  56. /**
  57. * amd_iommu_init_device() - Init device for use with IOMMUv2 driver
  58. * @pdev: The PCI device to initialize
  59. * @pasids: Number of PASIDs to support for this device
  60. *
  61. * This function does all setup for the device pdev so that it can be
  62. * used with IOMMUv2.
  63. * Returns 0 on success or negative value on error.
  64. */
  65. extern int amd_iommu_init_device(struct pci_dev *pdev, int pasids);
  66. /**
  67. * amd_iommu_free_device() - Free all IOMMUv2 related device resources
  68. * and disable IOMMUv2 usage for this device
  69. * @pdev: The PCI device to disable IOMMUv2 usage for'
  70. */
  71. extern void amd_iommu_free_device(struct pci_dev *pdev);
  72. /**
  73. * amd_iommu_bind_pasid() - Bind a given task to a PASID on a device
  74. * @pdev: The PCI device to bind the task to
  75. * @pasid: The PASID on the device the task should be bound to
  76. * @task: the task to bind
  77. *
  78. * The function returns 0 on success or a negative value on error.
  79. */
  80. extern int amd_iommu_bind_pasid(struct pci_dev *pdev, int pasid,
  81. struct task_struct *task);
  82. /**
  83. * amd_iommu_unbind_pasid() - Unbind a PASID from its task on
  84. * a device
  85. * @pdev: The device of the PASID
  86. * @pasid: The PASID to unbind
  87. *
  88. * When this function returns the device is no longer using the PASID
  89. * and the PASID is no longer bound to its task.
  90. */
  91. extern void amd_iommu_unbind_pasid(struct pci_dev *pdev, int pasid);
  92. /**
  93. * amd_iommu_set_invalid_ppr_cb() - Register a call-back for failed
  94. * PRI requests
  95. * @pdev: The PCI device the call-back should be registered for
  96. * @cb: The call-back function
  97. *
  98. * The IOMMUv2 driver invokes this call-back when it is unable to
  99. * successfully handle a PRI request. The device driver can then decide
  100. * which PRI response the device should see. Possible return values for
  101. * the call-back are:
  102. *
  103. * - AMD_IOMMU_INV_PRI_RSP_SUCCESS - Send SUCCESS back to the device
  104. * - AMD_IOMMU_INV_PRI_RSP_INVALID - Send INVALID back to the device
  105. * - AMD_IOMMU_INV_PRI_RSP_FAIL - Send Failure back to the device,
  106. * the device is required to disable
  107. * PRI when it receives this response
  108. *
  109. * The function returns 0 on success or negative value on error.
  110. */
  111. #define AMD_IOMMU_INV_PRI_RSP_SUCCESS 0
  112. #define AMD_IOMMU_INV_PRI_RSP_INVALID 1
  113. #define AMD_IOMMU_INV_PRI_RSP_FAIL 2
  114. typedef int (*amd_iommu_invalid_ppr_cb)(struct pci_dev *pdev,
  115. int pasid,
  116. unsigned long address,
  117. u16);
  118. extern int amd_iommu_set_invalid_ppr_cb(struct pci_dev *pdev,
  119. amd_iommu_invalid_ppr_cb cb);
  120. #define PPR_FAULT_EXEC (1 << 1)
  121. #define PPR_FAULT_READ (1 << 2)
  122. #define PPR_FAULT_WRITE (1 << 5)
  123. #define PPR_FAULT_USER (1 << 6)
  124. #define PPR_FAULT_RSVD (1 << 7)
  125. #define PPR_FAULT_GN (1 << 8)
  126. /**
  127. * amd_iommu_device_info() - Get information about IOMMUv2 support of a
  128. * PCI device
  129. * @pdev: PCI device to query information from
  130. * @info: A pointer to an amd_iommu_device_info structure which will contain
  131. * the information about the PCI device
  132. *
  133. * Returns 0 on success, negative value on error
  134. */
  135. #define AMD_IOMMU_DEVICE_FLAG_ATS_SUP 0x1 /* ATS feature supported */
  136. #define AMD_IOMMU_DEVICE_FLAG_PRI_SUP 0x2 /* PRI feature supported */
  137. #define AMD_IOMMU_DEVICE_FLAG_PASID_SUP 0x4 /* PASID context supported */
  138. #define AMD_IOMMU_DEVICE_FLAG_EXEC_SUP 0x8 /* Device may request execution
  139. on memory pages */
  140. #define AMD_IOMMU_DEVICE_FLAG_PRIV_SUP 0x10 /* Device may request
  141. super-user privileges */
  142. struct amd_iommu_device_info {
  143. int max_pasids;
  144. u32 flags;
  145. };
  146. extern int amd_iommu_device_info(struct pci_dev *pdev,
  147. struct amd_iommu_device_info *info);
  148. /**
  149. * amd_iommu_set_invalidate_ctx_cb() - Register a call-back for invalidating
  150. * a pasid context. This call-back is
  151. * invoked when the IOMMUv2 driver needs to
  152. * invalidate a PASID context, for example
  153. * because the task that is bound to that
  154. * context is about to exit.
  155. *
  156. * @pdev: The PCI device the call-back should be registered for
  157. * @cb: The call-back function
  158. */
  159. typedef void (*amd_iommu_invalidate_ctx)(struct pci_dev *pdev, int pasid);
  160. extern int amd_iommu_set_invalidate_ctx_cb(struct pci_dev *pdev,
  161. amd_iommu_invalidate_ctx cb);
  162. #else /* CONFIG_AMD_IOMMU */
  163. static inline int amd_iommu_detect(void) { return -ENODEV; }
  164. #endif /* CONFIG_AMD_IOMMU */
  165. #if defined(CONFIG_AMD_IOMMU) && defined(CONFIG_IRQ_REMAP)
  166. /* IOMMU AVIC Function */
  167. extern int amd_iommu_register_ga_log_notifier(int (*notifier)(u32));
  168. extern int
  169. amd_iommu_update_ga(int cpu, bool is_run, void *data);
  170. #else /* defined(CONFIG_AMD_IOMMU) && defined(CONFIG_IRQ_REMAP) */
  171. static inline int
  172. amd_iommu_register_ga_log_notifier(int (*notifier)(u32))
  173. {
  174. return 0;
  175. }
  176. static inline int
  177. amd_iommu_update_ga(int cpu, bool is_run, void *data)
  178. {
  179. return 0;
  180. }
  181. #endif /* defined(CONFIG_AMD_IOMMU) && defined(CONFIG_IRQ_REMAP) */
  182. #endif /* _ASM_X86_AMD_IOMMU_H */