kmi.h 2.9 KB

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  1. /*
  2. * linux/include/asm-arm/hardware/amba_kmi.h
  3. *
  4. * Internal header file for AMBA KMI ports
  5. *
  6. * Copyright (C) 2000 Deep Blue Solutions Ltd.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. *
  23. * ---------------------------------------------------------------------------
  24. * From ARM PrimeCell(tm) PS2 Keyboard/Mouse Interface (PL050) Technical
  25. * Reference Manual - ARM DDI 0143B - see http://www.arm.com/
  26. * ---------------------------------------------------------------------------
  27. */
  28. #ifndef ASM_ARM_HARDWARE_AMBA_KMI_H
  29. #define ASM_ARM_HARDWARE_AMBA_KMI_H
  30. /*
  31. * KMI control register:
  32. * KMICR_TYPE 0 = PS2/AT mode, 1 = No line control bit mode
  33. * KMICR_RXINTREN 1 = enable RX interrupts
  34. * KMICR_TXINTREN 1 = enable TX interrupts
  35. * KMICR_EN 1 = enable KMI
  36. * KMICR_FD 1 = force KMI data low
  37. * KMICR_FC 1 = force KMI clock low
  38. */
  39. #define KMICR (KMI_BASE + 0x00)
  40. #define KMICR_TYPE (1 << 5)
  41. #define KMICR_RXINTREN (1 << 4)
  42. #define KMICR_TXINTREN (1 << 3)
  43. #define KMICR_EN (1 << 2)
  44. #define KMICR_FD (1 << 1)
  45. #define KMICR_FC (1 << 0)
  46. /*
  47. * KMI status register:
  48. * KMISTAT_TXEMPTY 1 = transmitter register empty
  49. * KMISTAT_TXBUSY 1 = currently sending data
  50. * KMISTAT_RXFULL 1 = receiver register ready to be read
  51. * KMISTAT_RXBUSY 1 = currently receiving data
  52. * KMISTAT_RXPARITY parity of last databyte received
  53. * KMISTAT_IC current level of KMI clock input
  54. * KMISTAT_ID current level of KMI data input
  55. */
  56. #define KMISTAT (KMI_BASE + 0x04)
  57. #define KMISTAT_TXEMPTY (1 << 6)
  58. #define KMISTAT_TXBUSY (1 << 5)
  59. #define KMISTAT_RXFULL (1 << 4)
  60. #define KMISTAT_RXBUSY (1 << 3)
  61. #define KMISTAT_RXPARITY (1 << 2)
  62. #define KMISTAT_IC (1 << 1)
  63. #define KMISTAT_ID (1 << 0)
  64. /*
  65. * KMI data register
  66. */
  67. #define KMIDATA (KMI_BASE + 0x08)
  68. /*
  69. * KMI clock divisor: to generate 8MHz internal clock
  70. * div = (ref / 8MHz) - 1; 0 <= div <= 15
  71. */
  72. #define KMICLKDIV (KMI_BASE + 0x0c)
  73. /*
  74. * KMI interrupt register:
  75. * KMIIR_TXINTR 1 = transmit interrupt asserted
  76. * KMIIR_RXINTR 1 = receive interrupt asserted
  77. */
  78. #define KMIIR (KMI_BASE + 0x10)
  79. #define KMIIR_TXINTR (1 << 1)
  80. #define KMIIR_RXINTR (1 << 0)
  81. /*
  82. * The size of the KMI primecell
  83. */
  84. #define KMI_SIZE (0x100)
  85. #endif