amba-clcd-nomadik.c 5.6 KB

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  1. #include <linux/amba/bus.h>
  2. #include <linux/amba/clcd.h>
  3. #include <linux/gpio/consumer.h>
  4. #include <linux/of.h>
  5. #include <linux/of_graph.h>
  6. #include <linux/delay.h>
  7. #include <linux/bitops.h>
  8. #include <linux/mfd/syscon.h>
  9. #include <linux/regmap.h>
  10. #include "amba-clcd-nomadik.h"
  11. static struct gpio_desc *grestb;
  12. static struct gpio_desc *scen;
  13. static struct gpio_desc *scl;
  14. static struct gpio_desc *sda;
  15. static u8 tpg110_readwrite_reg(bool write, u8 address, u8 outval)
  16. {
  17. int i;
  18. u8 inval = 0;
  19. /* Assert SCEN */
  20. gpiod_set_value_cansleep(scen, 1);
  21. ndelay(150);
  22. /* Hammer out the address */
  23. for (i = 5; i >= 0; i--) {
  24. if (address & BIT(i))
  25. gpiod_set_value_cansleep(sda, 1);
  26. else
  27. gpiod_set_value_cansleep(sda, 0);
  28. ndelay(150);
  29. /* Send an SCL pulse */
  30. gpiod_set_value_cansleep(scl, 1);
  31. ndelay(160);
  32. gpiod_set_value_cansleep(scl, 0);
  33. ndelay(160);
  34. }
  35. if (write) {
  36. /* WRITE */
  37. gpiod_set_value_cansleep(sda, 0);
  38. } else {
  39. /* READ */
  40. gpiod_set_value_cansleep(sda, 1);
  41. }
  42. ndelay(150);
  43. /* Send an SCL pulse */
  44. gpiod_set_value_cansleep(scl, 1);
  45. ndelay(160);
  46. gpiod_set_value_cansleep(scl, 0);
  47. ndelay(160);
  48. if (!write)
  49. /* HiZ turn-around cycle */
  50. gpiod_direction_input(sda);
  51. ndelay(150);
  52. /* Send an SCL pulse */
  53. gpiod_set_value_cansleep(scl, 1);
  54. ndelay(160);
  55. gpiod_set_value_cansleep(scl, 0);
  56. ndelay(160);
  57. /* Hammer in/out the data */
  58. for (i = 7; i >= 0; i--) {
  59. int value;
  60. if (write) {
  61. value = !!(outval & BIT(i));
  62. gpiod_set_value_cansleep(sda, value);
  63. } else {
  64. value = gpiod_get_value(sda);
  65. if (value)
  66. inval |= BIT(i);
  67. }
  68. ndelay(150);
  69. /* Send an SCL pulse */
  70. gpiod_set_value_cansleep(scl, 1);
  71. ndelay(160);
  72. gpiod_set_value_cansleep(scl, 0);
  73. ndelay(160);
  74. }
  75. gpiod_direction_output(sda, 0);
  76. /* Deassert SCEN */
  77. gpiod_set_value_cansleep(scen, 0);
  78. /* Satisfies SCEN pulse width */
  79. udelay(1);
  80. return inval;
  81. }
  82. static u8 tpg110_read_reg(u8 address)
  83. {
  84. return tpg110_readwrite_reg(false, address, 0);
  85. }
  86. static void tpg110_write_reg(u8 address, u8 outval)
  87. {
  88. tpg110_readwrite_reg(true, address, outval);
  89. }
  90. static void tpg110_startup(struct device *dev)
  91. {
  92. u8 val;
  93. dev_info(dev, "TPG110 display enable\n");
  94. /* De-assert the reset signal */
  95. gpiod_set_value_cansleep(grestb, 0);
  96. mdelay(1);
  97. dev_info(dev, "de-asserted GRESTB\n");
  98. /* Test display communication */
  99. tpg110_write_reg(0x00, 0x55);
  100. val = tpg110_read_reg(0x00);
  101. if (val == 0x55)
  102. dev_info(dev, "passed communication test\n");
  103. val = tpg110_read_reg(0x01);
  104. dev_info(dev, "TPG110 chip ID: %d version: %d\n",
  105. val>>4, val&0x0f);
  106. /* Show display resolution */
  107. val = tpg110_read_reg(0x02);
  108. val &= 7;
  109. switch (val) {
  110. case 0x0:
  111. dev_info(dev, "IN 400x240 RGB -> OUT 800x480 RGB (dual scan)");
  112. break;
  113. case 0x1:
  114. dev_info(dev, "IN 480x272 RGB -> OUT 800x480 RGB (dual scan)");
  115. break;
  116. case 0x4:
  117. dev_info(dev, "480x640 RGB");
  118. break;
  119. case 0x5:
  120. dev_info(dev, "480x272 RGB");
  121. break;
  122. case 0x6:
  123. dev_info(dev, "640x480 RGB");
  124. break;
  125. case 0x7:
  126. dev_info(dev, "800x480 RGB");
  127. break;
  128. default:
  129. dev_info(dev, "ILLEGAL RESOLUTION");
  130. break;
  131. }
  132. val = tpg110_read_reg(0x03);
  133. dev_info(dev, "resolution is controlled by %s\n",
  134. (val & BIT(7)) ? "software" : "hardware");
  135. }
  136. static void tpg110_enable(struct clcd_fb *fb)
  137. {
  138. struct device *dev = &fb->dev->dev;
  139. static bool startup;
  140. u8 val;
  141. if (!startup) {
  142. tpg110_startup(dev);
  143. startup = true;
  144. }
  145. /* Take chip out of standby */
  146. val = tpg110_read_reg(0x03);
  147. val |= BIT(0);
  148. tpg110_write_reg(0x03, val);
  149. }
  150. static void tpg110_disable(struct clcd_fb *fb)
  151. {
  152. u8 val;
  153. dev_info(&fb->dev->dev, "TPG110 display disable\n");
  154. val = tpg110_read_reg(0x03);
  155. /* Put into standby */
  156. val &= ~BIT(0);
  157. tpg110_write_reg(0x03, val);
  158. }
  159. static void tpg110_init(struct device *dev, struct device_node *np,
  160. struct clcd_board *board)
  161. {
  162. dev_info(dev, "TPG110 display init\n");
  163. grestb = devm_get_gpiod_from_child(dev, "grestb", &np->fwnode);
  164. if (IS_ERR(grestb)) {
  165. dev_err(dev, "no GRESTB GPIO\n");
  166. return;
  167. }
  168. /* This asserts the GRESTB signal, putting the display into reset */
  169. gpiod_direction_output(grestb, 1);
  170. scen = devm_get_gpiod_from_child(dev, "scen", &np->fwnode);
  171. if (IS_ERR(scen)) {
  172. dev_err(dev, "no SCEN GPIO\n");
  173. return;
  174. }
  175. gpiod_direction_output(scen, 0);
  176. scl = devm_get_gpiod_from_child(dev, "scl", &np->fwnode);
  177. if (IS_ERR(scl)) {
  178. dev_err(dev, "no SCL GPIO\n");
  179. return;
  180. }
  181. gpiod_direction_output(scl, 0);
  182. sda = devm_get_gpiod_from_child(dev, "sda", &np->fwnode);
  183. if (IS_ERR(sda)) {
  184. dev_err(dev, "no SDA GPIO\n");
  185. return;
  186. }
  187. gpiod_direction_output(sda, 0);
  188. board->enable = tpg110_enable;
  189. board->disable = tpg110_disable;
  190. }
  191. int nomadik_clcd_init_panel(struct clcd_fb *fb,
  192. struct device_node *endpoint)
  193. {
  194. struct device_node *panel;
  195. panel = of_graph_get_remote_port_parent(endpoint);
  196. if (!panel)
  197. return -ENODEV;
  198. if (of_device_is_compatible(panel, "tpo,tpg110"))
  199. tpg110_init(&fb->dev->dev, panel, fb->board);
  200. else
  201. dev_info(&fb->dev->dev, "unknown panel\n");
  202. /* Unknown panel, fall through */
  203. return 0;
  204. }
  205. EXPORT_SYMBOL_GPL(nomadik_clcd_init_panel);
  206. #define PMU_CTRL_OFFSET 0x0000
  207. #define PMU_CTRL_LCDNDIF BIT(26)
  208. int nomadik_clcd_init_board(struct amba_device *adev,
  209. struct clcd_board *board)
  210. {
  211. struct regmap *pmu_regmap;
  212. dev_info(&adev->dev, "Nomadik CLCD board init\n");
  213. pmu_regmap =
  214. syscon_regmap_lookup_by_compatible("stericsson,nomadik-pmu");
  215. if (IS_ERR(pmu_regmap)) {
  216. dev_err(&adev->dev, "could not find PMU syscon regmap\n");
  217. return PTR_ERR(pmu_regmap);
  218. }
  219. regmap_update_bits(pmu_regmap,
  220. PMU_CTRL_OFFSET,
  221. PMU_CTRL_LCDNDIF,
  222. 0);
  223. dev_info(&adev->dev, "set PMU mux to CLCD mode\n");
  224. return 0;
  225. }
  226. EXPORT_SYMBOL_GPL(nomadik_clcd_init_board);