max3421-hcd.c 50 KB

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  1. /*
  2. * MAX3421 Host Controller driver for USB.
  3. *
  4. * Author: David Mosberger-Tang <davidm@egauge.net>
  5. *
  6. * (C) Copyright 2014 David Mosberger-Tang <davidm@egauge.net>
  7. *
  8. * MAX3421 is a chip implementing a USB 2.0 Full-/Low-Speed host
  9. * controller on a SPI bus.
  10. *
  11. * Based on:
  12. * o MAX3421E datasheet
  13. * http://datasheets.maximintegrated.com/en/ds/MAX3421E.pdf
  14. * o MAX3421E Programming Guide
  15. * http://www.hdl.co.jp/ftpdata/utl-001/AN3785.pdf
  16. * o gadget/dummy_hcd.c
  17. * For USB HCD implementation.
  18. * o Arduino MAX3421 driver
  19. * https://github.com/felis/USB_Host_Shield_2.0/blob/master/Usb.cpp
  20. *
  21. * This file is licenced under the GPL v2.
  22. *
  23. * Important note on worst-case (full-speed) packet size constraints
  24. * (See USB 2.0 Section 5.6.3 and following):
  25. *
  26. * - control: 64 bytes
  27. * - isochronous: 1023 bytes
  28. * - interrupt: 64 bytes
  29. * - bulk: 64 bytes
  30. *
  31. * Since the MAX3421 FIFO size is 64 bytes, we do not have to work about
  32. * multi-FIFO writes/reads for a single USB packet *except* for isochronous
  33. * transfers. We don't support isochronous transfers at this time, so we
  34. * just assume that a USB packet always fits into a single FIFO buffer.
  35. *
  36. * NOTE: The June 2006 version of "MAX3421E Programming Guide"
  37. * (AN3785) has conflicting info for the RCVDAVIRQ bit:
  38. *
  39. * The description of RCVDAVIRQ says "The CPU *must* clear
  40. * this IRQ bit (by writing a 1 to it) before reading the
  41. * RCVFIFO data.
  42. *
  43. * However, the earlier section on "Programming BULK-IN
  44. * Transfers" says * that:
  45. *
  46. * After the CPU retrieves the data, it clears the
  47. * RCVDAVIRQ bit.
  48. *
  49. * The December 2006 version has been corrected and it consistently
  50. * states the second behavior is the correct one.
  51. *
  52. * Synchronous SPI transactions sleep so we can't perform any such
  53. * transactions while holding a spin-lock (and/or while interrupts are
  54. * masked). To achieve this, all SPI transactions are issued from a
  55. * single thread (max3421_spi_thread).
  56. */
  57. #include <linux/jiffies.h>
  58. #include <linux/module.h>
  59. #include <linux/spi/spi.h>
  60. #include <linux/usb.h>
  61. #include <linux/usb/hcd.h>
  62. #include <linux/platform_data/max3421-hcd.h>
  63. #define DRIVER_DESC "MAX3421 USB Host-Controller Driver"
  64. #define DRIVER_VERSION "1.0"
  65. /* 11-bit counter that wraps around (USB 2.0 Section 8.3.3): */
  66. #define USB_MAX_FRAME_NUMBER 0x7ff
  67. #define USB_MAX_RETRIES 3 /* # of retries before error is reported */
  68. /*
  69. * Max. # of times we're willing to retransmit a request immediately in
  70. * resposne to a NAK. Afterwards, we fall back on trying once a frame.
  71. */
  72. #define NAK_MAX_FAST_RETRANSMITS 2
  73. #define POWER_BUDGET 500 /* in mA; use 8 for low-power port testing */
  74. /* Port-change mask: */
  75. #define PORT_C_MASK ((USB_PORT_STAT_C_CONNECTION | \
  76. USB_PORT_STAT_C_ENABLE | \
  77. USB_PORT_STAT_C_SUSPEND | \
  78. USB_PORT_STAT_C_OVERCURRENT | \
  79. USB_PORT_STAT_C_RESET) << 16)
  80. enum max3421_rh_state {
  81. MAX3421_RH_RESET,
  82. MAX3421_RH_SUSPENDED,
  83. MAX3421_RH_RUNNING
  84. };
  85. enum pkt_state {
  86. PKT_STATE_SETUP, /* waiting to send setup packet to ctrl pipe */
  87. PKT_STATE_TRANSFER, /* waiting to xfer transfer_buffer */
  88. PKT_STATE_TERMINATE /* waiting to terminate control transfer */
  89. };
  90. enum scheduling_pass {
  91. SCHED_PASS_PERIODIC,
  92. SCHED_PASS_NON_PERIODIC,
  93. SCHED_PASS_DONE
  94. };
  95. /* Bit numbers for max3421_hcd->todo: */
  96. enum {
  97. ENABLE_IRQ = 0,
  98. RESET_HCD,
  99. RESET_PORT,
  100. CHECK_UNLINK,
  101. IOPIN_UPDATE
  102. };
  103. struct max3421_dma_buf {
  104. u8 data[2];
  105. };
  106. struct max3421_hcd {
  107. spinlock_t lock;
  108. struct task_struct *spi_thread;
  109. struct max3421_hcd *next;
  110. enum max3421_rh_state rh_state;
  111. /* lower 16 bits contain port status, upper 16 bits the change mask: */
  112. u32 port_status;
  113. unsigned active:1;
  114. struct list_head ep_list; /* list of EP's with work */
  115. /*
  116. * The following are owned by spi_thread (may be accessed by
  117. * SPI-thread without acquiring the HCD lock:
  118. */
  119. u8 rev; /* chip revision */
  120. u16 frame_number;
  121. /*
  122. * kmalloc'd buffers guaranteed to be in separate (DMA)
  123. * cache-lines:
  124. */
  125. struct max3421_dma_buf *tx;
  126. struct max3421_dma_buf *rx;
  127. /*
  128. * URB we're currently processing. Must not be reset to NULL
  129. * unless MAX3421E chip is idle:
  130. */
  131. struct urb *curr_urb;
  132. enum scheduling_pass sched_pass;
  133. struct usb_device *loaded_dev; /* dev that's loaded into the chip */
  134. int loaded_epnum; /* epnum whose toggles are loaded */
  135. int urb_done; /* > 0 -> no errors, < 0: errno */
  136. size_t curr_len;
  137. u8 hien;
  138. u8 mode;
  139. u8 iopins[2];
  140. unsigned long todo;
  141. #ifdef DEBUG
  142. unsigned long err_stat[16];
  143. #endif
  144. };
  145. struct max3421_ep {
  146. struct usb_host_endpoint *ep;
  147. struct list_head ep_list;
  148. u32 naks;
  149. u16 last_active; /* frame # this ep was last active */
  150. enum pkt_state pkt_state;
  151. u8 retries;
  152. u8 retransmit; /* packet needs retransmission */
  153. };
  154. static struct max3421_hcd *max3421_hcd_list;
  155. #define MAX3421_FIFO_SIZE 64
  156. #define MAX3421_SPI_DIR_RD 0 /* read register from MAX3421 */
  157. #define MAX3421_SPI_DIR_WR 1 /* write register to MAX3421 */
  158. /* SPI commands: */
  159. #define MAX3421_SPI_DIR_SHIFT 1
  160. #define MAX3421_SPI_REG_SHIFT 3
  161. #define MAX3421_REG_RCVFIFO 1
  162. #define MAX3421_REG_SNDFIFO 2
  163. #define MAX3421_REG_SUDFIFO 4
  164. #define MAX3421_REG_RCVBC 6
  165. #define MAX3421_REG_SNDBC 7
  166. #define MAX3421_REG_USBIRQ 13
  167. #define MAX3421_REG_USBIEN 14
  168. #define MAX3421_REG_USBCTL 15
  169. #define MAX3421_REG_CPUCTL 16
  170. #define MAX3421_REG_PINCTL 17
  171. #define MAX3421_REG_REVISION 18
  172. #define MAX3421_REG_IOPINS1 20
  173. #define MAX3421_REG_IOPINS2 21
  174. #define MAX3421_REG_GPINIRQ 22
  175. #define MAX3421_REG_GPINIEN 23
  176. #define MAX3421_REG_GPINPOL 24
  177. #define MAX3421_REG_HIRQ 25
  178. #define MAX3421_REG_HIEN 26
  179. #define MAX3421_REG_MODE 27
  180. #define MAX3421_REG_PERADDR 28
  181. #define MAX3421_REG_HCTL 29
  182. #define MAX3421_REG_HXFR 30
  183. #define MAX3421_REG_HRSL 31
  184. enum {
  185. MAX3421_USBIRQ_OSCOKIRQ_BIT = 0,
  186. MAX3421_USBIRQ_NOVBUSIRQ_BIT = 5,
  187. MAX3421_USBIRQ_VBUSIRQ_BIT
  188. };
  189. enum {
  190. MAX3421_CPUCTL_IE_BIT = 0,
  191. MAX3421_CPUCTL_PULSEWID0_BIT = 6,
  192. MAX3421_CPUCTL_PULSEWID1_BIT
  193. };
  194. enum {
  195. MAX3421_USBCTL_PWRDOWN_BIT = 4,
  196. MAX3421_USBCTL_CHIPRES_BIT
  197. };
  198. enum {
  199. MAX3421_PINCTL_GPXA_BIT = 0,
  200. MAX3421_PINCTL_GPXB_BIT,
  201. MAX3421_PINCTL_POSINT_BIT,
  202. MAX3421_PINCTL_INTLEVEL_BIT,
  203. MAX3421_PINCTL_FDUPSPI_BIT,
  204. MAX3421_PINCTL_EP0INAK_BIT,
  205. MAX3421_PINCTL_EP2INAK_BIT,
  206. MAX3421_PINCTL_EP3INAK_BIT,
  207. };
  208. enum {
  209. MAX3421_HI_BUSEVENT_BIT = 0, /* bus-reset/-resume */
  210. MAX3421_HI_RWU_BIT, /* remote wakeup */
  211. MAX3421_HI_RCVDAV_BIT, /* receive FIFO data available */
  212. MAX3421_HI_SNDBAV_BIT, /* send buffer available */
  213. MAX3421_HI_SUSDN_BIT, /* suspend operation done */
  214. MAX3421_HI_CONDET_BIT, /* peripheral connect/disconnect */
  215. MAX3421_HI_FRAME_BIT, /* frame generator */
  216. MAX3421_HI_HXFRDN_BIT, /* host transfer done */
  217. };
  218. enum {
  219. MAX3421_HCTL_BUSRST_BIT = 0,
  220. MAX3421_HCTL_FRMRST_BIT,
  221. MAX3421_HCTL_SAMPLEBUS_BIT,
  222. MAX3421_HCTL_SIGRSM_BIT,
  223. MAX3421_HCTL_RCVTOG0_BIT,
  224. MAX3421_HCTL_RCVTOG1_BIT,
  225. MAX3421_HCTL_SNDTOG0_BIT,
  226. MAX3421_HCTL_SNDTOG1_BIT
  227. };
  228. enum {
  229. MAX3421_MODE_HOST_BIT = 0,
  230. MAX3421_MODE_LOWSPEED_BIT,
  231. MAX3421_MODE_HUBPRE_BIT,
  232. MAX3421_MODE_SOFKAENAB_BIT,
  233. MAX3421_MODE_SEPIRQ_BIT,
  234. MAX3421_MODE_DELAYISO_BIT,
  235. MAX3421_MODE_DMPULLDN_BIT,
  236. MAX3421_MODE_DPPULLDN_BIT
  237. };
  238. enum {
  239. MAX3421_HRSL_OK = 0,
  240. MAX3421_HRSL_BUSY,
  241. MAX3421_HRSL_BADREQ,
  242. MAX3421_HRSL_UNDEF,
  243. MAX3421_HRSL_NAK,
  244. MAX3421_HRSL_STALL,
  245. MAX3421_HRSL_TOGERR,
  246. MAX3421_HRSL_WRONGPID,
  247. MAX3421_HRSL_BADBC,
  248. MAX3421_HRSL_PIDERR,
  249. MAX3421_HRSL_PKTERR,
  250. MAX3421_HRSL_CRCERR,
  251. MAX3421_HRSL_KERR,
  252. MAX3421_HRSL_JERR,
  253. MAX3421_HRSL_TIMEOUT,
  254. MAX3421_HRSL_BABBLE,
  255. MAX3421_HRSL_RESULT_MASK = 0xf,
  256. MAX3421_HRSL_RCVTOGRD_BIT = 4,
  257. MAX3421_HRSL_SNDTOGRD_BIT,
  258. MAX3421_HRSL_KSTATUS_BIT,
  259. MAX3421_HRSL_JSTATUS_BIT
  260. };
  261. /* Return same error-codes as ohci.h:cc_to_error: */
  262. static const int hrsl_to_error[] = {
  263. [MAX3421_HRSL_OK] = 0,
  264. [MAX3421_HRSL_BUSY] = -EINVAL,
  265. [MAX3421_HRSL_BADREQ] = -EINVAL,
  266. [MAX3421_HRSL_UNDEF] = -EINVAL,
  267. [MAX3421_HRSL_NAK] = -EAGAIN,
  268. [MAX3421_HRSL_STALL] = -EPIPE,
  269. [MAX3421_HRSL_TOGERR] = -EILSEQ,
  270. [MAX3421_HRSL_WRONGPID] = -EPROTO,
  271. [MAX3421_HRSL_BADBC] = -EREMOTEIO,
  272. [MAX3421_HRSL_PIDERR] = -EPROTO,
  273. [MAX3421_HRSL_PKTERR] = -EPROTO,
  274. [MAX3421_HRSL_CRCERR] = -EILSEQ,
  275. [MAX3421_HRSL_KERR] = -EIO,
  276. [MAX3421_HRSL_JERR] = -EIO,
  277. [MAX3421_HRSL_TIMEOUT] = -ETIME,
  278. [MAX3421_HRSL_BABBLE] = -EOVERFLOW
  279. };
  280. /*
  281. * See http://www.beyondlogic.org/usbnutshell/usb4.shtml#Control for a
  282. * reasonable overview of how control transfers use the the IN/OUT
  283. * tokens.
  284. */
  285. #define MAX3421_HXFR_BULK_IN(ep) (0x00 | (ep)) /* bulk or interrupt */
  286. #define MAX3421_HXFR_SETUP 0x10
  287. #define MAX3421_HXFR_BULK_OUT(ep) (0x20 | (ep)) /* bulk or interrupt */
  288. #define MAX3421_HXFR_ISO_IN(ep) (0x40 | (ep))
  289. #define MAX3421_HXFR_ISO_OUT(ep) (0x60 | (ep))
  290. #define MAX3421_HXFR_HS_IN 0x80 /* handshake in */
  291. #define MAX3421_HXFR_HS_OUT 0xa0 /* handshake out */
  292. #define field(val, bit) ((val) << (bit))
  293. static inline s16
  294. frame_diff(u16 left, u16 right)
  295. {
  296. return ((unsigned) (left - right)) % (USB_MAX_FRAME_NUMBER + 1);
  297. }
  298. static inline struct max3421_hcd *
  299. hcd_to_max3421(struct usb_hcd *hcd)
  300. {
  301. return (struct max3421_hcd *) hcd->hcd_priv;
  302. }
  303. static inline struct usb_hcd *
  304. max3421_to_hcd(struct max3421_hcd *max3421_hcd)
  305. {
  306. return container_of((void *) max3421_hcd, struct usb_hcd, hcd_priv);
  307. }
  308. static u8
  309. spi_rd8(struct usb_hcd *hcd, unsigned int reg)
  310. {
  311. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  312. struct spi_device *spi = to_spi_device(hcd->self.controller);
  313. struct spi_transfer transfer;
  314. struct spi_message msg;
  315. memset(&transfer, 0, sizeof(transfer));
  316. spi_message_init(&msg);
  317. max3421_hcd->tx->data[0] =
  318. (field(reg, MAX3421_SPI_REG_SHIFT) |
  319. field(MAX3421_SPI_DIR_RD, MAX3421_SPI_DIR_SHIFT));
  320. transfer.tx_buf = max3421_hcd->tx->data;
  321. transfer.rx_buf = max3421_hcd->rx->data;
  322. transfer.len = 2;
  323. spi_message_add_tail(&transfer, &msg);
  324. spi_sync(spi, &msg);
  325. return max3421_hcd->rx->data[1];
  326. }
  327. static void
  328. spi_wr8(struct usb_hcd *hcd, unsigned int reg, u8 val)
  329. {
  330. struct spi_device *spi = to_spi_device(hcd->self.controller);
  331. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  332. struct spi_transfer transfer;
  333. struct spi_message msg;
  334. memset(&transfer, 0, sizeof(transfer));
  335. spi_message_init(&msg);
  336. max3421_hcd->tx->data[0] =
  337. (field(reg, MAX3421_SPI_REG_SHIFT) |
  338. field(MAX3421_SPI_DIR_WR, MAX3421_SPI_DIR_SHIFT));
  339. max3421_hcd->tx->data[1] = val;
  340. transfer.tx_buf = max3421_hcd->tx->data;
  341. transfer.len = 2;
  342. spi_message_add_tail(&transfer, &msg);
  343. spi_sync(spi, &msg);
  344. }
  345. static void
  346. spi_rd_buf(struct usb_hcd *hcd, unsigned int reg, void *buf, size_t len)
  347. {
  348. struct spi_device *spi = to_spi_device(hcd->self.controller);
  349. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  350. struct spi_transfer transfer[2];
  351. struct spi_message msg;
  352. memset(transfer, 0, sizeof(transfer));
  353. spi_message_init(&msg);
  354. max3421_hcd->tx->data[0] =
  355. (field(reg, MAX3421_SPI_REG_SHIFT) |
  356. field(MAX3421_SPI_DIR_RD, MAX3421_SPI_DIR_SHIFT));
  357. transfer[0].tx_buf = max3421_hcd->tx->data;
  358. transfer[0].len = 1;
  359. transfer[1].rx_buf = buf;
  360. transfer[1].len = len;
  361. spi_message_add_tail(&transfer[0], &msg);
  362. spi_message_add_tail(&transfer[1], &msg);
  363. spi_sync(spi, &msg);
  364. }
  365. static void
  366. spi_wr_buf(struct usb_hcd *hcd, unsigned int reg, void *buf, size_t len)
  367. {
  368. struct spi_device *spi = to_spi_device(hcd->self.controller);
  369. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  370. struct spi_transfer transfer[2];
  371. struct spi_message msg;
  372. memset(transfer, 0, sizeof(transfer));
  373. spi_message_init(&msg);
  374. max3421_hcd->tx->data[0] =
  375. (field(reg, MAX3421_SPI_REG_SHIFT) |
  376. field(MAX3421_SPI_DIR_WR, MAX3421_SPI_DIR_SHIFT));
  377. transfer[0].tx_buf = max3421_hcd->tx->data;
  378. transfer[0].len = 1;
  379. transfer[1].tx_buf = buf;
  380. transfer[1].len = len;
  381. spi_message_add_tail(&transfer[0], &msg);
  382. spi_message_add_tail(&transfer[1], &msg);
  383. spi_sync(spi, &msg);
  384. }
  385. /*
  386. * Figure out the correct setting for the LOWSPEED and HUBPRE mode
  387. * bits. The HUBPRE bit needs to be set when MAX3421E operates at
  388. * full speed, but it's talking to a low-speed device (i.e., through a
  389. * hub). Setting that bit ensures that every low-speed packet is
  390. * preceded by a full-speed PRE PID. Possible configurations:
  391. *
  392. * Hub speed: Device speed: => LOWSPEED bit: HUBPRE bit:
  393. * FULL FULL => 0 0
  394. * FULL LOW => 1 1
  395. * LOW LOW => 1 0
  396. * LOW FULL => 1 0
  397. */
  398. static void
  399. max3421_set_speed(struct usb_hcd *hcd, struct usb_device *dev)
  400. {
  401. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  402. u8 mode_lowspeed, mode_hubpre, mode = max3421_hcd->mode;
  403. mode_lowspeed = BIT(MAX3421_MODE_LOWSPEED_BIT);
  404. mode_hubpre = BIT(MAX3421_MODE_HUBPRE_BIT);
  405. if (max3421_hcd->port_status & USB_PORT_STAT_LOW_SPEED) {
  406. mode |= mode_lowspeed;
  407. mode &= ~mode_hubpre;
  408. } else if (dev->speed == USB_SPEED_LOW) {
  409. mode |= mode_lowspeed | mode_hubpre;
  410. } else {
  411. mode &= ~(mode_lowspeed | mode_hubpre);
  412. }
  413. if (mode != max3421_hcd->mode) {
  414. max3421_hcd->mode = mode;
  415. spi_wr8(hcd, MAX3421_REG_MODE, max3421_hcd->mode);
  416. }
  417. }
  418. /*
  419. * Caller must NOT hold HCD spinlock.
  420. */
  421. static void
  422. max3421_set_address(struct usb_hcd *hcd, struct usb_device *dev, int epnum,
  423. int force_toggles)
  424. {
  425. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  426. int old_epnum, same_ep, rcvtog, sndtog;
  427. struct usb_device *old_dev;
  428. u8 hctl;
  429. old_dev = max3421_hcd->loaded_dev;
  430. old_epnum = max3421_hcd->loaded_epnum;
  431. same_ep = (dev == old_dev && epnum == old_epnum);
  432. if (same_ep && !force_toggles)
  433. return;
  434. if (old_dev && !same_ep) {
  435. /* save the old end-points toggles: */
  436. u8 hrsl = spi_rd8(hcd, MAX3421_REG_HRSL);
  437. rcvtog = (hrsl >> MAX3421_HRSL_RCVTOGRD_BIT) & 1;
  438. sndtog = (hrsl >> MAX3421_HRSL_SNDTOGRD_BIT) & 1;
  439. /* no locking: HCD (i.e., we) own toggles, don't we? */
  440. usb_settoggle(old_dev, old_epnum, 0, rcvtog);
  441. usb_settoggle(old_dev, old_epnum, 1, sndtog);
  442. }
  443. /* setup new endpoint's toggle bits: */
  444. rcvtog = usb_gettoggle(dev, epnum, 0);
  445. sndtog = usb_gettoggle(dev, epnum, 1);
  446. hctl = (BIT(rcvtog + MAX3421_HCTL_RCVTOG0_BIT) |
  447. BIT(sndtog + MAX3421_HCTL_SNDTOG0_BIT));
  448. max3421_hcd->loaded_epnum = epnum;
  449. spi_wr8(hcd, MAX3421_REG_HCTL, hctl);
  450. /*
  451. * Note: devnum for one and the same device can change during
  452. * address-assignment so it's best to just always load the
  453. * address whenever the end-point changed/was forced.
  454. */
  455. max3421_hcd->loaded_dev = dev;
  456. spi_wr8(hcd, MAX3421_REG_PERADDR, dev->devnum);
  457. }
  458. static int
  459. max3421_ctrl_setup(struct usb_hcd *hcd, struct urb *urb)
  460. {
  461. spi_wr_buf(hcd, MAX3421_REG_SUDFIFO, urb->setup_packet, 8);
  462. return MAX3421_HXFR_SETUP;
  463. }
  464. static int
  465. max3421_transfer_in(struct usb_hcd *hcd, struct urb *urb)
  466. {
  467. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  468. int epnum = usb_pipeendpoint(urb->pipe);
  469. max3421_hcd->curr_len = 0;
  470. max3421_hcd->hien |= BIT(MAX3421_HI_RCVDAV_BIT);
  471. return MAX3421_HXFR_BULK_IN(epnum);
  472. }
  473. static int
  474. max3421_transfer_out(struct usb_hcd *hcd, struct urb *urb, int fast_retransmit)
  475. {
  476. struct spi_device *spi = to_spi_device(hcd->self.controller);
  477. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  478. int epnum = usb_pipeendpoint(urb->pipe);
  479. u32 max_packet;
  480. void *src;
  481. src = urb->transfer_buffer + urb->actual_length;
  482. if (fast_retransmit) {
  483. if (max3421_hcd->rev == 0x12) {
  484. /* work around rev 0x12 bug: */
  485. spi_wr8(hcd, MAX3421_REG_SNDBC, 0);
  486. spi_wr8(hcd, MAX3421_REG_SNDFIFO, ((u8 *) src)[0]);
  487. spi_wr8(hcd, MAX3421_REG_SNDBC, max3421_hcd->curr_len);
  488. }
  489. return MAX3421_HXFR_BULK_OUT(epnum);
  490. }
  491. max_packet = usb_maxpacket(urb->dev, urb->pipe, 1);
  492. if (max_packet > MAX3421_FIFO_SIZE) {
  493. /*
  494. * We do not support isochronous transfers at this
  495. * time.
  496. */
  497. dev_err(&spi->dev,
  498. "%s: packet-size of %u too big (limit is %u bytes)",
  499. __func__, max_packet, MAX3421_FIFO_SIZE);
  500. max3421_hcd->urb_done = -EMSGSIZE;
  501. return -EMSGSIZE;
  502. }
  503. max3421_hcd->curr_len = min((urb->transfer_buffer_length -
  504. urb->actual_length), max_packet);
  505. spi_wr_buf(hcd, MAX3421_REG_SNDFIFO, src, max3421_hcd->curr_len);
  506. spi_wr8(hcd, MAX3421_REG_SNDBC, max3421_hcd->curr_len);
  507. return MAX3421_HXFR_BULK_OUT(epnum);
  508. }
  509. /*
  510. * Issue the next host-transfer command.
  511. * Caller must NOT hold HCD spinlock.
  512. */
  513. static void
  514. max3421_next_transfer(struct usb_hcd *hcd, int fast_retransmit)
  515. {
  516. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  517. struct urb *urb = max3421_hcd->curr_urb;
  518. struct max3421_ep *max3421_ep;
  519. int cmd = -EINVAL;
  520. if (!urb)
  521. return; /* nothing to do */
  522. max3421_ep = urb->ep->hcpriv;
  523. switch (max3421_ep->pkt_state) {
  524. case PKT_STATE_SETUP:
  525. cmd = max3421_ctrl_setup(hcd, urb);
  526. break;
  527. case PKT_STATE_TRANSFER:
  528. if (usb_urb_dir_in(urb))
  529. cmd = max3421_transfer_in(hcd, urb);
  530. else
  531. cmd = max3421_transfer_out(hcd, urb, fast_retransmit);
  532. break;
  533. case PKT_STATE_TERMINATE:
  534. /*
  535. * IN transfers are terminated with HS_OUT token,
  536. * OUT transfers with HS_IN:
  537. */
  538. if (usb_urb_dir_in(urb))
  539. cmd = MAX3421_HXFR_HS_OUT;
  540. else
  541. cmd = MAX3421_HXFR_HS_IN;
  542. break;
  543. }
  544. if (cmd < 0)
  545. return;
  546. /* issue the command and wait for host-xfer-done interrupt: */
  547. spi_wr8(hcd, MAX3421_REG_HXFR, cmd);
  548. max3421_hcd->hien |= BIT(MAX3421_HI_HXFRDN_BIT);
  549. }
  550. /*
  551. * Find the next URB to process and start its execution.
  552. *
  553. * At this time, we do not anticipate ever connecting a USB hub to the
  554. * MAX3421 chip, so at most USB device can be connected and we can use
  555. * a simplistic scheduler: at the start of a frame, schedule all
  556. * periodic transfers. Once that is done, use the remainder of the
  557. * frame to process non-periodic (bulk & control) transfers.
  558. *
  559. * Preconditions:
  560. * o Caller must NOT hold HCD spinlock.
  561. * o max3421_hcd->curr_urb MUST BE NULL.
  562. * o MAX3421E chip must be idle.
  563. */
  564. static int
  565. max3421_select_and_start_urb(struct usb_hcd *hcd)
  566. {
  567. struct spi_device *spi = to_spi_device(hcd->self.controller);
  568. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  569. struct urb *urb, *curr_urb = NULL;
  570. struct max3421_ep *max3421_ep;
  571. int epnum, force_toggles = 0;
  572. struct usb_host_endpoint *ep;
  573. struct list_head *pos;
  574. unsigned long flags;
  575. spin_lock_irqsave(&max3421_hcd->lock, flags);
  576. for (;
  577. max3421_hcd->sched_pass < SCHED_PASS_DONE;
  578. ++max3421_hcd->sched_pass)
  579. list_for_each(pos, &max3421_hcd->ep_list) {
  580. urb = NULL;
  581. max3421_ep = container_of(pos, struct max3421_ep,
  582. ep_list);
  583. ep = max3421_ep->ep;
  584. switch (usb_endpoint_type(&ep->desc)) {
  585. case USB_ENDPOINT_XFER_ISOC:
  586. case USB_ENDPOINT_XFER_INT:
  587. if (max3421_hcd->sched_pass !=
  588. SCHED_PASS_PERIODIC)
  589. continue;
  590. break;
  591. case USB_ENDPOINT_XFER_CONTROL:
  592. case USB_ENDPOINT_XFER_BULK:
  593. if (max3421_hcd->sched_pass !=
  594. SCHED_PASS_NON_PERIODIC)
  595. continue;
  596. break;
  597. }
  598. if (list_empty(&ep->urb_list))
  599. continue; /* nothing to do */
  600. urb = list_first_entry(&ep->urb_list, struct urb,
  601. urb_list);
  602. if (urb->unlinked) {
  603. dev_dbg(&spi->dev, "%s: URB %p unlinked=%d",
  604. __func__, urb, urb->unlinked);
  605. max3421_hcd->curr_urb = urb;
  606. max3421_hcd->urb_done = 1;
  607. spin_unlock_irqrestore(&max3421_hcd->lock,
  608. flags);
  609. return 1;
  610. }
  611. switch (usb_endpoint_type(&ep->desc)) {
  612. case USB_ENDPOINT_XFER_CONTROL:
  613. /*
  614. * Allow one control transaction per
  615. * frame per endpoint:
  616. */
  617. if (frame_diff(max3421_ep->last_active,
  618. max3421_hcd->frame_number) == 0)
  619. continue;
  620. break;
  621. case USB_ENDPOINT_XFER_BULK:
  622. if (max3421_ep->retransmit
  623. && (frame_diff(max3421_ep->last_active,
  624. max3421_hcd->frame_number)
  625. == 0))
  626. /*
  627. * We already tried this EP
  628. * during this frame and got a
  629. * NAK or error; wait for next frame
  630. */
  631. continue;
  632. break;
  633. case USB_ENDPOINT_XFER_ISOC:
  634. case USB_ENDPOINT_XFER_INT:
  635. if (frame_diff(max3421_hcd->frame_number,
  636. max3421_ep->last_active)
  637. < urb->interval)
  638. /*
  639. * We already processed this
  640. * end-point in the current
  641. * frame
  642. */
  643. continue;
  644. break;
  645. }
  646. /* move current ep to tail: */
  647. list_move_tail(pos, &max3421_hcd->ep_list);
  648. curr_urb = urb;
  649. goto done;
  650. }
  651. done:
  652. if (!curr_urb) {
  653. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  654. return 0;
  655. }
  656. urb = max3421_hcd->curr_urb = curr_urb;
  657. epnum = usb_endpoint_num(&urb->ep->desc);
  658. if (max3421_ep->retransmit)
  659. /* restart (part of) a USB transaction: */
  660. max3421_ep->retransmit = 0;
  661. else {
  662. /* start USB transaction: */
  663. if (usb_endpoint_xfer_control(&ep->desc)) {
  664. /*
  665. * See USB 2.0 spec section 8.6.1
  666. * Initialization via SETUP Token:
  667. */
  668. usb_settoggle(urb->dev, epnum, 0, 1);
  669. usb_settoggle(urb->dev, epnum, 1, 1);
  670. max3421_ep->pkt_state = PKT_STATE_SETUP;
  671. force_toggles = 1;
  672. } else
  673. max3421_ep->pkt_state = PKT_STATE_TRANSFER;
  674. }
  675. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  676. max3421_ep->last_active = max3421_hcd->frame_number;
  677. max3421_set_address(hcd, urb->dev, epnum, force_toggles);
  678. max3421_set_speed(hcd, urb->dev);
  679. max3421_next_transfer(hcd, 0);
  680. return 1;
  681. }
  682. /*
  683. * Check all endpoints for URBs that got unlinked.
  684. *
  685. * Caller must NOT hold HCD spinlock.
  686. */
  687. static int
  688. max3421_check_unlink(struct usb_hcd *hcd)
  689. {
  690. struct spi_device *spi = to_spi_device(hcd->self.controller);
  691. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  692. struct max3421_ep *max3421_ep;
  693. struct usb_host_endpoint *ep;
  694. struct urb *urb, *next;
  695. unsigned long flags;
  696. int retval = 0;
  697. spin_lock_irqsave(&max3421_hcd->lock, flags);
  698. list_for_each_entry(max3421_ep, &max3421_hcd->ep_list, ep_list) {
  699. ep = max3421_ep->ep;
  700. list_for_each_entry_safe(urb, next, &ep->urb_list, urb_list) {
  701. if (urb->unlinked) {
  702. retval = 1;
  703. dev_dbg(&spi->dev, "%s: URB %p unlinked=%d",
  704. __func__, urb, urb->unlinked);
  705. usb_hcd_unlink_urb_from_ep(hcd, urb);
  706. spin_unlock_irqrestore(&max3421_hcd->lock,
  707. flags);
  708. usb_hcd_giveback_urb(hcd, urb, 0);
  709. spin_lock_irqsave(&max3421_hcd->lock, flags);
  710. }
  711. }
  712. }
  713. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  714. return retval;
  715. }
  716. /*
  717. * Caller must NOT hold HCD spinlock.
  718. */
  719. static void
  720. max3421_slow_retransmit(struct usb_hcd *hcd)
  721. {
  722. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  723. struct urb *urb = max3421_hcd->curr_urb;
  724. struct max3421_ep *max3421_ep;
  725. max3421_ep = urb->ep->hcpriv;
  726. max3421_ep->retransmit = 1;
  727. max3421_hcd->curr_urb = NULL;
  728. }
  729. /*
  730. * Caller must NOT hold HCD spinlock.
  731. */
  732. static void
  733. max3421_recv_data_available(struct usb_hcd *hcd)
  734. {
  735. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  736. struct urb *urb = max3421_hcd->curr_urb;
  737. size_t remaining, transfer_size;
  738. u8 rcvbc;
  739. rcvbc = spi_rd8(hcd, MAX3421_REG_RCVBC);
  740. if (rcvbc > MAX3421_FIFO_SIZE)
  741. rcvbc = MAX3421_FIFO_SIZE;
  742. if (urb->actual_length >= urb->transfer_buffer_length)
  743. remaining = 0;
  744. else
  745. remaining = urb->transfer_buffer_length - urb->actual_length;
  746. transfer_size = rcvbc;
  747. if (transfer_size > remaining)
  748. transfer_size = remaining;
  749. if (transfer_size > 0) {
  750. void *dst = urb->transfer_buffer + urb->actual_length;
  751. spi_rd_buf(hcd, MAX3421_REG_RCVFIFO, dst, transfer_size);
  752. urb->actual_length += transfer_size;
  753. max3421_hcd->curr_len = transfer_size;
  754. }
  755. /* ack the RCVDAV irq now that the FIFO has been read: */
  756. spi_wr8(hcd, MAX3421_REG_HIRQ, BIT(MAX3421_HI_RCVDAV_BIT));
  757. }
  758. static void
  759. max3421_handle_error(struct usb_hcd *hcd, u8 hrsl)
  760. {
  761. struct spi_device *spi = to_spi_device(hcd->self.controller);
  762. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  763. u8 result_code = hrsl & MAX3421_HRSL_RESULT_MASK;
  764. struct urb *urb = max3421_hcd->curr_urb;
  765. struct max3421_ep *max3421_ep = urb->ep->hcpriv;
  766. int switch_sndfifo;
  767. /*
  768. * If an OUT command results in any response other than OK
  769. * (i.e., error or NAK), we have to perform a dummy-write to
  770. * SNDBC so the FIFO gets switched back to us. Otherwise, we
  771. * get out of sync with the SNDFIFO double buffer.
  772. */
  773. switch_sndfifo = (max3421_ep->pkt_state == PKT_STATE_TRANSFER &&
  774. usb_urb_dir_out(urb));
  775. switch (result_code) {
  776. case MAX3421_HRSL_OK:
  777. return; /* this shouldn't happen */
  778. case MAX3421_HRSL_WRONGPID: /* received wrong PID */
  779. case MAX3421_HRSL_BUSY: /* SIE busy */
  780. case MAX3421_HRSL_BADREQ: /* bad val in HXFR */
  781. case MAX3421_HRSL_UNDEF: /* reserved */
  782. case MAX3421_HRSL_KERR: /* K-state instead of response */
  783. case MAX3421_HRSL_JERR: /* J-state instead of response */
  784. /*
  785. * packet experienced an error that we cannot recover
  786. * from; report error
  787. */
  788. max3421_hcd->urb_done = hrsl_to_error[result_code];
  789. dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x",
  790. __func__, hrsl);
  791. break;
  792. case MAX3421_HRSL_TOGERR:
  793. if (usb_urb_dir_in(urb))
  794. ; /* don't do anything (device will switch toggle) */
  795. else {
  796. /* flip the send toggle bit: */
  797. int sndtog = (hrsl >> MAX3421_HRSL_SNDTOGRD_BIT) & 1;
  798. sndtog ^= 1;
  799. spi_wr8(hcd, MAX3421_REG_HCTL,
  800. BIT(sndtog + MAX3421_HCTL_SNDTOG0_BIT));
  801. }
  802. /* FALL THROUGH */
  803. case MAX3421_HRSL_BADBC: /* bad byte count */
  804. case MAX3421_HRSL_PIDERR: /* received PID is corrupted */
  805. case MAX3421_HRSL_PKTERR: /* packet error (stuff, EOP) */
  806. case MAX3421_HRSL_CRCERR: /* CRC error */
  807. case MAX3421_HRSL_BABBLE: /* device talked too long */
  808. case MAX3421_HRSL_TIMEOUT:
  809. if (max3421_ep->retries++ < USB_MAX_RETRIES)
  810. /* retry the packet again in the next frame */
  811. max3421_slow_retransmit(hcd);
  812. else {
  813. /* Based on ohci.h cc_to_err[]: */
  814. max3421_hcd->urb_done = hrsl_to_error[result_code];
  815. dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x",
  816. __func__, hrsl);
  817. }
  818. break;
  819. case MAX3421_HRSL_STALL:
  820. dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x",
  821. __func__, hrsl);
  822. max3421_hcd->urb_done = hrsl_to_error[result_code];
  823. break;
  824. case MAX3421_HRSL_NAK:
  825. /*
  826. * Device wasn't ready for data or has no data
  827. * available: retry the packet again.
  828. */
  829. if (max3421_ep->naks++ < NAK_MAX_FAST_RETRANSMITS) {
  830. max3421_next_transfer(hcd, 1);
  831. switch_sndfifo = 0;
  832. } else
  833. max3421_slow_retransmit(hcd);
  834. break;
  835. }
  836. if (switch_sndfifo)
  837. spi_wr8(hcd, MAX3421_REG_SNDBC, 0);
  838. }
  839. /*
  840. * Caller must NOT hold HCD spinlock.
  841. */
  842. static int
  843. max3421_transfer_in_done(struct usb_hcd *hcd, struct urb *urb)
  844. {
  845. struct spi_device *spi = to_spi_device(hcd->self.controller);
  846. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  847. u32 max_packet;
  848. if (urb->actual_length >= urb->transfer_buffer_length)
  849. return 1; /* read is complete, so we're done */
  850. /*
  851. * USB 2.0 Section 5.3.2 Pipes: packets must be full size
  852. * except for last one.
  853. */
  854. max_packet = usb_maxpacket(urb->dev, urb->pipe, 0);
  855. if (max_packet > MAX3421_FIFO_SIZE) {
  856. /*
  857. * We do not support isochronous transfers at this
  858. * time...
  859. */
  860. dev_err(&spi->dev,
  861. "%s: packet-size of %u too big (limit is %u bytes)",
  862. __func__, max_packet, MAX3421_FIFO_SIZE);
  863. return -EINVAL;
  864. }
  865. if (max3421_hcd->curr_len < max_packet) {
  866. if (urb->transfer_flags & URB_SHORT_NOT_OK) {
  867. /*
  868. * remaining > 0 and received an
  869. * unexpected partial packet ->
  870. * error
  871. */
  872. return -EREMOTEIO;
  873. } else
  874. /* short read, but it's OK */
  875. return 1;
  876. }
  877. return 0; /* not done */
  878. }
  879. /*
  880. * Caller must NOT hold HCD spinlock.
  881. */
  882. static int
  883. max3421_transfer_out_done(struct usb_hcd *hcd, struct urb *urb)
  884. {
  885. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  886. urb->actual_length += max3421_hcd->curr_len;
  887. if (urb->actual_length < urb->transfer_buffer_length)
  888. return 0;
  889. if (urb->transfer_flags & URB_ZERO_PACKET) {
  890. /*
  891. * Some hardware needs a zero-size packet at the end
  892. * of a bulk-out transfer if the last transfer was a
  893. * full-sized packet (i.e., such hardware use <
  894. * max_packet as an indicator that the end of the
  895. * packet has been reached).
  896. */
  897. u32 max_packet = usb_maxpacket(urb->dev, urb->pipe, 1);
  898. if (max3421_hcd->curr_len == max_packet)
  899. return 0;
  900. }
  901. return 1;
  902. }
  903. /*
  904. * Caller must NOT hold HCD spinlock.
  905. */
  906. static void
  907. max3421_host_transfer_done(struct usb_hcd *hcd)
  908. {
  909. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  910. struct urb *urb = max3421_hcd->curr_urb;
  911. struct max3421_ep *max3421_ep;
  912. u8 result_code, hrsl;
  913. int urb_done = 0;
  914. max3421_hcd->hien &= ~(BIT(MAX3421_HI_HXFRDN_BIT) |
  915. BIT(MAX3421_HI_RCVDAV_BIT));
  916. hrsl = spi_rd8(hcd, MAX3421_REG_HRSL);
  917. result_code = hrsl & MAX3421_HRSL_RESULT_MASK;
  918. #ifdef DEBUG
  919. ++max3421_hcd->err_stat[result_code];
  920. #endif
  921. max3421_ep = urb->ep->hcpriv;
  922. if (unlikely(result_code != MAX3421_HRSL_OK)) {
  923. max3421_handle_error(hcd, hrsl);
  924. return;
  925. }
  926. max3421_ep->naks = 0;
  927. max3421_ep->retries = 0;
  928. switch (max3421_ep->pkt_state) {
  929. case PKT_STATE_SETUP:
  930. if (urb->transfer_buffer_length > 0)
  931. max3421_ep->pkt_state = PKT_STATE_TRANSFER;
  932. else
  933. max3421_ep->pkt_state = PKT_STATE_TERMINATE;
  934. break;
  935. case PKT_STATE_TRANSFER:
  936. if (usb_urb_dir_in(urb))
  937. urb_done = max3421_transfer_in_done(hcd, urb);
  938. else
  939. urb_done = max3421_transfer_out_done(hcd, urb);
  940. if (urb_done > 0 && usb_pipetype(urb->pipe) == PIPE_CONTROL) {
  941. /*
  942. * We aren't really done - we still need to
  943. * terminate the control transfer:
  944. */
  945. max3421_hcd->urb_done = urb_done = 0;
  946. max3421_ep->pkt_state = PKT_STATE_TERMINATE;
  947. }
  948. break;
  949. case PKT_STATE_TERMINATE:
  950. urb_done = 1;
  951. break;
  952. }
  953. if (urb_done)
  954. max3421_hcd->urb_done = urb_done;
  955. else
  956. max3421_next_transfer(hcd, 0);
  957. }
  958. /*
  959. * Caller must NOT hold HCD spinlock.
  960. */
  961. static void
  962. max3421_detect_conn(struct usb_hcd *hcd)
  963. {
  964. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  965. unsigned int jk, have_conn = 0;
  966. u32 old_port_status, chg;
  967. unsigned long flags;
  968. u8 hrsl, mode;
  969. hrsl = spi_rd8(hcd, MAX3421_REG_HRSL);
  970. jk = ((((hrsl >> MAX3421_HRSL_JSTATUS_BIT) & 1) << 0) |
  971. (((hrsl >> MAX3421_HRSL_KSTATUS_BIT) & 1) << 1));
  972. mode = max3421_hcd->mode;
  973. switch (jk) {
  974. case 0x0: /* SE0: disconnect */
  975. /*
  976. * Turn off SOFKAENAB bit to avoid getting interrupt
  977. * every milli-second:
  978. */
  979. mode &= ~BIT(MAX3421_MODE_SOFKAENAB_BIT);
  980. break;
  981. case 0x1: /* J=0,K=1: low-speed (in full-speed or vice versa) */
  982. case 0x2: /* J=1,K=0: full-speed (in full-speed or vice versa) */
  983. if (jk == 0x2)
  984. /* need to switch to the other speed: */
  985. mode ^= BIT(MAX3421_MODE_LOWSPEED_BIT);
  986. /* turn on SOFKAENAB bit: */
  987. mode |= BIT(MAX3421_MODE_SOFKAENAB_BIT);
  988. have_conn = 1;
  989. break;
  990. case 0x3: /* illegal */
  991. break;
  992. }
  993. max3421_hcd->mode = mode;
  994. spi_wr8(hcd, MAX3421_REG_MODE, max3421_hcd->mode);
  995. spin_lock_irqsave(&max3421_hcd->lock, flags);
  996. old_port_status = max3421_hcd->port_status;
  997. if (have_conn)
  998. max3421_hcd->port_status |= USB_PORT_STAT_CONNECTION;
  999. else
  1000. max3421_hcd->port_status &= ~USB_PORT_STAT_CONNECTION;
  1001. if (mode & BIT(MAX3421_MODE_LOWSPEED_BIT))
  1002. max3421_hcd->port_status |= USB_PORT_STAT_LOW_SPEED;
  1003. else
  1004. max3421_hcd->port_status &= ~USB_PORT_STAT_LOW_SPEED;
  1005. chg = (old_port_status ^ max3421_hcd->port_status);
  1006. max3421_hcd->port_status |= chg << 16;
  1007. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1008. }
  1009. static irqreturn_t
  1010. max3421_irq_handler(int irq, void *dev_id)
  1011. {
  1012. struct usb_hcd *hcd = dev_id;
  1013. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1014. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1015. if (max3421_hcd->spi_thread &&
  1016. max3421_hcd->spi_thread->state != TASK_RUNNING)
  1017. wake_up_process(max3421_hcd->spi_thread);
  1018. if (!test_and_set_bit(ENABLE_IRQ, &max3421_hcd->todo))
  1019. disable_irq_nosync(spi->irq);
  1020. return IRQ_HANDLED;
  1021. }
  1022. #ifdef DEBUG
  1023. static void
  1024. dump_eps(struct usb_hcd *hcd)
  1025. {
  1026. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1027. struct max3421_ep *max3421_ep;
  1028. struct usb_host_endpoint *ep;
  1029. char ubuf[512], *dp, *end;
  1030. unsigned long flags;
  1031. struct urb *urb;
  1032. int epnum, ret;
  1033. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1034. list_for_each_entry(max3421_ep, &max3421_hcd->ep_list, ep_list) {
  1035. ep = max3421_ep->ep;
  1036. dp = ubuf;
  1037. end = dp + sizeof(ubuf);
  1038. *dp = '\0';
  1039. list_for_each_entry(urb, &ep->urb_list, urb_list) {
  1040. ret = snprintf(dp, end - dp, " %p(%d.%s %d/%d)", urb,
  1041. usb_pipetype(urb->pipe),
  1042. usb_urb_dir_in(urb) ? "IN" : "OUT",
  1043. urb->actual_length,
  1044. urb->transfer_buffer_length);
  1045. if (ret < 0 || ret >= end - dp)
  1046. break; /* error or buffer full */
  1047. dp += ret;
  1048. }
  1049. epnum = usb_endpoint_num(&ep->desc);
  1050. pr_info("EP%0u %u lst %04u rtr %u nak %6u rxmt %u: %s\n",
  1051. epnum, max3421_ep->pkt_state, max3421_ep->last_active,
  1052. max3421_ep->retries, max3421_ep->naks,
  1053. max3421_ep->retransmit, ubuf);
  1054. }
  1055. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1056. }
  1057. #endif /* DEBUG */
  1058. /* Return zero if no work was performed, 1 otherwise. */
  1059. static int
  1060. max3421_handle_irqs(struct usb_hcd *hcd)
  1061. {
  1062. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1063. u32 chg, old_port_status;
  1064. unsigned long flags;
  1065. u8 hirq;
  1066. /*
  1067. * Read and ack pending interrupts (CPU must never
  1068. * clear SNDBAV directly and RCVDAV must be cleared by
  1069. * max3421_recv_data_available()!):
  1070. */
  1071. hirq = spi_rd8(hcd, MAX3421_REG_HIRQ);
  1072. hirq &= max3421_hcd->hien;
  1073. if (!hirq)
  1074. return 0;
  1075. spi_wr8(hcd, MAX3421_REG_HIRQ,
  1076. hirq & ~(BIT(MAX3421_HI_SNDBAV_BIT) |
  1077. BIT(MAX3421_HI_RCVDAV_BIT)));
  1078. if (hirq & BIT(MAX3421_HI_FRAME_BIT)) {
  1079. max3421_hcd->frame_number = ((max3421_hcd->frame_number + 1)
  1080. & USB_MAX_FRAME_NUMBER);
  1081. max3421_hcd->sched_pass = SCHED_PASS_PERIODIC;
  1082. }
  1083. if (hirq & BIT(MAX3421_HI_RCVDAV_BIT))
  1084. max3421_recv_data_available(hcd);
  1085. if (hirq & BIT(MAX3421_HI_HXFRDN_BIT))
  1086. max3421_host_transfer_done(hcd);
  1087. if (hirq & BIT(MAX3421_HI_CONDET_BIT))
  1088. max3421_detect_conn(hcd);
  1089. /*
  1090. * Now process interrupts that may affect HCD state
  1091. * other than the end-points:
  1092. */
  1093. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1094. old_port_status = max3421_hcd->port_status;
  1095. if (hirq & BIT(MAX3421_HI_BUSEVENT_BIT)) {
  1096. if (max3421_hcd->port_status & USB_PORT_STAT_RESET) {
  1097. /* BUSEVENT due to completion of Bus Reset */
  1098. max3421_hcd->port_status &= ~USB_PORT_STAT_RESET;
  1099. max3421_hcd->port_status |= USB_PORT_STAT_ENABLE;
  1100. } else {
  1101. /* BUSEVENT due to completion of Bus Resume */
  1102. pr_info("%s: BUSEVENT Bus Resume Done\n", __func__);
  1103. }
  1104. }
  1105. if (hirq & BIT(MAX3421_HI_RWU_BIT))
  1106. pr_info("%s: RWU\n", __func__);
  1107. if (hirq & BIT(MAX3421_HI_SUSDN_BIT))
  1108. pr_info("%s: SUSDN\n", __func__);
  1109. chg = (old_port_status ^ max3421_hcd->port_status);
  1110. max3421_hcd->port_status |= chg << 16;
  1111. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1112. #ifdef DEBUG
  1113. {
  1114. static unsigned long last_time;
  1115. char sbuf[16 * 16], *dp, *end;
  1116. int i;
  1117. if (time_after(jiffies, last_time + 5*HZ)) {
  1118. dp = sbuf;
  1119. end = sbuf + sizeof(sbuf);
  1120. *dp = '\0';
  1121. for (i = 0; i < 16; ++i) {
  1122. int ret = snprintf(dp, end - dp, " %lu",
  1123. max3421_hcd->err_stat[i]);
  1124. if (ret < 0 || ret >= end - dp)
  1125. break; /* error or buffer full */
  1126. dp += ret;
  1127. }
  1128. pr_info("%s: hrsl_stats %s\n", __func__, sbuf);
  1129. memset(max3421_hcd->err_stat, 0,
  1130. sizeof(max3421_hcd->err_stat));
  1131. last_time = jiffies;
  1132. dump_eps(hcd);
  1133. }
  1134. }
  1135. #endif
  1136. return 1;
  1137. }
  1138. static int
  1139. max3421_reset_hcd(struct usb_hcd *hcd)
  1140. {
  1141. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1142. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1143. int timeout;
  1144. /* perform a chip reset and wait for OSCIRQ signal to appear: */
  1145. spi_wr8(hcd, MAX3421_REG_USBCTL, BIT(MAX3421_USBCTL_CHIPRES_BIT));
  1146. /* clear reset: */
  1147. spi_wr8(hcd, MAX3421_REG_USBCTL, 0);
  1148. timeout = 1000;
  1149. while (1) {
  1150. if (spi_rd8(hcd, MAX3421_REG_USBIRQ)
  1151. & BIT(MAX3421_USBIRQ_OSCOKIRQ_BIT))
  1152. break;
  1153. if (--timeout < 0) {
  1154. dev_err(&spi->dev,
  1155. "timed out waiting for oscillator OK signal");
  1156. return 1;
  1157. }
  1158. cond_resched();
  1159. }
  1160. /*
  1161. * Turn on host mode, automatic generation of SOF packets, and
  1162. * enable pull-down registers on DM/DP:
  1163. */
  1164. max3421_hcd->mode = (BIT(MAX3421_MODE_HOST_BIT) |
  1165. BIT(MAX3421_MODE_SOFKAENAB_BIT) |
  1166. BIT(MAX3421_MODE_DMPULLDN_BIT) |
  1167. BIT(MAX3421_MODE_DPPULLDN_BIT));
  1168. spi_wr8(hcd, MAX3421_REG_MODE, max3421_hcd->mode);
  1169. /* reset frame-number: */
  1170. max3421_hcd->frame_number = USB_MAX_FRAME_NUMBER;
  1171. spi_wr8(hcd, MAX3421_REG_HCTL, BIT(MAX3421_HCTL_FRMRST_BIT));
  1172. /* sample the state of the D+ and D- lines */
  1173. spi_wr8(hcd, MAX3421_REG_HCTL, BIT(MAX3421_HCTL_SAMPLEBUS_BIT));
  1174. max3421_detect_conn(hcd);
  1175. /* enable frame, connection-detected, and bus-event interrupts: */
  1176. max3421_hcd->hien = (BIT(MAX3421_HI_FRAME_BIT) |
  1177. BIT(MAX3421_HI_CONDET_BIT) |
  1178. BIT(MAX3421_HI_BUSEVENT_BIT));
  1179. spi_wr8(hcd, MAX3421_REG_HIEN, max3421_hcd->hien);
  1180. /* enable interrupts: */
  1181. spi_wr8(hcd, MAX3421_REG_CPUCTL, BIT(MAX3421_CPUCTL_IE_BIT));
  1182. return 1;
  1183. }
  1184. static int
  1185. max3421_urb_done(struct usb_hcd *hcd)
  1186. {
  1187. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1188. unsigned long flags;
  1189. struct urb *urb;
  1190. int status;
  1191. status = max3421_hcd->urb_done;
  1192. max3421_hcd->urb_done = 0;
  1193. if (status > 0)
  1194. status = 0;
  1195. urb = max3421_hcd->curr_urb;
  1196. if (urb) {
  1197. max3421_hcd->curr_urb = NULL;
  1198. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1199. usb_hcd_unlink_urb_from_ep(hcd, urb);
  1200. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1201. /* must be called without the HCD spinlock: */
  1202. usb_hcd_giveback_urb(hcd, urb, status);
  1203. }
  1204. return 1;
  1205. }
  1206. static int
  1207. max3421_spi_thread(void *dev_id)
  1208. {
  1209. struct usb_hcd *hcd = dev_id;
  1210. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1211. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1212. int i, i_worked = 1;
  1213. /* set full-duplex SPI mode, low-active interrupt pin: */
  1214. spi_wr8(hcd, MAX3421_REG_PINCTL,
  1215. (BIT(MAX3421_PINCTL_FDUPSPI_BIT) | /* full-duplex */
  1216. BIT(MAX3421_PINCTL_INTLEVEL_BIT))); /* low-active irq */
  1217. while (!kthread_should_stop()) {
  1218. max3421_hcd->rev = spi_rd8(hcd, MAX3421_REG_REVISION);
  1219. if (max3421_hcd->rev == 0x12 || max3421_hcd->rev == 0x13)
  1220. break;
  1221. dev_err(&spi->dev, "bad rev 0x%02x", max3421_hcd->rev);
  1222. msleep(10000);
  1223. }
  1224. dev_info(&spi->dev, "rev 0x%x, SPI clk %dHz, bpw %u, irq %d\n",
  1225. max3421_hcd->rev, spi->max_speed_hz, spi->bits_per_word,
  1226. spi->irq);
  1227. while (!kthread_should_stop()) {
  1228. if (!i_worked) {
  1229. /*
  1230. * We'll be waiting for wakeups from the hard
  1231. * interrupt handler, so now is a good time to
  1232. * sync our hien with the chip:
  1233. */
  1234. spi_wr8(hcd, MAX3421_REG_HIEN, max3421_hcd->hien);
  1235. set_current_state(TASK_INTERRUPTIBLE);
  1236. if (test_and_clear_bit(ENABLE_IRQ, &max3421_hcd->todo))
  1237. enable_irq(spi->irq);
  1238. schedule();
  1239. __set_current_state(TASK_RUNNING);
  1240. }
  1241. i_worked = 0;
  1242. if (max3421_hcd->urb_done)
  1243. i_worked |= max3421_urb_done(hcd);
  1244. else if (max3421_handle_irqs(hcd))
  1245. i_worked = 1;
  1246. else if (!max3421_hcd->curr_urb)
  1247. i_worked |= max3421_select_and_start_urb(hcd);
  1248. if (test_and_clear_bit(RESET_HCD, &max3421_hcd->todo))
  1249. /* reset the HCD: */
  1250. i_worked |= max3421_reset_hcd(hcd);
  1251. if (test_and_clear_bit(RESET_PORT, &max3421_hcd->todo)) {
  1252. /* perform a USB bus reset: */
  1253. spi_wr8(hcd, MAX3421_REG_HCTL,
  1254. BIT(MAX3421_HCTL_BUSRST_BIT));
  1255. i_worked = 1;
  1256. }
  1257. if (test_and_clear_bit(CHECK_UNLINK, &max3421_hcd->todo))
  1258. i_worked |= max3421_check_unlink(hcd);
  1259. if (test_and_clear_bit(IOPIN_UPDATE, &max3421_hcd->todo)) {
  1260. /*
  1261. * IOPINS1/IOPINS2 do not auto-increment, so we can't
  1262. * use spi_wr_buf().
  1263. */
  1264. for (i = 0; i < ARRAY_SIZE(max3421_hcd->iopins); ++i) {
  1265. u8 val = spi_rd8(hcd, MAX3421_REG_IOPINS1);
  1266. val = ((val & 0xf0) |
  1267. (max3421_hcd->iopins[i] & 0x0f));
  1268. spi_wr8(hcd, MAX3421_REG_IOPINS1 + i, val);
  1269. max3421_hcd->iopins[i] = val;
  1270. }
  1271. i_worked = 1;
  1272. }
  1273. }
  1274. set_current_state(TASK_RUNNING);
  1275. dev_info(&spi->dev, "SPI thread exiting");
  1276. return 0;
  1277. }
  1278. static int
  1279. max3421_reset_port(struct usb_hcd *hcd)
  1280. {
  1281. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1282. max3421_hcd->port_status &= ~(USB_PORT_STAT_ENABLE |
  1283. USB_PORT_STAT_LOW_SPEED);
  1284. max3421_hcd->port_status |= USB_PORT_STAT_RESET;
  1285. set_bit(RESET_PORT, &max3421_hcd->todo);
  1286. wake_up_process(max3421_hcd->spi_thread);
  1287. return 0;
  1288. }
  1289. static int
  1290. max3421_reset(struct usb_hcd *hcd)
  1291. {
  1292. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1293. hcd->self.sg_tablesize = 0;
  1294. hcd->speed = HCD_USB2;
  1295. hcd->self.root_hub->speed = USB_SPEED_FULL;
  1296. set_bit(RESET_HCD, &max3421_hcd->todo);
  1297. wake_up_process(max3421_hcd->spi_thread);
  1298. return 0;
  1299. }
  1300. static int
  1301. max3421_start(struct usb_hcd *hcd)
  1302. {
  1303. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1304. spin_lock_init(&max3421_hcd->lock);
  1305. max3421_hcd->rh_state = MAX3421_RH_RUNNING;
  1306. INIT_LIST_HEAD(&max3421_hcd->ep_list);
  1307. hcd->power_budget = POWER_BUDGET;
  1308. hcd->state = HC_STATE_RUNNING;
  1309. hcd->uses_new_polling = 1;
  1310. return 0;
  1311. }
  1312. static void
  1313. max3421_stop(struct usb_hcd *hcd)
  1314. {
  1315. }
  1316. static int
  1317. max3421_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
  1318. {
  1319. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1320. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1321. struct max3421_ep *max3421_ep;
  1322. unsigned long flags;
  1323. int retval;
  1324. switch (usb_pipetype(urb->pipe)) {
  1325. case PIPE_INTERRUPT:
  1326. case PIPE_ISOCHRONOUS:
  1327. if (urb->interval < 0) {
  1328. dev_err(&spi->dev,
  1329. "%s: interval=%d for intr-/iso-pipe; expected > 0\n",
  1330. __func__, urb->interval);
  1331. return -EINVAL;
  1332. }
  1333. default:
  1334. break;
  1335. }
  1336. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1337. max3421_ep = urb->ep->hcpriv;
  1338. if (!max3421_ep) {
  1339. /* gets freed in max3421_endpoint_disable: */
  1340. max3421_ep = kzalloc(sizeof(struct max3421_ep), GFP_ATOMIC);
  1341. if (!max3421_ep) {
  1342. retval = -ENOMEM;
  1343. goto out;
  1344. }
  1345. max3421_ep->ep = urb->ep;
  1346. max3421_ep->last_active = max3421_hcd->frame_number;
  1347. urb->ep->hcpriv = max3421_ep;
  1348. list_add_tail(&max3421_ep->ep_list, &max3421_hcd->ep_list);
  1349. }
  1350. retval = usb_hcd_link_urb_to_ep(hcd, urb);
  1351. if (retval == 0) {
  1352. /* Since we added to the queue, restart scheduling: */
  1353. max3421_hcd->sched_pass = SCHED_PASS_PERIODIC;
  1354. wake_up_process(max3421_hcd->spi_thread);
  1355. }
  1356. out:
  1357. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1358. return retval;
  1359. }
  1360. static int
  1361. max3421_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
  1362. {
  1363. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1364. unsigned long flags;
  1365. int retval;
  1366. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1367. /*
  1368. * This will set urb->unlinked which in turn causes the entry
  1369. * to be dropped at the next opportunity.
  1370. */
  1371. retval = usb_hcd_check_unlink_urb(hcd, urb, status);
  1372. if (retval == 0) {
  1373. set_bit(CHECK_UNLINK, &max3421_hcd->todo);
  1374. wake_up_process(max3421_hcd->spi_thread);
  1375. }
  1376. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1377. return retval;
  1378. }
  1379. static void
  1380. max3421_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
  1381. {
  1382. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1383. unsigned long flags;
  1384. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1385. if (ep->hcpriv) {
  1386. struct max3421_ep *max3421_ep = ep->hcpriv;
  1387. /* remove myself from the ep_list: */
  1388. if (!list_empty(&max3421_ep->ep_list))
  1389. list_del(&max3421_ep->ep_list);
  1390. kfree(max3421_ep);
  1391. ep->hcpriv = NULL;
  1392. }
  1393. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1394. }
  1395. static int
  1396. max3421_get_frame_number(struct usb_hcd *hcd)
  1397. {
  1398. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1399. return max3421_hcd->frame_number;
  1400. }
  1401. /*
  1402. * Should return a non-zero value when any port is undergoing a resume
  1403. * transition while the root hub is suspended.
  1404. */
  1405. static int
  1406. max3421_hub_status_data(struct usb_hcd *hcd, char *buf)
  1407. {
  1408. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1409. unsigned long flags;
  1410. int retval = 0;
  1411. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1412. if (!HCD_HW_ACCESSIBLE(hcd))
  1413. goto done;
  1414. *buf = 0;
  1415. if ((max3421_hcd->port_status & PORT_C_MASK) != 0) {
  1416. *buf = (1 << 1); /* a hub over-current condition exists */
  1417. dev_dbg(hcd->self.controller,
  1418. "port status 0x%08x has changes\n",
  1419. max3421_hcd->port_status);
  1420. retval = 1;
  1421. if (max3421_hcd->rh_state == MAX3421_RH_SUSPENDED)
  1422. usb_hcd_resume_root_hub(hcd);
  1423. }
  1424. done:
  1425. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1426. return retval;
  1427. }
  1428. static inline void
  1429. hub_descriptor(struct usb_hub_descriptor *desc)
  1430. {
  1431. memset(desc, 0, sizeof(*desc));
  1432. /*
  1433. * See Table 11-13: Hub Descriptor in USB 2.0 spec.
  1434. */
  1435. desc->bDescriptorType = USB_DT_HUB; /* hub descriptor */
  1436. desc->bDescLength = 9;
  1437. desc->wHubCharacteristics = cpu_to_le16(HUB_CHAR_INDV_PORT_LPSM |
  1438. HUB_CHAR_COMMON_OCPM);
  1439. desc->bNbrPorts = 1;
  1440. }
  1441. /*
  1442. * Set the MAX3421E general-purpose output with number PIN_NUMBER to
  1443. * VALUE (0 or 1). PIN_NUMBER may be in the range from 1-8. For
  1444. * any other value, this function acts as a no-op.
  1445. */
  1446. static void
  1447. max3421_gpout_set_value(struct usb_hcd *hcd, u8 pin_number, u8 value)
  1448. {
  1449. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1450. u8 mask, idx;
  1451. --pin_number;
  1452. if (pin_number > 7)
  1453. return;
  1454. mask = 1u << (pin_number % 4);
  1455. idx = pin_number / 4;
  1456. if (value)
  1457. max3421_hcd->iopins[idx] |= mask;
  1458. else
  1459. max3421_hcd->iopins[idx] &= ~mask;
  1460. set_bit(IOPIN_UPDATE, &max3421_hcd->todo);
  1461. wake_up_process(max3421_hcd->spi_thread);
  1462. }
  1463. static int
  1464. max3421_hub_control(struct usb_hcd *hcd, u16 type_req, u16 value, u16 index,
  1465. char *buf, u16 length)
  1466. {
  1467. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1468. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1469. struct max3421_hcd_platform_data *pdata;
  1470. unsigned long flags;
  1471. int retval = 0;
  1472. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1473. pdata = spi->dev.platform_data;
  1474. switch (type_req) {
  1475. case ClearHubFeature:
  1476. break;
  1477. case ClearPortFeature:
  1478. switch (value) {
  1479. case USB_PORT_FEAT_SUSPEND:
  1480. break;
  1481. case USB_PORT_FEAT_POWER:
  1482. dev_dbg(hcd->self.controller, "power-off\n");
  1483. max3421_gpout_set_value(hcd, pdata->vbus_gpout,
  1484. !pdata->vbus_active_level);
  1485. /* FALLS THROUGH */
  1486. default:
  1487. max3421_hcd->port_status &= ~(1 << value);
  1488. }
  1489. break;
  1490. case GetHubDescriptor:
  1491. hub_descriptor((struct usb_hub_descriptor *) buf);
  1492. break;
  1493. case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
  1494. case GetPortErrorCount:
  1495. case SetHubDepth:
  1496. /* USB3 only */
  1497. goto error;
  1498. case GetHubStatus:
  1499. *(__le32 *) buf = cpu_to_le32(0);
  1500. break;
  1501. case GetPortStatus:
  1502. if (index != 1) {
  1503. retval = -EPIPE;
  1504. goto error;
  1505. }
  1506. ((__le16 *) buf)[0] = cpu_to_le16(max3421_hcd->port_status);
  1507. ((__le16 *) buf)[1] =
  1508. cpu_to_le16(max3421_hcd->port_status >> 16);
  1509. break;
  1510. case SetHubFeature:
  1511. retval = -EPIPE;
  1512. break;
  1513. case SetPortFeature:
  1514. switch (value) {
  1515. case USB_PORT_FEAT_LINK_STATE:
  1516. case USB_PORT_FEAT_U1_TIMEOUT:
  1517. case USB_PORT_FEAT_U2_TIMEOUT:
  1518. case USB_PORT_FEAT_BH_PORT_RESET:
  1519. goto error;
  1520. case USB_PORT_FEAT_SUSPEND:
  1521. if (max3421_hcd->active)
  1522. max3421_hcd->port_status |=
  1523. USB_PORT_STAT_SUSPEND;
  1524. break;
  1525. case USB_PORT_FEAT_POWER:
  1526. dev_dbg(hcd->self.controller, "power-on\n");
  1527. max3421_hcd->port_status |= USB_PORT_STAT_POWER;
  1528. max3421_gpout_set_value(hcd, pdata->vbus_gpout,
  1529. pdata->vbus_active_level);
  1530. break;
  1531. case USB_PORT_FEAT_RESET:
  1532. max3421_reset_port(hcd);
  1533. /* FALLS THROUGH */
  1534. default:
  1535. if ((max3421_hcd->port_status & USB_PORT_STAT_POWER)
  1536. != 0)
  1537. max3421_hcd->port_status |= (1 << value);
  1538. }
  1539. break;
  1540. default:
  1541. dev_dbg(hcd->self.controller,
  1542. "hub control req%04x v%04x i%04x l%d\n",
  1543. type_req, value, index, length);
  1544. error: /* "protocol stall" on error */
  1545. retval = -EPIPE;
  1546. }
  1547. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1548. return retval;
  1549. }
  1550. static int
  1551. max3421_bus_suspend(struct usb_hcd *hcd)
  1552. {
  1553. return -1;
  1554. }
  1555. static int
  1556. max3421_bus_resume(struct usb_hcd *hcd)
  1557. {
  1558. return -1;
  1559. }
  1560. /*
  1561. * The SPI driver already takes care of DMA-mapping/unmapping, so no
  1562. * reason to do it twice.
  1563. */
  1564. static int
  1565. max3421_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
  1566. {
  1567. return 0;
  1568. }
  1569. static void
  1570. max3421_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb)
  1571. {
  1572. }
  1573. static struct hc_driver max3421_hcd_desc = {
  1574. .description = "max3421",
  1575. .product_desc = DRIVER_DESC,
  1576. .hcd_priv_size = sizeof(struct max3421_hcd),
  1577. .flags = HCD_USB11,
  1578. .reset = max3421_reset,
  1579. .start = max3421_start,
  1580. .stop = max3421_stop,
  1581. .get_frame_number = max3421_get_frame_number,
  1582. .urb_enqueue = max3421_urb_enqueue,
  1583. .urb_dequeue = max3421_urb_dequeue,
  1584. .map_urb_for_dma = max3421_map_urb_for_dma,
  1585. .unmap_urb_for_dma = max3421_unmap_urb_for_dma,
  1586. .endpoint_disable = max3421_endpoint_disable,
  1587. .hub_status_data = max3421_hub_status_data,
  1588. .hub_control = max3421_hub_control,
  1589. .bus_suspend = max3421_bus_suspend,
  1590. .bus_resume = max3421_bus_resume,
  1591. };
  1592. static int
  1593. max3421_probe(struct spi_device *spi)
  1594. {
  1595. struct max3421_hcd *max3421_hcd;
  1596. struct usb_hcd *hcd = NULL;
  1597. int retval = -ENOMEM;
  1598. if (spi_setup(spi) < 0) {
  1599. dev_err(&spi->dev, "Unable to setup SPI bus");
  1600. return -EFAULT;
  1601. }
  1602. hcd = usb_create_hcd(&max3421_hcd_desc, &spi->dev,
  1603. dev_name(&spi->dev));
  1604. if (!hcd) {
  1605. dev_err(&spi->dev, "failed to create HCD structure\n");
  1606. goto error;
  1607. }
  1608. set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
  1609. max3421_hcd = hcd_to_max3421(hcd);
  1610. max3421_hcd->next = max3421_hcd_list;
  1611. max3421_hcd_list = max3421_hcd;
  1612. INIT_LIST_HEAD(&max3421_hcd->ep_list);
  1613. max3421_hcd->tx = kmalloc(sizeof(*max3421_hcd->tx), GFP_KERNEL);
  1614. if (!max3421_hcd->tx)
  1615. goto error;
  1616. max3421_hcd->rx = kmalloc(sizeof(*max3421_hcd->rx), GFP_KERNEL);
  1617. if (!max3421_hcd->rx)
  1618. goto error;
  1619. max3421_hcd->spi_thread = kthread_run(max3421_spi_thread, hcd,
  1620. "max3421_spi_thread");
  1621. if (max3421_hcd->spi_thread == ERR_PTR(-ENOMEM)) {
  1622. dev_err(&spi->dev,
  1623. "failed to create SPI thread (out of memory)\n");
  1624. goto error;
  1625. }
  1626. retval = usb_add_hcd(hcd, 0, 0);
  1627. if (retval) {
  1628. dev_err(&spi->dev, "failed to add HCD\n");
  1629. goto error;
  1630. }
  1631. retval = request_irq(spi->irq, max3421_irq_handler,
  1632. IRQF_TRIGGER_LOW, "max3421", hcd);
  1633. if (retval < 0) {
  1634. dev_err(&spi->dev, "failed to request irq %d\n", spi->irq);
  1635. goto error;
  1636. }
  1637. return 0;
  1638. error:
  1639. if (hcd) {
  1640. kfree(max3421_hcd->tx);
  1641. kfree(max3421_hcd->rx);
  1642. if (max3421_hcd->spi_thread)
  1643. kthread_stop(max3421_hcd->spi_thread);
  1644. usb_put_hcd(hcd);
  1645. }
  1646. return retval;
  1647. }
  1648. static int
  1649. max3421_remove(struct spi_device *spi)
  1650. {
  1651. struct max3421_hcd *max3421_hcd = NULL, **prev;
  1652. struct usb_hcd *hcd = NULL;
  1653. unsigned long flags;
  1654. for (prev = &max3421_hcd_list; *prev; prev = &(*prev)->next) {
  1655. max3421_hcd = *prev;
  1656. hcd = max3421_to_hcd(max3421_hcd);
  1657. if (hcd->self.controller == &spi->dev)
  1658. break;
  1659. }
  1660. if (!max3421_hcd) {
  1661. dev_err(&spi->dev, "no MAX3421 HCD found for SPI device %p\n",
  1662. spi);
  1663. return -ENODEV;
  1664. }
  1665. usb_remove_hcd(hcd);
  1666. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1667. kthread_stop(max3421_hcd->spi_thread);
  1668. *prev = max3421_hcd->next;
  1669. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1670. free_irq(spi->irq, hcd);
  1671. usb_put_hcd(hcd);
  1672. return 0;
  1673. }
  1674. static struct spi_driver max3421_driver = {
  1675. .probe = max3421_probe,
  1676. .remove = max3421_remove,
  1677. .driver = {
  1678. .name = "max3421-hcd",
  1679. },
  1680. };
  1681. module_spi_driver(max3421_driver);
  1682. MODULE_DESCRIPTION(DRIVER_DESC);
  1683. MODULE_AUTHOR("David Mosberger <davidm@egauge.net>");
  1684. MODULE_LICENSE("GPL");