ehci-dbg.c 28 KB

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  1. /*
  2. * Copyright (c) 2001-2002 by David Brownell
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the
  6. * Free Software Foundation; either version 2 of the License, or (at your
  7. * option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  12. * for more details.
  13. *
  14. */
  15. /* this file is part of ehci-hcd.c */
  16. #ifdef CONFIG_DYNAMIC_DEBUG
  17. /*
  18. * check the values in the HCSPARAMS register
  19. * (host controller _Structural_ parameters)
  20. * see EHCI spec, Table 2-4 for each value
  21. */
  22. static void dbg_hcs_params(struct ehci_hcd *ehci, char *label)
  23. {
  24. u32 params = ehci_readl(ehci, &ehci->caps->hcs_params);
  25. ehci_dbg(ehci,
  26. "%s hcs_params 0x%x dbg=%d%s cc=%d pcc=%d%s%s ports=%d\n",
  27. label, params,
  28. HCS_DEBUG_PORT(params),
  29. HCS_INDICATOR(params) ? " ind" : "",
  30. HCS_N_CC(params),
  31. HCS_N_PCC(params),
  32. HCS_PORTROUTED(params) ? "" : " ordered",
  33. HCS_PPC(params) ? "" : " !ppc",
  34. HCS_N_PORTS(params));
  35. /* Port routing, per EHCI 0.95 Spec, Section 2.2.5 */
  36. if (HCS_PORTROUTED(params)) {
  37. int i;
  38. char buf[46], tmp[7], byte;
  39. buf[0] = 0;
  40. for (i = 0; i < HCS_N_PORTS(params); i++) {
  41. /* FIXME MIPS won't readb() ... */
  42. byte = readb(&ehci->caps->portroute[(i >> 1)]);
  43. sprintf(tmp, "%d ",
  44. (i & 0x1) ? byte & 0xf : (byte >> 4) & 0xf);
  45. strcat(buf, tmp);
  46. }
  47. ehci_dbg(ehci, "%s portroute %s\n", label, buf);
  48. }
  49. }
  50. /*
  51. * check the values in the HCCPARAMS register
  52. * (host controller _Capability_ parameters)
  53. * see EHCI Spec, Table 2-5 for each value
  54. */
  55. static void dbg_hcc_params(struct ehci_hcd *ehci, char *label)
  56. {
  57. u32 params = ehci_readl(ehci, &ehci->caps->hcc_params);
  58. if (HCC_ISOC_CACHE(params)) {
  59. ehci_dbg(ehci,
  60. "%s hcc_params %04x caching frame %s%s%s\n",
  61. label, params,
  62. HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024",
  63. HCC_CANPARK(params) ? " park" : "",
  64. HCC_64BIT_ADDR(params) ? " 64 bit addr" : "");
  65. } else {
  66. ehci_dbg(ehci,
  67. "%s hcc_params %04x thresh %d uframes %s%s%s%s%s%s%s\n",
  68. label,
  69. params,
  70. HCC_ISOC_THRES(params),
  71. HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024",
  72. HCC_CANPARK(params) ? " park" : "",
  73. HCC_64BIT_ADDR(params) ? " 64 bit addr" : "",
  74. HCC_LPM(params) ? " LPM" : "",
  75. HCC_PER_PORT_CHANGE_EVENT(params) ? " ppce" : "",
  76. HCC_HW_PREFETCH(params) ? " hw prefetch" : "",
  77. HCC_32FRAME_PERIODIC_LIST(params) ?
  78. " 32 periodic list" : "");
  79. }
  80. }
  81. static void __maybe_unused
  82. dbg_qtd(const char *label, struct ehci_hcd *ehci, struct ehci_qtd *qtd)
  83. {
  84. ehci_dbg(ehci, "%s td %p n%08x %08x t%08x p0=%08x\n", label, qtd,
  85. hc32_to_cpup(ehci, &qtd->hw_next),
  86. hc32_to_cpup(ehci, &qtd->hw_alt_next),
  87. hc32_to_cpup(ehci, &qtd->hw_token),
  88. hc32_to_cpup(ehci, &qtd->hw_buf[0]));
  89. if (qtd->hw_buf[1])
  90. ehci_dbg(ehci, " p1=%08x p2=%08x p3=%08x p4=%08x\n",
  91. hc32_to_cpup(ehci, &qtd->hw_buf[1]),
  92. hc32_to_cpup(ehci, &qtd->hw_buf[2]),
  93. hc32_to_cpup(ehci, &qtd->hw_buf[3]),
  94. hc32_to_cpup(ehci, &qtd->hw_buf[4]));
  95. }
  96. static void __maybe_unused
  97. dbg_qh(const char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
  98. {
  99. struct ehci_qh_hw *hw = qh->hw;
  100. ehci_dbg(ehci, "%s qh %p n%08x info %x %x qtd %x\n", label,
  101. qh, hw->hw_next, hw->hw_info1, hw->hw_info2, hw->hw_current);
  102. dbg_qtd("overlay", ehci, (struct ehci_qtd *) &hw->hw_qtd_next);
  103. }
  104. static void __maybe_unused
  105. dbg_itd(const char *label, struct ehci_hcd *ehci, struct ehci_itd *itd)
  106. {
  107. ehci_dbg(ehci, "%s [%d] itd %p, next %08x, urb %p\n",
  108. label, itd->frame, itd, hc32_to_cpu(ehci, itd->hw_next),
  109. itd->urb);
  110. ehci_dbg(ehci,
  111. " trans: %08x %08x %08x %08x %08x %08x %08x %08x\n",
  112. hc32_to_cpu(ehci, itd->hw_transaction[0]),
  113. hc32_to_cpu(ehci, itd->hw_transaction[1]),
  114. hc32_to_cpu(ehci, itd->hw_transaction[2]),
  115. hc32_to_cpu(ehci, itd->hw_transaction[3]),
  116. hc32_to_cpu(ehci, itd->hw_transaction[4]),
  117. hc32_to_cpu(ehci, itd->hw_transaction[5]),
  118. hc32_to_cpu(ehci, itd->hw_transaction[6]),
  119. hc32_to_cpu(ehci, itd->hw_transaction[7]));
  120. ehci_dbg(ehci,
  121. " buf: %08x %08x %08x %08x %08x %08x %08x\n",
  122. hc32_to_cpu(ehci, itd->hw_bufp[0]),
  123. hc32_to_cpu(ehci, itd->hw_bufp[1]),
  124. hc32_to_cpu(ehci, itd->hw_bufp[2]),
  125. hc32_to_cpu(ehci, itd->hw_bufp[3]),
  126. hc32_to_cpu(ehci, itd->hw_bufp[4]),
  127. hc32_to_cpu(ehci, itd->hw_bufp[5]),
  128. hc32_to_cpu(ehci, itd->hw_bufp[6]));
  129. ehci_dbg(ehci, " index: %d %d %d %d %d %d %d %d\n",
  130. itd->index[0], itd->index[1], itd->index[2],
  131. itd->index[3], itd->index[4], itd->index[5],
  132. itd->index[6], itd->index[7]);
  133. }
  134. static void __maybe_unused
  135. dbg_sitd(const char *label, struct ehci_hcd *ehci, struct ehci_sitd *sitd)
  136. {
  137. ehci_dbg(ehci, "%s [%d] sitd %p, next %08x, urb %p\n",
  138. label, sitd->frame, sitd, hc32_to_cpu(ehci, sitd->hw_next),
  139. sitd->urb);
  140. ehci_dbg(ehci,
  141. " addr %08x sched %04x result %08x buf %08x %08x\n",
  142. hc32_to_cpu(ehci, sitd->hw_fullspeed_ep),
  143. hc32_to_cpu(ehci, sitd->hw_uframe),
  144. hc32_to_cpu(ehci, sitd->hw_results),
  145. hc32_to_cpu(ehci, sitd->hw_buf[0]),
  146. hc32_to_cpu(ehci, sitd->hw_buf[1]));
  147. }
  148. static int __maybe_unused
  149. dbg_status_buf(char *buf, unsigned len, const char *label, u32 status)
  150. {
  151. return scnprintf(buf, len,
  152. "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s%s",
  153. label, label[0] ? " " : "", status,
  154. (status & STS_PPCE_MASK) ? " PPCE" : "",
  155. (status & STS_ASS) ? " Async" : "",
  156. (status & STS_PSS) ? " Periodic" : "",
  157. (status & STS_RECL) ? " Recl" : "",
  158. (status & STS_HALT) ? " Halt" : "",
  159. (status & STS_IAA) ? " IAA" : "",
  160. (status & STS_FATAL) ? " FATAL" : "",
  161. (status & STS_FLR) ? " FLR" : "",
  162. (status & STS_PCD) ? " PCD" : "",
  163. (status & STS_ERR) ? " ERR" : "",
  164. (status & STS_INT) ? " INT" : "");
  165. }
  166. static int __maybe_unused
  167. dbg_intr_buf(char *buf, unsigned len, const char *label, u32 enable)
  168. {
  169. return scnprintf(buf, len,
  170. "%s%sintrenable %02x%s%s%s%s%s%s%s",
  171. label, label[0] ? " " : "", enable,
  172. (enable & STS_PPCE_MASK) ? " PPCE" : "",
  173. (enable & STS_IAA) ? " IAA" : "",
  174. (enable & STS_FATAL) ? " FATAL" : "",
  175. (enable & STS_FLR) ? " FLR" : "",
  176. (enable & STS_PCD) ? " PCD" : "",
  177. (enable & STS_ERR) ? " ERR" : "",
  178. (enable & STS_INT) ? " INT" : "");
  179. }
  180. static const char *const fls_strings[] = { "1024", "512", "256", "??" };
  181. static int
  182. dbg_command_buf(char *buf, unsigned len, const char *label, u32 command)
  183. {
  184. return scnprintf(buf, len,
  185. "%s%scommand %07x %s%s%s%s%s%s=%d ithresh=%d%s%s%s%s "
  186. "period=%s%s %s",
  187. label, label[0] ? " " : "", command,
  188. (command & CMD_HIRD) ? " HIRD" : "",
  189. (command & CMD_PPCEE) ? " PPCEE" : "",
  190. (command & CMD_FSP) ? " FSP" : "",
  191. (command & CMD_ASPE) ? " ASPE" : "",
  192. (command & CMD_PSPE) ? " PSPE" : "",
  193. (command & CMD_PARK) ? " park" : "(park)",
  194. CMD_PARK_CNT(command),
  195. (command >> 16) & 0x3f,
  196. (command & CMD_LRESET) ? " LReset" : "",
  197. (command & CMD_IAAD) ? " IAAD" : "",
  198. (command & CMD_ASE) ? " Async" : "",
  199. (command & CMD_PSE) ? " Periodic" : "",
  200. fls_strings[(command >> 2) & 0x3],
  201. (command & CMD_RESET) ? " Reset" : "",
  202. (command & CMD_RUN) ? "RUN" : "HALT");
  203. }
  204. static int
  205. dbg_port_buf(char *buf, unsigned len, const char *label, int port, u32 status)
  206. {
  207. char *sig;
  208. /* signaling state */
  209. switch (status & (3 << 10)) {
  210. case 0 << 10:
  211. sig = "se0";
  212. break;
  213. case 1 << 10: /* low speed */
  214. sig = "k";
  215. break;
  216. case 2 << 10:
  217. sig = "j";
  218. break;
  219. default:
  220. sig = "?";
  221. break;
  222. }
  223. return scnprintf(buf, len,
  224. "%s%sport:%d status %06x %d %s%s%s%s%s%s "
  225. "sig=%s%s%s%s%s%s%s%s%s%s%s",
  226. label, label[0] ? " " : "", port, status,
  227. status >> 25, /*device address */
  228. (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_ACK ?
  229. " ACK" : "",
  230. (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_NYET ?
  231. " NYET" : "",
  232. (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_STALL ?
  233. " STALL" : "",
  234. (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_ERR ?
  235. " ERR" : "",
  236. (status & PORT_POWER) ? " POWER" : "",
  237. (status & PORT_OWNER) ? " OWNER" : "",
  238. sig,
  239. (status & PORT_LPM) ? " LPM" : "",
  240. (status & PORT_RESET) ? " RESET" : "",
  241. (status & PORT_SUSPEND) ? " SUSPEND" : "",
  242. (status & PORT_RESUME) ? " RESUME" : "",
  243. (status & PORT_OCC) ? " OCC" : "",
  244. (status & PORT_OC) ? " OC" : "",
  245. (status & PORT_PEC) ? " PEC" : "",
  246. (status & PORT_PE) ? " PE" : "",
  247. (status & PORT_CSC) ? " CSC" : "",
  248. (status & PORT_CONNECT) ? " CONNECT" : "");
  249. }
  250. static inline void
  251. dbg_status(struct ehci_hcd *ehci, const char *label, u32 status)
  252. {
  253. char buf[80];
  254. dbg_status_buf(buf, sizeof(buf), label, status);
  255. ehci_dbg(ehci, "%s\n", buf);
  256. }
  257. static inline void
  258. dbg_cmd(struct ehci_hcd *ehci, const char *label, u32 command)
  259. {
  260. char buf[80];
  261. dbg_command_buf(buf, sizeof(buf), label, command);
  262. ehci_dbg(ehci, "%s\n", buf);
  263. }
  264. static inline void
  265. dbg_port(struct ehci_hcd *ehci, const char *label, int port, u32 status)
  266. {
  267. char buf[80];
  268. dbg_port_buf(buf, sizeof(buf), label, port, status);
  269. ehci_dbg(ehci, "%s\n", buf);
  270. }
  271. /*-------------------------------------------------------------------------*/
  272. /* troubleshooting help: expose state in debugfs */
  273. static int debug_async_open(struct inode *, struct file *);
  274. static int debug_bandwidth_open(struct inode *, struct file *);
  275. static int debug_periodic_open(struct inode *, struct file *);
  276. static int debug_registers_open(struct inode *, struct file *);
  277. static ssize_t debug_output(struct file*, char __user*, size_t, loff_t*);
  278. static int debug_close(struct inode *, struct file *);
  279. static const struct file_operations debug_async_fops = {
  280. .owner = THIS_MODULE,
  281. .open = debug_async_open,
  282. .read = debug_output,
  283. .release = debug_close,
  284. .llseek = default_llseek,
  285. };
  286. static const struct file_operations debug_bandwidth_fops = {
  287. .owner = THIS_MODULE,
  288. .open = debug_bandwidth_open,
  289. .read = debug_output,
  290. .release = debug_close,
  291. .llseek = default_llseek,
  292. };
  293. static const struct file_operations debug_periodic_fops = {
  294. .owner = THIS_MODULE,
  295. .open = debug_periodic_open,
  296. .read = debug_output,
  297. .release = debug_close,
  298. .llseek = default_llseek,
  299. };
  300. static const struct file_operations debug_registers_fops = {
  301. .owner = THIS_MODULE,
  302. .open = debug_registers_open,
  303. .read = debug_output,
  304. .release = debug_close,
  305. .llseek = default_llseek,
  306. };
  307. static struct dentry *ehci_debug_root;
  308. struct debug_buffer {
  309. ssize_t (*fill_func)(struct debug_buffer *); /* fill method */
  310. struct usb_bus *bus;
  311. struct mutex mutex; /* protect filling of buffer */
  312. size_t count; /* number of characters filled into buffer */
  313. char *output_buf;
  314. size_t alloc_size;
  315. };
  316. static inline char speed_char(u32 info1)
  317. {
  318. switch (info1 & (3 << 12)) {
  319. case QH_FULL_SPEED:
  320. return 'f';
  321. case QH_LOW_SPEED:
  322. return 'l';
  323. case QH_HIGH_SPEED:
  324. return 'h';
  325. default:
  326. return '?';
  327. }
  328. }
  329. static inline char token_mark(struct ehci_hcd *ehci, __hc32 token)
  330. {
  331. __u32 v = hc32_to_cpu(ehci, token);
  332. if (v & QTD_STS_ACTIVE)
  333. return '*';
  334. if (v & QTD_STS_HALT)
  335. return '-';
  336. if (!IS_SHORT_READ(v))
  337. return ' ';
  338. /* tries to advance through hw_alt_next */
  339. return '/';
  340. }
  341. static void qh_lines(struct ehci_hcd *ehci, struct ehci_qh *qh,
  342. char **nextp, unsigned *sizep)
  343. {
  344. u32 scratch;
  345. u32 hw_curr;
  346. struct list_head *entry;
  347. struct ehci_qtd *td;
  348. unsigned temp;
  349. unsigned size = *sizep;
  350. char *next = *nextp;
  351. char mark;
  352. __le32 list_end = EHCI_LIST_END(ehci);
  353. struct ehci_qh_hw *hw = qh->hw;
  354. if (hw->hw_qtd_next == list_end) /* NEC does this */
  355. mark = '@';
  356. else
  357. mark = token_mark(ehci, hw->hw_token);
  358. if (mark == '/') { /* qh_alt_next controls qh advance? */
  359. if ((hw->hw_alt_next & QTD_MASK(ehci))
  360. == ehci->async->hw->hw_alt_next)
  361. mark = '#'; /* blocked */
  362. else if (hw->hw_alt_next == list_end)
  363. mark = '.'; /* use hw_qtd_next */
  364. /* else alt_next points to some other qtd */
  365. }
  366. scratch = hc32_to_cpup(ehci, &hw->hw_info1);
  367. hw_curr = (mark == '*') ? hc32_to_cpup(ehci, &hw->hw_current) : 0;
  368. temp = scnprintf(next, size,
  369. "qh/%p dev%d %cs ep%d %08x %08x (%08x%c %s nak%d)"
  370. " [cur %08x next %08x buf[0] %08x]",
  371. qh, scratch & 0x007f,
  372. speed_char (scratch),
  373. (scratch >> 8) & 0x000f,
  374. scratch, hc32_to_cpup(ehci, &hw->hw_info2),
  375. hc32_to_cpup(ehci, &hw->hw_token), mark,
  376. (cpu_to_hc32(ehci, QTD_TOGGLE) & hw->hw_token)
  377. ? "data1" : "data0",
  378. (hc32_to_cpup(ehci, &hw->hw_alt_next) >> 1) & 0x0f,
  379. hc32_to_cpup(ehci, &hw->hw_current),
  380. hc32_to_cpup(ehci, &hw->hw_qtd_next),
  381. hc32_to_cpup(ehci, &hw->hw_buf[0]));
  382. size -= temp;
  383. next += temp;
  384. /* hc may be modifying the list as we read it ... */
  385. list_for_each(entry, &qh->qtd_list) {
  386. char *type;
  387. td = list_entry(entry, struct ehci_qtd, qtd_list);
  388. scratch = hc32_to_cpup(ehci, &td->hw_token);
  389. mark = ' ';
  390. if (hw_curr == td->qtd_dma) {
  391. mark = '*';
  392. } else if (hw->hw_qtd_next == cpu_to_hc32(ehci, td->qtd_dma)) {
  393. mark = '+';
  394. } else if (QTD_LENGTH(scratch)) {
  395. if (td->hw_alt_next == ehci->async->hw->hw_alt_next)
  396. mark = '#';
  397. else if (td->hw_alt_next != list_end)
  398. mark = '/';
  399. }
  400. switch ((scratch >> 8) & 0x03) {
  401. case 0:
  402. type = "out";
  403. break;
  404. case 1:
  405. type = "in";
  406. break;
  407. case 2:
  408. type = "setup";
  409. break;
  410. default:
  411. type = "?";
  412. break;
  413. }
  414. temp = scnprintf(next, size,
  415. "\n\t%p%c%s len=%d %08x urb %p"
  416. " [td %08x buf[0] %08x]",
  417. td, mark, type,
  418. (scratch >> 16) & 0x7fff,
  419. scratch,
  420. td->urb,
  421. (u32) td->qtd_dma,
  422. hc32_to_cpup(ehci, &td->hw_buf[0]));
  423. size -= temp;
  424. next += temp;
  425. if (temp == size)
  426. goto done;
  427. }
  428. temp = scnprintf(next, size, "\n");
  429. size -= temp;
  430. next += temp;
  431. done:
  432. *sizep = size;
  433. *nextp = next;
  434. }
  435. static ssize_t fill_async_buffer(struct debug_buffer *buf)
  436. {
  437. struct usb_hcd *hcd;
  438. struct ehci_hcd *ehci;
  439. unsigned long flags;
  440. unsigned temp, size;
  441. char *next;
  442. struct ehci_qh *qh;
  443. hcd = bus_to_hcd(buf->bus);
  444. ehci = hcd_to_ehci(hcd);
  445. next = buf->output_buf;
  446. size = buf->alloc_size;
  447. *next = 0;
  448. /*
  449. * dumps a snapshot of the async schedule.
  450. * usually empty except for long-term bulk reads, or head.
  451. * one QH per line, and TDs we know about
  452. */
  453. spin_lock_irqsave(&ehci->lock, flags);
  454. for (qh = ehci->async->qh_next.qh; size > 0 && qh; qh = qh->qh_next.qh)
  455. qh_lines(ehci, qh, &next, &size);
  456. if (!list_empty(&ehci->async_unlink) && size > 0) {
  457. temp = scnprintf(next, size, "\nunlink =\n");
  458. size -= temp;
  459. next += temp;
  460. list_for_each_entry(qh, &ehci->async_unlink, unlink_node) {
  461. if (size <= 0)
  462. break;
  463. qh_lines(ehci, qh, &next, &size);
  464. }
  465. }
  466. spin_unlock_irqrestore(&ehci->lock, flags);
  467. return strlen(buf->output_buf);
  468. }
  469. static ssize_t fill_bandwidth_buffer(struct debug_buffer *buf)
  470. {
  471. struct ehci_hcd *ehci;
  472. struct ehci_tt *tt;
  473. struct ehci_per_sched *ps;
  474. unsigned temp, size;
  475. char *next;
  476. unsigned i;
  477. u8 *bw;
  478. u16 *bf;
  479. u8 budget[EHCI_BANDWIDTH_SIZE];
  480. ehci = hcd_to_ehci(bus_to_hcd(buf->bus));
  481. next = buf->output_buf;
  482. size = buf->alloc_size;
  483. *next = 0;
  484. spin_lock_irq(&ehci->lock);
  485. /* Dump the HS bandwidth table */
  486. temp = scnprintf(next, size,
  487. "HS bandwidth allocation (us per microframe)\n");
  488. size -= temp;
  489. next += temp;
  490. for (i = 0; i < EHCI_BANDWIDTH_SIZE; i += 8) {
  491. bw = &ehci->bandwidth[i];
  492. temp = scnprintf(next, size,
  493. "%2u: %4u%4u%4u%4u%4u%4u%4u%4u\n",
  494. i, bw[0], bw[1], bw[2], bw[3],
  495. bw[4], bw[5], bw[6], bw[7]);
  496. size -= temp;
  497. next += temp;
  498. }
  499. /* Dump all the FS/LS tables */
  500. list_for_each_entry(tt, &ehci->tt_list, tt_list) {
  501. temp = scnprintf(next, size,
  502. "\nTT %s port %d FS/LS bandwidth allocation (us per frame)\n",
  503. dev_name(&tt->usb_tt->hub->dev),
  504. tt->tt_port + !!tt->usb_tt->multi);
  505. size -= temp;
  506. next += temp;
  507. bf = tt->bandwidth;
  508. temp = scnprintf(next, size,
  509. " %5u%5u%5u%5u%5u%5u%5u%5u\n",
  510. bf[0], bf[1], bf[2], bf[3],
  511. bf[4], bf[5], bf[6], bf[7]);
  512. size -= temp;
  513. next += temp;
  514. temp = scnprintf(next, size,
  515. "FS/LS budget (us per microframe)\n");
  516. size -= temp;
  517. next += temp;
  518. compute_tt_budget(budget, tt);
  519. for (i = 0; i < EHCI_BANDWIDTH_SIZE; i += 8) {
  520. bw = &budget[i];
  521. temp = scnprintf(next, size,
  522. "%2u: %4u%4u%4u%4u%4u%4u%4u%4u\n",
  523. i, bw[0], bw[1], bw[2], bw[3],
  524. bw[4], bw[5], bw[6], bw[7]);
  525. size -= temp;
  526. next += temp;
  527. }
  528. list_for_each_entry(ps, &tt->ps_list, ps_list) {
  529. temp = scnprintf(next, size,
  530. "%s ep %02x: %4u @ %2u.%u+%u mask %04x\n",
  531. dev_name(&ps->udev->dev),
  532. ps->ep->desc.bEndpointAddress,
  533. ps->tt_usecs,
  534. ps->bw_phase, ps->phase_uf,
  535. ps->bw_period, ps->cs_mask);
  536. size -= temp;
  537. next += temp;
  538. }
  539. }
  540. spin_unlock_irq(&ehci->lock);
  541. return next - buf->output_buf;
  542. }
  543. static unsigned output_buf_tds_dir(char *buf, struct ehci_hcd *ehci,
  544. struct ehci_qh_hw *hw, struct ehci_qh *qh, unsigned size)
  545. {
  546. u32 scratch = hc32_to_cpup(ehci, &hw->hw_info1);
  547. struct ehci_qtd *qtd;
  548. char *type = "";
  549. unsigned temp = 0;
  550. /* count tds, get ep direction */
  551. list_for_each_entry(qtd, &qh->qtd_list, qtd_list) {
  552. temp++;
  553. switch ((hc32_to_cpu(ehci, qtd->hw_token) >> 8) & 0x03) {
  554. case 0:
  555. type = "out";
  556. continue;
  557. case 1:
  558. type = "in";
  559. continue;
  560. }
  561. }
  562. return scnprintf(buf, size, " (%c%d ep%d%s [%d/%d] q%d p%d)",
  563. speed_char(scratch), scratch & 0x007f,
  564. (scratch >> 8) & 0x000f, type, qh->ps.usecs,
  565. qh->ps.c_usecs, temp, 0x7ff & (scratch >> 16));
  566. }
  567. #define DBG_SCHED_LIMIT 64
  568. static ssize_t fill_periodic_buffer(struct debug_buffer *buf)
  569. {
  570. struct usb_hcd *hcd;
  571. struct ehci_hcd *ehci;
  572. unsigned long flags;
  573. union ehci_shadow p, *seen;
  574. unsigned temp, size, seen_count;
  575. char *next;
  576. unsigned i;
  577. __hc32 tag;
  578. seen = kmalloc_array(DBG_SCHED_LIMIT, sizeof(*seen), GFP_ATOMIC);
  579. if (!seen)
  580. return 0;
  581. seen_count = 0;
  582. hcd = bus_to_hcd(buf->bus);
  583. ehci = hcd_to_ehci(hcd);
  584. next = buf->output_buf;
  585. size = buf->alloc_size;
  586. temp = scnprintf(next, size, "size = %d\n", ehci->periodic_size);
  587. size -= temp;
  588. next += temp;
  589. /*
  590. * dump a snapshot of the periodic schedule.
  591. * iso changes, interrupt usually doesn't.
  592. */
  593. spin_lock_irqsave(&ehci->lock, flags);
  594. for (i = 0; i < ehci->periodic_size; i++) {
  595. p = ehci->pshadow[i];
  596. if (likely(!p.ptr))
  597. continue;
  598. tag = Q_NEXT_TYPE(ehci, ehci->periodic[i]);
  599. temp = scnprintf(next, size, "%4d: ", i);
  600. size -= temp;
  601. next += temp;
  602. do {
  603. struct ehci_qh_hw *hw;
  604. switch (hc32_to_cpu(ehci, tag)) {
  605. case Q_TYPE_QH:
  606. hw = p.qh->hw;
  607. temp = scnprintf(next, size, " qh%d-%04x/%p",
  608. p.qh->ps.period,
  609. hc32_to_cpup(ehci,
  610. &hw->hw_info2)
  611. /* uframe masks */
  612. & (QH_CMASK | QH_SMASK),
  613. p.qh);
  614. size -= temp;
  615. next += temp;
  616. /* don't repeat what follows this qh */
  617. for (temp = 0; temp < seen_count; temp++) {
  618. if (seen[temp].ptr != p.ptr)
  619. continue;
  620. if (p.qh->qh_next.ptr) {
  621. temp = scnprintf(next, size,
  622. " ...");
  623. size -= temp;
  624. next += temp;
  625. }
  626. break;
  627. }
  628. /* show more info the first time around */
  629. if (temp == seen_count) {
  630. temp = output_buf_tds_dir(next, ehci,
  631. hw, p.qh, size);
  632. if (seen_count < DBG_SCHED_LIMIT)
  633. seen[seen_count++].qh = p.qh;
  634. } else {
  635. temp = 0;
  636. }
  637. tag = Q_NEXT_TYPE(ehci, hw->hw_next);
  638. p = p.qh->qh_next;
  639. break;
  640. case Q_TYPE_FSTN:
  641. temp = scnprintf(next, size,
  642. " fstn-%8x/%p", p.fstn->hw_prev,
  643. p.fstn);
  644. tag = Q_NEXT_TYPE(ehci, p.fstn->hw_next);
  645. p = p.fstn->fstn_next;
  646. break;
  647. case Q_TYPE_ITD:
  648. temp = scnprintf(next, size,
  649. " itd/%p", p.itd);
  650. tag = Q_NEXT_TYPE(ehci, p.itd->hw_next);
  651. p = p.itd->itd_next;
  652. break;
  653. case Q_TYPE_SITD:
  654. temp = scnprintf(next, size,
  655. " sitd%d-%04x/%p",
  656. p.sitd->stream->ps.period,
  657. hc32_to_cpup(ehci, &p.sitd->hw_uframe)
  658. & 0x0000ffff,
  659. p.sitd);
  660. tag = Q_NEXT_TYPE(ehci, p.sitd->hw_next);
  661. p = p.sitd->sitd_next;
  662. break;
  663. }
  664. size -= temp;
  665. next += temp;
  666. } while (p.ptr);
  667. temp = scnprintf(next, size, "\n");
  668. size -= temp;
  669. next += temp;
  670. }
  671. spin_unlock_irqrestore(&ehci->lock, flags);
  672. kfree(seen);
  673. return buf->alloc_size - size;
  674. }
  675. #undef DBG_SCHED_LIMIT
  676. static const char *rh_state_string(struct ehci_hcd *ehci)
  677. {
  678. switch (ehci->rh_state) {
  679. case EHCI_RH_HALTED:
  680. return "halted";
  681. case EHCI_RH_SUSPENDED:
  682. return "suspended";
  683. case EHCI_RH_RUNNING:
  684. return "running";
  685. case EHCI_RH_STOPPING:
  686. return "stopping";
  687. }
  688. return "?";
  689. }
  690. static ssize_t fill_registers_buffer(struct debug_buffer *buf)
  691. {
  692. struct usb_hcd *hcd;
  693. struct ehci_hcd *ehci;
  694. unsigned long flags;
  695. unsigned temp, size, i;
  696. char *next, scratch[80];
  697. static char fmt[] = "%*s\n";
  698. static char label[] = "";
  699. hcd = bus_to_hcd(buf->bus);
  700. ehci = hcd_to_ehci(hcd);
  701. next = buf->output_buf;
  702. size = buf->alloc_size;
  703. spin_lock_irqsave(&ehci->lock, flags);
  704. if (!HCD_HW_ACCESSIBLE(hcd)) {
  705. size = scnprintf(next, size,
  706. "bus %s, device %s\n"
  707. "%s\n"
  708. "SUSPENDED (no register access)\n",
  709. hcd->self.controller->bus->name,
  710. dev_name(hcd->self.controller),
  711. hcd->product_desc);
  712. goto done;
  713. }
  714. /* Capability Registers */
  715. i = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
  716. temp = scnprintf(next, size,
  717. "bus %s, device %s\n"
  718. "%s\n"
  719. "EHCI %x.%02x, rh state %s\n",
  720. hcd->self.controller->bus->name,
  721. dev_name(hcd->self.controller),
  722. hcd->product_desc,
  723. i >> 8, i & 0x0ff, rh_state_string(ehci));
  724. size -= temp;
  725. next += temp;
  726. #ifdef CONFIG_PCI
  727. /* EHCI 0.96 and later may have "extended capabilities" */
  728. if (dev_is_pci(hcd->self.controller)) {
  729. struct pci_dev *pdev;
  730. u32 offset, cap, cap2;
  731. unsigned count = 256 / 4;
  732. pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller);
  733. offset = HCC_EXT_CAPS(ehci_readl(ehci,
  734. &ehci->caps->hcc_params));
  735. while (offset && count--) {
  736. pci_read_config_dword(pdev, offset, &cap);
  737. switch (cap & 0xff) {
  738. case 1:
  739. temp = scnprintf(next, size,
  740. "ownership %08x%s%s\n", cap,
  741. (cap & (1 << 24)) ? " linux" : "",
  742. (cap & (1 << 16)) ? " firmware" : "");
  743. size -= temp;
  744. next += temp;
  745. offset += 4;
  746. pci_read_config_dword(pdev, offset, &cap2);
  747. temp = scnprintf(next, size,
  748. "SMI sts/enable 0x%08x\n", cap2);
  749. size -= temp;
  750. next += temp;
  751. break;
  752. case 0: /* illegal reserved capability */
  753. cap = 0;
  754. /* FALLTHROUGH */
  755. default: /* unknown */
  756. break;
  757. }
  758. temp = (cap >> 8) & 0xff;
  759. }
  760. }
  761. #endif
  762. /* FIXME interpret both types of params */
  763. i = ehci_readl(ehci, &ehci->caps->hcs_params);
  764. temp = scnprintf(next, size, "structural params 0x%08x\n", i);
  765. size -= temp;
  766. next += temp;
  767. i = ehci_readl(ehci, &ehci->caps->hcc_params);
  768. temp = scnprintf(next, size, "capability params 0x%08x\n", i);
  769. size -= temp;
  770. next += temp;
  771. /* Operational Registers */
  772. temp = dbg_status_buf(scratch, sizeof(scratch), label,
  773. ehci_readl(ehci, &ehci->regs->status));
  774. temp = scnprintf(next, size, fmt, temp, scratch);
  775. size -= temp;
  776. next += temp;
  777. temp = dbg_command_buf(scratch, sizeof(scratch), label,
  778. ehci_readl(ehci, &ehci->regs->command));
  779. temp = scnprintf(next, size, fmt, temp, scratch);
  780. size -= temp;
  781. next += temp;
  782. temp = dbg_intr_buf(scratch, sizeof(scratch), label,
  783. ehci_readl(ehci, &ehci->regs->intr_enable));
  784. temp = scnprintf(next, size, fmt, temp, scratch);
  785. size -= temp;
  786. next += temp;
  787. temp = scnprintf(next, size, "uframe %04x\n",
  788. ehci_read_frame_index(ehci));
  789. size -= temp;
  790. next += temp;
  791. for (i = 1; i <= HCS_N_PORTS(ehci->hcs_params); i++) {
  792. temp = dbg_port_buf(scratch, sizeof(scratch), label, i,
  793. ehci_readl(ehci,
  794. &ehci->regs->port_status[i - 1]));
  795. temp = scnprintf(next, size, fmt, temp, scratch);
  796. size -= temp;
  797. next += temp;
  798. if (i == HCS_DEBUG_PORT(ehci->hcs_params) && ehci->debug) {
  799. temp = scnprintf(next, size,
  800. " debug control %08x\n",
  801. ehci_readl(ehci,
  802. &ehci->debug->control));
  803. size -= temp;
  804. next += temp;
  805. }
  806. }
  807. if (!list_empty(&ehci->async_unlink)) {
  808. temp = scnprintf(next, size, "async unlink qh %p\n",
  809. list_first_entry(&ehci->async_unlink,
  810. struct ehci_qh, unlink_node));
  811. size -= temp;
  812. next += temp;
  813. }
  814. #ifdef EHCI_STATS
  815. temp = scnprintf(next, size,
  816. "irq normal %ld err %ld iaa %ld (lost %ld)\n",
  817. ehci->stats.normal, ehci->stats.error, ehci->stats.iaa,
  818. ehci->stats.lost_iaa);
  819. size -= temp;
  820. next += temp;
  821. temp = scnprintf(next, size, "complete %ld unlink %ld\n",
  822. ehci->stats.complete, ehci->stats.unlink);
  823. size -= temp;
  824. next += temp;
  825. #endif
  826. done:
  827. spin_unlock_irqrestore(&ehci->lock, flags);
  828. return buf->alloc_size - size;
  829. }
  830. static struct debug_buffer *alloc_buffer(struct usb_bus *bus,
  831. ssize_t (*fill_func)(struct debug_buffer *))
  832. {
  833. struct debug_buffer *buf;
  834. buf = kzalloc(sizeof(*buf), GFP_KERNEL);
  835. if (buf) {
  836. buf->bus = bus;
  837. buf->fill_func = fill_func;
  838. mutex_init(&buf->mutex);
  839. buf->alloc_size = PAGE_SIZE;
  840. }
  841. return buf;
  842. }
  843. static int fill_buffer(struct debug_buffer *buf)
  844. {
  845. int ret = 0;
  846. if (!buf->output_buf)
  847. buf->output_buf = vmalloc(buf->alloc_size);
  848. if (!buf->output_buf) {
  849. ret = -ENOMEM;
  850. goto out;
  851. }
  852. ret = buf->fill_func(buf);
  853. if (ret >= 0) {
  854. buf->count = ret;
  855. ret = 0;
  856. }
  857. out:
  858. return ret;
  859. }
  860. static ssize_t debug_output(struct file *file, char __user *user_buf,
  861. size_t len, loff_t *offset)
  862. {
  863. struct debug_buffer *buf = file->private_data;
  864. int ret = 0;
  865. mutex_lock(&buf->mutex);
  866. if (buf->count == 0) {
  867. ret = fill_buffer(buf);
  868. if (ret != 0) {
  869. mutex_unlock(&buf->mutex);
  870. goto out;
  871. }
  872. }
  873. mutex_unlock(&buf->mutex);
  874. ret = simple_read_from_buffer(user_buf, len, offset,
  875. buf->output_buf, buf->count);
  876. out:
  877. return ret;
  878. }
  879. static int debug_close(struct inode *inode, struct file *file)
  880. {
  881. struct debug_buffer *buf = file->private_data;
  882. if (buf) {
  883. vfree(buf->output_buf);
  884. kfree(buf);
  885. }
  886. return 0;
  887. }
  888. static int debug_async_open(struct inode *inode, struct file *file)
  889. {
  890. file->private_data = alloc_buffer(inode->i_private, fill_async_buffer);
  891. return file->private_data ? 0 : -ENOMEM;
  892. }
  893. static int debug_bandwidth_open(struct inode *inode, struct file *file)
  894. {
  895. file->private_data = alloc_buffer(inode->i_private,
  896. fill_bandwidth_buffer);
  897. return file->private_data ? 0 : -ENOMEM;
  898. }
  899. static int debug_periodic_open(struct inode *inode, struct file *file)
  900. {
  901. struct debug_buffer *buf;
  902. buf = alloc_buffer(inode->i_private, fill_periodic_buffer);
  903. if (!buf)
  904. return -ENOMEM;
  905. buf->alloc_size = (sizeof(void *) == 4 ? 6 : 8) * PAGE_SIZE;
  906. file->private_data = buf;
  907. return 0;
  908. }
  909. static int debug_registers_open(struct inode *inode, struct file *file)
  910. {
  911. file->private_data = alloc_buffer(inode->i_private,
  912. fill_registers_buffer);
  913. return file->private_data ? 0 : -ENOMEM;
  914. }
  915. static inline void create_debug_files(struct ehci_hcd *ehci)
  916. {
  917. struct usb_bus *bus = &ehci_to_hcd(ehci)->self;
  918. ehci->debug_dir = debugfs_create_dir(bus->bus_name, ehci_debug_root);
  919. if (!ehci->debug_dir)
  920. return;
  921. if (!debugfs_create_file("async", S_IRUGO, ehci->debug_dir, bus,
  922. &debug_async_fops))
  923. goto file_error;
  924. if (!debugfs_create_file("bandwidth", S_IRUGO, ehci->debug_dir, bus,
  925. &debug_bandwidth_fops))
  926. goto file_error;
  927. if (!debugfs_create_file("periodic", S_IRUGO, ehci->debug_dir, bus,
  928. &debug_periodic_fops))
  929. goto file_error;
  930. if (!debugfs_create_file("registers", S_IRUGO, ehci->debug_dir, bus,
  931. &debug_registers_fops))
  932. goto file_error;
  933. return;
  934. file_error:
  935. debugfs_remove_recursive(ehci->debug_dir);
  936. }
  937. static inline void remove_debug_files(struct ehci_hcd *ehci)
  938. {
  939. debugfs_remove_recursive(ehci->debug_dir);
  940. }
  941. #else /* CONFIG_DYNAMIC_DEBUG */
  942. static inline void dbg_hcs_params(struct ehci_hcd *ehci, char *label) { }
  943. static inline void dbg_hcc_params(struct ehci_hcd *ehci, char *label) { }
  944. static inline void __maybe_unused dbg_qh(const char *label,
  945. struct ehci_hcd *ehci, struct ehci_qh *qh) { }
  946. static inline int __maybe_unused dbg_status_buf(const char *buf,
  947. unsigned int len, const char *label, u32 status)
  948. { return 0; }
  949. static inline int __maybe_unused dbg_command_buf(const char *buf,
  950. unsigned int len, const char *label, u32 command)
  951. { return 0; }
  952. static inline int __maybe_unused dbg_intr_buf(const char *buf,
  953. unsigned int len, const char *label, u32 enable)
  954. { return 0; }
  955. static inline int __maybe_unused dbg_port_buf(char *buf,
  956. unsigned int len, const char *label, int port, u32 status)
  957. { return 0; }
  958. static inline void dbg_status(struct ehci_hcd *ehci, const char *label,
  959. u32 status) { }
  960. static inline void dbg_cmd(struct ehci_hcd *ehci, const char *label,
  961. u32 command) { }
  962. static inline void dbg_port(struct ehci_hcd *ehci, const char *label,
  963. int port, u32 status) { }
  964. static inline void create_debug_files(struct ehci_hcd *bus) { }
  965. static inline void remove_debug_files(struct ehci_hcd *bus) { }
  966. #endif /* CONFIG_DYNAMIC_DEBUG */