da8xx_remoteproc.c 9.4 KB

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  1. /*
  2. * Remote processor machine-specific module for DA8XX
  3. *
  4. * Copyright (C) 2013 Texas Instruments, Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * version 2 as published by the Free Software Foundation.
  9. */
  10. #include <linux/bitops.h>
  11. #include <linux/clk.h>
  12. #include <linux/err.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/io.h>
  15. #include <linux/irq.h>
  16. #include <linux/kernel.h>
  17. #include <linux/module.h>
  18. #include <linux/of_reserved_mem.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/remoteproc.h>
  21. #include <mach/clock.h> /* for davinci_clk_reset_assert/deassert() */
  22. #include "remoteproc_internal.h"
  23. static char *da8xx_fw_name;
  24. module_param(da8xx_fw_name, charp, S_IRUGO);
  25. MODULE_PARM_DESC(da8xx_fw_name,
  26. "Name of DSP firmware file in /lib/firmware (if not specified defaults to 'rproc-dsp-fw')");
  27. /*
  28. * OMAP-L138 Technical References:
  29. * http://www.ti.com/product/omap-l138
  30. */
  31. #define SYSCFG_CHIPSIG0 BIT(0)
  32. #define SYSCFG_CHIPSIG1 BIT(1)
  33. #define SYSCFG_CHIPSIG2 BIT(2)
  34. #define SYSCFG_CHIPSIG3 BIT(3)
  35. #define SYSCFG_CHIPSIG4 BIT(4)
  36. #define DA8XX_RPROC_LOCAL_ADDRESS_MASK (SZ_16M - 1)
  37. /**
  38. * struct da8xx_rproc_mem - internal memory structure
  39. * @cpu_addr: MPU virtual address of the memory region
  40. * @bus_addr: Bus address used to access the memory region
  41. * @dev_addr: Device address of the memory region from DSP view
  42. * @size: Size of the memory region
  43. */
  44. struct da8xx_rproc_mem {
  45. void __iomem *cpu_addr;
  46. phys_addr_t bus_addr;
  47. u32 dev_addr;
  48. size_t size;
  49. };
  50. /**
  51. * struct da8xx_rproc - da8xx remote processor instance state
  52. * @rproc: rproc handle
  53. * @mem: internal memory regions data
  54. * @num_mems: number of internal memory regions
  55. * @dsp_clk: placeholder for platform's DSP clk
  56. * @ack_fxn: chip-specific ack function for ack'ing irq
  57. * @irq_data: ack_fxn function parameter
  58. * @chipsig: virt ptr to DSP interrupt registers (CHIPSIG & CHIPSIG_CLR)
  59. * @bootreg: virt ptr to DSP boot address register (HOST1CFG)
  60. * @irq: irq # used by this instance
  61. */
  62. struct da8xx_rproc {
  63. struct rproc *rproc;
  64. struct da8xx_rproc_mem *mem;
  65. int num_mems;
  66. struct clk *dsp_clk;
  67. void (*ack_fxn)(struct irq_data *data);
  68. struct irq_data *irq_data;
  69. void __iomem *chipsig;
  70. void __iomem *bootreg;
  71. int irq;
  72. };
  73. /**
  74. * handle_event() - inbound virtqueue message workqueue function
  75. *
  76. * This function is registered as a kernel thread and is scheduled by the
  77. * kernel handler.
  78. */
  79. static irqreturn_t handle_event(int irq, void *p)
  80. {
  81. struct rproc *rproc = (struct rproc *)p;
  82. /* Process incoming buffers on all our vrings */
  83. rproc_vq_interrupt(rproc, 0);
  84. rproc_vq_interrupt(rproc, 1);
  85. return IRQ_HANDLED;
  86. }
  87. /**
  88. * da8xx_rproc_callback() - inbound virtqueue message handler
  89. *
  90. * This handler is invoked directly by the kernel whenever the remote
  91. * core (DSP) has modified the state of a virtqueue. There is no
  92. * "payload" message indicating the virtqueue index as is the case with
  93. * mailbox-based implementations on OMAP4. As such, this handler "polls"
  94. * each known virtqueue index for every invocation.
  95. */
  96. static irqreturn_t da8xx_rproc_callback(int irq, void *p)
  97. {
  98. struct rproc *rproc = (struct rproc *)p;
  99. struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv;
  100. u32 chipsig;
  101. chipsig = readl(drproc->chipsig);
  102. if (chipsig & SYSCFG_CHIPSIG0) {
  103. /* Clear interrupt level source */
  104. writel(SYSCFG_CHIPSIG0, drproc->chipsig + 4);
  105. /*
  106. * ACK intr to AINTC.
  107. *
  108. * It has already been ack'ed by the kernel before calling
  109. * this function, but since the ARM<->DSP interrupts in the
  110. * CHIPSIG register are "level" instead of "pulse" variety,
  111. * we need to ack it after taking down the level else we'll
  112. * be called again immediately after returning.
  113. */
  114. drproc->ack_fxn(drproc->irq_data);
  115. return IRQ_WAKE_THREAD;
  116. }
  117. return IRQ_HANDLED;
  118. }
  119. static int da8xx_rproc_start(struct rproc *rproc)
  120. {
  121. struct device *dev = rproc->dev.parent;
  122. struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv;
  123. struct clk *dsp_clk = drproc->dsp_clk;
  124. int ret;
  125. /* hw requires the start (boot) address be on 1KB boundary */
  126. if (rproc->bootaddr & 0x3ff) {
  127. dev_err(dev, "invalid boot address: must be aligned to 1KB\n");
  128. return -EINVAL;
  129. }
  130. /* everything the ISR needs is now setup, so hook it up */
  131. ret = request_threaded_irq(drproc->irq, da8xx_rproc_callback,
  132. handle_event, 0, "da8xx-remoteproc", rproc);
  133. if (ret) {
  134. dev_err(dev, "request_threaded_irq error: %d\n", ret);
  135. return ret;
  136. }
  137. writel(rproc->bootaddr, drproc->bootreg);
  138. clk_enable(dsp_clk);
  139. davinci_clk_reset_deassert(dsp_clk);
  140. return 0;
  141. }
  142. static int da8xx_rproc_stop(struct rproc *rproc)
  143. {
  144. struct da8xx_rproc *drproc = rproc->priv;
  145. davinci_clk_reset_assert(drproc->dsp_clk);
  146. clk_disable(drproc->dsp_clk);
  147. free_irq(drproc->irq, rproc);
  148. return 0;
  149. }
  150. /* kick a virtqueue */
  151. static void da8xx_rproc_kick(struct rproc *rproc, int vqid)
  152. {
  153. struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv;
  154. /* Interrupt remote proc */
  155. writel(SYSCFG_CHIPSIG2, drproc->chipsig);
  156. }
  157. static const struct rproc_ops da8xx_rproc_ops = {
  158. .start = da8xx_rproc_start,
  159. .stop = da8xx_rproc_stop,
  160. .kick = da8xx_rproc_kick,
  161. };
  162. static int da8xx_rproc_get_internal_memories(struct platform_device *pdev,
  163. struct da8xx_rproc *drproc)
  164. {
  165. static const char * const mem_names[] = {"l2sram", "l1pram", "l1dram"};
  166. struct device *dev = &pdev->dev;
  167. int num_mems = ARRAY_SIZE(mem_names);
  168. struct resource *res;
  169. int i;
  170. drproc->mem = devm_kcalloc(dev, num_mems, sizeof(*drproc->mem),
  171. GFP_KERNEL);
  172. if (!drproc->mem)
  173. return -ENOMEM;
  174. for (i = 0; i < num_mems; i++) {
  175. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  176. mem_names[i]);
  177. drproc->mem[i].cpu_addr = devm_ioremap_resource(dev, res);
  178. if (IS_ERR(drproc->mem[i].cpu_addr)) {
  179. dev_err(dev, "failed to parse and map %s memory\n",
  180. mem_names[i]);
  181. return PTR_ERR(drproc->mem[i].cpu_addr);
  182. }
  183. drproc->mem[i].bus_addr = res->start;
  184. drproc->mem[i].dev_addr =
  185. res->start & DA8XX_RPROC_LOCAL_ADDRESS_MASK;
  186. drproc->mem[i].size = resource_size(res);
  187. dev_dbg(dev, "memory %8s: bus addr %pa size 0x%x va %p da 0x%x\n",
  188. mem_names[i], &drproc->mem[i].bus_addr,
  189. drproc->mem[i].size, drproc->mem[i].cpu_addr,
  190. drproc->mem[i].dev_addr);
  191. }
  192. drproc->num_mems = num_mems;
  193. return 0;
  194. }
  195. static int da8xx_rproc_probe(struct platform_device *pdev)
  196. {
  197. struct device *dev = &pdev->dev;
  198. struct da8xx_rproc *drproc;
  199. struct rproc *rproc;
  200. struct irq_data *irq_data;
  201. struct resource *bootreg_res;
  202. struct resource *chipsig_res;
  203. struct clk *dsp_clk;
  204. void __iomem *chipsig;
  205. void __iomem *bootreg;
  206. int irq;
  207. int ret;
  208. irq = platform_get_irq(pdev, 0);
  209. if (irq < 0) {
  210. dev_err(dev, "platform_get_irq(pdev, 0) error: %d\n", irq);
  211. return irq;
  212. }
  213. irq_data = irq_get_irq_data(irq);
  214. if (!irq_data) {
  215. dev_err(dev, "irq_get_irq_data(%d): NULL\n", irq);
  216. return -EINVAL;
  217. }
  218. bootreg_res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  219. "host1cfg");
  220. bootreg = devm_ioremap_resource(dev, bootreg_res);
  221. if (IS_ERR(bootreg))
  222. return PTR_ERR(bootreg);
  223. chipsig_res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  224. "chipsig");
  225. chipsig = devm_ioremap_resource(dev, chipsig_res);
  226. if (IS_ERR(chipsig))
  227. return PTR_ERR(chipsig);
  228. dsp_clk = devm_clk_get(dev, NULL);
  229. if (IS_ERR(dsp_clk)) {
  230. dev_err(dev, "clk_get error: %ld\n", PTR_ERR(dsp_clk));
  231. return PTR_ERR(dsp_clk);
  232. }
  233. if (dev->of_node) {
  234. ret = of_reserved_mem_device_init(dev);
  235. if (ret) {
  236. dev_err(dev, "device does not have specific CMA pool: %d\n",
  237. ret);
  238. return ret;
  239. }
  240. }
  241. rproc = rproc_alloc(dev, "dsp", &da8xx_rproc_ops, da8xx_fw_name,
  242. sizeof(*drproc));
  243. if (!rproc) {
  244. ret = -ENOMEM;
  245. goto free_mem;
  246. }
  247. drproc = rproc->priv;
  248. drproc->rproc = rproc;
  249. drproc->dsp_clk = dsp_clk;
  250. rproc->has_iommu = false;
  251. ret = da8xx_rproc_get_internal_memories(pdev, drproc);
  252. if (ret)
  253. goto free_rproc;
  254. platform_set_drvdata(pdev, rproc);
  255. /*
  256. * rproc_add() can end up enabling the DSP's clk with the DSP
  257. * *not* in reset, but da8xx_rproc_start() needs the DSP to be
  258. * held in reset at the time it is called.
  259. */
  260. ret = davinci_clk_reset_assert(drproc->dsp_clk);
  261. if (ret)
  262. goto free_rproc;
  263. drproc->chipsig = chipsig;
  264. drproc->bootreg = bootreg;
  265. drproc->ack_fxn = irq_data->chip->irq_ack;
  266. drproc->irq_data = irq_data;
  267. drproc->irq = irq;
  268. ret = rproc_add(rproc);
  269. if (ret) {
  270. dev_err(dev, "rproc_add failed: %d\n", ret);
  271. goto free_rproc;
  272. }
  273. if (dev->of_node && rproc_get_alias_id(rproc) < 0)
  274. dev_warn(dev, "device does not have an alias id\n");
  275. return 0;
  276. free_rproc:
  277. rproc_free(rproc);
  278. free_mem:
  279. if (dev->of_node)
  280. of_reserved_mem_device_release(dev);
  281. return ret;
  282. }
  283. static int da8xx_rproc_remove(struct platform_device *pdev)
  284. {
  285. struct device *dev = &pdev->dev;
  286. struct rproc *rproc = platform_get_drvdata(pdev);
  287. rproc_del(rproc);
  288. rproc_free(rproc);
  289. if (dev->of_node)
  290. of_reserved_mem_device_release(dev);
  291. return 0;
  292. }
  293. static const struct of_device_id davinci_rproc_of_match[] = {
  294. { .compatible = "ti,da850-dsp", },
  295. { /* sentinel */ },
  296. };
  297. MODULE_DEVICE_TABLE(of, davinci_rproc_of_match);
  298. static struct platform_driver da8xx_rproc_driver = {
  299. .probe = da8xx_rproc_probe,
  300. .remove = da8xx_rproc_remove,
  301. .driver = {
  302. .name = "davinci-rproc",
  303. .of_match_table = davinci_rproc_of_match,
  304. },
  305. };
  306. module_platform_driver(da8xx_rproc_driver);
  307. MODULE_LICENSE("GPL v2");
  308. MODULE_DESCRIPTION("DA8XX Remote Processor control driver");