rdma.c 37 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526
  1. /*
  2. * NVMe over Fabrics RDMA target.
  3. * Copyright (c) 2015-2016 HGST, a Western Digital Company.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. */
  14. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  15. #include <linux/atomic.h>
  16. #include <linux/ctype.h>
  17. #include <linux/delay.h>
  18. #include <linux/err.h>
  19. #include <linux/init.h>
  20. #include <linux/module.h>
  21. #include <linux/nvme.h>
  22. #include <linux/slab.h>
  23. #include <linux/string.h>
  24. #include <linux/wait.h>
  25. #include <linux/inet.h>
  26. #include <asm/unaligned.h>
  27. #include <rdma/ib_verbs.h>
  28. #include <rdma/rdma_cm.h>
  29. #include <rdma/rw.h>
  30. #include <linux/nvme-rdma.h>
  31. #include "nvmet.h"
  32. /*
  33. * We allow up to a page of inline data to go with the SQE
  34. */
  35. #define NVMET_RDMA_INLINE_DATA_SIZE PAGE_SIZE
  36. struct nvmet_rdma_cmd {
  37. struct ib_sge sge[2];
  38. struct ib_cqe cqe;
  39. struct ib_recv_wr wr;
  40. struct scatterlist inline_sg;
  41. struct page *inline_page;
  42. struct nvme_command *nvme_cmd;
  43. struct nvmet_rdma_queue *queue;
  44. };
  45. enum {
  46. NVMET_RDMA_REQ_INLINE_DATA = (1 << 0),
  47. NVMET_RDMA_REQ_INVALIDATE_RKEY = (1 << 1),
  48. };
  49. struct nvmet_rdma_rsp {
  50. struct ib_sge send_sge;
  51. struct ib_cqe send_cqe;
  52. struct ib_send_wr send_wr;
  53. struct nvmet_rdma_cmd *cmd;
  54. struct nvmet_rdma_queue *queue;
  55. struct ib_cqe read_cqe;
  56. struct rdma_rw_ctx rw;
  57. struct nvmet_req req;
  58. u8 n_rdma;
  59. u32 flags;
  60. u32 invalidate_rkey;
  61. struct list_head wait_list;
  62. struct list_head free_list;
  63. };
  64. enum nvmet_rdma_queue_state {
  65. NVMET_RDMA_Q_CONNECTING,
  66. NVMET_RDMA_Q_LIVE,
  67. NVMET_RDMA_Q_DISCONNECTING,
  68. NVMET_RDMA_IN_DEVICE_REMOVAL,
  69. };
  70. struct nvmet_rdma_queue {
  71. struct rdma_cm_id *cm_id;
  72. struct nvmet_port *port;
  73. struct ib_cq *cq;
  74. atomic_t sq_wr_avail;
  75. struct nvmet_rdma_device *dev;
  76. spinlock_t state_lock;
  77. enum nvmet_rdma_queue_state state;
  78. struct nvmet_cq nvme_cq;
  79. struct nvmet_sq nvme_sq;
  80. struct nvmet_rdma_rsp *rsps;
  81. struct list_head free_rsps;
  82. spinlock_t rsps_lock;
  83. struct nvmet_rdma_cmd *cmds;
  84. struct work_struct release_work;
  85. struct list_head rsp_wait_list;
  86. struct list_head rsp_wr_wait_list;
  87. spinlock_t rsp_wr_wait_lock;
  88. int idx;
  89. int host_qid;
  90. int recv_queue_size;
  91. int send_queue_size;
  92. struct list_head queue_list;
  93. };
  94. struct nvmet_rdma_device {
  95. struct ib_device *device;
  96. struct ib_pd *pd;
  97. struct ib_srq *srq;
  98. struct nvmet_rdma_cmd *srq_cmds;
  99. size_t srq_size;
  100. struct kref ref;
  101. struct list_head entry;
  102. };
  103. static bool nvmet_rdma_use_srq;
  104. module_param_named(use_srq, nvmet_rdma_use_srq, bool, 0444);
  105. MODULE_PARM_DESC(use_srq, "Use shared receive queue.");
  106. static DEFINE_IDA(nvmet_rdma_queue_ida);
  107. static LIST_HEAD(nvmet_rdma_queue_list);
  108. static DEFINE_MUTEX(nvmet_rdma_queue_mutex);
  109. static LIST_HEAD(device_list);
  110. static DEFINE_MUTEX(device_list_mutex);
  111. static bool nvmet_rdma_execute_command(struct nvmet_rdma_rsp *rsp);
  112. static void nvmet_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc);
  113. static void nvmet_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc);
  114. static void nvmet_rdma_read_data_done(struct ib_cq *cq, struct ib_wc *wc);
  115. static void nvmet_rdma_qp_event(struct ib_event *event, void *priv);
  116. static void nvmet_rdma_queue_disconnect(struct nvmet_rdma_queue *queue);
  117. static struct nvmet_fabrics_ops nvmet_rdma_ops;
  118. /* XXX: really should move to a generic header sooner or later.. */
  119. static inline u32 get_unaligned_le24(const u8 *p)
  120. {
  121. return (u32)p[0] | (u32)p[1] << 8 | (u32)p[2] << 16;
  122. }
  123. static inline bool nvmet_rdma_need_data_in(struct nvmet_rdma_rsp *rsp)
  124. {
  125. return nvme_is_write(rsp->req.cmd) &&
  126. rsp->req.data_len &&
  127. !(rsp->flags & NVMET_RDMA_REQ_INLINE_DATA);
  128. }
  129. static inline bool nvmet_rdma_need_data_out(struct nvmet_rdma_rsp *rsp)
  130. {
  131. return !nvme_is_write(rsp->req.cmd) &&
  132. rsp->req.data_len &&
  133. !rsp->req.rsp->status &&
  134. !(rsp->flags & NVMET_RDMA_REQ_INLINE_DATA);
  135. }
  136. static inline struct nvmet_rdma_rsp *
  137. nvmet_rdma_get_rsp(struct nvmet_rdma_queue *queue)
  138. {
  139. struct nvmet_rdma_rsp *rsp;
  140. unsigned long flags;
  141. spin_lock_irqsave(&queue->rsps_lock, flags);
  142. rsp = list_first_entry(&queue->free_rsps,
  143. struct nvmet_rdma_rsp, free_list);
  144. list_del(&rsp->free_list);
  145. spin_unlock_irqrestore(&queue->rsps_lock, flags);
  146. return rsp;
  147. }
  148. static inline void
  149. nvmet_rdma_put_rsp(struct nvmet_rdma_rsp *rsp)
  150. {
  151. unsigned long flags;
  152. spin_lock_irqsave(&rsp->queue->rsps_lock, flags);
  153. list_add_tail(&rsp->free_list, &rsp->queue->free_rsps);
  154. spin_unlock_irqrestore(&rsp->queue->rsps_lock, flags);
  155. }
  156. static void nvmet_rdma_free_sgl(struct scatterlist *sgl, unsigned int nents)
  157. {
  158. struct scatterlist *sg;
  159. int count;
  160. if (!sgl || !nents)
  161. return;
  162. for_each_sg(sgl, sg, nents, count)
  163. __free_page(sg_page(sg));
  164. kfree(sgl);
  165. }
  166. static int nvmet_rdma_alloc_sgl(struct scatterlist **sgl, unsigned int *nents,
  167. u32 length)
  168. {
  169. struct scatterlist *sg;
  170. struct page *page;
  171. unsigned int nent;
  172. int i = 0;
  173. nent = DIV_ROUND_UP(length, PAGE_SIZE);
  174. sg = kmalloc_array(nent, sizeof(struct scatterlist), GFP_KERNEL);
  175. if (!sg)
  176. goto out;
  177. sg_init_table(sg, nent);
  178. while (length) {
  179. u32 page_len = min_t(u32, length, PAGE_SIZE);
  180. page = alloc_page(GFP_KERNEL);
  181. if (!page)
  182. goto out_free_pages;
  183. sg_set_page(&sg[i], page, page_len, 0);
  184. length -= page_len;
  185. i++;
  186. }
  187. *sgl = sg;
  188. *nents = nent;
  189. return 0;
  190. out_free_pages:
  191. while (i > 0) {
  192. i--;
  193. __free_page(sg_page(&sg[i]));
  194. }
  195. kfree(sg);
  196. out:
  197. return NVME_SC_INTERNAL;
  198. }
  199. static int nvmet_rdma_alloc_cmd(struct nvmet_rdma_device *ndev,
  200. struct nvmet_rdma_cmd *c, bool admin)
  201. {
  202. /* NVMe command / RDMA RECV */
  203. c->nvme_cmd = kmalloc(sizeof(*c->nvme_cmd), GFP_KERNEL);
  204. if (!c->nvme_cmd)
  205. goto out;
  206. c->sge[0].addr = ib_dma_map_single(ndev->device, c->nvme_cmd,
  207. sizeof(*c->nvme_cmd), DMA_FROM_DEVICE);
  208. if (ib_dma_mapping_error(ndev->device, c->sge[0].addr))
  209. goto out_free_cmd;
  210. c->sge[0].length = sizeof(*c->nvme_cmd);
  211. c->sge[0].lkey = ndev->pd->local_dma_lkey;
  212. if (!admin) {
  213. c->inline_page = alloc_pages(GFP_KERNEL,
  214. get_order(NVMET_RDMA_INLINE_DATA_SIZE));
  215. if (!c->inline_page)
  216. goto out_unmap_cmd;
  217. c->sge[1].addr = ib_dma_map_page(ndev->device,
  218. c->inline_page, 0, NVMET_RDMA_INLINE_DATA_SIZE,
  219. DMA_FROM_DEVICE);
  220. if (ib_dma_mapping_error(ndev->device, c->sge[1].addr))
  221. goto out_free_inline_page;
  222. c->sge[1].length = NVMET_RDMA_INLINE_DATA_SIZE;
  223. c->sge[1].lkey = ndev->pd->local_dma_lkey;
  224. }
  225. c->cqe.done = nvmet_rdma_recv_done;
  226. c->wr.wr_cqe = &c->cqe;
  227. c->wr.sg_list = c->sge;
  228. c->wr.num_sge = admin ? 1 : 2;
  229. return 0;
  230. out_free_inline_page:
  231. if (!admin) {
  232. __free_pages(c->inline_page,
  233. get_order(NVMET_RDMA_INLINE_DATA_SIZE));
  234. }
  235. out_unmap_cmd:
  236. ib_dma_unmap_single(ndev->device, c->sge[0].addr,
  237. sizeof(*c->nvme_cmd), DMA_FROM_DEVICE);
  238. out_free_cmd:
  239. kfree(c->nvme_cmd);
  240. out:
  241. return -ENOMEM;
  242. }
  243. static void nvmet_rdma_free_cmd(struct nvmet_rdma_device *ndev,
  244. struct nvmet_rdma_cmd *c, bool admin)
  245. {
  246. if (!admin) {
  247. ib_dma_unmap_page(ndev->device, c->sge[1].addr,
  248. NVMET_RDMA_INLINE_DATA_SIZE, DMA_FROM_DEVICE);
  249. __free_pages(c->inline_page,
  250. get_order(NVMET_RDMA_INLINE_DATA_SIZE));
  251. }
  252. ib_dma_unmap_single(ndev->device, c->sge[0].addr,
  253. sizeof(*c->nvme_cmd), DMA_FROM_DEVICE);
  254. kfree(c->nvme_cmd);
  255. }
  256. static struct nvmet_rdma_cmd *
  257. nvmet_rdma_alloc_cmds(struct nvmet_rdma_device *ndev,
  258. int nr_cmds, bool admin)
  259. {
  260. struct nvmet_rdma_cmd *cmds;
  261. int ret = -EINVAL, i;
  262. cmds = kcalloc(nr_cmds, sizeof(struct nvmet_rdma_cmd), GFP_KERNEL);
  263. if (!cmds)
  264. goto out;
  265. for (i = 0; i < nr_cmds; i++) {
  266. ret = nvmet_rdma_alloc_cmd(ndev, cmds + i, admin);
  267. if (ret)
  268. goto out_free;
  269. }
  270. return cmds;
  271. out_free:
  272. while (--i >= 0)
  273. nvmet_rdma_free_cmd(ndev, cmds + i, admin);
  274. kfree(cmds);
  275. out:
  276. return ERR_PTR(ret);
  277. }
  278. static void nvmet_rdma_free_cmds(struct nvmet_rdma_device *ndev,
  279. struct nvmet_rdma_cmd *cmds, int nr_cmds, bool admin)
  280. {
  281. int i;
  282. for (i = 0; i < nr_cmds; i++)
  283. nvmet_rdma_free_cmd(ndev, cmds + i, admin);
  284. kfree(cmds);
  285. }
  286. static int nvmet_rdma_alloc_rsp(struct nvmet_rdma_device *ndev,
  287. struct nvmet_rdma_rsp *r)
  288. {
  289. /* NVMe CQE / RDMA SEND */
  290. r->req.rsp = kmalloc(sizeof(*r->req.rsp), GFP_KERNEL);
  291. if (!r->req.rsp)
  292. goto out;
  293. r->send_sge.addr = ib_dma_map_single(ndev->device, r->req.rsp,
  294. sizeof(*r->req.rsp), DMA_TO_DEVICE);
  295. if (ib_dma_mapping_error(ndev->device, r->send_sge.addr))
  296. goto out_free_rsp;
  297. r->send_sge.length = sizeof(*r->req.rsp);
  298. r->send_sge.lkey = ndev->pd->local_dma_lkey;
  299. r->send_cqe.done = nvmet_rdma_send_done;
  300. r->send_wr.wr_cqe = &r->send_cqe;
  301. r->send_wr.sg_list = &r->send_sge;
  302. r->send_wr.num_sge = 1;
  303. r->send_wr.send_flags = IB_SEND_SIGNALED;
  304. /* Data In / RDMA READ */
  305. r->read_cqe.done = nvmet_rdma_read_data_done;
  306. return 0;
  307. out_free_rsp:
  308. kfree(r->req.rsp);
  309. out:
  310. return -ENOMEM;
  311. }
  312. static void nvmet_rdma_free_rsp(struct nvmet_rdma_device *ndev,
  313. struct nvmet_rdma_rsp *r)
  314. {
  315. ib_dma_unmap_single(ndev->device, r->send_sge.addr,
  316. sizeof(*r->req.rsp), DMA_TO_DEVICE);
  317. kfree(r->req.rsp);
  318. }
  319. static int
  320. nvmet_rdma_alloc_rsps(struct nvmet_rdma_queue *queue)
  321. {
  322. struct nvmet_rdma_device *ndev = queue->dev;
  323. int nr_rsps = queue->recv_queue_size * 2;
  324. int ret = -EINVAL, i;
  325. queue->rsps = kcalloc(nr_rsps, sizeof(struct nvmet_rdma_rsp),
  326. GFP_KERNEL);
  327. if (!queue->rsps)
  328. goto out;
  329. for (i = 0; i < nr_rsps; i++) {
  330. struct nvmet_rdma_rsp *rsp = &queue->rsps[i];
  331. ret = nvmet_rdma_alloc_rsp(ndev, rsp);
  332. if (ret)
  333. goto out_free;
  334. list_add_tail(&rsp->free_list, &queue->free_rsps);
  335. }
  336. return 0;
  337. out_free:
  338. while (--i >= 0) {
  339. struct nvmet_rdma_rsp *rsp = &queue->rsps[i];
  340. list_del(&rsp->free_list);
  341. nvmet_rdma_free_rsp(ndev, rsp);
  342. }
  343. kfree(queue->rsps);
  344. out:
  345. return ret;
  346. }
  347. static void nvmet_rdma_free_rsps(struct nvmet_rdma_queue *queue)
  348. {
  349. struct nvmet_rdma_device *ndev = queue->dev;
  350. int i, nr_rsps = queue->recv_queue_size * 2;
  351. for (i = 0; i < nr_rsps; i++) {
  352. struct nvmet_rdma_rsp *rsp = &queue->rsps[i];
  353. list_del(&rsp->free_list);
  354. nvmet_rdma_free_rsp(ndev, rsp);
  355. }
  356. kfree(queue->rsps);
  357. }
  358. static int nvmet_rdma_post_recv(struct nvmet_rdma_device *ndev,
  359. struct nvmet_rdma_cmd *cmd)
  360. {
  361. struct ib_recv_wr *bad_wr;
  362. ib_dma_sync_single_for_device(ndev->device,
  363. cmd->sge[0].addr, cmd->sge[0].length,
  364. DMA_FROM_DEVICE);
  365. if (ndev->srq)
  366. return ib_post_srq_recv(ndev->srq, &cmd->wr, &bad_wr);
  367. return ib_post_recv(cmd->queue->cm_id->qp, &cmd->wr, &bad_wr);
  368. }
  369. static void nvmet_rdma_process_wr_wait_list(struct nvmet_rdma_queue *queue)
  370. {
  371. spin_lock(&queue->rsp_wr_wait_lock);
  372. while (!list_empty(&queue->rsp_wr_wait_list)) {
  373. struct nvmet_rdma_rsp *rsp;
  374. bool ret;
  375. rsp = list_entry(queue->rsp_wr_wait_list.next,
  376. struct nvmet_rdma_rsp, wait_list);
  377. list_del(&rsp->wait_list);
  378. spin_unlock(&queue->rsp_wr_wait_lock);
  379. ret = nvmet_rdma_execute_command(rsp);
  380. spin_lock(&queue->rsp_wr_wait_lock);
  381. if (!ret) {
  382. list_add(&rsp->wait_list, &queue->rsp_wr_wait_list);
  383. break;
  384. }
  385. }
  386. spin_unlock(&queue->rsp_wr_wait_lock);
  387. }
  388. static void nvmet_rdma_release_rsp(struct nvmet_rdma_rsp *rsp)
  389. {
  390. struct nvmet_rdma_queue *queue = rsp->queue;
  391. atomic_add(1 + rsp->n_rdma, &queue->sq_wr_avail);
  392. if (rsp->n_rdma) {
  393. rdma_rw_ctx_destroy(&rsp->rw, queue->cm_id->qp,
  394. queue->cm_id->port_num, rsp->req.sg,
  395. rsp->req.sg_cnt, nvmet_data_dir(&rsp->req));
  396. }
  397. if (rsp->req.sg != &rsp->cmd->inline_sg)
  398. nvmet_rdma_free_sgl(rsp->req.sg, rsp->req.sg_cnt);
  399. if (unlikely(!list_empty_careful(&queue->rsp_wr_wait_list)))
  400. nvmet_rdma_process_wr_wait_list(queue);
  401. nvmet_rdma_put_rsp(rsp);
  402. }
  403. static void nvmet_rdma_error_comp(struct nvmet_rdma_queue *queue)
  404. {
  405. if (queue->nvme_sq.ctrl) {
  406. nvmet_ctrl_fatal_error(queue->nvme_sq.ctrl);
  407. } else {
  408. /*
  409. * we didn't setup the controller yet in case
  410. * of admin connect error, just disconnect and
  411. * cleanup the queue
  412. */
  413. nvmet_rdma_queue_disconnect(queue);
  414. }
  415. }
  416. static void nvmet_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc)
  417. {
  418. struct nvmet_rdma_rsp *rsp =
  419. container_of(wc->wr_cqe, struct nvmet_rdma_rsp, send_cqe);
  420. nvmet_rdma_release_rsp(rsp);
  421. if (unlikely(wc->status != IB_WC_SUCCESS &&
  422. wc->status != IB_WC_WR_FLUSH_ERR)) {
  423. pr_err("SEND for CQE 0x%p failed with status %s (%d).\n",
  424. wc->wr_cqe, ib_wc_status_msg(wc->status), wc->status);
  425. nvmet_rdma_error_comp(rsp->queue);
  426. }
  427. }
  428. static void nvmet_rdma_queue_response(struct nvmet_req *req)
  429. {
  430. struct nvmet_rdma_rsp *rsp =
  431. container_of(req, struct nvmet_rdma_rsp, req);
  432. struct rdma_cm_id *cm_id = rsp->queue->cm_id;
  433. struct ib_send_wr *first_wr, *bad_wr;
  434. if (rsp->flags & NVMET_RDMA_REQ_INVALIDATE_RKEY) {
  435. rsp->send_wr.opcode = IB_WR_SEND_WITH_INV;
  436. rsp->send_wr.ex.invalidate_rkey = rsp->invalidate_rkey;
  437. } else {
  438. rsp->send_wr.opcode = IB_WR_SEND;
  439. }
  440. if (nvmet_rdma_need_data_out(rsp))
  441. first_wr = rdma_rw_ctx_wrs(&rsp->rw, cm_id->qp,
  442. cm_id->port_num, NULL, &rsp->send_wr);
  443. else
  444. first_wr = &rsp->send_wr;
  445. nvmet_rdma_post_recv(rsp->queue->dev, rsp->cmd);
  446. ib_dma_sync_single_for_device(rsp->queue->dev->device,
  447. rsp->send_sge.addr, rsp->send_sge.length,
  448. DMA_TO_DEVICE);
  449. if (ib_post_send(cm_id->qp, first_wr, &bad_wr)) {
  450. pr_err("sending cmd response failed\n");
  451. nvmet_rdma_release_rsp(rsp);
  452. }
  453. }
  454. static void nvmet_rdma_read_data_done(struct ib_cq *cq, struct ib_wc *wc)
  455. {
  456. struct nvmet_rdma_rsp *rsp =
  457. container_of(wc->wr_cqe, struct nvmet_rdma_rsp, read_cqe);
  458. struct nvmet_rdma_queue *queue = cq->cq_context;
  459. WARN_ON(rsp->n_rdma <= 0);
  460. atomic_add(rsp->n_rdma, &queue->sq_wr_avail);
  461. rdma_rw_ctx_destroy(&rsp->rw, queue->cm_id->qp,
  462. queue->cm_id->port_num, rsp->req.sg,
  463. rsp->req.sg_cnt, nvmet_data_dir(&rsp->req));
  464. rsp->n_rdma = 0;
  465. if (unlikely(wc->status != IB_WC_SUCCESS)) {
  466. nvmet_rdma_release_rsp(rsp);
  467. if (wc->status != IB_WC_WR_FLUSH_ERR) {
  468. pr_info("RDMA READ for CQE 0x%p failed with status %s (%d).\n",
  469. wc->wr_cqe, ib_wc_status_msg(wc->status), wc->status);
  470. nvmet_rdma_error_comp(queue);
  471. }
  472. return;
  473. }
  474. rsp->req.execute(&rsp->req);
  475. }
  476. static void nvmet_rdma_use_inline_sg(struct nvmet_rdma_rsp *rsp, u32 len,
  477. u64 off)
  478. {
  479. sg_init_table(&rsp->cmd->inline_sg, 1);
  480. sg_set_page(&rsp->cmd->inline_sg, rsp->cmd->inline_page, len, off);
  481. rsp->req.sg = &rsp->cmd->inline_sg;
  482. rsp->req.sg_cnt = 1;
  483. }
  484. static u16 nvmet_rdma_map_sgl_inline(struct nvmet_rdma_rsp *rsp)
  485. {
  486. struct nvme_sgl_desc *sgl = &rsp->req.cmd->common.dptr.sgl;
  487. u64 off = le64_to_cpu(sgl->addr);
  488. u32 len = le32_to_cpu(sgl->length);
  489. if (!nvme_is_write(rsp->req.cmd))
  490. return NVME_SC_INVALID_FIELD | NVME_SC_DNR;
  491. if (off + len > NVMET_RDMA_INLINE_DATA_SIZE) {
  492. pr_err("invalid inline data offset!\n");
  493. return NVME_SC_SGL_INVALID_OFFSET | NVME_SC_DNR;
  494. }
  495. /* no data command? */
  496. if (!len)
  497. return 0;
  498. nvmet_rdma_use_inline_sg(rsp, len, off);
  499. rsp->flags |= NVMET_RDMA_REQ_INLINE_DATA;
  500. return 0;
  501. }
  502. static u16 nvmet_rdma_map_sgl_keyed(struct nvmet_rdma_rsp *rsp,
  503. struct nvme_keyed_sgl_desc *sgl, bool invalidate)
  504. {
  505. struct rdma_cm_id *cm_id = rsp->queue->cm_id;
  506. u64 addr = le64_to_cpu(sgl->addr);
  507. u32 len = get_unaligned_le24(sgl->length);
  508. u32 key = get_unaligned_le32(sgl->key);
  509. int ret;
  510. u16 status;
  511. /* no data command? */
  512. if (!len)
  513. return 0;
  514. status = nvmet_rdma_alloc_sgl(&rsp->req.sg, &rsp->req.sg_cnt,
  515. len);
  516. if (status)
  517. return status;
  518. ret = rdma_rw_ctx_init(&rsp->rw, cm_id->qp, cm_id->port_num,
  519. rsp->req.sg, rsp->req.sg_cnt, 0, addr, key,
  520. nvmet_data_dir(&rsp->req));
  521. if (ret < 0)
  522. return NVME_SC_INTERNAL;
  523. rsp->n_rdma += ret;
  524. if (invalidate) {
  525. rsp->invalidate_rkey = key;
  526. rsp->flags |= NVMET_RDMA_REQ_INVALIDATE_RKEY;
  527. }
  528. return 0;
  529. }
  530. static u16 nvmet_rdma_map_sgl(struct nvmet_rdma_rsp *rsp)
  531. {
  532. struct nvme_keyed_sgl_desc *sgl = &rsp->req.cmd->common.dptr.ksgl;
  533. switch (sgl->type >> 4) {
  534. case NVME_SGL_FMT_DATA_DESC:
  535. switch (sgl->type & 0xf) {
  536. case NVME_SGL_FMT_OFFSET:
  537. return nvmet_rdma_map_sgl_inline(rsp);
  538. default:
  539. pr_err("invalid SGL subtype: %#x\n", sgl->type);
  540. return NVME_SC_INVALID_FIELD | NVME_SC_DNR;
  541. }
  542. case NVME_KEY_SGL_FMT_DATA_DESC:
  543. switch (sgl->type & 0xf) {
  544. case NVME_SGL_FMT_ADDRESS | NVME_SGL_FMT_INVALIDATE:
  545. return nvmet_rdma_map_sgl_keyed(rsp, sgl, true);
  546. case NVME_SGL_FMT_ADDRESS:
  547. return nvmet_rdma_map_sgl_keyed(rsp, sgl, false);
  548. default:
  549. pr_err("invalid SGL subtype: %#x\n", sgl->type);
  550. return NVME_SC_INVALID_FIELD | NVME_SC_DNR;
  551. }
  552. default:
  553. pr_err("invalid SGL type: %#x\n", sgl->type);
  554. return NVME_SC_SGL_INVALID_TYPE | NVME_SC_DNR;
  555. }
  556. }
  557. static bool nvmet_rdma_execute_command(struct nvmet_rdma_rsp *rsp)
  558. {
  559. struct nvmet_rdma_queue *queue = rsp->queue;
  560. if (unlikely(atomic_sub_return(1 + rsp->n_rdma,
  561. &queue->sq_wr_avail) < 0)) {
  562. pr_debug("IB send queue full (needed %d): queue %u cntlid %u\n",
  563. 1 + rsp->n_rdma, queue->idx,
  564. queue->nvme_sq.ctrl->cntlid);
  565. atomic_add(1 + rsp->n_rdma, &queue->sq_wr_avail);
  566. return false;
  567. }
  568. if (nvmet_rdma_need_data_in(rsp)) {
  569. if (rdma_rw_ctx_post(&rsp->rw, queue->cm_id->qp,
  570. queue->cm_id->port_num, &rsp->read_cqe, NULL))
  571. nvmet_req_complete(&rsp->req, NVME_SC_DATA_XFER_ERROR);
  572. } else {
  573. rsp->req.execute(&rsp->req);
  574. }
  575. return true;
  576. }
  577. static void nvmet_rdma_handle_command(struct nvmet_rdma_queue *queue,
  578. struct nvmet_rdma_rsp *cmd)
  579. {
  580. u16 status;
  581. cmd->queue = queue;
  582. cmd->n_rdma = 0;
  583. cmd->req.port = queue->port;
  584. ib_dma_sync_single_for_cpu(queue->dev->device,
  585. cmd->cmd->sge[0].addr, cmd->cmd->sge[0].length,
  586. DMA_FROM_DEVICE);
  587. ib_dma_sync_single_for_cpu(queue->dev->device,
  588. cmd->send_sge.addr, cmd->send_sge.length,
  589. DMA_TO_DEVICE);
  590. if (!nvmet_req_init(&cmd->req, &queue->nvme_cq,
  591. &queue->nvme_sq, &nvmet_rdma_ops))
  592. return;
  593. status = nvmet_rdma_map_sgl(cmd);
  594. if (status)
  595. goto out_err;
  596. if (unlikely(!nvmet_rdma_execute_command(cmd))) {
  597. spin_lock(&queue->rsp_wr_wait_lock);
  598. list_add_tail(&cmd->wait_list, &queue->rsp_wr_wait_list);
  599. spin_unlock(&queue->rsp_wr_wait_lock);
  600. }
  601. return;
  602. out_err:
  603. nvmet_req_complete(&cmd->req, status);
  604. }
  605. static void nvmet_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc)
  606. {
  607. struct nvmet_rdma_cmd *cmd =
  608. container_of(wc->wr_cqe, struct nvmet_rdma_cmd, cqe);
  609. struct nvmet_rdma_queue *queue = cq->cq_context;
  610. struct nvmet_rdma_rsp *rsp;
  611. if (unlikely(wc->status != IB_WC_SUCCESS)) {
  612. if (wc->status != IB_WC_WR_FLUSH_ERR) {
  613. pr_err("RECV for CQE 0x%p failed with status %s (%d)\n",
  614. wc->wr_cqe, ib_wc_status_msg(wc->status),
  615. wc->status);
  616. nvmet_rdma_error_comp(queue);
  617. }
  618. return;
  619. }
  620. if (unlikely(wc->byte_len < sizeof(struct nvme_command))) {
  621. pr_err("Ctrl Fatal Error: capsule size less than 64 bytes\n");
  622. nvmet_rdma_error_comp(queue);
  623. return;
  624. }
  625. cmd->queue = queue;
  626. rsp = nvmet_rdma_get_rsp(queue);
  627. rsp->cmd = cmd;
  628. rsp->flags = 0;
  629. rsp->req.cmd = cmd->nvme_cmd;
  630. if (unlikely(queue->state != NVMET_RDMA_Q_LIVE)) {
  631. unsigned long flags;
  632. spin_lock_irqsave(&queue->state_lock, flags);
  633. if (queue->state == NVMET_RDMA_Q_CONNECTING)
  634. list_add_tail(&rsp->wait_list, &queue->rsp_wait_list);
  635. else
  636. nvmet_rdma_put_rsp(rsp);
  637. spin_unlock_irqrestore(&queue->state_lock, flags);
  638. return;
  639. }
  640. nvmet_rdma_handle_command(queue, rsp);
  641. }
  642. static void nvmet_rdma_destroy_srq(struct nvmet_rdma_device *ndev)
  643. {
  644. if (!ndev->srq)
  645. return;
  646. nvmet_rdma_free_cmds(ndev, ndev->srq_cmds, ndev->srq_size, false);
  647. ib_destroy_srq(ndev->srq);
  648. }
  649. static int nvmet_rdma_init_srq(struct nvmet_rdma_device *ndev)
  650. {
  651. struct ib_srq_init_attr srq_attr = { NULL, };
  652. struct ib_srq *srq;
  653. size_t srq_size;
  654. int ret, i;
  655. srq_size = 4095; /* XXX: tune */
  656. srq_attr.attr.max_wr = srq_size;
  657. srq_attr.attr.max_sge = 2;
  658. srq_attr.attr.srq_limit = 0;
  659. srq_attr.srq_type = IB_SRQT_BASIC;
  660. srq = ib_create_srq(ndev->pd, &srq_attr);
  661. if (IS_ERR(srq)) {
  662. /*
  663. * If SRQs aren't supported we just go ahead and use normal
  664. * non-shared receive queues.
  665. */
  666. pr_info("SRQ requested but not supported.\n");
  667. return 0;
  668. }
  669. ndev->srq_cmds = nvmet_rdma_alloc_cmds(ndev, srq_size, false);
  670. if (IS_ERR(ndev->srq_cmds)) {
  671. ret = PTR_ERR(ndev->srq_cmds);
  672. goto out_destroy_srq;
  673. }
  674. ndev->srq = srq;
  675. ndev->srq_size = srq_size;
  676. for (i = 0; i < srq_size; i++)
  677. nvmet_rdma_post_recv(ndev, &ndev->srq_cmds[i]);
  678. return 0;
  679. out_destroy_srq:
  680. ib_destroy_srq(srq);
  681. return ret;
  682. }
  683. static void nvmet_rdma_free_dev(struct kref *ref)
  684. {
  685. struct nvmet_rdma_device *ndev =
  686. container_of(ref, struct nvmet_rdma_device, ref);
  687. mutex_lock(&device_list_mutex);
  688. list_del(&ndev->entry);
  689. mutex_unlock(&device_list_mutex);
  690. nvmet_rdma_destroy_srq(ndev);
  691. ib_dealloc_pd(ndev->pd);
  692. kfree(ndev);
  693. }
  694. static struct nvmet_rdma_device *
  695. nvmet_rdma_find_get_device(struct rdma_cm_id *cm_id)
  696. {
  697. struct nvmet_rdma_device *ndev;
  698. int ret;
  699. mutex_lock(&device_list_mutex);
  700. list_for_each_entry(ndev, &device_list, entry) {
  701. if (ndev->device->node_guid == cm_id->device->node_guid &&
  702. kref_get_unless_zero(&ndev->ref))
  703. goto out_unlock;
  704. }
  705. ndev = kzalloc(sizeof(*ndev), GFP_KERNEL);
  706. if (!ndev)
  707. goto out_err;
  708. ndev->device = cm_id->device;
  709. kref_init(&ndev->ref);
  710. ndev->pd = ib_alloc_pd(ndev->device, 0);
  711. if (IS_ERR(ndev->pd))
  712. goto out_free_dev;
  713. if (nvmet_rdma_use_srq) {
  714. ret = nvmet_rdma_init_srq(ndev);
  715. if (ret)
  716. goto out_free_pd;
  717. }
  718. list_add(&ndev->entry, &device_list);
  719. out_unlock:
  720. mutex_unlock(&device_list_mutex);
  721. pr_debug("added %s.\n", ndev->device->name);
  722. return ndev;
  723. out_free_pd:
  724. ib_dealloc_pd(ndev->pd);
  725. out_free_dev:
  726. kfree(ndev);
  727. out_err:
  728. mutex_unlock(&device_list_mutex);
  729. return NULL;
  730. }
  731. static int nvmet_rdma_create_queue_ib(struct nvmet_rdma_queue *queue)
  732. {
  733. struct ib_qp_init_attr qp_attr;
  734. struct nvmet_rdma_device *ndev = queue->dev;
  735. int comp_vector, nr_cqe, ret, i;
  736. /*
  737. * Spread the io queues across completion vectors,
  738. * but still keep all admin queues on vector 0.
  739. */
  740. comp_vector = !queue->host_qid ? 0 :
  741. queue->idx % ndev->device->num_comp_vectors;
  742. /*
  743. * Reserve CQ slots for RECV + RDMA_READ/RDMA_WRITE + RDMA_SEND.
  744. */
  745. nr_cqe = queue->recv_queue_size + 2 * queue->send_queue_size;
  746. queue->cq = ib_alloc_cq(ndev->device, queue,
  747. nr_cqe + 1, comp_vector,
  748. IB_POLL_WORKQUEUE);
  749. if (IS_ERR(queue->cq)) {
  750. ret = PTR_ERR(queue->cq);
  751. pr_err("failed to create CQ cqe= %d ret= %d\n",
  752. nr_cqe + 1, ret);
  753. goto out;
  754. }
  755. memset(&qp_attr, 0, sizeof(qp_attr));
  756. qp_attr.qp_context = queue;
  757. qp_attr.event_handler = nvmet_rdma_qp_event;
  758. qp_attr.send_cq = queue->cq;
  759. qp_attr.recv_cq = queue->cq;
  760. qp_attr.sq_sig_type = IB_SIGNAL_REQ_WR;
  761. qp_attr.qp_type = IB_QPT_RC;
  762. /* +1 for drain */
  763. qp_attr.cap.max_send_wr = queue->send_queue_size + 1;
  764. qp_attr.cap.max_rdma_ctxs = queue->send_queue_size;
  765. qp_attr.cap.max_send_sge = max(ndev->device->attrs.max_sge_rd,
  766. ndev->device->attrs.max_sge);
  767. if (ndev->srq) {
  768. qp_attr.srq = ndev->srq;
  769. } else {
  770. /* +1 for drain */
  771. qp_attr.cap.max_recv_wr = 1 + queue->recv_queue_size;
  772. qp_attr.cap.max_recv_sge = 2;
  773. }
  774. ret = rdma_create_qp(queue->cm_id, ndev->pd, &qp_attr);
  775. if (ret) {
  776. pr_err("failed to create_qp ret= %d\n", ret);
  777. goto err_destroy_cq;
  778. }
  779. atomic_set(&queue->sq_wr_avail, qp_attr.cap.max_send_wr);
  780. pr_debug("%s: max_cqe= %d max_sge= %d sq_size = %d cm_id= %p\n",
  781. __func__, queue->cq->cqe, qp_attr.cap.max_send_sge,
  782. qp_attr.cap.max_send_wr, queue->cm_id);
  783. if (!ndev->srq) {
  784. for (i = 0; i < queue->recv_queue_size; i++) {
  785. queue->cmds[i].queue = queue;
  786. nvmet_rdma_post_recv(ndev, &queue->cmds[i]);
  787. }
  788. }
  789. out:
  790. return ret;
  791. err_destroy_cq:
  792. ib_free_cq(queue->cq);
  793. goto out;
  794. }
  795. static void nvmet_rdma_destroy_queue_ib(struct nvmet_rdma_queue *queue)
  796. {
  797. ib_drain_qp(queue->cm_id->qp);
  798. rdma_destroy_qp(queue->cm_id);
  799. ib_free_cq(queue->cq);
  800. }
  801. static void nvmet_rdma_free_queue(struct nvmet_rdma_queue *queue)
  802. {
  803. pr_info("freeing queue %d\n", queue->idx);
  804. nvmet_sq_destroy(&queue->nvme_sq);
  805. nvmet_rdma_destroy_queue_ib(queue);
  806. if (!queue->dev->srq) {
  807. nvmet_rdma_free_cmds(queue->dev, queue->cmds,
  808. queue->recv_queue_size,
  809. !queue->host_qid);
  810. }
  811. nvmet_rdma_free_rsps(queue);
  812. ida_simple_remove(&nvmet_rdma_queue_ida, queue->idx);
  813. kfree(queue);
  814. }
  815. static void nvmet_rdma_release_queue_work(struct work_struct *w)
  816. {
  817. struct nvmet_rdma_queue *queue =
  818. container_of(w, struct nvmet_rdma_queue, release_work);
  819. struct rdma_cm_id *cm_id = queue->cm_id;
  820. struct nvmet_rdma_device *dev = queue->dev;
  821. enum nvmet_rdma_queue_state state = queue->state;
  822. nvmet_rdma_free_queue(queue);
  823. if (state != NVMET_RDMA_IN_DEVICE_REMOVAL)
  824. rdma_destroy_id(cm_id);
  825. kref_put(&dev->ref, nvmet_rdma_free_dev);
  826. }
  827. static int
  828. nvmet_rdma_parse_cm_connect_req(struct rdma_conn_param *conn,
  829. struct nvmet_rdma_queue *queue)
  830. {
  831. struct nvme_rdma_cm_req *req;
  832. req = (struct nvme_rdma_cm_req *)conn->private_data;
  833. if (!req || conn->private_data_len == 0)
  834. return NVME_RDMA_CM_INVALID_LEN;
  835. if (le16_to_cpu(req->recfmt) != NVME_RDMA_CM_FMT_1_0)
  836. return NVME_RDMA_CM_INVALID_RECFMT;
  837. queue->host_qid = le16_to_cpu(req->qid);
  838. /*
  839. * req->hsqsize corresponds to our recv queue size plus 1
  840. * req->hrqsize corresponds to our send queue size
  841. */
  842. queue->recv_queue_size = le16_to_cpu(req->hsqsize) + 1;
  843. queue->send_queue_size = le16_to_cpu(req->hrqsize);
  844. if (!queue->host_qid && queue->recv_queue_size > NVMF_AQ_DEPTH)
  845. return NVME_RDMA_CM_INVALID_HSQSIZE;
  846. /* XXX: Should we enforce some kind of max for IO queues? */
  847. return 0;
  848. }
  849. static int nvmet_rdma_cm_reject(struct rdma_cm_id *cm_id,
  850. enum nvme_rdma_cm_status status)
  851. {
  852. struct nvme_rdma_cm_rej rej;
  853. rej.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0);
  854. rej.sts = cpu_to_le16(status);
  855. return rdma_reject(cm_id, (void *)&rej, sizeof(rej));
  856. }
  857. static struct nvmet_rdma_queue *
  858. nvmet_rdma_alloc_queue(struct nvmet_rdma_device *ndev,
  859. struct rdma_cm_id *cm_id,
  860. struct rdma_cm_event *event)
  861. {
  862. struct nvmet_rdma_queue *queue;
  863. int ret;
  864. queue = kzalloc(sizeof(*queue), GFP_KERNEL);
  865. if (!queue) {
  866. ret = NVME_RDMA_CM_NO_RSC;
  867. goto out_reject;
  868. }
  869. ret = nvmet_sq_init(&queue->nvme_sq);
  870. if (ret)
  871. goto out_free_queue;
  872. ret = nvmet_rdma_parse_cm_connect_req(&event->param.conn, queue);
  873. if (ret)
  874. goto out_destroy_sq;
  875. /*
  876. * Schedules the actual release because calling rdma_destroy_id from
  877. * inside a CM callback would trigger a deadlock. (great API design..)
  878. */
  879. INIT_WORK(&queue->release_work, nvmet_rdma_release_queue_work);
  880. queue->dev = ndev;
  881. queue->cm_id = cm_id;
  882. spin_lock_init(&queue->state_lock);
  883. queue->state = NVMET_RDMA_Q_CONNECTING;
  884. INIT_LIST_HEAD(&queue->rsp_wait_list);
  885. INIT_LIST_HEAD(&queue->rsp_wr_wait_list);
  886. spin_lock_init(&queue->rsp_wr_wait_lock);
  887. INIT_LIST_HEAD(&queue->free_rsps);
  888. spin_lock_init(&queue->rsps_lock);
  889. INIT_LIST_HEAD(&queue->queue_list);
  890. queue->idx = ida_simple_get(&nvmet_rdma_queue_ida, 0, 0, GFP_KERNEL);
  891. if (queue->idx < 0) {
  892. ret = NVME_RDMA_CM_NO_RSC;
  893. goto out_free_queue;
  894. }
  895. ret = nvmet_rdma_alloc_rsps(queue);
  896. if (ret) {
  897. ret = NVME_RDMA_CM_NO_RSC;
  898. goto out_ida_remove;
  899. }
  900. if (!ndev->srq) {
  901. queue->cmds = nvmet_rdma_alloc_cmds(ndev,
  902. queue->recv_queue_size,
  903. !queue->host_qid);
  904. if (IS_ERR(queue->cmds)) {
  905. ret = NVME_RDMA_CM_NO_RSC;
  906. goto out_free_responses;
  907. }
  908. }
  909. ret = nvmet_rdma_create_queue_ib(queue);
  910. if (ret) {
  911. pr_err("%s: creating RDMA queue failed (%d).\n",
  912. __func__, ret);
  913. ret = NVME_RDMA_CM_NO_RSC;
  914. goto out_free_cmds;
  915. }
  916. return queue;
  917. out_free_cmds:
  918. if (!ndev->srq) {
  919. nvmet_rdma_free_cmds(queue->dev, queue->cmds,
  920. queue->recv_queue_size,
  921. !queue->host_qid);
  922. }
  923. out_free_responses:
  924. nvmet_rdma_free_rsps(queue);
  925. out_ida_remove:
  926. ida_simple_remove(&nvmet_rdma_queue_ida, queue->idx);
  927. out_destroy_sq:
  928. nvmet_sq_destroy(&queue->nvme_sq);
  929. out_free_queue:
  930. kfree(queue);
  931. out_reject:
  932. nvmet_rdma_cm_reject(cm_id, ret);
  933. return NULL;
  934. }
  935. static void nvmet_rdma_qp_event(struct ib_event *event, void *priv)
  936. {
  937. struct nvmet_rdma_queue *queue = priv;
  938. switch (event->event) {
  939. case IB_EVENT_COMM_EST:
  940. rdma_notify(queue->cm_id, event->event);
  941. break;
  942. default:
  943. pr_err("received unrecognized IB QP event %d\n", event->event);
  944. break;
  945. }
  946. }
  947. static int nvmet_rdma_cm_accept(struct rdma_cm_id *cm_id,
  948. struct nvmet_rdma_queue *queue,
  949. struct rdma_conn_param *p)
  950. {
  951. struct rdma_conn_param param = { };
  952. struct nvme_rdma_cm_rep priv = { };
  953. int ret = -ENOMEM;
  954. param.rnr_retry_count = 7;
  955. param.flow_control = 1;
  956. param.initiator_depth = min_t(u8, p->initiator_depth,
  957. queue->dev->device->attrs.max_qp_init_rd_atom);
  958. param.private_data = &priv;
  959. param.private_data_len = sizeof(priv);
  960. priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0);
  961. priv.crqsize = cpu_to_le16(queue->recv_queue_size);
  962. ret = rdma_accept(cm_id, &param);
  963. if (ret)
  964. pr_err("rdma_accept failed (error code = %d)\n", ret);
  965. return ret;
  966. }
  967. static int nvmet_rdma_queue_connect(struct rdma_cm_id *cm_id,
  968. struct rdma_cm_event *event)
  969. {
  970. struct nvmet_rdma_device *ndev;
  971. struct nvmet_rdma_queue *queue;
  972. int ret = -EINVAL;
  973. ndev = nvmet_rdma_find_get_device(cm_id);
  974. if (!ndev) {
  975. pr_err("no client data!\n");
  976. nvmet_rdma_cm_reject(cm_id, NVME_RDMA_CM_NO_RSC);
  977. return -ECONNREFUSED;
  978. }
  979. queue = nvmet_rdma_alloc_queue(ndev, cm_id, event);
  980. if (!queue) {
  981. ret = -ENOMEM;
  982. goto put_device;
  983. }
  984. queue->port = cm_id->context;
  985. ret = nvmet_rdma_cm_accept(cm_id, queue, &event->param.conn);
  986. if (ret)
  987. goto release_queue;
  988. mutex_lock(&nvmet_rdma_queue_mutex);
  989. list_add_tail(&queue->queue_list, &nvmet_rdma_queue_list);
  990. mutex_unlock(&nvmet_rdma_queue_mutex);
  991. return 0;
  992. release_queue:
  993. nvmet_rdma_free_queue(queue);
  994. put_device:
  995. kref_put(&ndev->ref, nvmet_rdma_free_dev);
  996. return ret;
  997. }
  998. static void nvmet_rdma_queue_established(struct nvmet_rdma_queue *queue)
  999. {
  1000. unsigned long flags;
  1001. spin_lock_irqsave(&queue->state_lock, flags);
  1002. if (queue->state != NVMET_RDMA_Q_CONNECTING) {
  1003. pr_warn("trying to establish a connected queue\n");
  1004. goto out_unlock;
  1005. }
  1006. queue->state = NVMET_RDMA_Q_LIVE;
  1007. while (!list_empty(&queue->rsp_wait_list)) {
  1008. struct nvmet_rdma_rsp *cmd;
  1009. cmd = list_first_entry(&queue->rsp_wait_list,
  1010. struct nvmet_rdma_rsp, wait_list);
  1011. list_del(&cmd->wait_list);
  1012. spin_unlock_irqrestore(&queue->state_lock, flags);
  1013. nvmet_rdma_handle_command(queue, cmd);
  1014. spin_lock_irqsave(&queue->state_lock, flags);
  1015. }
  1016. out_unlock:
  1017. spin_unlock_irqrestore(&queue->state_lock, flags);
  1018. }
  1019. static void __nvmet_rdma_queue_disconnect(struct nvmet_rdma_queue *queue)
  1020. {
  1021. bool disconnect = false;
  1022. unsigned long flags;
  1023. pr_debug("cm_id= %p queue->state= %d\n", queue->cm_id, queue->state);
  1024. spin_lock_irqsave(&queue->state_lock, flags);
  1025. switch (queue->state) {
  1026. case NVMET_RDMA_Q_CONNECTING:
  1027. case NVMET_RDMA_Q_LIVE:
  1028. queue->state = NVMET_RDMA_Q_DISCONNECTING;
  1029. case NVMET_RDMA_IN_DEVICE_REMOVAL:
  1030. disconnect = true;
  1031. break;
  1032. case NVMET_RDMA_Q_DISCONNECTING:
  1033. break;
  1034. }
  1035. spin_unlock_irqrestore(&queue->state_lock, flags);
  1036. if (disconnect) {
  1037. rdma_disconnect(queue->cm_id);
  1038. schedule_work(&queue->release_work);
  1039. }
  1040. }
  1041. static void nvmet_rdma_queue_disconnect(struct nvmet_rdma_queue *queue)
  1042. {
  1043. bool disconnect = false;
  1044. mutex_lock(&nvmet_rdma_queue_mutex);
  1045. if (!list_empty(&queue->queue_list)) {
  1046. list_del_init(&queue->queue_list);
  1047. disconnect = true;
  1048. }
  1049. mutex_unlock(&nvmet_rdma_queue_mutex);
  1050. if (disconnect)
  1051. __nvmet_rdma_queue_disconnect(queue);
  1052. }
  1053. static void nvmet_rdma_queue_connect_fail(struct rdma_cm_id *cm_id,
  1054. struct nvmet_rdma_queue *queue)
  1055. {
  1056. WARN_ON_ONCE(queue->state != NVMET_RDMA_Q_CONNECTING);
  1057. mutex_lock(&nvmet_rdma_queue_mutex);
  1058. if (!list_empty(&queue->queue_list))
  1059. list_del_init(&queue->queue_list);
  1060. mutex_unlock(&nvmet_rdma_queue_mutex);
  1061. pr_err("failed to connect queue %d\n", queue->idx);
  1062. schedule_work(&queue->release_work);
  1063. }
  1064. /**
  1065. * nvme_rdma_device_removal() - Handle RDMA device removal
  1066. * @queue: nvmet rdma queue (cm id qp_context)
  1067. * @addr: nvmet address (cm_id context)
  1068. *
  1069. * DEVICE_REMOVAL event notifies us that the RDMA device is about
  1070. * to unplug so we should take care of destroying our RDMA resources.
  1071. * This event will be generated for each allocated cm_id.
  1072. *
  1073. * Note that this event can be generated on a normal queue cm_id
  1074. * and/or a device bound listener cm_id (where in this case
  1075. * queue will be null).
  1076. *
  1077. * we claim ownership on destroying the cm_id. For queues we move
  1078. * the queue state to NVMET_RDMA_IN_DEVICE_REMOVAL and for port
  1079. * we nullify the priv to prevent double cm_id destruction and destroying
  1080. * the cm_id implicitely by returning a non-zero rc to the callout.
  1081. */
  1082. static int nvmet_rdma_device_removal(struct rdma_cm_id *cm_id,
  1083. struct nvmet_rdma_queue *queue)
  1084. {
  1085. unsigned long flags;
  1086. if (!queue) {
  1087. struct nvmet_port *port = cm_id->context;
  1088. /*
  1089. * This is a listener cm_id. Make sure that
  1090. * future remove_port won't invoke a double
  1091. * cm_id destroy. use atomic xchg to make sure
  1092. * we don't compete with remove_port.
  1093. */
  1094. if (xchg(&port->priv, NULL) != cm_id)
  1095. return 0;
  1096. } else {
  1097. /*
  1098. * This is a queue cm_id. Make sure that
  1099. * release queue will not destroy the cm_id
  1100. * and schedule all ctrl queues removal (only
  1101. * if the queue is not disconnecting already).
  1102. */
  1103. spin_lock_irqsave(&queue->state_lock, flags);
  1104. if (queue->state != NVMET_RDMA_Q_DISCONNECTING)
  1105. queue->state = NVMET_RDMA_IN_DEVICE_REMOVAL;
  1106. spin_unlock_irqrestore(&queue->state_lock, flags);
  1107. nvmet_rdma_queue_disconnect(queue);
  1108. flush_scheduled_work();
  1109. }
  1110. /*
  1111. * We need to return 1 so that the core will destroy
  1112. * it's own ID. What a great API design..
  1113. */
  1114. return 1;
  1115. }
  1116. static int nvmet_rdma_cm_handler(struct rdma_cm_id *cm_id,
  1117. struct rdma_cm_event *event)
  1118. {
  1119. struct nvmet_rdma_queue *queue = NULL;
  1120. int ret = 0;
  1121. if (cm_id->qp)
  1122. queue = cm_id->qp->qp_context;
  1123. pr_debug("%s (%d): status %d id %p\n",
  1124. rdma_event_msg(event->event), event->event,
  1125. event->status, cm_id);
  1126. switch (event->event) {
  1127. case RDMA_CM_EVENT_CONNECT_REQUEST:
  1128. ret = nvmet_rdma_queue_connect(cm_id, event);
  1129. break;
  1130. case RDMA_CM_EVENT_ESTABLISHED:
  1131. nvmet_rdma_queue_established(queue);
  1132. break;
  1133. case RDMA_CM_EVENT_ADDR_CHANGE:
  1134. case RDMA_CM_EVENT_DISCONNECTED:
  1135. case RDMA_CM_EVENT_TIMEWAIT_EXIT:
  1136. /*
  1137. * We might end up here when we already freed the qp
  1138. * which means queue release sequence is in progress,
  1139. * so don't get in the way...
  1140. */
  1141. if (queue)
  1142. nvmet_rdma_queue_disconnect(queue);
  1143. break;
  1144. case RDMA_CM_EVENT_DEVICE_REMOVAL:
  1145. ret = nvmet_rdma_device_removal(cm_id, queue);
  1146. break;
  1147. case RDMA_CM_EVENT_REJECTED:
  1148. case RDMA_CM_EVENT_UNREACHABLE:
  1149. case RDMA_CM_EVENT_CONNECT_ERROR:
  1150. nvmet_rdma_queue_connect_fail(cm_id, queue);
  1151. break;
  1152. default:
  1153. pr_err("received unrecognized RDMA CM event %d\n",
  1154. event->event);
  1155. break;
  1156. }
  1157. return ret;
  1158. }
  1159. static void nvmet_rdma_delete_ctrl(struct nvmet_ctrl *ctrl)
  1160. {
  1161. struct nvmet_rdma_queue *queue;
  1162. restart:
  1163. mutex_lock(&nvmet_rdma_queue_mutex);
  1164. list_for_each_entry(queue, &nvmet_rdma_queue_list, queue_list) {
  1165. if (queue->nvme_sq.ctrl == ctrl) {
  1166. list_del_init(&queue->queue_list);
  1167. mutex_unlock(&nvmet_rdma_queue_mutex);
  1168. __nvmet_rdma_queue_disconnect(queue);
  1169. goto restart;
  1170. }
  1171. }
  1172. mutex_unlock(&nvmet_rdma_queue_mutex);
  1173. }
  1174. static int nvmet_rdma_add_port(struct nvmet_port *port)
  1175. {
  1176. struct rdma_cm_id *cm_id;
  1177. struct sockaddr_in addr_in;
  1178. u16 port_in;
  1179. int ret;
  1180. switch (port->disc_addr.adrfam) {
  1181. case NVMF_ADDR_FAMILY_IP4:
  1182. break;
  1183. default:
  1184. pr_err("address family %d not supported\n",
  1185. port->disc_addr.adrfam);
  1186. return -EINVAL;
  1187. }
  1188. ret = kstrtou16(port->disc_addr.trsvcid, 0, &port_in);
  1189. if (ret)
  1190. return ret;
  1191. addr_in.sin_family = AF_INET;
  1192. addr_in.sin_addr.s_addr = in_aton(port->disc_addr.traddr);
  1193. addr_in.sin_port = htons(port_in);
  1194. cm_id = rdma_create_id(&init_net, nvmet_rdma_cm_handler, port,
  1195. RDMA_PS_TCP, IB_QPT_RC);
  1196. if (IS_ERR(cm_id)) {
  1197. pr_err("CM ID creation failed\n");
  1198. return PTR_ERR(cm_id);
  1199. }
  1200. ret = rdma_bind_addr(cm_id, (struct sockaddr *)&addr_in);
  1201. if (ret) {
  1202. pr_err("binding CM ID to %pISpc failed (%d)\n", &addr_in, ret);
  1203. goto out_destroy_id;
  1204. }
  1205. ret = rdma_listen(cm_id, 128);
  1206. if (ret) {
  1207. pr_err("listening to %pISpc failed (%d)\n", &addr_in, ret);
  1208. goto out_destroy_id;
  1209. }
  1210. pr_info("enabling port %d (%pISpc)\n",
  1211. le16_to_cpu(port->disc_addr.portid), &addr_in);
  1212. port->priv = cm_id;
  1213. return 0;
  1214. out_destroy_id:
  1215. rdma_destroy_id(cm_id);
  1216. return ret;
  1217. }
  1218. static void nvmet_rdma_remove_port(struct nvmet_port *port)
  1219. {
  1220. struct rdma_cm_id *cm_id = xchg(&port->priv, NULL);
  1221. if (cm_id)
  1222. rdma_destroy_id(cm_id);
  1223. }
  1224. static struct nvmet_fabrics_ops nvmet_rdma_ops = {
  1225. .owner = THIS_MODULE,
  1226. .type = NVMF_TRTYPE_RDMA,
  1227. .sqe_inline_size = NVMET_RDMA_INLINE_DATA_SIZE,
  1228. .msdbd = 1,
  1229. .has_keyed_sgls = 1,
  1230. .add_port = nvmet_rdma_add_port,
  1231. .remove_port = nvmet_rdma_remove_port,
  1232. .queue_response = nvmet_rdma_queue_response,
  1233. .delete_ctrl = nvmet_rdma_delete_ctrl,
  1234. };
  1235. static int __init nvmet_rdma_init(void)
  1236. {
  1237. return nvmet_register_transport(&nvmet_rdma_ops);
  1238. }
  1239. static void __exit nvmet_rdma_exit(void)
  1240. {
  1241. struct nvmet_rdma_queue *queue;
  1242. nvmet_unregister_transport(&nvmet_rdma_ops);
  1243. flush_scheduled_work();
  1244. mutex_lock(&nvmet_rdma_queue_mutex);
  1245. while ((queue = list_first_entry_or_null(&nvmet_rdma_queue_list,
  1246. struct nvmet_rdma_queue, queue_list))) {
  1247. list_del_init(&queue->queue_list);
  1248. mutex_unlock(&nvmet_rdma_queue_mutex);
  1249. __nvmet_rdma_queue_disconnect(queue);
  1250. mutex_lock(&nvmet_rdma_queue_mutex);
  1251. }
  1252. mutex_unlock(&nvmet_rdma_queue_mutex);
  1253. flush_scheduled_work();
  1254. ida_destroy(&nvmet_rdma_queue_ida);
  1255. }
  1256. module_init(nvmet_rdma_init);
  1257. module_exit(nvmet_rdma_exit);
  1258. MODULE_LICENSE("GPL v2");
  1259. MODULE_ALIAS("nvmet-transport-1"); /* 1 == NVMF_TRTYPE_RDMA */