janz-ican3.c 50 KB

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  1. /*
  2. * Janz MODULbus VMOD-ICAN3 CAN Interface Driver
  3. *
  4. * Copyright (c) 2010 Ira W. Snyder <iws@ovro.caltech.edu>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/module.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/delay.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/netdevice.h>
  17. #include <linux/can.h>
  18. #include <linux/can/dev.h>
  19. #include <linux/can/skb.h>
  20. #include <linux/can/error.h>
  21. #include <linux/mfd/janz.h>
  22. #include <asm/io.h>
  23. /* the DPM has 64k of memory, organized into 256x 256 byte pages */
  24. #define DPM_NUM_PAGES 256
  25. #define DPM_PAGE_SIZE 256
  26. #define DPM_PAGE_ADDR(p) ((p) * DPM_PAGE_SIZE)
  27. /* JANZ ICAN3 "old-style" host interface queue page numbers */
  28. #define QUEUE_OLD_CONTROL 0
  29. #define QUEUE_OLD_RB0 1
  30. #define QUEUE_OLD_RB1 2
  31. #define QUEUE_OLD_WB0 3
  32. #define QUEUE_OLD_WB1 4
  33. /* Janz ICAN3 "old-style" host interface control registers */
  34. #define MSYNC_PEER 0x00 /* ICAN only */
  35. #define MSYNC_LOCL 0x01 /* host only */
  36. #define TARGET_RUNNING 0x02
  37. #define FIRMWARE_STAMP 0x60 /* big endian firmware stamp */
  38. #define MSYNC_RB0 0x01
  39. #define MSYNC_RB1 0x02
  40. #define MSYNC_RBLW 0x04
  41. #define MSYNC_RB_MASK (MSYNC_RB0 | MSYNC_RB1)
  42. #define MSYNC_WB0 0x10
  43. #define MSYNC_WB1 0x20
  44. #define MSYNC_WBLW 0x40
  45. #define MSYNC_WB_MASK (MSYNC_WB0 | MSYNC_WB1)
  46. /* Janz ICAN3 "new-style" host interface queue page numbers */
  47. #define QUEUE_TOHOST 5
  48. #define QUEUE_FROMHOST_MID 6
  49. #define QUEUE_FROMHOST_HIGH 7
  50. #define QUEUE_FROMHOST_LOW 8
  51. /* The first free page in the DPM is #9 */
  52. #define DPM_FREE_START 9
  53. /* Janz ICAN3 "new-style" and "fast" host interface descriptor flags */
  54. #define DESC_VALID 0x80
  55. #define DESC_WRAP 0x40
  56. #define DESC_INTERRUPT 0x20
  57. #define DESC_IVALID 0x10
  58. #define DESC_LEN(len) (len)
  59. /* Janz ICAN3 Firmware Messages */
  60. #define MSG_CONNECTI 0x02
  61. #define MSG_DISCONNECT 0x03
  62. #define MSG_IDVERS 0x04
  63. #define MSG_MSGLOST 0x05
  64. #define MSG_NEWHOSTIF 0x08
  65. #define MSG_INQUIRY 0x0a
  66. #define MSG_SETAFILMASK 0x10
  67. #define MSG_INITFDPMQUEUE 0x11
  68. #define MSG_HWCONF 0x12
  69. #define MSG_FMSGLOST 0x15
  70. #define MSG_CEVTIND 0x37
  71. #define MSG_CBTRREQ 0x41
  72. #define MSG_COFFREQ 0x42
  73. #define MSG_CONREQ 0x43
  74. #define MSG_CCONFREQ 0x47
  75. #define MSG_NMTS 0xb0
  76. #define MSG_LMTS 0xb4
  77. /*
  78. * Janz ICAN3 CAN Inquiry Message Types
  79. *
  80. * NOTE: there appears to be a firmware bug here. You must send
  81. * NOTE: INQUIRY_STATUS and expect to receive an INQUIRY_EXTENDED
  82. * NOTE: response. The controller never responds to a message with
  83. * NOTE: the INQUIRY_EXTENDED subspec :(
  84. */
  85. #define INQUIRY_STATUS 0x00
  86. #define INQUIRY_TERMINATION 0x01
  87. #define INQUIRY_EXTENDED 0x04
  88. /* Janz ICAN3 CAN Set Acceptance Filter Mask Message Types */
  89. #define SETAFILMASK_REJECT 0x00
  90. #define SETAFILMASK_FASTIF 0x02
  91. /* Janz ICAN3 CAN Hardware Configuration Message Types */
  92. #define HWCONF_TERMINATE_ON 0x01
  93. #define HWCONF_TERMINATE_OFF 0x00
  94. /* Janz ICAN3 CAN Event Indication Message Types */
  95. #define CEVTIND_EI 0x01
  96. #define CEVTIND_DOI 0x02
  97. #define CEVTIND_LOST 0x04
  98. #define CEVTIND_FULL 0x08
  99. #define CEVTIND_BEI 0x10
  100. #define CEVTIND_CHIP_SJA1000 0x02
  101. #define ICAN3_BUSERR_QUOTA_MAX 255
  102. /* Janz ICAN3 CAN Frame Conversion */
  103. #define ICAN3_SNGL 0x02
  104. #define ICAN3_ECHO 0x10
  105. #define ICAN3_EFF_RTR 0x40
  106. #define ICAN3_SFF_RTR 0x10
  107. #define ICAN3_EFF 0x80
  108. #define ICAN3_CAN_TYPE_MASK 0x0f
  109. #define ICAN3_CAN_TYPE_SFF 0x00
  110. #define ICAN3_CAN_TYPE_EFF 0x01
  111. #define ICAN3_CAN_DLC_MASK 0x0f
  112. /* Janz ICAN3 NMTS subtypes */
  113. #define NMTS_CREATE_NODE_REQ 0x0
  114. #define NMTS_SLAVE_STATE_IND 0x8
  115. #define NMTS_SLAVE_EVENT_IND 0x9
  116. /* Janz ICAN3 LMTS subtypes */
  117. #define LMTS_BUSON_REQ 0x0
  118. #define LMTS_BUSOFF_REQ 0x1
  119. #define LMTS_CAN_CONF_REQ 0x2
  120. /* Janz ICAN3 NMTS Event indications */
  121. #define NE_LOCAL_OCCURRED 0x3
  122. #define NE_LOCAL_RESOLVED 0x2
  123. #define NE_REMOTE_OCCURRED 0xc
  124. #define NE_REMOTE_RESOLVED 0x8
  125. /*
  126. * SJA1000 Status and Error Register Definitions
  127. *
  128. * Copied from drivers/net/can/sja1000/sja1000.h
  129. */
  130. /* status register content */
  131. #define SR_BS 0x80
  132. #define SR_ES 0x40
  133. #define SR_TS 0x20
  134. #define SR_RS 0x10
  135. #define SR_TCS 0x08
  136. #define SR_TBS 0x04
  137. #define SR_DOS 0x02
  138. #define SR_RBS 0x01
  139. #define SR_CRIT (SR_BS|SR_ES)
  140. /* ECC register */
  141. #define ECC_SEG 0x1F
  142. #define ECC_DIR 0x20
  143. #define ECC_ERR 6
  144. #define ECC_BIT 0x00
  145. #define ECC_FORM 0x40
  146. #define ECC_STUFF 0x80
  147. #define ECC_MASK 0xc0
  148. /* Number of buffers for use in the "new-style" host interface */
  149. #define ICAN3_NEW_BUFFERS 16
  150. /* Number of buffers for use in the "fast" host interface */
  151. #define ICAN3_TX_BUFFERS 512
  152. #define ICAN3_RX_BUFFERS 1024
  153. /* SJA1000 Clock Input */
  154. #define ICAN3_CAN_CLOCK 8000000
  155. /* Janz ICAN3 firmware types */
  156. enum ican3_fwtype {
  157. ICAN3_FWTYPE_ICANOS,
  158. ICAN3_FWTYPE_CAL_CANOPEN,
  159. };
  160. /* Driver Name */
  161. #define DRV_NAME "janz-ican3"
  162. /* DPM Control Registers -- starts at offset 0x100 in the MODULbus registers */
  163. struct ican3_dpm_control {
  164. /* window address register */
  165. u8 window_address;
  166. u8 unused1;
  167. /*
  168. * Read access: clear interrupt from microcontroller
  169. * Write access: send interrupt to microcontroller
  170. */
  171. u8 interrupt;
  172. u8 unused2;
  173. /* write-only: reset all hardware on the module */
  174. u8 hwreset;
  175. u8 unused3;
  176. /* write-only: generate an interrupt to the TPU */
  177. u8 tpuinterrupt;
  178. };
  179. struct ican3_dev {
  180. /* must be the first member */
  181. struct can_priv can;
  182. /* CAN network device */
  183. struct net_device *ndev;
  184. struct napi_struct napi;
  185. /* module number */
  186. unsigned int num;
  187. /* base address of registers and IRQ */
  188. struct janz_cmodio_onboard_regs __iomem *ctrl;
  189. struct ican3_dpm_control __iomem *dpmctrl;
  190. void __iomem *dpm;
  191. int irq;
  192. /* CAN bus termination status */
  193. struct completion termination_comp;
  194. bool termination_enabled;
  195. /* CAN bus error status registers */
  196. struct completion buserror_comp;
  197. struct can_berr_counter bec;
  198. /* firmware type */
  199. enum ican3_fwtype fwtype;
  200. char fwinfo[32];
  201. /* old and new style host interface */
  202. unsigned int iftype;
  203. /* queue for echo packets */
  204. struct sk_buff_head echoq;
  205. /*
  206. * Any function which changes the current DPM page must hold this
  207. * lock while it is performing data accesses. This ensures that the
  208. * function will not be preempted and end up reading data from a
  209. * different DPM page than it expects.
  210. */
  211. spinlock_t lock;
  212. /* new host interface */
  213. unsigned int rx_int;
  214. unsigned int rx_num;
  215. unsigned int tx_num;
  216. /* fast host interface */
  217. unsigned int fastrx_start;
  218. unsigned int fastrx_num;
  219. unsigned int fasttx_start;
  220. unsigned int fasttx_num;
  221. /* first free DPM page */
  222. unsigned int free_page;
  223. };
  224. struct ican3_msg {
  225. u8 control;
  226. u8 spec;
  227. __le16 len;
  228. u8 data[252];
  229. };
  230. struct ican3_new_desc {
  231. u8 control;
  232. u8 pointer;
  233. };
  234. struct ican3_fast_desc {
  235. u8 control;
  236. u8 command;
  237. u8 data[14];
  238. };
  239. /* write to the window basic address register */
  240. static inline void ican3_set_page(struct ican3_dev *mod, unsigned int page)
  241. {
  242. BUG_ON(page >= DPM_NUM_PAGES);
  243. iowrite8(page, &mod->dpmctrl->window_address);
  244. }
  245. /*
  246. * ICAN3 "old-style" host interface
  247. */
  248. /*
  249. * Receive a message from the ICAN3 "old-style" firmware interface
  250. *
  251. * LOCKING: must hold mod->lock
  252. *
  253. * returns 0 on success, -ENOMEM when no message exists
  254. */
  255. static int ican3_old_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
  256. {
  257. unsigned int mbox, mbox_page;
  258. u8 locl, peer, xord;
  259. /* get the MSYNC registers */
  260. ican3_set_page(mod, QUEUE_OLD_CONTROL);
  261. peer = ioread8(mod->dpm + MSYNC_PEER);
  262. locl = ioread8(mod->dpm + MSYNC_LOCL);
  263. xord = locl ^ peer;
  264. if ((xord & MSYNC_RB_MASK) == 0x00) {
  265. netdev_dbg(mod->ndev, "no mbox for reading\n");
  266. return -ENOMEM;
  267. }
  268. /* find the first free mbox to read */
  269. if ((xord & MSYNC_RB_MASK) == MSYNC_RB_MASK)
  270. mbox = (xord & MSYNC_RBLW) ? MSYNC_RB0 : MSYNC_RB1;
  271. else
  272. mbox = (xord & MSYNC_RB0) ? MSYNC_RB0 : MSYNC_RB1;
  273. /* copy the message */
  274. mbox_page = (mbox == MSYNC_RB0) ? QUEUE_OLD_RB0 : QUEUE_OLD_RB1;
  275. ican3_set_page(mod, mbox_page);
  276. memcpy_fromio(msg, mod->dpm, sizeof(*msg));
  277. /*
  278. * notify the firmware that the read buffer is available
  279. * for it to fill again
  280. */
  281. locl ^= mbox;
  282. ican3_set_page(mod, QUEUE_OLD_CONTROL);
  283. iowrite8(locl, mod->dpm + MSYNC_LOCL);
  284. return 0;
  285. }
  286. /*
  287. * Send a message through the "old-style" firmware interface
  288. *
  289. * LOCKING: must hold mod->lock
  290. *
  291. * returns 0 on success, -ENOMEM when no free space exists
  292. */
  293. static int ican3_old_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
  294. {
  295. unsigned int mbox, mbox_page;
  296. u8 locl, peer, xord;
  297. /* get the MSYNC registers */
  298. ican3_set_page(mod, QUEUE_OLD_CONTROL);
  299. peer = ioread8(mod->dpm + MSYNC_PEER);
  300. locl = ioread8(mod->dpm + MSYNC_LOCL);
  301. xord = locl ^ peer;
  302. if ((xord & MSYNC_WB_MASK) == MSYNC_WB_MASK) {
  303. netdev_err(mod->ndev, "no mbox for writing\n");
  304. return -ENOMEM;
  305. }
  306. /* calculate a free mbox to use */
  307. mbox = (xord & MSYNC_WB0) ? MSYNC_WB1 : MSYNC_WB0;
  308. /* copy the message to the DPM */
  309. mbox_page = (mbox == MSYNC_WB0) ? QUEUE_OLD_WB0 : QUEUE_OLD_WB1;
  310. ican3_set_page(mod, mbox_page);
  311. memcpy_toio(mod->dpm, msg, sizeof(*msg));
  312. locl ^= mbox;
  313. if (mbox == MSYNC_WB1)
  314. locl |= MSYNC_WBLW;
  315. ican3_set_page(mod, QUEUE_OLD_CONTROL);
  316. iowrite8(locl, mod->dpm + MSYNC_LOCL);
  317. return 0;
  318. }
  319. /*
  320. * ICAN3 "new-style" Host Interface Setup
  321. */
  322. static void ican3_init_new_host_interface(struct ican3_dev *mod)
  323. {
  324. struct ican3_new_desc desc;
  325. unsigned long flags;
  326. void __iomem *dst;
  327. int i;
  328. spin_lock_irqsave(&mod->lock, flags);
  329. /* setup the internal datastructures for RX */
  330. mod->rx_num = 0;
  331. mod->rx_int = 0;
  332. /* tohost queue descriptors are in page 5 */
  333. ican3_set_page(mod, QUEUE_TOHOST);
  334. dst = mod->dpm;
  335. /* initialize the tohost (rx) queue descriptors: pages 9-24 */
  336. for (i = 0; i < ICAN3_NEW_BUFFERS; i++) {
  337. desc.control = DESC_INTERRUPT | DESC_LEN(1); /* I L=1 */
  338. desc.pointer = mod->free_page;
  339. /* set wrap flag on last buffer */
  340. if (i == ICAN3_NEW_BUFFERS - 1)
  341. desc.control |= DESC_WRAP;
  342. memcpy_toio(dst, &desc, sizeof(desc));
  343. dst += sizeof(desc);
  344. mod->free_page++;
  345. }
  346. /* fromhost (tx) mid queue descriptors are in page 6 */
  347. ican3_set_page(mod, QUEUE_FROMHOST_MID);
  348. dst = mod->dpm;
  349. /* setup the internal datastructures for TX */
  350. mod->tx_num = 0;
  351. /* initialize the fromhost mid queue descriptors: pages 25-40 */
  352. for (i = 0; i < ICAN3_NEW_BUFFERS; i++) {
  353. desc.control = DESC_VALID | DESC_LEN(1); /* V L=1 */
  354. desc.pointer = mod->free_page;
  355. /* set wrap flag on last buffer */
  356. if (i == ICAN3_NEW_BUFFERS - 1)
  357. desc.control |= DESC_WRAP;
  358. memcpy_toio(dst, &desc, sizeof(desc));
  359. dst += sizeof(desc);
  360. mod->free_page++;
  361. }
  362. /* fromhost hi queue descriptors are in page 7 */
  363. ican3_set_page(mod, QUEUE_FROMHOST_HIGH);
  364. dst = mod->dpm;
  365. /* initialize only a single buffer in the fromhost hi queue (unused) */
  366. desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */
  367. desc.pointer = mod->free_page;
  368. memcpy_toio(dst, &desc, sizeof(desc));
  369. mod->free_page++;
  370. /* fromhost low queue descriptors are in page 8 */
  371. ican3_set_page(mod, QUEUE_FROMHOST_LOW);
  372. dst = mod->dpm;
  373. /* initialize only a single buffer in the fromhost low queue (unused) */
  374. desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */
  375. desc.pointer = mod->free_page;
  376. memcpy_toio(dst, &desc, sizeof(desc));
  377. mod->free_page++;
  378. spin_unlock_irqrestore(&mod->lock, flags);
  379. }
  380. /*
  381. * ICAN3 Fast Host Interface Setup
  382. */
  383. static void ican3_init_fast_host_interface(struct ican3_dev *mod)
  384. {
  385. struct ican3_fast_desc desc;
  386. unsigned long flags;
  387. unsigned int addr;
  388. void __iomem *dst;
  389. int i;
  390. spin_lock_irqsave(&mod->lock, flags);
  391. /* save the start recv page */
  392. mod->fastrx_start = mod->free_page;
  393. mod->fastrx_num = 0;
  394. /* build a single fast tohost queue descriptor */
  395. memset(&desc, 0, sizeof(desc));
  396. desc.control = 0x00;
  397. desc.command = 1;
  398. /* build the tohost queue descriptor ring in memory */
  399. addr = 0;
  400. for (i = 0; i < ICAN3_RX_BUFFERS; i++) {
  401. /* set the wrap bit on the last buffer */
  402. if (i == ICAN3_RX_BUFFERS - 1)
  403. desc.control |= DESC_WRAP;
  404. /* switch to the correct page */
  405. ican3_set_page(mod, mod->free_page);
  406. /* copy the descriptor to the DPM */
  407. dst = mod->dpm + addr;
  408. memcpy_toio(dst, &desc, sizeof(desc));
  409. addr += sizeof(desc);
  410. /* move to the next page if necessary */
  411. if (addr >= DPM_PAGE_SIZE) {
  412. addr = 0;
  413. mod->free_page++;
  414. }
  415. }
  416. /* make sure we page-align the next queue */
  417. if (addr != 0)
  418. mod->free_page++;
  419. /* save the start xmit page */
  420. mod->fasttx_start = mod->free_page;
  421. mod->fasttx_num = 0;
  422. /* build a single fast fromhost queue descriptor */
  423. memset(&desc, 0, sizeof(desc));
  424. desc.control = DESC_VALID;
  425. desc.command = 1;
  426. /* build the fromhost queue descriptor ring in memory */
  427. addr = 0;
  428. for (i = 0; i < ICAN3_TX_BUFFERS; i++) {
  429. /* set the wrap bit on the last buffer */
  430. if (i == ICAN3_TX_BUFFERS - 1)
  431. desc.control |= DESC_WRAP;
  432. /* switch to the correct page */
  433. ican3_set_page(mod, mod->free_page);
  434. /* copy the descriptor to the DPM */
  435. dst = mod->dpm + addr;
  436. memcpy_toio(dst, &desc, sizeof(desc));
  437. addr += sizeof(desc);
  438. /* move to the next page if necessary */
  439. if (addr >= DPM_PAGE_SIZE) {
  440. addr = 0;
  441. mod->free_page++;
  442. }
  443. }
  444. spin_unlock_irqrestore(&mod->lock, flags);
  445. }
  446. /*
  447. * ICAN3 "new-style" Host Interface Message Helpers
  448. */
  449. /*
  450. * LOCKING: must hold mod->lock
  451. */
  452. static int ican3_new_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
  453. {
  454. struct ican3_new_desc desc;
  455. void __iomem *desc_addr = mod->dpm + (mod->tx_num * sizeof(desc));
  456. /* switch to the fromhost mid queue, and read the buffer descriptor */
  457. ican3_set_page(mod, QUEUE_FROMHOST_MID);
  458. memcpy_fromio(&desc, desc_addr, sizeof(desc));
  459. if (!(desc.control & DESC_VALID)) {
  460. netdev_dbg(mod->ndev, "%s: no free buffers\n", __func__);
  461. return -ENOMEM;
  462. }
  463. /* switch to the data page, copy the data */
  464. ican3_set_page(mod, desc.pointer);
  465. memcpy_toio(mod->dpm, msg, sizeof(*msg));
  466. /* switch back to the descriptor, set the valid bit, write it back */
  467. ican3_set_page(mod, QUEUE_FROMHOST_MID);
  468. desc.control ^= DESC_VALID;
  469. memcpy_toio(desc_addr, &desc, sizeof(desc));
  470. /* update the tx number */
  471. mod->tx_num = (desc.control & DESC_WRAP) ? 0 : (mod->tx_num + 1);
  472. return 0;
  473. }
  474. /*
  475. * LOCKING: must hold mod->lock
  476. */
  477. static int ican3_new_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
  478. {
  479. struct ican3_new_desc desc;
  480. void __iomem *desc_addr = mod->dpm + (mod->rx_num * sizeof(desc));
  481. /* switch to the tohost queue, and read the buffer descriptor */
  482. ican3_set_page(mod, QUEUE_TOHOST);
  483. memcpy_fromio(&desc, desc_addr, sizeof(desc));
  484. if (!(desc.control & DESC_VALID)) {
  485. netdev_dbg(mod->ndev, "%s: no buffers to recv\n", __func__);
  486. return -ENOMEM;
  487. }
  488. /* switch to the data page, copy the data */
  489. ican3_set_page(mod, desc.pointer);
  490. memcpy_fromio(msg, mod->dpm, sizeof(*msg));
  491. /* switch back to the descriptor, toggle the valid bit, write it back */
  492. ican3_set_page(mod, QUEUE_TOHOST);
  493. desc.control ^= DESC_VALID;
  494. memcpy_toio(desc_addr, &desc, sizeof(desc));
  495. /* update the rx number */
  496. mod->rx_num = (desc.control & DESC_WRAP) ? 0 : (mod->rx_num + 1);
  497. return 0;
  498. }
  499. /*
  500. * Message Send / Recv Helpers
  501. */
  502. static int ican3_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
  503. {
  504. unsigned long flags;
  505. int ret;
  506. spin_lock_irqsave(&mod->lock, flags);
  507. if (mod->iftype == 0)
  508. ret = ican3_old_send_msg(mod, msg);
  509. else
  510. ret = ican3_new_send_msg(mod, msg);
  511. spin_unlock_irqrestore(&mod->lock, flags);
  512. return ret;
  513. }
  514. static int ican3_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
  515. {
  516. unsigned long flags;
  517. int ret;
  518. spin_lock_irqsave(&mod->lock, flags);
  519. if (mod->iftype == 0)
  520. ret = ican3_old_recv_msg(mod, msg);
  521. else
  522. ret = ican3_new_recv_msg(mod, msg);
  523. spin_unlock_irqrestore(&mod->lock, flags);
  524. return ret;
  525. }
  526. /*
  527. * Quick Pre-constructed Messages
  528. */
  529. static int ican3_msg_connect(struct ican3_dev *mod)
  530. {
  531. struct ican3_msg msg;
  532. memset(&msg, 0, sizeof(msg));
  533. msg.spec = MSG_CONNECTI;
  534. msg.len = cpu_to_le16(0);
  535. return ican3_send_msg(mod, &msg);
  536. }
  537. static int ican3_msg_disconnect(struct ican3_dev *mod)
  538. {
  539. struct ican3_msg msg;
  540. memset(&msg, 0, sizeof(msg));
  541. msg.spec = MSG_DISCONNECT;
  542. msg.len = cpu_to_le16(0);
  543. return ican3_send_msg(mod, &msg);
  544. }
  545. static int ican3_msg_newhostif(struct ican3_dev *mod)
  546. {
  547. struct ican3_msg msg;
  548. int ret;
  549. memset(&msg, 0, sizeof(msg));
  550. msg.spec = MSG_NEWHOSTIF;
  551. msg.len = cpu_to_le16(0);
  552. /* If we're not using the old interface, switching seems bogus */
  553. WARN_ON(mod->iftype != 0);
  554. ret = ican3_send_msg(mod, &msg);
  555. if (ret)
  556. return ret;
  557. /* mark the module as using the new host interface */
  558. mod->iftype = 1;
  559. return 0;
  560. }
  561. static int ican3_msg_fasthostif(struct ican3_dev *mod)
  562. {
  563. struct ican3_msg msg;
  564. unsigned int addr;
  565. memset(&msg, 0, sizeof(msg));
  566. msg.spec = MSG_INITFDPMQUEUE;
  567. msg.len = cpu_to_le16(8);
  568. /* write the tohost queue start address */
  569. addr = DPM_PAGE_ADDR(mod->fastrx_start);
  570. msg.data[0] = addr & 0xff;
  571. msg.data[1] = (addr >> 8) & 0xff;
  572. msg.data[2] = (addr >> 16) & 0xff;
  573. msg.data[3] = (addr >> 24) & 0xff;
  574. /* write the fromhost queue start address */
  575. addr = DPM_PAGE_ADDR(mod->fasttx_start);
  576. msg.data[4] = addr & 0xff;
  577. msg.data[5] = (addr >> 8) & 0xff;
  578. msg.data[6] = (addr >> 16) & 0xff;
  579. msg.data[7] = (addr >> 24) & 0xff;
  580. /* If we're not using the new interface yet, we cannot do this */
  581. WARN_ON(mod->iftype != 1);
  582. return ican3_send_msg(mod, &msg);
  583. }
  584. /*
  585. * Setup the CAN filter to either accept or reject all
  586. * messages from the CAN bus.
  587. */
  588. static int ican3_set_id_filter(struct ican3_dev *mod, bool accept)
  589. {
  590. struct ican3_msg msg;
  591. int ret;
  592. /* Standard Frame Format */
  593. memset(&msg, 0, sizeof(msg));
  594. msg.spec = MSG_SETAFILMASK;
  595. msg.len = cpu_to_le16(5);
  596. msg.data[0] = 0x00; /* IDLo LSB */
  597. msg.data[1] = 0x00; /* IDLo MSB */
  598. msg.data[2] = 0xff; /* IDHi LSB */
  599. msg.data[3] = 0x07; /* IDHi MSB */
  600. /* accept all frames for fast host if, or reject all frames */
  601. msg.data[4] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT;
  602. ret = ican3_send_msg(mod, &msg);
  603. if (ret)
  604. return ret;
  605. /* Extended Frame Format */
  606. memset(&msg, 0, sizeof(msg));
  607. msg.spec = MSG_SETAFILMASK;
  608. msg.len = cpu_to_le16(13);
  609. msg.data[0] = 0; /* MUX = 0 */
  610. msg.data[1] = 0x00; /* IDLo LSB */
  611. msg.data[2] = 0x00;
  612. msg.data[3] = 0x00;
  613. msg.data[4] = 0x20; /* IDLo MSB */
  614. msg.data[5] = 0xff; /* IDHi LSB */
  615. msg.data[6] = 0xff;
  616. msg.data[7] = 0xff;
  617. msg.data[8] = 0x3f; /* IDHi MSB */
  618. /* accept all frames for fast host if, or reject all frames */
  619. msg.data[9] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT;
  620. return ican3_send_msg(mod, &msg);
  621. }
  622. /*
  623. * Bring the CAN bus online or offline
  624. */
  625. static int ican3_set_bus_state(struct ican3_dev *mod, bool on)
  626. {
  627. struct can_bittiming *bt = &mod->can.bittiming;
  628. struct ican3_msg msg;
  629. u8 btr0, btr1;
  630. int res;
  631. /* This algorithm was stolen from drivers/net/can/sja1000/sja1000.c */
  632. /* The bittiming register command for the ICAN3 just sets the bit timing */
  633. /* registers on the SJA1000 chip directly */
  634. btr0 = ((bt->brp - 1) & 0x3f) | (((bt->sjw - 1) & 0x3) << 6);
  635. btr1 = ((bt->prop_seg + bt->phase_seg1 - 1) & 0xf) |
  636. (((bt->phase_seg2 - 1) & 0x7) << 4);
  637. if (mod->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES)
  638. btr1 |= 0x80;
  639. if (mod->fwtype == ICAN3_FWTYPE_ICANOS) {
  640. if (on) {
  641. /* set bittiming */
  642. memset(&msg, 0, sizeof(msg));
  643. msg.spec = MSG_CBTRREQ;
  644. msg.len = cpu_to_le16(4);
  645. msg.data[0] = 0x00;
  646. msg.data[1] = 0x00;
  647. msg.data[2] = btr0;
  648. msg.data[3] = btr1;
  649. res = ican3_send_msg(mod, &msg);
  650. if (res)
  651. return res;
  652. }
  653. /* can-on/off request */
  654. memset(&msg, 0, sizeof(msg));
  655. msg.spec = on ? MSG_CONREQ : MSG_COFFREQ;
  656. msg.len = cpu_to_le16(0);
  657. return ican3_send_msg(mod, &msg);
  658. } else if (mod->fwtype == ICAN3_FWTYPE_CAL_CANOPEN) {
  659. /* bittiming + can-on/off request */
  660. memset(&msg, 0, sizeof(msg));
  661. msg.spec = MSG_LMTS;
  662. if (on) {
  663. msg.len = cpu_to_le16(4);
  664. msg.data[0] = LMTS_BUSON_REQ;
  665. msg.data[1] = 0;
  666. msg.data[2] = btr0;
  667. msg.data[3] = btr1;
  668. } else {
  669. msg.len = cpu_to_le16(2);
  670. msg.data[0] = LMTS_BUSOFF_REQ;
  671. msg.data[1] = 0;
  672. }
  673. res = ican3_send_msg(mod, &msg);
  674. if (res)
  675. return res;
  676. if (on) {
  677. /* create NMT Slave Node for error processing
  678. * class 2 (with error capability, see CiA/DS203-1)
  679. * id 1
  680. * name locnod1 (must be exactly 7 bytes)
  681. */
  682. memset(&msg, 0, sizeof(msg));
  683. msg.spec = MSG_NMTS;
  684. msg.len = cpu_to_le16(11);
  685. msg.data[0] = NMTS_CREATE_NODE_REQ;
  686. msg.data[1] = 0;
  687. msg.data[2] = 2; /* node class */
  688. msg.data[3] = 1; /* node id */
  689. strcpy(msg.data + 4, "locnod1"); /* node name */
  690. return ican3_send_msg(mod, &msg);
  691. }
  692. return 0;
  693. }
  694. return -ENOTSUPP;
  695. }
  696. static int ican3_set_termination(struct ican3_dev *mod, bool on)
  697. {
  698. struct ican3_msg msg;
  699. memset(&msg, 0, sizeof(msg));
  700. msg.spec = MSG_HWCONF;
  701. msg.len = cpu_to_le16(2);
  702. msg.data[0] = 0x00;
  703. msg.data[1] = on ? HWCONF_TERMINATE_ON : HWCONF_TERMINATE_OFF;
  704. return ican3_send_msg(mod, &msg);
  705. }
  706. static int ican3_send_inquiry(struct ican3_dev *mod, u8 subspec)
  707. {
  708. struct ican3_msg msg;
  709. memset(&msg, 0, sizeof(msg));
  710. msg.spec = MSG_INQUIRY;
  711. msg.len = cpu_to_le16(2);
  712. msg.data[0] = subspec;
  713. msg.data[1] = 0x00;
  714. return ican3_send_msg(mod, &msg);
  715. }
  716. static int ican3_set_buserror(struct ican3_dev *mod, u8 quota)
  717. {
  718. struct ican3_msg msg;
  719. if (mod->fwtype == ICAN3_FWTYPE_ICANOS) {
  720. memset(&msg, 0, sizeof(msg));
  721. msg.spec = MSG_CCONFREQ;
  722. msg.len = cpu_to_le16(2);
  723. msg.data[0] = 0x00;
  724. msg.data[1] = quota;
  725. } else if (mod->fwtype == ICAN3_FWTYPE_CAL_CANOPEN) {
  726. memset(&msg, 0, sizeof(msg));
  727. msg.spec = MSG_LMTS;
  728. msg.len = cpu_to_le16(4);
  729. msg.data[0] = LMTS_CAN_CONF_REQ;
  730. msg.data[1] = 0x00;
  731. msg.data[2] = 0x00;
  732. msg.data[3] = quota;
  733. } else {
  734. return -ENOTSUPP;
  735. }
  736. return ican3_send_msg(mod, &msg);
  737. }
  738. /*
  739. * ICAN3 to Linux CAN Frame Conversion
  740. */
  741. static void ican3_to_can_frame(struct ican3_dev *mod,
  742. struct ican3_fast_desc *desc,
  743. struct can_frame *cf)
  744. {
  745. if ((desc->command & ICAN3_CAN_TYPE_MASK) == ICAN3_CAN_TYPE_SFF) {
  746. if (desc->data[1] & ICAN3_SFF_RTR)
  747. cf->can_id |= CAN_RTR_FLAG;
  748. cf->can_id |= desc->data[0] << 3;
  749. cf->can_id |= (desc->data[1] & 0xe0) >> 5;
  750. cf->can_dlc = get_can_dlc(desc->data[1] & ICAN3_CAN_DLC_MASK);
  751. memcpy(cf->data, &desc->data[2], cf->can_dlc);
  752. } else {
  753. cf->can_dlc = get_can_dlc(desc->data[0] & ICAN3_CAN_DLC_MASK);
  754. if (desc->data[0] & ICAN3_EFF_RTR)
  755. cf->can_id |= CAN_RTR_FLAG;
  756. if (desc->data[0] & ICAN3_EFF) {
  757. cf->can_id |= CAN_EFF_FLAG;
  758. cf->can_id |= desc->data[2] << 21; /* 28-21 */
  759. cf->can_id |= desc->data[3] << 13; /* 20-13 */
  760. cf->can_id |= desc->data[4] << 5; /* 12-5 */
  761. cf->can_id |= (desc->data[5] & 0xf8) >> 3;
  762. } else {
  763. cf->can_id |= desc->data[2] << 3; /* 10-3 */
  764. cf->can_id |= desc->data[3] >> 5; /* 2-0 */
  765. }
  766. memcpy(cf->data, &desc->data[6], cf->can_dlc);
  767. }
  768. }
  769. static void can_frame_to_ican3(struct ican3_dev *mod,
  770. struct can_frame *cf,
  771. struct ican3_fast_desc *desc)
  772. {
  773. /* clear out any stale data in the descriptor */
  774. memset(desc->data, 0, sizeof(desc->data));
  775. /* we always use the extended format, with the ECHO flag set */
  776. desc->command = ICAN3_CAN_TYPE_EFF;
  777. desc->data[0] |= cf->can_dlc;
  778. desc->data[1] |= ICAN3_ECHO;
  779. /* support single transmission (no retries) mode */
  780. if (mod->can.ctrlmode & CAN_CTRLMODE_ONE_SHOT)
  781. desc->data[1] |= ICAN3_SNGL;
  782. if (cf->can_id & CAN_RTR_FLAG)
  783. desc->data[0] |= ICAN3_EFF_RTR;
  784. /* pack the id into the correct places */
  785. if (cf->can_id & CAN_EFF_FLAG) {
  786. desc->data[0] |= ICAN3_EFF;
  787. desc->data[2] = (cf->can_id & 0x1fe00000) >> 21; /* 28-21 */
  788. desc->data[3] = (cf->can_id & 0x001fe000) >> 13; /* 20-13 */
  789. desc->data[4] = (cf->can_id & 0x00001fe0) >> 5; /* 12-5 */
  790. desc->data[5] = (cf->can_id & 0x0000001f) << 3; /* 4-0 */
  791. } else {
  792. desc->data[2] = (cf->can_id & 0x7F8) >> 3; /* bits 10-3 */
  793. desc->data[3] = (cf->can_id & 0x007) << 5; /* bits 2-0 */
  794. }
  795. /* copy the data bits into the descriptor */
  796. memcpy(&desc->data[6], cf->data, cf->can_dlc);
  797. }
  798. /*
  799. * Interrupt Handling
  800. */
  801. /*
  802. * Handle an ID + Version message response from the firmware. We never generate
  803. * this message in production code, but it is very useful when debugging to be
  804. * able to display this message.
  805. */
  806. static void ican3_handle_idvers(struct ican3_dev *mod, struct ican3_msg *msg)
  807. {
  808. netdev_dbg(mod->ndev, "IDVERS response: %s\n", msg->data);
  809. }
  810. static void ican3_handle_msglost(struct ican3_dev *mod, struct ican3_msg *msg)
  811. {
  812. struct net_device *dev = mod->ndev;
  813. struct net_device_stats *stats = &dev->stats;
  814. struct can_frame *cf;
  815. struct sk_buff *skb;
  816. /*
  817. * Report that communication messages with the microcontroller firmware
  818. * are being lost. These are never CAN frames, so we do not generate an
  819. * error frame for userspace
  820. */
  821. if (msg->spec == MSG_MSGLOST) {
  822. netdev_err(mod->ndev, "lost %d control messages\n", msg->data[0]);
  823. return;
  824. }
  825. /*
  826. * Oops, this indicates that we have lost messages in the fast queue,
  827. * which are exclusively CAN messages. Our driver isn't reading CAN
  828. * frames fast enough.
  829. *
  830. * We'll pretend that the SJA1000 told us that it ran out of buffer
  831. * space, because there is not a better message for this.
  832. */
  833. skb = alloc_can_err_skb(dev, &cf);
  834. if (skb) {
  835. cf->can_id |= CAN_ERR_CRTL;
  836. cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
  837. stats->rx_over_errors++;
  838. stats->rx_errors++;
  839. netif_rx(skb);
  840. }
  841. }
  842. /*
  843. * Handle CAN Event Indication Messages from the firmware
  844. *
  845. * The ICAN3 firmware provides the values of some SJA1000 registers when it
  846. * generates this message. The code below is largely copied from the
  847. * drivers/net/can/sja1000/sja1000.c file, and adapted as necessary
  848. */
  849. static int ican3_handle_cevtind(struct ican3_dev *mod, struct ican3_msg *msg)
  850. {
  851. struct net_device *dev = mod->ndev;
  852. struct net_device_stats *stats = &dev->stats;
  853. enum can_state state = mod->can.state;
  854. u8 isrc, ecc, status, rxerr, txerr;
  855. struct can_frame *cf;
  856. struct sk_buff *skb;
  857. /* we can only handle the SJA1000 part */
  858. if (msg->data[1] != CEVTIND_CHIP_SJA1000) {
  859. netdev_err(mod->ndev, "unable to handle errors on non-SJA1000\n");
  860. return -ENODEV;
  861. }
  862. /* check the message length for sanity */
  863. if (le16_to_cpu(msg->len) < 6) {
  864. netdev_err(mod->ndev, "error message too short\n");
  865. return -EINVAL;
  866. }
  867. isrc = msg->data[0];
  868. ecc = msg->data[2];
  869. status = msg->data[3];
  870. rxerr = msg->data[4];
  871. txerr = msg->data[5];
  872. /*
  873. * This hardware lacks any support other than bus error messages to
  874. * determine if packet transmission has failed.
  875. *
  876. * When TX errors happen, one echo skb needs to be dropped from the
  877. * front of the queue.
  878. *
  879. * A small bit of code is duplicated here and below, to avoid error
  880. * skb allocation when it will just be freed immediately.
  881. */
  882. if (isrc == CEVTIND_BEI) {
  883. int ret;
  884. netdev_dbg(mod->ndev, "bus error interrupt\n");
  885. /* TX error */
  886. if (!(ecc & ECC_DIR)) {
  887. kfree_skb(skb_dequeue(&mod->echoq));
  888. stats->tx_errors++;
  889. } else {
  890. stats->rx_errors++;
  891. }
  892. /*
  893. * The controller automatically disables bus-error interrupts
  894. * and therefore we must re-enable them.
  895. */
  896. ret = ican3_set_buserror(mod, 1);
  897. if (ret) {
  898. netdev_err(mod->ndev, "unable to re-enable bus-error\n");
  899. return ret;
  900. }
  901. /* bus error reporting is off, return immediately */
  902. if (!(mod->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING))
  903. return 0;
  904. }
  905. skb = alloc_can_err_skb(dev, &cf);
  906. if (skb == NULL)
  907. return -ENOMEM;
  908. /* data overrun interrupt */
  909. if (isrc == CEVTIND_DOI || isrc == CEVTIND_LOST) {
  910. netdev_dbg(mod->ndev, "data overrun interrupt\n");
  911. cf->can_id |= CAN_ERR_CRTL;
  912. cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
  913. stats->rx_over_errors++;
  914. stats->rx_errors++;
  915. }
  916. /* error warning + passive interrupt */
  917. if (isrc == CEVTIND_EI) {
  918. netdev_dbg(mod->ndev, "error warning + passive interrupt\n");
  919. if (status & SR_BS) {
  920. state = CAN_STATE_BUS_OFF;
  921. cf->can_id |= CAN_ERR_BUSOFF;
  922. mod->can.can_stats.bus_off++;
  923. can_bus_off(dev);
  924. } else if (status & SR_ES) {
  925. if (rxerr >= 128 || txerr >= 128)
  926. state = CAN_STATE_ERROR_PASSIVE;
  927. else
  928. state = CAN_STATE_ERROR_WARNING;
  929. } else {
  930. state = CAN_STATE_ERROR_ACTIVE;
  931. }
  932. }
  933. /* bus error interrupt */
  934. if (isrc == CEVTIND_BEI) {
  935. mod->can.can_stats.bus_error++;
  936. cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
  937. switch (ecc & ECC_MASK) {
  938. case ECC_BIT:
  939. cf->data[2] |= CAN_ERR_PROT_BIT;
  940. break;
  941. case ECC_FORM:
  942. cf->data[2] |= CAN_ERR_PROT_FORM;
  943. break;
  944. case ECC_STUFF:
  945. cf->data[2] |= CAN_ERR_PROT_STUFF;
  946. break;
  947. default:
  948. cf->data[3] = ecc & ECC_SEG;
  949. break;
  950. }
  951. if (!(ecc & ECC_DIR))
  952. cf->data[2] |= CAN_ERR_PROT_TX;
  953. cf->data[6] = txerr;
  954. cf->data[7] = rxerr;
  955. }
  956. if (state != mod->can.state && (state == CAN_STATE_ERROR_WARNING ||
  957. state == CAN_STATE_ERROR_PASSIVE)) {
  958. cf->can_id |= CAN_ERR_CRTL;
  959. if (state == CAN_STATE_ERROR_WARNING) {
  960. mod->can.can_stats.error_warning++;
  961. cf->data[1] = (txerr > rxerr) ?
  962. CAN_ERR_CRTL_TX_WARNING :
  963. CAN_ERR_CRTL_RX_WARNING;
  964. } else {
  965. mod->can.can_stats.error_passive++;
  966. cf->data[1] = (txerr > rxerr) ?
  967. CAN_ERR_CRTL_TX_PASSIVE :
  968. CAN_ERR_CRTL_RX_PASSIVE;
  969. }
  970. cf->data[6] = txerr;
  971. cf->data[7] = rxerr;
  972. }
  973. mod->can.state = state;
  974. netif_rx(skb);
  975. return 0;
  976. }
  977. static void ican3_handle_inquiry(struct ican3_dev *mod, struct ican3_msg *msg)
  978. {
  979. switch (msg->data[0]) {
  980. case INQUIRY_STATUS:
  981. case INQUIRY_EXTENDED:
  982. mod->bec.rxerr = msg->data[5];
  983. mod->bec.txerr = msg->data[6];
  984. complete(&mod->buserror_comp);
  985. break;
  986. case INQUIRY_TERMINATION:
  987. mod->termination_enabled = msg->data[6] & HWCONF_TERMINATE_ON;
  988. complete(&mod->termination_comp);
  989. break;
  990. default:
  991. netdev_err(mod->ndev, "received an unknown inquiry response\n");
  992. break;
  993. }
  994. }
  995. /* Handle NMTS Slave Event Indication Messages from the firmware */
  996. static void ican3_handle_nmtsind(struct ican3_dev *mod, struct ican3_msg *msg)
  997. {
  998. u16 subspec;
  999. subspec = msg->data[0] + msg->data[1] * 0x100;
  1000. if (subspec == NMTS_SLAVE_EVENT_IND) {
  1001. switch (msg->data[2]) {
  1002. case NE_LOCAL_OCCURRED:
  1003. case NE_LOCAL_RESOLVED:
  1004. /* now follows the same message as Raw ICANOS CEVTIND
  1005. * shift the data at the same place and call this method
  1006. */
  1007. le16_add_cpu(&msg->len, -3);
  1008. memmove(msg->data, msg->data + 3, le16_to_cpu(msg->len));
  1009. ican3_handle_cevtind(mod, msg);
  1010. break;
  1011. case NE_REMOTE_OCCURRED:
  1012. case NE_REMOTE_RESOLVED:
  1013. /* should not occurre, ignore */
  1014. break;
  1015. default:
  1016. netdev_warn(mod->ndev, "unknown NMTS event indication %x\n",
  1017. msg->data[2]);
  1018. break;
  1019. }
  1020. } else if (subspec == NMTS_SLAVE_STATE_IND) {
  1021. /* ignore state indications */
  1022. } else {
  1023. netdev_warn(mod->ndev, "unhandled NMTS indication %x\n",
  1024. subspec);
  1025. return;
  1026. }
  1027. }
  1028. static void ican3_handle_unknown_message(struct ican3_dev *mod,
  1029. struct ican3_msg *msg)
  1030. {
  1031. netdev_warn(mod->ndev, "received unknown message: spec 0x%.2x length %d\n",
  1032. msg->spec, le16_to_cpu(msg->len));
  1033. }
  1034. /*
  1035. * Handle a control message from the firmware
  1036. */
  1037. static void ican3_handle_message(struct ican3_dev *mod, struct ican3_msg *msg)
  1038. {
  1039. netdev_dbg(mod->ndev, "%s: modno %d spec 0x%.2x len %d bytes\n", __func__,
  1040. mod->num, msg->spec, le16_to_cpu(msg->len));
  1041. switch (msg->spec) {
  1042. case MSG_IDVERS:
  1043. ican3_handle_idvers(mod, msg);
  1044. break;
  1045. case MSG_MSGLOST:
  1046. case MSG_FMSGLOST:
  1047. ican3_handle_msglost(mod, msg);
  1048. break;
  1049. case MSG_CEVTIND:
  1050. ican3_handle_cevtind(mod, msg);
  1051. break;
  1052. case MSG_INQUIRY:
  1053. ican3_handle_inquiry(mod, msg);
  1054. break;
  1055. case MSG_NMTS:
  1056. ican3_handle_nmtsind(mod, msg);
  1057. break;
  1058. default:
  1059. ican3_handle_unknown_message(mod, msg);
  1060. break;
  1061. }
  1062. }
  1063. /*
  1064. * The ican3 needs to store all echo skbs, and therefore cannot
  1065. * use the generic infrastructure for this.
  1066. */
  1067. static void ican3_put_echo_skb(struct ican3_dev *mod, struct sk_buff *skb)
  1068. {
  1069. skb = can_create_echo_skb(skb);
  1070. if (!skb)
  1071. return;
  1072. /* save this skb for tx interrupt echo handling */
  1073. skb_queue_tail(&mod->echoq, skb);
  1074. }
  1075. static unsigned int ican3_get_echo_skb(struct ican3_dev *mod)
  1076. {
  1077. struct sk_buff *skb = skb_dequeue(&mod->echoq);
  1078. struct can_frame *cf;
  1079. u8 dlc;
  1080. /* this should never trigger unless there is a driver bug */
  1081. if (!skb) {
  1082. netdev_err(mod->ndev, "BUG: echo skb not occupied\n");
  1083. return 0;
  1084. }
  1085. cf = (struct can_frame *)skb->data;
  1086. dlc = cf->can_dlc;
  1087. /* check flag whether this packet has to be looped back */
  1088. if (skb->pkt_type != PACKET_LOOPBACK) {
  1089. kfree_skb(skb);
  1090. return dlc;
  1091. }
  1092. skb->protocol = htons(ETH_P_CAN);
  1093. skb->pkt_type = PACKET_BROADCAST;
  1094. skb->ip_summed = CHECKSUM_UNNECESSARY;
  1095. skb->dev = mod->ndev;
  1096. netif_receive_skb(skb);
  1097. return dlc;
  1098. }
  1099. /*
  1100. * Compare an skb with an existing echo skb
  1101. *
  1102. * This function will be used on devices which have a hardware loopback.
  1103. * On these devices, this function can be used to compare a received skb
  1104. * with the saved echo skbs so that the hardware echo skb can be dropped.
  1105. *
  1106. * Returns true if the skb's are identical, false otherwise.
  1107. */
  1108. static bool ican3_echo_skb_matches(struct ican3_dev *mod, struct sk_buff *skb)
  1109. {
  1110. struct can_frame *cf = (struct can_frame *)skb->data;
  1111. struct sk_buff *echo_skb = skb_peek(&mod->echoq);
  1112. struct can_frame *echo_cf;
  1113. if (!echo_skb)
  1114. return false;
  1115. echo_cf = (struct can_frame *)echo_skb->data;
  1116. if (cf->can_id != echo_cf->can_id)
  1117. return false;
  1118. if (cf->can_dlc != echo_cf->can_dlc)
  1119. return false;
  1120. return memcmp(cf->data, echo_cf->data, cf->can_dlc) == 0;
  1121. }
  1122. /*
  1123. * Check that there is room in the TX ring to transmit another skb
  1124. *
  1125. * LOCKING: must hold mod->lock
  1126. */
  1127. static bool ican3_txok(struct ican3_dev *mod)
  1128. {
  1129. struct ican3_fast_desc __iomem *desc;
  1130. u8 control;
  1131. /* check that we have echo queue space */
  1132. if (skb_queue_len(&mod->echoq) >= ICAN3_TX_BUFFERS)
  1133. return false;
  1134. /* copy the control bits of the descriptor */
  1135. ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16));
  1136. desc = mod->dpm + ((mod->fasttx_num % 16) * sizeof(*desc));
  1137. control = ioread8(&desc->control);
  1138. /* if the control bits are not valid, then we have no more space */
  1139. if (!(control & DESC_VALID))
  1140. return false;
  1141. return true;
  1142. }
  1143. /*
  1144. * Receive one CAN frame from the hardware
  1145. *
  1146. * CONTEXT: must be called from user context
  1147. */
  1148. static int ican3_recv_skb(struct ican3_dev *mod)
  1149. {
  1150. struct net_device *ndev = mod->ndev;
  1151. struct net_device_stats *stats = &ndev->stats;
  1152. struct ican3_fast_desc desc;
  1153. void __iomem *desc_addr;
  1154. struct can_frame *cf;
  1155. struct sk_buff *skb;
  1156. unsigned long flags;
  1157. spin_lock_irqsave(&mod->lock, flags);
  1158. /* copy the whole descriptor */
  1159. ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16));
  1160. desc_addr = mod->dpm + ((mod->fastrx_num % 16) * sizeof(desc));
  1161. memcpy_fromio(&desc, desc_addr, sizeof(desc));
  1162. spin_unlock_irqrestore(&mod->lock, flags);
  1163. /* check that we actually have a CAN frame */
  1164. if (!(desc.control & DESC_VALID))
  1165. return -ENOBUFS;
  1166. /* allocate an skb */
  1167. skb = alloc_can_skb(ndev, &cf);
  1168. if (unlikely(skb == NULL)) {
  1169. stats->rx_dropped++;
  1170. goto err_noalloc;
  1171. }
  1172. /* convert the ICAN3 frame into Linux CAN format */
  1173. ican3_to_can_frame(mod, &desc, cf);
  1174. /*
  1175. * If this is an ECHO frame received from the hardware loopback
  1176. * feature, use the skb saved in the ECHO stack instead. This allows
  1177. * the Linux CAN core to support CAN_RAW_RECV_OWN_MSGS correctly.
  1178. *
  1179. * Since this is a confirmation of a successfully transmitted packet
  1180. * sent from this host, update the transmit statistics.
  1181. *
  1182. * Also, the netdevice queue needs to be allowed to send packets again.
  1183. */
  1184. if (ican3_echo_skb_matches(mod, skb)) {
  1185. stats->tx_packets++;
  1186. stats->tx_bytes += ican3_get_echo_skb(mod);
  1187. kfree_skb(skb);
  1188. goto err_noalloc;
  1189. }
  1190. /* update statistics, receive the skb */
  1191. stats->rx_packets++;
  1192. stats->rx_bytes += cf->can_dlc;
  1193. netif_receive_skb(skb);
  1194. err_noalloc:
  1195. /* toggle the valid bit and return the descriptor to the ring */
  1196. desc.control ^= DESC_VALID;
  1197. spin_lock_irqsave(&mod->lock, flags);
  1198. ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16));
  1199. memcpy_toio(desc_addr, &desc, 1);
  1200. /* update the next buffer pointer */
  1201. mod->fastrx_num = (desc.control & DESC_WRAP) ? 0
  1202. : (mod->fastrx_num + 1);
  1203. /* there are still more buffers to process */
  1204. spin_unlock_irqrestore(&mod->lock, flags);
  1205. return 0;
  1206. }
  1207. static int ican3_napi(struct napi_struct *napi, int budget)
  1208. {
  1209. struct ican3_dev *mod = container_of(napi, struct ican3_dev, napi);
  1210. unsigned long flags;
  1211. int received = 0;
  1212. int ret;
  1213. /* process all communication messages */
  1214. while (true) {
  1215. struct ican3_msg uninitialized_var(msg);
  1216. ret = ican3_recv_msg(mod, &msg);
  1217. if (ret)
  1218. break;
  1219. ican3_handle_message(mod, &msg);
  1220. }
  1221. /* process all CAN frames from the fast interface */
  1222. while (received < budget) {
  1223. ret = ican3_recv_skb(mod);
  1224. if (ret)
  1225. break;
  1226. received++;
  1227. }
  1228. /* We have processed all packets that the adapter had, but it
  1229. * was less than our budget, stop polling */
  1230. if (received < budget)
  1231. napi_complete(napi);
  1232. spin_lock_irqsave(&mod->lock, flags);
  1233. /* Wake up the transmit queue if necessary */
  1234. if (netif_queue_stopped(mod->ndev) && ican3_txok(mod))
  1235. netif_wake_queue(mod->ndev);
  1236. spin_unlock_irqrestore(&mod->lock, flags);
  1237. /* re-enable interrupt generation */
  1238. iowrite8(1 << mod->num, &mod->ctrl->int_enable);
  1239. return received;
  1240. }
  1241. static irqreturn_t ican3_irq(int irq, void *dev_id)
  1242. {
  1243. struct ican3_dev *mod = dev_id;
  1244. u8 stat;
  1245. /*
  1246. * The interrupt status register on this device reports interrupts
  1247. * as zeroes instead of using ones like most other devices
  1248. */
  1249. stat = ioread8(&mod->ctrl->int_disable) & (1 << mod->num);
  1250. if (stat == (1 << mod->num))
  1251. return IRQ_NONE;
  1252. /* clear the MODULbus interrupt from the microcontroller */
  1253. ioread8(&mod->dpmctrl->interrupt);
  1254. /* disable interrupt generation, schedule the NAPI poller */
  1255. iowrite8(1 << mod->num, &mod->ctrl->int_disable);
  1256. napi_schedule(&mod->napi);
  1257. return IRQ_HANDLED;
  1258. }
  1259. /*
  1260. * Firmware reset, startup, and shutdown
  1261. */
  1262. /*
  1263. * Reset an ICAN module to its power-on state
  1264. *
  1265. * CONTEXT: no network device registered
  1266. */
  1267. static int ican3_reset_module(struct ican3_dev *mod)
  1268. {
  1269. unsigned long start;
  1270. u8 runold, runnew;
  1271. /* disable interrupts so no more work is scheduled */
  1272. iowrite8(1 << mod->num, &mod->ctrl->int_disable);
  1273. /* the first unallocated page in the DPM is #9 */
  1274. mod->free_page = DPM_FREE_START;
  1275. ican3_set_page(mod, QUEUE_OLD_CONTROL);
  1276. runold = ioread8(mod->dpm + TARGET_RUNNING);
  1277. /* reset the module */
  1278. iowrite8(0x00, &mod->dpmctrl->hwreset);
  1279. /* wait until the module has finished resetting and is running */
  1280. start = jiffies;
  1281. do {
  1282. ican3_set_page(mod, QUEUE_OLD_CONTROL);
  1283. runnew = ioread8(mod->dpm + TARGET_RUNNING);
  1284. if (runnew == (runold ^ 0xff))
  1285. return 0;
  1286. msleep(10);
  1287. } while (time_before(jiffies, start + HZ / 2));
  1288. netdev_err(mod->ndev, "failed to reset CAN module\n");
  1289. return -ETIMEDOUT;
  1290. }
  1291. static void ican3_shutdown_module(struct ican3_dev *mod)
  1292. {
  1293. ican3_msg_disconnect(mod);
  1294. ican3_reset_module(mod);
  1295. }
  1296. /*
  1297. * Startup an ICAN module, bringing it into fast mode
  1298. */
  1299. static int ican3_startup_module(struct ican3_dev *mod)
  1300. {
  1301. int ret;
  1302. ret = ican3_reset_module(mod);
  1303. if (ret) {
  1304. netdev_err(mod->ndev, "unable to reset module\n");
  1305. return ret;
  1306. }
  1307. /* detect firmware */
  1308. memcpy_fromio(mod->fwinfo, mod->dpm + FIRMWARE_STAMP, sizeof(mod->fwinfo) - 1);
  1309. if (strncmp(mod->fwinfo, "JANZ-ICAN3", 10)) {
  1310. netdev_err(mod->ndev, "ICAN3 not detected (found %s)\n", mod->fwinfo);
  1311. return -ENODEV;
  1312. }
  1313. if (strstr(mod->fwinfo, "CAL/CANopen"))
  1314. mod->fwtype = ICAN3_FWTYPE_CAL_CANOPEN;
  1315. else
  1316. mod->fwtype = ICAN3_FWTYPE_ICANOS;
  1317. /* re-enable interrupts so we can send messages */
  1318. iowrite8(1 << mod->num, &mod->ctrl->int_enable);
  1319. ret = ican3_msg_connect(mod);
  1320. if (ret) {
  1321. netdev_err(mod->ndev, "unable to connect to module\n");
  1322. return ret;
  1323. }
  1324. ican3_init_new_host_interface(mod);
  1325. ret = ican3_msg_newhostif(mod);
  1326. if (ret) {
  1327. netdev_err(mod->ndev, "unable to switch to new-style interface\n");
  1328. return ret;
  1329. }
  1330. /* default to "termination on" */
  1331. ret = ican3_set_termination(mod, true);
  1332. if (ret) {
  1333. netdev_err(mod->ndev, "unable to enable termination\n");
  1334. return ret;
  1335. }
  1336. /* default to "bus errors enabled" */
  1337. ret = ican3_set_buserror(mod, 1);
  1338. if (ret) {
  1339. netdev_err(mod->ndev, "unable to set bus-error\n");
  1340. return ret;
  1341. }
  1342. ican3_init_fast_host_interface(mod);
  1343. ret = ican3_msg_fasthostif(mod);
  1344. if (ret) {
  1345. netdev_err(mod->ndev, "unable to switch to fast host interface\n");
  1346. return ret;
  1347. }
  1348. ret = ican3_set_id_filter(mod, true);
  1349. if (ret) {
  1350. netdev_err(mod->ndev, "unable to set acceptance filter\n");
  1351. return ret;
  1352. }
  1353. return 0;
  1354. }
  1355. /*
  1356. * CAN Network Device
  1357. */
  1358. static int ican3_open(struct net_device *ndev)
  1359. {
  1360. struct ican3_dev *mod = netdev_priv(ndev);
  1361. int ret;
  1362. /* open the CAN layer */
  1363. ret = open_candev(ndev);
  1364. if (ret) {
  1365. netdev_err(mod->ndev, "unable to start CAN layer\n");
  1366. return ret;
  1367. }
  1368. /* bring the bus online */
  1369. ret = ican3_set_bus_state(mod, true);
  1370. if (ret) {
  1371. netdev_err(mod->ndev, "unable to set bus-on\n");
  1372. close_candev(ndev);
  1373. return ret;
  1374. }
  1375. /* start up the network device */
  1376. mod->can.state = CAN_STATE_ERROR_ACTIVE;
  1377. netif_start_queue(ndev);
  1378. return 0;
  1379. }
  1380. static int ican3_stop(struct net_device *ndev)
  1381. {
  1382. struct ican3_dev *mod = netdev_priv(ndev);
  1383. int ret;
  1384. /* stop the network device xmit routine */
  1385. netif_stop_queue(ndev);
  1386. mod->can.state = CAN_STATE_STOPPED;
  1387. /* bring the bus offline, stop receiving packets */
  1388. ret = ican3_set_bus_state(mod, false);
  1389. if (ret) {
  1390. netdev_err(mod->ndev, "unable to set bus-off\n");
  1391. return ret;
  1392. }
  1393. /* drop all outstanding echo skbs */
  1394. skb_queue_purge(&mod->echoq);
  1395. /* close the CAN layer */
  1396. close_candev(ndev);
  1397. return 0;
  1398. }
  1399. static int ican3_xmit(struct sk_buff *skb, struct net_device *ndev)
  1400. {
  1401. struct ican3_dev *mod = netdev_priv(ndev);
  1402. struct can_frame *cf = (struct can_frame *)skb->data;
  1403. struct ican3_fast_desc desc;
  1404. void __iomem *desc_addr;
  1405. unsigned long flags;
  1406. if (can_dropped_invalid_skb(ndev, skb))
  1407. return NETDEV_TX_OK;
  1408. spin_lock_irqsave(&mod->lock, flags);
  1409. /* check that we can actually transmit */
  1410. if (!ican3_txok(mod)) {
  1411. netdev_err(mod->ndev, "BUG: no free descriptors\n");
  1412. spin_unlock_irqrestore(&mod->lock, flags);
  1413. return NETDEV_TX_BUSY;
  1414. }
  1415. /* copy the control bits of the descriptor */
  1416. ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16));
  1417. desc_addr = mod->dpm + ((mod->fasttx_num % 16) * sizeof(desc));
  1418. memset(&desc, 0, sizeof(desc));
  1419. memcpy_fromio(&desc, desc_addr, 1);
  1420. /* convert the Linux CAN frame into ICAN3 format */
  1421. can_frame_to_ican3(mod, cf, &desc);
  1422. /*
  1423. * This hardware doesn't have TX-done notifications, so we'll try and
  1424. * emulate it the best we can using ECHO skbs. Add the skb to the ECHO
  1425. * stack. Upon packet reception, check if the ECHO skb and received
  1426. * skb match, and use that to wake the queue.
  1427. */
  1428. ican3_put_echo_skb(mod, skb);
  1429. /*
  1430. * the programming manual says that you must set the IVALID bit, then
  1431. * interrupt, then set the valid bit. Quite weird, but it seems to be
  1432. * required for this to work
  1433. */
  1434. desc.control |= DESC_IVALID;
  1435. memcpy_toio(desc_addr, &desc, sizeof(desc));
  1436. /* generate a MODULbus interrupt to the microcontroller */
  1437. iowrite8(0x01, &mod->dpmctrl->interrupt);
  1438. desc.control ^= DESC_VALID;
  1439. memcpy_toio(desc_addr, &desc, sizeof(desc));
  1440. /* update the next buffer pointer */
  1441. mod->fasttx_num = (desc.control & DESC_WRAP) ? 0
  1442. : (mod->fasttx_num + 1);
  1443. /* if there is no free descriptor space, stop the transmit queue */
  1444. if (!ican3_txok(mod))
  1445. netif_stop_queue(ndev);
  1446. spin_unlock_irqrestore(&mod->lock, flags);
  1447. return NETDEV_TX_OK;
  1448. }
  1449. static const struct net_device_ops ican3_netdev_ops = {
  1450. .ndo_open = ican3_open,
  1451. .ndo_stop = ican3_stop,
  1452. .ndo_start_xmit = ican3_xmit,
  1453. .ndo_change_mtu = can_change_mtu,
  1454. };
  1455. /*
  1456. * Low-level CAN Device
  1457. */
  1458. /* This structure was stolen from drivers/net/can/sja1000/sja1000.c */
  1459. static const struct can_bittiming_const ican3_bittiming_const = {
  1460. .name = DRV_NAME,
  1461. .tseg1_min = 1,
  1462. .tseg1_max = 16,
  1463. .tseg2_min = 1,
  1464. .tseg2_max = 8,
  1465. .sjw_max = 4,
  1466. .brp_min = 1,
  1467. .brp_max = 64,
  1468. .brp_inc = 1,
  1469. };
  1470. static int ican3_set_mode(struct net_device *ndev, enum can_mode mode)
  1471. {
  1472. struct ican3_dev *mod = netdev_priv(ndev);
  1473. int ret;
  1474. if (mode != CAN_MODE_START)
  1475. return -ENOTSUPP;
  1476. /* bring the bus online */
  1477. ret = ican3_set_bus_state(mod, true);
  1478. if (ret) {
  1479. netdev_err(ndev, "unable to set bus-on\n");
  1480. return ret;
  1481. }
  1482. /* start up the network device */
  1483. mod->can.state = CAN_STATE_ERROR_ACTIVE;
  1484. if (netif_queue_stopped(ndev))
  1485. netif_wake_queue(ndev);
  1486. return 0;
  1487. }
  1488. static int ican3_get_berr_counter(const struct net_device *ndev,
  1489. struct can_berr_counter *bec)
  1490. {
  1491. struct ican3_dev *mod = netdev_priv(ndev);
  1492. int ret;
  1493. ret = ican3_send_inquiry(mod, INQUIRY_STATUS);
  1494. if (ret)
  1495. return ret;
  1496. if (!wait_for_completion_timeout(&mod->buserror_comp, HZ)) {
  1497. netdev_info(mod->ndev, "%s timed out\n", __func__);
  1498. return -ETIMEDOUT;
  1499. }
  1500. bec->rxerr = mod->bec.rxerr;
  1501. bec->txerr = mod->bec.txerr;
  1502. return 0;
  1503. }
  1504. /*
  1505. * Sysfs Attributes
  1506. */
  1507. static ssize_t ican3_sysfs_show_term(struct device *dev,
  1508. struct device_attribute *attr,
  1509. char *buf)
  1510. {
  1511. struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
  1512. int ret;
  1513. ret = ican3_send_inquiry(mod, INQUIRY_TERMINATION);
  1514. if (ret)
  1515. return ret;
  1516. if (!wait_for_completion_timeout(&mod->termination_comp, HZ)) {
  1517. netdev_info(mod->ndev, "%s timed out\n", __func__);
  1518. return -ETIMEDOUT;
  1519. }
  1520. return snprintf(buf, PAGE_SIZE, "%u\n", mod->termination_enabled);
  1521. }
  1522. static ssize_t ican3_sysfs_set_term(struct device *dev,
  1523. struct device_attribute *attr,
  1524. const char *buf, size_t count)
  1525. {
  1526. struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
  1527. unsigned long enable;
  1528. int ret;
  1529. if (kstrtoul(buf, 0, &enable))
  1530. return -EINVAL;
  1531. ret = ican3_set_termination(mod, enable);
  1532. if (ret)
  1533. return ret;
  1534. return count;
  1535. }
  1536. static ssize_t ican3_sysfs_show_fwinfo(struct device *dev,
  1537. struct device_attribute *attr,
  1538. char *buf)
  1539. {
  1540. struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
  1541. return scnprintf(buf, PAGE_SIZE, "%s\n", mod->fwinfo);
  1542. }
  1543. static DEVICE_ATTR(termination, S_IWUSR | S_IRUGO, ican3_sysfs_show_term,
  1544. ican3_sysfs_set_term);
  1545. static DEVICE_ATTR(fwinfo, S_IRUSR | S_IRUGO, ican3_sysfs_show_fwinfo, NULL);
  1546. static struct attribute *ican3_sysfs_attrs[] = {
  1547. &dev_attr_termination.attr,
  1548. &dev_attr_fwinfo.attr,
  1549. NULL,
  1550. };
  1551. static struct attribute_group ican3_sysfs_attr_group = {
  1552. .attrs = ican3_sysfs_attrs,
  1553. };
  1554. /*
  1555. * PCI Subsystem
  1556. */
  1557. static int ican3_probe(struct platform_device *pdev)
  1558. {
  1559. struct janz_platform_data *pdata;
  1560. struct net_device *ndev;
  1561. struct ican3_dev *mod;
  1562. struct resource *res;
  1563. struct device *dev;
  1564. int ret;
  1565. pdata = dev_get_platdata(&pdev->dev);
  1566. if (!pdata)
  1567. return -ENXIO;
  1568. dev_dbg(&pdev->dev, "probe: module number %d\n", pdata->modno);
  1569. /* save the struct device for printing */
  1570. dev = &pdev->dev;
  1571. /* allocate the CAN device and private data */
  1572. ndev = alloc_candev(sizeof(*mod), 0);
  1573. if (!ndev) {
  1574. dev_err(dev, "unable to allocate CANdev\n");
  1575. ret = -ENOMEM;
  1576. goto out_return;
  1577. }
  1578. platform_set_drvdata(pdev, ndev);
  1579. mod = netdev_priv(ndev);
  1580. mod->ndev = ndev;
  1581. mod->num = pdata->modno;
  1582. netif_napi_add(ndev, &mod->napi, ican3_napi, ICAN3_RX_BUFFERS);
  1583. skb_queue_head_init(&mod->echoq);
  1584. spin_lock_init(&mod->lock);
  1585. init_completion(&mod->termination_comp);
  1586. init_completion(&mod->buserror_comp);
  1587. /* setup device-specific sysfs attributes */
  1588. ndev->sysfs_groups[0] = &ican3_sysfs_attr_group;
  1589. /* the first unallocated page in the DPM is 9 */
  1590. mod->free_page = DPM_FREE_START;
  1591. ndev->netdev_ops = &ican3_netdev_ops;
  1592. ndev->flags |= IFF_ECHO;
  1593. SET_NETDEV_DEV(ndev, &pdev->dev);
  1594. mod->can.clock.freq = ICAN3_CAN_CLOCK;
  1595. mod->can.bittiming_const = &ican3_bittiming_const;
  1596. mod->can.do_set_mode = ican3_set_mode;
  1597. mod->can.do_get_berr_counter = ican3_get_berr_counter;
  1598. mod->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES
  1599. | CAN_CTRLMODE_BERR_REPORTING
  1600. | CAN_CTRLMODE_ONE_SHOT;
  1601. /* find our IRQ number */
  1602. mod->irq = platform_get_irq(pdev, 0);
  1603. if (mod->irq < 0) {
  1604. dev_err(dev, "IRQ line not found\n");
  1605. ret = -ENODEV;
  1606. goto out_free_ndev;
  1607. }
  1608. ndev->irq = mod->irq;
  1609. /* get access to the MODULbus registers for this module */
  1610. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1611. if (!res) {
  1612. dev_err(dev, "MODULbus registers not found\n");
  1613. ret = -ENODEV;
  1614. goto out_free_ndev;
  1615. }
  1616. mod->dpm = ioremap(res->start, resource_size(res));
  1617. if (!mod->dpm) {
  1618. dev_err(dev, "MODULbus registers not ioremap\n");
  1619. ret = -ENOMEM;
  1620. goto out_free_ndev;
  1621. }
  1622. mod->dpmctrl = mod->dpm + DPM_PAGE_SIZE;
  1623. /* get access to the control registers for this module */
  1624. res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  1625. if (!res) {
  1626. dev_err(dev, "CONTROL registers not found\n");
  1627. ret = -ENODEV;
  1628. goto out_iounmap_dpm;
  1629. }
  1630. mod->ctrl = ioremap(res->start, resource_size(res));
  1631. if (!mod->ctrl) {
  1632. dev_err(dev, "CONTROL registers not ioremap\n");
  1633. ret = -ENOMEM;
  1634. goto out_iounmap_dpm;
  1635. }
  1636. /* disable our IRQ, then hookup the IRQ handler */
  1637. iowrite8(1 << mod->num, &mod->ctrl->int_disable);
  1638. ret = request_irq(mod->irq, ican3_irq, IRQF_SHARED, DRV_NAME, mod);
  1639. if (ret) {
  1640. dev_err(dev, "unable to request IRQ\n");
  1641. goto out_iounmap_ctrl;
  1642. }
  1643. /* reset and initialize the CAN controller into fast mode */
  1644. napi_enable(&mod->napi);
  1645. ret = ican3_startup_module(mod);
  1646. if (ret) {
  1647. dev_err(dev, "%s: unable to start CANdev\n", __func__);
  1648. goto out_free_irq;
  1649. }
  1650. /* register with the Linux CAN layer */
  1651. ret = register_candev(ndev);
  1652. if (ret) {
  1653. dev_err(dev, "%s: unable to register CANdev\n", __func__);
  1654. goto out_free_irq;
  1655. }
  1656. netdev_info(mod->ndev, "module %d: registered CAN device\n", pdata->modno);
  1657. return 0;
  1658. out_free_irq:
  1659. napi_disable(&mod->napi);
  1660. iowrite8(1 << mod->num, &mod->ctrl->int_disable);
  1661. free_irq(mod->irq, mod);
  1662. out_iounmap_ctrl:
  1663. iounmap(mod->ctrl);
  1664. out_iounmap_dpm:
  1665. iounmap(mod->dpm);
  1666. out_free_ndev:
  1667. free_candev(ndev);
  1668. out_return:
  1669. return ret;
  1670. }
  1671. static int ican3_remove(struct platform_device *pdev)
  1672. {
  1673. struct net_device *ndev = platform_get_drvdata(pdev);
  1674. struct ican3_dev *mod = netdev_priv(ndev);
  1675. /* unregister the netdevice, stop interrupts */
  1676. unregister_netdev(ndev);
  1677. napi_disable(&mod->napi);
  1678. iowrite8(1 << mod->num, &mod->ctrl->int_disable);
  1679. free_irq(mod->irq, mod);
  1680. /* put the module into reset */
  1681. ican3_shutdown_module(mod);
  1682. /* unmap all registers */
  1683. iounmap(mod->ctrl);
  1684. iounmap(mod->dpm);
  1685. free_candev(ndev);
  1686. return 0;
  1687. }
  1688. static struct platform_driver ican3_driver = {
  1689. .driver = {
  1690. .name = DRV_NAME,
  1691. },
  1692. .probe = ican3_probe,
  1693. .remove = ican3_remove,
  1694. };
  1695. module_platform_driver(ican3_driver);
  1696. MODULE_AUTHOR("Ira W. Snyder <iws@ovro.caltech.edu>");
  1697. MODULE_DESCRIPTION("Janz MODULbus VMOD-ICAN3 Driver");
  1698. MODULE_LICENSE("GPL");
  1699. MODULE_ALIAS("platform:janz-ican3");