ov490.c 12 KB

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  1. /*
  2. * OmniVision OV490 Camera Driver
  3. *
  4. * Copyright (C) 2015 Texas Instruments
  5. * Author: Nikhil Devshatwar <nikhil.nd@ti.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/i2c.h>
  14. #include <linux/gpio.h>
  15. #include <linux/init.h>
  16. #include <linux/module.h>
  17. #include <linux/slab.h>
  18. #include <linux/v4l2-mediabus.h>
  19. #include <linux/videodev2.h>
  20. #include <linux/mutex.h>
  21. #include <linux/delay.h>
  22. #include <media/soc_camera.h>
  23. #include <media/v4l2-async.h>
  24. #include <media/v4l2-common.h>
  25. #include <linux/gpio/consumer.h>
  26. #include <linux/of_device.h>
  27. #include <media/v4l2-of.h>
  28. #include <media/v4l2-event.h>
  29. #include <media/v4l2-subdev.h>
  30. /* Register definitions */
  31. #define OV490_PID 0x300a
  32. #define OV490_VER 0x300b
  33. #define OV490_BANK_HIGH 0xfffd
  34. #define OV490_BANK_LOW 0xfffe
  35. #define OV490_MIPI_TX_LANE_CTRL2 0x8029202D
  36. #define OV490_MIPI_TX_LANE_CTRL0 0x80292015
  37. #define OV490_SC_RESET1 0x80800011
  38. /* IDs */
  39. #define OV490_VERSION_REG 0x0490
  40. #define OV490_VERSION(pid, ver) (((pid) << 8) | ((ver) & 0xff))
  41. #define OV490_MAX_WIDTH 1280
  42. #define OV490_MAX_HEIGHT 800
  43. #define MAX_NUM_GPIOS 10
  44. /*
  45. * = fvco / pixel_width * num_lanes
  46. * = 804,000,000 / 16 bits * 4 lanes
  47. */
  48. #define OV490_PIXEL_RATE_PER_LANE 50250000
  49. struct ov490_regval {
  50. u32 addr;
  51. u8 val;
  52. } ov490_default_regs[] = {
  53. { 0x80195000, 0x01, },
  54. { 0x80195001, 0x01, },
  55. { 0x80195002, 0x05, },
  56. { 0x80195003, 0x08, },
  57. { 0x80195004, 0x04, },
  58. { 0x80195005, 0x40, },
  59. { 0x80195006, 0x05, },
  60. { 0x80195007, 0x08, },
  61. { 0x80195008, 0x04, },
  62. { 0x80195009, 0x40, },
  63. { 0x8019500A, 0x00, },
  64. { 0x80195000, 0x31, },
  65. { 0x808000C0, 0x39, },
  66. { 0x808000C0, 0xE2, },
  67. { 0x8082000A, 0x92, },
  68. };
  69. struct ov490_color_format {
  70. u32 code;
  71. u32 colorspace;
  72. };
  73. struct ov490_priv {
  74. struct v4l2_subdev subdev;
  75. struct v4l2_async_subdev asd;
  76. const struct ov490_color_format *cfmt;
  77. int width;
  78. int height;
  79. int num_lanes;
  80. struct gpio_descs *mux_gpios;
  81. struct v4l2_ctrl_handler handler;
  82. struct v4l2_ctrl *pixel_rate;
  83. };
  84. DEFINE_MUTEX(ov490_lock);
  85. static int ov490_init_gpios(struct i2c_client *client);
  86. /*
  87. * supported color format list
  88. */
  89. static const struct ov490_color_format ov490_cfmts[] = {
  90. {
  91. .code = MEDIA_BUS_FMT_YUYV8_2X8,
  92. .colorspace = V4L2_COLORSPACE_SMPTE170M,
  93. },
  94. };
  95. static struct ov490_priv *to_ov490(const struct i2c_client *client)
  96. {
  97. return container_of(i2c_get_clientdata(client), struct ov490_priv,
  98. subdev);
  99. }
  100. static struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl)
  101. {
  102. return &container_of(ctrl->handler, struct ov490_priv, handler)->subdev;
  103. }
  104. /* read a register with 16bit address */
  105. static int ov490_reg_read(struct i2c_client *client, u16 reg, u8 *val)
  106. {
  107. int ret;
  108. u8 data[2] = { reg >> 8, reg & 0xff };
  109. struct i2c_msg msg[2] = {
  110. [0] = {
  111. .addr = client->addr,
  112. .flags = 0,
  113. .buf = data,
  114. .len = 2,
  115. },
  116. [1] = {
  117. .addr = client->addr,
  118. .flags = I2C_M_RD,
  119. .buf = data,
  120. .len = 1,
  121. },
  122. };
  123. ret = i2c_transfer(client->adapter, msg, 2);
  124. if (ret < 0)
  125. goto err;
  126. *val = data[0];
  127. return 0;
  128. err:
  129. dev_err(&client->dev, "Failed reading register 0x%04x!\n", reg);
  130. return ret;
  131. }
  132. /* write data byte to a register with 16bit address */
  133. static int ov490_reg_write16(struct i2c_client *client, u16 reg, u8 val)
  134. {
  135. int ret;
  136. u8 data[3] = { reg >> 8, reg & 0xff, val };
  137. struct i2c_msg msg = {
  138. .addr = client->addr,
  139. .flags = 0,
  140. .len = 3,
  141. .buf = data,
  142. };
  143. ret = i2c_transfer(client->adapter, &msg, 1);
  144. if (ret < 0) {
  145. dev_err(&client->dev, "Failed writing register 0x%04x!\n", reg);
  146. return ret;
  147. }
  148. return 0;
  149. }
  150. static int ov490_reg_write32(struct i2c_client *client, u32 reg, u8 val)
  151. {
  152. u8 bank_high = (reg >> 24) & 0xff;
  153. u8 bank_low = (reg >> 16) & 0xff;
  154. u16 reg_addr = reg & 0xffff;
  155. int ret = 0;
  156. /* For writing a register with 32 bit address, First set the bank
  157. * address by writing to two BANK address registers. Then access
  158. * the register using 16LSB bits.
  159. */
  160. ret = ov490_reg_write16(client, OV490_BANK_HIGH, bank_high);
  161. if (!ret)
  162. ret = ov490_reg_write16(client, OV490_BANK_LOW, bank_low);
  163. if (!ret)
  164. ret = ov490_reg_write16(client, reg_addr, val);
  165. return ret;
  166. }
  167. /* Start/Stop streaming from the device */
  168. static int ov490_s_stream(struct v4l2_subdev *sd, int enable)
  169. {
  170. struct i2c_client *client = v4l2_get_subdevdata(sd);
  171. struct ov490_priv *priv = to_ov490(client);
  172. int ret = 0, i, val;
  173. mutex_lock(&ov490_lock);
  174. ret = ov490_init_gpios(client);
  175. if (ret) {
  176. dev_err(&client->dev, "Failed to request gpios");
  177. goto unlock;
  178. }
  179. if (enable) {
  180. /* Take MIPI_TX out of reset */
  181. ov490_reg_write32(client, OV490_SC_RESET1, 0x00);
  182. ov490_reg_write32(client, OV490_MIPI_TX_LANE_CTRL0, 0x80);
  183. } else {
  184. ov490_reg_write32(client, OV490_MIPI_TX_LANE_CTRL0, 0xa0);
  185. /* Put MIPI_TX in reset */
  186. ov490_reg_write32(client, OV490_SC_RESET1, 0x80);
  187. goto unlock;
  188. }
  189. for (i = 0; i < ARRAY_SIZE(ov490_default_regs); i++) {
  190. ret = ov490_reg_write32(client,
  191. ov490_default_regs[i].addr,
  192. ov490_default_regs[i].val);
  193. if (ret)
  194. goto unlock;
  195. }
  196. /* These register updates triggers a routine to configure ISP
  197. * Wait for a while before any more changes are done
  198. */
  199. mdelay(5);
  200. val = priv->num_lanes == 2 ? 0x03 : priv->num_lanes == 4 ? 0x0F : 0x0F;
  201. dev_info(&client->dev, "Using %d data lanes\n", priv->num_lanes);
  202. ov490_reg_write32(client, OV490_MIPI_TX_LANE_CTRL2, val);
  203. unlock:
  204. mutex_unlock(&ov490_lock);
  205. return ret;
  206. }
  207. static int ov490_get_fmt(struct v4l2_subdev *sd,
  208. struct v4l2_subdev_pad_config *cfg,
  209. struct v4l2_subdev_format *fmt)
  210. {
  211. struct i2c_client *client = v4l2_get_subdevdata(sd);
  212. struct ov490_priv *priv = to_ov490(client);
  213. struct v4l2_mbus_framefmt *mf = &fmt->format;
  214. mf->width = priv->width;
  215. mf->height = priv->height;
  216. mf->code = priv->cfmt->code;
  217. mf->colorspace = priv->cfmt->colorspace;
  218. mf->field = V4L2_FIELD_NONE;
  219. return 0;
  220. }
  221. /* Fixed format - no configurability */
  222. static int ov490_set_fmt(struct v4l2_subdev *sd,
  223. struct v4l2_subdev_pad_config *cfg,
  224. struct v4l2_subdev_format *fmt)
  225. {
  226. struct i2c_client *client = v4l2_get_subdevdata(sd);
  227. struct ov490_priv *priv = to_ov490(client);
  228. struct v4l2_mbus_framefmt *mf = &fmt->format;
  229. mf->width = priv->width;
  230. mf->height = priv->height;
  231. mf->code = priv->cfmt->code;
  232. mf->colorspace = priv->cfmt->colorspace;
  233. mf->field = V4L2_FIELD_NONE;
  234. return 0;
  235. }
  236. static int ov490_enum_code(struct v4l2_subdev *sd,
  237. struct v4l2_subdev_pad_config *cfg,
  238. struct v4l2_subdev_mbus_code_enum *code)
  239. {
  240. if (code->index >= ARRAY_SIZE(ov490_cfmts))
  241. return -EINVAL;
  242. code->code = ov490_cfmts[code->index].code;
  243. return 0;
  244. }
  245. static int ov490_enum_size(struct v4l2_subdev *sd,
  246. struct v4l2_subdev_pad_config *cfg,
  247. struct v4l2_subdev_frame_size_enum *fse)
  248. {
  249. int cam_width[] = { OV490_MAX_WIDTH };
  250. int cam_height[] = { OV490_MAX_HEIGHT };
  251. if (fse->index >= ARRAY_SIZE(cam_width))
  252. return -EINVAL;
  253. fse->max_width = fse->min_width = cam_width[fse->index];
  254. fse->max_height = fse->min_height = cam_height[fse->index];
  255. return 0;
  256. }
  257. static int ov490_s_ctrl(struct v4l2_ctrl *ctrl)
  258. {
  259. struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
  260. struct i2c_client *client = v4l2_get_subdevdata(sd);
  261. /* If the board has programmable pixel clock, set it here */
  262. if (ctrl->id == V4L2_CID_PIXEL_RATE)
  263. dev_info(&client->dev, "Pixel rate set to %d\n",
  264. ctrl->val);
  265. return 0;
  266. }
  267. static int ov490_init_gpios(struct i2c_client *client)
  268. {
  269. struct ov490_priv *priv = to_ov490(client);
  270. int ret = 0;
  271. /* Request the gpio lines and set the values
  272. * then release them so that other drivers can use them
  273. * This allows changing common board muxes which are
  274. * controlled by multiple drivers
  275. */
  276. priv->mux_gpios = gpiod_get_array(&client->dev, "mux", GPIOD_OUT_HIGH);
  277. if (IS_ERR(priv->mux_gpios))
  278. goto done;
  279. gpiod_put_array(priv->mux_gpios);
  280. done:
  281. return ret;
  282. }
  283. static int ov490_video_probe(struct i2c_client *client)
  284. {
  285. u8 pid, ver;
  286. u16 id;
  287. int ret;
  288. /* check and show product ID and manufacturer ID */
  289. ret = ov490_reg_read(client, OV490_PID, &pid);
  290. if (ret)
  291. return ret;
  292. id = pid << 8;
  293. ret = ov490_reg_read(client, OV490_VER, &ver);
  294. if (ret)
  295. return ret;
  296. id |= ver;
  297. if (OV490_VERSION(pid, ver) != OV490_VERSION_REG) {
  298. dev_err(&client->dev, "Product ID error %x:%x\n", pid, ver);
  299. return -ENODEV;
  300. }
  301. dev_info(&client->dev, "ov490 Product ID %x Manufacturer ID %x\n",
  302. pid, ver);
  303. return 0;
  304. }
  305. static const struct v4l2_subdev_video_ops ov490_video_ops = {
  306. .s_stream = ov490_s_stream,
  307. };
  308. static const struct v4l2_subdev_core_ops ov490_core_ops = {
  309. .log_status = v4l2_ctrl_subdev_log_status,
  310. .subscribe_event = v4l2_ctrl_subdev_subscribe_event,
  311. .unsubscribe_event = v4l2_event_subdev_unsubscribe,
  312. };
  313. static const struct v4l2_subdev_pad_ops ov490_pad_ops = {
  314. .enum_mbus_code = ov490_enum_code,
  315. .enum_frame_size = ov490_enum_size,
  316. .get_fmt = ov490_get_fmt,
  317. .set_fmt = ov490_set_fmt,
  318. };
  319. static const struct v4l2_subdev_ops ov490_subdev_ops = {
  320. .video = &ov490_video_ops,
  321. .core = &ov490_core_ops,
  322. .pad = &ov490_pad_ops,
  323. };
  324. static const struct v4l2_ctrl_ops ov490_ctrl_ops = {
  325. .s_ctrl = ov490_s_ctrl,
  326. };
  327. /*
  328. * i2c_driver function
  329. */
  330. static int ov490_of_probe(struct i2c_client *client,
  331. struct device_node *node)
  332. {
  333. struct ov490_priv *priv = to_ov490(client);
  334. struct v4l2_of_endpoint endpoint = {};
  335. struct device_node *ep;
  336. int num_lanes = 0;
  337. ep = of_graph_get_next_endpoint(node, NULL);
  338. if (ep) {
  339. v4l2_of_parse_endpoint(ep, &endpoint);
  340. if (endpoint.bus_type == V4L2_MBUS_CSI2) {
  341. num_lanes = endpoint.bus.mipi_csi2.num_data_lanes;
  342. if (num_lanes == 2 || num_lanes == 4)
  343. priv->num_lanes = num_lanes;
  344. } else {
  345. dev_err(&client->dev, "Endpoint bus is not CSI bus!");
  346. }
  347. }
  348. return 0;
  349. }
  350. static int ov490_probe(struct i2c_client *client,
  351. const struct i2c_device_id *did)
  352. {
  353. struct device_node *node = client->dev.of_node;
  354. struct v4l2_ctrl_handler *hdl;
  355. struct ov490_priv *priv;
  356. struct v4l2_subdev *sd;
  357. int ret = 0;
  358. ret = ov490_video_probe(client);
  359. if (ret)
  360. goto err;
  361. priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL);
  362. if (!priv)
  363. return -ENOMEM;
  364. i2c_set_clientdata(client, priv);
  365. priv->num_lanes = 4;
  366. priv->cfmt = &ov490_cfmts[0];
  367. priv->width = OV490_MAX_WIDTH;
  368. priv->height = OV490_MAX_HEIGHT;
  369. ret = ov490_of_probe(client, node);
  370. if (ret)
  371. goto err;
  372. sd = &(priv->subdev);
  373. v4l2_i2c_subdev_init(sd, client, &ov490_subdev_ops);
  374. hdl = &priv->handler;
  375. sd->ctrl_handler = hdl;
  376. v4l2_ctrl_handler_init(hdl, 1);
  377. priv->pixel_rate = v4l2_ctrl_new_std(hdl, &ov490_ctrl_ops,
  378. V4L2_CID_PIXEL_RATE, 1, INT_MAX, 1,
  379. OV490_PIXEL_RATE_PER_LANE * priv->num_lanes);
  380. if (hdl->error) {
  381. dev_err(&client->dev, "Failed to add controls");
  382. ret = hdl->error;
  383. goto err;
  384. }
  385. ret = ov490_init_gpios(client);
  386. if (ret) {
  387. dev_err(&client->dev, "Failed to request gpios");
  388. goto err;
  389. }
  390. sd->dev = &client->dev;
  391. ret = v4l2_async_register_subdev(sd);
  392. err:
  393. return ret;
  394. }
  395. static int ov490_remove(struct i2c_client *client)
  396. {
  397. struct ov490_priv *priv = i2c_get_clientdata(client);
  398. v4l2_device_unregister_subdev(&priv->subdev);
  399. v4l2_ctrl_handler_free(&priv->handler);
  400. return 0;
  401. }
  402. static const struct i2c_device_id ov490_id[] = {
  403. { "ov490", 0 },
  404. { }
  405. };
  406. MODULE_DEVICE_TABLE(i2c, ov490_id);
  407. static const struct of_device_id ov490_dt_id[] = {
  408. {
  409. .compatible = "ovti,ov490",
  410. },
  411. {
  412. }
  413. };
  414. static struct i2c_driver ov490_i2c_driver = {
  415. .driver = {
  416. .name = "ov490",
  417. .of_match_table = ov490_dt_id,
  418. },
  419. .probe = ov490_probe,
  420. .remove = ov490_remove,
  421. .id_table = ov490_id,
  422. };
  423. module_i2c_driver(ov490_i2c_driver);
  424. MODULE_DESCRIPTION("SoC Camera driver for OmniVision OV490");
  425. MODULE_AUTHOR("Nikhil Devshatwar <nikhil.nd@ti.com>");
  426. MODULE_LICENSE("GPL v2");