i2c-mux-pca9541.c 10 KB

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  1. /*
  2. * I2C multiplexer driver for PCA9541 bus master selector
  3. *
  4. * Copyright (c) 2010 Ericsson AB.
  5. *
  6. * Author: Guenter Roeck <linux@roeck-us.net>
  7. *
  8. * Derived from:
  9. * pca954x.c
  10. *
  11. * Copyright (c) 2008-2009 Rodolfo Giometti <giometti@linux.it>
  12. * Copyright (c) 2008-2009 Eurotech S.p.A. <info@eurotech.it>
  13. *
  14. * This file is licensed under the terms of the GNU General Public
  15. * License version 2. This program is licensed "as is" without any
  16. * warranty of any kind, whether express or implied.
  17. */
  18. #include <linux/module.h>
  19. #include <linux/jiffies.h>
  20. #include <linux/delay.h>
  21. #include <linux/slab.h>
  22. #include <linux/device.h>
  23. #include <linux/i2c.h>
  24. #include <linux/i2c-mux.h>
  25. #include <linux/i2c/pca954x.h>
  26. /*
  27. * The PCA9541 is a bus master selector. It supports two I2C masters connected
  28. * to a single slave bus.
  29. *
  30. * Before each bus transaction, a master has to acquire bus ownership. After the
  31. * transaction is complete, bus ownership has to be released. This fits well
  32. * into the I2C multiplexer framework, which provides select and release
  33. * functions for this purpose. For this reason, this driver is modeled as
  34. * single-channel I2C bus multiplexer.
  35. *
  36. * This driver assumes that the two bus masters are controlled by two different
  37. * hosts. If a single host controls both masters, platform code has to ensure
  38. * that only one of the masters is instantiated at any given time.
  39. */
  40. #define PCA9541_CONTROL 0x01
  41. #define PCA9541_ISTAT 0x02
  42. #define PCA9541_CTL_MYBUS (1 << 0)
  43. #define PCA9541_CTL_NMYBUS (1 << 1)
  44. #define PCA9541_CTL_BUSON (1 << 2)
  45. #define PCA9541_CTL_NBUSON (1 << 3)
  46. #define PCA9541_CTL_BUSINIT (1 << 4)
  47. #define PCA9541_CTL_TESTON (1 << 6)
  48. #define PCA9541_CTL_NTESTON (1 << 7)
  49. #define PCA9541_ISTAT_INTIN (1 << 0)
  50. #define PCA9541_ISTAT_BUSINIT (1 << 1)
  51. #define PCA9541_ISTAT_BUSOK (1 << 2)
  52. #define PCA9541_ISTAT_BUSLOST (1 << 3)
  53. #define PCA9541_ISTAT_MYTEST (1 << 6)
  54. #define PCA9541_ISTAT_NMYTEST (1 << 7)
  55. #define BUSON (PCA9541_CTL_BUSON | PCA9541_CTL_NBUSON)
  56. #define MYBUS (PCA9541_CTL_MYBUS | PCA9541_CTL_NMYBUS)
  57. #define mybus(x) (!((x) & MYBUS) || ((x) & MYBUS) == MYBUS)
  58. #define busoff(x) (!((x) & BUSON) || ((x) & BUSON) == BUSON)
  59. /* arbitration timeouts, in jiffies */
  60. #define ARB_TIMEOUT (HZ / 8) /* 125 ms until forcing bus ownership */
  61. #define ARB2_TIMEOUT (HZ / 4) /* 250 ms until acquisition failure */
  62. /* arbitration retry delays, in us */
  63. #define SELECT_DELAY_SHORT 50
  64. #define SELECT_DELAY_LONG 1000
  65. struct pca9541 {
  66. struct i2c_client *client;
  67. unsigned long select_timeout;
  68. unsigned long arb_timeout;
  69. };
  70. static const struct i2c_device_id pca9541_id[] = {
  71. {"pca9541", 0},
  72. {}
  73. };
  74. MODULE_DEVICE_TABLE(i2c, pca9541_id);
  75. #ifdef CONFIG_OF
  76. static const struct of_device_id pca9541_of_match[] = {
  77. { .compatible = "nxp,pca9541" },
  78. {}
  79. };
  80. #endif
  81. /*
  82. * Write to chip register. Don't use i2c_transfer()/i2c_smbus_xfer()
  83. * as they will try to lock the adapter a second time.
  84. */
  85. static int pca9541_reg_write(struct i2c_client *client, u8 command, u8 val)
  86. {
  87. struct i2c_adapter *adap = client->adapter;
  88. int ret;
  89. if (adap->algo->master_xfer) {
  90. struct i2c_msg msg;
  91. char buf[2];
  92. msg.addr = client->addr;
  93. msg.flags = 0;
  94. msg.len = 2;
  95. buf[0] = command;
  96. buf[1] = val;
  97. msg.buf = buf;
  98. ret = __i2c_transfer(adap, &msg, 1);
  99. } else {
  100. union i2c_smbus_data data;
  101. data.byte = val;
  102. ret = adap->algo->smbus_xfer(adap, client->addr,
  103. client->flags,
  104. I2C_SMBUS_WRITE,
  105. command,
  106. I2C_SMBUS_BYTE_DATA, &data);
  107. }
  108. return ret;
  109. }
  110. /*
  111. * Read from chip register. Don't use i2c_transfer()/i2c_smbus_xfer()
  112. * as they will try to lock adapter a second time.
  113. */
  114. static int pca9541_reg_read(struct i2c_client *client, u8 command)
  115. {
  116. struct i2c_adapter *adap = client->adapter;
  117. int ret;
  118. u8 val;
  119. if (adap->algo->master_xfer) {
  120. struct i2c_msg msg[2] = {
  121. {
  122. .addr = client->addr,
  123. .flags = 0,
  124. .len = 1,
  125. .buf = &command
  126. },
  127. {
  128. .addr = client->addr,
  129. .flags = I2C_M_RD,
  130. .len = 1,
  131. .buf = &val
  132. }
  133. };
  134. ret = __i2c_transfer(adap, msg, 2);
  135. if (ret == 2)
  136. ret = val;
  137. else if (ret >= 0)
  138. ret = -EIO;
  139. } else {
  140. union i2c_smbus_data data;
  141. ret = adap->algo->smbus_xfer(adap, client->addr,
  142. client->flags,
  143. I2C_SMBUS_READ,
  144. command,
  145. I2C_SMBUS_BYTE_DATA, &data);
  146. if (!ret)
  147. ret = data.byte;
  148. }
  149. return ret;
  150. }
  151. /*
  152. * Arbitration management functions
  153. */
  154. /* Release bus. Also reset NTESTON and BUSINIT if it was set. */
  155. static void pca9541_release_bus(struct i2c_client *client)
  156. {
  157. int reg;
  158. reg = pca9541_reg_read(client, PCA9541_CONTROL);
  159. if (reg >= 0 && !busoff(reg) && mybus(reg))
  160. pca9541_reg_write(client, PCA9541_CONTROL,
  161. (reg & PCA9541_CTL_NBUSON) >> 1);
  162. }
  163. /*
  164. * Arbitration is defined as a two-step process. A bus master can only activate
  165. * the slave bus if it owns it; otherwise it has to request ownership first.
  166. * This multi-step process ensures that access contention is resolved
  167. * gracefully.
  168. *
  169. * Bus Ownership Other master Action
  170. * state requested access
  171. * ----------------------------------------------------
  172. * off - yes wait for arbitration timeout or
  173. * for other master to drop request
  174. * off no no take ownership
  175. * off yes no turn on bus
  176. * on yes - done
  177. * on no - wait for arbitration timeout or
  178. * for other master to release bus
  179. *
  180. * The main contention point occurs if the slave bus is off and both masters
  181. * request ownership at the same time. In this case, one master will turn on
  182. * the slave bus, believing that it owns it. The other master will request
  183. * bus ownership. Result is that the bus is turned on, and master which did
  184. * _not_ own the slave bus before ends up owning it.
  185. */
  186. /* Control commands per PCA9541 datasheet */
  187. static const u8 pca9541_control[16] = {
  188. 4, 0, 1, 5, 4, 4, 5, 5, 0, 0, 1, 1, 0, 4, 5, 1
  189. };
  190. /*
  191. * Channel arbitration
  192. *
  193. * Return values:
  194. * <0: error
  195. * 0 : bus not acquired
  196. * 1 : bus acquired
  197. */
  198. static int pca9541_arbitrate(struct i2c_client *client)
  199. {
  200. struct i2c_mux_core *muxc = i2c_get_clientdata(client);
  201. struct pca9541 *data = i2c_mux_priv(muxc);
  202. int reg;
  203. reg = pca9541_reg_read(client, PCA9541_CONTROL);
  204. if (reg < 0)
  205. return reg;
  206. if (busoff(reg)) {
  207. int istat;
  208. /*
  209. * Bus is off. Request ownership or turn it on unless
  210. * other master requested ownership.
  211. */
  212. istat = pca9541_reg_read(client, PCA9541_ISTAT);
  213. if (!(istat & PCA9541_ISTAT_NMYTEST)
  214. || time_is_before_eq_jiffies(data->arb_timeout)) {
  215. /*
  216. * Other master did not request ownership,
  217. * or arbitration timeout expired. Take the bus.
  218. */
  219. pca9541_reg_write(client,
  220. PCA9541_CONTROL,
  221. pca9541_control[reg & 0x0f]
  222. | PCA9541_CTL_NTESTON);
  223. data->select_timeout = SELECT_DELAY_SHORT;
  224. } else {
  225. /*
  226. * Other master requested ownership.
  227. * Set extra long timeout to give it time to acquire it.
  228. */
  229. data->select_timeout = SELECT_DELAY_LONG * 2;
  230. }
  231. } else if (mybus(reg)) {
  232. /*
  233. * Bus is on, and we own it. We are done with acquisition.
  234. * Reset NTESTON and BUSINIT, then return success.
  235. */
  236. if (reg & (PCA9541_CTL_NTESTON | PCA9541_CTL_BUSINIT))
  237. pca9541_reg_write(client,
  238. PCA9541_CONTROL,
  239. reg & ~(PCA9541_CTL_NTESTON
  240. | PCA9541_CTL_BUSINIT));
  241. return 1;
  242. } else {
  243. /*
  244. * Other master owns the bus.
  245. * If arbitration timeout has expired, force ownership.
  246. * Otherwise request it.
  247. */
  248. data->select_timeout = SELECT_DELAY_LONG;
  249. if (time_is_before_eq_jiffies(data->arb_timeout)) {
  250. /* Time is up, take the bus and reset it. */
  251. pca9541_reg_write(client,
  252. PCA9541_CONTROL,
  253. pca9541_control[reg & 0x0f]
  254. | PCA9541_CTL_BUSINIT
  255. | PCA9541_CTL_NTESTON);
  256. } else {
  257. /* Request bus ownership if needed */
  258. if (!(reg & PCA9541_CTL_NTESTON))
  259. pca9541_reg_write(client,
  260. PCA9541_CONTROL,
  261. reg | PCA9541_CTL_NTESTON);
  262. }
  263. }
  264. return 0;
  265. }
  266. static int pca9541_select_chan(struct i2c_mux_core *muxc, u32 chan)
  267. {
  268. struct pca9541 *data = i2c_mux_priv(muxc);
  269. struct i2c_client *client = data->client;
  270. int ret;
  271. unsigned long timeout = jiffies + ARB2_TIMEOUT;
  272. /* give up after this time */
  273. data->arb_timeout = jiffies + ARB_TIMEOUT;
  274. /* force bus ownership after this time */
  275. do {
  276. ret = pca9541_arbitrate(client);
  277. if (ret)
  278. return ret < 0 ? ret : 0;
  279. if (data->select_timeout == SELECT_DELAY_SHORT)
  280. udelay(data->select_timeout);
  281. else
  282. msleep(data->select_timeout / 1000);
  283. } while (time_is_after_eq_jiffies(timeout));
  284. return -ETIMEDOUT;
  285. }
  286. static int pca9541_release_chan(struct i2c_mux_core *muxc, u32 chan)
  287. {
  288. struct pca9541 *data = i2c_mux_priv(muxc);
  289. struct i2c_client *client = data->client;
  290. pca9541_release_bus(client);
  291. return 0;
  292. }
  293. /*
  294. * I2C init/probing/exit functions
  295. */
  296. static int pca9541_probe(struct i2c_client *client,
  297. const struct i2c_device_id *id)
  298. {
  299. struct i2c_adapter *adap = client->adapter;
  300. struct pca954x_platform_data *pdata = dev_get_platdata(&client->dev);
  301. struct i2c_mux_core *muxc;
  302. struct pca9541 *data;
  303. int force;
  304. int ret;
  305. if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE_DATA))
  306. return -ENODEV;
  307. /*
  308. * I2C accesses are unprotected here.
  309. * We have to lock the adapter before releasing the bus.
  310. */
  311. i2c_lock_adapter(adap);
  312. pca9541_release_bus(client);
  313. i2c_unlock_adapter(adap);
  314. /* Create mux adapter */
  315. force = 0;
  316. if (pdata)
  317. force = pdata->modes[0].adap_id;
  318. muxc = i2c_mux_alloc(adap, &client->dev, 1, sizeof(*data),
  319. I2C_MUX_ARBITRATOR,
  320. pca9541_select_chan, pca9541_release_chan);
  321. if (!muxc)
  322. return -ENOMEM;
  323. data = i2c_mux_priv(muxc);
  324. data->client = client;
  325. i2c_set_clientdata(client, muxc);
  326. ret = i2c_mux_add_adapter(muxc, force, 0, 0);
  327. if (ret) {
  328. dev_err(&client->dev, "failed to register master selector\n");
  329. return ret;
  330. }
  331. dev_info(&client->dev, "registered master selector for I2C %s\n",
  332. client->name);
  333. return 0;
  334. }
  335. static int pca9541_remove(struct i2c_client *client)
  336. {
  337. struct i2c_mux_core *muxc = i2c_get_clientdata(client);
  338. i2c_mux_del_adapters(muxc);
  339. return 0;
  340. }
  341. static struct i2c_driver pca9541_driver = {
  342. .driver = {
  343. .name = "pca9541",
  344. .of_match_table = of_match_ptr(pca9541_of_match),
  345. },
  346. .probe = pca9541_probe,
  347. .remove = pca9541_remove,
  348. .id_table = pca9541_id,
  349. };
  350. module_i2c_driver(pca9541_driver);
  351. MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
  352. MODULE_DESCRIPTION("PCA9541 I2C master selector driver");
  353. MODULE_LICENSE("GPL v2");