i2c-thunderx-pcidrv.c 6.1 KB

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  1. /*
  2. * Cavium ThunderX i2c driver.
  3. *
  4. * Copyright (C) 2015,2016 Cavium Inc.
  5. * Authors: Fred Martin <fmartin@caviumnetworks.com>
  6. * Jan Glauber <jglauber@cavium.com>
  7. *
  8. * This file is licensed under the terms of the GNU General Public
  9. * License version 2. This program is licensed "as is" without any
  10. * warranty of any kind, whether express or implied.
  11. */
  12. #include <linux/acpi.h>
  13. #include <linux/clk.h>
  14. #include <linux/delay.h>
  15. #include <linux/i2c.h>
  16. #include <linux/i2c-smbus.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/kernel.h>
  19. #include <linux/module.h>
  20. #include <linux/of_irq.h>
  21. #include <linux/pci.h>
  22. #include "i2c-octeon-core.h"
  23. #define DRV_NAME "i2c-thunderx"
  24. #define PCI_DEVICE_ID_THUNDER_TWSI 0xa012
  25. #define SYS_FREQ_DEFAULT 700000000
  26. #define TWSI_INT_ENA_W1C 0x1028
  27. #define TWSI_INT_ENA_W1S 0x1030
  28. /*
  29. * Enable the CORE interrupt.
  30. * The interrupt will be asserted when there is non-STAT_IDLE state in the
  31. * SW_TWSI_EOP_TWSI_STAT register.
  32. */
  33. static void thunder_i2c_int_enable(struct octeon_i2c *i2c)
  34. {
  35. octeon_i2c_writeq_flush(TWSI_INT_CORE_INT,
  36. i2c->twsi_base + TWSI_INT_ENA_W1S);
  37. }
  38. /*
  39. * Disable the CORE interrupt.
  40. */
  41. static void thunder_i2c_int_disable(struct octeon_i2c *i2c)
  42. {
  43. octeon_i2c_writeq_flush(TWSI_INT_CORE_INT,
  44. i2c->twsi_base + TWSI_INT_ENA_W1C);
  45. }
  46. static void thunder_i2c_hlc_int_enable(struct octeon_i2c *i2c)
  47. {
  48. octeon_i2c_writeq_flush(TWSI_INT_ST_INT | TWSI_INT_TS_INT,
  49. i2c->twsi_base + TWSI_INT_ENA_W1S);
  50. }
  51. static void thunder_i2c_hlc_int_disable(struct octeon_i2c *i2c)
  52. {
  53. octeon_i2c_writeq_flush(TWSI_INT_ST_INT | TWSI_INT_TS_INT,
  54. i2c->twsi_base + TWSI_INT_ENA_W1C);
  55. }
  56. static u32 thunderx_i2c_functionality(struct i2c_adapter *adap)
  57. {
  58. return I2C_FUNC_I2C | (I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_QUICK) |
  59. I2C_FUNC_SMBUS_READ_BLOCK_DATA | I2C_SMBUS_BLOCK_PROC_CALL;
  60. }
  61. static const struct i2c_algorithm thunderx_i2c_algo = {
  62. .master_xfer = octeon_i2c_xfer,
  63. .functionality = thunderx_i2c_functionality,
  64. };
  65. static struct i2c_adapter thunderx_i2c_ops = {
  66. .owner = THIS_MODULE,
  67. .name = "ThunderX adapter",
  68. .algo = &thunderx_i2c_algo,
  69. };
  70. static void thunder_i2c_clock_enable(struct device *dev, struct octeon_i2c *i2c)
  71. {
  72. int ret;
  73. i2c->clk = clk_get(dev, NULL);
  74. if (IS_ERR(i2c->clk)) {
  75. i2c->clk = NULL;
  76. goto skip;
  77. }
  78. ret = clk_prepare_enable(i2c->clk);
  79. if (ret)
  80. goto skip;
  81. i2c->sys_freq = clk_get_rate(i2c->clk);
  82. skip:
  83. if (!i2c->sys_freq)
  84. i2c->sys_freq = SYS_FREQ_DEFAULT;
  85. }
  86. static void thunder_i2c_clock_disable(struct device *dev, struct clk *clk)
  87. {
  88. if (!clk)
  89. return;
  90. clk_disable_unprepare(clk);
  91. clk_put(clk);
  92. }
  93. static int thunder_i2c_smbus_setup_of(struct octeon_i2c *i2c,
  94. struct device_node *node)
  95. {
  96. u32 type;
  97. if (!node)
  98. return -EINVAL;
  99. i2c->alert_data.irq = irq_of_parse_and_map(node, 0);
  100. if (!i2c->alert_data.irq)
  101. return -EINVAL;
  102. type = irqd_get_trigger_type(irq_get_irq_data(i2c->alert_data.irq));
  103. i2c->alert_data.alert_edge_triggered =
  104. (type & IRQ_TYPE_LEVEL_MASK) ? 1 : 0;
  105. i2c->ara = i2c_setup_smbus_alert(&i2c->adap, &i2c->alert_data);
  106. if (!i2c->ara)
  107. return -ENODEV;
  108. return 0;
  109. }
  110. static int thunder_i2c_smbus_setup(struct octeon_i2c *i2c,
  111. struct device_node *node)
  112. {
  113. /* TODO: ACPI support */
  114. if (!acpi_disabled)
  115. return -EOPNOTSUPP;
  116. return thunder_i2c_smbus_setup_of(i2c, node);
  117. }
  118. static void thunder_i2c_smbus_remove(struct octeon_i2c *i2c)
  119. {
  120. if (i2c->ara)
  121. i2c_unregister_device(i2c->ara);
  122. }
  123. static int thunder_i2c_probe_pci(struct pci_dev *pdev,
  124. const struct pci_device_id *ent)
  125. {
  126. struct device *dev = &pdev->dev;
  127. struct octeon_i2c *i2c;
  128. int ret;
  129. i2c = devm_kzalloc(dev, sizeof(*i2c), GFP_KERNEL);
  130. if (!i2c)
  131. return -ENOMEM;
  132. i2c->roff.sw_twsi = 0x1000;
  133. i2c->roff.twsi_int = 0x1010;
  134. i2c->roff.sw_twsi_ext = 0x1018;
  135. i2c->dev = dev;
  136. pci_set_drvdata(pdev, i2c);
  137. ret = pcim_enable_device(pdev);
  138. if (ret)
  139. return ret;
  140. ret = pci_request_regions(pdev, DRV_NAME);
  141. if (ret)
  142. return ret;
  143. i2c->twsi_base = pcim_iomap(pdev, 0, pci_resource_len(pdev, 0));
  144. if (!i2c->twsi_base)
  145. return -EINVAL;
  146. thunder_i2c_clock_enable(dev, i2c);
  147. ret = device_property_read_u32(dev, "clock-frequency", &i2c->twsi_freq);
  148. if (ret)
  149. i2c->twsi_freq = 100000;
  150. init_waitqueue_head(&i2c->queue);
  151. i2c->int_enable = thunder_i2c_int_enable;
  152. i2c->int_disable = thunder_i2c_int_disable;
  153. i2c->hlc_int_enable = thunder_i2c_hlc_int_enable;
  154. i2c->hlc_int_disable = thunder_i2c_hlc_int_disable;
  155. ret = pci_enable_msix(pdev, &i2c->i2c_msix, 1);
  156. if (ret)
  157. goto error;
  158. ret = devm_request_irq(dev, i2c->i2c_msix.vector, octeon_i2c_isr, 0,
  159. DRV_NAME, i2c);
  160. if (ret)
  161. goto error;
  162. ret = octeon_i2c_init_lowlevel(i2c);
  163. if (ret)
  164. goto error;
  165. octeon_i2c_set_clock(i2c);
  166. i2c->adap = thunderx_i2c_ops;
  167. i2c->adap.retries = 5;
  168. i2c->adap.bus_recovery_info = &octeon_i2c_recovery_info;
  169. i2c->adap.dev.parent = dev;
  170. i2c->adap.dev.of_node = pdev->dev.of_node;
  171. snprintf(i2c->adap.name, sizeof(i2c->adap.name),
  172. "Cavium ThunderX i2c adapter at %s", dev_name(dev));
  173. i2c_set_adapdata(&i2c->adap, i2c);
  174. ret = i2c_add_adapter(&i2c->adap);
  175. if (ret)
  176. goto error;
  177. dev_info(i2c->dev, "Probed. Set system clock to %u\n", i2c->sys_freq);
  178. ret = thunder_i2c_smbus_setup(i2c, pdev->dev.of_node);
  179. if (ret)
  180. dev_info(dev, "SMBUS alert not active on this bus\n");
  181. return 0;
  182. error:
  183. thunder_i2c_clock_disable(dev, i2c->clk);
  184. return ret;
  185. }
  186. static void thunder_i2c_remove_pci(struct pci_dev *pdev)
  187. {
  188. struct octeon_i2c *i2c = pci_get_drvdata(pdev);
  189. thunder_i2c_smbus_remove(i2c);
  190. thunder_i2c_clock_disable(&pdev->dev, i2c->clk);
  191. i2c_del_adapter(&i2c->adap);
  192. }
  193. static const struct pci_device_id thunder_i2c_pci_id_table[] = {
  194. { PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVICE_ID_THUNDER_TWSI) },
  195. { 0, }
  196. };
  197. MODULE_DEVICE_TABLE(pci, thunder_i2c_pci_id_table);
  198. static struct pci_driver thunder_i2c_pci_driver = {
  199. .name = DRV_NAME,
  200. .id_table = thunder_i2c_pci_id_table,
  201. .probe = thunder_i2c_probe_pci,
  202. .remove = thunder_i2c_remove_pci,
  203. };
  204. module_pci_driver(thunder_i2c_pci_driver);
  205. MODULE_LICENSE("GPL");
  206. MODULE_AUTHOR("Fred Martin <fmartin@caviumnetworks.com>");
  207. MODULE_DESCRIPTION("I2C-Bus adapter for Cavium ThunderX SOC");