cper.c 16 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501
  1. /*
  2. * UEFI Common Platform Error Record (CPER) support
  3. *
  4. * Copyright (C) 2010, Intel Corp.
  5. * Author: Huang Ying <ying.huang@intel.com>
  6. *
  7. * CPER is the format used to describe platform hardware error by
  8. * various tables, such as ERST, BERT and HEST etc.
  9. *
  10. * For more information about CPER, please refer to Appendix N of UEFI
  11. * Specification version 2.4.
  12. *
  13. * This program is free software; you can redistribute it and/or
  14. * modify it under the terms of the GNU General Public License version
  15. * 2 as published by the Free Software Foundation.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <linux/kernel.h>
  27. #include <linux/module.h>
  28. #include <linux/time.h>
  29. #include <linux/cper.h>
  30. #include <linux/dmi.h>
  31. #include <linux/acpi.h>
  32. #include <linux/pci.h>
  33. #include <linux/aer.h>
  34. #define INDENT_SP " "
  35. static char rcd_decode_str[CPER_REC_LEN];
  36. /*
  37. * CPER record ID need to be unique even after reboot, because record
  38. * ID is used as index for ERST storage, while CPER records from
  39. * multiple boot may co-exist in ERST.
  40. */
  41. u64 cper_next_record_id(void)
  42. {
  43. static atomic64_t seq;
  44. if (!atomic64_read(&seq))
  45. atomic64_set(&seq, ((u64)get_seconds()) << 32);
  46. return atomic64_inc_return(&seq);
  47. }
  48. EXPORT_SYMBOL_GPL(cper_next_record_id);
  49. static const char * const severity_strs[] = {
  50. "recoverable",
  51. "fatal",
  52. "corrected",
  53. "info",
  54. };
  55. const char *cper_severity_str(unsigned int severity)
  56. {
  57. return severity < ARRAY_SIZE(severity_strs) ?
  58. severity_strs[severity] : "unknown";
  59. }
  60. EXPORT_SYMBOL_GPL(cper_severity_str);
  61. /*
  62. * cper_print_bits - print strings for set bits
  63. * @pfx: prefix for each line, including log level and prefix string
  64. * @bits: bit mask
  65. * @strs: string array, indexed by bit position
  66. * @strs_size: size of the string array: @strs
  67. *
  68. * For each set bit in @bits, print the corresponding string in @strs.
  69. * If the output length is longer than 80, multiple line will be
  70. * printed, with @pfx is printed at the beginning of each line.
  71. */
  72. void cper_print_bits(const char *pfx, unsigned int bits,
  73. const char * const strs[], unsigned int strs_size)
  74. {
  75. int i, len = 0;
  76. const char *str;
  77. char buf[84];
  78. for (i = 0; i < strs_size; i++) {
  79. if (!(bits & (1U << i)))
  80. continue;
  81. str = strs[i];
  82. if (!str)
  83. continue;
  84. if (len && len + strlen(str) + 2 > 80) {
  85. printk("%s\n", buf);
  86. len = 0;
  87. }
  88. if (!len)
  89. len = snprintf(buf, sizeof(buf), "%s%s", pfx, str);
  90. else
  91. len += snprintf(buf+len, sizeof(buf)-len, ", %s", str);
  92. }
  93. if (len)
  94. printk("%s\n", buf);
  95. }
  96. static const char * const proc_type_strs[] = {
  97. "IA32/X64",
  98. "IA64",
  99. };
  100. static const char * const proc_isa_strs[] = {
  101. "IA32",
  102. "IA64",
  103. "X64",
  104. };
  105. static const char * const proc_error_type_strs[] = {
  106. "cache error",
  107. "TLB error",
  108. "bus error",
  109. "micro-architectural error",
  110. };
  111. static const char * const proc_op_strs[] = {
  112. "unknown or generic",
  113. "data read",
  114. "data write",
  115. "instruction execution",
  116. };
  117. static const char * const proc_flag_strs[] = {
  118. "restartable",
  119. "precise IP",
  120. "overflow",
  121. "corrected",
  122. };
  123. static void cper_print_proc_generic(const char *pfx,
  124. const struct cper_sec_proc_generic *proc)
  125. {
  126. if (proc->validation_bits & CPER_PROC_VALID_TYPE)
  127. printk("%s""processor_type: %d, %s\n", pfx, proc->proc_type,
  128. proc->proc_type < ARRAY_SIZE(proc_type_strs) ?
  129. proc_type_strs[proc->proc_type] : "unknown");
  130. if (proc->validation_bits & CPER_PROC_VALID_ISA)
  131. printk("%s""processor_isa: %d, %s\n", pfx, proc->proc_isa,
  132. proc->proc_isa < ARRAY_SIZE(proc_isa_strs) ?
  133. proc_isa_strs[proc->proc_isa] : "unknown");
  134. if (proc->validation_bits & CPER_PROC_VALID_ERROR_TYPE) {
  135. printk("%s""error_type: 0x%02x\n", pfx, proc->proc_error_type);
  136. cper_print_bits(pfx, proc->proc_error_type,
  137. proc_error_type_strs,
  138. ARRAY_SIZE(proc_error_type_strs));
  139. }
  140. if (proc->validation_bits & CPER_PROC_VALID_OPERATION)
  141. printk("%s""operation: %d, %s\n", pfx, proc->operation,
  142. proc->operation < ARRAY_SIZE(proc_op_strs) ?
  143. proc_op_strs[proc->operation] : "unknown");
  144. if (proc->validation_bits & CPER_PROC_VALID_FLAGS) {
  145. printk("%s""flags: 0x%02x\n", pfx, proc->flags);
  146. cper_print_bits(pfx, proc->flags, proc_flag_strs,
  147. ARRAY_SIZE(proc_flag_strs));
  148. }
  149. if (proc->validation_bits & CPER_PROC_VALID_LEVEL)
  150. printk("%s""level: %d\n", pfx, proc->level);
  151. if (proc->validation_bits & CPER_PROC_VALID_VERSION)
  152. printk("%s""version_info: 0x%016llx\n", pfx, proc->cpu_version);
  153. if (proc->validation_bits & CPER_PROC_VALID_ID)
  154. printk("%s""processor_id: 0x%016llx\n", pfx, proc->proc_id);
  155. if (proc->validation_bits & CPER_PROC_VALID_TARGET_ADDRESS)
  156. printk("%s""target_address: 0x%016llx\n",
  157. pfx, proc->target_addr);
  158. if (proc->validation_bits & CPER_PROC_VALID_REQUESTOR_ID)
  159. printk("%s""requestor_id: 0x%016llx\n",
  160. pfx, proc->requestor_id);
  161. if (proc->validation_bits & CPER_PROC_VALID_RESPONDER_ID)
  162. printk("%s""responder_id: 0x%016llx\n",
  163. pfx, proc->responder_id);
  164. if (proc->validation_bits & CPER_PROC_VALID_IP)
  165. printk("%s""IP: 0x%016llx\n", pfx, proc->ip);
  166. }
  167. static const char * const mem_err_type_strs[] = {
  168. "unknown",
  169. "no error",
  170. "single-bit ECC",
  171. "multi-bit ECC",
  172. "single-symbol chipkill ECC",
  173. "multi-symbol chipkill ECC",
  174. "master abort",
  175. "target abort",
  176. "parity error",
  177. "watchdog timeout",
  178. "invalid address",
  179. "mirror Broken",
  180. "memory sparing",
  181. "scrub corrected error",
  182. "scrub uncorrected error",
  183. "physical memory map-out event",
  184. };
  185. const char *cper_mem_err_type_str(unsigned int etype)
  186. {
  187. return etype < ARRAY_SIZE(mem_err_type_strs) ?
  188. mem_err_type_strs[etype] : "unknown";
  189. }
  190. EXPORT_SYMBOL_GPL(cper_mem_err_type_str);
  191. static int cper_mem_err_location(struct cper_mem_err_compact *mem, char *msg)
  192. {
  193. u32 len, n;
  194. if (!msg)
  195. return 0;
  196. n = 0;
  197. len = CPER_REC_LEN - 1;
  198. if (mem->validation_bits & CPER_MEM_VALID_NODE)
  199. n += scnprintf(msg + n, len - n, "node: %d ", mem->node);
  200. if (mem->validation_bits & CPER_MEM_VALID_CARD)
  201. n += scnprintf(msg + n, len - n, "card: %d ", mem->card);
  202. if (mem->validation_bits & CPER_MEM_VALID_MODULE)
  203. n += scnprintf(msg + n, len - n, "module: %d ", mem->module);
  204. if (mem->validation_bits & CPER_MEM_VALID_RANK_NUMBER)
  205. n += scnprintf(msg + n, len - n, "rank: %d ", mem->rank);
  206. if (mem->validation_bits & CPER_MEM_VALID_BANK)
  207. n += scnprintf(msg + n, len - n, "bank: %d ", mem->bank);
  208. if (mem->validation_bits & CPER_MEM_VALID_DEVICE)
  209. n += scnprintf(msg + n, len - n, "device: %d ", mem->device);
  210. if (mem->validation_bits & CPER_MEM_VALID_ROW)
  211. n += scnprintf(msg + n, len - n, "row: %d ", mem->row);
  212. if (mem->validation_bits & CPER_MEM_VALID_COLUMN)
  213. n += scnprintf(msg + n, len - n, "column: %d ", mem->column);
  214. if (mem->validation_bits & CPER_MEM_VALID_BIT_POSITION)
  215. n += scnprintf(msg + n, len - n, "bit_position: %d ",
  216. mem->bit_pos);
  217. if (mem->validation_bits & CPER_MEM_VALID_REQUESTOR_ID)
  218. n += scnprintf(msg + n, len - n, "requestor_id: 0x%016llx ",
  219. mem->requestor_id);
  220. if (mem->validation_bits & CPER_MEM_VALID_RESPONDER_ID)
  221. n += scnprintf(msg + n, len - n, "responder_id: 0x%016llx ",
  222. mem->responder_id);
  223. if (mem->validation_bits & CPER_MEM_VALID_TARGET_ID)
  224. scnprintf(msg + n, len - n, "target_id: 0x%016llx ",
  225. mem->target_id);
  226. msg[n] = '\0';
  227. return n;
  228. }
  229. static int cper_dimm_err_location(struct cper_mem_err_compact *mem, char *msg)
  230. {
  231. u32 len, n;
  232. const char *bank = NULL, *device = NULL;
  233. if (!msg || !(mem->validation_bits & CPER_MEM_VALID_MODULE_HANDLE))
  234. return 0;
  235. n = 0;
  236. len = CPER_REC_LEN - 1;
  237. dmi_memdev_name(mem->mem_dev_handle, &bank, &device);
  238. if (bank && device)
  239. n = snprintf(msg, len, "DIMM location: %s %s ", bank, device);
  240. else
  241. n = snprintf(msg, len,
  242. "DIMM location: not present. DMI handle: 0x%.4x ",
  243. mem->mem_dev_handle);
  244. msg[n] = '\0';
  245. return n;
  246. }
  247. void cper_mem_err_pack(const struct cper_sec_mem_err *mem,
  248. struct cper_mem_err_compact *cmem)
  249. {
  250. cmem->validation_bits = mem->validation_bits;
  251. cmem->node = mem->node;
  252. cmem->card = mem->card;
  253. cmem->module = mem->module;
  254. cmem->bank = mem->bank;
  255. cmem->device = mem->device;
  256. cmem->row = mem->row;
  257. cmem->column = mem->column;
  258. cmem->bit_pos = mem->bit_pos;
  259. cmem->requestor_id = mem->requestor_id;
  260. cmem->responder_id = mem->responder_id;
  261. cmem->target_id = mem->target_id;
  262. cmem->rank = mem->rank;
  263. cmem->mem_array_handle = mem->mem_array_handle;
  264. cmem->mem_dev_handle = mem->mem_dev_handle;
  265. }
  266. const char *cper_mem_err_unpack(struct trace_seq *p,
  267. struct cper_mem_err_compact *cmem)
  268. {
  269. const char *ret = trace_seq_buffer_ptr(p);
  270. if (cper_mem_err_location(cmem, rcd_decode_str))
  271. trace_seq_printf(p, "%s", rcd_decode_str);
  272. if (cper_dimm_err_location(cmem, rcd_decode_str))
  273. trace_seq_printf(p, "%s", rcd_decode_str);
  274. trace_seq_putc(p, '\0');
  275. return ret;
  276. }
  277. static void cper_print_mem(const char *pfx, const struct cper_sec_mem_err *mem,
  278. int len)
  279. {
  280. struct cper_mem_err_compact cmem;
  281. /* Don't trust UEFI 2.1/2.2 structure with bad validation bits */
  282. if (len == sizeof(struct cper_sec_mem_err_old) &&
  283. (mem->validation_bits & ~(CPER_MEM_VALID_RANK_NUMBER - 1))) {
  284. pr_err(FW_WARN "valid bits set for fields beyond structure\n");
  285. return;
  286. }
  287. if (mem->validation_bits & CPER_MEM_VALID_ERROR_STATUS)
  288. printk("%s""error_status: 0x%016llx\n", pfx, mem->error_status);
  289. if (mem->validation_bits & CPER_MEM_VALID_PA)
  290. printk("%s""physical_address: 0x%016llx\n",
  291. pfx, mem->physical_addr);
  292. if (mem->validation_bits & CPER_MEM_VALID_PA_MASK)
  293. printk("%s""physical_address_mask: 0x%016llx\n",
  294. pfx, mem->physical_addr_mask);
  295. cper_mem_err_pack(mem, &cmem);
  296. if (cper_mem_err_location(&cmem, rcd_decode_str))
  297. printk("%s%s\n", pfx, rcd_decode_str);
  298. if (mem->validation_bits & CPER_MEM_VALID_ERROR_TYPE) {
  299. u8 etype = mem->error_type;
  300. printk("%s""error_type: %d, %s\n", pfx, etype,
  301. cper_mem_err_type_str(etype));
  302. }
  303. if (cper_dimm_err_location(&cmem, rcd_decode_str))
  304. printk("%s%s\n", pfx, rcd_decode_str);
  305. }
  306. static const char * const pcie_port_type_strs[] = {
  307. "PCIe end point",
  308. "legacy PCI end point",
  309. "unknown",
  310. "unknown",
  311. "root port",
  312. "upstream switch port",
  313. "downstream switch port",
  314. "PCIe to PCI/PCI-X bridge",
  315. "PCI/PCI-X to PCIe bridge",
  316. "root complex integrated endpoint device",
  317. "root complex event collector",
  318. };
  319. static void cper_print_pcie(const char *pfx, const struct cper_sec_pcie *pcie,
  320. const struct acpi_hest_generic_data *gdata)
  321. {
  322. if (pcie->validation_bits & CPER_PCIE_VALID_PORT_TYPE)
  323. printk("%s""port_type: %d, %s\n", pfx, pcie->port_type,
  324. pcie->port_type < ARRAY_SIZE(pcie_port_type_strs) ?
  325. pcie_port_type_strs[pcie->port_type] : "unknown");
  326. if (pcie->validation_bits & CPER_PCIE_VALID_VERSION)
  327. printk("%s""version: %d.%d\n", pfx,
  328. pcie->version.major, pcie->version.minor);
  329. if (pcie->validation_bits & CPER_PCIE_VALID_COMMAND_STATUS)
  330. printk("%s""command: 0x%04x, status: 0x%04x\n", pfx,
  331. pcie->command, pcie->status);
  332. if (pcie->validation_bits & CPER_PCIE_VALID_DEVICE_ID) {
  333. const __u8 *p;
  334. printk("%s""device_id: %04x:%02x:%02x.%x\n", pfx,
  335. pcie->device_id.segment, pcie->device_id.bus,
  336. pcie->device_id.device, pcie->device_id.function);
  337. printk("%s""slot: %d\n", pfx,
  338. pcie->device_id.slot >> CPER_PCIE_SLOT_SHIFT);
  339. printk("%s""secondary_bus: 0x%02x\n", pfx,
  340. pcie->device_id.secondary_bus);
  341. printk("%s""vendor_id: 0x%04x, device_id: 0x%04x\n", pfx,
  342. pcie->device_id.vendor_id, pcie->device_id.device_id);
  343. p = pcie->device_id.class_code;
  344. printk("%s""class_code: %02x%02x%02x\n", pfx, p[0], p[1], p[2]);
  345. }
  346. if (pcie->validation_bits & CPER_PCIE_VALID_SERIAL_NUMBER)
  347. printk("%s""serial number: 0x%04x, 0x%04x\n", pfx,
  348. pcie->serial_number.lower, pcie->serial_number.upper);
  349. if (pcie->validation_bits & CPER_PCIE_VALID_BRIDGE_CONTROL_STATUS)
  350. printk(
  351. "%s""bridge: secondary_status: 0x%04x, control: 0x%04x\n",
  352. pfx, pcie->bridge.secondary_status, pcie->bridge.control);
  353. }
  354. static void cper_estatus_print_section(
  355. const char *pfx, const struct acpi_hest_generic_data *gdata, int sec_no)
  356. {
  357. uuid_le *sec_type = (uuid_le *)gdata->section_type;
  358. __u16 severity;
  359. char newpfx[64];
  360. severity = gdata->error_severity;
  361. printk("%s""Error %d, type: %s\n", pfx, sec_no,
  362. cper_severity_str(severity));
  363. if (gdata->validation_bits & CPER_SEC_VALID_FRU_ID)
  364. printk("%s""fru_id: %pUl\n", pfx, (uuid_le *)gdata->fru_id);
  365. if (gdata->validation_bits & CPER_SEC_VALID_FRU_TEXT)
  366. printk("%s""fru_text: %.20s\n", pfx, gdata->fru_text);
  367. snprintf(newpfx, sizeof(newpfx), "%s%s", pfx, INDENT_SP);
  368. if (!uuid_le_cmp(*sec_type, CPER_SEC_PROC_GENERIC)) {
  369. struct cper_sec_proc_generic *proc_err = (void *)(gdata + 1);
  370. printk("%s""section_type: general processor error\n", newpfx);
  371. if (gdata->error_data_length >= sizeof(*proc_err))
  372. cper_print_proc_generic(newpfx, proc_err);
  373. else
  374. goto err_section_too_small;
  375. } else if (!uuid_le_cmp(*sec_type, CPER_SEC_PLATFORM_MEM)) {
  376. struct cper_sec_mem_err *mem_err = (void *)(gdata + 1);
  377. printk("%s""section_type: memory error\n", newpfx);
  378. if (gdata->error_data_length >=
  379. sizeof(struct cper_sec_mem_err_old))
  380. cper_print_mem(newpfx, mem_err,
  381. gdata->error_data_length);
  382. else
  383. goto err_section_too_small;
  384. } else if (!uuid_le_cmp(*sec_type, CPER_SEC_PCIE)) {
  385. struct cper_sec_pcie *pcie = (void *)(gdata + 1);
  386. printk("%s""section_type: PCIe error\n", newpfx);
  387. if (gdata->error_data_length >= sizeof(*pcie))
  388. cper_print_pcie(newpfx, pcie, gdata);
  389. else
  390. goto err_section_too_small;
  391. } else
  392. printk("%s""section type: unknown, %pUl\n", newpfx, sec_type);
  393. return;
  394. err_section_too_small:
  395. pr_err(FW_WARN "error section length is too small\n");
  396. }
  397. void cper_estatus_print(const char *pfx,
  398. const struct acpi_hest_generic_status *estatus)
  399. {
  400. struct acpi_hest_generic_data *gdata;
  401. unsigned int data_len, gedata_len;
  402. int sec_no = 0;
  403. char newpfx[64];
  404. __u16 severity;
  405. severity = estatus->error_severity;
  406. if (severity == CPER_SEV_CORRECTED)
  407. printk("%s%s\n", pfx,
  408. "It has been corrected by h/w "
  409. "and requires no further action");
  410. printk("%s""event severity: %s\n", pfx, cper_severity_str(severity));
  411. data_len = estatus->data_length;
  412. gdata = (struct acpi_hest_generic_data *)(estatus + 1);
  413. snprintf(newpfx, sizeof(newpfx), "%s%s", pfx, INDENT_SP);
  414. while (data_len >= sizeof(*gdata)) {
  415. gedata_len = gdata->error_data_length;
  416. cper_estatus_print_section(newpfx, gdata, sec_no);
  417. data_len -= gedata_len + sizeof(*gdata);
  418. gdata = (void *)(gdata + 1) + gedata_len;
  419. sec_no++;
  420. }
  421. }
  422. EXPORT_SYMBOL_GPL(cper_estatus_print);
  423. int cper_estatus_check_header(const struct acpi_hest_generic_status *estatus)
  424. {
  425. if (estatus->data_length &&
  426. estatus->data_length < sizeof(struct acpi_hest_generic_data))
  427. return -EINVAL;
  428. if (estatus->raw_data_length &&
  429. estatus->raw_data_offset < sizeof(*estatus) + estatus->data_length)
  430. return -EINVAL;
  431. return 0;
  432. }
  433. EXPORT_SYMBOL_GPL(cper_estatus_check_header);
  434. int cper_estatus_check(const struct acpi_hest_generic_status *estatus)
  435. {
  436. struct acpi_hest_generic_data *gdata;
  437. unsigned int data_len, gedata_len;
  438. int rc;
  439. rc = cper_estatus_check_header(estatus);
  440. if (rc)
  441. return rc;
  442. data_len = estatus->data_length;
  443. gdata = (struct acpi_hest_generic_data *)(estatus + 1);
  444. while (data_len >= sizeof(*gdata)) {
  445. gedata_len = gdata->error_data_length;
  446. if (gedata_len > data_len - sizeof(*gdata))
  447. return -EINVAL;
  448. data_len -= gedata_len + sizeof(*gdata);
  449. gdata = (void *)(gdata + 1) + gedata_len;
  450. }
  451. if (data_len)
  452. return -EINVAL;
  453. return 0;
  454. }
  455. EXPORT_SYMBOL_GPL(cper_estatus_check);