jr.c 15 KB

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  1. /*
  2. * CAAM/SEC 4.x transport/backend driver
  3. * JobR backend functionality
  4. *
  5. * Copyright 2008-2012 Freescale Semiconductor, Inc.
  6. */
  7. #include <linux/of_irq.h>
  8. #include <linux/of_address.h>
  9. #include "compat.h"
  10. #include "regs.h"
  11. #include "jr.h"
  12. #include "desc.h"
  13. #include "intern.h"
  14. struct jr_driver_data {
  15. /* List of Physical JobR's with the Driver */
  16. struct list_head jr_list;
  17. spinlock_t jr_alloc_lock; /* jr_list lock */
  18. } ____cacheline_aligned;
  19. static struct jr_driver_data driver_data;
  20. static int caam_reset_hw_jr(struct device *dev)
  21. {
  22. struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
  23. unsigned int timeout = 100000;
  24. /*
  25. * mask interrupts since we are going to poll
  26. * for reset completion status
  27. */
  28. clrsetbits_32(&jrp->rregs->rconfig_lo, 0, JRCFG_IMSK);
  29. /* initiate flush (required prior to reset) */
  30. wr_reg32(&jrp->rregs->jrcommand, JRCR_RESET);
  31. while (((rd_reg32(&jrp->rregs->jrintstatus) & JRINT_ERR_HALT_MASK) ==
  32. JRINT_ERR_HALT_INPROGRESS) && --timeout)
  33. cpu_relax();
  34. if ((rd_reg32(&jrp->rregs->jrintstatus) & JRINT_ERR_HALT_MASK) !=
  35. JRINT_ERR_HALT_COMPLETE || timeout == 0) {
  36. dev_err(dev, "failed to flush job ring %d\n", jrp->ridx);
  37. return -EIO;
  38. }
  39. /* initiate reset */
  40. timeout = 100000;
  41. wr_reg32(&jrp->rregs->jrcommand, JRCR_RESET);
  42. while ((rd_reg32(&jrp->rregs->jrcommand) & JRCR_RESET) && --timeout)
  43. cpu_relax();
  44. if (timeout == 0) {
  45. dev_err(dev, "failed to reset job ring %d\n", jrp->ridx);
  46. return -EIO;
  47. }
  48. /* unmask interrupts */
  49. clrsetbits_32(&jrp->rregs->rconfig_lo, JRCFG_IMSK, 0);
  50. return 0;
  51. }
  52. /*
  53. * Shutdown JobR independent of platform property code
  54. */
  55. static int caam_jr_shutdown(struct device *dev)
  56. {
  57. struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
  58. dma_addr_t inpbusaddr, outbusaddr;
  59. int ret;
  60. ret = caam_reset_hw_jr(dev);
  61. /* Release interrupt */
  62. free_irq(jrp->irq, dev);
  63. /* Free rings */
  64. inpbusaddr = rd_reg64(&jrp->rregs->inpring_base);
  65. outbusaddr = rd_reg64(&jrp->rregs->outring_base);
  66. dma_free_coherent(dev, sizeof(dma_addr_t) * JOBR_DEPTH,
  67. jrp->inpring, inpbusaddr);
  68. dma_free_coherent(dev, sizeof(struct jr_outentry) * JOBR_DEPTH,
  69. jrp->outring, outbusaddr);
  70. kfree(jrp->entinfo);
  71. return ret;
  72. }
  73. static int caam_jr_remove(struct platform_device *pdev)
  74. {
  75. int ret;
  76. struct device *jrdev;
  77. struct caam_drv_private_jr *jrpriv;
  78. jrdev = &pdev->dev;
  79. jrpriv = dev_get_drvdata(jrdev);
  80. /*
  81. * Return EBUSY if job ring already allocated.
  82. */
  83. if (atomic_read(&jrpriv->tfm_count)) {
  84. dev_err(jrdev, "Device is busy\n");
  85. return -EBUSY;
  86. }
  87. /* Remove the node from Physical JobR list maintained by driver */
  88. spin_lock(&driver_data.jr_alloc_lock);
  89. list_del(&jrpriv->list_node);
  90. spin_unlock(&driver_data.jr_alloc_lock);
  91. /* Release ring */
  92. ret = caam_jr_shutdown(jrdev);
  93. if (ret)
  94. dev_err(jrdev, "Failed to shut down job ring\n");
  95. irq_dispose_mapping(jrpriv->irq);
  96. return ret;
  97. }
  98. /* Main per-ring interrupt handler */
  99. static irqreturn_t caam_jr_interrupt(int irq, void *st_dev)
  100. {
  101. struct device *dev = st_dev;
  102. struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
  103. u32 irqstate;
  104. /*
  105. * Check the output ring for ready responses, kick
  106. * the threaded irq if jobs done.
  107. */
  108. irqstate = rd_reg32(&jrp->rregs->jrintstatus);
  109. if (!irqstate)
  110. return IRQ_NONE;
  111. /*
  112. * If JobR error, we got more development work to do
  113. * Flag a bug now, but we really need to shut down and
  114. * restart the queue (and fix code).
  115. */
  116. if (irqstate & JRINT_JR_ERROR) {
  117. dev_err(dev, "job ring error: irqstate: %08x\n", irqstate);
  118. BUG();
  119. }
  120. /* mask valid interrupts */
  121. clrsetbits_32(&jrp->rregs->rconfig_lo, 0, JRCFG_IMSK);
  122. /* Have valid interrupt at this point, just ACK and trigger */
  123. wr_reg32(&jrp->rregs->jrintstatus, irqstate);
  124. return IRQ_WAKE_THREAD;
  125. }
  126. static irqreturn_t caam_jr_threadirq(int irq, void *st_dev)
  127. {
  128. int hw_idx, sw_idx, i, head, tail;
  129. struct device *dev = st_dev;
  130. struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
  131. void (*usercall)(struct device *dev, u32 *desc, u32 status, void *arg);
  132. u32 *userdesc, userstatus;
  133. void *userarg;
  134. while (rd_reg32(&jrp->rregs->outring_used)) {
  135. head = ACCESS_ONCE(jrp->head);
  136. spin_lock(&jrp->outlock);
  137. sw_idx = tail = jrp->tail;
  138. hw_idx = jrp->out_ring_read_index;
  139. for (i = 0; CIRC_CNT(head, tail + i, JOBR_DEPTH) >= 1; i++) {
  140. sw_idx = (tail + i) & (JOBR_DEPTH - 1);
  141. if (jrp->outring[hw_idx].desc ==
  142. caam_dma_to_cpu(jrp->entinfo[sw_idx].desc_addr_dma))
  143. break; /* found */
  144. }
  145. /* we should never fail to find a matching descriptor */
  146. BUG_ON(CIRC_CNT(head, tail + i, JOBR_DEPTH) <= 0);
  147. /* Unmap just-run descriptor so we can post-process */
  148. dma_unmap_single(dev, jrp->outring[hw_idx].desc,
  149. jrp->entinfo[sw_idx].desc_size,
  150. DMA_TO_DEVICE);
  151. /* mark completed, avoid matching on a recycled desc addr */
  152. jrp->entinfo[sw_idx].desc_addr_dma = 0;
  153. /* Stash callback params for use outside of lock */
  154. usercall = jrp->entinfo[sw_idx].callbk;
  155. userarg = jrp->entinfo[sw_idx].cbkarg;
  156. userdesc = jrp->entinfo[sw_idx].desc_addr_virt;
  157. userstatus = caam32_to_cpu(jrp->outring[hw_idx].jrstatus);
  158. /*
  159. * Make sure all information from the job has been obtained
  160. * before telling CAAM that the job has been removed from the
  161. * output ring.
  162. */
  163. mb();
  164. /* set done */
  165. wr_reg32(&jrp->rregs->outring_rmvd, 1);
  166. jrp->out_ring_read_index = (jrp->out_ring_read_index + 1) &
  167. (JOBR_DEPTH - 1);
  168. /*
  169. * if this job completed out-of-order, do not increment
  170. * the tail. Otherwise, increment tail by 1 plus the
  171. * number of subsequent jobs already completed out-of-order
  172. */
  173. if (sw_idx == tail) {
  174. do {
  175. tail = (tail + 1) & (JOBR_DEPTH - 1);
  176. } while (CIRC_CNT(head, tail, JOBR_DEPTH) >= 1 &&
  177. jrp->entinfo[tail].desc_addr_dma == 0);
  178. jrp->tail = tail;
  179. }
  180. spin_unlock(&jrp->outlock);
  181. /* Finally, execute user's callback */
  182. usercall(dev, userdesc, userstatus, userarg);
  183. }
  184. /* reenable / unmask IRQs */
  185. clrsetbits_32(&jrp->rregs->rconfig_lo, JRCFG_IMSK, 0);
  186. return IRQ_HANDLED;
  187. }
  188. /**
  189. * caam_jr_alloc() - Alloc a job ring for someone to use as needed.
  190. *
  191. * returns : pointer to the newly allocated physical
  192. * JobR dev can be written to if successful.
  193. **/
  194. struct device *caam_jr_alloc(void)
  195. {
  196. struct caam_drv_private_jr *jrpriv, *min_jrpriv = NULL;
  197. struct device *dev = ERR_PTR(-ENODEV);
  198. int min_tfm_cnt = INT_MAX;
  199. int tfm_cnt;
  200. spin_lock(&driver_data.jr_alloc_lock);
  201. if (list_empty(&driver_data.jr_list)) {
  202. spin_unlock(&driver_data.jr_alloc_lock);
  203. return ERR_PTR(-ENODEV);
  204. }
  205. list_for_each_entry(jrpriv, &driver_data.jr_list, list_node) {
  206. tfm_cnt = atomic_read(&jrpriv->tfm_count);
  207. if (tfm_cnt < min_tfm_cnt) {
  208. min_tfm_cnt = tfm_cnt;
  209. min_jrpriv = jrpriv;
  210. }
  211. if (!min_tfm_cnt)
  212. break;
  213. }
  214. if (min_jrpriv) {
  215. atomic_inc(&min_jrpriv->tfm_count);
  216. dev = min_jrpriv->dev;
  217. }
  218. spin_unlock(&driver_data.jr_alloc_lock);
  219. return dev;
  220. }
  221. EXPORT_SYMBOL(caam_jr_alloc);
  222. /**
  223. * caam_jr_free() - Free the Job Ring
  224. * @rdev - points to the dev that identifies the Job ring to
  225. * be released.
  226. **/
  227. void caam_jr_free(struct device *rdev)
  228. {
  229. struct caam_drv_private_jr *jrpriv = dev_get_drvdata(rdev);
  230. atomic_dec(&jrpriv->tfm_count);
  231. }
  232. EXPORT_SYMBOL(caam_jr_free);
  233. /**
  234. * caam_jr_enqueue() - Enqueue a job descriptor head. Returns 0 if OK,
  235. * -EBUSY if the queue is full, -EIO if it cannot map the caller's
  236. * descriptor.
  237. * @dev: device of the job ring to be used. This device should have
  238. * been assigned prior by caam_jr_register().
  239. * @desc: points to a job descriptor that execute our request. All
  240. * descriptors (and all referenced data) must be in a DMAable
  241. * region, and all data references must be physical addresses
  242. * accessible to CAAM (i.e. within a PAMU window granted
  243. * to it).
  244. * @cbk: pointer to a callback function to be invoked upon completion
  245. * of this request. This has the form:
  246. * callback(struct device *dev, u32 *desc, u32 stat, void *arg)
  247. * where:
  248. * @dev: contains the job ring device that processed this
  249. * response.
  250. * @desc: descriptor that initiated the request, same as
  251. * "desc" being argued to caam_jr_enqueue().
  252. * @status: untranslated status received from CAAM. See the
  253. * reference manual for a detailed description of
  254. * error meaning, or see the JRSTA definitions in the
  255. * register header file
  256. * @areq: optional pointer to an argument passed with the
  257. * original request
  258. * @areq: optional pointer to a user argument for use at callback
  259. * time.
  260. **/
  261. int caam_jr_enqueue(struct device *dev, u32 *desc,
  262. void (*cbk)(struct device *dev, u32 *desc,
  263. u32 status, void *areq),
  264. void *areq)
  265. {
  266. struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
  267. struct caam_jrentry_info *head_entry;
  268. int head, tail, desc_size;
  269. dma_addr_t desc_dma;
  270. desc_size = (caam32_to_cpu(*desc) & HDR_JD_LENGTH_MASK) * sizeof(u32);
  271. desc_dma = dma_map_single(dev, desc, desc_size, DMA_TO_DEVICE);
  272. if (dma_mapping_error(dev, desc_dma)) {
  273. dev_err(dev, "caam_jr_enqueue(): can't map jobdesc\n");
  274. return -EIO;
  275. }
  276. spin_lock_bh(&jrp->inplock);
  277. head = jrp->head;
  278. tail = ACCESS_ONCE(jrp->tail);
  279. if (!rd_reg32(&jrp->rregs->inpring_avail) ||
  280. CIRC_SPACE(head, tail, JOBR_DEPTH) <= 0) {
  281. spin_unlock_bh(&jrp->inplock);
  282. dma_unmap_single(dev, desc_dma, desc_size, DMA_TO_DEVICE);
  283. return -EBUSY;
  284. }
  285. head_entry = &jrp->entinfo[head];
  286. head_entry->desc_addr_virt = desc;
  287. head_entry->desc_size = desc_size;
  288. head_entry->callbk = (void *)cbk;
  289. head_entry->cbkarg = areq;
  290. head_entry->desc_addr_dma = desc_dma;
  291. jrp->inpring[jrp->inp_ring_write_index] = cpu_to_caam_dma(desc_dma);
  292. /*
  293. * Guarantee that the descriptor's DMA address has been written to
  294. * the next slot in the ring before the write index is updated, since
  295. * other cores may update this index independently.
  296. */
  297. smp_wmb();
  298. jrp->inp_ring_write_index = (jrp->inp_ring_write_index + 1) &
  299. (JOBR_DEPTH - 1);
  300. jrp->head = (head + 1) & (JOBR_DEPTH - 1);
  301. /*
  302. * Ensure that all job information has been written before
  303. * notifying CAAM that a new job was added to the input ring.
  304. */
  305. wmb();
  306. wr_reg32(&jrp->rregs->inpring_jobadd, 1);
  307. spin_unlock_bh(&jrp->inplock);
  308. return 0;
  309. }
  310. EXPORT_SYMBOL(caam_jr_enqueue);
  311. /*
  312. * Init JobR independent of platform property detection
  313. */
  314. static int caam_jr_init(struct device *dev)
  315. {
  316. struct caam_drv_private_jr *jrp;
  317. dma_addr_t inpbusaddr, outbusaddr;
  318. int i, error;
  319. jrp = dev_get_drvdata(dev);
  320. /* Connect job ring interrupt handler. */
  321. error = request_threaded_irq(jrp->irq, caam_jr_interrupt,
  322. caam_jr_threadirq, IRQF_SHARED,
  323. dev_name(dev), dev);
  324. if (error) {
  325. dev_err(dev, "can't connect JobR %d interrupt (%d)\n",
  326. jrp->ridx, jrp->irq);
  327. goto out_kill_deq;
  328. }
  329. error = caam_reset_hw_jr(dev);
  330. if (error)
  331. goto out_free_irq;
  332. error = -ENOMEM;
  333. jrp->inpring = dma_alloc_coherent(dev, sizeof(*jrp->inpring) *
  334. JOBR_DEPTH, &inpbusaddr, GFP_KERNEL);
  335. if (!jrp->inpring)
  336. goto out_free_irq;
  337. jrp->outring = dma_alloc_coherent(dev, sizeof(*jrp->outring) *
  338. JOBR_DEPTH, &outbusaddr, GFP_KERNEL);
  339. if (!jrp->outring)
  340. goto out_free_inpring;
  341. jrp->entinfo = kcalloc(JOBR_DEPTH, sizeof(*jrp->entinfo), GFP_KERNEL);
  342. if (!jrp->entinfo)
  343. goto out_free_outring;
  344. for (i = 0; i < JOBR_DEPTH; i++)
  345. jrp->entinfo[i].desc_addr_dma = !0;
  346. /* Setup rings */
  347. jrp->inp_ring_write_index = 0;
  348. jrp->out_ring_read_index = 0;
  349. jrp->head = 0;
  350. jrp->tail = 0;
  351. wr_reg64(&jrp->rregs->inpring_base, inpbusaddr);
  352. wr_reg64(&jrp->rregs->outring_base, outbusaddr);
  353. wr_reg32(&jrp->rregs->inpring_size, JOBR_DEPTH);
  354. wr_reg32(&jrp->rregs->outring_size, JOBR_DEPTH);
  355. jrp->ringsize = JOBR_DEPTH;
  356. spin_lock_init(&jrp->inplock);
  357. spin_lock_init(&jrp->outlock);
  358. /* Select interrupt coalescing parameters */
  359. clrsetbits_32(&jrp->rregs->rconfig_lo, 0, JOBR_INTC |
  360. (JOBR_INTC_COUNT_THLD << JRCFG_ICDCT_SHIFT) |
  361. (JOBR_INTC_TIME_THLD << JRCFG_ICTT_SHIFT));
  362. return 0;
  363. out_free_outring:
  364. dma_free_coherent(dev, sizeof(struct jr_outentry) * JOBR_DEPTH,
  365. jrp->outring, outbusaddr);
  366. out_free_inpring:
  367. dma_free_coherent(dev, sizeof(dma_addr_t) * JOBR_DEPTH,
  368. jrp->inpring, inpbusaddr);
  369. dev_err(dev, "can't allocate job rings for %d\n", jrp->ridx);
  370. out_free_irq:
  371. free_irq(jrp->irq, dev);
  372. out_kill_deq:
  373. return error;
  374. }
  375. /*
  376. * Probe routine for each detected JobR subsystem.
  377. */
  378. static int caam_jr_probe(struct platform_device *pdev)
  379. {
  380. struct device *jrdev;
  381. struct device_node *nprop;
  382. struct caam_job_ring __iomem *ctrl;
  383. struct caam_drv_private_jr *jrpriv;
  384. static int total_jobrs;
  385. int error;
  386. jrdev = &pdev->dev;
  387. jrpriv = devm_kmalloc(jrdev, sizeof(*jrpriv), GFP_KERNEL);
  388. if (!jrpriv)
  389. return -ENOMEM;
  390. dev_set_drvdata(jrdev, jrpriv);
  391. /* save ring identity relative to detection */
  392. jrpriv->ridx = total_jobrs++;
  393. nprop = pdev->dev.of_node;
  394. /* Get configuration properties from device tree */
  395. /* First, get register page */
  396. ctrl = of_iomap(nprop, 0);
  397. if (!ctrl) {
  398. dev_err(jrdev, "of_iomap() failed\n");
  399. return -ENOMEM;
  400. }
  401. jrpriv->rregs = (struct caam_job_ring __force *)ctrl;
  402. if (sizeof(dma_addr_t) == sizeof(u64))
  403. if (of_device_is_compatible(nprop, "fsl,sec-v5.0-job-ring"))
  404. dma_set_mask_and_coherent(jrdev, DMA_BIT_MASK(40));
  405. else
  406. dma_set_mask_and_coherent(jrdev, DMA_BIT_MASK(36));
  407. else
  408. dma_set_mask_and_coherent(jrdev, DMA_BIT_MASK(32));
  409. /* Identify the interrupt */
  410. jrpriv->irq = irq_of_parse_and_map(nprop, 0);
  411. /* Now do the platform independent part */
  412. error = caam_jr_init(jrdev); /* now turn on hardware */
  413. if (error) {
  414. irq_dispose_mapping(jrpriv->irq);
  415. iounmap(ctrl);
  416. return error;
  417. }
  418. jrpriv->dev = jrdev;
  419. spin_lock(&driver_data.jr_alloc_lock);
  420. list_add_tail(&jrpriv->list_node, &driver_data.jr_list);
  421. spin_unlock(&driver_data.jr_alloc_lock);
  422. atomic_set(&jrpriv->tfm_count, 0);
  423. return 0;
  424. }
  425. static struct of_device_id caam_jr_match[] = {
  426. {
  427. .compatible = "fsl,sec-v4.0-job-ring",
  428. },
  429. {
  430. .compatible = "fsl,sec4.0-job-ring",
  431. },
  432. {},
  433. };
  434. MODULE_DEVICE_TABLE(of, caam_jr_match);
  435. static struct platform_driver caam_jr_driver = {
  436. .driver = {
  437. .name = "caam_jr",
  438. .of_match_table = caam_jr_match,
  439. },
  440. .probe = caam_jr_probe,
  441. .remove = caam_jr_remove,
  442. };
  443. static int __init jr_driver_init(void)
  444. {
  445. spin_lock_init(&driver_data.jr_alloc_lock);
  446. INIT_LIST_HEAD(&driver_data.jr_list);
  447. return platform_driver_register(&caam_jr_driver);
  448. }
  449. static void __exit jr_driver_exit(void)
  450. {
  451. platform_driver_unregister(&caam_jr_driver);
  452. }
  453. module_init(jr_driver_init);
  454. module_exit(jr_driver_exit);
  455. MODULE_LICENSE("GPL");
  456. MODULE_DESCRIPTION("FSL CAAM JR request backend");
  457. MODULE_AUTHOR("Freescale Semiconductor - NMG/STC");