interface.c 5.0 KB

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  1. /*
  2. * OMAP interface clock support
  3. *
  4. * Copyright (C) 2013 Texas Instruments, Inc.
  5. *
  6. * Tero Kristo <t-kristo@ti.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  13. * kind, whether express or implied; without even the implied warranty
  14. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. */
  17. #include <linux/clk-provider.h>
  18. #include <linux/slab.h>
  19. #include <linux/of.h>
  20. #include <linux/of_address.h>
  21. #include <linux/clk/ti.h>
  22. #include "clock.h"
  23. #undef pr_fmt
  24. #define pr_fmt(fmt) "%s: " fmt, __func__
  25. static const struct clk_ops ti_interface_clk_ops = {
  26. .init = &omap2_init_clk_clkdm,
  27. .enable = &omap2_dflt_clk_enable,
  28. .disable = &omap2_dflt_clk_disable,
  29. .is_enabled = &omap2_dflt_clk_is_enabled,
  30. };
  31. static struct clk *_register_interface(struct device *dev, const char *name,
  32. const char *parent_name,
  33. struct clk_omap_reg *reg, u8 bit_idx,
  34. const struct clk_hw_omap_ops *ops)
  35. {
  36. struct clk_init_data init = { NULL };
  37. struct clk_hw_omap *clk_hw;
  38. struct clk *clk;
  39. clk_hw = kzalloc(sizeof(*clk_hw), GFP_KERNEL);
  40. if (!clk_hw)
  41. return ERR_PTR(-ENOMEM);
  42. clk_hw->hw.init = &init;
  43. clk_hw->ops = ops;
  44. memcpy(&clk_hw->enable_reg, reg, sizeof(*reg));
  45. clk_hw->enable_bit = bit_idx;
  46. init.name = name;
  47. init.ops = &ti_interface_clk_ops;
  48. init.flags = 0;
  49. init.num_parents = 1;
  50. init.parent_names = &parent_name;
  51. clk = ti_clk_register(NULL, &clk_hw->hw, name);
  52. if (IS_ERR(clk))
  53. kfree(clk_hw);
  54. else
  55. omap2_init_clk_hw_omap_clocks(&clk_hw->hw);
  56. return clk;
  57. }
  58. #if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_ATAGS)
  59. struct clk *ti_clk_register_interface(struct ti_clk *setup)
  60. {
  61. const struct clk_hw_omap_ops *ops = &clkhwops_iclk_wait;
  62. struct clk_omap_reg reg;
  63. struct ti_clk_gate *gate;
  64. gate = setup->data;
  65. reg.index = gate->module;
  66. reg.offset = gate->reg;
  67. reg.ptr = NULL;
  68. if (gate->flags & CLKF_NO_WAIT)
  69. ops = &clkhwops_iclk;
  70. if (gate->flags & CLKF_HSOTGUSB)
  71. ops = &clkhwops_omap3430es2_iclk_hsotgusb_wait;
  72. if (gate->flags & CLKF_DSS)
  73. ops = &clkhwops_omap3430es2_iclk_dss_usbhost_wait;
  74. if (gate->flags & CLKF_SSI)
  75. ops = &clkhwops_omap3430es2_iclk_ssi_wait;
  76. if (gate->flags & CLKF_AM35XX)
  77. ops = &clkhwops_am35xx_ipss_wait;
  78. return _register_interface(NULL, setup->name, gate->parent,
  79. &reg, gate->bit_shift, ops);
  80. }
  81. #endif
  82. static void __init _of_ti_interface_clk_setup(struct device_node *node,
  83. const struct clk_hw_omap_ops *ops)
  84. {
  85. struct clk *clk;
  86. const char *parent_name;
  87. struct clk_omap_reg reg;
  88. u8 enable_bit = 0;
  89. u32 val;
  90. if (ti_clk_get_reg_addr(node, 0, &reg))
  91. return;
  92. if (!of_property_read_u32(node, "ti,bit-shift", &val))
  93. enable_bit = val;
  94. parent_name = of_clk_get_parent_name(node, 0);
  95. if (!parent_name) {
  96. pr_err("%s must have a parent\n", node->name);
  97. return;
  98. }
  99. clk = _register_interface(NULL, node->name, parent_name, &reg,
  100. enable_bit, ops);
  101. if (!IS_ERR(clk))
  102. of_clk_add_provider(node, of_clk_src_simple_get, clk);
  103. }
  104. static void __init of_ti_interface_clk_setup(struct device_node *node)
  105. {
  106. _of_ti_interface_clk_setup(node, &clkhwops_iclk_wait);
  107. }
  108. CLK_OF_DECLARE(ti_interface_clk, "ti,omap3-interface-clock",
  109. of_ti_interface_clk_setup);
  110. static void __init of_ti_no_wait_interface_clk_setup(struct device_node *node)
  111. {
  112. _of_ti_interface_clk_setup(node, &clkhwops_iclk);
  113. }
  114. CLK_OF_DECLARE(ti_no_wait_interface_clk, "ti,omap3-no-wait-interface-clock",
  115. of_ti_no_wait_interface_clk_setup);
  116. #ifdef CONFIG_ARCH_OMAP3
  117. static void __init of_ti_hsotgusb_interface_clk_setup(struct device_node *node)
  118. {
  119. _of_ti_interface_clk_setup(node,
  120. &clkhwops_omap3430es2_iclk_hsotgusb_wait);
  121. }
  122. CLK_OF_DECLARE(ti_hsotgusb_interface_clk, "ti,omap3-hsotgusb-interface-clock",
  123. of_ti_hsotgusb_interface_clk_setup);
  124. static void __init of_ti_dss_interface_clk_setup(struct device_node *node)
  125. {
  126. _of_ti_interface_clk_setup(node,
  127. &clkhwops_omap3430es2_iclk_dss_usbhost_wait);
  128. }
  129. CLK_OF_DECLARE(ti_dss_interface_clk, "ti,omap3-dss-interface-clock",
  130. of_ti_dss_interface_clk_setup);
  131. static void __init of_ti_ssi_interface_clk_setup(struct device_node *node)
  132. {
  133. _of_ti_interface_clk_setup(node, &clkhwops_omap3430es2_iclk_ssi_wait);
  134. }
  135. CLK_OF_DECLARE(ti_ssi_interface_clk, "ti,omap3-ssi-interface-clock",
  136. of_ti_ssi_interface_clk_setup);
  137. static void __init of_ti_am35xx_interface_clk_setup(struct device_node *node)
  138. {
  139. _of_ti_interface_clk_setup(node, &clkhwops_am35xx_ipss_wait);
  140. }
  141. CLK_OF_DECLARE(ti_am35xx_interface_clk, "ti,am35xx-interface-clock",
  142. of_ti_am35xx_interface_clk_setup);
  143. #endif
  144. #ifdef CONFIG_SOC_OMAP2430
  145. static void __init of_ti_omap2430_interface_clk_setup(struct device_node *node)
  146. {
  147. _of_ti_interface_clk_setup(node, &clkhwops_omap2430_i2chs_wait);
  148. }
  149. CLK_OF_DECLARE(ti_omap2430_interface_clk, "ti,omap2430-interface-clock",
  150. of_ti_omap2430_interface_clk_setup);
  151. #endif