setup-common.c 23 KB

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  1. /*
  2. * Common boot and setup code for both 32-bit and 64-bit.
  3. * Extracted from arch/powerpc/kernel/setup_64.c.
  4. *
  5. * Copyright (C) 2001 PPC64 Team, IBM Corp
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #undef DEBUG
  13. #include <linux/export.h>
  14. #include <linux/string.h>
  15. #include <linux/sched.h>
  16. #include <linux/init.h>
  17. #include <linux/kernel.h>
  18. #include <linux/reboot.h>
  19. #include <linux/delay.h>
  20. #include <linux/initrd.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/seq_file.h>
  23. #include <linux/ioport.h>
  24. #include <linux/console.h>
  25. #include <linux/screen_info.h>
  26. #include <linux/root_dev.h>
  27. #include <linux/notifier.h>
  28. #include <linux/cpu.h>
  29. #include <linux/unistd.h>
  30. #include <linux/serial.h>
  31. #include <linux/serial_8250.h>
  32. #include <linux/debugfs.h>
  33. #include <linux/percpu.h>
  34. #include <linux/memblock.h>
  35. #include <linux/of_platform.h>
  36. #include <linux/hugetlb.h>
  37. #include <asm/io.h>
  38. #include <asm/paca.h>
  39. #include <asm/prom.h>
  40. #include <asm/processor.h>
  41. #include <asm/vdso_datapage.h>
  42. #include <asm/pgtable.h>
  43. #include <asm/smp.h>
  44. #include <asm/elf.h>
  45. #include <asm/machdep.h>
  46. #include <asm/time.h>
  47. #include <asm/cputable.h>
  48. #include <asm/sections.h>
  49. #include <asm/firmware.h>
  50. #include <asm/btext.h>
  51. #include <asm/nvram.h>
  52. #include <asm/setup.h>
  53. #include <asm/rtas.h>
  54. #include <asm/iommu.h>
  55. #include <asm/serial.h>
  56. #include <asm/cache.h>
  57. #include <asm/page.h>
  58. #include <asm/mmu.h>
  59. #include <asm/xmon.h>
  60. #include <asm/cputhreads.h>
  61. #include <mm/mmu_decl.h>
  62. #include <asm/fadump.h>
  63. #include <asm/udbg.h>
  64. #include <asm/hugetlb.h>
  65. #include <asm/livepatch.h>
  66. #include <asm/mmu_context.h>
  67. #include <asm/cpu_has_feature.h>
  68. #include "setup.h"
  69. #ifdef DEBUG
  70. #include <asm/udbg.h>
  71. #define DBG(fmt...) udbg_printf(fmt)
  72. #else
  73. #define DBG(fmt...)
  74. #endif
  75. /* The main machine-dep calls structure
  76. */
  77. struct machdep_calls ppc_md;
  78. EXPORT_SYMBOL(ppc_md);
  79. struct machdep_calls *machine_id;
  80. EXPORT_SYMBOL(machine_id);
  81. int boot_cpuid = -1;
  82. EXPORT_SYMBOL_GPL(boot_cpuid);
  83. unsigned long klimit = (unsigned long) _end;
  84. /*
  85. * This still seems to be needed... -- paulus
  86. */
  87. struct screen_info screen_info = {
  88. .orig_x = 0,
  89. .orig_y = 25,
  90. .orig_video_cols = 80,
  91. .orig_video_lines = 25,
  92. .orig_video_isVGA = 1,
  93. .orig_video_points = 16
  94. };
  95. #if defined(CONFIG_FB_VGA16_MODULE)
  96. EXPORT_SYMBOL(screen_info);
  97. #endif
  98. /* Variables required to store legacy IO irq routing */
  99. int of_i8042_kbd_irq;
  100. EXPORT_SYMBOL_GPL(of_i8042_kbd_irq);
  101. int of_i8042_aux_irq;
  102. EXPORT_SYMBOL_GPL(of_i8042_aux_irq);
  103. #ifdef __DO_IRQ_CANON
  104. /* XXX should go elsewhere eventually */
  105. int ppc_do_canonicalize_irqs;
  106. EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
  107. #endif
  108. /* also used by kexec */
  109. void machine_shutdown(void)
  110. {
  111. #ifdef CONFIG_FA_DUMP
  112. /*
  113. * if fadump is active, cleanup the fadump registration before we
  114. * shutdown.
  115. */
  116. fadump_cleanup();
  117. #endif
  118. if (ppc_md.machine_shutdown)
  119. ppc_md.machine_shutdown();
  120. }
  121. static void machine_hang(void)
  122. {
  123. pr_emerg("System Halted, OK to turn off power\n");
  124. local_irq_disable();
  125. while (1)
  126. ;
  127. }
  128. void machine_restart(char *cmd)
  129. {
  130. machine_shutdown();
  131. if (ppc_md.restart)
  132. ppc_md.restart(cmd);
  133. smp_send_stop();
  134. do_kernel_restart(cmd);
  135. mdelay(1000);
  136. machine_hang();
  137. }
  138. void machine_power_off(void)
  139. {
  140. machine_shutdown();
  141. if (pm_power_off)
  142. pm_power_off();
  143. smp_send_stop();
  144. machine_hang();
  145. }
  146. /* Used by the G5 thermal driver */
  147. EXPORT_SYMBOL_GPL(machine_power_off);
  148. void (*pm_power_off)(void);
  149. EXPORT_SYMBOL_GPL(pm_power_off);
  150. void machine_halt(void)
  151. {
  152. machine_shutdown();
  153. if (ppc_md.halt)
  154. ppc_md.halt();
  155. smp_send_stop();
  156. machine_hang();
  157. }
  158. #ifdef CONFIG_TAU
  159. extern u32 cpu_temp(unsigned long cpu);
  160. extern u32 cpu_temp_both(unsigned long cpu);
  161. #endif /* CONFIG_TAU */
  162. #ifdef CONFIG_SMP
  163. DEFINE_PER_CPU(unsigned int, cpu_pvr);
  164. #endif
  165. static void show_cpuinfo_summary(struct seq_file *m)
  166. {
  167. struct device_node *root;
  168. const char *model = NULL;
  169. #if defined(CONFIG_SMP) && defined(CONFIG_PPC32)
  170. unsigned long bogosum = 0;
  171. int i;
  172. for_each_online_cpu(i)
  173. bogosum += loops_per_jiffy;
  174. seq_printf(m, "total bogomips\t: %lu.%02lu\n",
  175. bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
  176. #endif /* CONFIG_SMP && CONFIG_PPC32 */
  177. seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
  178. if (ppc_md.name)
  179. seq_printf(m, "platform\t: %s\n", ppc_md.name);
  180. root = of_find_node_by_path("/");
  181. if (root)
  182. model = of_get_property(root, "model", NULL);
  183. if (model)
  184. seq_printf(m, "model\t\t: %s\n", model);
  185. of_node_put(root);
  186. if (ppc_md.show_cpuinfo != NULL)
  187. ppc_md.show_cpuinfo(m);
  188. #ifdef CONFIG_PPC32
  189. /* Display the amount of memory */
  190. seq_printf(m, "Memory\t\t: %d MB\n",
  191. (unsigned int)(total_memory / (1024 * 1024)));
  192. #endif
  193. }
  194. static int show_cpuinfo(struct seq_file *m, void *v)
  195. {
  196. unsigned long cpu_id = (unsigned long)v - 1;
  197. unsigned int pvr;
  198. unsigned long proc_freq;
  199. unsigned short maj;
  200. unsigned short min;
  201. /* We only show online cpus: disable preempt (overzealous, I
  202. * knew) to prevent cpu going down. */
  203. preempt_disable();
  204. if (!cpu_online(cpu_id)) {
  205. preempt_enable();
  206. return 0;
  207. }
  208. #ifdef CONFIG_SMP
  209. pvr = per_cpu(cpu_pvr, cpu_id);
  210. #else
  211. pvr = mfspr(SPRN_PVR);
  212. #endif
  213. maj = (pvr >> 8) & 0xFF;
  214. min = pvr & 0xFF;
  215. seq_printf(m, "processor\t: %lu\n", cpu_id);
  216. seq_printf(m, "cpu\t\t: ");
  217. if (cur_cpu_spec->pvr_mask)
  218. seq_printf(m, "%s", cur_cpu_spec->cpu_name);
  219. else
  220. seq_printf(m, "unknown (%08x)", pvr);
  221. #ifdef CONFIG_ALTIVEC
  222. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  223. seq_printf(m, ", altivec supported");
  224. #endif /* CONFIG_ALTIVEC */
  225. seq_printf(m, "\n");
  226. #ifdef CONFIG_TAU
  227. if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
  228. #ifdef CONFIG_TAU_AVERAGE
  229. /* more straightforward, but potentially misleading */
  230. seq_printf(m, "temperature \t: %u C (uncalibrated)\n",
  231. cpu_temp(cpu_id));
  232. #else
  233. /* show the actual temp sensor range */
  234. u32 temp;
  235. temp = cpu_temp_both(cpu_id);
  236. seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
  237. temp & 0xff, temp >> 16);
  238. #endif
  239. }
  240. #endif /* CONFIG_TAU */
  241. /*
  242. * Platforms that have variable clock rates, should implement
  243. * the method ppc_md.get_proc_freq() that reports the clock
  244. * rate of a given cpu. The rest can use ppc_proc_freq to
  245. * report the clock rate that is same across all cpus.
  246. */
  247. if (ppc_md.get_proc_freq)
  248. proc_freq = ppc_md.get_proc_freq(cpu_id);
  249. else
  250. proc_freq = ppc_proc_freq;
  251. if (proc_freq)
  252. seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
  253. proc_freq / 1000000, proc_freq % 1000000);
  254. if (ppc_md.show_percpuinfo != NULL)
  255. ppc_md.show_percpuinfo(m, cpu_id);
  256. /* If we are a Freescale core do a simple check so
  257. * we dont have to keep adding cases in the future */
  258. if (PVR_VER(pvr) & 0x8000) {
  259. switch (PVR_VER(pvr)) {
  260. case 0x8000: /* 7441/7450/7451, Voyager */
  261. case 0x8001: /* 7445/7455, Apollo 6 */
  262. case 0x8002: /* 7447/7457, Apollo 7 */
  263. case 0x8003: /* 7447A, Apollo 7 PM */
  264. case 0x8004: /* 7448, Apollo 8 */
  265. case 0x800c: /* 7410, Nitro */
  266. maj = ((pvr >> 8) & 0xF);
  267. min = PVR_MIN(pvr);
  268. break;
  269. default: /* e500/book-e */
  270. maj = PVR_MAJ(pvr);
  271. min = PVR_MIN(pvr);
  272. break;
  273. }
  274. } else {
  275. switch (PVR_VER(pvr)) {
  276. case 0x0020: /* 403 family */
  277. maj = PVR_MAJ(pvr) + 1;
  278. min = PVR_MIN(pvr);
  279. break;
  280. case 0x1008: /* 740P/750P ?? */
  281. maj = ((pvr >> 8) & 0xFF) - 1;
  282. min = pvr & 0xFF;
  283. break;
  284. default:
  285. maj = (pvr >> 8) & 0xFF;
  286. min = pvr & 0xFF;
  287. break;
  288. }
  289. }
  290. seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
  291. maj, min, PVR_VER(pvr), PVR_REV(pvr));
  292. #ifdef CONFIG_PPC32
  293. seq_printf(m, "bogomips\t: %lu.%02lu\n",
  294. loops_per_jiffy / (500000/HZ),
  295. (loops_per_jiffy / (5000/HZ)) % 100);
  296. #endif
  297. #ifdef CONFIG_SMP
  298. seq_printf(m, "\n");
  299. #endif
  300. preempt_enable();
  301. /* If this is the last cpu, print the summary */
  302. if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids)
  303. show_cpuinfo_summary(m);
  304. return 0;
  305. }
  306. static void *c_start(struct seq_file *m, loff_t *pos)
  307. {
  308. if (*pos == 0) /* just in case, cpu 0 is not the first */
  309. *pos = cpumask_first(cpu_online_mask);
  310. else
  311. *pos = cpumask_next(*pos - 1, cpu_online_mask);
  312. if ((*pos) < nr_cpu_ids)
  313. return (void *)(unsigned long)(*pos + 1);
  314. return NULL;
  315. }
  316. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  317. {
  318. (*pos)++;
  319. return c_start(m, pos);
  320. }
  321. static void c_stop(struct seq_file *m, void *v)
  322. {
  323. }
  324. const struct seq_operations cpuinfo_op = {
  325. .start =c_start,
  326. .next = c_next,
  327. .stop = c_stop,
  328. .show = show_cpuinfo,
  329. };
  330. void __init check_for_initrd(void)
  331. {
  332. #ifdef CONFIG_BLK_DEV_INITRD
  333. DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n",
  334. initrd_start, initrd_end);
  335. /* If we were passed an initrd, set the ROOT_DEV properly if the values
  336. * look sensible. If not, clear initrd reference.
  337. */
  338. if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
  339. initrd_end > initrd_start)
  340. ROOT_DEV = Root_RAM0;
  341. else
  342. initrd_start = initrd_end = 0;
  343. if (initrd_start)
  344. pr_info("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
  345. DBG(" <- check_for_initrd()\n");
  346. #endif /* CONFIG_BLK_DEV_INITRD */
  347. }
  348. #ifdef CONFIG_SMP
  349. int threads_per_core, threads_per_subcore, threads_shift;
  350. cpumask_t threads_core_mask;
  351. EXPORT_SYMBOL_GPL(threads_per_core);
  352. EXPORT_SYMBOL_GPL(threads_per_subcore);
  353. EXPORT_SYMBOL_GPL(threads_shift);
  354. EXPORT_SYMBOL_GPL(threads_core_mask);
  355. static void __init cpu_init_thread_core_maps(int tpc)
  356. {
  357. int i;
  358. threads_per_core = tpc;
  359. threads_per_subcore = tpc;
  360. cpumask_clear(&threads_core_mask);
  361. /* This implementation only supports power of 2 number of threads
  362. * for simplicity and performance
  363. */
  364. threads_shift = ilog2(tpc);
  365. BUG_ON(tpc != (1 << threads_shift));
  366. for (i = 0; i < tpc; i++)
  367. cpumask_set_cpu(i, &threads_core_mask);
  368. printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
  369. tpc, tpc > 1 ? "s" : "");
  370. printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
  371. }
  372. /**
  373. * setup_cpu_maps - initialize the following cpu maps:
  374. * cpu_possible_mask
  375. * cpu_present_mask
  376. *
  377. * Having the possible map set up early allows us to restrict allocations
  378. * of things like irqstacks to nr_cpu_ids rather than NR_CPUS.
  379. *
  380. * We do not initialize the online map here; cpus set their own bits in
  381. * cpu_online_mask as they come up.
  382. *
  383. * This function is valid only for Open Firmware systems. finish_device_tree
  384. * must be called before using this.
  385. *
  386. * While we're here, we may as well set the "physical" cpu ids in the paca.
  387. *
  388. * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
  389. */
  390. void __init smp_setup_cpu_maps(void)
  391. {
  392. struct device_node *dn = NULL;
  393. int cpu = 0;
  394. int nthreads = 1;
  395. DBG("smp_setup_cpu_maps()\n");
  396. while ((dn = of_find_node_by_type(dn, "cpu")) && cpu < nr_cpu_ids) {
  397. const __be32 *intserv;
  398. __be32 cpu_be;
  399. int j, len;
  400. DBG(" * %s...\n", dn->full_name);
  401. intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
  402. &len);
  403. if (intserv) {
  404. DBG(" ibm,ppc-interrupt-server#s -> %d threads\n",
  405. nthreads);
  406. } else {
  407. DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n");
  408. intserv = of_get_property(dn, "reg", &len);
  409. if (!intserv) {
  410. cpu_be = cpu_to_be32(cpu);
  411. intserv = &cpu_be; /* assume logical == phys */
  412. len = 4;
  413. }
  414. }
  415. nthreads = len / sizeof(int);
  416. for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) {
  417. bool avail;
  418. DBG(" thread %d -> cpu %d (hard id %d)\n",
  419. j, cpu, be32_to_cpu(intserv[j]));
  420. avail = of_device_is_available(dn);
  421. if (!avail)
  422. avail = !of_property_match_string(dn,
  423. "enable-method", "spin-table");
  424. set_cpu_present(cpu, avail);
  425. set_hard_smp_processor_id(cpu, be32_to_cpu(intserv[j]));
  426. set_cpu_possible(cpu, true);
  427. cpu++;
  428. }
  429. }
  430. /* If no SMT supported, nthreads is forced to 1 */
  431. if (!cpu_has_feature(CPU_FTR_SMT)) {
  432. DBG(" SMT disabled ! nthreads forced to 1\n");
  433. nthreads = 1;
  434. }
  435. #ifdef CONFIG_PPC64
  436. /*
  437. * On pSeries LPAR, we need to know how many cpus
  438. * could possibly be added to this partition.
  439. */
  440. if (firmware_has_feature(FW_FEATURE_LPAR) &&
  441. (dn = of_find_node_by_path("/rtas"))) {
  442. int num_addr_cell, num_size_cell, maxcpus;
  443. const __be32 *ireg;
  444. num_addr_cell = of_n_addr_cells(dn);
  445. num_size_cell = of_n_size_cells(dn);
  446. ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
  447. if (!ireg)
  448. goto out;
  449. maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell);
  450. /* Double maxcpus for processors which have SMT capability */
  451. if (cpu_has_feature(CPU_FTR_SMT))
  452. maxcpus *= nthreads;
  453. if (maxcpus > nr_cpu_ids) {
  454. printk(KERN_WARNING
  455. "Partition configured for %d cpus, "
  456. "operating system maximum is %d.\n",
  457. maxcpus, nr_cpu_ids);
  458. maxcpus = nr_cpu_ids;
  459. } else
  460. printk(KERN_INFO "Partition configured for %d cpus.\n",
  461. maxcpus);
  462. for (cpu = 0; cpu < maxcpus; cpu++)
  463. set_cpu_possible(cpu, true);
  464. out:
  465. of_node_put(dn);
  466. }
  467. vdso_data->processorCount = num_present_cpus();
  468. #endif /* CONFIG_PPC64 */
  469. /* Initialize CPU <=> thread mapping/
  470. *
  471. * WARNING: We assume that the number of threads is the same for
  472. * every CPU in the system. If that is not the case, then some code
  473. * here will have to be reworked
  474. */
  475. cpu_init_thread_core_maps(nthreads);
  476. /* Now that possible cpus are set, set nr_cpu_ids for later use */
  477. setup_nr_cpu_ids();
  478. free_unused_pacas();
  479. }
  480. #endif /* CONFIG_SMP */
  481. #ifdef CONFIG_PCSPKR_PLATFORM
  482. static __init int add_pcspkr(void)
  483. {
  484. struct device_node *np;
  485. struct platform_device *pd;
  486. int ret;
  487. np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
  488. of_node_put(np);
  489. if (!np)
  490. return -ENODEV;
  491. pd = platform_device_alloc("pcspkr", -1);
  492. if (!pd)
  493. return -ENOMEM;
  494. ret = platform_device_add(pd);
  495. if (ret)
  496. platform_device_put(pd);
  497. return ret;
  498. }
  499. device_initcall(add_pcspkr);
  500. #endif /* CONFIG_PCSPKR_PLATFORM */
  501. void probe_machine(void)
  502. {
  503. extern struct machdep_calls __machine_desc_start;
  504. extern struct machdep_calls __machine_desc_end;
  505. unsigned int i;
  506. /*
  507. * Iterate all ppc_md structures until we find the proper
  508. * one for the current machine type
  509. */
  510. DBG("Probing machine type ...\n");
  511. /*
  512. * Check ppc_md is empty, if not we have a bug, ie, we setup an
  513. * entry before probe_machine() which will be overwritten
  514. */
  515. for (i = 0; i < (sizeof(ppc_md) / sizeof(void *)); i++) {
  516. if (((void **)&ppc_md)[i]) {
  517. printk(KERN_ERR "Entry %d in ppc_md non empty before"
  518. " machine probe !\n", i);
  519. }
  520. }
  521. for (machine_id = &__machine_desc_start;
  522. machine_id < &__machine_desc_end;
  523. machine_id++) {
  524. DBG(" %s ...", machine_id->name);
  525. memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
  526. if (ppc_md.probe()) {
  527. DBG(" match !\n");
  528. break;
  529. }
  530. DBG("\n");
  531. }
  532. /* What can we do if we didn't find ? */
  533. if (machine_id >= &__machine_desc_end) {
  534. DBG("No suitable machine found !\n");
  535. for (;;);
  536. }
  537. printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
  538. }
  539. /* Match a class of boards, not a specific device configuration. */
  540. int check_legacy_ioport(unsigned long base_port)
  541. {
  542. struct device_node *parent, *np = NULL;
  543. int ret = -ENODEV;
  544. switch(base_port) {
  545. case I8042_DATA_REG:
  546. if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
  547. np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
  548. if (np) {
  549. parent = of_get_parent(np);
  550. of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0);
  551. if (!of_i8042_kbd_irq)
  552. of_i8042_kbd_irq = 1;
  553. of_i8042_aux_irq = irq_of_parse_and_map(parent, 1);
  554. if (!of_i8042_aux_irq)
  555. of_i8042_aux_irq = 12;
  556. of_node_put(np);
  557. np = parent;
  558. break;
  559. }
  560. np = of_find_node_by_type(NULL, "8042");
  561. /* Pegasos has no device_type on its 8042 node, look for the
  562. * name instead */
  563. if (!np)
  564. np = of_find_node_by_name(NULL, "8042");
  565. if (np) {
  566. of_i8042_kbd_irq = 1;
  567. of_i8042_aux_irq = 12;
  568. }
  569. break;
  570. case FDC_BASE: /* FDC1 */
  571. np = of_find_node_by_type(NULL, "fdc");
  572. break;
  573. default:
  574. /* ipmi is supposed to fail here */
  575. break;
  576. }
  577. if (!np)
  578. return ret;
  579. parent = of_get_parent(np);
  580. if (parent) {
  581. if (strcmp(parent->type, "isa") == 0)
  582. ret = 0;
  583. of_node_put(parent);
  584. }
  585. of_node_put(np);
  586. return ret;
  587. }
  588. EXPORT_SYMBOL(check_legacy_ioport);
  589. static int ppc_panic_event(struct notifier_block *this,
  590. unsigned long event, void *ptr)
  591. {
  592. /*
  593. * If firmware-assisted dump has been registered then trigger
  594. * firmware-assisted dump and let firmware handle everything else.
  595. */
  596. crash_fadump(NULL, ptr);
  597. ppc_md.panic(ptr); /* May not return */
  598. return NOTIFY_DONE;
  599. }
  600. static struct notifier_block ppc_panic_block = {
  601. .notifier_call = ppc_panic_event,
  602. .priority = INT_MIN /* may not return; must be done last */
  603. };
  604. void __init setup_panic(void)
  605. {
  606. if (!ppc_md.panic)
  607. return;
  608. atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
  609. }
  610. #ifdef CONFIG_CHECK_CACHE_COHERENCY
  611. /*
  612. * For platforms that have configurable cache-coherency. This function
  613. * checks that the cache coherency setting of the kernel matches the setting
  614. * left by the firmware, as indicated in the device tree. Since a mismatch
  615. * will eventually result in DMA failures, we print * and error and call
  616. * BUG() in that case.
  617. */
  618. #ifdef CONFIG_NOT_COHERENT_CACHE
  619. #define KERNEL_COHERENCY 0
  620. #else
  621. #define KERNEL_COHERENCY 1
  622. #endif
  623. static int __init check_cache_coherency(void)
  624. {
  625. struct device_node *np;
  626. const void *prop;
  627. int devtree_coherency;
  628. np = of_find_node_by_path("/");
  629. prop = of_get_property(np, "coherency-off", NULL);
  630. of_node_put(np);
  631. devtree_coherency = prop ? 0 : 1;
  632. if (devtree_coherency != KERNEL_COHERENCY) {
  633. printk(KERN_ERR
  634. "kernel coherency:%s != device tree_coherency:%s\n",
  635. KERNEL_COHERENCY ? "on" : "off",
  636. devtree_coherency ? "on" : "off");
  637. BUG();
  638. }
  639. return 0;
  640. }
  641. late_initcall(check_cache_coherency);
  642. #endif /* CONFIG_CHECK_CACHE_COHERENCY */
  643. #ifdef CONFIG_DEBUG_FS
  644. struct dentry *powerpc_debugfs_root;
  645. EXPORT_SYMBOL(powerpc_debugfs_root);
  646. static int powerpc_debugfs_init(void)
  647. {
  648. powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL);
  649. return powerpc_debugfs_root == NULL;
  650. }
  651. arch_initcall(powerpc_debugfs_init);
  652. #endif
  653. void ppc_printk_progress(char *s, unsigned short hex)
  654. {
  655. pr_info("%s\n", s);
  656. }
  657. void arch_setup_pdev_archdata(struct platform_device *pdev)
  658. {
  659. pdev->archdata.dma_mask = DMA_BIT_MASK(32);
  660. pdev->dev.dma_mask = &pdev->archdata.dma_mask;
  661. set_dma_ops(&pdev->dev, &dma_direct_ops);
  662. }
  663. static __init void print_system_info(void)
  664. {
  665. pr_info("-----------------------------------------------------\n");
  666. #ifdef CONFIG_PPC_STD_MMU_64
  667. pr_info("ppc64_pft_size = 0x%llx\n", ppc64_pft_size);
  668. #endif
  669. #ifdef CONFIG_PPC_STD_MMU_32
  670. pr_info("Hash_size = 0x%lx\n", Hash_size);
  671. #endif
  672. pr_info("phys_mem_size = 0x%llx\n",
  673. (unsigned long long)memblock_phys_mem_size());
  674. pr_info("dcache_bsize = 0x%x\n", dcache_bsize);
  675. pr_info("icache_bsize = 0x%x\n", icache_bsize);
  676. if (ucache_bsize != 0)
  677. pr_info("ucache_bsize = 0x%x\n", ucache_bsize);
  678. pr_info("cpu_features = 0x%016lx\n", cur_cpu_spec->cpu_features);
  679. pr_info(" possible = 0x%016lx\n",
  680. (unsigned long)CPU_FTRS_POSSIBLE);
  681. pr_info(" always = 0x%016lx\n",
  682. (unsigned long)CPU_FTRS_ALWAYS);
  683. pr_info("cpu_user_features = 0x%08x 0x%08x\n",
  684. cur_cpu_spec->cpu_user_features,
  685. cur_cpu_spec->cpu_user_features2);
  686. pr_info("mmu_features = 0x%08x\n", cur_cpu_spec->mmu_features);
  687. #ifdef CONFIG_PPC64
  688. pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features);
  689. #endif
  690. #ifdef CONFIG_PPC_STD_MMU_64
  691. if (htab_address)
  692. pr_info("htab_address = 0x%p\n", htab_address);
  693. if (htab_hash_mask)
  694. pr_info("htab_hash_mask = 0x%lx\n", htab_hash_mask);
  695. #endif
  696. #ifdef CONFIG_PPC_STD_MMU_32
  697. if (Hash)
  698. pr_info("Hash = 0x%p\n", Hash);
  699. if (Hash_mask)
  700. pr_info("Hash_mask = 0x%lx\n", Hash_mask);
  701. #endif
  702. if (PHYSICAL_START > 0)
  703. pr_info("physical_start = 0x%llx\n",
  704. (unsigned long long)PHYSICAL_START);
  705. pr_info("-----------------------------------------------------\n");
  706. }
  707. /*
  708. * Called into from start_kernel this initializes memblock, which is used
  709. * to manage page allocation until mem_init is called.
  710. */
  711. void __init setup_arch(char **cmdline_p)
  712. {
  713. *cmdline_p = boot_command_line;
  714. /* Set a half-reasonable default so udelay does something sensible */
  715. loops_per_jiffy = 500000000 / HZ;
  716. /* Unflatten the device-tree passed by prom_init or kexec */
  717. unflatten_device_tree();
  718. /*
  719. * Initialize cache line/block info from device-tree (on ppc64) or
  720. * just cputable (on ppc32).
  721. */
  722. initialize_cache_info();
  723. /* Initialize RTAS if available. */
  724. rtas_initialize();
  725. /* Check if we have an initrd provided via the device-tree. */
  726. check_for_initrd();
  727. /* Probe the machine type, establish ppc_md. */
  728. probe_machine();
  729. /* Setup panic notifier if requested by the platform. */
  730. setup_panic();
  731. /*
  732. * Configure ppc_md.power_save (ppc32 only, 64-bit machines do
  733. * it from their respective probe() function.
  734. */
  735. setup_power_save();
  736. /* Discover standard serial ports. */
  737. find_legacy_serial_ports();
  738. /* Register early console with the printk subsystem. */
  739. register_early_udbg_console();
  740. /* Setup the various CPU maps based on the device-tree. */
  741. smp_setup_cpu_maps();
  742. /* Initialize xmon. */
  743. xmon_setup();
  744. /* Check the SMT related command line arguments (ppc64). */
  745. check_smt_enabled();
  746. /* On BookE, setup per-core TLB data structures. */
  747. setup_tlb_core_data();
  748. /*
  749. * Release secondary cpus out of their spinloops at 0x60 now that
  750. * we can map physical -> logical CPU ids.
  751. *
  752. * Freescale Book3e parts spin in a loop provided by firmware,
  753. * so smp_release_cpus() does nothing for them.
  754. */
  755. #ifdef CONFIG_SMP
  756. smp_release_cpus();
  757. #endif
  758. /* Print various info about the machine that has been gathered so far. */
  759. print_system_info();
  760. /* Reserve large chunks of memory for use by CMA for KVM. */
  761. kvm_cma_reserve();
  762. /*
  763. * Reserve any gigantic pages requested on the command line.
  764. * memblock needs to have been initialized by the time this is
  765. * called since this will reserve memory.
  766. */
  767. reserve_hugetlb_gpages();
  768. klp_init_thread_info(&init_thread_info);
  769. init_mm.start_code = (unsigned long)_stext;
  770. init_mm.end_code = (unsigned long) _etext;
  771. init_mm.end_data = (unsigned long) _edata;
  772. init_mm.brk = klimit;
  773. #ifdef CONFIG_PPC_64K_PAGES
  774. init_mm.context.pte_frag = NULL;
  775. #endif
  776. #ifdef CONFIG_SPAPR_TCE_IOMMU
  777. mm_iommu_init(&init_mm);
  778. #endif
  779. irqstack_early_init();
  780. exc_lvl_early_init();
  781. emergency_stack_init();
  782. initmem_init();
  783. #ifdef CONFIG_DUMMY_CONSOLE
  784. conswitchp = &dummy_con;
  785. #endif
  786. if (ppc_md.setup_arch)
  787. ppc_md.setup_arch();
  788. paging_init();
  789. /* Initialize the MMU context management stuff. */
  790. mmu_context_init();
  791. #ifdef CONFIG_PPC64
  792. /* Interrupt code needs to be 64K-aligned. */
  793. if ((unsigned long)_stext & 0xffff)
  794. panic("Kernelbase not 64K-aligned (0x%lx)!\n",
  795. (unsigned long)_stext);
  796. #endif
  797. }