process.c 18 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753
  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others.
  7. * Copyright (C) 2005, 2006 by Ralf Baechle (ralf@linux-mips.org)
  8. * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
  9. * Copyright (C) 2004 Thiemo Seufer
  10. * Copyright (C) 2013 Imagination Technologies Ltd.
  11. */
  12. #include <linux/errno.h>
  13. #include <linux/sched.h>
  14. #include <linux/tick.h>
  15. #include <linux/kernel.h>
  16. #include <linux/mm.h>
  17. #include <linux/stddef.h>
  18. #include <linux/unistd.h>
  19. #include <linux/export.h>
  20. #include <linux/ptrace.h>
  21. #include <linux/mman.h>
  22. #include <linux/personality.h>
  23. #include <linux/sys.h>
  24. #include <linux/init.h>
  25. #include <linux/completion.h>
  26. #include <linux/kallsyms.h>
  27. #include <linux/random.h>
  28. #include <linux/prctl.h>
  29. #include <asm/asm.h>
  30. #include <asm/bootinfo.h>
  31. #include <asm/cpu.h>
  32. #include <asm/dsemul.h>
  33. #include <asm/dsp.h>
  34. #include <asm/fpu.h>
  35. #include <asm/irq.h>
  36. #include <asm/msa.h>
  37. #include <asm/pgtable.h>
  38. #include <asm/mipsregs.h>
  39. #include <asm/processor.h>
  40. #include <asm/reg.h>
  41. #include <asm/uaccess.h>
  42. #include <asm/io.h>
  43. #include <asm/elf.h>
  44. #include <asm/isadep.h>
  45. #include <asm/inst.h>
  46. #include <asm/stacktrace.h>
  47. #include <asm/irq_regs.h>
  48. #ifdef CONFIG_HOTPLUG_CPU
  49. void arch_cpu_idle_dead(void)
  50. {
  51. /* What the heck is this check doing ? */
  52. if (!cpumask_test_cpu(smp_processor_id(), &cpu_callin_map))
  53. play_dead();
  54. }
  55. #endif
  56. asmlinkage void ret_from_fork(void);
  57. asmlinkage void ret_from_kernel_thread(void);
  58. void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
  59. {
  60. unsigned long status;
  61. /* New thread loses kernel privileges. */
  62. status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_FR|KU_MASK);
  63. status |= KU_USER;
  64. regs->cp0_status = status;
  65. lose_fpu(0);
  66. clear_thread_flag(TIF_MSA_CTX_LIVE);
  67. clear_used_math();
  68. atomic_set(&current->thread.bd_emu_frame, BD_EMUFRAME_NONE);
  69. init_dsp();
  70. regs->cp0_epc = pc;
  71. regs->regs[29] = sp;
  72. }
  73. void exit_thread(struct task_struct *tsk)
  74. {
  75. /*
  76. * User threads may have allocated a delay slot emulation frame.
  77. * If so, clean up that allocation.
  78. */
  79. if (!(current->flags & PF_KTHREAD))
  80. dsemul_thread_cleanup(tsk);
  81. }
  82. int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
  83. {
  84. /*
  85. * Save any process state which is live in hardware registers to the
  86. * parent context prior to duplication. This prevents the new child
  87. * state becoming stale if the parent is preempted before copy_thread()
  88. * gets a chance to save the parent's live hardware registers to the
  89. * child context.
  90. */
  91. preempt_disable();
  92. if (is_msa_enabled())
  93. save_msa(current);
  94. else if (is_fpu_owner())
  95. _save_fp(current);
  96. save_dsp(current);
  97. preempt_enable();
  98. *dst = *src;
  99. return 0;
  100. }
  101. /*
  102. * Copy architecture-specific thread state
  103. */
  104. int copy_thread(unsigned long clone_flags, unsigned long usp,
  105. unsigned long kthread_arg, struct task_struct *p)
  106. {
  107. struct thread_info *ti = task_thread_info(p);
  108. struct pt_regs *childregs, *regs = current_pt_regs();
  109. unsigned long childksp;
  110. p->set_child_tid = p->clear_child_tid = NULL;
  111. childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32;
  112. /* set up new TSS. */
  113. childregs = (struct pt_regs *) childksp - 1;
  114. /* Put the stack after the struct pt_regs. */
  115. childksp = (unsigned long) childregs;
  116. p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1);
  117. if (unlikely(p->flags & PF_KTHREAD)) {
  118. /* kernel thread */
  119. unsigned long status = p->thread.cp0_status;
  120. memset(childregs, 0, sizeof(struct pt_regs));
  121. ti->addr_limit = KERNEL_DS;
  122. p->thread.reg16 = usp; /* fn */
  123. p->thread.reg17 = kthread_arg;
  124. p->thread.reg29 = childksp;
  125. p->thread.reg31 = (unsigned long) ret_from_kernel_thread;
  126. #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
  127. status = (status & ~(ST0_KUP | ST0_IEP | ST0_IEC)) |
  128. ((status & (ST0_KUC | ST0_IEC)) << 2);
  129. #else
  130. status |= ST0_EXL;
  131. #endif
  132. childregs->cp0_status = status;
  133. return 0;
  134. }
  135. /* user thread */
  136. *childregs = *regs;
  137. childregs->regs[7] = 0; /* Clear error flag */
  138. childregs->regs[2] = 0; /* Child gets zero as return value */
  139. if (usp)
  140. childregs->regs[29] = usp;
  141. ti->addr_limit = USER_DS;
  142. p->thread.reg29 = (unsigned long) childregs;
  143. p->thread.reg31 = (unsigned long) ret_from_fork;
  144. /*
  145. * New tasks lose permission to use the fpu. This accelerates context
  146. * switching for most programs since they don't use the fpu.
  147. */
  148. childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);
  149. clear_tsk_thread_flag(p, TIF_USEDFPU);
  150. clear_tsk_thread_flag(p, TIF_USEDMSA);
  151. clear_tsk_thread_flag(p, TIF_MSA_CTX_LIVE);
  152. #ifdef CONFIG_MIPS_MT_FPAFF
  153. clear_tsk_thread_flag(p, TIF_FPUBOUND);
  154. #endif /* CONFIG_MIPS_MT_FPAFF */
  155. atomic_set(&p->thread.bd_emu_frame, BD_EMUFRAME_NONE);
  156. if (clone_flags & CLONE_SETTLS)
  157. ti->tp_value = regs->regs[7];
  158. return 0;
  159. }
  160. #ifdef CONFIG_CC_STACKPROTECTOR
  161. #include <linux/stackprotector.h>
  162. unsigned long __stack_chk_guard __read_mostly;
  163. EXPORT_SYMBOL(__stack_chk_guard);
  164. #endif
  165. struct mips_frame_info {
  166. void *func;
  167. unsigned long func_size;
  168. int frame_size;
  169. int pc_offset;
  170. };
  171. #define J_TARGET(pc,target) \
  172. (((unsigned long)(pc) & 0xf0000000) | ((target) << 2))
  173. static inline int is_ra_save_ins(union mips_instruction *ip, int *poff)
  174. {
  175. #ifdef CONFIG_CPU_MICROMIPS
  176. /*
  177. * swsp ra,offset
  178. * swm16 reglist,offset(sp)
  179. * swm32 reglist,offset(sp)
  180. * sw32 ra,offset(sp)
  181. * jradiussp - NOT SUPPORTED
  182. *
  183. * microMIPS is way more fun...
  184. */
  185. if (mm_insn_16bit(ip->halfword[1])) {
  186. switch (ip->mm16_r5_format.opcode) {
  187. case mm_swsp16_op:
  188. if (ip->mm16_r5_format.rt != 31)
  189. return 0;
  190. *poff = ip->mm16_r5_format.simmediate;
  191. *poff = (*poff << 2) / sizeof(ulong);
  192. return 1;
  193. case mm_pool16c_op:
  194. switch (ip->mm16_m_format.func) {
  195. case mm_swm16_op:
  196. *poff = ip->mm16_m_format.imm;
  197. *poff += 1 + ip->mm16_m_format.rlist;
  198. *poff = (*poff << 2) / sizeof(ulong);
  199. return 1;
  200. default:
  201. return 0;
  202. }
  203. default:
  204. return 0;
  205. }
  206. }
  207. switch (ip->i_format.opcode) {
  208. case mm_sw32_op:
  209. if (ip->i_format.rs != 29)
  210. return 0;
  211. if (ip->i_format.rt != 31)
  212. return 0;
  213. *poff = ip->i_format.simmediate / sizeof(ulong);
  214. return 1;
  215. case mm_pool32b_op:
  216. switch (ip->mm_m_format.func) {
  217. case mm_swm32_func:
  218. if (ip->mm_m_format.rd < 0x10)
  219. return 0;
  220. if (ip->mm_m_format.base != 29)
  221. return 0;
  222. *poff = ip->mm_m_format.simmediate;
  223. *poff += (ip->mm_m_format.rd & 0xf) * sizeof(u32);
  224. *poff /= sizeof(ulong);
  225. return 1;
  226. default:
  227. return 0;
  228. }
  229. default:
  230. return 0;
  231. }
  232. #else
  233. /* sw / sd $ra, offset($sp) */
  234. if ((ip->i_format.opcode == sw_op || ip->i_format.opcode == sd_op) &&
  235. ip->i_format.rs == 29 && ip->i_format.rt == 31) {
  236. *poff = ip->i_format.simmediate / sizeof(ulong);
  237. return 1;
  238. }
  239. return 0;
  240. #endif
  241. }
  242. static inline int is_jump_ins(union mips_instruction *ip)
  243. {
  244. #ifdef CONFIG_CPU_MICROMIPS
  245. /*
  246. * jr16,jrc,jalr16,jalr16
  247. * jal
  248. * jalr/jr,jalr.hb/jr.hb,jalrs,jalrs.hb
  249. * jraddiusp - NOT SUPPORTED
  250. *
  251. * microMIPS is kind of more fun...
  252. */
  253. if (mm_insn_16bit(ip->halfword[1])) {
  254. if ((ip->mm16_r5_format.opcode == mm_pool16c_op &&
  255. (ip->mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op))
  256. return 1;
  257. return 0;
  258. }
  259. if (ip->j_format.opcode == mm_j32_op)
  260. return 1;
  261. if (ip->j_format.opcode == mm_jal32_op)
  262. return 1;
  263. if (ip->r_format.opcode != mm_pool32a_op ||
  264. ip->r_format.func != mm_pool32axf_op)
  265. return 0;
  266. return ((ip->u_format.uimmediate >> 6) & mm_jalr_op) == mm_jalr_op;
  267. #else
  268. if (ip->j_format.opcode == j_op)
  269. return 1;
  270. if (ip->j_format.opcode == jal_op)
  271. return 1;
  272. if (ip->r_format.opcode != spec_op)
  273. return 0;
  274. return ip->r_format.func == jalr_op || ip->r_format.func == jr_op;
  275. #endif
  276. }
  277. static inline int is_sp_move_ins(union mips_instruction *ip)
  278. {
  279. #ifdef CONFIG_CPU_MICROMIPS
  280. /*
  281. * addiusp -imm
  282. * addius5 sp,-imm
  283. * addiu32 sp,sp,-imm
  284. * jradiussp - NOT SUPPORTED
  285. *
  286. * microMIPS is not more fun...
  287. */
  288. if (mm_insn_16bit(ip->halfword[1])) {
  289. return (ip->mm16_r3_format.opcode == mm_pool16d_op &&
  290. ip->mm16_r3_format.simmediate && mm_addiusp_func) ||
  291. (ip->mm16_r5_format.opcode == mm_pool16d_op &&
  292. ip->mm16_r5_format.rt == 29);
  293. }
  294. return ip->mm_i_format.opcode == mm_addiu32_op &&
  295. ip->mm_i_format.rt == 29 && ip->mm_i_format.rs == 29;
  296. #else
  297. /* addiu/daddiu sp,sp,-imm */
  298. if (ip->i_format.rs != 29 || ip->i_format.rt != 29)
  299. return 0;
  300. if (ip->i_format.opcode == addiu_op || ip->i_format.opcode == daddiu_op)
  301. return 1;
  302. #endif
  303. return 0;
  304. }
  305. static int get_frame_info(struct mips_frame_info *info)
  306. {
  307. bool is_mmips = IS_ENABLED(CONFIG_CPU_MICROMIPS);
  308. union mips_instruction insn, *ip, *ip_end;
  309. const unsigned int max_insns = 128;
  310. unsigned int i;
  311. info->pc_offset = -1;
  312. info->frame_size = 0;
  313. ip = (void *)msk_isa16_mode((ulong)info->func);
  314. if (!ip)
  315. goto err;
  316. ip_end = (void *)ip + info->func_size;
  317. for (i = 0; i < max_insns && ip < ip_end; i++, ip++) {
  318. if (is_mmips && mm_insn_16bit(ip->halfword[0])) {
  319. insn.halfword[0] = 0;
  320. insn.halfword[1] = ip->halfword[0];
  321. } else if (is_mmips) {
  322. insn.halfword[0] = ip->halfword[1];
  323. insn.halfword[1] = ip->halfword[0];
  324. } else {
  325. insn.word = ip->word;
  326. }
  327. if (is_jump_ins(&insn))
  328. break;
  329. if (!info->frame_size) {
  330. if (is_sp_move_ins(&insn))
  331. {
  332. #ifdef CONFIG_CPU_MICROMIPS
  333. if (mm_insn_16bit(ip->halfword[0]))
  334. {
  335. unsigned short tmp;
  336. if (ip->halfword[0] & mm_addiusp_func)
  337. {
  338. tmp = (((ip->halfword[0] >> 1) & 0x1ff) << 2);
  339. info->frame_size = -(signed short)(tmp | ((tmp & 0x100) ? 0xfe00 : 0));
  340. } else {
  341. tmp = (ip->halfword[0] >> 1);
  342. info->frame_size = -(signed short)(tmp & 0xf);
  343. }
  344. ip = (void *) &ip->halfword[1];
  345. ip--;
  346. } else
  347. #endif
  348. info->frame_size = - ip->i_format.simmediate;
  349. }
  350. continue;
  351. }
  352. if (info->pc_offset == -1 &&
  353. is_ra_save_ins(&insn, &info->pc_offset))
  354. break;
  355. }
  356. if (info->frame_size && info->pc_offset >= 0) /* nested */
  357. return 0;
  358. if (info->pc_offset < 0) /* leaf */
  359. return 1;
  360. /* prologue seems bogus... */
  361. err:
  362. return -1;
  363. }
  364. static struct mips_frame_info schedule_mfi __read_mostly;
  365. #ifdef CONFIG_KALLSYMS
  366. static unsigned long get___schedule_addr(void)
  367. {
  368. return kallsyms_lookup_name("__schedule");
  369. }
  370. #else
  371. static unsigned long get___schedule_addr(void)
  372. {
  373. union mips_instruction *ip = (void *)schedule;
  374. int max_insns = 8;
  375. int i;
  376. for (i = 0; i < max_insns; i++, ip++) {
  377. if (ip->j_format.opcode == j_op)
  378. return J_TARGET(ip, ip->j_format.target);
  379. }
  380. return 0;
  381. }
  382. #endif
  383. static int __init frame_info_init(void)
  384. {
  385. unsigned long size = 0;
  386. #ifdef CONFIG_KALLSYMS
  387. unsigned long ofs;
  388. #endif
  389. unsigned long addr;
  390. addr = get___schedule_addr();
  391. if (!addr)
  392. addr = (unsigned long)schedule;
  393. #ifdef CONFIG_KALLSYMS
  394. kallsyms_lookup_size_offset(addr, &size, &ofs);
  395. #endif
  396. schedule_mfi.func = (void *)addr;
  397. schedule_mfi.func_size = size;
  398. get_frame_info(&schedule_mfi);
  399. /*
  400. * Without schedule() frame info, result given by
  401. * thread_saved_pc() and get_wchan() are not reliable.
  402. */
  403. if (schedule_mfi.pc_offset < 0)
  404. printk("Can't analyze schedule() prologue at %p\n", schedule);
  405. return 0;
  406. }
  407. arch_initcall(frame_info_init);
  408. /*
  409. * Return saved PC of a blocked thread.
  410. */
  411. unsigned long thread_saved_pc(struct task_struct *tsk)
  412. {
  413. struct thread_struct *t = &tsk->thread;
  414. /* New born processes are a special case */
  415. if (t->reg31 == (unsigned long) ret_from_fork)
  416. return t->reg31;
  417. if (schedule_mfi.pc_offset < 0)
  418. return 0;
  419. return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset];
  420. }
  421. #ifdef CONFIG_KALLSYMS
  422. /* generic stack unwinding function */
  423. unsigned long notrace unwind_stack_by_address(unsigned long stack_page,
  424. unsigned long *sp,
  425. unsigned long pc,
  426. unsigned long *ra)
  427. {
  428. unsigned long low, high, irq_stack_high;
  429. struct mips_frame_info info;
  430. unsigned long size, ofs;
  431. struct pt_regs *regs;
  432. int leaf;
  433. if (!stack_page)
  434. return 0;
  435. /*
  436. * IRQ stacks start at IRQ_STACK_START
  437. * task stacks at THREAD_SIZE - 32
  438. */
  439. low = stack_page;
  440. if (!preemptible() && on_irq_stack(raw_smp_processor_id(), *sp)) {
  441. high = stack_page + IRQ_STACK_START;
  442. irq_stack_high = high;
  443. } else {
  444. high = stack_page + THREAD_SIZE - 32;
  445. irq_stack_high = 0;
  446. }
  447. /*
  448. * If we reached the top of the interrupt stack, start unwinding
  449. * the interrupted task stack.
  450. */
  451. if (unlikely(*sp == irq_stack_high)) {
  452. unsigned long task_sp = *(unsigned long *)*sp;
  453. /*
  454. * Check that the pointer saved in the IRQ stack head points to
  455. * something within the stack of the current task
  456. */
  457. if (!object_is_on_stack((void *)task_sp))
  458. return 0;
  459. /*
  460. * Follow pointer to tasks kernel stack frame where interrupted
  461. * state was saved.
  462. */
  463. regs = (struct pt_regs *)task_sp;
  464. pc = regs->cp0_epc;
  465. if (!user_mode(regs) && __kernel_text_address(pc)) {
  466. *sp = regs->regs[29];
  467. *ra = regs->regs[31];
  468. return pc;
  469. }
  470. return 0;
  471. }
  472. if (!kallsyms_lookup_size_offset(pc, &size, &ofs))
  473. return 0;
  474. /*
  475. * Return ra if an exception occurred at the first instruction
  476. */
  477. if (unlikely(ofs == 0)) {
  478. pc = *ra;
  479. *ra = 0;
  480. return pc;
  481. }
  482. info.func = (void *)(pc - ofs);
  483. info.func_size = ofs; /* analyze from start to ofs */
  484. leaf = get_frame_info(&info);
  485. if (leaf < 0)
  486. return 0;
  487. if (*sp < low || *sp + info.frame_size > high)
  488. return 0;
  489. if (leaf)
  490. /*
  491. * For some extreme cases, get_frame_info() can
  492. * consider wrongly a nested function as a leaf
  493. * one. In that cases avoid to return always the
  494. * same value.
  495. */
  496. pc = pc != *ra ? *ra : 0;
  497. else
  498. pc = ((unsigned long *)(*sp))[info.pc_offset];
  499. *sp += info.frame_size;
  500. *ra = 0;
  501. return __kernel_text_address(pc) ? pc : 0;
  502. }
  503. EXPORT_SYMBOL(unwind_stack_by_address);
  504. /* used by show_backtrace() */
  505. unsigned long unwind_stack(struct task_struct *task, unsigned long *sp,
  506. unsigned long pc, unsigned long *ra)
  507. {
  508. unsigned long stack_page = 0;
  509. int cpu;
  510. for_each_possible_cpu(cpu) {
  511. if (on_irq_stack(cpu, *sp)) {
  512. stack_page = (unsigned long)irq_stack[cpu];
  513. break;
  514. }
  515. }
  516. if (!stack_page)
  517. stack_page = (unsigned long)task_stack_page(task);
  518. return unwind_stack_by_address(stack_page, sp, pc, ra);
  519. }
  520. #endif
  521. /*
  522. * get_wchan - a maintenance nightmare^W^Wpain in the ass ...
  523. */
  524. unsigned long get_wchan(struct task_struct *task)
  525. {
  526. unsigned long pc = 0;
  527. #ifdef CONFIG_KALLSYMS
  528. unsigned long sp;
  529. unsigned long ra = 0;
  530. #endif
  531. if (!task || task == current || task->state == TASK_RUNNING)
  532. goto out;
  533. if (!task_stack_page(task))
  534. goto out;
  535. pc = thread_saved_pc(task);
  536. #ifdef CONFIG_KALLSYMS
  537. sp = task->thread.reg29 + schedule_mfi.frame_size;
  538. while (in_sched_functions(pc))
  539. pc = unwind_stack(task, &sp, pc, &ra);
  540. #endif
  541. out:
  542. return pc;
  543. }
  544. /*
  545. * Don't forget that the stack pointer must be aligned on a 8 bytes
  546. * boundary for 32-bits ABI and 16 bytes for 64-bits ABI.
  547. */
  548. unsigned long arch_align_stack(unsigned long sp)
  549. {
  550. if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
  551. sp -= get_random_int() & ~PAGE_MASK;
  552. return sp & ALMASK;
  553. }
  554. static void arch_dump_stack(void *info)
  555. {
  556. struct pt_regs *regs;
  557. regs = get_irq_regs();
  558. if (regs)
  559. show_regs(regs);
  560. dump_stack();
  561. }
  562. void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self)
  563. {
  564. long this_cpu = get_cpu();
  565. if (cpumask_test_cpu(this_cpu, mask) && !exclude_self)
  566. dump_stack();
  567. smp_call_function_many(mask, arch_dump_stack, NULL, 1);
  568. put_cpu();
  569. }
  570. int mips_get_process_fp_mode(struct task_struct *task)
  571. {
  572. int value = 0;
  573. if (!test_tsk_thread_flag(task, TIF_32BIT_FPREGS))
  574. value |= PR_FP_MODE_FR;
  575. if (test_tsk_thread_flag(task, TIF_HYBRID_FPREGS))
  576. value |= PR_FP_MODE_FRE;
  577. return value;
  578. }
  579. static void prepare_for_fp_mode_switch(void *info)
  580. {
  581. struct mm_struct *mm = info;
  582. if (current->mm == mm)
  583. lose_fpu(1);
  584. }
  585. int mips_set_process_fp_mode(struct task_struct *task, unsigned int value)
  586. {
  587. const unsigned int known_bits = PR_FP_MODE_FR | PR_FP_MODE_FRE;
  588. struct task_struct *t;
  589. int max_users;
  590. /* Check the value is valid */
  591. if (value & ~known_bits)
  592. return -EOPNOTSUPP;
  593. /* Avoid inadvertently triggering emulation */
  594. if ((value & PR_FP_MODE_FR) && raw_cpu_has_fpu &&
  595. !(raw_current_cpu_data.fpu_id & MIPS_FPIR_F64))
  596. return -EOPNOTSUPP;
  597. if ((value & PR_FP_MODE_FRE) && raw_cpu_has_fpu && !cpu_has_fre)
  598. return -EOPNOTSUPP;
  599. /* FR = 0 not supported in MIPS R6 */
  600. if (!(value & PR_FP_MODE_FR) && raw_cpu_has_fpu && cpu_has_mips_r6)
  601. return -EOPNOTSUPP;
  602. /* Proceed with the mode switch */
  603. preempt_disable();
  604. /* Save FP & vector context, then disable FPU & MSA */
  605. if (task->signal == current->signal)
  606. lose_fpu(1);
  607. /* Prevent any threads from obtaining live FP context */
  608. atomic_set(&task->mm->context.fp_mode_switching, 1);
  609. smp_mb__after_atomic();
  610. /*
  611. * If there are multiple online CPUs then force any which are running
  612. * threads in this process to lose their FPU context, which they can't
  613. * regain until fp_mode_switching is cleared later.
  614. */
  615. if (num_online_cpus() > 1) {
  616. /* No need to send an IPI for the local CPU */
  617. max_users = (task->mm == current->mm) ? 1 : 0;
  618. if (atomic_read(&current->mm->mm_users) > max_users)
  619. smp_call_function(prepare_for_fp_mode_switch,
  620. (void *)current->mm, 1);
  621. }
  622. /*
  623. * There are now no threads of the process with live FP context, so it
  624. * is safe to proceed with the FP mode switch.
  625. */
  626. for_each_thread(task, t) {
  627. /* Update desired FP register width */
  628. if (value & PR_FP_MODE_FR) {
  629. clear_tsk_thread_flag(t, TIF_32BIT_FPREGS);
  630. } else {
  631. set_tsk_thread_flag(t, TIF_32BIT_FPREGS);
  632. clear_tsk_thread_flag(t, TIF_MSA_CTX_LIVE);
  633. }
  634. /* Update desired FP single layout */
  635. if (value & PR_FP_MODE_FRE)
  636. set_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
  637. else
  638. clear_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
  639. }
  640. /* Allow threads to use FP again */
  641. atomic_set(&task->mm->context.fp_mode_switching, 0);
  642. preempt_enable();
  643. return 0;
  644. }