pci-test-function.txt 2.0 KB

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  1. PCI TEST
  2. Kishon Vijay Abraham I <kishon@ti.com>
  3. Traditionally PCI RC has always been validated by using standard
  4. PCI cards like ethernet PCI cards or USB PCI cards or SATA PCI cards.
  5. However with the addition of EP-core in linux kernel, it is possible
  6. to configure a PCI controller that can operate in EP mode to work as
  7. a test device.
  8. The PCI endpoint test device is a virtual device (defined in software)
  9. used to test the endpoint functionality and serve as a sample driver
  10. for other PCI endpoint devices (to use the EP framework).
  11. The PCI endpoint test device has the following registers:
  12. 1) PCI_ENDPOINT_TEST_MAGIC
  13. 2) PCI_ENDPOINT_TEST_COMMAND
  14. 3) PCI_ENDPOINT_TEST_STATUS
  15. 4) PCI_ENDPOINT_TEST_SRC_ADDR
  16. 5) PCI_ENDPOINT_TEST_DST_ADDR
  17. 6) PCI_ENDPOINT_TEST_SIZE
  18. 7) PCI_ENDPOINT_TEST_CHECKSUM
  19. *) PCI_ENDPOINT_TEST_MAGIC
  20. This register will be used to test BAR0. A known pattern will be written
  21. and read back from MAGIC register to verify BAR0.
  22. *) PCI_ENDPOINT_TEST_COMMAND:
  23. This register will be used by the host driver to indicate the function
  24. that the endpoint device must perform.
  25. Bitfield Description:
  26. Bit 0 : raise legacy irq
  27. Bit 1 : raise MSI irq
  28. Bit 2 - 7 : MSI interrupt number
  29. Bit 8 : read command (read data from RC buffer)
  30. Bit 9 : write command (write data to RC buffer)
  31. Bit 10 : copy command (copy data from one RC buffer to another
  32. RC buffer)
  33. *) PCI_ENDPOINT_TEST_STATUS
  34. This register reflects the status of the PCI endpoint device.
  35. Bitfield Description:
  36. Bit 0 : read success
  37. Bit 1 : read fail
  38. Bit 2 : write success
  39. Bit 3 : write fail
  40. Bit 4 : copy success
  41. Bit 5 : copy fail
  42. Bit 6 : irq raised
  43. Bit 7 : source address is invalid
  44. Bit 8 : destination address is invalid
  45. *) PCI_ENDPOINT_TEST_SRC_ADDR
  46. This register contains the source address (RC buffer address) for the
  47. COPY/READ command.
  48. *) PCI_ENDPOINT_TEST_DST_ADDR
  49. This register contains the destination address (RC buffer address) for
  50. the COPY/WRITE command.