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  1. <html><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8"><title>Chapter 8.  Serial Drivers</title><meta name="generator" content="DocBook XSL Stylesheets V1.76.1"><meta name="keywords" content="Intellon, Atheros, Qualcomm, HomePlug, powerline, communications, INT6000, INT6300, INT6400, AR7400, AR7420"><link rel="home" href="index.html" title="Qualcomm Atheros Open Powerline Toolkit"><link rel="up" href="index.html" title="Qualcomm Atheros Open Powerline Toolkit"><link rel="prev" href="ch07s12.html" title="SLAC Functions and Variables"><link rel="next" href="ch08s02.html" title="Principles of Operation"></head><body bgcolor="white" text="black" link="#0000FF" vlink="#840084" alink="#0000FF"><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Chapter 8. 
  2. Serial Drivers
  3. </th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ch07s12.html">Prev</a> </td><th width="60%" align="center"> </th><td width="20%" align="right"> <a accesskey="n" href="ch08s02.html">Next</a></td></tr></table><hr></div><div class="chapter" title="Chapter 8.  Serial Drivers"><div class="titlepage"><div><div><h2 class="title"><a name="driver-spi"></a>Chapter 8. 
  4. Serial Drivers
  5. </h2></div></div></div><div class="toc"><p><b>Table of Contents</b></p><dl><dt><span class="section"><a href="ch08.html#driver-spi-intro">
  6. Introduction
  7. </a></span></dt><dt><span class="section"><a href="ch08s02.html">
  8. Principles of Operation
  9. </a></span></dt><dt><span class="section"><a href="ch08s03.html">
  10. SPI Serial Driver
  11. </a></span></dt><dd><dl><dt><span class="section"><a href="ch08s03.html#qcaspi_spi_thread">
  12. qcaspi_spi_thread
  13. </a></span></dt><dt><span class="section"><a href="ch08s03.html#qcaspi_qca7k_sync">
  14. qcaspi_qca7k_sync
  15. </a></span></dt></dl></dd><dt><span class="section"><a href="ch08s04.html">
  16. Register Functions
  17. </a></span></dt><dd><dl><dt><span class="section"><a href="ch08s04.html#qcaspi_read_register">
  18. qcaspi_read_register
  19. </a></span></dt><dt><span class="section"><a href="ch08s04.html#qcaspi_write_register">
  20. qcaspi_write_register
  21. </a></span></dt><dt><span class="section"><a href="ch08s04.html#qcaspi_tx_cmd">
  22. qcaspi_tx_cmd
  23. </a></span></dt></dl></dd><dt><span class="section"><a href="ch08s05.html">
  24. Interrupt Functions
  25. </a></span></dt><dd><dl><dt><span class="section"><a href="ch08s05.html#disable_spi_interrupts">
  26. disable_spi_interrupts
  27. </a></span></dt><dt><span class="section"><a href="ch08s05.html#enable_spi_interrupts">
  28. enable_spi_interrupts
  29. </a></span></dt><dt><span class="section"><a href="ch08s05.html#qcaspi_intr_handler">
  30. qcaspi_intr_handler
  31. </a></span></dt></dl></dd><dt><span class="section"><a href="ch08s06.html">
  32. Transmit Functions
  33. </a></span></dt><dd><dl><dt><span class="section"><a href="ch08s06.html#qcaspi_transmit">
  34. qcaspi_transmit
  35. </a></span></dt><dt><span class="section"><a href="ch08s06.html#qcaspi_tx_frame">
  36. qcaspi_tx_frame
  37. </a></span></dt><dt><span class="section"><a href="ch08s06.html#qcaspi_flush_txq">
  38. qcaspi_flush_txq
  39. </a></span></dt></dl></dd><dt><span class="section"><a href="ch08s07.html">
  40. Receive Functions
  41. </a></span></dt><dd><dl><dt><span class="section"><a href="ch08s07.html#qcaspi_receive">
  42. qcaspi_receive
  43. </a></span></dt></dl></dd><dt><span class="section"><a href="ch08s08.html">
  44. DMA Functions
  45. </a></span></dt><dd><dl><dt><span class="section"><a href="ch08s08.html#qcaspi_dma_read_burst">
  46. qcaspi_dma_read_burst
  47. </a></span></dt><dt><span class="section"><a href="ch08s08.html#qcaspi_dma_read_legacy">
  48. qcaspi_dma_read_legacy
  49. </a></span></dt><dt><span class="section"><a href="ch08s08.html#qcaspi_dma_write_burst">
  50. qcaspi_dma_write_burst
  51. </a></span></dt><dt><span class="section"><a href="ch08s08.html#qcaspi_dma_write_legacy">
  52. qcaspi_dma_write_legacy
  53. </a></span></dt></dl></dd><dt><span class="section"><a href="ch08s09.html">
  54. Support Functions
  55. </a></span></dt><dd><dl><dt><span class="section"><a href="ch08s09.html#QcaFrmCreateHeader">
  56. QcaFrmCreateHeader
  57. </a></span></dt><dt><span class="section"><a href="ch08s09.html#QcaFrmCreateFooter">
  58. QcaFrmCreateFooter
  59. </a></span></dt><dt><span class="section"><a href="ch08s09.html#QcaFrmFsmInit">
  60. QcaFrmFsmInit
  61. </a></span></dt><dt><span class="section"><a href="ch08s09.html#QcaFrmFsmDecode">
  62. QcaFrmFsmDecode
  63. </a></span></dt></dl></dd><dt><span class="section"><a href="ch08s10.html">
  64. Kernel Functions
  65. </a></span></dt><dd><dl><dt><span class="section"><a href="ch08s10.html#qcaspi_netdev_xmit">
  66. qcaspi_netdev_xmit
  67. </a></span></dt><dt><span class="section"><a href="ch08s10.html#qcaspi_netdev_tx_timeout">
  68. qcaspi_netdev_tx_timeout
  69. </a></span></dt><dt><span class="section"><a href="ch08s10.html#qcaspi_netdev_uninit">
  70. qcaspi_netdev_uninit
  71. </a></span></dt><dt><span class="section"><a href="ch08s10.html#qcaspi_netdev_get_stats">
  72. qcaspi_netdev_get_stats
  73. </a></span></dt><dt><span class="section"><a href="ch08s10.html#qcaspi_netdev_change_mtu">
  74. qcaspi_netdev_change_mtu
  75. </a></span></dt><dt><span class="section"><a href="ch08s10.html#qcaspi_netdev_set_mac_address">
  76. qcaspi_netdev_set_mac_address
  77. </a></span></dt><dt><span class="section"><a href="ch08s10.html#qcaspi_netdev_close">
  78. qcaspi_netdev_close
  79. </a></span></dt><dt><span class="section"><a href="ch08s10.html#qcaspi_mod_exit">
  80. qcaspi_mod_exit
  81. </a></span></dt></dl></dd></dl></div><div class="section" title="Introduction"><div class="titlepage"><div><div><h2 class="title" style="clear: both"><a name="driver-spi-intro"></a>
  82. Introduction
  83. </h2></div></div></div><p>
  84. Most Qualcomm Atheros PLC chipsets are Ethernet-to-Powerline bridges but the QCA7000 is a Serial-to-Powerline bridge, ... with a big difference. The QCA7000 expects the host serial stream to be segmented into Ethernet frames where each frame is encapsulated by a distinct serial header and trailer. This means the host can format and transmit, or receive and decode, standard Ethernet 802.3 frames over an ordinary SPI or UART interface thereby enabling full Ethernet or Internet protocol communications over powerline at low cost and low speed. The enabling component here is an Ethernet-to-Serial driver that supports the SPI or UART interface connected to the QCA7000. This section covers such a driver.
  85. </p><p>
  86. The example driver described here was written for the Freescale iMX28 board support package running a custom Freescale Linux distribution. As such, we believe that this driver is suitable for the iMX28 processor out of the box but it could be adapted to other processors.
  87. </p></div></div><div class="navfooter"><hr><table width="100%" summary="Navigation footer"><tr><td width="40%" align="left"><a accesskey="p" href="ch07s12.html">Prev</a> </td><td width="20%" align="center"> </td><td width="40%" align="right"> <a accesskey="n" href="ch08s02.html">Next</a></td></tr><tr><td width="40%" align="left" valign="top">
  88. SLAC Functions and Variables
  89.  </td><td width="20%" align="center"><a accesskey="h" href="index.html">Home</a></td><td width="40%" align="right" valign="top"> 
  90. Principles of Operation
  91. </td></tr></table></div></body></html>