libata.h 17 KB

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  1. /*
  2. * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
  3. * Copyright 2003-2004 Jeff Garzik
  4. * Copyright (C) 2008 Freescale Semiconductor, Inc.
  5. * Dave Liu <daveliu@freescale.com>
  6. * port from libata of linux kernel
  7. *
  8. * SPDX-License-Identifier: GPL-2.0+
  9. */
  10. #ifndef __LIBATA_H__
  11. #define __LIBATA_H__
  12. #include <common.h>
  13. enum {
  14. /* various global constants */
  15. ATA_MAX_DEVICES = 2, /* per bus/port */
  16. ATA_MAX_PRD = 256, /* we could make these 256/256 */
  17. ATA_SECT_SIZE = 512,
  18. ATA_MAX_SECTORS_128 = 128,
  19. ATA_MAX_SECTORS = 256,
  20. ATA_MAX_SECTORS_LBA48 = 65535,
  21. ATA_MAX_SECTORS_TAPE = 65535,
  22. ATA_ID_WORDS = 256,
  23. ATA_ID_SERNO = 10,
  24. ATA_ID_FW_REV = 23,
  25. ATA_ID_PROD = 27,
  26. ATA_ID_OLD_PIO_MODES = 51,
  27. ATA_ID_FIELD_VALID = 53,
  28. ATA_ID_LBA_SECTORS = 60,
  29. ATA_ID_MWDMA_MODES = 63,
  30. ATA_ID_PIO_MODES = 64,
  31. ATA_ID_EIDE_DMA_MIN = 65,
  32. ATA_ID_EIDE_PIO = 67,
  33. ATA_ID_EIDE_PIO_IORDY = 68,
  34. ATA_ID_PIO4 = (1 << 1),
  35. ATA_ID_QUEUE_DEPTH = 75,
  36. ATA_ID_SATA_CAP = 76,
  37. ATA_ID_SATA_FEATURES = 78,
  38. ATA_ID_SATA_FEATURES_EN = 79,
  39. ATA_ID_MAJOR_VER = 80,
  40. ATA_ID_MINOR_VER = 81,
  41. ATA_ID_UDMA_MODES = 88,
  42. ATA_ID_LBA48_SECTORS = 100,
  43. ATA_ID_SERNO_LEN = 20,
  44. ATA_ID_FW_REV_LEN = 8,
  45. ATA_ID_PROD_LEN = 40,
  46. ATA_PCI_CTL_OFS = 2,
  47. ATA_PIO0 = (1 << 0),
  48. ATA_PIO1 = ATA_PIO0 | (1 << 1),
  49. ATA_PIO2 = ATA_PIO1 | (1 << 2),
  50. ATA_PIO3 = ATA_PIO2 | (1 << 3),
  51. ATA_PIO4 = ATA_PIO3 | (1 << 4),
  52. ATA_PIO5 = ATA_PIO4 | (1 << 5),
  53. ATA_PIO6 = ATA_PIO5 | (1 << 6),
  54. ATA_SWDMA0 = (1 << 0),
  55. ATA_SWDMA1 = ATA_SWDMA0 | (1 << 1),
  56. ATA_SWDMA2 = ATA_SWDMA1 | (1 << 2),
  57. ATA_SWDMA2_ONLY = (1 << 2),
  58. ATA_MWDMA0 = (1 << 0),
  59. ATA_MWDMA1 = ATA_MWDMA0 | (1 << 1),
  60. ATA_MWDMA2 = ATA_MWDMA1 | (1 << 2),
  61. ATA_MWDMA12_ONLY = (1 << 1) | (1 << 2),
  62. ATA_MWDMA2_ONLY = (1 << 2),
  63. ATA_UDMA0 = (1 << 0),
  64. ATA_UDMA1 = ATA_UDMA0 | (1 << 1),
  65. ATA_UDMA2 = ATA_UDMA1 | (1 << 2),
  66. ATA_UDMA3 = ATA_UDMA2 | (1 << 3),
  67. ATA_UDMA4 = ATA_UDMA3 | (1 << 4),
  68. ATA_UDMA5 = ATA_UDMA4 | (1 << 5),
  69. ATA_UDMA6 = ATA_UDMA5 | (1 << 6),
  70. ATA_UDMA7 = ATA_UDMA6 | (1 << 7),
  71. /* ATA_UDMA7 is just for completeness... doesn't exist (yet?). */
  72. ATA_UDMA_MASK_40C = ATA_UDMA2, /* udma0-2 */
  73. /* DMA-related */
  74. ATA_PRD_SZ = 8,
  75. ATA_PRD_TBL_SZ = (ATA_MAX_PRD * ATA_PRD_SZ),
  76. ATA_PRD_EOT = (1 << 31), /* end-of-table flag */
  77. ATA_DMA_TABLE_OFS = 4,
  78. ATA_DMA_STATUS = 2,
  79. ATA_DMA_CMD = 0,
  80. ATA_DMA_WR = (1 << 3),
  81. ATA_DMA_START = (1 << 0),
  82. ATA_DMA_INTR = (1 << 2),
  83. ATA_DMA_ERR = (1 << 1),
  84. ATA_DMA_ACTIVE = (1 << 0),
  85. /* bits in ATA command block registers */
  86. ATA_HOB = (1 << 7), /* LBA48 selector */
  87. ATA_NIEN = (1 << 1), /* disable-irq flag */
  88. ATA_LBA = (1 << 6), /* LBA28 selector */
  89. ATA_DEV1 = (1 << 4), /* Select Device 1 (slave) */
  90. ATA_DEVICE_OBS = (1 << 7) | (1 << 5), /* obs bits in dev reg */
  91. ATA_DEVCTL_OBS = (1 << 3), /* obsolete bit in devctl reg */
  92. ATA_BUSY = (1 << 7), /* BSY status bit */
  93. ATA_DRDY = (1 << 6), /* device ready */
  94. ATA_DF = (1 << 5), /* device fault */
  95. ATA_DRQ = (1 << 3), /* data request i/o */
  96. ATA_ERR = (1 << 0), /* have an error */
  97. ATA_SRST = (1 << 2), /* software reset */
  98. ATA_ICRC = (1 << 7), /* interface CRC error */
  99. ATA_UNC = (1 << 6), /* uncorrectable media error */
  100. ATA_IDNF = (1 << 4), /* ID not found */
  101. ATA_ABORTED = (1 << 2), /* command aborted */
  102. /* ATA command block registers */
  103. ATA_REG_DATA = 0x00,
  104. ATA_REG_ERR = 0x01,
  105. ATA_REG_NSECT = 0x02,
  106. ATA_REG_LBAL = 0x03,
  107. ATA_REG_LBAM = 0x04,
  108. ATA_REG_LBAH = 0x05,
  109. ATA_REG_DEVICE = 0x06,
  110. ATA_REG_STATUS = 0x07,
  111. ATA_REG_FEATURE = ATA_REG_ERR, /* and their aliases */
  112. ATA_REG_CMD = ATA_REG_STATUS,
  113. ATA_REG_BYTEL = ATA_REG_LBAM,
  114. ATA_REG_BYTEH = ATA_REG_LBAH,
  115. ATA_REG_DEVSEL = ATA_REG_DEVICE,
  116. ATA_REG_IRQ = ATA_REG_NSECT,
  117. /* ATA device commands */
  118. ATA_CMD_DEV_RESET = 0x08, /* ATAPI device reset */
  119. ATA_CMD_CHK_POWER = 0xE5, /* check power mode */
  120. ATA_CMD_STANDBY = 0xE2, /* place in standby power mode */
  121. ATA_CMD_IDLE = 0xE3, /* place in idle power mode */
  122. ATA_CMD_EDD = 0x90, /* execute device diagnostic */
  123. ATA_CMD_FLUSH = 0xE7,
  124. ATA_CMD_FLUSH_EXT = 0xEA,
  125. ATA_CMD_ID_ATA = 0xEC,
  126. ATA_CMD_ID_ATAPI = 0xA1,
  127. ATA_CMD_READ = 0xC8,
  128. ATA_CMD_READ_EXT = 0x25,
  129. ATA_CMD_WRITE = 0xCA,
  130. ATA_CMD_WRITE_EXT = 0x35,
  131. ATA_CMD_WRITE_FUA_EXT = 0x3D,
  132. ATA_CMD_FPDMA_READ = 0x60,
  133. ATA_CMD_FPDMA_WRITE = 0x61,
  134. ATA_CMD_PIO_READ = 0x20,
  135. ATA_CMD_PIO_READ_EXT = 0x24,
  136. ATA_CMD_PIO_WRITE = 0x30,
  137. ATA_CMD_PIO_WRITE_EXT = 0x34,
  138. ATA_CMD_READ_MULTI = 0xC4,
  139. ATA_CMD_READ_MULTI_EXT = 0x29,
  140. ATA_CMD_WRITE_MULTI = 0xC5,
  141. ATA_CMD_WRITE_MULTI_EXT = 0x39,
  142. ATA_CMD_WRITE_MULTI_FUA_EXT = 0xCE,
  143. ATA_CMD_SET_FEATURES = 0xEF,
  144. ATA_CMD_SET_MULTI = 0xC6,
  145. ATA_CMD_PACKET = 0xA0,
  146. ATA_CMD_VERIFY = 0x40,
  147. ATA_CMD_VERIFY_EXT = 0x42,
  148. ATA_CMD_STANDBYNOW1 = 0xE0,
  149. ATA_CMD_IDLEIMMEDIATE = 0xE1,
  150. ATA_CMD_SLEEP = 0xE6,
  151. ATA_CMD_INIT_DEV_PARAMS = 0x91,
  152. ATA_CMD_READ_NATIVE_MAX = 0xF8,
  153. ATA_CMD_READ_NATIVE_MAX_EXT = 0x27,
  154. ATA_CMD_SET_MAX = 0xF9,
  155. ATA_CMD_SET_MAX_EXT = 0x37,
  156. ATA_CMD_READ_LOG_EXT = 0x2f,
  157. ATA_CMD_PMP_READ = 0xE4,
  158. ATA_CMD_PMP_WRITE = 0xE8,
  159. ATA_CMD_CONF_OVERLAY = 0xB1,
  160. ATA_CMD_SEC_FREEZE_LOCK = 0xF5,
  161. /* READ_LOG_EXT pages */
  162. ATA_LOG_SATA_NCQ = 0x10,
  163. /* READ/WRITE LONG (obsolete) */
  164. ATA_CMD_READ_LONG = 0x22,
  165. ATA_CMD_READ_LONG_ONCE = 0x23,
  166. ATA_CMD_WRITE_LONG = 0x32,
  167. ATA_CMD_WRITE_LONG_ONCE = 0x33,
  168. /* SETFEATURES stuff */
  169. SETFEATURES_XFER = 0x03,
  170. XFER_UDMA_7 = 0x47,
  171. XFER_UDMA_6 = 0x46,
  172. XFER_UDMA_5 = 0x45,
  173. XFER_UDMA_4 = 0x44,
  174. XFER_UDMA_3 = 0x43,
  175. XFER_UDMA_2 = 0x42,
  176. XFER_UDMA_1 = 0x41,
  177. XFER_UDMA_0 = 0x40,
  178. XFER_MW_DMA_4 = 0x24, /* CFA only */
  179. XFER_MW_DMA_3 = 0x23, /* CFA only */
  180. XFER_MW_DMA_2 = 0x22,
  181. XFER_MW_DMA_1 = 0x21,
  182. XFER_MW_DMA_0 = 0x20,
  183. XFER_SW_DMA_2 = 0x12,
  184. XFER_SW_DMA_1 = 0x11,
  185. XFER_SW_DMA_0 = 0x10,
  186. XFER_PIO_6 = 0x0E, /* CFA only */
  187. XFER_PIO_5 = 0x0D, /* CFA only */
  188. XFER_PIO_4 = 0x0C,
  189. XFER_PIO_3 = 0x0B,
  190. XFER_PIO_2 = 0x0A,
  191. XFER_PIO_1 = 0x09,
  192. XFER_PIO_0 = 0x08,
  193. XFER_PIO_SLOW = 0x00,
  194. SETFEATURES_WC_ON = 0x02, /* Enable write cache */
  195. SETFEATURES_WC_OFF = 0x82, /* Disable write cache */
  196. SETFEATURES_SPINUP = 0x07, /* Spin-up drive */
  197. SETFEATURES_SATA_ENABLE = 0x10, /* Enable use of SATA feature */
  198. SETFEATURES_SATA_DISABLE = 0x90, /* Disable use of SATA feature */
  199. /* SETFEATURE Sector counts for SATA features */
  200. SATA_AN = 0x05, /* Asynchronous Notification */
  201. SATA_DIPM = 0x03, /* Device Initiated Power Management */
  202. /* feature values for SET_MAX */
  203. ATA_SET_MAX_ADDR = 0x00,
  204. ATA_SET_MAX_PASSWD = 0x01,
  205. ATA_SET_MAX_LOCK = 0x02,
  206. ATA_SET_MAX_UNLOCK = 0x03,
  207. ATA_SET_MAX_FREEZE_LOCK = 0x04,
  208. /* feature values for DEVICE CONFIGURATION OVERLAY */
  209. ATA_DCO_RESTORE = 0xC0,
  210. ATA_DCO_FREEZE_LOCK = 0xC1,
  211. ATA_DCO_IDENTIFY = 0xC2,
  212. ATA_DCO_SET = 0xC3,
  213. /* ATAPI stuff */
  214. ATAPI_PKT_DMA = (1 << 0),
  215. ATAPI_DMADIR = (1 << 2), /* ATAPI data dir:
  216. 0=to device, 1=to host */
  217. ATAPI_CDB_LEN = 16,
  218. /* PMP stuff */
  219. SATA_PMP_MAX_PORTS = 15,
  220. SATA_PMP_CTRL_PORT = 15,
  221. SATA_PMP_GSCR_DWORDS = 128,
  222. SATA_PMP_GSCR_PROD_ID = 0,
  223. SATA_PMP_GSCR_REV = 1,
  224. SATA_PMP_GSCR_PORT_INFO = 2,
  225. SATA_PMP_GSCR_ERROR = 32,
  226. SATA_PMP_GSCR_ERROR_EN = 33,
  227. SATA_PMP_GSCR_FEAT = 64,
  228. SATA_PMP_GSCR_FEAT_EN = 96,
  229. SATA_PMP_PSCR_STATUS = 0,
  230. SATA_PMP_PSCR_ERROR = 1,
  231. SATA_PMP_PSCR_CONTROL = 2,
  232. SATA_PMP_FEAT_BIST = (1 << 0),
  233. SATA_PMP_FEAT_PMREQ = (1 << 1),
  234. SATA_PMP_FEAT_DYNSSC = (1 << 2),
  235. SATA_PMP_FEAT_NOTIFY = (1 << 3),
  236. /* cable types */
  237. ATA_CBL_NONE = 0,
  238. ATA_CBL_PATA40 = 1,
  239. ATA_CBL_PATA80 = 2,
  240. ATA_CBL_PATA40_SHORT = 3, /* 40 wire cable to high UDMA spec */
  241. ATA_CBL_PATA_UNK = 4, /* don't know, maybe 80c? */
  242. ATA_CBL_PATA_IGN = 5, /* don't know, ignore cable handling */
  243. ATA_CBL_SATA = 6,
  244. /* SATA Status and Control Registers */
  245. SCR_STATUS = 0,
  246. SCR_ERROR = 1,
  247. SCR_CONTROL = 2,
  248. SCR_ACTIVE = 3,
  249. SCR_NOTIFICATION = 4,
  250. /* SError bits */
  251. SERR_DATA_RECOVERED = (1 << 0), /* recovered data error */
  252. SERR_COMM_RECOVERED = (1 << 1), /* recovered comm failure */
  253. SERR_DATA = (1 << 8), /* unrecovered data error */
  254. SERR_PERSISTENT = (1 << 9), /* persistent data/comm error */
  255. SERR_PROTOCOL = (1 << 10), /* protocol violation */
  256. SERR_INTERNAL = (1 << 11), /* host internal error */
  257. SERR_PHYRDY_CHG = (1 << 16), /* PHY RDY changed */
  258. SERR_PHY_INT_ERR = (1 << 17), /* PHY internal error */
  259. SERR_COMM_WAKE = (1 << 18), /* Comm wake */
  260. SERR_10B_8B_ERR = (1 << 19), /* 10b to 8b decode error */
  261. SERR_DISPARITY = (1 << 20), /* Disparity */
  262. SERR_CRC = (1 << 21), /* CRC error */
  263. SERR_HANDSHAKE = (1 << 22), /* Handshake error */
  264. SERR_LINK_SEQ_ERR = (1 << 23), /* Link sequence error */
  265. SERR_TRANS_ST_ERROR = (1 << 24), /* Transport state trans. error */
  266. SERR_UNRECOG_FIS = (1 << 25), /* Unrecognized FIS */
  267. SERR_DEV_XCHG = (1 << 26), /* device exchanged */
  268. /* struct ata_taskfile flags */
  269. ATA_TFLAG_LBA48 = (1 << 0), /* enable 48-bit LBA and "HOB" */
  270. ATA_TFLAG_ISADDR = (1 << 1), /* enable r/w to nsect/lba regs */
  271. ATA_TFLAG_DEVICE = (1 << 2), /* enable r/w to device reg */
  272. ATA_TFLAG_WRITE = (1 << 3), /* data dir: host->dev==1 (write) */
  273. ATA_TFLAG_LBA = (1 << 4), /* enable LBA */
  274. ATA_TFLAG_FUA = (1 << 5), /* enable FUA */
  275. ATA_TFLAG_POLLING = (1 << 6), /* set nIEN to 1 and use polling */
  276. /* protocol flags */
  277. ATA_PROT_FLAG_PIO = (1 << 0), /* is PIO */
  278. ATA_PROT_FLAG_DMA = (1 << 1), /* is DMA */
  279. ATA_PROT_FLAG_DATA = ATA_PROT_FLAG_PIO | ATA_PROT_FLAG_DMA,
  280. ATA_PROT_FLAG_NCQ = (1 << 2), /* is NCQ */
  281. ATA_PROT_FLAG_ATAPI = (1 << 3), /* is ATAPI */
  282. };
  283. enum ata_tf_protocols {
  284. /* ATA taskfile protocols */
  285. ATA_PROT_UNKNOWN, /* unknown/invalid */
  286. ATA_PROT_NODATA, /* no data */
  287. ATA_PROT_PIO, /* PIO data xfer */
  288. ATA_PROT_DMA, /* DMA */
  289. ATA_PROT_NCQ, /* NCQ */
  290. ATAPI_PROT_NODATA, /* packet command, no data */
  291. ATAPI_PROT_PIO, /* packet command, PIO data xfer*/
  292. ATAPI_PROT_DMA, /* packet command with special DMA sauce */
  293. };
  294. enum ata_ioctls {
  295. ATA_IOC_GET_IO32 = 0x309,
  296. ATA_IOC_SET_IO32 = 0x324,
  297. };
  298. enum ata_dev_typed {
  299. ATA_DEV_ATA, /* ATA device */
  300. ATA_DEV_ATAPI, /* ATAPI device */
  301. ATA_DEV_PMP, /* Port Multiplier Port */
  302. ATA_DEV_UNKNOWN, /* unknown */
  303. };
  304. struct ata_taskfile {
  305. unsigned long flags; /* ATA_TFLAG_xxx */
  306. u8 protocol; /* ATA_PROT_xxx */
  307. u8 ctl; /* control reg */
  308. u8 hob_feature; /* additional data */
  309. u8 hob_nsect; /* to support LBA48 */
  310. u8 hob_lbal;
  311. u8 hob_lbam;
  312. u8 hob_lbah;
  313. u8 feature;
  314. u8 nsect;
  315. u8 lbal;
  316. u8 lbam;
  317. u8 lbah;
  318. u8 device;
  319. u8 command; /* IO operation */
  320. };
  321. /*
  322. * protocol tests
  323. */
  324. static inline unsigned int ata_prot_flags(u8 prot)
  325. {
  326. switch (prot) {
  327. case ATA_PROT_NODATA:
  328. return 0;
  329. case ATA_PROT_PIO:
  330. return ATA_PROT_FLAG_PIO;
  331. case ATA_PROT_DMA:
  332. return ATA_PROT_FLAG_DMA;
  333. case ATA_PROT_NCQ:
  334. return ATA_PROT_FLAG_DMA | ATA_PROT_FLAG_NCQ;
  335. case ATAPI_PROT_NODATA:
  336. return ATA_PROT_FLAG_ATAPI;
  337. case ATAPI_PROT_PIO:
  338. return ATA_PROT_FLAG_ATAPI | ATA_PROT_FLAG_PIO;
  339. case ATAPI_PROT_DMA:
  340. return ATA_PROT_FLAG_ATAPI | ATA_PROT_FLAG_DMA;
  341. }
  342. return 0;
  343. }
  344. static inline int ata_is_atapi(u8 prot)
  345. {
  346. return ata_prot_flags(prot) & ATA_PROT_FLAG_ATAPI;
  347. }
  348. static inline int ata_is_nodata(u8 prot)
  349. {
  350. return !(ata_prot_flags(prot) & ATA_PROT_FLAG_DATA);
  351. }
  352. static inline int ata_is_pio(u8 prot)
  353. {
  354. return ata_prot_flags(prot) & ATA_PROT_FLAG_PIO;
  355. }
  356. static inline int ata_is_dma(u8 prot)
  357. {
  358. return ata_prot_flags(prot) & ATA_PROT_FLAG_DMA;
  359. }
  360. static inline int ata_is_ncq(u8 prot)
  361. {
  362. return ata_prot_flags(prot) & ATA_PROT_FLAG_NCQ;
  363. }
  364. static inline int ata_is_data(u8 prot)
  365. {
  366. return ata_prot_flags(prot) & ATA_PROT_FLAG_DATA;
  367. }
  368. /*
  369. * id tests
  370. */
  371. #define ata_id_is_ata(id) (((id)[0] & (1 << 15)) == 0)
  372. #define ata_id_has_lba(id) ((id)[49] & (1 << 9))
  373. #define ata_id_has_dma(id) ((id)[49] & (1 << 8))
  374. #define ata_id_has_ncq(id) ((id)[76] & (1 << 8))
  375. #define ata_id_queue_depth(id) (((id)[75] & 0x1f) + 1)
  376. #define ata_id_removeable(id) ((id)[0] & (1 << 7))
  377. #define ata_id_iordy_disable(id) ((id)[49] & (1 << 10))
  378. #define ata_id_has_iordy(id) ((id)[49] & (1 << 11))
  379. #define ata_id_u32(id,n) \
  380. (((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)]))
  381. #define ata_id_u64(id,n) \
  382. ( ((u64) (id)[(n) + 3] << 48) | \
  383. ((u64) (id)[(n) + 2] << 32) | \
  384. ((u64) (id)[(n) + 1] << 16) | \
  385. ((u64) (id)[(n) + 0]) )
  386. #define ata_id_cdb_intr(id) (((id)[0] & 0x60) == 0x20)
  387. static inline int ata_id_has_fua(const u16 *id)
  388. {
  389. if ((id[84] & 0xC000) != 0x4000)
  390. return 0;
  391. return id[84] & (1 << 6);
  392. }
  393. static inline int ata_id_has_flush(const u16 *id)
  394. {
  395. if ((id[83] & 0xC000) != 0x4000)
  396. return 0;
  397. return id[83] & (1 << 12);
  398. }
  399. static inline int ata_id_has_flush_ext(const u16 *id)
  400. {
  401. if ((id[83] & 0xC000) != 0x4000)
  402. return 0;
  403. return id[83] & (1 << 13);
  404. }
  405. static inline int ata_id_has_lba48(const u16 *id)
  406. {
  407. if ((id[83] & 0xC000) != 0x4000)
  408. return 0;
  409. if (!ata_id_u64(id, 100))
  410. return 0;
  411. return id[83] & (1 << 10);
  412. }
  413. static inline int ata_id_hpa_enabled(const u16 *id)
  414. {
  415. /* Yes children, word 83 valid bits cover word 82 data */
  416. if ((id[83] & 0xC000) != 0x4000)
  417. return 0;
  418. /* And 87 covers 85-87 */
  419. if ((id[87] & 0xC000) != 0x4000)
  420. return 0;
  421. /* Check command sets enabled as well as supported */
  422. if ((id[85] & ( 1 << 10)) == 0)
  423. return 0;
  424. return id[82] & (1 << 10);
  425. }
  426. static inline int ata_id_has_wcache(const u16 *id)
  427. {
  428. /* Yes children, word 83 valid bits cover word 82 data */
  429. if ((id[83] & 0xC000) != 0x4000)
  430. return 0;
  431. return id[82] & (1 << 5);
  432. }
  433. static inline int ata_id_has_pm(const u16 *id)
  434. {
  435. if ((id[83] & 0xC000) != 0x4000)
  436. return 0;
  437. return id[82] & (1 << 3);
  438. }
  439. static inline int ata_id_rahead_enabled(const u16 *id)
  440. {
  441. if ((id[87] & 0xC000) != 0x4000)
  442. return 0;
  443. return id[85] & (1 << 6);
  444. }
  445. static inline int ata_id_wcache_enabled(const u16 *id)
  446. {
  447. if ((id[87] & 0xC000) != 0x4000)
  448. return 0;
  449. return id[85] & (1 << 5);
  450. }
  451. static inline unsigned int ata_id_major_version(const u16 *id)
  452. {
  453. unsigned int mver;
  454. if (id[ATA_ID_MAJOR_VER] == 0xFFFF)
  455. return 0;
  456. for (mver = 14; mver >= 1; mver--)
  457. if (id[ATA_ID_MAJOR_VER] & (1 << mver))
  458. break;
  459. return mver;
  460. }
  461. static inline int ata_id_is_sata(const u16 *id)
  462. {
  463. return ata_id_major_version(id) >= 5 && id[93] == 0;
  464. }
  465. static inline int ata_id_has_tpm(const u16 *id)
  466. {
  467. /* The TPM bits are only valid on ATA8 */
  468. if (ata_id_major_version(id) < 8)
  469. return 0;
  470. if ((id[48] & 0xC000) != 0x4000)
  471. return 0;
  472. return id[48] & (1 << 0);
  473. }
  474. static inline int ata_id_has_dword_io(const u16 *id)
  475. {
  476. /* ATA 8 reuses this flag for "trusted" computing */
  477. if (ata_id_major_version(id) > 7)
  478. return 0;
  479. if (id[48] & (1 << 0))
  480. return 1;
  481. return 0;
  482. }
  483. static inline int ata_id_current_chs_valid(const u16 *id)
  484. {
  485. /* For ATA-1 devices, if the INITIALIZE DEVICE PARAMETERS command
  486. has not been issued to the device then the values of
  487. id[54] to id[56] are vendor specific. */
  488. return (id[53] & 0x01) && /* Current translation valid */
  489. id[54] && /* cylinders in current translation */
  490. id[55] && /* heads in current translation */
  491. id[55] <= 16 &&
  492. id[56]; /* sectors in current translation */
  493. }
  494. static inline int ata_id_is_cfa(const u16 *id)
  495. {
  496. u16 v = id[0];
  497. if (v == 0x848A) /* Standard CF */
  498. return 1;
  499. /* Could be CF hiding as standard ATA */
  500. if (ata_id_major_version(id) >= 3 && id[82] != 0xFFFF &&
  501. (id[82] & ( 1 << 2)))
  502. return 1;
  503. return 0;
  504. }
  505. static inline int ata_drive_40wire(const u16 *dev_id)
  506. {
  507. if (ata_id_is_sata(dev_id))
  508. return 0; /* SATA */
  509. if ((dev_id[93] & 0xE000) == 0x6000)
  510. return 0; /* 80 wire */
  511. return 1;
  512. }
  513. static inline int ata_drive_40wire_relaxed(const u16 *dev_id)
  514. {
  515. if ((dev_id[93] & 0x2000) == 0x2000)
  516. return 0; /* 80 wire */
  517. return 1;
  518. }
  519. static inline int atapi_cdb_len(const u16 *dev_id)
  520. {
  521. u16 tmp = dev_id[0] & 0x3;
  522. switch (tmp) {
  523. case 0: return 12;
  524. case 1: return 16;
  525. default: return -1;
  526. }
  527. }
  528. static inline int atapi_command_packet_set(const u16 *dev_id)
  529. {
  530. return (dev_id[0] >> 8) & 0x1f;
  531. }
  532. static inline int atapi_id_dmadir(const u16 *dev_id)
  533. {
  534. return ata_id_major_version(dev_id) >= 7 && (dev_id[62] & 0x8000);
  535. }
  536. static inline int is_multi_taskfile(struct ata_taskfile *tf)
  537. {
  538. return (tf->command == ATA_CMD_READ_MULTI) ||
  539. (tf->command == ATA_CMD_WRITE_MULTI) ||
  540. (tf->command == ATA_CMD_READ_MULTI_EXT) ||
  541. (tf->command == ATA_CMD_WRITE_MULTI_EXT) ||
  542. (tf->command == ATA_CMD_WRITE_MULTI_FUA_EXT);
  543. }
  544. static inline int ata_ok(u8 status)
  545. {
  546. return ((status & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ | ATA_ERR))
  547. == ATA_DRDY);
  548. }
  549. static inline int lba_28_ok(u64 block, u32 n_block)
  550. {
  551. /* check the ending block number */
  552. return ((block + n_block - 1) < ((u64)1 << 28)) && (n_block <= 256);
  553. }
  554. static inline int lba_48_ok(u64 block, u32 n_block)
  555. {
  556. /* check the ending block number */
  557. return ((block + n_block - 1) < ((u64)1 << 48)) && (n_block <= 65536);
  558. }
  559. #define sata_pmp_gscr_vendor(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] & 0xffff)
  560. #define sata_pmp_gscr_devid(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] >> 16)
  561. #define sata_pmp_gscr_rev(gscr) (((gscr)[SATA_PMP_GSCR_REV] >> 8) & 0xff)
  562. #define sata_pmp_gscr_ports(gscr) ((gscr)[SATA_PMP_GSCR_PORT_INFO] & 0xf)
  563. u64 ata_id_n_sectors(u16 *id);
  564. u32 ata_dev_classify(u32 sig);
  565. void ata_id_c_string(const u16 *id, unsigned char *s,
  566. unsigned int ofs, unsigned int len);
  567. void ata_dump_id(u16 *id);
  568. void ata_swap_buf_le16(u16 *buf, unsigned int buf_words);
  569. #endif /* __LIBATA_H__ */