README.omap3 4.6 KB

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  1. Summary
  2. =======
  3. This README is about U-Boot support for TI's ARM Cortex-A8 based OMAP3 [1]
  4. family of SoCs. TI's OMAP3 SoC family contains an ARM Cortex-A8. Additionally,
  5. some family members contain a TMS320C64x+ DSP and/or an Imagination SGX 2D/3D
  6. graphics processor and various other standard peripherals.
  7. Currently the following boards are supported:
  8. * OMAP3530 BeagleBoard [2]
  9. * Gumstix Overo [3]
  10. * TI EVM [4]
  11. * OpenPandora Ltd. Pandora [5]
  12. * TI/Logic PD Zoom MDK [6]
  13. * TI/Logic PD Zoom 2 [7]
  14. * CompuLab Ltd. CM-T35 [8]
  15. Toolchain
  16. =========
  17. While ARM Cortex-A8 support ARM v7 instruction set (-march=armv7a) we compile
  18. with -march=armv5 to allow more compilers to work. For U-Boot code this has
  19. no performance impact.
  20. Build
  21. =====
  22. * BeagleBoard:
  23. make omap3_beagle_config
  24. make
  25. * Gumstix Overo:
  26. make omap3_overo_config
  27. make
  28. * TI EVM:
  29. make omap3_evm_config
  30. make
  31. * Pandora:
  32. make omap3_pandora_config
  33. make
  34. * Zoom MDK:
  35. make omap3_zoom1_config
  36. make
  37. * Zoom 2:
  38. make omap3_zoom2_config
  39. make
  40. * CM-T35:
  41. make cm_t35_config
  42. make
  43. Custom commands
  44. ===============
  45. To make U-Boot for OMAP3 support NAND device SW or HW ECC calculation, U-Boot
  46. for OMAP3 supports custom user command
  47. nandecc hw/sw
  48. To be compatible with NAND drivers using SW ECC (e.g. kernel code)
  49. nandecc sw
  50. enables SW ECC calculation. HW ECC enabled with
  51. nandecc hw
  52. is typically used to write 2nd stage bootloader (known as 'x-loader') which is
  53. executed by OMAP3's boot rom and therefore has to be written with HW ECC.
  54. For all other commands see
  55. help
  56. Interfaces
  57. ==========
  58. gpio
  59. ----
  60. To set a bit :
  61. if (!gpio_request(N, "")) {
  62. gpio_direction_output(N, 0);
  63. gpio_set_value(N, 1);
  64. }
  65. To clear a bit :
  66. if (!gpio_request(N, "")) {
  67. gpio_direction_output(N, 0);
  68. gpio_set_value(N, 0);
  69. }
  70. To read a bit :
  71. if (!gpio_request(N, "")) {
  72. gpio_direction_input(N);
  73. val = gpio_get_value(N);
  74. gpio_free(N);
  75. }
  76. if (val)
  77. printf("GPIO N is set\n");
  78. else
  79. printf("GPIO N is clear\n");
  80. dma
  81. ---
  82. void omap3_dma_init(void)
  83. Init the DMA module
  84. int omap3_dma_get_conf_chan(uint32_t chan, struct dma4_chan *config);
  85. Read config of the channel
  86. int omap3_dma_conf_chan(uint32_t chan, struct dma4_chan *config);
  87. Write config to the channel
  88. int omap3_dma_conf_transfer(uint32_t chan, uint32_t *src, uint32_t *dst,
  89. uint32_t sze)
  90. Config source, destination and size of a transfer
  91. int omap3_dma_wait_for_transfer(uint32_t chan)
  92. Wait for a transfer to end - this hast to be called before a channel
  93. or the data the channel transferd are used.
  94. int omap3_dma_get_revision(uint32_t *minor, uint32_t *major)
  95. Read silicon Revision of the DMA module
  96. NAND
  97. ====
  98. There are some OMAP3 devices out there with NAND attached. Due to the fact that
  99. OMAP3 ROM code can only handle 1-bit hamming ECC for accessing first page
  100. (place where SPL lives) we require this setup for u-boot at least when reading
  101. the second progam within SPL. A lot of newer NAND chips however require more
  102. than 1-bit ECC for the pages, some can live with 1-bit for the first page. To
  103. handle this we can switch to another ECC algorithm after reading the payload
  104. within SPL.
  105. BCH8
  106. ----
  107. To enable hardware assisted BCH8 (8-bit BCH [Bose, Chaudhuri, Hocquenghem]) on
  108. OMAP3 devices we can use the BCH library in lib/bch.c. To do so add CONFIG_BCH
  109. and set CONFIG_NAND_OMAP_ECCSCHEME=5 (refer README.nand) for selecting BCH8_SW.
  110. The NAND OOB layout is the same as in linux kernel, if the linux kernel BCH8
  111. implementation for OMAP3 works for you so the u-boot version should also.
  112. When you require the SPL to read with BCH8 there are two more configs to
  113. change:
  114. * CONFIG_SYS_NAND_ECCPOS (must be the same as .eccpos in
  115. GPMC_NAND_HW_BCH8_ECC_LAYOUT defined in
  116. arch/arm/include/asm/arch-omap3/omap_gpmc.h)
  117. * CONFIG_SYS_NAND_ECCSIZE must be 512
  118. * CONFIG_SYS_NAND_ECCBYTES must be 13 for this BCH8 setup
  119. Acknowledgements
  120. ================
  121. OMAP3 U-Boot is based on U-Boot tar ball [9] for BeagleBoard and EVM done by
  122. several TI employees.
  123. Links
  124. =====
  125. [1] OMAP3:
  126. http://www.ti.com/omap3 (high volume) and
  127. http://www.ti.com/omap35x (broad market)
  128. [2] OMAP3530 BeagleBoard:
  129. http://beagleboard.org/
  130. [3] Gumstix Overo:
  131. http://www.gumstix.net/Overo/
  132. [4] TI EVM:
  133. http://focus.ti.com/docs/toolsw/folders/print/tmdxevm3503.html
  134. [5] OpenPandora Ltd. Pandora:
  135. http://openpandora.org/
  136. [6] TI/Logic PD Zoom MDK:
  137. http://www.logicpd.com/products/devkit/ti/zoom_mobile_development_kit
  138. [7] TI/Logic PD Zoom 2
  139. http://www.logicpd.com/sites/default/files/1012659A_Zoom_OMAP34x-II_MDP_Brief.pdf
  140. [8] CompuLab Ltd. CM-T35:
  141. http://www.compulab.co.il/t3530/html/t3530-cm-datasheet.htm
  142. [9] TI OMAP3 U-Boot:
  143. http://beagleboard.googlecode.com/files/u-boot_beagle_revb.tar.gz