.am335x-evm.dtb.dts.tmp 34 KB

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  1. # 1 "<stdin>"
  2. # 1 "<built-in>"
  3. # 1 "<command-line>"
  4. # 1 "././include/linux/kconfig.h" 1
  5. # 1 "include/generated/autoconf.h" 1
  6. # 5 "././include/linux/kconfig.h" 2
  7. # 1 "<command-line>" 2
  8. # 1 "<stdin>"
  9. /dts-v1/;
  10. # 1 "./arch/arm/dts/am33xx.dtsi" 1
  11. # 11 "./arch/arm/dts/am33xx.dtsi"
  12. # 1 "./arch/arm/dts/include/dt-bindings/gpio/gpio.h" 1
  13. # 12 "./arch/arm/dts/am33xx.dtsi" 2
  14. # 1 "./arch/arm/dts/include/dt-bindings/pinctrl/am33xx.h" 1
  15. # 1 "./arch/arm/dts/include/dt-bindings/pinctrl/omap.h" 1
  16. # 9 "./arch/arm/dts/include/dt-bindings/pinctrl/am33xx.h" 2
  17. # 13 "./arch/arm/dts/am33xx.dtsi" 2
  18. # 1 "./arch/arm/dts/skeleton.dtsi" 1
  19. / {
  20. #address-cells = <1>;
  21. #size-cells = <1>;
  22. chosen { };
  23. aliases { };
  24. memory { device_type = "memory"; reg = <0 0>; };
  25. };
  26. # 15 "./arch/arm/dts/am33xx.dtsi" 2
  27. / {
  28. compatible = "ti,am33xx";
  29. interrupt-parent = <&intc>;
  30. aliases {
  31. i2c0 = &i2c0;
  32. i2c1 = &i2c1;
  33. i2c2 = &i2c2;
  34. serial0 = &uart0;
  35. serial1 = &uart1;
  36. serial2 = &uart2;
  37. serial3 = &uart3;
  38. serial4 = &uart4;
  39. serial5 = &uart5;
  40. d_can0 = &dcan0;
  41. d_can1 = &dcan1;
  42. usb0 = &usb0;
  43. usb1 = &usb1;
  44. phy0 = &usb0_phy;
  45. phy1 = &usb1_phy;
  46. ethernet0 = &cpsw_emac0;
  47. ethernet1 = &cpsw_emac1;
  48. };
  49. cpus {
  50. #address-cells = <1>;
  51. #size-cells = <0>;
  52. cpu@0 {
  53. compatible = "arm,cortex-a8";
  54. device_type = "cpu";
  55. reg = <0>;
  56. operating-points = <
  57. 720000 1285000
  58. 600000 1225000
  59. 500000 1125000
  60. 275000 1125000
  61. >;
  62. voltage-tolerance = <2>;
  63. clocks = <&dpll_mpu_ck>;
  64. clock-names = "cpu";
  65. clock-latency = <300000>;
  66. };
  67. };
  68. pmu {
  69. compatible = "arm,cortex-a8-pmu";
  70. interrupts = <3>;
  71. };
  72. soc {
  73. compatible = "ti,omap-infra";
  74. mpu {
  75. compatible = "ti,omap3-mpu";
  76. ti,hwmods = "mpu";
  77. };
  78. };
  79. # 93 "./arch/arm/dts/am33xx.dtsi"
  80. ocp {
  81. compatible = "simple-bus";
  82. #address-cells = <1>;
  83. #size-cells = <1>;
  84. ranges;
  85. ti,hwmods = "l3_main";
  86. l4_wkup: l4_wkup@44c00000 {
  87. compatible = "ti,am3-l4-wkup", "simple-bus";
  88. #address-cells = <1>;
  89. #size-cells = <1>;
  90. ranges = <0 0x44c00000 0x280000>;
  91. prcm: prcm@200000 {
  92. compatible = "ti,am3-prcm";
  93. reg = <0x200000 0x4000>;
  94. prcm_clocks: clocks {
  95. #address-cells = <1>;
  96. #size-cells = <0>;
  97. };
  98. prcm_clockdomains: clockdomains {
  99. };
  100. };
  101. scm: scm@210000 {
  102. compatible = "ti,am3-scm", "simple-bus";
  103. reg = <0x210000 0x2000>;
  104. #address-cells = <1>;
  105. #size-cells = <1>;
  106. ranges = <0 0x210000 0x2000>;
  107. am33xx_pinmux: pinmux@800 {
  108. compatible = "pinctrl-single";
  109. reg = <0x800 0x238>;
  110. #address-cells = <1>;
  111. #size-cells = <0>;
  112. pinctrl-single,register-width = <32>;
  113. pinctrl-single,function-mask = <0x7f>;
  114. };
  115. scm_conf: scm_conf@0 {
  116. compatible = "syscon";
  117. reg = <0x0 0x800>;
  118. #address-cells = <1>;
  119. #size-cells = <1>;
  120. scm_clocks: clocks {
  121. #address-cells = <1>;
  122. #size-cells = <0>;
  123. };
  124. };
  125. scm_clockdomains: clockdomains {
  126. };
  127. };
  128. };
  129. intc: interrupt-controller@48200000 {
  130. compatible = "ti,am33xx-intc";
  131. interrupt-controller;
  132. #interrupt-cells = <1>;
  133. reg = <0x48200000 0x1000>;
  134. };
  135. edma: edma@49000000 {
  136. compatible = "ti,edma3";
  137. ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
  138. reg = <0x49000000 0x10000>,
  139. <0x44e10f90 0x40>;
  140. interrupts = <12 13 14>;
  141. #dma-cells = <1>;
  142. };
  143. gpio0: gpio@44e07000 {
  144. compatible = "ti,omap4-gpio";
  145. ti,hwmods = "gpio1";
  146. gpio-controller;
  147. #gpio-cells = <2>;
  148. interrupt-controller;
  149. #interrupt-cells = <2>;
  150. reg = <0x44e07000 0x1000>;
  151. interrupts = <96>;
  152. };
  153. gpio1: gpio@4804c000 {
  154. compatible = "ti,omap4-gpio";
  155. ti,hwmods = "gpio2";
  156. gpio-controller;
  157. #gpio-cells = <2>;
  158. interrupt-controller;
  159. #interrupt-cells = <2>;
  160. reg = <0x4804c000 0x1000>;
  161. interrupts = <98>;
  162. };
  163. gpio2: gpio@481ac000 {
  164. compatible = "ti,omap4-gpio";
  165. ti,hwmods = "gpio3";
  166. gpio-controller;
  167. #gpio-cells = <2>;
  168. interrupt-controller;
  169. #interrupt-cells = <2>;
  170. reg = <0x481ac000 0x1000>;
  171. interrupts = <32>;
  172. };
  173. gpio3: gpio@481ae000 {
  174. compatible = "ti,omap4-gpio";
  175. ti,hwmods = "gpio4";
  176. gpio-controller;
  177. #gpio-cells = <2>;
  178. interrupt-controller;
  179. #interrupt-cells = <2>;
  180. reg = <0x481ae000 0x1000>;
  181. interrupts = <62>;
  182. };
  183. uart0: serial@44e09000 {
  184. compatible = "ti,omap3-uart";
  185. ti,hwmods = "uart1";
  186. clock-frequency = <48000000>;
  187. reg = <0x44e09000 0x2000>;
  188. reg-shift = <2>;
  189. interrupts = <72>;
  190. status = "disabled";
  191. dmas = <&edma 26>, <&edma 27>;
  192. dma-names = "tx", "rx";
  193. };
  194. uart1: serial@48022000 {
  195. compatible = "ti,omap3-uart";
  196. ti,hwmods = "uart2";
  197. clock-frequency = <48000000>;
  198. reg = <0x48022000 0x2000>;
  199. reg-shift = <2>;
  200. interrupts = <73>;
  201. status = "disabled";
  202. dmas = <&edma 28>, <&edma 29>;
  203. dma-names = "tx", "rx";
  204. };
  205. uart2: serial@48024000 {
  206. compatible = "ti,omap3-uart";
  207. ti,hwmods = "uart3";
  208. clock-frequency = <48000000>;
  209. reg = <0x48024000 0x2000>;
  210. reg-shift = <2>;
  211. interrupts = <74>;
  212. status = "disabled";
  213. dmas = <&edma 30>, <&edma 31>;
  214. dma-names = "tx", "rx";
  215. };
  216. uart3: serial@481a6000 {
  217. compatible = "ti,omap3-uart";
  218. ti,hwmods = "uart4";
  219. clock-frequency = <48000000>;
  220. reg = <0x481a6000 0x2000>;
  221. reg-shift = <2>;
  222. interrupts = <44>;
  223. status = "disabled";
  224. };
  225. uart4: serial@481a8000 {
  226. compatible = "ti,omap3-uart";
  227. ti,hwmods = "uart5";
  228. clock-frequency = <48000000>;
  229. reg = <0x481a8000 0x2000>;
  230. reg-shift = <2>;
  231. interrupts = <45>;
  232. status = "disabled";
  233. };
  234. uart5: serial@481aa000 {
  235. compatible = "ti,omap3-uart";
  236. ti,hwmods = "uart6";
  237. clock-frequency = <48000000>;
  238. reg = <0x481aa000 0x2000>;
  239. reg-shift = <2>;
  240. interrupts = <46>;
  241. status = "disabled";
  242. };
  243. i2c0: i2c@44e0b000 {
  244. compatible = "ti,omap4-i2c";
  245. #address-cells = <1>;
  246. #size-cells = <0>;
  247. ti,hwmods = "i2c1";
  248. reg = <0x44e0b000 0x1000>;
  249. interrupts = <70>;
  250. status = "disabled";
  251. };
  252. i2c1: i2c@4802a000 {
  253. compatible = "ti,omap4-i2c";
  254. #address-cells = <1>;
  255. #size-cells = <0>;
  256. ti,hwmods = "i2c2";
  257. reg = <0x4802a000 0x1000>;
  258. interrupts = <71>;
  259. status = "disabled";
  260. };
  261. i2c2: i2c@4819c000 {
  262. compatible = "ti,omap4-i2c";
  263. #address-cells = <1>;
  264. #size-cells = <0>;
  265. ti,hwmods = "i2c3";
  266. reg = <0x4819c000 0x1000>;
  267. interrupts = <30>;
  268. status = "disabled";
  269. };
  270. mmc1: mmc@48060000 {
  271. compatible = "ti,omap4-hsmmc";
  272. ti,hwmods = "mmc1";
  273. ti,dual-volt;
  274. ti,needs-special-reset;
  275. ti,needs-special-hs-handling;
  276. dmas = <&edma 24
  277. &edma 25>;
  278. dma-names = "tx", "rx";
  279. interrupts = <64>;
  280. interrupt-parent = <&intc>;
  281. reg = <0x48060000 0x1000>;
  282. status = "disabled";
  283. };
  284. mmc2: mmc@481d8000 {
  285. compatible = "ti,omap4-hsmmc";
  286. ti,hwmods = "mmc2";
  287. ti,needs-special-reset;
  288. dmas = <&edma 2
  289. &edma 3>;
  290. dma-names = "tx", "rx";
  291. interrupts = <28>;
  292. interrupt-parent = <&intc>;
  293. reg = <0x481d8000 0x1000>;
  294. status = "disabled";
  295. };
  296. mmc3: mmc@47810000 {
  297. compatible = "ti,omap4-hsmmc";
  298. ti,hwmods = "mmc3";
  299. ti,needs-special-reset;
  300. interrupts = <29>;
  301. interrupt-parent = <&intc>;
  302. reg = <0x47810000 0x1000>;
  303. status = "disabled";
  304. };
  305. hwspinlock: spinlock@480ca000 {
  306. compatible = "ti,omap4-hwspinlock";
  307. reg = <0x480ca000 0x1000>;
  308. ti,hwmods = "spinlock";
  309. #hwlock-cells = <1>;
  310. };
  311. wdt2: wdt@44e35000 {
  312. compatible = "ti,omap3-wdt";
  313. ti,hwmods = "wd_timer2";
  314. reg = <0x44e35000 0x1000>;
  315. interrupts = <91>;
  316. };
  317. dcan0: can@481cc000 {
  318. compatible = "ti,am3352-d_can";
  319. ti,hwmods = "d_can0";
  320. reg = <0x481cc000 0x2000>;
  321. clocks = <&dcan0_fck>;
  322. clock-names = "fck";
  323. syscon-raminit = <&scm_conf 0x644 0>;
  324. interrupts = <52>;
  325. status = "disabled";
  326. };
  327. dcan1: can@481d0000 {
  328. compatible = "ti,am3352-d_can";
  329. ti,hwmods = "d_can1";
  330. reg = <0x481d0000 0x2000>;
  331. clocks = <&dcan1_fck>;
  332. clock-names = "fck";
  333. syscon-raminit = <&scm_conf 0x644 1>;
  334. interrupts = <55>;
  335. status = "disabled";
  336. };
  337. mailbox: mailbox@480C8000 {
  338. compatible = "ti,omap4-mailbox";
  339. reg = <0x480C8000 0x200>;
  340. interrupts = <77>;
  341. ti,hwmods = "mailbox";
  342. #mbox-cells = <1>;
  343. ti,mbox-num-users = <4>;
  344. ti,mbox-num-fifos = <8>;
  345. mbox_wkupm3: wkup_m3 {
  346. ti,mbox-tx = <0 0 0>;
  347. ti,mbox-rx = <0 0 3>;
  348. };
  349. };
  350. timer1: timer@44e31000 {
  351. compatible = "ti,am335x-timer-1ms";
  352. reg = <0x44e31000 0x400>;
  353. interrupts = <67>;
  354. ti,hwmods = "timer1";
  355. ti,timer-alwon;
  356. };
  357. timer2: timer@48040000 {
  358. compatible = "ti,am335x-timer";
  359. reg = <0x48040000 0x400>;
  360. interrupts = <68>;
  361. ti,hwmods = "timer2";
  362. };
  363. timer3: timer@48042000 {
  364. compatible = "ti,am335x-timer";
  365. reg = <0x48042000 0x400>;
  366. interrupts = <69>;
  367. ti,hwmods = "timer3";
  368. };
  369. timer4: timer@48044000 {
  370. compatible = "ti,am335x-timer";
  371. reg = <0x48044000 0x400>;
  372. interrupts = <92>;
  373. ti,hwmods = "timer4";
  374. ti,timer-pwm;
  375. };
  376. timer5: timer@48046000 {
  377. compatible = "ti,am335x-timer";
  378. reg = <0x48046000 0x400>;
  379. interrupts = <93>;
  380. ti,hwmods = "timer5";
  381. ti,timer-pwm;
  382. };
  383. timer6: timer@48048000 {
  384. compatible = "ti,am335x-timer";
  385. reg = <0x48048000 0x400>;
  386. interrupts = <94>;
  387. ti,hwmods = "timer6";
  388. ti,timer-pwm;
  389. };
  390. timer7: timer@4804a000 {
  391. compatible = "ti,am335x-timer";
  392. reg = <0x4804a000 0x400>;
  393. interrupts = <95>;
  394. ti,hwmods = "timer7";
  395. ti,timer-pwm;
  396. };
  397. rtc: rtc@44e3e000 {
  398. compatible = "ti,am3352-rtc", "ti,da830-rtc";
  399. reg = <0x44e3e000 0x1000>;
  400. interrupts = <75
  401. 76>;
  402. ti,hwmods = "rtc";
  403. };
  404. spi0: spi@48030000 {
  405. compatible = "ti,omap4-mcspi";
  406. #address-cells = <1>;
  407. #size-cells = <0>;
  408. reg = <0x48030000 0x400>;
  409. interrupts = <65>;
  410. ti,spi-num-cs = <2>;
  411. ti,hwmods = "spi0";
  412. dmas = <&edma 16
  413. &edma 17
  414. &edma 18
  415. &edma 19>;
  416. dma-names = "tx0", "rx0", "tx1", "rx1";
  417. status = "disabled";
  418. };
  419. spi1: spi@481a0000 {
  420. compatible = "ti,omap4-mcspi";
  421. #address-cells = <1>;
  422. #size-cells = <0>;
  423. reg = <0x481a0000 0x400>;
  424. interrupts = <125>;
  425. ti,spi-num-cs = <2>;
  426. ti,hwmods = "spi1";
  427. dmas = <&edma 42
  428. &edma 43
  429. &edma 44
  430. &edma 45>;
  431. dma-names = "tx0", "rx0", "tx1", "rx1";
  432. status = "disabled";
  433. };
  434. usb: usb@47400000 {
  435. compatible = "ti,am33xx-usb";
  436. reg = <0x47400000 0x1000>;
  437. ranges;
  438. #address-cells = <1>;
  439. #size-cells = <1>;
  440. ti,hwmods = "usb_otg_hs";
  441. status = "disabled";
  442. usb_ctrl_mod: control@44e10620 {
  443. compatible = "ti,am335x-usb-ctrl-module";
  444. reg = <0x44e10620 0x10
  445. 0x44e10648 0x4>;
  446. reg-names = "phy_ctrl", "wakeup";
  447. status = "disabled";
  448. };
  449. usb0_phy: usb-phy@47401300 {
  450. compatible = "ti,am335x-usb-phy";
  451. reg = <0x47401300 0x100>;
  452. reg-names = "phy";
  453. status = "disabled";
  454. ti,ctrl_mod = <&usb_ctrl_mod>;
  455. };
  456. usb0: usb@47401000 {
  457. compatible = "ti,musb-am33xx";
  458. status = "disabled";
  459. reg = <0x47401400 0x400
  460. 0x47401000 0x200>;
  461. reg-names = "mc", "control";
  462. interrupts = <18>;
  463. interrupt-names = "mc";
  464. dr_mode = "otg";
  465. mentor,multipoint = <1>;
  466. mentor,num-eps = <16>;
  467. mentor,ram-bits = <12>;
  468. mentor,power = <500>;
  469. phys = <&usb0_phy>;
  470. dmas = <&cppi41dma 0 0 &cppi41dma 1 0
  471. &cppi41dma 2 0 &cppi41dma 3 0
  472. &cppi41dma 4 0 &cppi41dma 5 0
  473. &cppi41dma 6 0 &cppi41dma 7 0
  474. &cppi41dma 8 0 &cppi41dma 9 0
  475. &cppi41dma 10 0 &cppi41dma 11 0
  476. &cppi41dma 12 0 &cppi41dma 13 0
  477. &cppi41dma 14 0 &cppi41dma 0 1
  478. &cppi41dma 1 1 &cppi41dma 2 1
  479. &cppi41dma 3 1 &cppi41dma 4 1
  480. &cppi41dma 5 1 &cppi41dma 6 1
  481. &cppi41dma 7 1 &cppi41dma 8 1
  482. &cppi41dma 9 1 &cppi41dma 10 1
  483. &cppi41dma 11 1 &cppi41dma 12 1
  484. &cppi41dma 13 1 &cppi41dma 14 1>;
  485. dma-names =
  486. "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
  487. "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
  488. "rx14", "rx15",
  489. "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
  490. "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
  491. "tx14", "tx15";
  492. };
  493. usb1_phy: usb-phy@47401b00 {
  494. compatible = "ti,am335x-usb-phy";
  495. reg = <0x47401b00 0x100>;
  496. reg-names = "phy";
  497. status = "disabled";
  498. ti,ctrl_mod = <&usb_ctrl_mod>;
  499. };
  500. usb1: usb@47401800 {
  501. compatible = "ti,musb-am33xx";
  502. status = "disabled";
  503. reg = <0x47401c00 0x400
  504. 0x47401800 0x200>;
  505. reg-names = "mc", "control";
  506. interrupts = <19>;
  507. interrupt-names = "mc";
  508. dr_mode = "otg";
  509. mentor,multipoint = <1>;
  510. mentor,num-eps = <16>;
  511. mentor,ram-bits = <12>;
  512. mentor,power = <500>;
  513. phys = <&usb1_phy>;
  514. dmas = <&cppi41dma 15 0 &cppi41dma 16 0
  515. &cppi41dma 17 0 &cppi41dma 18 0
  516. &cppi41dma 19 0 &cppi41dma 20 0
  517. &cppi41dma 21 0 &cppi41dma 22 0
  518. &cppi41dma 23 0 &cppi41dma 24 0
  519. &cppi41dma 25 0 &cppi41dma 26 0
  520. &cppi41dma 27 0 &cppi41dma 28 0
  521. &cppi41dma 29 0 &cppi41dma 15 1
  522. &cppi41dma 16 1 &cppi41dma 17 1
  523. &cppi41dma 18 1 &cppi41dma 19 1
  524. &cppi41dma 20 1 &cppi41dma 21 1
  525. &cppi41dma 22 1 &cppi41dma 23 1
  526. &cppi41dma 24 1 &cppi41dma 25 1
  527. &cppi41dma 26 1 &cppi41dma 27 1
  528. &cppi41dma 28 1 &cppi41dma 29 1>;
  529. dma-names =
  530. "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
  531. "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
  532. "rx14", "rx15",
  533. "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
  534. "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
  535. "tx14", "tx15";
  536. };
  537. cppi41dma: dma-controller@47402000 {
  538. compatible = "ti,am3359-cppi41";
  539. reg = <0x47400000 0x1000
  540. 0x47402000 0x1000
  541. 0x47403000 0x1000
  542. 0x47404000 0x4000>;
  543. reg-names = "glue", "controller", "scheduler", "queuemgr";
  544. interrupts = <17>;
  545. interrupt-names = "glue";
  546. #dma-cells = <2>;
  547. #dma-channels = <30>;
  548. #dma-requests = <256>;
  549. status = "disabled";
  550. };
  551. };
  552. epwmss0: epwmss@48300000 {
  553. compatible = "ti,am33xx-pwmss";
  554. reg = <0x48300000 0x10>;
  555. ti,hwmods = "epwmss0";
  556. #address-cells = <1>;
  557. #size-cells = <1>;
  558. status = "disabled";
  559. ranges = <0x48300100 0x48300100 0x80
  560. 0x48300180 0x48300180 0x80
  561. 0x48300200 0x48300200 0x80>;
  562. ecap0: ecap@48300100 {
  563. compatible = "ti,am33xx-ecap";
  564. #pwm-cells = <3>;
  565. reg = <0x48300100 0x80>;
  566. interrupts = <31>;
  567. interrupt-names = "ecap0";
  568. ti,hwmods = "ecap0";
  569. status = "disabled";
  570. };
  571. ehrpwm0: ehrpwm@48300200 {
  572. compatible = "ti,am33xx-ehrpwm";
  573. #pwm-cells = <3>;
  574. reg = <0x48300200 0x80>;
  575. ti,hwmods = "ehrpwm0";
  576. status = "disabled";
  577. };
  578. };
  579. epwmss1: epwmss@48302000 {
  580. compatible = "ti,am33xx-pwmss";
  581. reg = <0x48302000 0x10>;
  582. ti,hwmods = "epwmss1";
  583. #address-cells = <1>;
  584. #size-cells = <1>;
  585. status = "disabled";
  586. ranges = <0x48302100 0x48302100 0x80
  587. 0x48302180 0x48302180 0x80
  588. 0x48302200 0x48302200 0x80>;
  589. ecap1: ecap@48302100 {
  590. compatible = "ti,am33xx-ecap";
  591. #pwm-cells = <3>;
  592. reg = <0x48302100 0x80>;
  593. interrupts = <47>;
  594. interrupt-names = "ecap1";
  595. ti,hwmods = "ecap1";
  596. status = "disabled";
  597. };
  598. ehrpwm1: ehrpwm@48302200 {
  599. compatible = "ti,am33xx-ehrpwm";
  600. #pwm-cells = <3>;
  601. reg = <0x48302200 0x80>;
  602. ti,hwmods = "ehrpwm1";
  603. status = "disabled";
  604. };
  605. };
  606. epwmss2: epwmss@48304000 {
  607. compatible = "ti,am33xx-pwmss";
  608. reg = <0x48304000 0x10>;
  609. ti,hwmods = "epwmss2";
  610. #address-cells = <1>;
  611. #size-cells = <1>;
  612. status = "disabled";
  613. ranges = <0x48304100 0x48304100 0x80
  614. 0x48304180 0x48304180 0x80
  615. 0x48304200 0x48304200 0x80>;
  616. ecap2: ecap@48304100 {
  617. compatible = "ti,am33xx-ecap";
  618. #pwm-cells = <3>;
  619. reg = <0x48304100 0x80>;
  620. interrupts = <61>;
  621. interrupt-names = "ecap2";
  622. ti,hwmods = "ecap2";
  623. status = "disabled";
  624. };
  625. ehrpwm2: ehrpwm@48304200 {
  626. compatible = "ti,am33xx-ehrpwm";
  627. #pwm-cells = <3>;
  628. reg = <0x48304200 0x80>;
  629. ti,hwmods = "ehrpwm2";
  630. status = "disabled";
  631. };
  632. };
  633. mac: ethernet@4a100000 {
  634. compatible = "ti,cpsw";
  635. ti,hwmods = "cpgmac0";
  636. clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
  637. clock-names = "fck", "cpts";
  638. cpdma_channels = <8>;
  639. ale_entries = <1024>;
  640. bd_ram_size = <0x2000>;
  641. no_bd_ram = <0>;
  642. rx_descs = <64>;
  643. mac_control = <0x20>;
  644. slaves = <2>;
  645. active_slave = <0>;
  646. cpts_clock_mult = <0x80000000>;
  647. cpts_clock_shift = <29>;
  648. reg = <0x4a100000 0x800
  649. 0x4a101200 0x100>;
  650. #address-cells = <1>;
  651. #size-cells = <1>;
  652. interrupt-parent = <&intc>;
  653. interrupts = <40 41 42 43>;
  654. ranges;
  655. syscon = <&scm_conf>;
  656. status = "disabled";
  657. davinci_mdio: mdio@4a101000 {
  658. compatible = "ti,davinci_mdio";
  659. #address-cells = <1>;
  660. #size-cells = <0>;
  661. ti,hwmods = "davinci_mdio";
  662. bus_freq = <1000000>;
  663. reg = <0x4a101000 0x100>;
  664. status = "disabled";
  665. };
  666. cpsw_emac0: slave@4a100200 {
  667. mac-address = [ 00 00 00 00 00 00 ];
  668. };
  669. cpsw_emac1: slave@4a100300 {
  670. mac-address = [ 00 00 00 00 00 00 ];
  671. };
  672. phy_sel: cpsw-phy-sel@44e10650 {
  673. compatible = "ti,am3352-cpsw-phy-sel";
  674. reg= <0x44e10650 0x4>;
  675. reg-names = "gmii-sel";
  676. };
  677. };
  678. ocmcram: ocmcram@40300000 {
  679. compatible = "mmio-sram";
  680. reg = <0x40300000 0x10000>;
  681. };
  682. wkup_m3: wkup_m3@44d00000 {
  683. compatible = "ti,am3353-wkup-m3";
  684. reg = <0x44d00000 0x4000
  685. 0x44d80000 0x2000>;
  686. ti,hwmods = "wkup_m3";
  687. ti,no-reset-on-init;
  688. };
  689. elm: elm@48080000 {
  690. compatible = "ti,am3352-elm";
  691. reg = <0x48080000 0x2000>;
  692. interrupts = <4>;
  693. ti,hwmods = "elm";
  694. status = "disabled";
  695. };
  696. lcdc: lcdc@4830e000 {
  697. compatible = "ti,am33xx-tilcdc";
  698. reg = <0x4830e000 0x1000>;
  699. interrupt-parent = <&intc>;
  700. interrupts = <36>;
  701. ti,hwmods = "lcdc";
  702. status = "disabled";
  703. };
  704. tscadc: tscadc@44e0d000 {
  705. compatible = "ti,am3359-tscadc";
  706. reg = <0x44e0d000 0x1000>;
  707. interrupt-parent = <&intc>;
  708. interrupts = <16>;
  709. ti,hwmods = "adc_tsc";
  710. status = "disabled";
  711. tsc {
  712. compatible = "ti,am3359-tsc";
  713. };
  714. am335x_adc: adc {
  715. #io-channel-cells = <1>;
  716. compatible = "ti,am3359-adc";
  717. };
  718. };
  719. gpmc: gpmc@50000000 {
  720. compatible = "ti,am3352-gpmc";
  721. ti,hwmods = "gpmc";
  722. ti,no-idle-on-init;
  723. reg = <0x50000000 0x2000>;
  724. interrupts = <100>;
  725. gpmc,num-cs = <7>;
  726. gpmc,num-waitpins = <2>;
  727. #address-cells = <2>;
  728. #size-cells = <1>;
  729. status = "disabled";
  730. };
  731. sham: sham@53100000 {
  732. compatible = "ti,omap4-sham";
  733. ti,hwmods = "sham";
  734. reg = <0x53100000 0x200>;
  735. interrupts = <109>;
  736. dmas = <&edma 36>;
  737. dma-names = "rx";
  738. };
  739. aes: aes@53500000 {
  740. compatible = "ti,omap4-aes";
  741. ti,hwmods = "aes";
  742. reg = <0x53500000 0xa0>;
  743. interrupts = <103>;
  744. dmas = <&edma 6>,
  745. <&edma 5>;
  746. dma-names = "tx", "rx";
  747. };
  748. mcasp0: mcasp@48038000 {
  749. compatible = "ti,am33xx-mcasp-audio";
  750. ti,hwmods = "mcasp0";
  751. reg = <0x48038000 0x2000>,
  752. <0x46000000 0x400000>;
  753. reg-names = "mpu", "dat";
  754. interrupts = <80>, <81>;
  755. interrupt-names = "tx", "rx";
  756. status = "disabled";
  757. dmas = <&edma 8>,
  758. <&edma 9>;
  759. dma-names = "tx", "rx";
  760. };
  761. mcasp1: mcasp@4803C000 {
  762. compatible = "ti,am33xx-mcasp-audio";
  763. ti,hwmods = "mcasp1";
  764. reg = <0x4803C000 0x2000>,
  765. <0x46400000 0x400000>;
  766. reg-names = "mpu", "dat";
  767. interrupts = <82>, <83>;
  768. interrupt-names = "tx", "rx";
  769. status = "disabled";
  770. dmas = <&edma 10>,
  771. <&edma 11>;
  772. dma-names = "tx", "rx";
  773. };
  774. rng: rng@48310000 {
  775. compatible = "ti,omap4-rng";
  776. ti,hwmods = "rng";
  777. reg = <0x48310000 0x2000>;
  778. interrupts = <111>;
  779. };
  780. };
  781. };
  782. /include/ "am33xx-clocks.dtsi"
  783. # 11 "<stdin>" 2
  784. # 1 "./arch/arm/dts/include/dt-bindings/interrupt-controller/irq.h" 1
  785. # 12 "<stdin>" 2
  786. / {
  787. model = "TI AM335x EVM";
  788. compatible = "ti,am335x-evm", "ti,am33xx";
  789. chosen {
  790. stdout-path = &uart0;
  791. tick-timer = &timer2;
  792. };
  793. cpus {
  794. cpu@0 {
  795. cpu0-supply = <&vdd1_reg>;
  796. };
  797. };
  798. memory {
  799. device_type = "memory";
  800. reg = <0x80000000 0x10000000>;
  801. reg = <0x80000000 0x20000000>;
  802. };
  803. vbat: fixedregulator@0 {
  804. compatible = "regulator-fixed";
  805. regulator-name = "vbat";
  806. regulator-min-microvolt = <5000000>;
  807. regulator-max-microvolt = <5000000>;
  808. regulator-boot-on;
  809. };
  810. lis3_reg: fixedregulator@1 {
  811. compatible = "regulator-fixed";
  812. regulator-name = "lis3_reg";
  813. regulator-boot-on;
  814. };
  815. wlan_en_reg: fixedregulator@2 {
  816. compatible = "regulator-fixed";
  817. regulator-name = "wlan-en-regulator";
  818. regulator-min-microvolt = <1800000>;
  819. regulator-max-microvolt = <1800000>;
  820. gpio = <&gpio1 16 0>;
  821. startup-delay-us = <70000>;
  822. enable-active-high;
  823. };
  824. matrix_keypad: matrix_keypad@0 {
  825. compatible = "gpio-matrix-keypad";
  826. debounce-delay-ms = <5>;
  827. col-scan-delay-us = <2>;
  828. row-gpios = <&gpio1 25 0
  829. &gpio1 26 0
  830. &gpio1 27 0>;
  831. col-gpios = <&gpio1 21 0
  832. &gpio1 22 0>;
  833. linux,keymap = <0x0000008b
  834. 0x0100009e
  835. 0x02000069
  836. 0x0001006a
  837. 0x0101001c
  838. 0x0201006c>;
  839. };
  840. gpio_keys: volume_keys@0 {
  841. compatible = "gpio-keys";
  842. #address-cells = <1>;
  843. #size-cells = <0>;
  844. autorepeat;
  845. switch@9 {
  846. label = "volume-up";
  847. linux,code = <115>;
  848. gpios = <&gpio0 2 1>;
  849. gpio-key,wakeup;
  850. };
  851. switch@10 {
  852. label = "volume-down";
  853. linux,code = <114>;
  854. gpios = <&gpio0 3 1>;
  855. gpio-key,wakeup;
  856. };
  857. };
  858. backlight {
  859. compatible = "pwm-backlight";
  860. pwms = <&ecap0 0 50000 0>;
  861. brightness-levels = <0 51 53 56 62 75 101 152 255>;
  862. default-brightness-level = <8>;
  863. };
  864. panel {
  865. compatible = "ti,tilcdc,panel";
  866. status = "okay";
  867. pinctrl-names = "default";
  868. pinctrl-0 = <&lcd_pins_s0>;
  869. panel-info {
  870. ac-bias = <255>;
  871. ac-bias-intrpt = <0>;
  872. dma-burst-sz = <16>;
  873. bpp = <32>;
  874. fdd = <0x80>;
  875. sync-edge = <0>;
  876. sync-ctrl = <1>;
  877. raster-order = <0>;
  878. fifo-th = <0>;
  879. };
  880. display-timings {
  881. 800x480p62 {
  882. clock-frequency = <30000000>;
  883. hactive = <800>;
  884. vactive = <480>;
  885. hfront-porch = <39>;
  886. hback-porch = <39>;
  887. hsync-len = <47>;
  888. vback-porch = <29>;
  889. vfront-porch = <13>;
  890. vsync-len = <2>;
  891. hsync-active = <1>;
  892. vsync-active = <1>;
  893. };
  894. };
  895. };
  896. sound {
  897. compatible = "ti,da830-evm-audio";
  898. ti,model = "AM335x-EVM";
  899. ti,audio-codec = <&tlv320aic3106>;
  900. ti,mcasp-controller = <&mcasp1>;
  901. ti,codec-clock-rate = <12000000>;
  902. ti,audio-routing =
  903. "Headphone Jack", "HPLOUT",
  904. "Headphone Jack", "HPROUT",
  905. "LINE1L", "Line In",
  906. "LINE1R", "Line In";
  907. };
  908. };
  909. &am33xx_pinmux {
  910. pinctrl-names = "default";
  911. pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>;
  912. matrix_keypad_s0: matrix_keypad_s0 {
  913. pinctrl-single,pins = <
  914. 0x54 (0 | 7)
  915. 0x58 (0 | 7)
  916. 0x64 (((1 << 5)) | 7)
  917. 0x68 (((1 << 5)) | 7)
  918. 0x6c (((1 << 5)) | 7)
  919. >;
  920. };
  921. volume_keys_s0: volume_keys_s0 {
  922. pinctrl-single,pins = <
  923. 0x150 (((1 << 5)) | 7)
  924. 0x154 (((1 << 5)) | 7)
  925. >;
  926. };
  927. i2c0_pins: pinmux_i2c0_pins {
  928. pinctrl-single,pins = <
  929. 0x188 (((1 << 5) | (1 << 4)) | 0)
  930. 0x18c (((1 << 5) | (1 << 4)) | 0)
  931. >;
  932. };
  933. i2c1_pins: pinmux_i2c1_pins {
  934. pinctrl-single,pins = <
  935. 0x158 (((1 << 5) | (1 << 4)) | 2)
  936. 0x15c (((1 << 5) | (1 << 4)) | 2)
  937. >;
  938. };
  939. uart0_pins: pinmux_uart0_pins {
  940. pinctrl-single,pins = <
  941. 0x170 (((1 << 5) | (1 << 4)) | 0)
  942. 0x174 (0 | 0)
  943. >;
  944. };
  945. uart1_pins: pinmux_uart1_pins {
  946. pinctrl-single,pins = <
  947. 0x178 (((1 << 5) | (1 << 3)) | 0)
  948. 0x17C (0 | 0)
  949. 0x180 (((1 << 5) | (1 << 4)) | 0)
  950. 0x184 (0 | 0)
  951. >;
  952. };
  953. clkout2_pin: pinmux_clkout2_pin {
  954. pinctrl-single,pins = <
  955. 0x1b4 (0 | 3)
  956. >;
  957. };
  958. nandflash_pins_s0: nandflash_pins_s0 {
  959. pinctrl-single,pins = <
  960. 0x0 (((1 << 5) | (1 << 4)) | 0)
  961. 0x4 (((1 << 5) | (1 << 4)) | 0)
  962. 0x8 (((1 << 5) | (1 << 4)) | 0)
  963. 0xc (((1 << 5) | (1 << 4)) | 0)
  964. 0x10 (((1 << 5) | (1 << 4)) | 0)
  965. 0x14 (((1 << 5) | (1 << 4)) | 0)
  966. 0x18 (((1 << 5) | (1 << 4)) | 0)
  967. 0x1c (((1 << 5) | (1 << 4)) | 0)
  968. 0x70 (((1 << 5) | (1 << 4)) | 0)
  969. 0x74 (((1 << 5) | (1 << 4)) | 7)
  970. 0x7c (((1 << 3)) | 0)
  971. 0x90 (((1 << 3)) | 0)
  972. 0x94 (((1 << 3)) | 0)
  973. 0x98 (((1 << 3)) | 0)
  974. 0x9c (((1 << 3)) | 0)
  975. >;
  976. };
  977. ecap0_pins: backlight_pins {
  978. pinctrl-single,pins = <
  979. 0x164 0x0
  980. >;
  981. };
  982. cpsw_default: cpsw_default {
  983. pinctrl-single,pins = <
  984. 0x110 (((1 << 5)) | 0)
  985. 0x118 (((1 << 5)) | 0)
  986. 0x12c (((1 << 5)) | 0)
  987. 0x130 (((1 << 5)) | 0)
  988. 0x134 (((1 << 5)) | 0)
  989. 0x138 (((1 << 5)) | 0)
  990. 0x13c (((1 << 5)) | 0)
  991. 0x140 (((1 << 5)) | 0)
  992. 0x114 (0 | 0)
  993. 0x11c (0 | 0)
  994. 0x120 (0 | 0)
  995. 0x124 (0 | 0)
  996. 0x128 (0 | 0)
  997. >;
  998. };
  999. cpsw_sleep: cpsw_sleep {
  1000. pinctrl-single,pins = <
  1001. 0x110 (((1 << 5)) | 7)
  1002. 0x114 (((1 << 5)) | 7)
  1003. 0x118 (((1 << 5)) | 7)
  1004. 0x11c (((1 << 5)) | 7)
  1005. 0x120 (((1 << 5)) | 7)
  1006. 0x124 (((1 << 5)) | 7)
  1007. 0x128 (((1 << 5)) | 7)
  1008. 0x12c (((1 << 5)) | 7)
  1009. 0x130 (((1 << 5)) | 7)
  1010. 0x134 (((1 << 5)) | 7)
  1011. 0x138 (((1 << 5)) | 7)
  1012. 0x13c (((1 << 5)) | 7)
  1013. 0x140 (((1 << 5)) | 7)
  1014. >;
  1015. };
  1016. davinci_mdio_default: davinci_mdio_default {
  1017. pinctrl-single,pins = <
  1018. 0x148 (((1 << 5) | (1 << 4)) | (1 << 6) | 0)
  1019. 0x14c (((1 << 4)) | 0)
  1020. >;
  1021. };
  1022. davinci_mdio_sleep: davinci_mdio_sleep {
  1023. pinctrl-single,pins = <
  1024. 0x148 (((1 << 5)) | 7)
  1025. 0x14c (((1 << 5)) | 7)
  1026. >;
  1027. };
  1028. # 304 "<stdin>"
  1029. mmc1_pins_default: pinmux_mmc1_pins {
  1030. pinctrl-single,pins = <
  1031. 0x0F0 (((1 << 5) | (1 << 4)) | 0)
  1032. 0x0F4 (((1 << 5) | (1 << 4)) | 0)
  1033. 0x0F8 (((1 << 5) | (1 << 4)) | 0)
  1034. 0x0FC (((1 << 5) | (1 << 4)) | 0)
  1035. 0x100 (((1 << 5) | (1 << 4)) | 0)
  1036. 0x104 (((1 << 5) | (1 << 4)) | 0)
  1037. 0x08C (((1 << 5) | (1 << 3)) | 7)
  1038. >;
  1039. };
  1040. mmc3_pins: pinmux_mmc3_pins {
  1041. pinctrl-single,pins = <
  1042. 0x44 (((1 << 5) | (1 << 4)) | 3)
  1043. 0x48 (((1 << 5) | (1 << 4)) | 3)
  1044. 0x4C (((1 << 5) | (1 << 4)) | 3)
  1045. 0x78 (((1 << 5) | (1 << 4)) | 3)
  1046. 0x88 (((1 << 5) | (1 << 4)) | 3)
  1047. 0x8C (((1 << 5) | (1 << 4)) | 3)
  1048. >;
  1049. };
  1050. wlan_pins: pinmux_wlan_pins {
  1051. pinctrl-single,pins = <
  1052. 0x40 (0 | 7)
  1053. 0x19C (((1 << 5) | (1 << 3)) | 7)
  1054. 0x1AC (0 | 7)
  1055. >;
  1056. };
  1057. lcd_pins_s0: lcd_pins_s0 {
  1058. pinctrl-single,pins = <
  1059. 0x20 (((1 << 3)) | 1)
  1060. 0x24 (((1 << 3)) | 1)
  1061. 0x28 (((1 << 3)) | 1)
  1062. 0x2c (((1 << 3)) | 1)
  1063. 0x30 (((1 << 3)) | 1)
  1064. 0x34 (((1 << 3)) | 1)
  1065. 0x38 (((1 << 3)) | 1)
  1066. 0x3c (((1 << 3)) | 1)
  1067. 0xa0 (((1 << 3)) | 0)
  1068. 0xa4 (((1 << 3)) | 0)
  1069. 0xa8 (((1 << 3)) | 0)
  1070. 0xac (((1 << 3)) | 0)
  1071. 0xb0 (((1 << 3)) | 0)
  1072. 0xb4 (((1 << 3)) | 0)
  1073. 0xb8 (((1 << 3)) | 0)
  1074. 0xbc (((1 << 3)) | 0)
  1075. 0xc0 (((1 << 3)) | 0)
  1076. 0xc4 (((1 << 3)) | 0)
  1077. 0xc8 (((1 << 3)) | 0)
  1078. 0xcc (((1 << 3)) | 0)
  1079. 0xd0 (((1 << 3)) | 0)
  1080. 0xd4 (((1 << 3)) | 0)
  1081. 0xd8 (((1 << 3)) | 0)
  1082. 0xdc (((1 << 3)) | 0)
  1083. 0xe0 (((1 << 3)) | 0)
  1084. 0xe4 (((1 << 3)) | 0)
  1085. 0xe8 (((1 << 3)) | 0)
  1086. 0xec (((1 << 3)) | 0)
  1087. >;
  1088. };
  1089. # 377 "<stdin>"
  1090. dcan1_pins_default: dcan1_pins_default {
  1091. pinctrl-single,pins = <
  1092. 0x168 (((1 << 3)) | 2)
  1093. 0x16c (((1 << 5)) | 2)
  1094. >;
  1095. };
  1096. };
  1097. &uart0 {
  1098. pinctrl-names = "default";
  1099. pinctrl-0 = <&uart0_pins>;
  1100. status = "okay";
  1101. };
  1102. &uart1 {
  1103. pinctrl-names = "default";
  1104. pinctrl-0 = <&uart1_pins>;
  1105. status = "okay";
  1106. };
  1107. &i2c0 {
  1108. pinctrl-names = "default";
  1109. pinctrl-0 = <&i2c0_pins>;
  1110. status = "okay";
  1111. clock-frequency = <400000>;
  1112. tps: tps@2d {
  1113. reg = <0x2d>;
  1114. };
  1115. };
  1116. &usb {
  1117. status = "okay";
  1118. };
  1119. &usb_ctrl_mod {
  1120. status = "okay";
  1121. };
  1122. &usb0_phy {
  1123. status = "okay";
  1124. };
  1125. &usb1_phy {
  1126. status = "okay";
  1127. };
  1128. &usb0 {
  1129. status = "okay";
  1130. };
  1131. &usb1 {
  1132. status = "okay";
  1133. dr_mode = "host";
  1134. };
  1135. &cppi41dma {
  1136. status = "okay";
  1137. };
  1138. &i2c1 {
  1139. pinctrl-names = "default";
  1140. pinctrl-0 = <&i2c1_pins>;
  1141. status = "okay";
  1142. clock-frequency = <100000>;
  1143. lis331dlh: lis331dlh@18 {
  1144. compatible = "st,lis331dlh", "st,lis3lv02d";
  1145. reg = <0x18>;
  1146. Vdd-supply = <&lis3_reg>;
  1147. Vdd_IO-supply = <&lis3_reg>;
  1148. st,click-single-x;
  1149. st,click-single-y;
  1150. st,click-single-z;
  1151. st,click-thresh-x = <10>;
  1152. st,click-thresh-y = <10>;
  1153. st,click-thresh-z = <10>;
  1154. st,irq1-click;
  1155. st,irq2-click;
  1156. st,wakeup-x-lo;
  1157. st,wakeup-x-hi;
  1158. st,wakeup-y-lo;
  1159. st,wakeup-y-hi;
  1160. st,wakeup-z-lo;
  1161. st,wakeup-z-hi;
  1162. st,min-limit-x = <120>;
  1163. st,min-limit-y = <120>;
  1164. st,min-limit-z = <140>;
  1165. st,max-limit-x = <550>;
  1166. st,max-limit-y = <550>;
  1167. st,max-limit-z = <750>;
  1168. };
  1169. tsl2550: tsl2550@39 {
  1170. compatible = "taos,tsl2550";
  1171. reg = <0x39>;
  1172. };
  1173. tmp275: tmp275@48 {
  1174. compatible = "ti,tmp275";
  1175. reg = <0x48>;
  1176. };
  1177. tlv320aic3106: tlv320aic3106@1b {
  1178. compatible = "ti,tlv320aic3106";
  1179. reg = <0x1b>;
  1180. status = "okay";
  1181. AVDD-supply = <&vaux2_reg>;
  1182. IOVDD-supply = <&vaux2_reg>;
  1183. DRVDD-supply = <&vaux2_reg>;
  1184. DVDD-supply = <&vbat>;
  1185. };
  1186. };
  1187. &lcdc {
  1188. status = "okay";
  1189. };
  1190. &elm {
  1191. status = "okay";
  1192. };
  1193. &epwmss0 {
  1194. status = "okay";
  1195. ecap0: ecap@48300100 {
  1196. status = "okay";
  1197. pinctrl-names = "default";
  1198. pinctrl-0 = <&ecap0_pins>;
  1199. };
  1200. };
  1201. &gpmc {
  1202. status = "okay";
  1203. pinctrl-names = "default";
  1204. pinctrl-0 = <&nandflash_pins_s0>;
  1205. ranges = <0 0 0x08000000 0x80000000>;
  1206. nand@0,0 {
  1207. reg = <0 0 4>;
  1208. ti,nand-ecc-opt = "bch8";
  1209. ti,elm-id = <&elm>;
  1210. nand-bus-width = <8>;
  1211. gpmc,device-width = <1>;
  1212. gpmc,sync-clk-ps = <0>;
  1213. gpmc,cs-on-ns = <0>;
  1214. gpmc,cs-rd-off-ns = <44>;
  1215. gpmc,cs-wr-off-ns = <44>;
  1216. gpmc,adv-on-ns = <6>;
  1217. gpmc,adv-rd-off-ns = <34>;
  1218. gpmc,adv-wr-off-ns = <44>;
  1219. gpmc,we-on-ns = <0>;
  1220. gpmc,we-off-ns = <40>;
  1221. gpmc,oe-on-ns = <0>;
  1222. gpmc,oe-off-ns = <54>;
  1223. gpmc,access-ns = <64>;
  1224. gpmc,rd-cycle-ns = <82>;
  1225. gpmc,wr-cycle-ns = <82>;
  1226. gpmc,wait-on-read = "true";
  1227. gpmc,wait-on-write = "true";
  1228. gpmc,bus-turnaround-ns = <0>;
  1229. gpmc,cycle2cycle-delay-ns = <0>;
  1230. gpmc,clk-activation-ns = <0>;
  1231. gpmc,wait-monitoring-ns = <0>;
  1232. gpmc,wr-access-ns = <40>;
  1233. gpmc,wr-data-mux-bus-ns = <0>;
  1234. #address-cells = <1>;
  1235. #size-cells = <1>;
  1236. partition@0 {
  1237. label = "SPL";
  1238. reg = <0x00000000 0x00080000>;
  1239. };
  1240. partition@1 {
  1241. label = "Primary u-boot";
  1242. reg = <0x00080000 0x00100000>;
  1243. };
  1244. partition@2 {
  1245. label = "u-boot-env";
  1246. reg = <0x00180000 0x00080000>;
  1247. };
  1248. partition@3 {
  1249. label = "Secondary u-boot";
  1250. reg = <0x00200000 0x00100000>;
  1251. };
  1252. partition@4 {
  1253. label = "Primary dtb";
  1254. reg = <0x00300000 0x00080000>;
  1255. };
  1256. partition@5 {
  1257. label = "Secondary dtb";
  1258. reg = <0x00380000 0x00080000>;
  1259. };
  1260. partition@6 {
  1261. label = "Primary kernel";
  1262. reg = <0x00400000 0x00A00000>;
  1263. };
  1264. partition@7 {
  1265. label = "Secondary kernel";
  1266. reg = <0x00E00000 0x00A00000>;
  1267. };
  1268. partition@8 {
  1269. label = "Primary rootfs";
  1270. reg = <0x03000000 0x03000000>;
  1271. };
  1272. partition@9 {
  1273. label = "Secondary rootfs";
  1274. reg = <0x06000000 0x03000000>;
  1275. };
  1276. partition@10 {
  1277. label = "Primary user configuration";
  1278. reg = <0x09000000 0x00600000>;
  1279. };
  1280. partition@11 {
  1281. label = "Secondary user configuration";
  1282. reg = <0x09600000 0x00600000>;
  1283. };
  1284. partition@12 {
  1285. label = "Factory default configuration";
  1286. reg = <0x09C00000 0x00600000>;
  1287. };
  1288. partition@13 {
  1289. label = "Storage";
  1290. reg = <0x0A200000 0x75E00000>;
  1291. };
  1292. };
  1293. };
  1294. # 1 "./arch/arm/dts/tps65910.dtsi" 1
  1295. # 14 "./arch/arm/dts/tps65910.dtsi"
  1296. &tps {
  1297. compatible = "ti,tps65910";
  1298. regulators {
  1299. #address-cells = <1>;
  1300. #size-cells = <0>;
  1301. vrtc_reg: regulator@0 {
  1302. reg = <0>;
  1303. regulator-compatible = "vrtc";
  1304. };
  1305. vio_reg: regulator@1 {
  1306. reg = <1>;
  1307. regulator-compatible = "vio";
  1308. };
  1309. vdd1_reg: regulator@2 {
  1310. reg = <2>;
  1311. regulator-compatible = "vdd1";
  1312. };
  1313. vdd2_reg: regulator@3 {
  1314. reg = <3>;
  1315. regulator-compatible = "vdd2";
  1316. };
  1317. vdd3_reg: regulator@4 {
  1318. reg = <4>;
  1319. regulator-compatible = "vdd3";
  1320. };
  1321. vdig1_reg: regulator@5 {
  1322. reg = <5>;
  1323. regulator-compatible = "vdig1";
  1324. };
  1325. vdig2_reg: regulator@6 {
  1326. reg = <6>;
  1327. regulator-compatible = "vdig2";
  1328. };
  1329. vpll_reg: regulator@7 {
  1330. reg = <7>;
  1331. regulator-compatible = "vpll";
  1332. };
  1333. vdac_reg: regulator@8 {
  1334. reg = <8>;
  1335. regulator-compatible = "vdac";
  1336. };
  1337. vaux1_reg: regulator@9 {
  1338. reg = <9>;
  1339. regulator-compatible = "vaux1";
  1340. };
  1341. vaux2_reg: regulator@10 {
  1342. reg = <10>;
  1343. regulator-compatible = "vaux2";
  1344. };
  1345. vaux33_reg: regulator@11 {
  1346. reg = <11>;
  1347. regulator-compatible = "vaux33";
  1348. };
  1349. vmmc_reg: regulator@12 {
  1350. reg = <12>;
  1351. regulator-compatible = "vmmc";
  1352. };
  1353. vbb_reg: regulator@13 {
  1354. reg = <13>;
  1355. regulator-compatible = "vbb";
  1356. };
  1357. };
  1358. };
  1359. # 616 "<stdin>" 2
  1360. # 633 "<stdin>"
  1361. &tps {
  1362. vcc1-supply = <&vbat>;
  1363. vcc2-supply = <&vbat>;
  1364. vcc3-supply = <&vbat>;
  1365. vcc4-supply = <&vbat>;
  1366. vcc5-supply = <&vbat>;
  1367. vcc6-supply = <&vbat>;
  1368. vcc7-supply = <&vbat>;
  1369. vccio-supply = <&vbat>;
  1370. regulators {
  1371. vrtc_reg: regulator@0 {
  1372. regulator-always-on;
  1373. };
  1374. vio_reg: regulator@1 {
  1375. regulator-always-on;
  1376. };
  1377. vdd1_reg: regulator@2 {
  1378. regulator-name = "vdd_mpu";
  1379. regulator-min-microvolt = <912500>;
  1380. regulator-max-microvolt = <1312500>;
  1381. regulator-boot-on;
  1382. regulator-always-on;
  1383. };
  1384. vdd2_reg: regulator@3 {
  1385. regulator-name = "vdd_core";
  1386. regulator-min-microvolt = <912500>;
  1387. regulator-max-microvolt = <1150000>;
  1388. regulator-boot-on;
  1389. regulator-always-on;
  1390. };
  1391. vdd3_reg: regulator@4 {
  1392. regulator-always-on;
  1393. };
  1394. vdig1_reg: regulator@5 {
  1395. regulator-always-on;
  1396. };
  1397. vdig2_reg: regulator@6 {
  1398. regulator-always-on;
  1399. };
  1400. vpll_reg: regulator@7 {
  1401. regulator-always-on;
  1402. };
  1403. vdac_reg: regulator@8 {
  1404. regulator-always-on;
  1405. };
  1406. vaux1_reg: regulator@9 {
  1407. regulator-always-on;
  1408. };
  1409. vaux2_reg: regulator@10 {
  1410. regulator-always-on;
  1411. };
  1412. vaux33_reg: regulator@11 {
  1413. regulator-always-on;
  1414. };
  1415. vmmc_reg: regulator@12 {
  1416. regulator-min-microvolt = <1800000>;
  1417. regulator-max-microvolt = <3300000>;
  1418. regulator-always-on;
  1419. };
  1420. };
  1421. };
  1422. &mac {
  1423. pinctrl-names = "default", "sleep";
  1424. pinctrl-0 = <&cpsw_default>;
  1425. pinctrl-1 = <&cpsw_sleep>;
  1426. status = "okay";
  1427. };
  1428. &davinci_mdio {
  1429. pinctrl-names = "default", "sleep";
  1430. pinctrl-0 = <&davinci_mdio_default>;
  1431. pinctrl-1 = <&davinci_mdio_sleep>;
  1432. status = "okay";
  1433. };
  1434. &cpsw_emac0 {
  1435. phy_id = <&davinci_mdio>, <1>;
  1436. phy-mode = "mii";
  1437. };
  1438. &cpsw_emac1 {
  1439. phy_id = <&davinci_mdio>, <2>;
  1440. phy-mode = "mii";
  1441. };
  1442. &tscadc {
  1443. status = "okay";
  1444. tsc {
  1445. ti,wires = <4>;
  1446. ti,x-plate-resistance = <200>;
  1447. ti,coordinate-readouts = <5>;
  1448. ti,wire-config = <0x00 0x11 0x22 0x33>;
  1449. ti,charge-delay = <0x400>;
  1450. };
  1451. adc {
  1452. ti,adc-channels = <4 5 6 7>;
  1453. };
  1454. };
  1455. &mmc1 {
  1456. status = "okay";
  1457. vmmc-supply = <&vmmc_reg>;
  1458. bus-width = <4>;
  1459. pinctrl-names = "default";
  1460. pinctrl-0 = <&mmc1_pins_default>;
  1461. cd-gpios = <&gpio2 1 1>;
  1462. };
  1463. &mmc3 {
  1464. dmas = <&edma 12
  1465. &edma 13>;
  1466. dma-names = "tx", "rx";
  1467. status = "okay";
  1468. vmmc-supply = <&wlan_en_reg>;
  1469. bus-width = <4>;
  1470. pinctrl-names = "default";
  1471. pinctrl-0 = <&mmc3_pins &wlan_pins>;
  1472. ti,non-removable;
  1473. ti,needs-special-hs-handling;
  1474. cap-power-off-card;
  1475. keep-power-in-suspend;
  1476. #address-cells = <1>;
  1477. #size-cells = <0>;
  1478. wlcore: wlcore@0 {
  1479. compatible = "ti,wl1835";
  1480. reg = <2>;
  1481. interrupt-parent = <&gpio3>;
  1482. interrupts = <17 4>;
  1483. };
  1484. };
  1485. &edma {
  1486. ti,edma-xbar-event-map = /bits/ 16 <1 12
  1487. 2 13>;
  1488. };
  1489. &sham {
  1490. status = "okay";
  1491. };
  1492. &aes {
  1493. status = "okay";
  1494. };
  1495. &dcan1 {
  1496. status = "disabled";
  1497. pinctrl-names = "default";
  1498. pinctrl-0 = <&dcan1_pins_default>;
  1499. };