{"text_format":"2","workbook":"xlsx","n_sheets":5,"sheets":["Change List","MPU Pin Function Detail","工作表1","UART分配","CCS&CHA board"],"not_rendered":{"charts":0,"images":0,"macros":0,"external_links":0,"defined_names":0,"comments":0,"pivot_tables":0},"unopened":[],"bounds":{"document_bytes":16777216,"sheet_cells":100000,"run_cost":"one","rows_first":2000,"rows_last":500,"rows_between":2000,"halvings":0,"cell_chars":16384,"cell_head_chars":4096},"cells_cut":0,"cells_raw":0,"read":"whole","date_system":"1900"}

{"sheet":"Change List","index":0,"n_rows":5,"n_cols":5,"rows_kept":5,"cut":false,"hidden":false,"merged":[[31,2,31,3],[21,2,21,3],[14,2,14,3],[15,2,15,3],[16,2,16,3],[17,2,17,3],[27,2,27,3],[19,2,19,3],[20,2,20,3],[37,2,37,3],[33,2,33,3],[28,2,28,3],[32,2,32,3],[3,2,3,3],[5,2,5,3],[6,2,6,3],[7,2,7,3],[8,2,8,3],[4,2,4,3],[30,2,30,3],[35,2,35,3],[34,2,34,3],[10,2,10,3],[13,2,13,3],[29,2,29,3],[40,2,40,3],[41,2,41,3],[42,2,42,3],[43,2,43,3],[5,0,43,0],[5,1,43,1],[38,2,38,3],[39,2,39,3],[9,2,9,3],[26,2,26,3],[22,2,22,3],[23,2,23,3],[24,2,24,3],[18,2,18,3],[25,2,25,3],[36,2,36,3]]}
[]
["Revsion Change List:"]
[]
["Revsion","Stage","Describe",null,"Location"]
["S0","P0","New Release"]

{"sheet":"MPU Pin Function Detail","index":1,"n_rows":329,"n_cols":12,"rows_kept":329,"cut":false,"hidden":false,"merged":[[1,3,1,4]]}
[]
[null,null,"MCU Part Number : ","AM3352BZCZD80",null,"Version :","V1"]
[{"$nulls":5},"Date :","2018-12-20"]
[]
[null,"Pin","Pin name","Pin Define","Description","Electrical Name","Type","Default Value\n（Power on）","Action Value","default value","Explain"]
[null,"B6","AN0","AN0","ADC input","ADC_AIN0","Analog In"]
[null,"C7","AN1","AN1","ADC input","ADC_AIN1","Analog In"]
[null,"B7","AN2","AN2","ADC input","ADC_AIN2","Analog In"]
[null,"A7","AN3","AN3","ADC input","ADC_AIN3","Analog In"]
[null,"C8","AN4"]
[null,"B8","AN5"]
[null,"A8","AN6"]
[null,"C9","AN7"]
[null,"C10","CAP_VBB_MPU","CAP_VBB_MPU"]
[null,"D6","CAP_VDD_RTC","CAP_VDD_RTC"]
[null,"D9","CAP_VDD_SRAM_CORE","CAP_VDD_SRAM_CORE"]
[null,"D11","CAP_VDD_SRAM_MPU","CAP_VDD_SRAM_MPU"]
[null,"F3","DDR_A0","DDR_A0","DDR address bus"]
[null,"H1","DDR_A1","DDR_A1","DDR address bus"]
[null,"E4","DDR_A2","DDR_A2","DDR address bus"]
[null,"C3","DDR_A3","DDR_A3","DDR address bus"]
[null,"C2","DDR_A4","DDR_A4","DDR address bus"]
[null,"B1","DDR_A5","DDR_A5","DDR address bus"]
[null,"D5","DDR_A6","DDR_A6","DDR address bus"]
[null,"E2","DDR_A7","DDR_A7","DDR address bus"]
[null,"D4","DDR_A8","DDR_A8","DDR address bus"]
[null,"C1","DDR_A9","DDR_A9","DDR address bus"]
[null,"F4","DDR_A10","DDR_A10","DDR address bus"]
[null,"F2","DDR_A11","DDR_A11","DDR address bus"]
[null,"E3","DDR_A12","DDR_A12","DDR address bus"]
[null,"H3","DDR_A13","DDR_A13","DDR address bus"]
[null,"H4","DDR_A14","DDR_A14","DDR address bus"]
[null,"D3","DDR_A15","DDR_A15","DDR address bus",{"$nulls":5},"NC for MT41K256M16TW-107 "]
[null,"C4","DDR_BA0","DDR_BA0","DDR address bus"]
[null,"E1","DDR_BA1","DDR_BA1","DDR address bus"]
[null,"B3","DDR_BA2","DDR_BA2","DDR address bus"]
[null,"F1","DDR_CASn","DDR_CASn","DDR control"]
[null,"D2","DDR_CK","DDR_CK","DDR control"]
[null,"G3","DDR_CKE","DDR_CKE","DDR control"]
[null,"D1","DDR_CKn","DDR_CKn","DDR control"]
[null,"H2","DDR_CSn0","DDR_CSn0","DDR control"]
[null,"M3","DDR_D0","DDR_D0","DDR data bus"]
[null,"M4","DDR_D1","DDR_D1","DDR data bus"]
[null,"N1","DDR_D2","DDR_D2","DDR data bus"]
[null,"N2","DDR_D3","DDR_D3","DDR data bus"]
[null,"N3","DDR_D4","DDR_D4","DDR data bus"]
[null,"N4","DDR_D5","DDR_D5","DDR data bus"]
[null,"P3","DDR_D6","DDR_D6","DDR data bus"]
[null,"P4","DDR_D7","DDR_D7","DDR data bus"]
[null,"J1","DDR_D8","DDR_D8","DDR data bus"]
[null,"K1","DDR_D9","DDR_D9","DDR data bus"]
[null,"K2","DDR_D10","DDR_D10","DDR data bus"]
[null,"K3","DDR_D11","DDR_D11","DDR data bus"]
[null,"K4","DDR_D12","DDR_D12","DDR data bus"]
[null,"L3","DDR_D13","DDR_D13","DDR data bus"]
[null,"L4","DDR_D14","DDR_D14","DDR data bus"]
[null,"M1","DDR_D15","DDR_D15","DDR data bus"]
[null,"M2","DDR_DQM0","DDR_DQM0","DDR control"]
[null,"J2","DDR_DQM1","DDR_DQM1","DDR control"]
[null,"P1","DDR_DQS0","DDR_DQS0","DDR control"]
[null,"L1","DDR_DQS1","DDR_DQS1","DDR control"]
[null,"P2","DDR_DQSn0","DDR_DQSn0","DDR control"]
[null,"L2","DDR_DQSn1","DDR_DQSn1","DDR control"]
[null,"G1","DDR_ODT","DDR_ODT","DDR control"]
[null,"G4","DDR_RASn","DDR_RASn","DDR control"]
[null,"G2","DDR_RESETn","DDR_RESETn","DDR Reset"]
[null,"J4","DDR_VREF","DDR_VREF","DDR Vref",{"$nulls":5},"Vref = 1.65V"]
[null,"J3","DDR_VTP","DDR_VTP","DDR control"]
[null,"B2","DDR_Wen","DDR_Wen","DDR control"]
[null,"C18","ECAP0_IN_PWM0_OUT\nuart3_txd\nspi1_cs1\npr1_ecap0_ecap_capin_apwm_o\nspi1_sclk\nmmc0_sdwp\nxdma_event_intr2\ngpio0_7","ECAP0_IN_PWM0_OUT","Pilot PWM out","PILOT_OUT","Digital Out",null,null,0]
[null,"C14","EMU0\ngpio3_7","EMU0","For JTAG"]
[null,"B14","EMU1\ngpio3_8","EMU1","For JTAG"]
[null,"B18","EXTINTn","EXTINTn","For PMIC INT?","AM_EXTINTn","Digital In",null,null,null,"CP hardware detection interrupt input.\n1\\ : CP change from status C or B to A.\n0\\ : CP keep at status B or C."]
[null,"C5","EXT_WAKEUP","EXT_WAKEUP","Connect 10k ohm to 3.3V","AM_EXT_WAKEUP"]
[null,"R13","gpmc_a0\ngmii2_txen\nrgmii2_tctl\nrmii2_txen\ngpmc_a16\npr1_mii_mt1_clk\nehrpwm1_tripzone_input\ngpio1_16"]
[null,"V14","gpmc_a1\ngmii2_rxdv\nrgmii2_rctl\nmmc2_dat0\ngpmc_a17\npr1_mii1_txd3\nehrpwm0_synco\ngpio1_17"]
[null,"U14","gpmc_a2\ngmii2_txd3\nrgmii2_td3\nmmc2_dat1\ngpmc_a18\npr1_mii1_txd2\nehrpwm1A\ngpio1_18"]
[null,"T14","gpmc_a3\ngmii2_txd2\nrgmii2_td2\nmmc2_dat2\ngpmc_a19\npr1_mii1_txd1\nehrpwm1B\ngpio1_19"]
[null,"R14","gpmc_a4\ngmii2_txd1\nrgmii2_td1\nrmii2_txd1\ngpmc_a20\npr1_mii1_txd0\neQEP1A_in\ngpio1_20"]
[null,"V15","gpmc_a5\ngmii2_txd0\nrgmii2_td0\nrmii2_txd0\ngpmc_a21\npr1_mii1_rxd3\neQEP1B_in\ngpio1_21"]
[null,"U15","gpmc_a6\ngmii2_txclk\nrgmii2_tclk\nmmc2_dat4\ngpmc_a22\npr1_mii1_rxd2\neQEP1_index\ngpio1_22"]
[null,"T15","gpmc_a7\ngmii2_rxclk\nrgmii2_rclk\nmmc2_dat5\ngpmc_a23\npr1_mii1_rxd1\neQEP1_strobe\ngpio1_23"]
[null,"V16","gpmc_a8\ngmii2_rxd3\nrgmii2_rd3\nmmc2_dat6\ngpmc_a24\npr1_mii1_rxd0\nmcasp0_aclkx\ngpio1_24"]
[null,"U16","gpmc_a9\ngmii2_rxd2\nrgmii2_rd2\nmmc2_dat7 / rmii2_crs_dv\ngpmc_a25\npr1_mii_mr1_clk\nmcasp0_fsx\ngpio1_25"]
[null,"T16","gpmc_a10\ngmii2_rxd1\nrgmii2_rd1\nrmii2_rxd1\ngpmc_a26\npr1_mii1_rxdv\nmcasp0_axr0\ngpio1_26"]
[null,"V17","gpmc_a11\ngmii2_rxd0\nrgmii2_rd0\nrmii2_rxd0\ngpmc_a27\npr1_mii1_rxer\nmcasp0_axr1\ngpio1_27"]
[null,"U7","gpmc_ad0\nmmc1_dat0\ngpio1_0","gpmc_ad0","NAND Flash","AM_GPMC_AD0"]
[null,"V7","gpmc_ad1\nmmc1_dat1\ngpio1_1","gpmc_ad1","NAND Flash","AM_GPMC_AD1"]
[null,"R8","gpmc_ad2\nmmc1_dat2\ngpio1_2","gpmc_ad2","NAND Flash","AM_GPMC_AD2"]
[null,"T8","gpmc_ad3\nmmc1_dat3\ngpio1_3","gpmc_ad3","NAND Flash","AM_GPMC_AD3"]
[null,"U8","gpmc_ad4\nmmc1_dat4\ngpio1_4","gpmc_ad4","NAND Flash","AM_GPMC_AD4"]
[null,"V8","gpmc_ad5\nmmc1_dat5\ngpio1_5","gpmc_ad5","NAND Flash","AM_GPMC_AD5"]
[null,"R9","gpmc_ad6\nmmc1_dat6\ngpio1_6","gpmc_ad6","NAND Flash","AM_GPMC_AD6"]
[null,"T9","gpmc_ad7\nmmc1_dat7\ngpio1_7","gpmc_ad7","NAND Flash","AM_GPMC_AD7"]
[null,"U10","gpmc_ad8\nlcd_data23\nmmc1_dat0\nmmc2_dat4\nehrpwm2A\npr1_mii_mt0_clk\ngpio0_22"]
[null,"T10","gpmc_ad9\nlcd_data22\nmmc1_dat1\nmmc2_dat5\nehrpwm2B\npr1_mii0_col\ngpio0_23"]
[null,"T11","gpmc_ad10\nlcd_data21\nmmc1_dat2\nmmc2_dat6\nehrpwm2_tripzone_input\npr1_mii0_txen\ngpio0_26"]
[null,"U12","gpmc_ad11\nlcd_data20\nmmc1_dat3\nmmc2_dat7\nehrpwm0_synco\npr1_mii0_txd3\ngpio0_27"]
[null,"T12","gpmc_ad12\nlcd_data19\nmmc1_dat4\nmmc2_dat0\neQEP2A_in\npr1_mii0_txd2\npr1_pru0_pru_r30_14\ngpio1_12"]
[null,"R12","gpmc_ad13\nlcd_data18\nmmc1_dat5\nmmc2_dat1\neQEP2B_in\npr1_mii0_txd1\npr1_pru0_pru_r30_15\ngpio1_13"]
[null,"V13","gpmc_ad14\nlcd_data17\nmmc1_dat6\nmmc2_dat2\neQEP2_index\npr1_mii0_txd0\npr1_pru0_pru_r31_14\ngpio1_14"]
[null,"U13","gpmc_ad15\nlcd_data16\nmmc1_dat7\nmmc2_dat3\neQEP2_strobe\npr1_ecap0_ecap_capin_apwm_o\npr1_pru0_pru_r31_15\ngpio1_15"]
[null,"R7","gpmc_advn_ale\ntimer4\ngpio2_2","gpmc_advn_ale","NAND Flash","AM_GPMC_ADVn_ALE"]
[null,"T6","gpmc_be0n_cle\ntimer5\ngpio2_5","gpmc_be0n_cle","NAND Flash","AM_GPMC_BE0n_CLE"]
[null,"U18","gpmc_be1n\ngmii2_col\ngpmc_csn6\nmmc2_dat3\ngpmc_dir\npr1_mii1_rxlink\nmcasp0_aclkr\ngpio1_28"]
[null,"V12","gpmc_clk\nlcd_memory_clk\ngpmc_wait1\nmmc2_clk\npr1_mii1_crs\npr1_mdio_mdclk\nmcasp0_fsr\ngpio2_1"]
[null,"V6","gpmc_csn0\ngpio1_29","gpmc_csn0","NAND Flash","AM_GPMC_CSn0"]
[null,"U9","gpmc_csn1\ngpmc_clk\nmmc1_clk\npr1_edio_data_in6\npr1_edio_data_out6\npr1_pru1_pru_r30_12\npr1_pru1_pru_r31_12\ngpio1_30"]
[null,"V9","gpmc_csn2\ngpmc_be1n\nmmc1_cmd\npr1_edio_data_in7\npr1_edio_data_out7\npr1_pru1_pru_r30_13\npr1_pru1_pru_r31_13\ngpio1_31"]
[null,"T13","gpmc_csn3\ngpmc_a3\nrmii2_crs_dv\nmmc2_cmd\npr1_mii0_crs\npr1_mdio_data\nEMU4\ngpio2_0","gpio2_0","Interrupt for QCA7000","AM_QCA7k_INT","Digital In"]
[null,"T7","gpmc_oen_ren\ntimer7\ngpio2_3","gpmc_oen_ren","NAND Flash","AM_GPMC_OEn_Ren"]
[null,"T17","gpmc_wait0\ngmii2_crs\ngpmc_csn4\nrmii2_crs_dv\nmmc1_sdcd\npr1_mii1_col\nuart4_rxd\ngpio0_30","gpmc_wait0","NAND Flash","AM_GPMC_WAIT0"]
[null,"U6","gpmc_wen\ntimer6\ngpio2_4","gpmc_wen","NAND Flash","AM_GPMC_Wen"]
[null,"U17","gpmc_wpn\ngmii2_rxerr\ngpmc_csn5\nrmii2_rxerr\nmmc2_sdcd\npr1_mii1_txen\nuart4_txd\ngpio0_31","gpmc_wpn","NAND Flash","AM_GPMC_WPn"]
[null,"C17","I2C0_SDA\ntimer4\nuart2_ctsn\neCAP2_in_PWM2_out\ngpio3_5","I2C0_SDA","I2C to PMIC and RTC IC","AM_I2C0_SDA","Digital Out",null,null,0]
[null,"C16","I2C0_SCL\ntimer7\nuart2_rtsn\neCAP1_in_PWM1_out\ngpio3_6","I2C0_SCL","I2C to PMIC and RTC IC","AM_I2C0_SCL","Digital Out",null,null,0]
[null,"R6","lcd_ac_bias_en\ngpmc_a11\npr1_mii1_crs\npr1_edio_data_in5\npr1_edio_data_out5\npr1_pru1_pru_r30_11\npr1_pru1_pru_r31_11\ngpio2_25","gpio2_25","IO port for Communication Board.","AM_IO_2","Digital Out",null,null,0]
[null,"R1","lcd_data0\ngpmc_a0\npr1_mii_mt0_clk\nehrpwm2A\npr1_pru1_pru_r30_0\npr1_pru1_pru_r31_0\ngpio2_6",{"$nulls":7},"Boot"]
[null,"R2","lcd_data1\ngpmc_a1\npr1_mii0_txen\nehrpwm2B\npr1_pru1_pru_r30_1\npr1_pru1_pru_r31_1\ngpio2_7",{"$nulls":7},"Boot"]
[null,"R3","lcd_data2\ngpmc_a2\npr1_mii0_txd3\nehrpwm2_tripzone_input\npr1_pru1_pru_r30_2\npr1_pru1_pru_r31_2\ngpio2_8",{"$nulls":7},"Boot"]
[null,"R4","lcd_data3\ngpmc_a3\npr1_mii0_txd2\nehrpwm0_synco\npr1_pru1_pru_r30_3\npr1_pru1_pru_r31_3\ngpio2_9",{"$nulls":7},"Boot"]
[null,"T1","lcd_data4\ngpmc_a4\npr1_mii0_txd1\neQEP2A_in\npr1_pru1_pru_r30_4\npr1_pru1_pru_r31_4\ngpio2_10",{"$nulls":7},"Boot"]
[null,"T2","lcd_data5\ngpmc_a5\npr1_mii0_txd0\neQEP2B_in\npr1_pru1_pru_r30_5\npr1_pru1_pru_r31_5\ngpio2_11",{"$nulls":7},"Boot"]
[null,"T3","lcd_data6\ngpmc_a6\npr1_edio_data_in6\neQEP2_index\npr1_edio_data_out6\npr1_pru1_pru_r30_6\npr1_pru1_pru_r31_6\ngpio2_12",{"$nulls":7},"Boot"]
[null,"T4","lcd_data7\ngpmc_a7\npr1_edio_data_in7\neQEP2_strobe\npr1_edio_data_out7\npr1_pru1_pru_r30_7\npr1_pru1_pru_r31_7\ngpio2_13",{"$nulls":7},"Boot"]
[null,"U1","lcd_data8\ngpmc_a12\nehrpwm1_tripzone_input\nmcasp0_aclkx\nuart5_txd\npr1_mii0_rxd3\nuart2_ctsn\ngpio2_14"]
[null,"U2","lcd_data9\ngpmc_a13\nehrpwm0_synco\nmcasp0_fsx\nuart5_rxd\npr1_mii0_rxd2\nuart2_rtsn\ngpio2_15"]
[null,"U3","lcd_data10\ngpmc_a14\nehrpwm1A\nmcasp0_axr0\npr1_mii0_rxd1\nuart3_ctsn\ngpio2_16",{"$nulls":7},"Boot"]
[null,"U4","lcd_data11\ngpmc_a15\nehrpwm1B\nmcasp0_ahclkr\nmcasp0_axr2\npr1_mii0_rxd0\nuart3_rtsn\ngpio2_17",{"$nulls":7},"Boot"]
[null,"V2","lcd_data12\ngpmc_a16\neQEP1A_in\nmcasp0_aclkr\nmcasp0_axr2\npr1_mii0_rxlink\nuart4_ctsn\ngpio0_8",{"$nulls":7},"Boot","確認這個pin是否有支援外部中斷。"]
[null,"V3","lcd_data13\ngpmc_a17\neQEP1B_in\nmcasp0_fsr\nmcasp0_axr3\npr1_mii0_rxer\nuart4_rtsn\ngpio0_9",{"$nulls":7},"Boot"]
[null,"V4","lcd_data14\ngpmc_a18\neQEP1_index\nmcasp0_axr1\nuart5_rxd\npr1_mii_mr0_clk\nuart5_ctsn\ngpio0_10",{"$nulls":7},"Boot"]
[null,"T5","lcd_data15\ngpmc_a19\neQEP1_strobe\nmcasp0_ahclkx\nmcasp0_axr3\npr1_mii0_rxdv\nuart5_rtsn\ngpio0_11",{"$nulls":7},"Boot"]
[null,"R5","lcd_hsync\ngpmc_a9\ngpmc_a2\npr1_edio_data_in3\npr1_edio_data_out3\npr1_pru1_pru_r30_9\npr1_pru1_pru_r31_9\ngpio2_23","gpio2_23","IO port for Communication Board.","AM_IO_1","Digital Out",null,null,0]
[null,"V5","lcd_pclk\ngpmc_a10\npr1_mii0_crs\npr1_edio_data_in4\npr1_edio_data_out4\npr1_pru1_pru_r30_10\npr1_pru1_pru_r31_10\ngpio2_24","gpio2_24",null,"AM_QCA_PWR_RST","Digital Out",null,null,0]
[null,"U5","lcd_vsync\ngpmc_a8\ngpmc_a1\npr1_edio_data_in2\npr1_edio_data_out2\npr1_pru1_pru_r30_8\npr1_pru1_pru_r31_8\ngpio2_22","gpio2_22","Pilot Status E control","Pilot_state E","Digital Out",null,null,0]
[null,"B13","mcasp0_fsx\nehrpwm0B\nspi1_d0\nmmc1_sdcd\npr1_pru0_pru_r30_1\npr1_pru0_pru_r31_1\ngpio3_15","spi1_d0","SPI Data Out for QCA7000","AM_SPI1_D0","Digital Out",null,null,0]
[null,"B12","mcasp0_aclkr\neQEP0A_in\nmcasp0_axr2\nmcasp1_aclkx\nmmc0_sdwp\npr1_pru0_pru_r30_4\npr1_pru0_pru_r31_4\ngpio3_18"]
[null,"C12","mcasp0_ahclkr\nehrpwm0_synci\nmcasp0_axr2\nspi1_cs0\neCAP2_in_PWM2_out\npr1_pru0_pru_r30_3\npr1_pru0_pru_r31_3\ngpio3_17","spi1_cs0","SPI CS for QCA7000","AM_SPI1_CS0","Digital Out",null,null,0]
[null,"A14","mcasp0_ahclkx\neQEP0_strobe\nmcasp0_axr3\nmcasp1_axr1\nEMU4\npr1_pru0_pru_r30_7\npr1_pru0_pru_r31_7\ngpio3_21","gpio3_21","MMC0 card detect","MMC_Card_Det","Digital In"]
[null,"A13","mcasp0_aclkx\nehrpwm0A\nspi1_sclk\nmmc0_sdcd\npr1_pru0_pru_r30_0\npr1_pru0_pru_r31_0\ngpio3_14","spi1_sclk","SPI CLK for QCA7000","AM_SPI1_SCLK","Digital Out",null,null,0]
[null,"C13","mcasp0_fsr\neQEP0B_in\nmcasp0_axr3\nmcasp1_fsx\nEMU2\npr1_pru0_pru_r30_5\npr1_pru0_pru_r31_5\ngpio3_19"]
[null,"D12","mcasp0_axr0\nehrpwm0_tripzone_input\nspi1_d1\nmmc2_sdcd\npr1_pru0_pru_r30_2\npr1_pru0_pru_r31_2\ngpio3_16","spi1_d1","SPI Data In for QCA7000","AM_SPI1_D1","Digital In"]
[null,"D13","mcasp0_axr1\neQEP0_index\nmcasp1_axr0\nEMU3\npr1_pru0_pru_r30_6\npr1_pru0_pru_r31_6\ngpio3_20","gpio3_20","CP hardware detection control","AM_CP_HW_OFF","Digital Out",null,null,0,"0 : Enable CP hardware detection.\n1 : Disable CP hardware detection."]
[null,"M18","mdio_clk\ntimer5\nuart5_txd\nuart3_rtsn\nmmc0_sdwp\nmmc1_clk\nmmc2_clk\ngpio0_1","mdio_clk","Ethernet 1\nEthernet 2","AM_MDC"]
[null,"M17","mdio_data\ntimer6\nuart5_rxd\nuart3_ctsn\nmmc0_sdcd\nmmc1_cmd\nmmc2_cmd\ngpio0_0","mdio_data","Ethernet 1\nEthernet 2","AM_MDIO"]
[null,"J17","gmii1_rxdv\nlcd_memory_clk\nrgmii1_rctl\nuart5_txd\nmcasp1_aclkx\nmmc2_dat0\nmcasp0_aclkr\ngpio3_4","gmii1_rxdv","Ethernet 1","AM-RXDV_1"]
[null,"J16","gmii1_txen\nrmii1_txen\nrgmii1_tctl\ntimer4\nmcasp1_axr0\neQEP0_index\nmmc2_cmd\ngpio3_3","gmii1_txen","Ethernet 1","AM_TXEN_1"]
[null,"J15","gmii1_rxerr\nrmii1_rxerr\nspi1_d1\nI2C1_SCL\nmcasp1_fsx\nuart5_rtsn\nuart2_txd\ngpio3_2","gmii1_rxerr","Ethernet 1","AM-RXER_1"]
[null,"L18","gmii1_rxclk\nuart2_txd\nrgmii1_rclk\nmmc0_dat6\nmmc1_dat1\nuart1_dsrn\nmcasp0_fsx\ngpio3_10","gmii1_rxclk","Ethernet 1","AM-RXCLK_1"]
[null,"K18","gmii1_txclk\nuart2_rxd\nrgmii1_tclk\nmmc0_dat7\nmmc1_dat0\nuart1_dcdn\nmcasp0_aclkx\ngpio3_9","gmii1_txclk","Ethernet 1","AM_TXCLK_1"]
[null,"H16","gmii1_col\nrmii2_refclk\nspi1_sclk\nuart5_rxd\nmcasp1_axr2\nmmc2_dat3\nmcasp0_axr2\ngpio3_0","gmii1_col","Ethernet 1","AM_COL_1"]
[null,"H17","gmii1_crs\nrmii1_crs_dv\nspi1_d0\nI2C1_SDA\nmcasp1_aclkx\nuart5_ctsn\nuart2_rxd\ngpio3_1","rmii1_crs_dv","Ethernet 1","AM_CRS_DV_1"]
[null,"M16","gmii1_rxd0\nrmii1_rxd0\nrgmii1_rd0\nmcasp1_ahclkx\nmcasp1_ahclkr\nmcasp1_aclkr\nmcasp0_axr3\ngpio2_21","gmii1_rxd0","Ethernet 1","AM-RXD0_1"]
[null,"L15","gmii1_rxd1\nrmii1_rxd1\nrgmii1_rd1\nmcasp1_axr3\nmcasp1_fsr\neQEP0_strobe\nmmc2_clk\ngpio2_20","gmii1_rxd1","Ethernet 1","AM-RXD1_1"]
[null,"L16","gmii1_rxd2\nuart3_txd\nrgmii1_rd2\nmmc0_dat4\nmmc1_dat3\nuart1_rin\nmcasp0_axr1\ngpio2_19","gmii1_rxd2","Ethernet 1","AM-RXD2_1"]
[null,"L17","gmii1_rxd3\nuart3_rxd\nrgmii1_rd3\nmmc0_dat5\nmmc1_dat2\nuart1_dtrn\nmcasp0_axr0\ngpio2_18","gmii1_rxd3","Ethernet 1","AM-RXD3_1"]
[null,"K17","gmii1_txd0\nrmii1_txd0\nrgmii1_td0\nmcasp1_axr2\nmcasp1_aclkr\neQEP0B_in\nmmc1_clk\ngpio0_28","gmii1_txd0","Ethernet 1","AM_TXD0_1"]
[null,"K16","gmii1_txd1\nrmii1_txd1\nrgmii1_td1\nmcasp1_fsr\nmcasp1_axr1\neQEP0A_in\nmmc1_cmd\ngpio0_21","gmii1_txd1","Ethernet 1","AM_TXD1_1"]
[null,"K15","gmii1_txd2\ndcan0_rx\nrgmii1_td2\nuart4_txd\nmcasp1_axr0\nmmc2_dat2\nmcasp0_ahclkx\ngpio0_17","gmii1_txd2","Ethernet 1","AM_TXD2_1"]
[null,"J18","gmii1_txd3\ndcan0_tx\nrgmii1_td3\nuart4_rxd\nmcasp1_fsx\nmmc2_dat1\nmcasp0_fsr\ngpio0_16","gmii1_txd3","Ethernet 1","AM_TXD3_1"]
[null,"G18","mmc0_cmd\ngpmc_a25\nuart3_rtsn\nuart2_txd\ndcan1_rx\npr1_pru0_pru_r30_13\npr1_pru0_pru_r31_13\ngpio2_31","mmc0_cmd","MMC0 CMD","AM_MMC0_CMD","Digital Out",null,null,0]
[null,"G17","mmc0_clk\ngpmc_a24\nuart3_ctsn\nuart2_rxd\ndcan1_tx\npr1_pru0_pru_r30_12\npr1_pru0_pru_r31_12\ngpio2_30","mmc0_clk","MMC0 clock","AM_MMC0_CLK","Digital Out",null,null,0]
[null,"G16","mmc0_dat0\ngpmc_a23\nuart5_rtsn\nuart3_txd\nuart1_rin\npr1_pru0_pru_r30_11\npr1_pru0_pru_r31_11\ngpio2_29","mmc0_dat0","MMC0 data 0","AM_MMC0_DAT0","Digital Out",null,null,0]
[null,"G15","mmc0_dat1\ngpmc_a22\nuart5_ctsn\nuart3_rxd\nuart1_dtrn\npr1_pru0_pru_r30_10\npr1_pru0_pru_r31_10\ngpio2_28","mmc0_dat1","MMC0 data 1","AM_MMC0_DAT1","Digital Out",null,null,0]
[null,"F18","mmc0_dat2\ngpmc_a21\nuart4_rtsn\ntimer6\nuart1_dsrn\npr1_pru0_pru_r30_9\npr1_pru0_pru_r31_9\ngpio2_27","mmc0_dat2","MMC0 data 2","AM_MMC0_DAT2","Digital Out",null,null,0]
[null,"F17","mmc0_dat3\ngpmc_a20\nuart4_ctsn\ntimer5\nuart1_dcdn\npr1_pru0_pru_r30_8\npr1_pru0_pru_r31_8\ngpio2_26","mmc0_dat3","MMC0 data 3","AM_MMC0_DAT3","Digital Out",null,null,0]
[null,"C6","PMIC_POWER_EN","PMIC_POWER_EN","PMIC power enable","AM_PMIC_POWER_EN","Digital Out",null,null,1]
[null,"B15","porz","porz","AM3352 power on reset","AM_PWRONRSTn"]
[null,"A3","testout","NC"]
[null,"H18","rmii1_refclk\nxdma_event_intr2\nspi1_cs0\nuart5_txd\nmcasp1_axr3\nmmc0_pow\nmcasp1_ahclkx\ngpio0_29","gpio0_29","Ethernet PHY reset","Ethernet-Reset","Digital Out",null,null,1]
[null,"B4","ENZ_KALDO_1P8V","ENZ_KALDO_1P8V"]
[null,"B5","RTC_PORz","RTC_PORz","Reset RTC"]
[null,"A6","OSC1_IN","OSC1_IN","RTC crystal"]
[null,"A4","OSC1_OUT","OSC1_OUT","RTC crystal"]
[null,"A17","spi0_sclk\nuart2_rxd\nI2C2_SDA\nehrpwm0A\npr1_uart0_cts_n\npr1_edio_sof\nEMU2\ngpio0_2"]
[null,"A16","spi0_cs0\nmmc2_sdwp\nI2C1_SCL\nehrpwm0_synci\npr1_uart0_txd\npr1_edio_data_in1\npr1_edio_data_out1\ngpio0_5"]
[null,"C15","spi0_cs1\nuart3_rxd\neCAP1_in_PWM1_out\nmmc0_pow\nxdma_event_intr2\nmmc0_sdcd\nEMU4\ngpio0_6",{"$nulls":4},"LCM communication","AM_UART3_RXD"]
[null,"B17","spi0_d0\nuart2_txd\nI2C2_SCL\nehrpwm0B\npr1_uart0_rts_n\npr1_edio_latch_in\nEMU3\ngpio0_3"]
[null,"B16","spi0_d1\nmmc1_sdwp\nI2C1_SDA\nehrpwm0_tripzone_input\npr1_uart0_rxd\npr1_edio_data_in0\npr1_edio_data_out0\ngpio0_4"]
[null,"A12","TCK","TCK","For JTAG"]
[null,"B11","TDI","TDI","For JTAG"]
[null,"A11","TDO","TDO","For JTAG"]
[null,"C11","TMS","TMS","For JTAG"]
[null,"B10","nTRST","nTRST","For JTAG"]
[null,"E16","uart0_txd\nspi1_cs1\ndcan0_rx\nI2C2_SCL\neCAP1_in_PWM1_out\npr1_pru1_pru_r30_15\npr1_pru1_pru_r31_15\ngpio1_11","uart0_txd","For debug","AM_UART0_TXD"]
[null,"E18","uart0_ctsn\nuart4_rxd\ndcan1_tx\nI2C1_SDA\nspi1_d0\ntimer7\npr1_edc_sync0_out\ngpio1_8"]
[null,"E15","uart0_rxd\nspi1_cs0\ndcan0_tx\nI2C2_SDA\neCAP2_in_PWM2_out\npr1_pru1_pru_r30_14\npr1_pru1_pru_r31_14\ngpio1_10","uart0_rxd","For debug","AM_UART0_RXD"]
[null,"E17","uart0_rtsn\nuart4_txd\ndcan1_rx\nI2C1_SCL\nspi1_d1\nspi1_cs0\npr1_edc_sync1_out\ngpio1_9"]
[null,"D15","uart1_txd\nmmc2_sdwp\ndcan1_rx\nI2C1_SCL\npr1_uart0_txd\npr1_pru0_pru_r31_16\ngpio0_15"]
[null,"D16","uart1_rxd\nmmc1_sdwp\ndcan1_tx\nI2C1_SDA\npr1_uart0_rxd\npr1_pru1_pru_r31_16\ngpio0_14"]
[null,"D17","uart1_rtsn\ntimer5\ndcan0_rx\nI2C2_SCL\nspi1_cs1\npr1_uart0_rts_n\npr1_edc_latch1_in\ngpio0_13","dcan0_rx","For communication BD","AM_DCAN0_RX"]
[null,"D18","uart1_ctsn\ntimer6\ndcan0_tx\nI2C2_SDA\nspi1_cs0\npr1_uart0_cts_n\npr1_edc_latch0_in\ngpio0_12","dcan0_tx","For communication BD","AM_DCAN0_TX"]
[null,"M15","USB0_CE"]
[null,"P15","USB0_VBUS"]
[null,"N18","USB0_DM"]
[null,"F16","USB0_DRVVBUS\ngpio0_18"]
[null,"P16","USB0_ID"]
[null,"N17","USB0_DP"]
[null,"P18","USB1_CE"]
[null,"P17","USB1_ID"]
[null,"T18","USB1_VBUS"]
[null,"R17","USB1_DP"]
[null,"F15","USB1_DRVVBUS\ngpio3_13"]
[null,"R18","USB1_DM"]
[null,"N16","VDDA1P8V_USB0","VDDA1P8V_USB0"]
[null,"R16","VDDA1P8V_USB1","VDDA1P8V_USB1"]
[null,"N15","VDDA3P3V_USB0","VDDA3P3V_USB0"]
[null,"R15","VDDA3P3V_USB1","VDDA3P3V_USB1"]
[null,"D8","VDDA_ADC","VDDA_ADC"]
[null,"E6","VDDS","VDDS"]
[null,"E14","VDDS","VDDS"]
[null,"F9","VDDS","VDDS"]
[null,"K13","VDDS","VDDS"]
[null,"N6","VDDS","VDDS"]
[null,"P9","VDDS","VDDS"]
[null,"P14","VDDS","VDDS"]
[null,"P7","VDDSHV1","VDDSHV1"]
[null,"P8","VDDSHV1","VDDSHV1"]
[null,"P10","VDDSHV2","VDDSHV2"]
[null,"P11","VDDSHV2","VDDSHV2"]
[null,"P12","VDDSHV3","VDDSHV3"]
[null,"P13","VDDSHV3","VDDSHV3"]
[null,"H14","VDDSHV4","VDDSHV4"]
[null,"J14","VDDSHV4","VDDSHV4"]
[null,"K14","VDDSHV5","VDDSHV5"]
[null,"L14","VDDSHV5","VDDSHV5"]
[null,"E10","VDDSHV6","VDDSHV6"]
[null,"E11","VDDSHV6","VDDSHV6"]
[null,"E12","VDDSHV6","VDDSHV6"]
[null,"E13","VDDSHV6","VDDSHV6"]
[null,"F14","VDDSHV6","VDDSHV6"]
[null,"G14","VDDSHV6","VDDSHV6"]
[null,"N5","VDDSHV6","VDDSHV6"]
[null,"P5","VDDSHV6","VDDSHV6"]
[null,"P6","VDDSHV6","VDDSHV6"]
[null,"E5","VDDS_DDR","VDDS_DDR"]
[null,"F5","VDDS_DDR","VDDS_DDR"]
[null,"G5","VDDS_DDR","VDDS_DDR"]
[null,"H5","VDDS_DDR","VDDS_DDR"]
[null,"J5","VDDS_DDR","VDDS_DDR"]
[null,"K5","VDDS_DDR","VDDS_DDR"]
[null,"L5","VDDS_DDR","VDDS_DDR"]
[null,"R11","VDDS_OSC","VDDS_OSC"]
[null,"R10","VDDS_PLL_CORE_LCD","VDDS_PLL_CORE_LCD"]
[null,"E7","VDDS_PLL_DDR","VDDS_PLL_DDR"]
[null,"H15","VDDS_PLL_MPU","VDDS_PLL_MPU"]
[null,"D7","VDDS_RTC","VDDS_RTC"]
[null,"E9","VDDS_SRAM_CORE_BG","VDDS_SRAM_CORE_BG"]
[null,"D10","VDDS_SRAM_MPU_BB","VDDS_SRAM_MPU_BB"]
[null,"F6","VDD_CORE","VDD_CORE"]
[null,"F7","VDD_CORE","VDD_CORE"]
[null,"G6","VDD_CORE","VDD_CORE"]
[null,"G7","VDD_CORE","VDD_CORE"]
[null,"G10","VDD_CORE","VDD_CORE"]
[null,"H11","VDD_CORE","VDD_CORE"]
[null,"J12","VDD_CORE","VDD_CORE"]
[null,"K6","VDD_CORE","VDD_CORE"]
[null,"K8","VDD_CORE","VDD_CORE"]
[null,"K12","VDD_CORE","VDD_CORE"]
[null,"L6","VDD_CORE","VDD_CORE"]
[null,"L7","VDD_CORE","VDD_CORE"]
[null,"L8","VDD_CORE","VDD_CORE"]
[null,"L9","VDD_CORE","VDD_CORE"]
[null,"M11","VDD_CORE","VDD_CORE"]
[null,"M13","VDD_CORE","VDD_CORE"]
[null,"N8","VDD_CORE","VDD_CORE"]
[null,"N9","VDD_CORE","VDD_CORE"]
[null,"N12","VDD_CORE","VDD_CORE"]
[null,"N13","VDD_CORE","VDD_CORE"]
[null,"F10","VDD_MPU","VDD_MPU"]
[null,"F11","VDD_MPU","VDD_MPU"]
[null,"F12","VDD_MPU","VDD_MPU"]
[null,"F13","VDD_MPU","VDD_MPU"]
[null,"G13","VDD_MPU","VDD_MPU"]
[null,"H13","VDD_MPU","VDD_MPU"]
[null,"J13","VDD_MPU","VDD_MPU"]
[null,"A2","VDD_MPU_MON","VDD_MPU_MON"]
[null,"M5","VPP"]
[null,"A9","VREFN","VREFN","Referance voltage input","DGND"]
[null,"B9","VREFP","VREFP","Referance voltage input","AM_VREFP"]
[null,"A1","VSS","VSS"]
[null,"A18","VSS","VSS"]
[null,"F8","VSS","VSS"]
[null,"G8","VSS","VSS"]
[null,"G9","VSS","VSS"]
[null,"G11","VSS","VSS"]
[null,"G12","VSS","VSS"]
[null,"H6","VSS","VSS"]
[null,"H7","VSS","VSS"]
[null,"H8","VSS","VSS"]
[null,"H9","VSS","VSS"]
[null,"H10","VSS","VSS"]
[null,"H12","VSS","VSS"]
[null,"J6","VSS","VSS"]
[null,"J7","VSS","VSS"]
[null,"J8","VSS","VSS"]
[null,"J9","VSS","VSS"]
[null,"J10","VSS","VSS"]
[null,"J11","VSS","VSS"]
[null,"K7","VSS","VSS"]
[null,"K9","VSS","VSS"]
[null,"K10","VSS","VSS"]
[null,"K11","VSS","VSS"]
[null,"L10","VSS","VSS"]
[null,"L11","VSS","VSS"]
[null,"L12","VSS","VSS"]
[null,"L13","VSS","VSS"]
[null,"M6","VSS","VSS"]
[null,"M7","VSS","VSS"]
[null,"M8","VSS","VSS"]
[null,"M9","VSS","VSS"]
[null,"M10","VSS","VSS"]
[null,"M12","VSS","VSS"]
[null,"N7","VSS","VSS"]
[null,"N10","VSS","VSS"]
[null,"N11","VSS","VSS"]
[null,"V1","VSS","VSS"]
[null,"V18","VSS","VSS"]
[null,"E8","VSSA_ADC","VSSA_ADC"]
[null,"M14","VSSA_USB","VSSA_USB"]
[null,"N14","VSSA_USB","VSSA_USB"]
[null,"V11","VSS_OSC","VSS_OSC","Main Crystal ground","DGND","Power"]
[null,"A5","VSS_RTC","VSS_RTC","RTC crystal ground","DGND","Power"]
[null,"A10","nRESETIN_OUT","nRESETIN_OUT","Reset input"]
[null,"A15","xdma_event_intr0\ntimer4\nclkout1\nspi1_cs1\npr1_pru1_pru_r31_16\nEMU2\ngpio0_19"]
[null,"D14","xdma_event_intr1\ntclkin\nclkout2\ntimer7\npr1_pru0_pru_r31_16\nEMU3\ngpio0_20"]
[null,"V10","OSC0_IN","OSC0_IN","Main Crystal","AM335X_OSC0_IN"]
[null,"U11","OSC0_OUT","OSC0_OUT","Main Crystal","AM335X_OSC0_OUT"]

{"sheet":"工作表1","index":2,"n_rows":15,"n_cols":4,"rows_kept":15,"cut":false,"hidden":false,"merged":[]}
[]
[null,5]
[null,68100]
[null,15000]
[null,{"$f":"5*B4/(B3+B4)","v":0.90252707581227432}]
[]
[null,null,null,"CP_Feedback"]
["RE62",56200,null,12]
["RE63",942000,null,9]
["Pilot_Sense",{"$f":" (1+B8/B9)*0.9 - (B8/B9)*D8","v":0.23777070063694272},null,6]
[null,{"$f":" (1+B8/B9)*0.9 - (B8/B9)*D9","v":0.41675159235668802},null,3]
[null,{"$f":" (1+B8/B9)*0.9 - (B8/B9)*D10","v":0.5957324840764332},null,0]
[null,{"$f":" (1+B8/B9)*0.9 - (B8/B9)*D11","v":0.77471337579617838},null,-12]
[null,{"$f":" (1+B8/B9)*0.9 - (B8/B9)*D12","v":0.95369426751592368}]
[null,{"$f":" (1+B8/B9)*0.9 - (B8/B9)*D13","v":1.6696178343949046}]

{"sheet":"UART分配","index":3,"n_rows":2,"n_cols":10,"rows_kept":2,"cut":false,"hidden":false,"merged":[]}
[null,null,"STM32F407",{"$nulls":6},"AM3352"]
["Debug port","RS232","x",{"$nulls":6},"UART0"]

{"sheet":"CCS&CHA board","index":4,"n_rows":36,"n_cols":4,"rows_kept":36,"cut":false,"hidden":false,"merged":[]}
["CCS"]
["Pin no.","define","Net name","Description"]
[1,"S14V","S14V"]
[2,"SGND","SGND"]
[3,null,"CP"]
[4,null,"CCS_Proximity"]
[5,null,"CCS_NTC1_P"]
[6,null,"CCS_NTC2_P"]
[7,null,"SGND"]
[8,null,"GB_CC1"]
[9,null,"GB_CC2"]
[10,null,"NC"]
[11,null,"Board_Proximity"]
[12,null,"ID_1"]
[13,null,"ID_2"]
[14,null,"SGND"]
[15,null,"IO_1"]
[16,null,"IO_2"]
[17,null,"SGND"]
[18,null,"CANH_Gun BD"]
[19,null,"CANL_Gun BD"]
[20,null,"NC"]
[21,null,"SGND"]
[22,null,"CHA_D1"]
[23,null,"CHA_D2"]
[24,null,"CHA_Proximity"]
[25,null,"CHA_Permission"]
[26,null,"SGND"]
[27,null,"CHA_CAN_H"]
[28,null,"CHA_CAN_L"]
[29,null,"CHA_NTC1_P"]
[30,null,"CHA_NTC2_P"]
[31,null,"GB_A+"]
[32,null,"GB_A-"]
[33,null,"CHA/GB gun lock"]
[34,null,"CHA/GB gun detect"]