[Tag][AW-Regular]

2022-08-11 / EASON YANG
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1. Tag: Tag AW-Regular project.

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1.  AW-Regular project
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FRIMWARE VERSION: V0.71.XX.XXXX.PX

board-support/linux-4.9.59+gitAUTOINC+a75d8e9305-ga75d8e9305/.version

@@ -1 +1 @@
-44
+46

board-support/linux-4.9.59+gitAUTOINC+a75d8e9305-ga75d8e9305/arch/arm/boot/dts/.am335x-evm.dtb.dts.tmp

@@ -1203,11 +1203,7 @@
    0x1B0 (((1 << 3)) | 7)
    0x1B4 (((1 << 5) | (1 << 3)) | 7)
 
-   0x060 (((1 << 3)) | 7)
-   0x06C (((1 << 3)) | 7)
 
-
-   0x088 (((1 << 5) | (1 << 3)) | 7)
    0x08C (((1 << 3)) | 7)
    0x0A0 (((1 << 3)) | 7)
    0x0A4 (((1 << 3)) | 7)
@@ -1217,11 +1213,8 @@
    0x0B4 (((1 << 3)) | 7)
    0x0E8 (((1 << 5) | (1 << 3)) | 7)
    0x0E0 (((1 << 3)) | 7)
-   0x0EC (((1 << 3)) | 7)
-
 
    0x1A0 (((1 << 3)) | 7)
-   0x1A4 (((1 << 3)) | 7)
    0x1A8 (((1 << 3)) | 7)
   >;
  };
@@ -1267,7 +1260,7 @@
    0x164 (0 | 1)
   >;
  };
-# 144 "arch/arm/boot/dts/am335x-evm.dts"
+# 137 "arch/arm/boot/dts/am335x-evm.dts"
  clkout2_pin: pinmux_clkout2_pin {
   pinctrl-single,pins = <
    0x1b4 (0 | 3)
@@ -1391,15 +1384,7 @@
    0x17C (((1 << 5)) | 2)
   >;
  };
-# 287 "arch/arm/boot/dts/am335x-evm.dts"
- spi1_pins: spi1_pins {
-                pinctrl-single,pins = <
-                        ((((0x990)) & 0xffff) - (0x0800)) (((1 << 5) | (1 << 4)) | 3)
-                        ((((0x994)) & 0xffff) - (0x0800)) (((1 << 5) | (1 << 4)) | 3)
-                        ((((0x998)) & 0xffff) - (0x0800)) (((1 << 4)) | 3)
-                        ((((0x99C)) & 0xffff) - (0x0800)) (((1 << 4)) | 3)
-                >;
-        };
+# 281 "arch/arm/boot/dts/am335x-evm.dts"
 };
 
 
@@ -1431,7 +1416,7 @@
 
  status = "okay";
 };
-# 334 "arch/arm/boot/dts/am335x-evm.dts"
+# 320 "arch/arm/boot/dts/am335x-evm.dts"
 &i2c0 {
  pinctrl-names = "default";
  pinctrl-0 = <&i2c0_pins>;
@@ -1495,7 +1480,7 @@
 &elm {
  status = "okay";
 };
-# 418 "arch/arm/boot/dts/am335x-evm.dts"
+# 404 "arch/arm/boot/dts/am335x-evm.dts"
 &gpmc {
  status = "okay";
  pinctrl-names = "default", "sleep";
@@ -1604,7 +1589,7 @@
 /include/ "tps65217.dtsi"
 
 &tps {
-# 543 "arch/arm/boot/dts/am335x-evm.dts"
+# 529 "arch/arm/boot/dts/am335x-evm.dts"
  ti,pmic-shutdown-controller;
 
  regulators {
@@ -1673,7 +1658,7 @@
   phy-mode = "mii";
 
 };
-# 620 "arch/arm/boot/dts/am335x-evm.dts"
+# 606 "arch/arm/boot/dts/am335x-evm.dts"
 &tscadc {
  status = "okay";
 
@@ -1720,19 +1705,3 @@
  pinctrl-names = "default";
  pinctrl-0 = <&dcan0_pins_default>;
 };
-# 681 "arch/arm/boot/dts/am335x-evm.dts"
-&spi1 {
-        status = "okay";
-        pinctrl-names = "default";
-        pinctrl-0 = <&spi1_pins>;
-        qca7000@0 {
-                compatible = "qca,qca7000";
-                reg = <0>;
-                interrupt-parent = <&gpio2>;
-                interrupts = <0 1>;
-                spi-cpha;
-                spi-cpol;
-                spi-max-frequency = <10000000>;
-                qca,legacy-mode = <0>;
-        };
-};

board-support/linux-4.9.59+gitAUTOINC+a75d8e9305-ga75d8e9305/arch/arm/boot/dts/am335x-evm.dts

@@ -65,15 +65,11 @@
 		
 			/** Offset: 0x800 */
 			/** GPIO 0 */ 
-			0x144 (PIN_INPUT | MUX_MODE7)    			/* RMII1_REF_CLK		=>	GPIO0_29 */	/*USB 0 OCP detection*/
+			0x144 (PIN_INPUT | MUX_MODE7)    		/* RMII1_REF_CLK	=>	GPIO0_29 */	/*USB 0 OCP detection*/
 			0x1B0 (PIN_OUTPUT | MUX_MODE7)			/*XDMA_EVENT_INTR0	=>	GPIO0_19 */	/*AM_RFID_RST*/
 			0x1B4 (PIN_INPUT | MUX_MODE7)			/*XDMA_EVENT_INTR1	=>	GPIO0_20 */	/*AM_RFID_ICC*/
-			/** GPIO 1 */		
-			0x060 (PIN_OUTPUT | MUX_MODE7)			/*GPIO1_24*/
-			0x06C (PIN_OUTPUT | MUX_MODE7)			/* (V17) gpmc_a11.gpio1[27] */
-
+			/** GPIO 1 */			
 			/** GPIO 2 */
-			0x088 (PIN_INPUT | MUX_MODE7)   		/* CCS=>GPMC_CSn3.GPIO2_0*/
 			0x08C (PIN_OUTPUT | MUX_MODE7)			/*GPMC_CLK	=>	GPIO2_1*/	/*Speaker*/
 			0x0A0 (PIN_OUTPUT | MUX_MODE7)			/*LCD_DATA0	=>	GPIO2_6*/	/*Panel LED control-BB_LEDR1*/
 			0x0A4 (PIN_OUTPUT | MUX_MODE7)			/*LCD_DATA1	=>	GPIO2_7*/	/*Panel LED control-BB_LEDG1*/
@@ -83,11 +79,8 @@
 			0x0B4 (PIN_OUTPUT | MUX_MODE7)			/*LCD_DATA5	=>	GPIO2_11*/	/*Panel LED control-BB_LEDB2*/
 			0x0E8 (PIN_INPUT | MUX_MODE7)			/*LCD_PCLK	=>	GPIO2_24*/	/*communication board proximity*/
 			0x0E0 (PIN_OUTPUT | MUX_MODE7)			/*LCD_VSYNC	=>	GPIO2_22*/	/*Breath LED*/
-			0x0EC (PIN_OUTPUT | MUX_MODE7)			/* CCSEthernet-Reset=>LCD_AC_BIAS_EN.GPIO2_25*/
-			
 			/** GPIO 3 */
-			0x1A0 (PIN_OUTPUT | MUX_MODE7)                  /* MCASP0_AXR1  =>      GPIO3_18 */     /*control 4G reset pin*/
-			0x1A4 (PIN_OUTPUT | MUX_MODE7)			/* MCASP0_FSR.GPIO3_19 */
+			0x1A0 (PIN_OUTPUT | MUX_MODE7)          /* MCASP0_AXR1  =>  GPIO3_18 */ /*control 4G reset pin*/
 			0x1A8 (PIN_OUTPUT | MUX_MODE7)			/* MCASP0_AXR1	=>	GPIO3_20 */	/*control MCU to output CP PWM*/
 		>;
 	};
@@ -282,16 +275,9 @@
 		pinctrl-single,pins =< 
 			0x0A4 (PIN_OUTPUT | MUX_MODE3)	/* LCD_DATA1.eHRPWM2B */
 		>;                
-    	};	 
+    };	
+	 
 #endif  
-	spi1_pins: spi1_pins {
-                pinctrl-single,pins = <
-                        AM33XX_IOPAD(0x990, PIN_INPUT_PULLUP | MUX_MODE3) /* MCASP0_ACLKX.AM_SPI1_SCLK */
-                        AM33XX_IOPAD(0x994, PIN_INPUT_PULLUP | MUX_MODE3) /* MCASP0_FSX.AM_SPI1_D0 */
-                        AM33XX_IOPAD(0x998, PIN_OUTPUT_PULLUP | MUX_MODE3) /* MCASP0_AXR0.AM_SPI1_D1 */
-                        AM33XX_IOPAD(0x99C, PIN_OUTPUT_PULLUP | MUX_MODE3) /* MCASP0_AHCLKR.AM_SPI1_CS0 */
-                >;
-        };
 };
 
 
@@ -670,27 +656,3 @@
 	pinctrl-0 = <&dcan1_pins_default>;
 };
 #endif
-
-/*
-The QCA7000 acts as a SPI slave and uses Mode 3: CPOL=1, CPHA=1.
-SPI data width is 8 bit. The SPI CLK period should not be less than 83.3 ns
-The SPI should be used in burst mode, meaning that the chip select is held low during a complete SPI message.
- Note: The SPI lines between Host CPU and QCA7000 should be kept as short as possible.
-
-*/
-&spi1 {
-        status = "okay";
-        pinctrl-names = "default";
-        pinctrl-0 = <&spi1_pins>;
-        qca7000@0 {
-                compatible = "qca,qca7000";
-                reg = <0>;
-                interrupt-parent = <&gpio2>; /* GPIO2_0 */
-                interrupts = <0 1>;                     /* GPIO2_0 */
-                spi-cpha;                                        /* SPI mode: CPHA=1 */
-                spi-cpol;                                        /* SPI mode: CPOL=1 */
-                spi-max-frequency = <10000000>;  /* freq: 10MHz */
-                qca,legacy-mode = <0>;            /* Burst mode */
-        };
-};
-

board-support/u-boot-2017.01+gitAUTOINC+340fb36f04-g340fb36f04/arch/arm/dts/.am335x-evm.dtb.cmd

@@ -8,8 +8,8 @@ deps_arch/arm/dts/am335x-evm.dtb := \
   arch/arm/dts/include/dt-bindings/pinctrl/omap.h \
   arch/arm/dts/skeleton.dtsi \
   arch/arm/dts/include/dt-bindings/interrupt-controller/irq.h \
+  arch/arm/dts/tps65910.dtsi \
   arch/arm/dts/am33xx-clocks.dtsi \
-  arch/arm/dts/tps65217.dtsi \
 
 arch/arm/dts/am335x-evm.dtb: $(deps_arch/arm/dts/am335x-evm.dtb)
 

board-support/u-boot-2017.01+gitAUTOINC+340fb36f04-g340fb36f04/arch/arm/dts/.am335x-evm.dtb.d.dtc.tmp

@@ -1 +1 @@
-arch/arm/dts/am335x-evm.dtb: arch/arm/dts/.am335x-evm.dtb.dts.tmp arch/arm/dts/am33xx-clocks.dtsi arch/arm/dts/tps65217.dtsi
+arch/arm/dts/am335x-evm.dtb: arch/arm/dts/.am335x-evm.dtb.dts.tmp arch/arm/dts/am33xx-clocks.dtsi

board-support/u-boot-2017.01+gitAUTOINC+340fb36f04-g340fb36f04/arch/arm/dts/.am335x-evm.dtb.d.pre.tmp

@@ -3,4 +3,5 @@
  arch/arm/dts/include/dt-bindings/pinctrl/am33xx.h \
  arch/arm/dts/include/dt-bindings/pinctrl/omap.h \
  arch/arm/dts/skeleton.dtsi \
- arch/arm/dts/include/dt-bindings/interrupt-controller/irq.h
+ arch/arm/dts/include/dt-bindings/interrupt-controller/irq.h \
+ arch/arm/dts/tps65910.dtsi

board-support/u-boot-2017.01+gitAUTOINC+340fb36f04-g340fb36f04/arch/arm/dts/.am335x-evm.dtb.dts.tmp

@@ -925,7 +925,7 @@
 
  cpus {
   cpu@0 {
-   cpu0-supply = <&dcdc2_reg>;
+   cpu0-supply = <&vdd1_reg>;
   };
  };
 
@@ -1067,10 +1067,9 @@
   pinctrl-single,pins = <
    0x54 (0 | 7)
    0x58 (0 | 7)
-   0x60 (0 | 7)
    0x64 (((1 << 5)) | 7)
    0x68 (((1 << 5)) | 7)
-   0x6c (0 | 7)
+   0x6c (((1 << 5)) | 7)
   >;
  };
 
@@ -1198,7 +1197,7 @@
    0x14c (((1 << 5)) | 7)
   >;
  };
-# 305 "<stdin>"
+# 304 "<stdin>"
  mmc1_pins_default: pinmux_mmc1_pins {
   pinctrl-single,pins = <
    0x0F0 (((1 << 5) | (1 << 4)) | 0)
@@ -1262,7 +1261,7 @@
    0xec (((1 << 3)) | 0)
   >;
  };
-# 378 "<stdin>"
+# 377 "<stdin>"
  dcan1_pins_default: dcan1_pins_default {
   pinctrl-single,pins = <
    0x168 (((1 << 3)) | 2)
@@ -1292,8 +1291,8 @@
  status = "okay";
  clock-frequency = <400000>;
 
- tps: tps@24 {
-  reg = <0x24>;
+ tps: tps@2d {
+  reg = <0x2d>;
  };
 };
 
@@ -1377,9 +1376,9 @@
   status = "okay";
 
 
-  AVDD-supply = <&ldo2_reg>;
-  IOVDD-supply = <&ldo2_reg>;
-  DRVDD-supply = <&ldo2_reg>;
+  AVDD-supply = <&vaux2_reg>;
+  IOVDD-supply = <&vaux2_reg>;
+  DRVDD-supply = <&vaux2_reg>;
   DVDD-supply = <&vbat>;
  };
 };
@@ -1407,7 +1406,7 @@
  pinctrl-names = "default";
  pinctrl-0 = <&nandflash_pins_s0>;
 
- ranges = <0 0 0x08000000 0x40000000>;
+ ranges = <0 0 0x08000000 0x80000000>;
  nand@0,0 {
   reg = <0 0 4>;
   ti,nand-ecc-opt = "bch16";
@@ -1496,58 +1495,165 @@
   };
   partition@13 {
    label = "Storage";
-   reg = <0x0A200000 0x35E00000>;
+   reg = <0x0A200000 0x75E00000>;
   };
  };
 };
 
-/include/ "tps65217.dtsi"
+# 1 "./arch/arm/dts/tps65910.dtsi" 1
+# 14 "./arch/arm/dts/tps65910.dtsi"
+&tps {
+ compatible = "ti,tps65910";
+
+ regulators {
+  #address-cells = <1>;
+  #size-cells = <0>;
+
+  vrtc_reg: regulator@0 {
+   reg = <0>;
+   regulator-compatible = "vrtc";
+  };
+
+  vio_reg: regulator@1 {
+   reg = <1>;
+   regulator-compatible = "vio";
+  };
+
+  vdd1_reg: regulator@2 {
+   reg = <2>;
+   regulator-compatible = "vdd1";
+  };
+
+  vdd2_reg: regulator@3 {
+   reg = <3>;
+   regulator-compatible = "vdd2";
+  };
 
+  vdd3_reg: regulator@4 {
+   reg = <4>;
+   regulator-compatible = "vdd3";
+  };
+
+  vdig1_reg: regulator@5 {
+   reg = <5>;
+   regulator-compatible = "vdig1";
+  };
+
+  vdig2_reg: regulator@6 {
+   reg = <6>;
+   regulator-compatible = "vdig2";
+  };
+
+  vpll_reg: regulator@7 {
+   reg = <7>;
+   regulator-compatible = "vpll";
+  };
+
+  vdac_reg: regulator@8 {
+   reg = <8>;
+   regulator-compatible = "vdac";
+  };
+
+  vaux1_reg: regulator@9 {
+   reg = <9>;
+   regulator-compatible = "vaux1";
+  };
+
+  vaux2_reg: regulator@10 {
+   reg = <10>;
+   regulator-compatible = "vaux2";
+  };
+
+  vaux33_reg: regulator@11 {
+   reg = <11>;
+   regulator-compatible = "vaux33";
+  };
+
+  vmmc_reg: regulator@12 {
+   reg = <12>;
+   regulator-compatible = "vmmc";
+  };
+
+  vbb_reg: regulator@13 {
+   reg = <13>;
+   regulator-compatible = "vbb";
+  };
+ };
+};
+# 616 "<stdin>" 2
+# 633 "<stdin>"
 &tps {
-# 636 "<stdin>"
- ti,pmic-shutdown-controller;
+ vcc1-supply = <&vbat>;
+ vcc2-supply = <&vbat>;
+ vcc3-supply = <&vbat>;
+ vcc4-supply = <&vbat>;
+ vcc5-supply = <&vbat>;
+ vcc6-supply = <&vbat>;
+ vcc7-supply = <&vbat>;
+ vccio-supply = <&vbat>;
 
  regulators {
-  dcdc1_reg: regulator@0 {
-   regulator-name = "vdds_dpr";
+  vrtc_reg: regulator@0 {
+   regulator-always-on;
+  };
+
+  vio_reg: regulator@1 {
    regulator-always-on;
   };
 
-  dcdc2_reg: regulator@1 {
+  vdd1_reg: regulator@2 {
 
    regulator-name = "vdd_mpu";
-   regulator-min-microvolt = <1100000>;
-   regulator-max-microvolt = <1325000>;
+   regulator-min-microvolt = <912500>;
+   regulator-max-microvolt = <1312500>;
    regulator-boot-on;
    regulator-always-on;
   };
 
-  dcdc3_reg: regulator@2 {
+  vdd2_reg: regulator@3 {
 
    regulator-name = "vdd_core";
-   regulator-min-microvolt = <925000>;
+   regulator-min-microvolt = <912500>;
    regulator-max-microvolt = <1150000>;
    regulator-boot-on;
    regulator-always-on;
   };
 
-  ldo1_reg: regulator@3 {
-   regulator-name = "vio,vrtc,vdds";
+  vdd3_reg: regulator@4 {
+   regulator-always-on;
+  };
+
+  vdig1_reg: regulator@5 {
+   regulator-always-on;
+  };
+
+  vdig2_reg: regulator@6 {
+   regulator-always-on;
+  };
+
+  vpll_reg: regulator@7 {
+   regulator-always-on;
+  };
+
+  vdac_reg: regulator@8 {
+   regulator-always-on;
+  };
+
+  vaux1_reg: regulator@9 {
    regulator-always-on;
   };
 
-  ldo2_reg: regulator@4 {
-   regulator-name = "vdd_3v3aux";
+  vaux2_reg: regulator@10 {
    regulator-always-on;
   };
 
-  ldo3_reg: regulator@5 {
-   regulator-name = "vdd_1v8";
+  vaux33_reg: regulator@11 {
    regulator-always-on;
   };
 
-  ldo4_reg: regulator@6 {
-   regulator-name = "vdd_3v3a";
+  vmmc_reg: regulator@12 {
+   regulator-min-microvolt = <1800000>;
+   regulator-max-microvolt = <3300000>;
    regulator-always-on;
   };
  };
@@ -1594,7 +1700,7 @@
 
 &mmc1 {
  status = "okay";
- vmmc-supply = <&ldo4_reg>;
+ vmmc-supply = <&vmmc_reg>;
  bus-width = <4>;
  pinctrl-names = "default";
  pinctrl-0 = <&mmc1_pins_default>;

board-support/u-boot-2017.01+gitAUTOINC+340fb36f04-g340fb36f04/arch/arm/dts/am335x-evm.dts

@@ -21,7 +21,7 @@
 
 	cpus {
 		cpu@0 {
-			cpu0-supply = <&dcdc2_reg>;
+			cpu0-supply = <&vdd1_reg>;
 		};
 	};
 
@@ -163,10 +163,9 @@
 		pinctrl-single,pins = <
 			0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a5.gpio1_21 */
 			0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a6.gpio1_22 */
-			0x60 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)  /* gpmc_a8.gpio1_24 */
 			0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a9.gpio1_25 */
 			0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a10.gpio1_26 */
-			0x6c (PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a11.gpio1_27 */
+			0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a11.gpio1_27 */
 		>;
 	};
 
@@ -404,8 +403,8 @@
 	status = "okay";
 	clock-frequency = <400000>;
 
-	tps: tps@24 {
-		reg = <0x24>;
+	tps: tps@2d {
+		reg = <0x2d>;
 	};
 };
 
@@ -489,9 +488,9 @@
 		status = "okay";
 
 		/* Regulators */
-		AVDD-supply = <&ldo2_reg>;
-		IOVDD-supply = <&ldo2_reg>;
-		DRVDD-supply = <&ldo2_reg>;
+		AVDD-supply = <&vaux2_reg>;
+		IOVDD-supply = <&vaux2_reg>;
+		DRVDD-supply = <&vaux2_reg>;
 		DVDD-supply = <&vbat>;
 	};
 };
@@ -519,7 +518,7 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&nandflash_pins_s0>;
 	/*ranges = <0 0 0x08000000 0x1000000>;*/	/* CS0: 16MB for NAND */
-	ranges = <0 0 0x08000000 0x40000000>;	/*+++ vern,NAND,20181030 ---*/
+	ranges = <0 0 0x08000000 0x80000000>;	/*+++ vern,NAND,20181030 ---*/
 	nand@0,0 {
 		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
 		ti,nand-ecc-opt = "bch16";
@@ -608,74 +607,101 @@
 		};
 		partition@13 {
 			label = "Storage";
-			reg = <0x0A200000 0x35E00000>;
+			reg = <0x0A200000 0x75E00000>;
 		};
 	};
 };
 
-/include/ "tps65217.dtsi"
+#include "tps65910.dtsi"
+#if 0
+&mcasp1 {
+		pinctrl-names = "default";
+		pinctrl-0 = <&am335x_evm_audio_pins>;
+
+		status = "okay";
 
+		op-mode = <0>;          /* MCASP_IIS_MODE */
+		tdm-slots = <2>;
+		/* 4 serializers */
+		serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
+			0 0 1 2
+		>;
+		tx-num-evt = <32>;
+		rx-num-evt = <32>;
+};
+#endif
 &tps {
-	/*
-	 * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
-	 * mode") at poweroff.  Most BeagleBone versions do not support RTC-only
-	 * mode and risk hardware damage if this mode is entered.
-	 *
-	 * For details, see linux-omap mailing list May 2015 thread
-	 *	[PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller
-	 * In particular, messages:
-	 *	http://www.spinics.net/lists/linux-omap/msg118585.html
-	 *	http://www.spinics.net/lists/linux-omap/msg118615.html
-	 *
-	 * You can override this later with
-	 *	&tps {  /delete-property/ ti,pmic-shutdown-controller;  }
-	 * if you want to use RTC-only mode and made sure you are not affected
-	 * by the hardware problems. (Tip: double-check by performing a current
-	 * measurement after shutdown: it should be less than 1 mA.)
-	 */
-	ti,pmic-shutdown-controller;
+	vcc1-supply = <&vbat>;
+	vcc2-supply = <&vbat>;
+	vcc3-supply = <&vbat>;
+	vcc4-supply = <&vbat>;
+	vcc5-supply = <&vbat>;
+	vcc6-supply = <&vbat>;
+	vcc7-supply = <&vbat>;
+	vccio-supply = <&vbat>;
 
 	regulators {
-		dcdc1_reg: regulator@0 {
-			regulator-name = "vdds_dpr";
+		vrtc_reg: regulator@0 {
 			regulator-always-on;
 		};
 
-		dcdc2_reg: regulator@1 {
+		vio_reg: regulator@1 {
+			regulator-always-on;
+		};
+
+		vdd1_reg: regulator@2 {
 			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
 			regulator-name = "vdd_mpu";
-			regulator-min-microvolt = <1100000>;
-			regulator-max-microvolt = <1325000>;
+			regulator-min-microvolt = <912500>;
+			regulator-max-microvolt = <1312500>;
 			regulator-boot-on;
 			regulator-always-on;
 		};
 
-		dcdc3_reg: regulator@2 {
+		vdd2_reg: regulator@3 {
 			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
 			regulator-name = "vdd_core";
-			regulator-min-microvolt = <925000>;
+			regulator-min-microvolt = <912500>;
 			regulator-max-microvolt = <1150000>;
 			regulator-boot-on;
 			regulator-always-on;
 		};
 
-		ldo1_reg: regulator@3 {
-			regulator-name = "vio,vrtc,vdds";
+		vdd3_reg: regulator@4 {
+			regulator-always-on;
+		};
+
+		vdig1_reg: regulator@5 {
+			regulator-always-on;
+		};
+
+		vdig2_reg: regulator@6 {
+			regulator-always-on;
+		};
+
+		vpll_reg: regulator@7 {
+			regulator-always-on;
+		};
+
+		vdac_reg: regulator@8 {
+			regulator-always-on;
+		};
+
+		vaux1_reg: regulator@9 {
 			regulator-always-on;
 		};
 
-		ldo2_reg: regulator@4 {
-			regulator-name = "vdd_3v3aux";
+		vaux2_reg: regulator@10 {
 			regulator-always-on;
 		};
 
-		ldo3_reg: regulator@5 {
-			regulator-name = "vdd_1v8";
+		vaux33_reg: regulator@11 {
 			regulator-always-on;
 		};
 
-		ldo4_reg: regulator@6 {
-			regulator-name = "vdd_3v3a";
+		vmmc_reg: regulator@12 {
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <3300000>;
 			regulator-always-on;
 		};
 	};
@@ -722,7 +748,7 @@
 
 &mmc1 {
 	status = "okay";
-	vmmc-supply = <&ldo4_reg>;
+	vmmc-supply = <&vmmc_reg>;
 	bus-width = <4>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&mmc1_pins_default>;