Modify the default GPIO setting for CHAdeMO/CCS CP open/short feature selection.

2020.07.31 / TC Hsu

Actions: This is workaround, modify the default setup of GPIO 3_15 to high for select CP open/short feature to CCS in backplane CND1, modify the default setup of GPIO 3_16 to low for select cp open/short feature to CHAdeMO in backplane CND2. Remove the GPIO 3_15/3_16 setup for EV board detection in Initialization() funcation of main.c. It is temporary workaround modify for EE requirement, need to modify to finial solution.

Image version    : N/A
Image checksum   : N/A

Hardware PWB P/N : N/A
Hardware Version : N/A

Files:

	modified:   EVSE/Projects/DM30/Apps/main.c
	modified:   EVSE/Projects/DW30/Apps/main.c

EVSE/Projects/DM30/Apps/main.c

@@ -678,7 +678,7 @@ void InitGPIO()
     system("echo 110 > /sys/class/gpio/export");
     system("echo \"out\" > /sys/class/gpio/gpio110/direction");
     system("echo 0 > /sys/class/gpio/gpio110/value");
-    /* MCASP0_FSR       =>  GPIO3_19 *//*backplane circuit enable for CCS CP open/short feature*/
+    /* MCASP0_FSR       =>  GPIO3_19 *//*backplane circuit default select for backplane CND1 CP open/short feature*/
     system("echo 115 > /sys/class/gpio/export");
     system("echo \"out\" > /sys/class/gpio/gpio115/direction");
     system("echo 1 > /sys/class/gpio/gpio115/value");
@@ -686,7 +686,7 @@ void InitGPIO()
     system("echo 112 > /sys/class/gpio/export");
     system("echo \"out\" > /sys/class/gpio/gpio112/direction");
     system("echo 1 > /sys/class/gpio/gpio112/value");
-    /* MCASP0_AXR1  =>  GPIO3_20 *//*SMR Enable control_2 for Pskill_2*/
+    /* MCASP0_AXR1  =>  GPIO3_20 *//*backplane circuit default select for backplane CND2 CP open/short feature*/
     system("echo 116 > /sys/class/gpio/export");
     system("echo \"out\" > /sys/class/gpio/gpio116/direction");
     system("echo 0 > /sys/class/gpio/gpio116/value");
@@ -1237,27 +1237,27 @@ int Initialization()
     // UART 2 for Rfid
     rfidFd = InitialRfidPort();
 
-    int pinOut[2] = { 115, 116 };
+    //int pinOut[2] = { 115, 116 };
     for (byte count = 0; count < ShmSysConfigAndInfo->SysConfig.TotalConnectorCount; count++)
     {
         if (chargingInfo[count]->Type == _Type_Chademo)
         {
-            gpio_set_value(pinOut[count], 0x01);
+            //gpio_set_value(pinOut[count], 0x01);
             ShmCHAdeMOData->evse[chargingInfo[count]->type_index].SelfTest_Comp = NO;
         }
         else if (chargingInfo[count]->Type == _Type_GB)
         {
-            gpio_set_value(pinOut[count], 0x01);
+            //gpio_set_value(pinOut[count], 0x01);
             ShmGBTData->evse[chargingInfo[count]->type_index].SelfTest_Comp = NO;
         }
         else if (chargingInfo[count]->Type == _Type_CCS_2)
         {
             if (ShmCcsData->CommProtocol == 0x01)
             {
-                if (ShmSysConfigAndInfo->SysConfig.TotalConnectorCount == 1)
-                    gpio_set_value(pinOut[1], 0x00);
-                else
-                    gpio_set_value(pinOut[count], 0x00);
+                //if (ShmSysConfigAndInfo->SysConfig.TotalConnectorCount == 1)
+                //    gpio_set_value(pinOut[1], 0x00);
+                //else
+                //    gpio_set_value(pinOut[count], 0x00);
 
                 ShmCcsData->V2GMessage_DIN70121[chargingInfo[count]->type_index].SelfTest_Comp = NO;
             }

EVSE/Projects/DW30/Apps/main.c

@@ -678,7 +678,7 @@ void InitGPIO()
     system("echo 110 > /sys/class/gpio/export");
     system("echo \"out\" > /sys/class/gpio/gpio110/direction");
     system("echo 0 > /sys/class/gpio/gpio110/value");
-    /* MCASP0_FSR       =>  GPIO3_19 *//*backplane circuit enable for CCS CP open/short feature*/
+    /* MCASP0_FSR       =>  GPIO3_19 *//*backplane circuit default select for backplane CND1 CP open/short feature*/
     system("echo 115 > /sys/class/gpio/export");
     system("echo \"out\" > /sys/class/gpio/gpio115/direction");
     system("echo 1 > /sys/class/gpio/gpio115/value");
@@ -686,7 +686,7 @@ void InitGPIO()
     system("echo 112 > /sys/class/gpio/export");
     system("echo \"out\" > /sys/class/gpio/gpio112/direction");
     system("echo 1 > /sys/class/gpio/gpio112/value");
-    /* MCASP0_AXR1  =>  GPIO3_20 *//*SMR Enable control_2 for Pskill_2*/
+    /* MCASP0_AXR1  =>  GPIO3_20 *//*backplane circuit default select for backplane CND2 CP open/short feature*/
     system("echo 116 > /sys/class/gpio/export");
     system("echo \"out\" > /sys/class/gpio/gpio116/direction");
     system("echo 0 > /sys/class/gpio/gpio116/value");
@@ -1237,27 +1237,27 @@ int Initialization()
     // UART 2 for Rfid
     rfidFd = InitialRfidPort();
 
-    int pinOut[2] = { 115, 116 };
+    //int pinOut[2] = { 115, 116 };
     for (byte count = 0; count < ShmSysConfigAndInfo->SysConfig.TotalConnectorCount; count++)
     {
         if (chargingInfo[count]->Type == _Type_Chademo)
         {
-            gpio_set_value(pinOut[count], 0x01);
+            //gpio_set_value(pinOut[count], 0x01);
             ShmCHAdeMOData->evse[chargingInfo[count]->type_index].SelfTest_Comp = NO;
         }
         else if (chargingInfo[count]->Type == _Type_GB)
         {
-            gpio_set_value(pinOut[count], 0x01);
+            //gpio_set_value(pinOut[count], 0x01);
             ShmGBTData->evse[chargingInfo[count]->type_index].SelfTest_Comp = NO;
         }
         else if (chargingInfo[count]->Type == _Type_CCS_2)
         {
             if (ShmCcsData->CommProtocol == 0x01)
             {
-                if (ShmSysConfigAndInfo->SysConfig.TotalConnectorCount == 1)
-                    gpio_set_value(pinOut[1], 0x00);
-                else
-                    gpio_set_value(pinOut[count], 0x00);
+                //if (ShmSysConfigAndInfo->SysConfig.TotalConnectorCount == 1)
+                //    gpio_set_value(pinOut[1], 0x00);
+                //else
+                //    gpio_set_value(pinOut[count], 0x00);
 
                 ShmCcsData->V2GMessage_DIN70121[chargingInfo[count]->type_index].SelfTest_Comp = NO;
             }