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@@ -64,38 +64,23 @@
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pinctrl-single,pins = <
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/** Offset: 0x800 */
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- /** GPIO 0 */
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- 0x020 (PIN_INPUT | MUX_MODE7) /* GPMC_AD8 => GPIO0_22 */ /*ID BD1_1*/
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- 0x024 (PIN_INPUT | MUX_MODE7) /* GPMC_AD9 => GPIO0_23 */ /*ID BD1_2*/
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- 0x028 (PIN_INPUT | MUX_MODE7) /* GPMC_AD10 => GPIO0_26 */ /*IO BD1_1*/
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- 0x02C (PIN_INPUT | MUX_MODE7) /* GPMC_AD11 => GPIO0_27 */ /*IO BD1_2*/
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+ /** GPIO 0 */
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0x144 (PIN_INPUT | MUX_MODE7) /* RMII1_REF_CLK => GPIO0_29 */ /*USB 0 OCP detection*/
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0x1B0 (PIN_OUTPUT | MUX_MODE7) /*XDMA_EVENT_INTR0 => GPIO0_19 */ /*AM_RFID_RST*/
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0x1B4 (PIN_INPUT | MUX_MODE7) /*XDMA_EVENT_INTR1 => GPIO0_20 */ /*AM_RFID_ICC*/
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-
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- /** GPIO 1 */
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- 0x030 (PIN_INPUT | MUX_MODE7) /* GPMC_AD12 => GPIO1_12 */ /*ID BD2_1*/
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- 0x034 (PIN_INPUT | MUX_MODE7) /* GPMC_AD13 => GPIO1_13 */ /*ID BD2_2*/
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- 0x038 (PIN_INPUT | MUX_MODE7) /* GPMC_AD14 => GPIO1_14 */ /*IO BD2_1*/
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- 0x03C (PIN_INPUT | MUX_MODE7) /* GPMC_AD15 => GPIO1_15 */ /*IO BD2_2*/
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-
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+ /** GPIO 1 */
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/** GPIO 2 */
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- 0x0EC (PIN_OUTPUT | MUX_MODE7) /*LCD_AC_BIAS_EN => GPIO2_25*/ /*RS-485 for module DE control*/
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- 0x0E4 (PIN_OUTPUT | MUX_MODE7) /*LCD_HSYNC => GPIO2_23*/ /*RS-485 for module RE control*/
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- 0x0E8 (PIN_INPUT | MUX_MODE7) /*LCD_PCLK => GPIO2_24*/ /*CCS communication board 1 proximity*/
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- 0x0E0 (PIN_INPUT | MUX_MODE7) /*LCD_VSYNC => GPIO2_22*/ /*CCS communication board 2 proximity*/
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-
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+ 0x08C (PIN_OUTPUT | MUX_MODE7) /*GPMC_CLK => GPIO2_1*/ /*Speaker*/
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+ 0x0A0 (PIN_OUTPUT | MUX_MODE7) /*LCD_DATA0 => GPIO2_6*/ /*Panel LED control-BB_LEDR1*/
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+ 0x0A4 (PIN_OUTPUT | MUX_MODE7) /*LCD_DATA1 => GPIO2_7*/ /*Panel LED control-BB_LEDG1*/
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+ 0x0A8 (PIN_OUTPUT | MUX_MODE7) /*LCD_DATA2 => GPIO2_8*/ /*Panel LED control-BB_LEDB1*/
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+ 0x0AC (PIN_OUTPUT | MUX_MODE7) /*LCD_DATA3 => GPIO2_9*/ /*Panel LED control-BB_LEDR2*/
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+ 0x0B0 (PIN_OUTPUT | MUX_MODE7) /*LCD_DATA4 => GPIO2_10*/ /*Panel LED control-BB_LEDG2*/
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+ 0x0B4 (PIN_OUTPUT | MUX_MODE7) /*LCD_DATA5 => GPIO2_11*/ /*Panel LED control-BB_LEDB2*/
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+ 0x0E8 (PIN_INPUT | MUX_MODE7) /*LCD_PCLK => GPIO2_24*/ /*communication board proximity*/
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+ 0x0E0 (PIN_OUTPUT | MUX_MODE7) /*LCD_VSYNC => GPIO2_22*/ /*Breath LED*/
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/** GPIO 3 */
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- AM33XX_IOPAD(0x9e4, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* (C14) EMU0.gpio3[7] */ /*CP open/short feature enable/disable, pull low for default enable*/
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- AM33XX_IOPAD(0x9e8, PIN_OUTPUT_PULLUP | MUX_MODE7) /* (B14) EMU1.gpio3[8] */ /*4G module reset, pull high to reset when entry kernel, after Application start, it should be pull low.*/
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- 0x194 (PIN_INPUT | MUX_MODE7) /*MCASP0_FSX => GPIO3_15*/ /*Emergency Stop button detect*/
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- 0x1A0 (PIN_INPUT | MUX_MODE7) /*MCASP0_ACLKR => GPIO3_18*/ /*USB1 OCP detect*/
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- 0x19C (PIN_INPUT | MUX_MODE7) /*MCASP0_AHCLKR => GPIO3_17*/ /*Emergency IO for AM3352 and STM32F407*/
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- 0x190 (PIN_OUTPUT | MUX_MODE7) /*MCASP0_ACLKX => GPIO3_14*/ /*Ethernet PHY reset*/
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- 0x1A4 (PIN_OUTPUT | MUX_MODE7) /* MCASP0_FSR => GPIO3_19 */ /*SMR Enable control_1*/
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- 0x198 (PIN_OUTPUT | MUX_MODE7) /* MCASP0_AXR0 => GPIO3_16 */ /*CSU board function OK indicator.*/
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- 0x1A8 (PIN_OUTPUT | MUX_MODE7) /* MCASP0_AXR1 => GPIO3_20 */ /*SMR Enable control_2*/
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-
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+ 0x1A8 (PIN_OUTPUT | MUX_MODE7) /* MCASP0_AXR1 => GPIO3_20 */ /*control MCU to output CP PWM*/
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>;
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};
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@@ -140,14 +125,14 @@
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0x164 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* ECAP0_IN_PWM0_OUT => uart3_txd */
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>;
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};
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-
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+#if 0
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uart5_pins: pinmux_uart5_pins {
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pinctrl-single,pins = <
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- 0x0C0 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* LCD_DATA8 => DUART5_TX*/
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- 0x0C4 (PIN_INPUT_PULLUP | MUX_MODE4) /* LCD_DATA9 => UART5_RX*/
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+ 0x0C0 (PIN_INPUT_PULLUP | MUX_MODE4) /* LCD_DATA8 => UART5_RXD*/
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+ 0x0C4 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* LCD_DATA9 => UART5_TXD*/
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>;
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};
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-
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+#endif
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clkout2_pin: pinmux_clkout2_pin {
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pinctrl-single,pins = <
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0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
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@@ -198,12 +183,12 @@
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pinctrl-single,pins = <
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/* Slave 1 */
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- 0x108 (PIN_INPUT_PULLUP | MUX_MODE0) /* MII1_COL.gmii1_col */
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- 0x10C(PIN_INPUT_PULLUP | MUX_MODE0) /* MII1_CRS.MII1_CRS */
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+ //0x108 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* MII1_COL.gmii1_col */
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+ //0x10C(PIN_INPUT_PULLDOWN | MUX_MODE0) /* MII1_CRS.MII1_CRS */
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0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* MII1_RX_ER.gmii1_rxerr */
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+ 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
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0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
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0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
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- 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
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0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.rgmii1_rd3 */
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0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.rgmii1_rd2 */
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0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.rgmii1_rd1 */
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@@ -212,24 +197,7 @@
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0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.rgmii1_td3 */
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0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.rgmii1_td2 */
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0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.rgmii1_td1 */
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- 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.rgmii1_td0 */
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-
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- /* Slave 2 */
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- AM33XX_IOPAD(0x878, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ben1.mii2_col */
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- AM33XX_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE2) /* GPMC_CSn3.rmii2_crs_dv*/
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- /*AM33XX_IOPAD(0x874, PIN_INPUT_PULLUP | MUX_MODE1)*/ /* gpmc_wpn.mii2_rxerr */
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- AM33XX_IOPAD(0x858, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a6.mii2_txclk */
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- AM33XX_IOPAD(0x85c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a7.mii2_rxclk */
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- AM33XX_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a1.mii2_rxdv */
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- AM33XX_IOPAD(0x860, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a8.mii2_rxd3 */
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- AM33XX_IOPAD(0x864, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a9.mii2_rxd2 */
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- AM33XX_IOPAD(0x868, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a10.mii2_rxd1 */
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- AM33XX_IOPAD(0x86c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a11.mii2_rxd0 */
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- AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_a0.mii2_txen */
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- AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_a2.mii2_txd3 */
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- AM33XX_IOPAD(0x84c, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_a3.mii2_txd2 */
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- AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_a4.mii2_txd1 */
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- AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_a5.mii2_txd0 */
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+ 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.rgmii1_td0 */
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>;
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};
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@@ -250,23 +218,6 @@
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0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
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- /* Slave 2 */
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- AM33XX_IOPAD(0x888, PIN_INPUT_PULLDOWN | MUX_MODE7) /* GPMC_CSn3.rmii2_crs_dv*/
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- AM33XX_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a0.mii2_txen */
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- AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a1.mii2_rxdv */
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- AM33XX_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a2.mii2_txd3 */
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- AM33XX_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a3.mii2_txd2 */
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- AM33XX_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a4.mii2_txd1 */
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- AM33XX_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.mii2_txd0 */
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- AM33XX_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.mii2_txclk */
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- AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.mii2_rxclk */
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- AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a8.mii2_rxd3 */
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- AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.mii2_rxd2 */
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- AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a10.mii2_rxd1 */
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- AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.mii2_rxd0 */
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- /*AM33XX_IOPAD(0x874, PIN_INPUT_PULLDOWN | MUX_MODE7)*/ /* gpmc_wpn.mii2_rxerr */
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- AM33XX_IOPAD(0x878, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben1.mii2_col */
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-
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>;
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};
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@@ -305,14 +256,14 @@
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0x17C (PIN_INPUT_PULLDOWN | MUX_MODE2) /* uart1_rtsn => d_can0_rx */
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>;
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};
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-
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+#if 0
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dcan1_pins_default: dcan1_pins_default {
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pinctrl-single,pins = <
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0x168 (PIN_OUTPUT_PULLUP | MUX_MODE2) /* UART0_CTSn => d_can1_tx */
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0x16C (PIN_INPUT_PULLDOWN | MUX_MODE2) /* UART0_RTSn => d_can1_rx */
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>;
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};
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-#if 0
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+
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ehrpwm1_pins: ehrpwm1_pins {
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pinctrl-single,pins = <
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0x0C8 (PIN_OUTPUT | MUX_MODE2) /* LCD_DATA10.eHRPWM1A */
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@@ -357,14 +308,14 @@
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status = "okay";
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};
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-
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+#if 0
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&uart5 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart5_pins>;
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status = "okay";
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};
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-
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+#endif
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins>;
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@@ -375,11 +326,11 @@
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tps: tps@2d {
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reg = <0x2d>;
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};
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-
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+
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/* rtc0: rtc@51 {
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- compatible = "nxp,pcf85063";
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- reg = <0x51>;
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- };*/
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+ compatible = "nxp,pcf85063";
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+ reg = <0x51>;
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+ };*/
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};
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#if 1
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&i2c1 {
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@@ -393,6 +344,7 @@
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compatible = "nxp,pcf85063";
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reg = <0x51>;
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};
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+
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};
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#endif
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&usb {
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@@ -462,7 +414,7 @@
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interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
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<1 IRQ_TYPE_NONE>; /* termcount */
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rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
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- ti,nand-ecc-opt = "bch8";
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+ ti,nand-ecc-opt = "bch16";
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ti,elm-id = <&elm>;
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nand-bus-width = <8>;
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gpmc,device-width = <1>;
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@@ -636,7 +588,6 @@
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&cpsw_default>;
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pinctrl-1 = <&cpsw_sleep>;
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- dual_emac = <1>;
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status = "okay";
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};
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@@ -645,19 +596,21 @@
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pinctrl-0 = <&davinci_mdio_default>;
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pinctrl-1 = <&davinci_mdio_sleep>;
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status = "okay";
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+ //reset-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>;
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};
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&cpsw_emac0 {
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phy_id = <&davinci_mdio>, <1>;
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phy-mode = "mii";
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- dual_emac_res_vlan = <1>;
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-};
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+};
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+#if 0
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&cpsw_emac1 {
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phy_id = <&davinci_mdio>, <2>;
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phy-mode = "mii";
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- dual_emac_res_vlan = <2>;
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+
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};
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+#endif
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&tscadc {
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status = "okay";
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@@ -705,9 +658,10 @@
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pinctrl-names = "default";
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pinctrl-0 = <&dcan0_pins_default>;
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};
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-
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+#if 0
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&dcan1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&dcan1_pins_default>;
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};
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+#endif
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