cslr_tptc.h 36 KB

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  1. /********************************************************************
  2. * Copyright (C) 2013-2014 Texas Instruments Incorporated.
  3. *
  4. * Redistribution and use in source and binary forms, with or without
  5. * modification, are permitted provided that the following conditions
  6. * are met:
  7. *
  8. * Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. *
  11. * Redistributions in binary form must reproduce the above copyright
  12. * notice, this list of conditions and the following disclaimer in the
  13. * documentation and/or other materials provided with the
  14. * distribution.
  15. *
  16. * Neither the name of Texas Instruments Incorporated nor the names of
  17. * its contributors may be used to endorse or promote products derived
  18. * from this software without specific prior written permission.
  19. *
  20. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  21. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  22. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  23. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  24. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  25. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  26. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  27. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  28. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  30. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31. *
  32. */
  33. #ifndef CSLR_TPTC_H_
  34. #define CSLR_TPTC_H_
  35. #ifdef __cplusplus
  36. extern "C"
  37. {
  38. #endif
  39. #include <ti/csl/cslr.h>
  40. #include <ti/csl/tistdtypes.h>
  41. /**************************************************************************
  42. * Register Overlay Structure for DstFifo
  43. **************************************************************************/
  44. typedef struct {
  45. volatile Uint32 TPTC_DFOPT;
  46. volatile Uint8 RSVD0[4];
  47. volatile Uint32 TPTC_DFCNT;
  48. volatile Uint32 TPTC_DFDST;
  49. volatile Uint32 TPTC_DFBIDX;
  50. volatile Uint32 TPTC_DFMPPRXY;
  51. volatile Uint8 RSVD1[40];
  52. } CSL_TptcDstfifoRegs;
  53. /**************************************************************************
  54. * Register Overlay Structure
  55. **************************************************************************/
  56. typedef struct {
  57. volatile Uint32 TPCC_PID;
  58. volatile Uint32 TPTC_TCCFG;
  59. volatile Uint8 RSVD0[244];
  60. volatile Uint32 TPTC_CLKGDIS;
  61. volatile Uint32 TPTC_STAT;
  62. volatile Uint32 TPTC_INTSTAT;
  63. volatile Uint32 TPTC_INTEN;
  64. volatile Uint32 TPTC_INTCLR;
  65. volatile Uint32 TPTC_INTCMD;
  66. volatile Uint8 RSVD1[12];
  67. volatile Uint32 TPTC_ERRSTAT;
  68. volatile Uint32 TPTC_ERREN;
  69. volatile Uint32 TPTC_ERRCLR;
  70. volatile Uint32 TPTC_ERRDET;
  71. volatile Uint32 TPTC_ERRCMD;
  72. volatile Uint8 RSVD2[12];
  73. volatile Uint32 TPTC_RDRATE;
  74. volatile Uint8 RSVD3[188];
  75. volatile Uint32 TPTC_POPT;
  76. volatile Uint32 TPTC_PSRC;
  77. volatile Uint32 TPTC_PCNT;
  78. volatile Uint32 TPTC_PDST;
  79. volatile Uint32 TPTC_PBIDX;
  80. volatile Uint32 TPTC_PMPPRXY;
  81. volatile Uint8 RSVD4[40];
  82. volatile Uint32 TPTC_SAOPT;
  83. volatile Uint32 TPTC_SASRC;
  84. volatile Uint32 TPTC_SACNT;
  85. volatile Uint8 RSVD5[4];
  86. volatile Uint32 TPTC_SABIDX;
  87. volatile Uint32 TPTC_SAMPPRXY;
  88. volatile Uint32 TPTC_SACNTRLD;
  89. volatile Uint32 TPTC_SASRCBREF;
  90. volatile Uint8 RSVD6[32];
  91. volatile Uint32 TPTC_DFCNTRLD;
  92. volatile Uint32 TPTC_DFSRCBREF;
  93. volatile Uint32 TPTC_DFDSTBREF;
  94. volatile Uint8 RSVD7[116];
  95. CSL_TptcDstfifoRegs DSTFIFO[4];
  96. } CSL_TptcRegs;
  97. /**************************************************************************
  98. * Register Macros
  99. **************************************************************************/
  100. /* TPTC_DFOPT */
  101. #define CSL_TPTC_TPTC_DFOPT(n) (0x300U + ((n) * (0x40U)))
  102. /* TPTC_DFCNT */
  103. #define CSL_TPTC_TPTC_DFCNT(n) (0x308U + ((n) * (0x40U)))
  104. /* TPTC_DFDST */
  105. #define CSL_TPTC_TPTC_DFDST(n) (0x30CU + ((n) * (0x40U)))
  106. /* TPTC_DFBIDX */
  107. #define CSL_TPTC_TPTC_DFBIDX(n) (0x310U + ((n) * (0x40U)))
  108. /* TPTC_DFMPPRXY */
  109. #define CSL_TPTC_TPTC_DFMPPRXY(n) (0x314U + ((n) * (0x40U)))
  110. /* TPCC_PID */
  111. #define CSL_TPTC_TPCC_PID (0x0U)
  112. /* TPTC_TCCFG */
  113. #define CSL_TPTC_TPTC_TCCFG (0x4U)
  114. /* TPTC_CLKGDIS */
  115. #define CSL_TPTC_TPTC_CLKGDIS (0xFCU)
  116. /* TPTC_STAT */
  117. #define CSL_TPTC_TPTC_STAT (0x100U)
  118. /* TPTC_INTSTAT */
  119. #define CSL_TPTC_TPTC_INTSTAT (0x104U)
  120. /* TPTC_INTEN */
  121. #define CSL_TPTC_TPTC_INTEN (0x108U)
  122. /* TPTC_INTCLR */
  123. #define CSL_TPTC_TPTC_INTCLR (0x10CU)
  124. /* TPTC_INTCMD */
  125. #define CSL_TPTC_TPTC_INTCMD (0x110U)
  126. /* TPTC_ERRSTAT */
  127. #define CSL_TPTC_TPTC_ERRSTAT (0x120U)
  128. /* TPTC_ERREN */
  129. #define CSL_TPTC_TPTC_ERREN (0x124U)
  130. /* TPTC_ERRCLR */
  131. #define CSL_TPTC_TPTC_ERRCLR (0x128U)
  132. /* TPTC_ERRDET */
  133. #define CSL_TPTC_TPTC_ERRDET (0x12CU)
  134. /* TPTC_ERRCMD */
  135. #define CSL_TPTC_TPTC_ERRCMD (0x130U)
  136. /* TPTC_RDRATE */
  137. #define CSL_TPTC_TPTC_RDRATE (0x140U)
  138. /* TPTC_POPT */
  139. #define CSL_TPTC_TPTC_POPT (0x200U)
  140. /* TPTC_PSRC */
  141. #define CSL_TPTC_TPTC_PSRC (0x204U)
  142. /* TPTC_PCNT */
  143. #define CSL_TPTC_TPTC_PCNT (0x208U)
  144. /* TPTC_PDST */
  145. #define CSL_TPTC_TPTC_PDST (0x20CU)
  146. /* TPTC_PBIDX */
  147. #define CSL_TPTC_TPTC_PBIDX (0x210U)
  148. /* TPTC_PMPPRXY */
  149. #define CSL_TPTC_TPTC_PMPPRXY (0x214U)
  150. /* TPTC_SAOPT */
  151. #define CSL_TPTC_TPTC_SAOPT (0x240U)
  152. /* TPTC_SASRC */
  153. #define CSL_TPTC_TPTC_SASRC (0x244U)
  154. /* TPTC_SACNT */
  155. #define CSL_TPTC_TPTC_SACNT (0x248U)
  156. /* TPTC_SABIDX */
  157. #define CSL_TPTC_TPTC_SABIDX (0x250U)
  158. /* TPTC_SAMPPRXY */
  159. #define CSL_TPTC_TPTC_SAMPPRXY (0x254U)
  160. /* TPTC_SACNTRLD */
  161. #define CSL_TPTC_TPTC_SACNTRLD (0x258U)
  162. /* TPTC_SASRCBREF */
  163. #define CSL_TPTC_TPTC_SASRCBREF (0x25CU)
  164. /* TPTC_DFCNTRLD */
  165. #define CSL_TPTC_TPTC_DFCNTRLD (0x280U)
  166. /* TPTC_DFSRCBREF */
  167. #define CSL_TPTC_TPTC_DFSRCBREF (0x284U)
  168. /* TPTC_DFDSTBREF */
  169. #define CSL_TPTC_TPTC_DFDSTBREF (0x288U)
  170. /**************************************************************************
  171. * Field Definition Macros
  172. **************************************************************************/
  173. /* TPTC_DFOPT */
  174. #define CSL_TPTC_TPTC_DFOPT_SAM_MASK (0x00000001U)
  175. #define CSL_TPTC_TPTC_DFOPT_SAM_SHIFT (0U)
  176. #define CSL_TPTC_TPTC_DFOPT_SAM_RESETVAL (0x00000000U)
  177. #define CSL_TPTC_TPTC_DFOPT_SAM_MAX (0x00000001U)
  178. #define CSL_TPTC_TPTC_DFOPT_DAM_MASK (0x00000002U)
  179. #define CSL_TPTC_TPTC_DFOPT_DAM_SHIFT (1U)
  180. #define CSL_TPTC_TPTC_DFOPT_DAM_RESETVAL (0x00000000U)
  181. #define CSL_TPTC_TPTC_DFOPT_DAM_MAX (0x00000001U)
  182. #define CSL_TPTC_TPTC_DFOPT_PRIORITY_MASK (0x00000070U)
  183. #define CSL_TPTC_TPTC_DFOPT_PRIORITY_SHIFT (4U)
  184. #define CSL_TPTC_TPTC_DFOPT_PRIORITY_RESETVAL (0x00000000U)
  185. #define CSL_TPTC_TPTC_DFOPT_PRIORITY_MAX (0x00000007U)
  186. #define CSL_TPTC_TPTC_DFOPT_FWID_MASK (0x00000700U)
  187. #define CSL_TPTC_TPTC_DFOPT_FWID_SHIFT (8U)
  188. #define CSL_TPTC_TPTC_DFOPT_FWID_RESETVAL (0x00000000U)
  189. #define CSL_TPTC_TPTC_DFOPT_FWID_MAX (0x00000007U)
  190. #define CSL_TPTC_TPTC_DFOPT_TCC_MASK (0x0003F000U)
  191. #define CSL_TPTC_TPTC_DFOPT_TCC_SHIFT (12U)
  192. #define CSL_TPTC_TPTC_DFOPT_TCC_RESETVAL (0x00000000U)
  193. #define CSL_TPTC_TPTC_DFOPT_TCC_MAX (0x0000003fU)
  194. #define CSL_TPTC_TPTC_DFOPT_TCINTEN_MASK (0x00100000U)
  195. #define CSL_TPTC_TPTC_DFOPT_TCINTEN_SHIFT (20U)
  196. #define CSL_TPTC_TPTC_DFOPT_TCINTEN_RESETVAL (0x00000000U)
  197. #define CSL_TPTC_TPTC_DFOPT_TCINTEN_MAX (0x00000001U)
  198. #define CSL_TPTC_TPTC_DFOPT_TCCHEN_MASK (0x00400000U)
  199. #define CSL_TPTC_TPTC_DFOPT_TCCHEN_SHIFT (22U)
  200. #define CSL_TPTC_TPTC_DFOPT_TCCHEN_RESETVAL (0x00000000U)
  201. #define CSL_TPTC_TPTC_DFOPT_TCCHEN_MAX (0x00000001U)
  202. #define CSL_TPTC_TPTC_DFOPT_RESETVAL (0x00000000U)
  203. /* TPTC_DFCNT */
  204. #define CSL_TPTC_TPTC_DFCNT_ACNT_MASK (0x0000FFFFU)
  205. #define CSL_TPTC_TPTC_DFCNT_ACNT_SHIFT (0U)
  206. #define CSL_TPTC_TPTC_DFCNT_ACNT_RESETVAL (0x00000000U)
  207. #define CSL_TPTC_TPTC_DFCNT_ACNT_MAX (0x0000ffffU)
  208. #define CSL_TPTC_TPTC_DFCNT_BCNT_MASK (0xFFFF0000U)
  209. #define CSL_TPTC_TPTC_DFCNT_BCNT_SHIFT (16U)
  210. #define CSL_TPTC_TPTC_DFCNT_BCNT_RESETVAL (0x00000000U)
  211. #define CSL_TPTC_TPTC_DFCNT_BCNT_MAX (0x0000ffffU)
  212. #define CSL_TPTC_TPTC_DFCNT_RESETVAL (0x00000000U)
  213. /* TPTC_DFDST */
  214. #define CSL_TPTC_TPTC_DFDST_DADDR_MASK (0xFFFFFFFFU)
  215. #define CSL_TPTC_TPTC_DFDST_DADDR_SHIFT (0U)
  216. #define CSL_TPTC_TPTC_DFDST_DADDR_RESETVAL (0x00000000U)
  217. #define CSL_TPTC_TPTC_DFDST_DADDR_MAX (0xffffffffU)
  218. #define CSL_TPTC_TPTC_DFDST_RESETVAL (0x00000000U)
  219. /* TPTC_DFBIDX */
  220. #define CSL_TPTC_TPTC_DFBIDX_SBIDX_MASK (0x0000FFFFU)
  221. #define CSL_TPTC_TPTC_DFBIDX_SBIDX_SHIFT (0U)
  222. #define CSL_TPTC_TPTC_DFBIDX_SBIDX_RESETVAL (0x00000000U)
  223. #define CSL_TPTC_TPTC_DFBIDX_SBIDX_MAX (0x0000ffffU)
  224. #define CSL_TPTC_TPTC_DFBIDX_DBIDX_MASK (0xFFFF0000U)
  225. #define CSL_TPTC_TPTC_DFBIDX_DBIDX_SHIFT (16U)
  226. #define CSL_TPTC_TPTC_DFBIDX_DBIDX_RESETVAL (0x00000000U)
  227. #define CSL_TPTC_TPTC_DFBIDX_DBIDX_MAX (0x0000ffffU)
  228. #define CSL_TPTC_TPTC_DFBIDX_RESETVAL (0x00000000U)
  229. /* TPTC_DFMPPRXY */
  230. #define CSL_TPTC_TPTC_DFMPPRXY_PRIVID_MASK (0x0000000FU)
  231. #define CSL_TPTC_TPTC_DFMPPRXY_PRIVID_SHIFT (0U)
  232. #define CSL_TPTC_TPTC_DFMPPRXY_PRIVID_RESETVAL (0x00000000U)
  233. #define CSL_TPTC_TPTC_DFMPPRXY_PRIVID_MAX (0x0000000fU)
  234. #define CSL_TPTC_TPTC_DFMPPRXY_PRIV_MASK (0x00000100U)
  235. #define CSL_TPTC_TPTC_DFMPPRXY_PRIV_SHIFT (8U)
  236. #define CSL_TPTC_TPTC_DFMPPRXY_PRIV_RESETVAL (0x00000000U)
  237. #define CSL_TPTC_TPTC_DFMPPRXY_PRIV_MAX (0x00000001U)
  238. #define CSL_TPTC_TPTC_DFMPPRXY_SECURE_MASK (0x00000200U)
  239. #define CSL_TPTC_TPTC_DFMPPRXY_SECURE_SHIFT (9U)
  240. #define CSL_TPTC_TPTC_DFMPPRXY_SECURE_RESETVAL (0x00000000U)
  241. #define CSL_TPTC_TPTC_DFMPPRXY_SECURE_MAX (0x00000001U)
  242. #define CSL_TPTC_TPTC_DFMPPRXY_RESETVAL (0x00000000U)
  243. /* TPCC_PID */
  244. #define CSL_TPTC_TPCC_PID_SCHEME_MASK (0xC0000000U)
  245. #define CSL_TPTC_TPCC_PID_SCHEME_SHIFT (30U)
  246. #define CSL_TPTC_TPCC_PID_SCHEME_RESETVAL (0x00000001U)
  247. #define CSL_TPTC_TPCC_PID_SCHEME_MAX (0x00000003U)
  248. #define CSL_TPTC_TPCC_PID_FUNC_MASK (0x0FFF0000U)
  249. #define CSL_TPTC_TPCC_PID_FUNC_SHIFT (16U)
  250. #define CSL_TPTC_TPCC_PID_FUNC_RESETVAL (0x00000000U)
  251. #define CSL_TPTC_TPCC_PID_FUNC_MAX (0x00000fffU)
  252. #define CSL_TPTC_TPCC_PID_RESETVAL (0x40000000U)
  253. /* TPTC_TCCFG */
  254. #define CSL_TPTC_TPTC_TCCFG_FIFOSIZE_MASK (0x00000007U)
  255. #define CSL_TPTC_TPTC_TCCFG_FIFOSIZE_SHIFT (0U)
  256. #define CSL_TPTC_TPTC_TCCFG_FIFOSIZE_RESETVAL (0x00000005U)
  257. #define CSL_TPTC_TPTC_TCCFG_FIFOSIZE_MAX (0x00000007U)
  258. #define CSL_TPTC_TPTC_TCCFG_BUS_WIDTH_MASK (0x00000030U)
  259. #define CSL_TPTC_TPTC_TCCFG_BUS_WIDTH_SHIFT (4U)
  260. #define CSL_TPTC_TPTC_TCCFG_BUS_WIDTH_RESETVAL (0x00000003U)
  261. #define CSL_TPTC_TPTC_TCCFG_BUS_WIDTH_MAX (0x00000003U)
  262. #define CSL_TPTC_TPTC_TCCFG_DREGDEPTH_MASK (0x00000300U)
  263. #define CSL_TPTC_TPTC_TCCFG_DREGDEPTH_SHIFT (8U)
  264. #define CSL_TPTC_TPTC_TCCFG_DREGDEPTH_RESETVAL (0x00000002U)
  265. #define CSL_TPTC_TPTC_TCCFG_DREGDEPTH_MAX (0x00000003U)
  266. #define CSL_TPTC_TPTC_TCCFG_RESETVAL (0x00000235U)
  267. /* TPTC_CLKGDIS */
  268. #define CSL_TPTC_TPTC_CLKGDIS_CLKGDIS_MASK (0x00000001U)
  269. #define CSL_TPTC_TPTC_CLKGDIS_CLKGDIS_SHIFT (0U)
  270. #define CSL_TPTC_TPTC_CLKGDIS_CLKGDIS_RESETVAL (0x00000000U)
  271. #define CSL_TPTC_TPTC_CLKGDIS_CLKGDIS_MAX (0x00000001U)
  272. #define CSL_TPTC_TPTC_CLKGDIS_RESETVAL (0x00000000U)
  273. /* TPTC_STAT */
  274. #define CSL_TPTC_TPTC_STAT_PROGBUSY_MASK (0x00000001U)
  275. #define CSL_TPTC_TPTC_STAT_PROGBUSY_SHIFT (0U)
  276. #define CSL_TPTC_TPTC_STAT_PROGBUSY_RESETVAL (0x00000000U)
  277. #define CSL_TPTC_TPTC_STAT_PROGBUSY_MAX (0x00000001U)
  278. #define CSL_TPTC_TPTC_STAT_SRCACT_MASK (0x00000002U)
  279. #define CSL_TPTC_TPTC_STAT_SRCACT_SHIFT (1U)
  280. #define CSL_TPTC_TPTC_STAT_SRCACT_RESETVAL (0x00000000U)
  281. #define CSL_TPTC_TPTC_STAT_SRCACT_MAX (0x00000001U)
  282. #define CSL_TPTC_TPTC_STAT_WSACT_MASK (0x00000004U)
  283. #define CSL_TPTC_TPTC_STAT_WSACT_SHIFT (2U)
  284. #define CSL_TPTC_TPTC_STAT_WSACT_RESETVAL (0x00000000U)
  285. #define CSL_TPTC_TPTC_STAT_WSACT_MAX (0x00000001U)
  286. #define CSL_TPTC_TPTC_STAT_DSTACT_MASK (0x00000070U)
  287. #define CSL_TPTC_TPTC_STAT_DSTACT_SHIFT (4U)
  288. #define CSL_TPTC_TPTC_STAT_DSTACT_RESETVAL (0x00000000U)
  289. #define CSL_TPTC_TPTC_STAT_DSTACT_MAX (0x00000007U)
  290. #define CSL_TPTC_TPTC_STAT_ACT_MASK (0x00000100U)
  291. #define CSL_TPTC_TPTC_STAT_ACT_SHIFT (8U)
  292. #define CSL_TPTC_TPTC_STAT_ACT_RESETVAL (0x00000000U)
  293. #define CSL_TPTC_TPTC_STAT_ACT_MAX (0x00000001U)
  294. #define CSL_TPTC_TPTC_STAT_DFSTRTPTR_MASK (0x00003000U)
  295. #define CSL_TPTC_TPTC_STAT_DFSTRTPTR_SHIFT (12U)
  296. #define CSL_TPTC_TPTC_STAT_DFSTRTPTR_RESETVAL (0x00000000U)
  297. #define CSL_TPTC_TPTC_STAT_DFSTRTPTR_MAX (0x00000003U)
  298. #define CSL_TPTC_TPTC_STAT_RESETVAL (0x00000000U)
  299. /* TPTC_INTSTAT */
  300. #define CSL_TPTC_TPTC_INTSTAT_PROGEMPTY_MASK (0x00000001U)
  301. #define CSL_TPTC_TPTC_INTSTAT_PROGEMPTY_SHIFT (0U)
  302. #define CSL_TPTC_TPTC_INTSTAT_PROGEMPTY_RESETVAL (0x00000000U)
  303. #define CSL_TPTC_TPTC_INTSTAT_PROGEMPTY_MAX (0x00000001U)
  304. #define CSL_TPTC_TPTC_INTSTAT_TRDONE_MASK (0x00000002U)
  305. #define CSL_TPTC_TPTC_INTSTAT_TRDONE_SHIFT (1U)
  306. #define CSL_TPTC_TPTC_INTSTAT_TRDONE_RESETVAL (0x00000000U)
  307. #define CSL_TPTC_TPTC_INTSTAT_TRDONE_MAX (0x00000001U)
  308. #define CSL_TPTC_TPTC_INTSTAT_RESETVAL (0x00000000U)
  309. /* TPTC_INTEN */
  310. #define CSL_TPTC_TPTC_INTEN_PROGEMPTY_MASK (0x00000001U)
  311. #define CSL_TPTC_TPTC_INTEN_PROGEMPTY_SHIFT (0U)
  312. #define CSL_TPTC_TPTC_INTEN_PROGEMPTY_RESETVAL (0x00000000U)
  313. #define CSL_TPTC_TPTC_INTEN_PROGEMPTY_MAX (0x00000001U)
  314. #define CSL_TPTC_TPTC_INTEN_TRDONE_MASK (0x00000002U)
  315. #define CSL_TPTC_TPTC_INTEN_TRDONE_SHIFT (1U)
  316. #define CSL_TPTC_TPTC_INTEN_TRDONE_RESETVAL (0x00000000U)
  317. #define CSL_TPTC_TPTC_INTEN_TRDONE_MAX (0x00000001U)
  318. #define CSL_TPTC_TPTC_INTEN_RESETVAL (0x00000000U)
  319. /* TPTC_INTCLR */
  320. #define CSL_TPTC_TPTC_INTCLR_PROGEMPTY_MASK (0x00000001U)
  321. #define CSL_TPTC_TPTC_INTCLR_PROGEMPTY_SHIFT (0U)
  322. #define CSL_TPTC_TPTC_INTCLR_PROGEMPTY_RESETVAL (0x00000000U)
  323. #define CSL_TPTC_TPTC_INTCLR_PROGEMPTY_MAX (0x00000001U)
  324. #define CSL_TPTC_TPTC_INTCLR_TRDONE_MASK (0x00000002U)
  325. #define CSL_TPTC_TPTC_INTCLR_TRDONE_SHIFT (1U)
  326. #define CSL_TPTC_TPTC_INTCLR_TRDONE_RESETVAL (0x00000000U)
  327. #define CSL_TPTC_TPTC_INTCLR_TRDONE_MAX (0x00000001U)
  328. #define CSL_TPTC_TPTC_INTCLR_RESETVAL (0x00000000U)
  329. /* TPTC_INTCMD */
  330. #define CSL_TPTC_TPTC_INTCMD_EVAL_MASK (0x00000001U)
  331. #define CSL_TPTC_TPTC_INTCMD_EVAL_SHIFT (0U)
  332. #define CSL_TPTC_TPTC_INTCMD_EVAL_RESETVAL (0x00000000U)
  333. #define CSL_TPTC_TPTC_INTCMD_EVAL_MAX (0x00000001U)
  334. #define CSL_TPTC_TPTC_INTCMD_SET_MASK (0x00000002U)
  335. #define CSL_TPTC_TPTC_INTCMD_SET_SHIFT (1U)
  336. #define CSL_TPTC_TPTC_INTCMD_SET_RESETVAL (0x00000000U)
  337. #define CSL_TPTC_TPTC_INTCMD_SET_MAX (0x00000001U)
  338. #define CSL_TPTC_TPTC_INTCMD_RESETVAL (0x00000000U)
  339. /* TPTC_ERRSTAT */
  340. #define CSL_TPTC_TPTC_ERRSTAT_BUSERR_MASK (0x00000001U)
  341. #define CSL_TPTC_TPTC_ERRSTAT_BUSERR_SHIFT (0U)
  342. #define CSL_TPTC_TPTC_ERRSTAT_BUSERR_RESETVAL (0x00000000U)
  343. #define CSL_TPTC_TPTC_ERRSTAT_BUSERR_MAX (0x00000001U)
  344. #define CSL_TPTC_TPTC_ERRSTAT_TRERR_MASK (0x00000002U)
  345. #define CSL_TPTC_TPTC_ERRSTAT_TRERR_SHIFT (1U)
  346. #define CSL_TPTC_TPTC_ERRSTAT_TRERR_RESETVAL (0x00000000U)
  347. #define CSL_TPTC_TPTC_ERRSTAT_TRERR_MAX (0x00000001U)
  348. #define CSL_TPTC_TPTC_ERRSTAT_MMRAERR_MASK (0x00000008U)
  349. #define CSL_TPTC_TPTC_ERRSTAT_MMRAERR_SHIFT (3U)
  350. #define CSL_TPTC_TPTC_ERRSTAT_MMRAERR_RESETVAL (0x00000000U)
  351. #define CSL_TPTC_TPTC_ERRSTAT_MMRAERR_MAX (0x00000001U)
  352. #define CSL_TPTC_TPTC_ERRSTAT_RESETVAL (0x00000000U)
  353. /* TPTC_ERREN */
  354. #define CSL_TPTC_TPTC_ERREN_BUSERR_MASK (0x00000001U)
  355. #define CSL_TPTC_TPTC_ERREN_BUSERR_SHIFT (0U)
  356. #define CSL_TPTC_TPTC_ERREN_BUSERR_RESETVAL (0x00000000U)
  357. #define CSL_TPTC_TPTC_ERREN_BUSERR_MAX (0x00000001U)
  358. #define CSL_TPTC_TPTC_ERREN_TRERR_MASK (0x00000002U)
  359. #define CSL_TPTC_TPTC_ERREN_TRERR_SHIFT (1U)
  360. #define CSL_TPTC_TPTC_ERREN_TRERR_RESETVAL (0x00000000U)
  361. #define CSL_TPTC_TPTC_ERREN_TRERR_MAX (0x00000001U)
  362. #define CSL_TPTC_TPTC_ERREN_MMRAERR_MASK (0x00000008U)
  363. #define CSL_TPTC_TPTC_ERREN_MMRAERR_SHIFT (3U)
  364. #define CSL_TPTC_TPTC_ERREN_MMRAERR_RESETVAL (0x00000000U)
  365. #define CSL_TPTC_TPTC_ERREN_MMRAERR_MAX (0x00000001U)
  366. #define CSL_TPTC_TPTC_ERREN_RESETVAL (0x00000000U)
  367. /* TPTC_ERRCLR */
  368. #define CSL_TPTC_TPTC_ERRCLR_BUSERR_MASK (0x00000001U)
  369. #define CSL_TPTC_TPTC_ERRCLR_BUSERR_SHIFT (0U)
  370. #define CSL_TPTC_TPTC_ERRCLR_BUSERR_RESETVAL (0x00000000U)
  371. #define CSL_TPTC_TPTC_ERRCLR_BUSERR_MAX (0x00000001U)
  372. #define CSL_TPTC_TPTC_ERRCLR_TRERR_MASK (0x00000002U)
  373. #define CSL_TPTC_TPTC_ERRCLR_TRERR_SHIFT (1U)
  374. #define CSL_TPTC_TPTC_ERRCLR_TRERR_RESETVAL (0x00000000U)
  375. #define CSL_TPTC_TPTC_ERRCLR_TRERR_MAX (0x00000001U)
  376. #define CSL_TPTC_TPTC_ERRCLR_MMRAERR_MASK (0x00000008U)
  377. #define CSL_TPTC_TPTC_ERRCLR_MMRAERR_SHIFT (3U)
  378. #define CSL_TPTC_TPTC_ERRCLR_MMRAERR_RESETVAL (0x00000000U)
  379. #define CSL_TPTC_TPTC_ERRCLR_MMRAERR_MAX (0x00000001U)
  380. #define CSL_TPTC_TPTC_ERRCLR_RESETVAL (0x00000000U)
  381. /* TPTC_ERRDET */
  382. #define CSL_TPTC_TPTC_ERRDET_STAT_MASK (0x0000000FU)
  383. #define CSL_TPTC_TPTC_ERRDET_STAT_SHIFT (0U)
  384. #define CSL_TPTC_TPTC_ERRDET_STAT_RESETVAL (0x00000000U)
  385. #define CSL_TPTC_TPTC_ERRDET_STAT_MAX (0x0000000fU)
  386. #define CSL_TPTC_TPTC_ERRDET_TCC_MASK (0x00003F00U)
  387. #define CSL_TPTC_TPTC_ERRDET_TCC_SHIFT (8U)
  388. #define CSL_TPTC_TPTC_ERRDET_TCC_RESETVAL (0x00000000U)
  389. #define CSL_TPTC_TPTC_ERRDET_TCC_MAX (0x0000003fU)
  390. #define CSL_TPTC_TPTC_ERRDET_TCINTEN_MASK (0x00010000U)
  391. #define CSL_TPTC_TPTC_ERRDET_TCINTEN_SHIFT (16U)
  392. #define CSL_TPTC_TPTC_ERRDET_TCINTEN_RESETVAL (0x00000000U)
  393. #define CSL_TPTC_TPTC_ERRDET_TCINTEN_MAX (0x00000001U)
  394. #define CSL_TPTC_TPTC_ERRDET_TCCHEN_MASK (0x00020000U)
  395. #define CSL_TPTC_TPTC_ERRDET_TCCHEN_SHIFT (17U)
  396. #define CSL_TPTC_TPTC_ERRDET_TCCHEN_RESETVAL (0x00000000U)
  397. #define CSL_TPTC_TPTC_ERRDET_TCCHEN_MAX (0x00000001U)
  398. #define CSL_TPTC_TPTC_ERRDET_RESETVAL (0x00000000U)
  399. /* TPTC_ERRCMD */
  400. #define CSL_TPTC_TPTC_ERRCMD_EVAL_MASK (0x00000001U)
  401. #define CSL_TPTC_TPTC_ERRCMD_EVAL_SHIFT (0U)
  402. #define CSL_TPTC_TPTC_ERRCMD_EVAL_RESETVAL (0x00000000U)
  403. #define CSL_TPTC_TPTC_ERRCMD_EVAL_MAX (0x00000001U)
  404. #define CSL_TPTC_TPTC_ERRCMD_SET_MASK (0x00000002U)
  405. #define CSL_TPTC_TPTC_ERRCMD_SET_SHIFT (1U)
  406. #define CSL_TPTC_TPTC_ERRCMD_SET_RESETVAL (0x00000000U)
  407. #define CSL_TPTC_TPTC_ERRCMD_SET_MAX (0x00000001U)
  408. #define CSL_TPTC_TPTC_ERRCMD_RESETVAL (0x00000000U)
  409. /* TPTC_RDRATE */
  410. #define CSL_TPTC_TPTC_RDRATE_RDRATE_MASK (0x00000003U)
  411. #define CSL_TPTC_TPTC_RDRATE_RDRATE_SHIFT (0U)
  412. #define CSL_TPTC_TPTC_RDRATE_RDRATE_RESETVAL (0x00000000U)
  413. #define CSL_TPTC_TPTC_RDRATE_RDRATE_MAX (0x00000003U)
  414. #define CSL_TPTC_TPTC_RDRATE_RESETVAL (0x00000000U)
  415. /* TPTC_POPT */
  416. #define CSL_TPTC_TPTC_POPT_SAM_MASK (0x00000001U)
  417. #define CSL_TPTC_TPTC_POPT_SAM_SHIFT (0U)
  418. #define CSL_TPTC_TPTC_POPT_SAM_RESETVAL (0x00000000U)
  419. #define CSL_TPTC_TPTC_POPT_SAM_MAX (0x00000001U)
  420. #define CSL_TPTC_TPTC_POPT_DAM_MASK (0x00000002U)
  421. #define CSL_TPTC_TPTC_POPT_DAM_SHIFT (1U)
  422. #define CSL_TPTC_TPTC_POPT_DAM_RESETVAL (0x00000000U)
  423. #define CSL_TPTC_TPTC_POPT_DAM_MAX (0x00000001U)
  424. #define CSL_TPTC_TPTC_POPT_PRIORITY_MASK (0x00000070U)
  425. #define CSL_TPTC_TPTC_POPT_PRIORITY_SHIFT (4U)
  426. #define CSL_TPTC_TPTC_POPT_PRIORITY_RESETVAL (0x00000000U)
  427. #define CSL_TPTC_TPTC_POPT_PRIORITY_MAX (0x00000007U)
  428. #define CSL_TPTC_TPTC_POPT_FWID_MASK (0x00000700U)
  429. #define CSL_TPTC_TPTC_POPT_FWID_SHIFT (8U)
  430. #define CSL_TPTC_TPTC_POPT_FWID_RESETVAL (0x00000000U)
  431. #define CSL_TPTC_TPTC_POPT_FWID_MAX (0x00000007U)
  432. #define CSL_TPTC_TPTC_POPT_TCC_MASK (0x0003F000U)
  433. #define CSL_TPTC_TPTC_POPT_TCC_SHIFT (12U)
  434. #define CSL_TPTC_TPTC_POPT_TCC_RESETVAL (0x00000000U)
  435. #define CSL_TPTC_TPTC_POPT_TCC_MAX (0x0000003fU)
  436. #define CSL_TPTC_TPTC_POPT_TCINTEN_MASK (0x00100000U)
  437. #define CSL_TPTC_TPTC_POPT_TCINTEN_SHIFT (20U)
  438. #define CSL_TPTC_TPTC_POPT_TCINTEN_RESETVAL (0x00000000U)
  439. #define CSL_TPTC_TPTC_POPT_TCINTEN_MAX (0x00000001U)
  440. #define CSL_TPTC_TPTC_POPT_TCCHEN_MASK (0x00400000U)
  441. #define CSL_TPTC_TPTC_POPT_TCCHEN_SHIFT (22U)
  442. #define CSL_TPTC_TPTC_POPT_TCCHEN_RESETVAL (0x00000000U)
  443. #define CSL_TPTC_TPTC_POPT_TCCHEN_MAX (0x00000001U)
  444. #define CSL_TPTC_TPTC_POPT_RESETVAL (0x00000000U)
  445. /* TPTC_PSRC */
  446. #define CSL_TPTC_TPTC_PSRC_SADDR_MASK (0xFFFFFFFFU)
  447. #define CSL_TPTC_TPTC_PSRC_SADDR_SHIFT (0U)
  448. #define CSL_TPTC_TPTC_PSRC_SADDR_RESETVAL (0x00000000U)
  449. #define CSL_TPTC_TPTC_PSRC_SADDR_MAX (0xffffffffU)
  450. #define CSL_TPTC_TPTC_PSRC_RESETVAL (0x00000000U)
  451. /* TPTC_PCNT */
  452. #define CSL_TPTC_TPTC_PCNT_ACNT_MASK (0x0000FFFFU)
  453. #define CSL_TPTC_TPTC_PCNT_ACNT_SHIFT (0U)
  454. #define CSL_TPTC_TPTC_PCNT_ACNT_RESETVAL (0x00000000U)
  455. #define CSL_TPTC_TPTC_PCNT_ACNT_MAX (0x0000ffffU)
  456. #define CSL_TPTC_TPTC_PCNT_BCNT_MASK (0xFFFF0000U)
  457. #define CSL_TPTC_TPTC_PCNT_BCNT_SHIFT (16U)
  458. #define CSL_TPTC_TPTC_PCNT_BCNT_RESETVAL (0x00000000U)
  459. #define CSL_TPTC_TPTC_PCNT_BCNT_MAX (0x0000ffffU)
  460. #define CSL_TPTC_TPTC_PCNT_RESETVAL (0x00000000U)
  461. /* TPTC_PDST */
  462. #define CSL_TPTC_TPTC_PDST_DADDR_MASK (0xFFFFFFFFU)
  463. #define CSL_TPTC_TPTC_PDST_DADDR_SHIFT (0U)
  464. #define CSL_TPTC_TPTC_PDST_DADDR_RESETVAL (0x00000000U)
  465. #define CSL_TPTC_TPTC_PDST_DADDR_MAX (0xffffffffU)
  466. #define CSL_TPTC_TPTC_PDST_RESETVAL (0x00000000U)
  467. /* TPTC_PBIDX */
  468. #define CSL_TPTC_TPTC_PBIDX_SBIDX_MASK (0x0000FFFFU)
  469. #define CSL_TPTC_TPTC_PBIDX_SBIDX_SHIFT (0U)
  470. #define CSL_TPTC_TPTC_PBIDX_SBIDX_RESETVAL (0x00000000U)
  471. #define CSL_TPTC_TPTC_PBIDX_SBIDX_MAX (0x0000ffffU)
  472. #define CSL_TPTC_TPTC_PBIDX_DBIDX_MASK (0xFFFF0000U)
  473. #define CSL_TPTC_TPTC_PBIDX_DBIDX_SHIFT (16U)
  474. #define CSL_TPTC_TPTC_PBIDX_DBIDX_RESETVAL (0x00000000U)
  475. #define CSL_TPTC_TPTC_PBIDX_DBIDX_MAX (0x0000ffffU)
  476. #define CSL_TPTC_TPTC_PBIDX_RESETVAL (0x00000000U)
  477. /* TPTC_PMPPRXY */
  478. #define CSL_TPTC_TPTC_PMPPRXY_PRIVID_MASK (0x0000000FU)
  479. #define CSL_TPTC_TPTC_PMPPRXY_PRIVID_SHIFT (0U)
  480. #define CSL_TPTC_TPTC_PMPPRXY_PRIVID_RESETVAL (0x00000000U)
  481. #define CSL_TPTC_TPTC_PMPPRXY_PRIVID_MAX (0x0000000fU)
  482. #define CSL_TPTC_TPTC_PMPPRXY_PRIV_MASK (0x00000100U)
  483. #define CSL_TPTC_TPTC_PMPPRXY_PRIV_SHIFT (8U)
  484. #define CSL_TPTC_TPTC_PMPPRXY_PRIV_RESETVAL (0x00000000U)
  485. #define CSL_TPTC_TPTC_PMPPRXY_PRIV_MAX (0x00000001U)
  486. #define CSL_TPTC_TPTC_PMPPRXY_SECURE_MASK (0x00000200U)
  487. #define CSL_TPTC_TPTC_PMPPRXY_SECURE_SHIFT (9U)
  488. #define CSL_TPTC_TPTC_PMPPRXY_SECURE_RESETVAL (0x00000000U)
  489. #define CSL_TPTC_TPTC_PMPPRXY_SECURE_MAX (0x00000001U)
  490. #define CSL_TPTC_TPTC_PMPPRXY_RESETVAL (0x00000000U)
  491. /* TPTC_SAOPT */
  492. #define CSL_TPTC_TPTC_SAOPT_SAM_MASK (0x00000001U)
  493. #define CSL_TPTC_TPTC_SAOPT_SAM_SHIFT (0U)
  494. #define CSL_TPTC_TPTC_SAOPT_SAM_RESETVAL (0x00000000U)
  495. #define CSL_TPTC_TPTC_SAOPT_SAM_MAX (0x00000001U)
  496. #define CSL_TPTC_TPTC_SAOPT_DAM_MASK (0x00000002U)
  497. #define CSL_TPTC_TPTC_SAOPT_DAM_SHIFT (1U)
  498. #define CSL_TPTC_TPTC_SAOPT_DAM_RESETVAL (0x00000000U)
  499. #define CSL_TPTC_TPTC_SAOPT_DAM_MAX (0x00000001U)
  500. #define CSL_TPTC_TPTC_SAOPT_PRIORITY_MASK (0x00000070U)
  501. #define CSL_TPTC_TPTC_SAOPT_PRIORITY_SHIFT (4U)
  502. #define CSL_TPTC_TPTC_SAOPT_PRIORITY_RESETVAL (0x00000000U)
  503. #define CSL_TPTC_TPTC_SAOPT_PRIORITY_MAX (0x00000007U)
  504. #define CSL_TPTC_TPTC_SAOPT_FWID_MASK (0x00000700U)
  505. #define CSL_TPTC_TPTC_SAOPT_FWID_SHIFT (8U)
  506. #define CSL_TPTC_TPTC_SAOPT_FWID_RESETVAL (0x00000000U)
  507. #define CSL_TPTC_TPTC_SAOPT_FWID_MAX (0x00000007U)
  508. #define CSL_TPTC_TPTC_SAOPT_TCC_MASK (0x0003F000U)
  509. #define CSL_TPTC_TPTC_SAOPT_TCC_SHIFT (12U)
  510. #define CSL_TPTC_TPTC_SAOPT_TCC_RESETVAL (0x00000000U)
  511. #define CSL_TPTC_TPTC_SAOPT_TCC_MAX (0x0000003fU)
  512. #define CSL_TPTC_TPTC_SAOPT_TCINTEN_MASK (0x00100000U)
  513. #define CSL_TPTC_TPTC_SAOPT_TCINTEN_SHIFT (20U)
  514. #define CSL_TPTC_TPTC_SAOPT_TCINTEN_RESETVAL (0x00000000U)
  515. #define CSL_TPTC_TPTC_SAOPT_TCINTEN_MAX (0x00000001U)
  516. #define CSL_TPTC_TPTC_SAOPT_TCCHEN_MASK (0x00400000U)
  517. #define CSL_TPTC_TPTC_SAOPT_TCCHEN_SHIFT (22U)
  518. #define CSL_TPTC_TPTC_SAOPT_TCCHEN_RESETVAL (0x00000000U)
  519. #define CSL_TPTC_TPTC_SAOPT_TCCHEN_MAX (0x00000001U)
  520. #define CSL_TPTC_TPTC_SAOPT_RESETVAL (0x00000000U)
  521. /* TPTC_SASRC */
  522. #define CSL_TPTC_TPTC_SASRC_SADDR_MASK (0xFFFFFFFFU)
  523. #define CSL_TPTC_TPTC_SASRC_SADDR_SHIFT (0U)
  524. #define CSL_TPTC_TPTC_SASRC_SADDR_RESETVAL (0x00000000U)
  525. #define CSL_TPTC_TPTC_SASRC_SADDR_MAX (0xffffffffU)
  526. #define CSL_TPTC_TPTC_SASRC_RESETVAL (0x00000000U)
  527. /* TPTC_SACNT */
  528. #define CSL_TPTC_TPTC_SACNT_ACNT_MASK (0x0000FFFFU)
  529. #define CSL_TPTC_TPTC_SACNT_ACNT_SHIFT (0U)
  530. #define CSL_TPTC_TPTC_SACNT_ACNT_RESETVAL (0x00000000U)
  531. #define CSL_TPTC_TPTC_SACNT_ACNT_MAX (0x0000ffffU)
  532. #define CSL_TPTC_TPTC_SACNT_BCNT_MASK (0xFFFF0000U)
  533. #define CSL_TPTC_TPTC_SACNT_BCNT_SHIFT (16U)
  534. #define CSL_TPTC_TPTC_SACNT_BCNT_RESETVAL (0x00000000U)
  535. #define CSL_TPTC_TPTC_SACNT_BCNT_MAX (0x0000ffffU)
  536. #define CSL_TPTC_TPTC_SACNT_RESETVAL (0x00000000U)
  537. /* TPTC_SABIDX */
  538. #define CSL_TPTC_TPTC_SABIDX_SBIDX_MASK (0x0000FFFFU)
  539. #define CSL_TPTC_TPTC_SABIDX_SBIDX_SHIFT (0U)
  540. #define CSL_TPTC_TPTC_SABIDX_SBIDX_RESETVAL (0x00000000U)
  541. #define CSL_TPTC_TPTC_SABIDX_SBIDX_MAX (0x0000ffffU)
  542. #define CSL_TPTC_TPTC_SABIDX_DBIDX_MASK (0xFFFF0000U)
  543. #define CSL_TPTC_TPTC_SABIDX_DBIDX_SHIFT (16U)
  544. #define CSL_TPTC_TPTC_SABIDX_DBIDX_RESETVAL (0x00000000U)
  545. #define CSL_TPTC_TPTC_SABIDX_DBIDX_MAX (0x0000ffffU)
  546. #define CSL_TPTC_TPTC_SABIDX_RESETVAL (0x00000000U)
  547. /* TPTC_SAMPPRXY */
  548. #define CSL_TPTC_TPTC_SAMPPRXY_PRIVID_MASK (0x0000000FU)
  549. #define CSL_TPTC_TPTC_SAMPPRXY_PRIVID_SHIFT (0U)
  550. #define CSL_TPTC_TPTC_SAMPPRXY_PRIVID_RESETVAL (0x00000000U)
  551. #define CSL_TPTC_TPTC_SAMPPRXY_PRIVID_MAX (0x0000000fU)
  552. #define CSL_TPTC_TPTC_SAMPPRXY_PRIV_MASK (0x00000100U)
  553. #define CSL_TPTC_TPTC_SAMPPRXY_PRIV_SHIFT (8U)
  554. #define CSL_TPTC_TPTC_SAMPPRXY_PRIV_RESETVAL (0x00000000U)
  555. #define CSL_TPTC_TPTC_SAMPPRXY_PRIV_MAX (0x00000001U)
  556. #define CSL_TPTC_TPTC_SAMPPRXY_SECURE_MASK (0x00000200U)
  557. #define CSL_TPTC_TPTC_SAMPPRXY_SECURE_SHIFT (9U)
  558. #define CSL_TPTC_TPTC_SAMPPRXY_SECURE_RESETVAL (0x00000000U)
  559. #define CSL_TPTC_TPTC_SAMPPRXY_SECURE_MAX (0x00000001U)
  560. #define CSL_TPTC_TPTC_SAMPPRXY_RESETVAL (0x00000000U)
  561. /* TPTC_SACNTRLD */
  562. #define CSL_TPTC_TPTC_SACNTRLD_ACNTRLD_MASK (0x0000FFFFU)
  563. #define CSL_TPTC_TPTC_SACNTRLD_ACNTRLD_SHIFT (0U)
  564. #define CSL_TPTC_TPTC_SACNTRLD_ACNTRLD_RESETVAL (0x00000000U)
  565. #define CSL_TPTC_TPTC_SACNTRLD_ACNTRLD_MAX (0x0000ffffU)
  566. #define CSL_TPTC_TPTC_SACNTRLD_RESETVAL (0x00000000U)
  567. /* TPTC_SASRCBREF */
  568. #define CSL_TPTC_TPTC_SASRCBREF_SADDRBREF_MASK (0xFFFFFFFFU)
  569. #define CSL_TPTC_TPTC_SASRCBREF_SADDRBREF_SHIFT (0U)
  570. #define CSL_TPTC_TPTC_SASRCBREF_SADDRBREF_RESETVAL (0x00000000U)
  571. #define CSL_TPTC_TPTC_SASRCBREF_SADDRBREF_MAX (0xffffffffU)
  572. #define CSL_TPTC_TPTC_SASRCBREF_RESETVAL (0x00000000U)
  573. /* TPTC_DFCNTRLD */
  574. #define CSL_TPTC_TPTC_DFCNTRLD_ACNTRLD_MASK (0x0000FFFFU)
  575. #define CSL_TPTC_TPTC_DFCNTRLD_ACNTRLD_SHIFT (0U)
  576. #define CSL_TPTC_TPTC_DFCNTRLD_ACNTRLD_RESETVAL (0x00000000U)
  577. #define CSL_TPTC_TPTC_DFCNTRLD_ACNTRLD_MAX (0x0000ffffU)
  578. #define CSL_TPTC_TPTC_DFCNTRLD_RESETVAL (0x00000000U)
  579. /* TPTC_DFSRCBREF */
  580. #define CSL_TPTC_TPTC_DFSRCBREF_SADDRBREF_MASK (0xFFFFFFFFU)
  581. #define CSL_TPTC_TPTC_DFSRCBREF_SADDRBREF_SHIFT (0U)
  582. #define CSL_TPTC_TPTC_DFSRCBREF_SADDRBREF_RESETVAL (0x00000000U)
  583. #define CSL_TPTC_TPTC_DFSRCBREF_SADDRBREF_MAX (0xffffffffU)
  584. #define CSL_TPTC_TPTC_DFSRCBREF_RESETVAL (0x00000000U)
  585. /* TPTC_DFDSTBREF */
  586. #define CSL_TPTC_TPTC_DFDSTBREF_DADDRBREF_MASK (0xFFFFFFFFU)
  587. #define CSL_TPTC_TPTC_DFDSTBREF_DADDRBREF_SHIFT (0U)
  588. #define CSL_TPTC_TPTC_DFDSTBREF_DADDRBREF_RESETVAL (0x00000000U)
  589. #define CSL_TPTC_TPTC_DFDSTBREF_DADDRBREF_MAX (0xffffffffU)
  590. #define CSL_TPTC_TPTC_DFDSTBREF_RESETVAL (0x00000000U)
  591. #ifdef __cplusplus
  592. }
  593. #endif
  594. #endif