cslr_sr_c3.h 27 KB

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  1. /********************************************************************
  2. * Copyright (C) 2013-2014 Texas Instruments Incorporated.
  3. *
  4. * Redistribution and use in source and binary forms, with or without
  5. * modification, are permitted provided that the following conditions
  6. * are met:
  7. *
  8. * Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. *
  11. * Redistributions in binary form must reproduce the above copyright
  12. * notice, this list of conditions and the following disclaimer in the
  13. * documentation and/or other materials provided with the
  14. * distribution.
  15. *
  16. * Neither the name of Texas Instruments Incorporated nor the names of
  17. * its contributors may be used to endorse or promote products derived
  18. * from this software without specific prior written permission.
  19. *
  20. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  21. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  22. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  23. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  24. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  25. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  26. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  27. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  28. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  30. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31. *
  32. */
  33. #ifndef CSLR_SRC3_H_
  34. #define CSLR_SRC3_H_
  35. #ifdef __cplusplus
  36. extern "C"
  37. {
  38. #endif
  39. #include <ti/csl/cslr.h>
  40. #include <ti/csl/tistdtypes.h>
  41. /**************************************************************************
  42. * Register Overlay Structure for __ALL__
  43. **************************************************************************/
  44. typedef struct {
  45. volatile Uint32 SRCONFIG;
  46. volatile Uint32 SRSTATUS;
  47. volatile Uint32 SENVAL;
  48. volatile Uint32 SENMIN;
  49. volatile Uint32 SENMAX;
  50. volatile Uint32 SENAVG;
  51. volatile Uint32 AVGWEIGHT;
  52. volatile Uint32 NVALUERECIPROCAL;
  53. volatile Uint32 IRQ_EOI;
  54. volatile Uint32 IRQSTATUS_RAW;
  55. volatile Uint32 IRQSTATUS;
  56. volatile Uint32 IRQENABLE_SET;
  57. volatile Uint32 IRQENABLE_CLR;
  58. volatile Uint32 SENERROR;
  59. volatile Uint32 ERRCONFIG;
  60. volatile Uint8 RSVD0[4];
  61. volatile Uint8 RSVD1[4];
  62. volatile Uint8 RSVD2[4];
  63. volatile Uint8 RSVD3[4];
  64. volatile Uint8 RSVD4[4];
  65. } CSL_SrC3Regs;
  66. /**************************************************************************
  67. * Register Macros
  68. **************************************************************************/
  69. /* Configuration bits for the Sensor Core and the Digital Processing */
  70. #define CSL_SRC3_SRCONFIG (0x0U)
  71. /* Status bits that indicate that the values in the register are valid or
  72. * events have occurred */
  73. #define CSL_SRC3_SRSTATUS (0x4U)
  74. /* The current sensor values from the Sensor Core(SVT) */
  75. #define CSL_SRC3_SENVAL (0x8U)
  76. /* The minimum sensor values(SVT) */
  77. #define CSL_SRC3_SENMIN (0xCU)
  78. /* The maximum sensor values(SVT) */
  79. #define CSL_SRC3_SENMAX (0x10U)
  80. /* The average sensor values(SVT) */
  81. #define CSL_SRC3_SENAVG (0x14U)
  82. /* The weighting factor in the average computation */
  83. #define CSL_SRC3_AVGWEIGHT (0x18U)
  84. /* The reciprocal of the SenN and SenP values used in error generation(SVT) */
  85. #define CSL_SRC3_NVALUERECIPROCAL (0x1CU)
  86. /* EOI protocol re-trigger */
  87. #define CSL_SRC3_IRQ_EOI (0x20U)
  88. /* MCU raw interrupt raw status and set */
  89. #define CSL_SRC3_IRQSTATUS_RAW (0x24U)
  90. /* MCU masked interrupt status and clear */
  91. #define CSL_SRC3_IRQSTATUS (0x28U)
  92. /* MCU interrupt enable flag & set */
  93. #define CSL_SRC3_IRQENABLE_SET (0x2CU)
  94. /* MCU interrupt enable flag & clear */
  95. #define CSL_SRC3_IRQENABLE_CLR (0x30U)
  96. /* The sensor error from the error generator */
  97. #define CSL_SRC3_SENERROR (0x34U)
  98. /* The sensor error configuration */
  99. #define CSL_SRC3_ERRCONFIG (0x38U)
  100. /* The current sensor values from the Sensor Core(LVT) */
  101. #define CSL_SRC3_LVTSENVAL(i) (0x3CU + ((i) * (0x4U)))
  102. /* The minimum sensor values(LVT) */
  103. #define CSL_SRC3_LVTSENMIN(i) (0x40U + ((i) * (0x4U)))
  104. /* The maximum sensor values(LVT) */
  105. #define CSL_SRC3_LVTSENMAX(i) (0x44U + ((i) * (0x4U)))
  106. /* The average sensor values(LVT) */
  107. #define CSL_SRC3_LVTSENAVG(i) (0x48U + ((i) * (0x4U)))
  108. /* The reciprocal of the SenN and SenP values used in error generation(LVT) */
  109. #define CSL_SRC3_LVTNVALUERECIPROCAL(i) (0x4CU + ((i) * (0x4U)))
  110. /**************************************************************************
  111. * Field Definition Macros
  112. **************************************************************************/
  113. /* SRCONFIG */
  114. #define CSL_SRC3_SRCONFIG_ACCUMDATA_MASK (0xFFC00000U)
  115. #define CSL_SRC3_SRCONFIG_ACCUMDATA_SHIFT (22U)
  116. #define CSL_SRC3_SRCONFIG_ACCUMDATA_RESETVAL (0x00000080U)
  117. #define CSL_SRC3_SRCONFIG_ACCUMDATA_MAX (0x000003ffU)
  118. #define CSL_SRC3_SRCONFIG_SRCLKLENGTH_MASK (0x003FF000U)
  119. #define CSL_SRC3_SRCONFIG_SRCLKLENGTH_SHIFT (12U)
  120. #define CSL_SRC3_SRCONFIG_SRCLKLENGTH_RESETVAL (0x00000200U)
  121. #define CSL_SRC3_SRCONFIG_SRCLKLENGTH_MAX (0x000003ffU)
  122. #define CSL_SRC3_SRCONFIG_SRENABLE_MASK (0x00000800U)
  123. #define CSL_SRC3_SRCONFIG_SRENABLE_SHIFT (11U)
  124. #define CSL_SRC3_SRCONFIG_SRENABLE_RESETVAL (0x00000000U)
  125. #define CSL_SRC3_SRCONFIG_SRENABLE_MAX (0x00000001U)
  126. #define CSL_SRC3_SRCONFIG_SENENABLE_MASK (0x00000400U)
  127. #define CSL_SRC3_SRCONFIG_SENENABLE_SHIFT (10U)
  128. #define CSL_SRC3_SRCONFIG_SENENABLE_RESETVAL (0x00000001U)
  129. #define CSL_SRC3_SRCONFIG_SENENABLE_MAX (0x00000001U)
  130. #define CSL_SRC3_SRCONFIG_ERRORGENERATORENABLE_MASK (0x00000200U)
  131. #define CSL_SRC3_SRCONFIG_ERRORGENERATORENABLE_SHIFT (9U)
  132. #define CSL_SRC3_SRCONFIG_ERRORGENERATORENABLE_RESETVAL (0x00000000U)
  133. #define CSL_SRC3_SRCONFIG_ERRORGENERATORENABLE_MAX (0x00000001U)
  134. #define CSL_SRC3_SRCONFIG_MINMAXAVGENABLE_MASK (0x00000100U)
  135. #define CSL_SRC3_SRCONFIG_MINMAXAVGENABLE_SHIFT (8U)
  136. #define CSL_SRC3_SRCONFIG_MINMAXAVGENABLE_RESETVAL (0x00000000U)
  137. #define CSL_SRC3_SRCONFIG_MINMAXAVGENABLE_MAX (0x00000001U)
  138. #define CSL_SRC3_SRCONFIG_LVTSENENABLE_MASK (0x00000000U)
  139. #define CSL_SRC3_SRCONFIG_LVTSENENABLE_SHIFT (4U)
  140. #define CSL_SRC3_SRCONFIG_LVTSENENABLE_RESETVAL (0x00000000U)
  141. #define CSL_SRC3_SRCONFIG_LVTSENENABLE_MAX (0x00000000U)
  142. #define CSL_SRC3_SRCONFIG_LVTSENNENABLE_MASK (0x00000000U)
  143. #define CSL_SRC3_SRCONFIG_LVTSENNENABLE_SHIFT (3U)
  144. #define CSL_SRC3_SRCONFIG_LVTSENNENABLE_RESETVAL (0x00000000U)
  145. #define CSL_SRC3_SRCONFIG_LVTSENNENABLE_MAX (0x00000000U)
  146. #define CSL_SRC3_SRCONFIG_LVTSENPENABLE_MASK (0x00000000U)
  147. #define CSL_SRC3_SRCONFIG_LVTSENPENABLE_SHIFT (2U)
  148. #define CSL_SRC3_SRCONFIG_LVTSENPENABLE_RESETVAL (0x00000000U)
  149. #define CSL_SRC3_SRCONFIG_LVTSENPENABLE_MAX (0x00000000U)
  150. #define CSL_SRC3_SRCONFIG_SENNENABLE_MASK (0x00000002U)
  151. #define CSL_SRC3_SRCONFIG_SENNENABLE_SHIFT (1U)
  152. #define CSL_SRC3_SRCONFIG_SENNENABLE_RESETVAL (0x00000001U)
  153. #define CSL_SRC3_SRCONFIG_SENNENABLE_MAX (0x00000001U)
  154. #define CSL_SRC3_SRCONFIG_SENPENABLE_MASK (0x00000001U)
  155. #define CSL_SRC3_SRCONFIG_SENPENABLE_SHIFT (0U)
  156. #define CSL_SRC3_SRCONFIG_SENPENABLE_RESETVAL (0x00000000U)
  157. #define CSL_SRC3_SRCONFIG_SENPENABLE_MAX (0x00000001U)
  158. #define CSL_SRC3_SRCONFIG_RESETVAL (0x20200402U)
  159. /* SRSTATUS */
  160. #define CSL_SRC3_SRSTATUS_MINMAXAVGACCUMVALID_MASK (0x00000001U)
  161. #define CSL_SRC3_SRSTATUS_MINMAXAVGACCUMVALID_SHIFT (0U)
  162. #define CSL_SRC3_SRSTATUS_MINMAXAVGACCUMVALID_RESETVAL (0x00000000U)
  163. #define CSL_SRC3_SRSTATUS_MINMAXAVGACCUMVALID_MAX (0x00000001U)
  164. #define CSL_SRC3_SRSTATUS_ERRORGENERATORVALID_MASK (0x00000002U)
  165. #define CSL_SRC3_SRSTATUS_ERRORGENERATORVALID_SHIFT (1U)
  166. #define CSL_SRC3_SRSTATUS_ERRORGENERATORVALID_RESETVAL (0x00000000U)
  167. #define CSL_SRC3_SRSTATUS_ERRORGENERATORVALID_MAX (0x00000001U)
  168. #define CSL_SRC3_SRSTATUS_MINMAXAVGVALID_MASK (0x00000004U)
  169. #define CSL_SRC3_SRSTATUS_MINMAXAVGVALID_SHIFT (2U)
  170. #define CSL_SRC3_SRSTATUS_MINMAXAVGVALID_RESETVAL (0x00000000U)
  171. #define CSL_SRC3_SRSTATUS_MINMAXAVGVALID_MAX (0x00000001U)
  172. #define CSL_SRC3_SRSTATUS_AVGERRVALID_MASK (0x00000008U)
  173. #define CSL_SRC3_SRSTATUS_AVGERRVALID_SHIFT (3U)
  174. #define CSL_SRC3_SRSTATUS_AVGERRVALID_RESETVAL (0x00000000U)
  175. #define CSL_SRC3_SRSTATUS_AVGERRVALID_MAX (0x00000001U)
  176. #define CSL_SRC3_SRSTATUS_RESETVAL (0x00000000U)
  177. /* SENVAL */
  178. #define CSL_SRC3_SENVAL_SENNVAL_MASK (0x0000FFFFU)
  179. #define CSL_SRC3_SENVAL_SENNVAL_SHIFT (0U)
  180. #define CSL_SRC3_SENVAL_SENNVAL_RESETVAL (0x00000000U)
  181. #define CSL_SRC3_SENVAL_SENNVAL_MAX (0x0000ffffU)
  182. #define CSL_SRC3_SENVAL_SENPVAL_MASK (0xFFFF0000U)
  183. #define CSL_SRC3_SENVAL_SENPVAL_SHIFT (16U)
  184. #define CSL_SRC3_SENVAL_SENPVAL_RESETVAL (0x00000000U)
  185. #define CSL_SRC3_SENVAL_SENPVAL_MAX (0x0000ffffU)
  186. #define CSL_SRC3_SENVAL_RESETVAL (0x00000000U)
  187. /* SENMIN */
  188. #define CSL_SRC3_SENMIN_SENNMIN_MASK (0x0000FFFFU)
  189. #define CSL_SRC3_SENMIN_SENNMIN_SHIFT (0U)
  190. #define CSL_SRC3_SENMIN_SENNMIN_RESETVAL (0x0000ffffU)
  191. #define CSL_SRC3_SENMIN_SENNMIN_MAX (0x0000ffffU)
  192. #define CSL_SRC3_SENMIN_SENPMIN_MASK (0xFFFF0000U)
  193. #define CSL_SRC3_SENMIN_SENPMIN_SHIFT (16U)
  194. #define CSL_SRC3_SENMIN_SENPMIN_RESETVAL (0x0000ffffU)
  195. #define CSL_SRC3_SENMIN_SENPMIN_MAX (0x0000ffffU)
  196. #define CSL_SRC3_SENMIN_RESETVAL (0xffffffffU)
  197. /* SENMAX */
  198. #define CSL_SRC3_SENMAX_SENNMAX_MASK (0x0000FFFFU)
  199. #define CSL_SRC3_SENMAX_SENNMAX_SHIFT (0U)
  200. #define CSL_SRC3_SENMAX_SENNMAX_RESETVAL (0x00000000U)
  201. #define CSL_SRC3_SENMAX_SENNMAX_MAX (0x0000ffffU)
  202. #define CSL_SRC3_SENMAX_SENPMAX_MASK (0xFFFF0000U)
  203. #define CSL_SRC3_SENMAX_SENPMAX_SHIFT (16U)
  204. #define CSL_SRC3_SENMAX_SENPMAX_RESETVAL (0x00000000U)
  205. #define CSL_SRC3_SENMAX_SENPMAX_MAX (0x0000ffffU)
  206. #define CSL_SRC3_SENMAX_RESETVAL (0x00000000U)
  207. /* SENAVG */
  208. #define CSL_SRC3_SENAVG_SENNAVG_MASK (0x0000FFFFU)
  209. #define CSL_SRC3_SENAVG_SENNAVG_SHIFT (0U)
  210. #define CSL_SRC3_SENAVG_SENNAVG_RESETVAL (0x00000000U)
  211. #define CSL_SRC3_SENAVG_SENNAVG_MAX (0x0000ffffU)
  212. #define CSL_SRC3_SENAVG_SENPAVG_MASK (0xFFFF0000U)
  213. #define CSL_SRC3_SENAVG_SENPAVG_SHIFT (16U)
  214. #define CSL_SRC3_SENAVG_SENPAVG_RESETVAL (0x00000000U)
  215. #define CSL_SRC3_SENAVG_SENPAVG_MAX (0x0000ffffU)
  216. #define CSL_SRC3_SENAVG_RESETVAL (0x00000000U)
  217. /* AVGWEIGHT */
  218. #define CSL_SRC3_AVGWEIGHT_SENNAVGWEIGHT_MASK (0x0000FFFFU)
  219. #define CSL_SRC3_AVGWEIGHT_SENNAVGWEIGHT_SHIFT (0U)
  220. #define CSL_SRC3_AVGWEIGHT_SENNAVGWEIGHT_RESETVAL (0x00000000U)
  221. #define CSL_SRC3_AVGWEIGHT_SENNAVGWEIGHT_MAX (0x0000ffffU)
  222. #define CSL_SRC3_AVGWEIGHT_SENPAVGWEIGHT1_MASK (0xFFFF0000U)
  223. #define CSL_SRC3_AVGWEIGHT_SENPAVGWEIGHT1_SHIFT (16U)
  224. #define CSL_SRC3_AVGWEIGHT_SENPAVGWEIGHT1_RESETVAL (0x00000000U)
  225. #define CSL_SRC3_AVGWEIGHT_SENPAVGWEIGHT1_MAX (0x0000ffffU)
  226. #define CSL_SRC3_AVGWEIGHT_RESETVAL (0x00000000U)
  227. /* NVALUERECIPROCAL */
  228. #define CSL_SRC3_NVALUERECIPROCAL_SENNRN_MASK (0x000000FFU)
  229. #define CSL_SRC3_NVALUERECIPROCAL_SENNRN_SHIFT (0U)
  230. #define CSL_SRC3_NVALUERECIPROCAL_SENNRN_RESETVAL (0x00000000U)
  231. #define CSL_SRC3_NVALUERECIPROCAL_SENNRN_MAX (0x000000ffU)
  232. #define CSL_SRC3_NVALUERECIPROCAL_SENPRN_MASK (0x0000FF00U)
  233. #define CSL_SRC3_NVALUERECIPROCAL_SENPRN_SHIFT (8U)
  234. #define CSL_SRC3_NVALUERECIPROCAL_SENPRN_RESETVAL (0x00000000U)
  235. #define CSL_SRC3_NVALUERECIPROCAL_SENPRN_MAX (0x000000ffU)
  236. #define CSL_SRC3_NVALUERECIPROCAL_SENNGAIN_MASK (0x000F0000U)
  237. #define CSL_SRC3_NVALUERECIPROCAL_SENNGAIN_SHIFT (16U)
  238. #define CSL_SRC3_NVALUERECIPROCAL_SENNGAIN_RESETVAL (0x00000000U)
  239. #define CSL_SRC3_NVALUERECIPROCAL_SENNGAIN_MAX (0x0000000fU)
  240. #define CSL_SRC3_NVALUERECIPROCAL_SENPGAIN_MASK (0x00F00000U)
  241. #define CSL_SRC3_NVALUERECIPROCAL_SENPGAIN_SHIFT (20U)
  242. #define CSL_SRC3_NVALUERECIPROCAL_SENPGAIN_RESETVAL (0x00000000U)
  243. #define CSL_SRC3_NVALUERECIPROCAL_SENPGAIN_MAX (0x0000000fU)
  244. #define CSL_SRC3_NVALUERECIPROCAL_RESETVAL (0x00000000U)
  245. /* IRQ_EOI */
  246. #define CSL_SRC3_IRQ_EOI_EOI_MASK (0x00000001U)
  247. #define CSL_SRC3_IRQ_EOI_EOI_SHIFT (0U)
  248. #define CSL_SRC3_IRQ_EOI_EOI_RESETVAL (0x00000000U)
  249. #define CSL_SRC3_IRQ_EOI_EOI_MAX (0x00000001U)
  250. #define CSL_SRC3_IRQ_EOI_RESETVAL (0x00000000U)
  251. /* IRQSTATUS_RAW */
  252. #define CSL_SRC3_IRQSTATUS_RAW_MCUDISABLEACKINTSTATRAW_MASK (0x00000001U)
  253. #define CSL_SRC3_IRQSTATUS_RAW_MCUDISABLEACKINTSTATRAW_SHIFT (0U)
  254. #define CSL_SRC3_IRQSTATUS_RAW_MCUDISABLEACKINTSTATRAW_RESETVAL (0x00000000U)
  255. #define CSL_SRC3_IRQSTATUS_RAW_MCUDISABLEACKINTSTATRAW_MAX (0x00000001U)
  256. #define CSL_SRC3_IRQSTATUS_RAW_MCUVALIDINTSTATRAW_MASK (0x00000004U)
  257. #define CSL_SRC3_IRQSTATUS_RAW_MCUVALIDINTSTATRAW_SHIFT (2U)
  258. #define CSL_SRC3_IRQSTATUS_RAW_MCUVALIDINTSTATRAW_RESETVAL (0x00000000U)
  259. #define CSL_SRC3_IRQSTATUS_RAW_MCUVALIDINTSTATRAW_MAX (0x00000001U)
  260. #define CSL_SRC3_IRQSTATUS_RAW_MCUBOUNDSINTSTATRAW_MASK (0x00000002U)
  261. #define CSL_SRC3_IRQSTATUS_RAW_MCUBOUNDSINTSTATRAW_SHIFT (1U)
  262. #define CSL_SRC3_IRQSTATUS_RAW_MCUBOUNDSINTSTATRAW_RESETVAL (0x00000000U)
  263. #define CSL_SRC3_IRQSTATUS_RAW_MCUBOUNDSINTSTATRAW_MAX (0x00000001U)
  264. #define CSL_SRC3_IRQSTATUS_RAW_MCUACCUMINTSTATRAW_MASK (0x00000008U)
  265. #define CSL_SRC3_IRQSTATUS_RAW_MCUACCUMINTSTATRAW_SHIFT (3U)
  266. #define CSL_SRC3_IRQSTATUS_RAW_MCUACCUMINTSTATRAW_RESETVAL (0x00000000U)
  267. #define CSL_SRC3_IRQSTATUS_RAW_MCUACCUMINTSTATRAW_MAX (0x00000001U)
  268. #define CSL_SRC3_IRQSTATUS_RAW_RESETVAL (0x00000000U)
  269. /* IRQSTATUS */
  270. #define CSL_SRC3_IRQSTATUS_MCUDISABLEACKINTSTATENA_MASK (0x00000001U)
  271. #define CSL_SRC3_IRQSTATUS_MCUDISABLEACKINTSTATENA_SHIFT (0U)
  272. #define CSL_SRC3_IRQSTATUS_MCUDISABLEACKINTSTATENA_RESETVAL (0x00000000U)
  273. #define CSL_SRC3_IRQSTATUS_MCUDISABLEACKINTSTATENA_MAX (0x00000001U)
  274. #define CSL_SRC3_IRQSTATUS_MCUBOUNDSINTSTATENA_MASK (0x00000002U)
  275. #define CSL_SRC3_IRQSTATUS_MCUBOUNDSINTSTATENA_SHIFT (1U)
  276. #define CSL_SRC3_IRQSTATUS_MCUBOUNDSINTSTATENA_RESETVAL (0x00000000U)
  277. #define CSL_SRC3_IRQSTATUS_MCUBOUNDSINTSTATENA_MAX (0x00000001U)
  278. #define CSL_SRC3_IRQSTATUS_MCUVALIDINTSTATENA_MASK (0x00000004U)
  279. #define CSL_SRC3_IRQSTATUS_MCUVALIDINTSTATENA_SHIFT (2U)
  280. #define CSL_SRC3_IRQSTATUS_MCUVALIDINTSTATENA_RESETVAL (0x00000000U)
  281. #define CSL_SRC3_IRQSTATUS_MCUVALIDINTSTATENA_MAX (0x00000001U)
  282. #define CSL_SRC3_IRQSTATUS_MCUACCUMINTSTATENA_MASK (0x00000008U)
  283. #define CSL_SRC3_IRQSTATUS_MCUACCUMINTSTATENA_SHIFT (3U)
  284. #define CSL_SRC3_IRQSTATUS_MCUACCUMINTSTATENA_RESETVAL (0x00000000U)
  285. #define CSL_SRC3_IRQSTATUS_MCUACCUMINTSTATENA_MAX (0x00000001U)
  286. #define CSL_SRC3_IRQSTATUS_RESETVAL (0x00000000U)
  287. /* IRQENABLE_SET */
  288. #define CSL_SRC3_IRQENABLE_SET_MCUDISABLEACKINTENASET_MASK (0x00000001U)
  289. #define CSL_SRC3_IRQENABLE_SET_MCUDISABLEACKINTENASET_SHIFT (0U)
  290. #define CSL_SRC3_IRQENABLE_SET_MCUDISABLEACKINTENASET_RESETVAL (0x00000000U)
  291. #define CSL_SRC3_IRQENABLE_SET_MCUDISABLEACKINTENASET_MAX (0x00000001U)
  292. #define CSL_SRC3_IRQENABLE_SET_MCUBOUNDSINTENASET_MASK (0x00000002U)
  293. #define CSL_SRC3_IRQENABLE_SET_MCUBOUNDSINTENASET_SHIFT (1U)
  294. #define CSL_SRC3_IRQENABLE_SET_MCUBOUNDSINTENASET_RESETVAL (0x00000000U)
  295. #define CSL_SRC3_IRQENABLE_SET_MCUBOUNDSINTENASET_MAX (0x00000001U)
  296. #define CSL_SRC3_IRQENABLE_SET_MCUVALIDINTENASET_MASK (0x00000004U)
  297. #define CSL_SRC3_IRQENABLE_SET_MCUVALIDINTENASET_SHIFT (2U)
  298. #define CSL_SRC3_IRQENABLE_SET_MCUVALIDINTENASET_RESETVAL (0x00000000U)
  299. #define CSL_SRC3_IRQENABLE_SET_MCUVALIDINTENASET_MAX (0x00000001U)
  300. #define CSL_SRC3_IRQENABLE_SET_MCUACCUMINTENASET_MASK (0x00000008U)
  301. #define CSL_SRC3_IRQENABLE_SET_MCUACCUMINTENASET_SHIFT (3U)
  302. #define CSL_SRC3_IRQENABLE_SET_MCUACCUMINTENASET_RESETVAL (0x00000000U)
  303. #define CSL_SRC3_IRQENABLE_SET_MCUACCUMINTENASET_MAX (0x00000001U)
  304. #define CSL_SRC3_IRQENABLE_SET_RESETVAL (0x00000000U)
  305. /* IRQENABLE_CLR */
  306. #define CSL_SRC3_IRQENABLE_CLR_MCUDISABLEACKINTENACLR_MASK (0x00000001U)
  307. #define CSL_SRC3_IRQENABLE_CLR_MCUDISABLEACKINTENACLR_SHIFT (0U)
  308. #define CSL_SRC3_IRQENABLE_CLR_MCUDISABLEACKINTENACLR_RESETVAL (0x00000000U)
  309. #define CSL_SRC3_IRQENABLE_CLR_MCUDISABLEACKINTENACLR_MAX (0x00000001U)
  310. #define CSL_SRC3_IRQENABLE_CLR_MCUBOUNDSINTENACLR_MASK (0x00000002U)
  311. #define CSL_SRC3_IRQENABLE_CLR_MCUBOUNDSINTENACLR_SHIFT (1U)
  312. #define CSL_SRC3_IRQENABLE_CLR_MCUBOUNDSINTENACLR_RESETVAL (0x00000000U)
  313. #define CSL_SRC3_IRQENABLE_CLR_MCUBOUNDSINTENACLR_MAX (0x00000001U)
  314. #define CSL_SRC3_IRQENABLE_CLR_MCUVALIDINTENACLR_MASK (0x00000004U)
  315. #define CSL_SRC3_IRQENABLE_CLR_MCUVALIDINTENACLR_SHIFT (2U)
  316. #define CSL_SRC3_IRQENABLE_CLR_MCUVALIDINTENACLR_RESETVAL (0x00000000U)
  317. #define CSL_SRC3_IRQENABLE_CLR_MCUVALIDINTENACLR_MAX (0x00000001U)
  318. #define CSL_SRC3_IRQENABLE_CLR_MCUACCUMINTENACLR_MASK (0x00000008U)
  319. #define CSL_SRC3_IRQENABLE_CLR_MCUACCUMINTENACLR_SHIFT (3U)
  320. #define CSL_SRC3_IRQENABLE_CLR_MCUACCUMINTENACLR_RESETVAL (0x00000000U)
  321. #define CSL_SRC3_IRQENABLE_CLR_MCUACCUMINTENACLR_MAX (0x00000001U)
  322. #define CSL_SRC3_IRQENABLE_CLR_RESETVAL (0x00000000U)
  323. /* SENERROR */
  324. #define CSL_SRC3_SENERROR_SENERROR_MASK (0x000000FFU)
  325. #define CSL_SRC3_SENERROR_SENERROR_SHIFT (0U)
  326. #define CSL_SRC3_SENERROR_SENERROR_RESETVAL (0x00000000U)
  327. #define CSL_SRC3_SENERROR_SENERROR_MAX (0x000000ffU)
  328. #define CSL_SRC3_SENERROR_AVGERROR_MASK (0x0000FF00U)
  329. #define CSL_SRC3_SENERROR_AVGERROR_SHIFT (8U)
  330. #define CSL_SRC3_SENERROR_AVGERROR_RESETVAL (0x00000000U)
  331. #define CSL_SRC3_SENERROR_AVGERROR_MAX (0x000000ffU)
  332. #define CSL_SRC3_SENERROR_RESETVAL (0x00000000U)
  333. /* ERRCONFIG */
  334. #define CSL_SRC3_ERRCONFIG_ERRMINLIMIT_MASK (0x000000FFU)
  335. #define CSL_SRC3_ERRCONFIG_ERRMINLIMIT_SHIFT (0U)
  336. #define CSL_SRC3_ERRCONFIG_ERRMINLIMIT_RESETVAL (0x00000080U)
  337. #define CSL_SRC3_ERRCONFIG_ERRMINLIMIT_MAX (0x000000ffU)
  338. #define CSL_SRC3_ERRCONFIG_ERRWEIGHT_MASK (0x00070000U)
  339. #define CSL_SRC3_ERRCONFIG_ERRWEIGHT_SHIFT (16U)
  340. #define CSL_SRC3_ERRCONFIG_ERRWEIGHT_RESETVAL (0x00000000U)
  341. #define CSL_SRC3_ERRCONFIG_ERRWEIGHT_MAX (0x00000007U)
  342. #define CSL_SRC3_ERRCONFIG_ERRMAXLIMIT_MASK (0x0000FF00U)
  343. #define CSL_SRC3_ERRCONFIG_ERRMAXLIMIT_SHIFT (8U)
  344. #define CSL_SRC3_ERRCONFIG_ERRMAXLIMIT_RESETVAL (0x0000007fU)
  345. #define CSL_SRC3_ERRCONFIG_ERRMAXLIMIT_MAX (0x000000ffU)
  346. #define CSL_SRC3_ERRCONFIG_VPBOUNDSINTENABLE_MASK (0x00400000U)
  347. #define CSL_SRC3_ERRCONFIG_VPBOUNDSINTENABLE_SHIFT (22U)
  348. #define CSL_SRC3_ERRCONFIG_VPBOUNDSINTENABLE_RESETVAL (0x00000000U)
  349. #define CSL_SRC3_ERRCONFIG_VPBOUNDSINTENABLE_MAX (0x00000001U)
  350. #define CSL_SRC3_ERRCONFIG_VPBOUNDSINTSTATENA_MASK (0x00800000U)
  351. #define CSL_SRC3_ERRCONFIG_VPBOUNDSINTSTATENA_SHIFT (23U)
  352. #define CSL_SRC3_ERRCONFIG_VPBOUNDSINTSTATENA_RESETVAL (0x00000000U)
  353. #define CSL_SRC3_ERRCONFIG_VPBOUNDSINTSTATENA_MAX (0x00000001U)
  354. #define CSL_SRC3_ERRCONFIG_IDLEMODE_MASK (0x03000000U)
  355. #define CSL_SRC3_ERRCONFIG_IDLEMODE_SHIFT (24U)
  356. #define CSL_SRC3_ERRCONFIG_IDLEMODE_RESETVAL (0x00000002U)
  357. #define CSL_SRC3_ERRCONFIG_IDLEMODE_MAX (0x00000003U)
  358. #define CSL_SRC3_ERRCONFIG_WAKEUPENABLE_MASK (0x04000000U)
  359. #define CSL_SRC3_ERRCONFIG_WAKEUPENABLE_SHIFT (26U)
  360. #define CSL_SRC3_ERRCONFIG_WAKEUPENABLE_RESETVAL (0x00000000U)
  361. #define CSL_SRC3_ERRCONFIG_WAKEUPENABLE_MAX (0x00000001U)
  362. #define CSL_SRC3_ERRCONFIG_RESETVAL (0x02007f80U)
  363. /* LVTSENVAL */
  364. #define CSL_SRC3_LVTSENVAL_LVSENNVAL_MASK (0x0000FFFFU)
  365. #define CSL_SRC3_LVTSENVAL_LVSENNVAL_SHIFT (0U)
  366. #define CSL_SRC3_LVTSENVAL_LVSENNVAL_RESETVAL (0x00000000U)
  367. #define CSL_SRC3_LVTSENVAL_LVSENNVAL_MAX (0x0000ffffU)
  368. #define CSL_SRC3_LVTSENVAL_LVSENPVAL_MASK (0xFFFF0000U)
  369. #define CSL_SRC3_LVTSENVAL_LVSENPVAL_SHIFT (16U)
  370. #define CSL_SRC3_LVTSENVAL_LVSENPVAL_RESETVAL (0x00000000U)
  371. #define CSL_SRC3_LVTSENVAL_LVSENPVAL_MAX (0x0000ffffU)
  372. #define CSL_SRC3_LVTSENVAL_RESETVAL (0x00000000U)
  373. /* LVTSENMIN */
  374. #define CSL_SRC3_LVTSENMIN_LVTSENNMIN_MASK (0x0000FFFFU)
  375. #define CSL_SRC3_LVTSENMIN_LVTSENNMIN_SHIFT (0U)
  376. #define CSL_SRC3_LVTSENMIN_LVTSENNMIN_RESETVAL (0x0000ffffU)
  377. #define CSL_SRC3_LVTSENMIN_LVTSENNMIN_MAX (0x0000ffffU)
  378. #define CSL_SRC3_LVTSENMIN_LVTSENPMIN_MASK (0xFFFF0000U)
  379. #define CSL_SRC3_LVTSENMIN_LVTSENPMIN_SHIFT (16U)
  380. #define CSL_SRC3_LVTSENMIN_LVTSENPMIN_RESETVAL (0x0000ffffU)
  381. #define CSL_SRC3_LVTSENMIN_LVTSENPMIN_MAX (0x0000ffffU)
  382. #define CSL_SRC3_LVTSENMIN_RESETVAL (0xffffffffU)
  383. /* LVTSENMAX */
  384. #define CSL_SRC3_LVTSENMAX_LVTSENNMAX_MASK (0x0000FFFFU)
  385. #define CSL_SRC3_LVTSENMAX_LVTSENNMAX_SHIFT (0U)
  386. #define CSL_SRC3_LVTSENMAX_LVTSENNMAX_RESETVAL (0x00000000U)
  387. #define CSL_SRC3_LVTSENMAX_LVTSENNMAX_MAX (0x0000ffffU)
  388. #define CSL_SRC3_LVTSENMAX_LVTSENPMAX_MASK (0xFFFF0000U)
  389. #define CSL_SRC3_LVTSENMAX_LVTSENPMAX_SHIFT (16U)
  390. #define CSL_SRC3_LVTSENMAX_LVTSENPMAX_RESETVAL (0x00000000U)
  391. #define CSL_SRC3_LVTSENMAX_LVTSENPMAX_MAX (0x0000ffffU)
  392. #define CSL_SRC3_LVTSENMAX_RESETVAL (0x00000000U)
  393. /* LVTSENAVG */
  394. #define CSL_SRC3_LVTSENAVG_LVTSENNAVG_MASK (0x0000FFFFU)
  395. #define CSL_SRC3_LVTSENAVG_LVTSENNAVG_SHIFT (0U)
  396. #define CSL_SRC3_LVTSENAVG_LVTSENNAVG_RESETVAL (0x00000000U)
  397. #define CSL_SRC3_LVTSENAVG_LVTSENNAVG_MAX (0x0000ffffU)
  398. #define CSL_SRC3_LVTSENAVG_LVTSENPAVG_MASK (0xFFFF0000U)
  399. #define CSL_SRC3_LVTSENAVG_LVTSENPAVG_SHIFT (16U)
  400. #define CSL_SRC3_LVTSENAVG_LVTSENPAVG_RESETVAL (0x00000000U)
  401. #define CSL_SRC3_LVTSENAVG_LVTSENPAVG_MAX (0x0000ffffU)
  402. #define CSL_SRC3_LVTSENAVG_RESETVAL (0x00000000U)
  403. /* LVTNVALUERECIPROCAL */
  404. #define CSL_SRC3_LVTNVALUERECIPROCAL_LVTSENNRN_MASK (0x000000FFU)
  405. #define CSL_SRC3_LVTNVALUERECIPROCAL_LVTSENNRN_SHIFT (0U)
  406. #define CSL_SRC3_LVTNVALUERECIPROCAL_LVTSENNRN_RESETVAL (0x00000000U)
  407. #define CSL_SRC3_LVTNVALUERECIPROCAL_LVTSENNRN_MAX (0x000000ffU)
  408. #define CSL_SRC3_LVTNVALUERECIPROCAL_LVTSENPRN_MASK (0x0000FF00U)
  409. #define CSL_SRC3_LVTNVALUERECIPROCAL_LVTSENPRN_SHIFT (8U)
  410. #define CSL_SRC3_LVTNVALUERECIPROCAL_LVTSENPRN_RESETVAL (0x00000000U)
  411. #define CSL_SRC3_LVTNVALUERECIPROCAL_LVTSENPRN_MAX (0x000000ffU)
  412. #define CSL_SRC3_LVTNVALUERECIPROCAL_LVTSENNGAIN_MASK (0x000F0000U)
  413. #define CSL_SRC3_LVTNVALUERECIPROCAL_LVTSENNGAIN_SHIFT (16U)
  414. #define CSL_SRC3_LVTNVALUERECIPROCAL_LVTSENNGAIN_RESETVAL (0x00000000U)
  415. #define CSL_SRC3_LVTNVALUERECIPROCAL_LVTSENNGAIN_MAX (0x0000000fU)
  416. #define CSL_SRC3_LVTNVALUERECIPROCAL_LVTSENPGAIN_MASK (0x00F00000U)
  417. #define CSL_SRC3_LVTNVALUERECIPROCAL_LVTSENPGAIN_SHIFT (20U)
  418. #define CSL_SRC3_LVTNVALUERECIPROCAL_LVTSENPGAIN_RESETVAL (0x00000000U)
  419. #define CSL_SRC3_LVTNVALUERECIPROCAL_LVTSENPGAIN_MAX (0x0000000fU)
  420. #define CSL_SRC3_LVTNVALUERECIPROCAL_RESETVAL (0x00000000U)
  421. #ifdef __cplusplus
  422. }
  423. #endif
  424. #endif