Test/linux-devkit/sysroots/armv7ahf-neon-linux-gnueabi/usr/include/ti/csl/cslr_scm.h

/********************************************************************
 * Copyright (C) 2013-2014 Texas Instruments Incorporated.
 * 
 *  Redistribution and use in source and binary forms, with or without 
 *  modification, are permitted provided that the following conditions 
 *  are met:
 *
 *    Redistributions of source code must retain the above copyright 
 *    notice, this list of conditions and the following disclaimer.
 *
 *    Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the 
 *    documentation and/or other materials provided with the   
 *    distribution.
 *
 *    Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
*/
#ifndef CSLR_SCM_H_
#define CSLR_SCM_H_

#ifdef __cplusplus
extern "C"
{
#endif
#include <ti/csl/cslr.h>
#include <ti/csl/tistdtypes.h>


/**************************************************************************
* Register Overlay Structure for __ALL__
**************************************************************************/
typedef struct {
    volatile Uint32 TZ_LOCKING;
    volatile Uint32 SSM_SECMEM_STATUS;
    volatile Uint8  RSVD0[4];
    volatile Uint32 PLATFORM_STATUS;
    volatile Uint32 SDP_PAGE_ACT;
    volatile Uint32 SDP_PAGE_RD;
    volatile Uint32 SDP_PAGE_WR;
    volatile Uint32 SDP_LRU_LIST_5;
    volatile Uint32 SDP_LRU_LIST_4;
    volatile Uint32 SDP_LRU_LIST_3;
    volatile Uint32 SDP_LRU_LIST_2;
    volatile Uint32 SDP_LRU_LIST_1;
    volatile Uint32 SDP_LRU_LIST_0;
} CSL_ScmRegs;


/**************************************************************************
* Register Macros
**************************************************************************/

/* Allows to set the CP15DISABLE FERRARI pin and thus lock the CP15 secure 
 * registers */
#define CSL_SCM_TZ_LOCKING                                      (0x0U)

/* Allows to control the DFW/SPMSIC dynamic hardware firewall for buffer 
 * overflow detection on SECURE KERNEL PRIVILEGE MODE stacks */
#define CSL_SCM_SSM_SECMEM_STATUS                               (0x4U)

/* Modena AXI Peripheral port converted by AXI2OCP into OCP protocol No burst 
 * supported No SWP or exclusive access supported No 64 Bits accesses 
 * supported */
#define CSL_SCM_PLATFORM_STATUS                                 (0xCU)

/* Activate the PAGE in internal RAM that will be taken into account by the 
 * SDP mechanism PAGE _0 is the first 4Kbyte of internal RAM PAGE_15 is the 
 * last 4Kbyte of internal RAM */
#define CSL_SCM_SDP_PAGE_ACT                                    (0x10U)

/* Teach the SSM SDP mechanism if page in internal ram are CODE or DATA PAGE 
 * _0 is the first 4Kbyte of internal RAM PAGE_15 is the last 4Kbyte of 
 * internal RAM */
#define CSL_SCM_SDP_PAGE_RD                                     (0x14U)

/* Status if pages have been hit by write accesses PAGE _0 is the first 4Kbyte 
 * of internal RAM PAGE_15 is the last 4Kbyte of internal RAM */
#define CSL_SCM_SDP_PAGE_WR                                     (0x18U)

/* Secure Demand Paging Page LRU list 5 */
#define CSL_SCM_SDP_LRU_LIST_5                                  (0x1CU)

/* Secure Demand Paging Page LRU list 4 */
#define CSL_SCM_SDP_LRU_LIST_4                                  (0x20U)

/* Secure Demand Paging Page LRU list 3 */
#define CSL_SCM_SDP_LRU_LIST_3                                  (0x24U)

/* Secure Demand Paging Page LRU list 2 */
#define CSL_SCM_SDP_LRU_LIST_2                                  (0x28U)

/* Secure Demand Paging Page LRU list 1 */
#define CSL_SCM_SDP_LRU_LIST_1                                  (0x2CU)

/* Secure Demand Paging Page LRU list 0 */
#define CSL_SCM_SDP_LRU_LIST_0                                  (0x30U)


/**************************************************************************
* Field Definition Macros
**************************************************************************/

/* TZ_LOCKING */

#define CSL_SCM_TZ_LOCKING_CP15DISABLE_CPU0_MASK                (0x00000001U)
#define CSL_SCM_TZ_LOCKING_CP15DISABLE_CPU0_SHIFT               (0U)
#define CSL_SCM_TZ_LOCKING_CP15DISABLE_CPU0_RESETVAL            (0x00000000U)
#define CSL_SCM_TZ_LOCKING_CP15DISABLE_CPU0_MAX                 (0x00000001U)

#define CSL_SCM_TZ_LOCKING_DISABLEERRORREPORTING_MASK           (0x00010000U)
#define CSL_SCM_TZ_LOCKING_DISABLEERRORREPORTING_SHIFT          (16U)
#define CSL_SCM_TZ_LOCKING_DISABLEERRORREPORTING_RESETVAL       (0x00000000U)
#define CSL_SCM_TZ_LOCKING_DISABLEERRORREPORTING_MAX            (0x00000001U)

#define CSL_SCM_TZ_LOCKING_CP15DISABLE_CPU1_MASK                (0x00000100U)
#define CSL_SCM_TZ_LOCKING_CP15DISABLE_CPU1_SHIFT               (8U)
#define CSL_SCM_TZ_LOCKING_CP15DISABLE_CPU1_RESETVAL            (0x00000000U)
#define CSL_SCM_TZ_LOCKING_CP15DISABLE_CPU1_MAX                 (0x00000001U)

#define CSL_SCM_TZ_LOCKING_RESETVAL                             (0x00000000U)

/* SSM_SECMEM_STATUS */

#define CSL_SCM_SSM_SECMEM_STATUS_MPUL1ISNOTACCESSIBLE_MASK     (0x00010000U)
#define CSL_SCM_SSM_SECMEM_STATUS_MPUL1ISNOTACCESSIBLE_SHIFT    (16U)
#define CSL_SCM_SSM_SECMEM_STATUS_MPUL1ISNOTACCESSIBLE_RESETVAL  (0x00000000U)
#define CSL_SCM_SSM_SECMEM_STATUS_MPUL1ISNOTACCESSIBLE_MAX      (0x00000001U)

#define CSL_SCM_SSM_SECMEM_STATUS_MPUL1ISDESTROYED_MASK         (0x00000001U)
#define CSL_SCM_SSM_SECMEM_STATUS_MPUL1ISDESTROYED_SHIFT        (0U)
#define CSL_SCM_SSM_SECMEM_STATUS_MPUL1ISDESTROYED_RESETVAL     (0x00000000U)
#define CSL_SCM_SSM_SECMEM_STATUS_MPUL1ISDESTROYED_MAX          (0x00000001U)

#define CSL_SCM_SSM_SECMEM_STATUS_MPUL2ISNOTACCESSIBLE_MASK     (0x00020000U)
#define CSL_SCM_SSM_SECMEM_STATUS_MPUL2ISNOTACCESSIBLE_SHIFT    (17U)
#define CSL_SCM_SSM_SECMEM_STATUS_MPUL2ISNOTACCESSIBLE_RESETVAL  (0x00000000U)
#define CSL_SCM_SSM_SECMEM_STATUS_MPUL2ISNOTACCESSIBLE_MAX      (0x00000001U)

#define CSL_SCM_SSM_SECMEM_STATUS_MPUL2ISDESTROYED_MASK         (0x00000002U)
#define CSL_SCM_SSM_SECMEM_STATUS_MPUL2ISDESTROYED_SHIFT        (1U)
#define CSL_SCM_SSM_SECMEM_STATUS_MPUL2ISDESTROYED_RESETVAL     (0x00000000U)
#define CSL_SCM_SSM_SECMEM_STATUS_MPUL2ISDESTROYED_MAX          (0x00000001U)

#define CSL_SCM_SSM_SECMEM_STATUS_FASTSECRAMISDESTROYED_MASK    (0x00000004U)
#define CSL_SCM_SSM_SECMEM_STATUS_FASTSECRAMISDESTROYED_SHIFT   (2U)
#define CSL_SCM_SSM_SECMEM_STATUS_FASTSECRAMISDESTROYED_RESETVAL  (0x00000000U)
#define CSL_SCM_SSM_SECMEM_STATUS_FASTSECRAMISDESTROYED_MAX     (0x00000001U)

#define CSL_SCM_SSM_SECMEM_STATUS_L3SECRAMISDESTROYED_MASK      (0x00000008U)
#define CSL_SCM_SSM_SECMEM_STATUS_L3SECRAMISDESTROYED_SHIFT     (3U)
#define CSL_SCM_SSM_SECMEM_STATUS_L3SECRAMISDESTROYED_RESETVAL  (0x00000000U)
#define CSL_SCM_SSM_SECMEM_STATUS_L3SECRAMISDESTROYED_MAX       (0x00000001U)

#define CSL_SCM_SSM_SECMEM_STATUS_FASTSECRAMISNOTACCESSIBLE_MASK  (0x00040000U)
#define CSL_SCM_SSM_SECMEM_STATUS_FASTSECRAMISNOTACCESSIBLE_SHIFT  (18U)
#define CSL_SCM_SSM_SECMEM_STATUS_FASTSECRAMISNOTACCESSIBLE_RESETVAL  (0x00000000U)
#define CSL_SCM_SSM_SECMEM_STATUS_FASTSECRAMISNOTACCESSIBLE_MAX  (0x00000001U)

#define CSL_SCM_SSM_SECMEM_STATUS_L3SECRAMISNOTACCESSIBLE_MASK  (0x00080000U)
#define CSL_SCM_SSM_SECMEM_STATUS_L3SECRAMISNOTACCESSIBLE_SHIFT  (19U)
#define CSL_SCM_SSM_SECMEM_STATUS_L3SECRAMISNOTACCESSIBLE_RESETVAL  (0x00000000U)
#define CSL_SCM_SSM_SECMEM_STATUS_L3SECRAMISNOTACCESSIBLE_MAX   (0x00000001U)

#define CSL_SCM_SSM_SECMEM_STATUS_RESETVAL                      (0x00000000U)

/* PLATFORM_STATUS */

#define CSL_SCM_PLATFORM_STATUS_SECURITY_VIOLATION_DEBUG_MASK   (0x00004000U)
#define CSL_SCM_PLATFORM_STATUS_SECURITY_VIOLATION_DEBUG_SHIFT  (14U)
#define CSL_SCM_PLATFORM_STATUS_SECURITY_VIOLATION_DEBUG_RESETVAL  (0x00000000U)
#define CSL_SCM_PLATFORM_STATUS_SECURITY_VIOLATION_DEBUG_MAX    (0x00000001U)

#define CSL_SCM_PLATFORM_STATUS_SECURITY_VIOLATION_GP_SPD_MASK  (0x00001000U)
#define CSL_SCM_PLATFORM_STATUS_SECURITY_VIOLATION_GP_SPD_SHIFT  (12U)
#define CSL_SCM_PLATFORM_STATUS_SECURITY_VIOLATION_GP_SPD_RESETVAL  (0x00000000U)
#define CSL_SCM_PLATFORM_STATUS_SECURITY_VIOLATION_GP_SPD_MAX   (0x00000001U)

#define CSL_SCM_PLATFORM_STATUS_POWER_RESET_EVENTS_MASK         (0x00000008U)
#define CSL_SCM_PLATFORM_STATUS_POWER_RESET_EVENTS_SHIFT        (3U)
#define CSL_SCM_PLATFORM_STATUS_POWER_RESET_EVENTS_RESETVAL     (0x00000000U)
#define CSL_SCM_PLATFORM_STATUS_POWER_RESET_EVENTS_MAX          (0x00000001U)

#define CSL_SCM_PLATFORM_STATUS_PLATFORM_VIOLATIONS_MASK        (0x00000004U)
#define CSL_SCM_PLATFORM_STATUS_PLATFORM_VIOLATIONS_SHIFT       (2U)
#define CSL_SCM_PLATFORM_STATUS_PLATFORM_VIOLATIONS_RESETVAL    (0x00000000U)
#define CSL_SCM_PLATFORM_STATUS_PLATFORM_VIOLATIONS_MAX         (0x00000001U)

#define CSL_SCM_PLATFORM_STATUS_STRICT_PUBLIC_DEBUG_MASK        (0x00000002U)
#define CSL_SCM_PLATFORM_STATUS_STRICT_PUBLIC_DEBUG_SHIFT       (1U)
#define CSL_SCM_PLATFORM_STATUS_STRICT_PUBLIC_DEBUG_RESETVAL    (0x00000000U)
#define CSL_SCM_PLATFORM_STATUS_STRICT_PUBLIC_DEBUG_MAX         (0x00000001U)

#define CSL_SCM_PLATFORM_STATUS_GP_DEVICE_MASK                  (0x00000001U)
#define CSL_SCM_PLATFORM_STATUS_GP_DEVICE_SHIFT                 (0U)
#define CSL_SCM_PLATFORM_STATUS_GP_DEVICE_RESETVAL              (0x00000000U)
#define CSL_SCM_PLATFORM_STATUS_GP_DEVICE_MAX                   (0x00000001U)

#define CSL_SCM_PLATFORM_STATUS_SECURITY_VIOLATION_MPU_IFW_MASK  (0x00100000U)
#define CSL_SCM_PLATFORM_STATUS_SECURITY_VIOLATION_MPU_IFW_SHIFT  (20U)
#define CSL_SCM_PLATFORM_STATUS_SECURITY_VIOLATION_MPU_IFW_RESETVAL  (0x00000000U)
#define CSL_SCM_PLATFORM_STATUS_SECURITY_VIOLATION_MPU_IFW_MAX  (0x00000001U)

#define CSL_SCM_PLATFORM_STATUS_SECURITY_VIOLATION_MPU_RFW_MASK  (0x00200000U)
#define CSL_SCM_PLATFORM_STATUS_SECURITY_VIOLATION_MPU_RFW_SHIFT  (21U)
#define CSL_SCM_PLATFORM_STATUS_SECURITY_VIOLATION_MPU_RFW_RESETVAL  (0x00000000U)
#define CSL_SCM_PLATFORM_STATUS_SECURITY_VIOLATION_MPU_RFW_MAX  (0x00000001U)

#define CSL_SCM_PLATFORM_STATUS_SECURITY_VIOLATION_MPU_WFW_MASK  (0x00400000U)
#define CSL_SCM_PLATFORM_STATUS_SECURITY_VIOLATION_MPU_WFW_SHIFT  (22U)
#define CSL_SCM_PLATFORM_STATUS_SECURITY_VIOLATION_MPU_WFW_RESETVAL  (0x00000000U)
#define CSL_SCM_PLATFORM_STATUS_SECURITY_VIOLATION_MPU_WFW_MAX  (0x00000001U)

#define CSL_SCM_PLATFORM_STATUS_WHILECOREOFFORRET_MPUWAKEUPREQUEST_MASK  (0x20000000U)
#define CSL_SCM_PLATFORM_STATUS_WHILECOREOFFORRET_MPUWAKEUPREQUEST_SHIFT  (29U)
#define CSL_SCM_PLATFORM_STATUS_WHILECOREOFFORRET_MPUWAKEUPREQUEST_RESETVAL  (0x00000000U)
#define CSL_SCM_PLATFORM_STATUS_WHILECOREOFFORRET_MPUWAKEUPREQUEST_MAX  (0x00000001U)

#define CSL_SCM_PLATFORM_STATUS_SSMCONFIG_MASK                  (0xC0000000U)
#define CSL_SCM_PLATFORM_STATUS_SSMCONFIG_SHIFT                 (30U)
#define CSL_SCM_PLATFORM_STATUS_SSMCONFIG_RESETVAL              (0x00000000U)
#define CSL_SCM_PLATFORM_STATUS_SSMCONFIG_MAX                   (0x00000003U)

#define CSL_SCM_PLATFORM_STATUS_RESETVAL                        (0x00000000U)

/* SDP_PAGE_ACT */

#define CSL_SCM_SDP_PAGE_ACT_PAGE_15_ACTIVATION_MASK            (0x00008000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_15_ACTIVATION_SHIFT           (15U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_15_ACTIVATION_RESETVAL        (0x00000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_15_ACTIVATION_MAX             (0x00000001U)

#define CSL_SCM_SDP_PAGE_ACT_PAGE_14_ACTIVATION_MASK            (0x00004000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_14_ACTIVATION_SHIFT           (14U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_14_ACTIVATION_RESETVAL        (0x00000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_14_ACTIVATION_MAX             (0x00000001U)

#define CSL_SCM_SDP_PAGE_ACT_PAGE_13_ACTIVATION_MASK            (0x00002000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_13_ACTIVATION_SHIFT           (13U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_13_ACTIVATION_RESETVAL        (0x00000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_13_ACTIVATION_MAX             (0x00000001U)

#define CSL_SCM_SDP_PAGE_ACT_PAGE_12_ACTIVATION_MASK            (0x00001000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_12_ACTIVATION_SHIFT           (12U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_12_ACTIVATION_RESETVAL        (0x00000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_12_ACTIVATION_MAX             (0x00000001U)

#define CSL_SCM_SDP_PAGE_ACT_PAGE_11_ACTIVATION_MASK            (0x00000800U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_11_ACTIVATION_SHIFT           (11U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_11_ACTIVATION_RESETVAL        (0x00000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_11_ACTIVATION_MAX             (0x00000001U)

#define CSL_SCM_SDP_PAGE_ACT_PAGE_10_ACTIVATION_MASK            (0x00000400U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_10_ACTIVATION_SHIFT           (10U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_10_ACTIVATION_RESETVAL        (0x00000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_10_ACTIVATION_MAX             (0x00000001U)

#define CSL_SCM_SDP_PAGE_ACT_PAGE_9_ACTIVATION_MASK             (0x00000200U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_9_ACTIVATION_SHIFT            (9U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_9_ACTIVATION_RESETVAL         (0x00000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_9_ACTIVATION_MAX              (0x00000001U)

#define CSL_SCM_SDP_PAGE_ACT_PAGE_8_ACTIVATION_MASK             (0x00000100U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_8_ACTIVATION_SHIFT            (8U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_8_ACTIVATION_RESETVAL         (0x00000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_8_ACTIVATION_MAX              (0x00000001U)

#define CSL_SCM_SDP_PAGE_ACT_PAGE_7_ACTIVATION_MASK             (0x00000080U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_7_ACTIVATION_SHIFT            (7U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_7_ACTIVATION_RESETVAL         (0x00000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_7_ACTIVATION_MAX              (0x00000001U)

#define CSL_SCM_SDP_PAGE_ACT_PAGE_6_ACTIVATION_MASK             (0x00000040U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_6_ACTIVATION_SHIFT            (6U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_6_ACTIVATION_RESETVAL         (0x00000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_6_ACTIVATION_MAX              (0x00000001U)

#define CSL_SCM_SDP_PAGE_ACT_PAGE_5_ACTIVATION_MASK             (0x00000020U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_5_ACTIVATION_SHIFT            (5U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_5_ACTIVATION_RESETVAL         (0x00000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_5_ACTIVATION_MAX              (0x00000001U)

#define CSL_SCM_SDP_PAGE_ACT_PAGE_4_ACTIVATION_MASK             (0x00000010U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_4_ACTIVATION_SHIFT            (4U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_4_ACTIVATION_RESETVAL         (0x00000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_4_ACTIVATION_MAX              (0x00000001U)

#define CSL_SCM_SDP_PAGE_ACT_PAGE_3_ACTIVATION_MASK             (0x00000008U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_3_ACTIVATION_SHIFT            (3U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_3_ACTIVATION_RESETVAL         (0x00000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_3_ACTIVATION_MAX              (0x00000001U)

#define CSL_SCM_SDP_PAGE_ACT_PAGE_2_ACTIVATION_MASK             (0x00000004U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_2_ACTIVATION_SHIFT            (2U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_2_ACTIVATION_RESETVAL         (0x00000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_2_ACTIVATION_MAX              (0x00000001U)

#define CSL_SCM_SDP_PAGE_ACT_PAGE_1_ACTIVATION_MASK             (0x00000002U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_1_ACTIVATION_SHIFT            (1U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_1_ACTIVATION_RESETVAL         (0x00000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_1_ACTIVATION_MAX              (0x00000001U)

#define CSL_SCM_SDP_PAGE_ACT_PAGE_0_ACTIVATION_MASK             (0x00000001U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_0_ACTIVATION_SHIFT            (0U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_0_ACTIVATION_RESETVAL         (0x00000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_0_ACTIVATION_MAX              (0x00000001U)

#define CSL_SCM_SDP_PAGE_ACT_PAGE_16_ACTIVATION_MASK            (0x00010000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_16_ACTIVATION_SHIFT           (16U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_16_ACTIVATION_RESETVAL        (0x00000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_16_ACTIVATION_MAX             (0x00000001U)

#define CSL_SCM_SDP_PAGE_ACT_PAGE_17_ACTIVATION_MASK            (0x00020000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_17_ACTIVATION_SHIFT           (17U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_17_ACTIVATION_RESETVAL        (0x00000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_17_ACTIVATION_MAX             (0x00000001U)

#define CSL_SCM_SDP_PAGE_ACT_PAGE_18_ACTIVATION_MASK            (0x00040000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_18_ACTIVATION_SHIFT           (18U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_18_ACTIVATION_RESETVAL        (0x00000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_18_ACTIVATION_MAX             (0x00000001U)

#define CSL_SCM_SDP_PAGE_ACT_PAGE_19_ACTIVATION_MASK            (0x00080000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_19_ACTIVATION_SHIFT           (19U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_19_ACTIVATION_RESETVAL        (0x00000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_19_ACTIVATION_MAX             (0x00000001U)

#define CSL_SCM_SDP_PAGE_ACT_PAGE_20_ACTIVATION_MASK            (0x00100000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_20_ACTIVATION_SHIFT           (20U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_20_ACTIVATION_RESETVAL        (0x00000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_20_ACTIVATION_MAX             (0x00000001U)

#define CSL_SCM_SDP_PAGE_ACT_PAGE_21_ACTIVATION_MASK            (0x00200000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_21_ACTIVATION_SHIFT           (21U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_21_ACTIVATION_RESETVAL        (0x00000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_21_ACTIVATION_MAX             (0x00000001U)

#define CSL_SCM_SDP_PAGE_ACT_PAGE_22_ACTIVATION_MASK            (0x00400000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_22_ACTIVATION_SHIFT           (22U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_22_ACTIVATION_RESETVAL        (0x00000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_22_ACTIVATION_MAX             (0x00000001U)

#define CSL_SCM_SDP_PAGE_ACT_PAGE_23_ACTIVATION_MASK            (0x00800000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_23_ACTIVATION_SHIFT           (23U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_23_ACTIVATION_RESETVAL        (0x00000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_23_ACTIVATION_MAX             (0x00000001U)

#define CSL_SCM_SDP_PAGE_ACT_PAGE_24_ACTIVATION_MASK            (0x01000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_24_ACTIVATION_SHIFT           (24U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_24_ACTIVATION_RESETVAL        (0x00000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_24_ACTIVATION_MAX             (0x00000001U)

#define CSL_SCM_SDP_PAGE_ACT_PAGE_25_ACTIVATION_MASK            (0x02000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_25_ACTIVATION_SHIFT           (25U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_25_ACTIVATION_RESETVAL        (0x00000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_25_ACTIVATION_MAX             (0x00000001U)

#define CSL_SCM_SDP_PAGE_ACT_PAGE_26_ACTIVATION_MASK            (0x04000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_26_ACTIVATION_SHIFT           (26U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_26_ACTIVATION_RESETVAL        (0x00000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_26_ACTIVATION_MAX             (0x00000001U)

#define CSL_SCM_SDP_PAGE_ACT_PAGE_27_ACTIVATION_MASK            (0x08000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_27_ACTIVATION_SHIFT           (27U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_27_ACTIVATION_RESETVAL        (0x00000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_27_ACTIVATION_MAX             (0x00000001U)

#define CSL_SCM_SDP_PAGE_ACT_PAGE_28_ACTIVATION_MASK            (0x10000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_28_ACTIVATION_SHIFT           (28U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_28_ACTIVATION_RESETVAL        (0x00000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_28_ACTIVATION_MAX             (0x00000001U)

#define CSL_SCM_SDP_PAGE_ACT_PAGE_29_ACTIVATION_MASK            (0x20000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_29_ACTIVATION_SHIFT           (29U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_29_ACTIVATION_RESETVAL        (0x00000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_29_ACTIVATION_MAX             (0x00000001U)

#define CSL_SCM_SDP_PAGE_ACT_PAGE_30_ACTIVATION_MASK            (0x40000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_30_ACTIVATION_SHIFT           (30U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_30_ACTIVATION_RESETVAL        (0x00000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_30_ACTIVATION_MAX             (0x00000001U)

#define CSL_SCM_SDP_PAGE_ACT_PAGE_31_ACTIVATION_MASK            (0x80000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_31_ACTIVATION_SHIFT           (31U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_31_ACTIVATION_RESETVAL        (0x00000000U)
#define CSL_SCM_SDP_PAGE_ACT_PAGE_31_ACTIVATION_MAX             (0x00000001U)

#define CSL_SCM_SDP_PAGE_ACT_RESETVAL                           (0x00000000U)

/* SDP_PAGE_RD */

#define CSL_SCM_SDP_PAGE_RD_PAGE_15_RD_MASK                     (0x00008000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_15_RD_SHIFT                    (15U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_15_RD_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_15_RD_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_RD_PAGE_14_RD_MASK                     (0x00004000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_14_RD_SHIFT                    (14U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_14_RD_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_14_RD_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_RD_PAGE_13_RD_MASK                     (0x00002000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_13_RD_SHIFT                    (13U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_13_RD_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_13_RD_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_RD_PAGE_12_RD_MASK                     (0x00001000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_12_RD_SHIFT                    (12U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_12_RD_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_12_RD_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_RD_PAGE_11_RD_MASK                     (0x00000800U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_11_RD_SHIFT                    (11U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_11_RD_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_11_RD_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_RD_PAGE_10_RD_MASK                     (0x00000400U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_10_RD_SHIFT                    (10U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_10_RD_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_10_RD_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_RD_PAGE_9_RD_MASK                      (0x00000200U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_9_RD_SHIFT                     (9U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_9_RD_RESETVAL                  (0x00000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_9_RD_MAX                       (0x00000001U)

#define CSL_SCM_SDP_PAGE_RD_PAGE_8_RD_MASK                      (0x00000100U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_8_RD_SHIFT                     (8U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_8_RD_RESETVAL                  (0x00000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_8_RD_MAX                       (0x00000001U)

#define CSL_SCM_SDP_PAGE_RD_PAGE_7_RD_MASK                      (0x00000080U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_7_RD_SHIFT                     (7U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_7_RD_RESETVAL                  (0x00000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_7_RD_MAX                       (0x00000001U)

#define CSL_SCM_SDP_PAGE_RD_PAGE_6_RD_MASK                      (0x00000040U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_6_RD_SHIFT                     (6U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_6_RD_RESETVAL                  (0x00000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_6_RD_MAX                       (0x00000001U)

#define CSL_SCM_SDP_PAGE_RD_PAGE_5_RD_MASK                      (0x00000020U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_5_RD_SHIFT                     (5U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_5_RD_RESETVAL                  (0x00000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_5_RD_MAX                       (0x00000001U)

#define CSL_SCM_SDP_PAGE_RD_PAGE_4_RD_MASK                      (0x00000010U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_4_RD_SHIFT                     (4U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_4_RD_RESETVAL                  (0x00000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_4_RD_MAX                       (0x00000001U)

#define CSL_SCM_SDP_PAGE_RD_PAGE_3_RD_MASK                      (0x00000008U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_3_RD_SHIFT                     (3U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_3_RD_RESETVAL                  (0x00000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_3_RD_MAX                       (0x00000001U)

#define CSL_SCM_SDP_PAGE_RD_PAGE_2_RD_MASK                      (0x00000004U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_2_RD_SHIFT                     (2U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_2_RD_RESETVAL                  (0x00000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_2_RD_MAX                       (0x00000001U)

#define CSL_SCM_SDP_PAGE_RD_PAGE_1_RD_MASK                      (0x00000002U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_1_RD_SHIFT                     (1U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_1_RD_RESETVAL                  (0x00000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_1_RD_MAX                       (0x00000001U)

#define CSL_SCM_SDP_PAGE_RD_PAGE_0_RD_MASK                      (0x00000001U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_0_RD_SHIFT                     (0U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_0_RD_RESETVAL                  (0x00000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_0_RD_MAX                       (0x00000001U)

#define CSL_SCM_SDP_PAGE_RD_PAGE_16_RD_MASK                     (0x00010000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_16_RD_SHIFT                    (16U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_16_RD_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_16_RD_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_RD_PAGE_17_RD_MASK                     (0x00020000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_17_RD_SHIFT                    (17U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_17_RD_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_17_RD_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_RD_PAGE_18_RD_MASK                     (0x00040000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_18_RD_SHIFT                    (18U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_18_RD_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_18_RD_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_RD_PAGE_19_RD_MASK                     (0x00080000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_19_RD_SHIFT                    (19U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_19_RD_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_19_RD_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_RD_PAGE_20_RD_MASK                     (0x00100000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_20_RD_SHIFT                    (20U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_20_RD_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_20_RD_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_RD_PAGE_21_RD_MASK                     (0x00200000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_21_RD_SHIFT                    (21U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_21_RD_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_21_RD_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_RD_PAGE_22_RD_MASK                     (0x00400000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_22_RD_SHIFT                    (22U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_22_RD_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_22_RD_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_RD_PAGE_23_RD_MASK                     (0x00800000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_23_RD_SHIFT                    (23U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_23_RD_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_23_RD_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_RD_PAGE_24_RD_MASK                     (0x01000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_24_RD_SHIFT                    (24U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_24_RD_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_24_RD_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_RD_PAGE_25_RD_MASK                     (0x02000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_25_RD_SHIFT                    (25U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_25_RD_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_25_RD_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_RD_PAGE_26_RD_MASK                     (0x04000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_26_RD_SHIFT                    (26U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_26_RD_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_26_RD_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_RD_PAGE_27_RD_MASK                     (0x08000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_27_RD_SHIFT                    (27U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_27_RD_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_27_RD_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_RD_PAGE_28_RD_MASK                     (0x10000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_28_RD_SHIFT                    (28U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_28_RD_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_28_RD_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_RD_PAGE_29_RD_MASK                     (0x20000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_29_RD_SHIFT                    (29U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_29_RD_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_29_RD_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_RD_PAGE_30_RD_MASK                     (0x40000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_30_RD_SHIFT                    (30U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_30_RD_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_30_RD_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_RD_PAGE_31_RD_MASK                     (0x80000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_31_RD_SHIFT                    (31U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_31_RD_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_RD_PAGE_31_RD_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_RD_RESETVAL                            (0x00000000U)

/* SDP_PAGE_WR */

#define CSL_SCM_SDP_PAGE_WR_PAGE_15_WR_MASK                     (0x00008000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_15_WR_SHIFT                    (15U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_15_WR_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_15_WR_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_WR_PAGE_14_WR_MASK                     (0x00004000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_14_WR_SHIFT                    (14U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_14_WR_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_14_WR_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_WR_PAGE_13_WR_MASK                     (0x00002000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_13_WR_SHIFT                    (13U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_13_WR_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_13_WR_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_WR_PAGE_12_WR_MASK                     (0x00001000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_12_WR_SHIFT                    (12U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_12_WR_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_12_WR_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_WR_PAGE_11_WR_MASK                     (0x00000800U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_11_WR_SHIFT                    (11U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_11_WR_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_11_WR_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_WR_PAGE_10_WR_MASK                     (0x00000400U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_10_WR_SHIFT                    (10U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_10_WR_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_10_WR_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_WR_PAGE_9_WR_MASK                      (0x00000200U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_9_WR_SHIFT                     (9U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_9_WR_RESETVAL                  (0x00000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_9_WR_MAX                       (0x00000001U)

#define CSL_SCM_SDP_PAGE_WR_PAGE_8_WR_MASK                      (0x00000100U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_8_WR_SHIFT                     (8U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_8_WR_RESETVAL                  (0x00000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_8_WR_MAX                       (0x00000001U)

#define CSL_SCM_SDP_PAGE_WR_PAGE_7_WR_MASK                      (0x00000080U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_7_WR_SHIFT                     (7U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_7_WR_RESETVAL                  (0x00000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_7_WR_MAX                       (0x00000001U)

#define CSL_SCM_SDP_PAGE_WR_PAGE_6_WR_MASK                      (0x00000040U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_6_WR_SHIFT                     (6U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_6_WR_RESETVAL                  (0x00000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_6_WR_MAX                       (0x00000001U)

#define CSL_SCM_SDP_PAGE_WR_PAGE_5_WR_MASK                      (0x00000020U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_5_WR_SHIFT                     (5U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_5_WR_RESETVAL                  (0x00000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_5_WR_MAX                       (0x00000001U)

#define CSL_SCM_SDP_PAGE_WR_PAGE_4_WR_MASK                      (0x00000010U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_4_WR_SHIFT                     (4U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_4_WR_RESETVAL                  (0x00000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_4_WR_MAX                       (0x00000001U)

#define CSL_SCM_SDP_PAGE_WR_PAGE_3_WR_MASK                      (0x00000008U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_3_WR_SHIFT                     (3U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_3_WR_RESETVAL                  (0x00000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_3_WR_MAX                       (0x00000001U)

#define CSL_SCM_SDP_PAGE_WR_PAGE_2_WR_MASK                      (0x00000004U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_2_WR_SHIFT                     (2U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_2_WR_RESETVAL                  (0x00000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_2_WR_MAX                       (0x00000001U)

#define CSL_SCM_SDP_PAGE_WR_PAGE_1_WR_MASK                      (0x00000002U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_1_WR_SHIFT                     (1U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_1_WR_RESETVAL                  (0x00000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_1_WR_MAX                       (0x00000001U)

#define CSL_SCM_SDP_PAGE_WR_PAGE_0_WR_MASK                      (0x00000001U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_0_WR_SHIFT                     (0U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_0_WR_RESETVAL                  (0x00000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_0_WR_MAX                       (0x00000001U)

#define CSL_SCM_SDP_PAGE_WR_PAGE_16_WR_MASK                     (0x00010000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_16_WR_SHIFT                    (16U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_16_WR_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_16_WR_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_WR_PAGE_17_WR_MASK                     (0x00020000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_17_WR_SHIFT                    (17U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_17_WR_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_17_WR_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_WR_PAGE_18_WR_MASK                     (0x00040000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_18_WR_SHIFT                    (18U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_18_WR_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_18_WR_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_WR_PAGE_19_WR_MASK                     (0x00080000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_19_WR_SHIFT                    (19U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_19_WR_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_19_WR_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_WR_PAGE_20_WR_MASK                     (0x00100000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_20_WR_SHIFT                    (20U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_20_WR_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_20_WR_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_WR_PAGE_21_WR_MASK                     (0x00200000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_21_WR_SHIFT                    (21U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_21_WR_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_21_WR_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_WR_PAGE_22_WR_MASK                     (0x00400000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_22_WR_SHIFT                    (22U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_22_WR_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_22_WR_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_WR_PAGE_23_WR_MASK                     (0x00800000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_23_WR_SHIFT                    (23U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_23_WR_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_23_WR_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_WR_PAGE_24_WR_MASK                     (0x01000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_24_WR_SHIFT                    (24U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_24_WR_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_24_WR_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_WR_PAGE_25_WR_MASK                     (0x02000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_25_WR_SHIFT                    (25U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_25_WR_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_25_WR_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_WR_PAGE_26_WR_MASK                     (0x04000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_26_WR_SHIFT                    (26U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_26_WR_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_26_WR_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_WR_PAGE_27_WR_MASK                     (0x08000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_27_WR_SHIFT                    (27U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_27_WR_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_27_WR_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_WR_PAGE_28_WR_MASK                     (0x10000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_28_WR_SHIFT                    (28U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_28_WR_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_28_WR_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_WR_PAGE_29_WR_MASK                     (0x20000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_29_WR_SHIFT                    (29U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_29_WR_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_29_WR_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_WR_PAGE_30_WR_MASK                     (0x40000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_30_WR_SHIFT                    (30U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_30_WR_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_30_WR_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_WR_PAGE_31_WR_MASK                     (0x80000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_31_WR_SHIFT                    (31U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_31_WR_RESETVAL                 (0x00000000U)
#define CSL_SCM_SDP_PAGE_WR_PAGE_31_WR_MAX                      (0x00000001U)

#define CSL_SCM_SDP_PAGE_WR_RESETVAL                            (0x00000000U)

/* SDP_LRU_LIST_5 */

#define CSL_SCM_SDP_LRU_LIST_5_LRU_RANK_1_MASK                  (0x0000001FU)
#define CSL_SCM_SDP_LRU_LIST_5_LRU_RANK_1_SHIFT                 (0U)
#define CSL_SCM_SDP_LRU_LIST_5_LRU_RANK_1_RESETVAL              (0x0000001eU)
#define CSL_SCM_SDP_LRU_LIST_5_LRU_RANK_1_MAX                   (0x0000001fU)

#define CSL_SCM_SDP_LRU_LIST_5_LRU_RANK_0_MASK                  (0x000003E0U)
#define CSL_SCM_SDP_LRU_LIST_5_LRU_RANK_0_SHIFT                 (5U)
#define CSL_SCM_SDP_LRU_LIST_5_LRU_RANK_0_RESETVAL              (0x0000001fU)
#define CSL_SCM_SDP_LRU_LIST_5_LRU_RANK_0_MAX                   (0x0000001fU)

#define CSL_SCM_SDP_LRU_LIST_5_RESETVAL                         (0x000003feU)

/* SDP_LRU_LIST_4 */

#define CSL_SCM_SDP_LRU_LIST_4_LRU_RANK_7_MASK                  (0x0000001FU)
#define CSL_SCM_SDP_LRU_LIST_4_LRU_RANK_7_SHIFT                 (0U)
#define CSL_SCM_SDP_LRU_LIST_4_LRU_RANK_7_RESETVAL              (0x00000018U)
#define CSL_SCM_SDP_LRU_LIST_4_LRU_RANK_7_MAX                   (0x0000001fU)

#define CSL_SCM_SDP_LRU_LIST_4_LRU_RANK_6_MASK                  (0x000003E0U)
#define CSL_SCM_SDP_LRU_LIST_4_LRU_RANK_6_SHIFT                 (5U)
#define CSL_SCM_SDP_LRU_LIST_4_LRU_RANK_6_RESETVAL              (0x00000019U)
#define CSL_SCM_SDP_LRU_LIST_4_LRU_RANK_6_MAX                   (0x0000001fU)

#define CSL_SCM_SDP_LRU_LIST_4_LRU_RANK_5_MASK                  (0x00007C00U)
#define CSL_SCM_SDP_LRU_LIST_4_LRU_RANK_5_SHIFT                 (10U)
#define CSL_SCM_SDP_LRU_LIST_4_LRU_RANK_5_RESETVAL              (0x0000001aU)
#define CSL_SCM_SDP_LRU_LIST_4_LRU_RANK_5_MAX                   (0x0000001fU)

#define CSL_SCM_SDP_LRU_LIST_4_LRU_RANK_4_MASK                  (0x000F8000U)
#define CSL_SCM_SDP_LRU_LIST_4_LRU_RANK_4_SHIFT                 (15U)
#define CSL_SCM_SDP_LRU_LIST_4_LRU_RANK_4_RESETVAL              (0x0000001bU)
#define CSL_SCM_SDP_LRU_LIST_4_LRU_RANK_4_MAX                   (0x0000001fU)

#define CSL_SCM_SDP_LRU_LIST_4_LRU_RANK_3_MASK                  (0x01F00000U)
#define CSL_SCM_SDP_LRU_LIST_4_LRU_RANK_3_SHIFT                 (20U)
#define CSL_SCM_SDP_LRU_LIST_4_LRU_RANK_3_RESETVAL              (0x0000001cU)
#define CSL_SCM_SDP_LRU_LIST_4_LRU_RANK_3_MAX                   (0x0000001fU)

#define CSL_SCM_SDP_LRU_LIST_4_LRU_RANK_2_MASK                  (0x3E000000U)
#define CSL_SCM_SDP_LRU_LIST_4_LRU_RANK_2_SHIFT                 (25U)
#define CSL_SCM_SDP_LRU_LIST_4_LRU_RANK_2_RESETVAL              (0x0000001dU)
#define CSL_SCM_SDP_LRU_LIST_4_LRU_RANK_2_MAX                   (0x0000001fU)

#define CSL_SCM_SDP_LRU_LIST_4_RESETVAL                         (0x3bcdeb38U)

/* SDP_LRU_LIST_3 */

#define CSL_SCM_SDP_LRU_LIST_3_LRU_RANK_13_MASK                 (0x0000001FU)
#define CSL_SCM_SDP_LRU_LIST_3_LRU_RANK_13_SHIFT                (0U)
#define CSL_SCM_SDP_LRU_LIST_3_LRU_RANK_13_RESETVAL             (0x00000012U)
#define CSL_SCM_SDP_LRU_LIST_3_LRU_RANK_13_MAX                  (0x0000001fU)

#define CSL_SCM_SDP_LRU_LIST_3_LRU_RANK_12_MASK                 (0x000003E0U)
#define CSL_SCM_SDP_LRU_LIST_3_LRU_RANK_12_SHIFT                (5U)
#define CSL_SCM_SDP_LRU_LIST_3_LRU_RANK_12_RESETVAL             (0x00000013U)
#define CSL_SCM_SDP_LRU_LIST_3_LRU_RANK_12_MAX                  (0x0000001fU)

#define CSL_SCM_SDP_LRU_LIST_3_LRU_RANK_11_MASK                 (0x00007C00U)
#define CSL_SCM_SDP_LRU_LIST_3_LRU_RANK_11_SHIFT                (10U)
#define CSL_SCM_SDP_LRU_LIST_3_LRU_RANK_11_RESETVAL             (0x00000014U)
#define CSL_SCM_SDP_LRU_LIST_3_LRU_RANK_11_MAX                  (0x0000001fU)

#define CSL_SCM_SDP_LRU_LIST_3_LRU_RANK_10_MASK                 (0x000F8000U)
#define CSL_SCM_SDP_LRU_LIST_3_LRU_RANK_10_SHIFT                (15U)
#define CSL_SCM_SDP_LRU_LIST_3_LRU_RANK_10_RESETVAL             (0x00000015U)
#define CSL_SCM_SDP_LRU_LIST_3_LRU_RANK_10_MAX                  (0x0000001fU)

#define CSL_SCM_SDP_LRU_LIST_3_LRU_RANK_9_MASK                  (0x01F00000U)
#define CSL_SCM_SDP_LRU_LIST_3_LRU_RANK_9_SHIFT                 (20U)
#define CSL_SCM_SDP_LRU_LIST_3_LRU_RANK_9_RESETVAL              (0x00000016U)
#define CSL_SCM_SDP_LRU_LIST_3_LRU_RANK_9_MAX                   (0x0000001fU)

#define CSL_SCM_SDP_LRU_LIST_3_LRU_RANK_8_MASK                  (0x3E000000U)
#define CSL_SCM_SDP_LRU_LIST_3_LRU_RANK_8_SHIFT                 (25U)
#define CSL_SCM_SDP_LRU_LIST_3_LRU_RANK_8_RESETVAL              (0x00000017U)
#define CSL_SCM_SDP_LRU_LIST_3_LRU_RANK_8_MAX                   (0x0000001fU)

#define CSL_SCM_SDP_LRU_LIST_3_RESETVAL                         (0x2f6ad272U)

/* SDP_LRU_LIST_2 */

#define CSL_SCM_SDP_LRU_LIST_2_LRU_RANK_19_MASK                 (0x0000001FU)
#define CSL_SCM_SDP_LRU_LIST_2_LRU_RANK_19_SHIFT                (0U)
#define CSL_SCM_SDP_LRU_LIST_2_LRU_RANK_19_RESETVAL             (0x0000000cU)
#define CSL_SCM_SDP_LRU_LIST_2_LRU_RANK_19_MAX                  (0x0000001fU)

#define CSL_SCM_SDP_LRU_LIST_2_LRU_RANK_18_MASK                 (0x000003E0U)
#define CSL_SCM_SDP_LRU_LIST_2_LRU_RANK_18_SHIFT                (5U)
#define CSL_SCM_SDP_LRU_LIST_2_LRU_RANK_18_RESETVAL             (0x0000000dU)
#define CSL_SCM_SDP_LRU_LIST_2_LRU_RANK_18_MAX                  (0x0000001fU)

#define CSL_SCM_SDP_LRU_LIST_2_LRU_RANK_17_MASK                 (0x00007C00U)
#define CSL_SCM_SDP_LRU_LIST_2_LRU_RANK_17_SHIFT                (10U)
#define CSL_SCM_SDP_LRU_LIST_2_LRU_RANK_17_RESETVAL             (0x0000000eU)
#define CSL_SCM_SDP_LRU_LIST_2_LRU_RANK_17_MAX                  (0x0000001fU)

#define CSL_SCM_SDP_LRU_LIST_2_LRU_RANK_16_MASK                 (0x000F8000U)
#define CSL_SCM_SDP_LRU_LIST_2_LRU_RANK_16_SHIFT                (15U)
#define CSL_SCM_SDP_LRU_LIST_2_LRU_RANK_16_RESETVAL             (0x0000000fU)
#define CSL_SCM_SDP_LRU_LIST_2_LRU_RANK_16_MAX                  (0x0000001fU)

#define CSL_SCM_SDP_LRU_LIST_2_LRU_RANK_15_MASK                 (0x01F00000U)
#define CSL_SCM_SDP_LRU_LIST_2_LRU_RANK_15_SHIFT                (20U)
#define CSL_SCM_SDP_LRU_LIST_2_LRU_RANK_15_RESETVAL             (0x00000010U)
#define CSL_SCM_SDP_LRU_LIST_2_LRU_RANK_15_MAX                  (0x0000001fU)

#define CSL_SCM_SDP_LRU_LIST_2_LRU_RANK_14_MASK                 (0x3E000000U)
#define CSL_SCM_SDP_LRU_LIST_2_LRU_RANK_14_SHIFT                (25U)
#define CSL_SCM_SDP_LRU_LIST_2_LRU_RANK_14_RESETVAL             (0x00000011U)
#define CSL_SCM_SDP_LRU_LIST_2_LRU_RANK_14_MAX                  (0x0000001fU)

#define CSL_SCM_SDP_LRU_LIST_2_RESETVAL                         (0x2307b9acU)

/* SDP_LRU_LIST_1 */

#define CSL_SCM_SDP_LRU_LIST_1_LRU_RANK_25_MASK                 (0x0000001FU)
#define CSL_SCM_SDP_LRU_LIST_1_LRU_RANK_25_SHIFT                (0U)
#define CSL_SCM_SDP_LRU_LIST_1_LRU_RANK_25_RESETVAL             (0x00000006U)
#define CSL_SCM_SDP_LRU_LIST_1_LRU_RANK_25_MAX                  (0x0000001fU)

#define CSL_SCM_SDP_LRU_LIST_1_LRU_RANK_24_MASK                 (0x000003E0U)
#define CSL_SCM_SDP_LRU_LIST_1_LRU_RANK_24_SHIFT                (5U)
#define CSL_SCM_SDP_LRU_LIST_1_LRU_RANK_24_RESETVAL             (0x00000007U)
#define CSL_SCM_SDP_LRU_LIST_1_LRU_RANK_24_MAX                  (0x0000001fU)

#define CSL_SCM_SDP_LRU_LIST_1_LRU_RANK_23_MASK                 (0x00007C00U)
#define CSL_SCM_SDP_LRU_LIST_1_LRU_RANK_23_SHIFT                (10U)
#define CSL_SCM_SDP_LRU_LIST_1_LRU_RANK_23_RESETVAL             (0x00000008U)
#define CSL_SCM_SDP_LRU_LIST_1_LRU_RANK_23_MAX                  (0x0000001fU)

#define CSL_SCM_SDP_LRU_LIST_1_LRU_RANK_22_MASK                 (0x000F8000U)
#define CSL_SCM_SDP_LRU_LIST_1_LRU_RANK_22_SHIFT                (15U)
#define CSL_SCM_SDP_LRU_LIST_1_LRU_RANK_22_RESETVAL             (0x00000009U)
#define CSL_SCM_SDP_LRU_LIST_1_LRU_RANK_22_MAX                  (0x0000001fU)

#define CSL_SCM_SDP_LRU_LIST_1_LRU_RANK_21_MASK                 (0x01F00000U)
#define CSL_SCM_SDP_LRU_LIST_1_LRU_RANK_21_SHIFT                (20U)
#define CSL_SCM_SDP_LRU_LIST_1_LRU_RANK_21_RESETVAL             (0x0000000aU)
#define CSL_SCM_SDP_LRU_LIST_1_LRU_RANK_21_MAX                  (0x0000001fU)

#define CSL_SCM_SDP_LRU_LIST_1_LRU_RANK_20_MASK                 (0x3E000000U)
#define CSL_SCM_SDP_LRU_LIST_1_LRU_RANK_20_SHIFT                (25U)
#define CSL_SCM_SDP_LRU_LIST_1_LRU_RANK_20_RESETVAL             (0x0000000bU)
#define CSL_SCM_SDP_LRU_LIST_1_LRU_RANK_20_MAX                  (0x0000001fU)

#define CSL_SCM_SDP_LRU_LIST_1_RESETVAL                         (0x16a4a0e6U)

/* SDP_LRU_LIST_0 */

#define CSL_SCM_SDP_LRU_LIST_0_LRU_RANK_31_MASK                 (0x0000001FU)
#define CSL_SCM_SDP_LRU_LIST_0_LRU_RANK_31_SHIFT                (0U)
#define CSL_SCM_SDP_LRU_LIST_0_LRU_RANK_31_RESETVAL             (0x00000000U)
#define CSL_SCM_SDP_LRU_LIST_0_LRU_RANK_31_MAX                  (0x0000001fU)

#define CSL_SCM_SDP_LRU_LIST_0_LRU_RANK_30_MASK                 (0x000003E0U)
#define CSL_SCM_SDP_LRU_LIST_0_LRU_RANK_30_SHIFT                (5U)
#define CSL_SCM_SDP_LRU_LIST_0_LRU_RANK_30_RESETVAL             (0x00000001U)
#define CSL_SCM_SDP_LRU_LIST_0_LRU_RANK_30_MAX                  (0x0000001fU)

#define CSL_SCM_SDP_LRU_LIST_0_LRU_RANK_29_MASK                 (0x00007C00U)
#define CSL_SCM_SDP_LRU_LIST_0_LRU_RANK_29_SHIFT                (10U)
#define CSL_SCM_SDP_LRU_LIST_0_LRU_RANK_29_RESETVAL             (0x00000002U)
#define CSL_SCM_SDP_LRU_LIST_0_LRU_RANK_29_MAX                  (0x0000001fU)

#define CSL_SCM_SDP_LRU_LIST_0_LRU_RANK_28_MASK                 (0x000F8000U)
#define CSL_SCM_SDP_LRU_LIST_0_LRU_RANK_28_SHIFT                (15U)
#define CSL_SCM_SDP_LRU_LIST_0_LRU_RANK_28_RESETVAL             (0x00000003U)
#define CSL_SCM_SDP_LRU_LIST_0_LRU_RANK_28_MAX                  (0x0000001fU)

#define CSL_SCM_SDP_LRU_LIST_0_LRU_RANK_27_MASK                 (0x01F00000U)
#define CSL_SCM_SDP_LRU_LIST_0_LRU_RANK_27_SHIFT                (20U)
#define CSL_SCM_SDP_LRU_LIST_0_LRU_RANK_27_RESETVAL             (0x00000004U)
#define CSL_SCM_SDP_LRU_LIST_0_LRU_RANK_27_MAX                  (0x0000001fU)

#define CSL_SCM_SDP_LRU_LIST_0_LRU_RANK_26_MASK                 (0x3E000000U)
#define CSL_SCM_SDP_LRU_LIST_0_LRU_RANK_26_SHIFT                (25U)
#define CSL_SCM_SDP_LRU_LIST_0_LRU_RANK_26_RESETVAL             (0x00000005U)
#define CSL_SCM_SDP_LRU_LIST_0_LRU_RANK_26_MAX                  (0x0000001fU)

#define CSL_SCM_SDP_LRU_LIST_0_RESETVAL                         (0x0a418820U)

#ifdef __cplusplus
}
#endif
#endif