cslr_pwmss.h 11 KB

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  1. /********************************************************************
  2. * Copyright (C) 2013-2014 Texas Instruments Incorporated.
  3. *
  4. * Redistribution and use in source and binary forms, with or without
  5. * modification, are permitted provided that the following conditions
  6. * are met:
  7. *
  8. * Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. *
  11. * Redistributions in binary form must reproduce the above copyright
  12. * notice, this list of conditions and the following disclaimer in the
  13. * documentation and/or other materials provided with the
  14. * distribution.
  15. *
  16. * Neither the name of Texas Instruments Incorporated nor the names of
  17. * its contributors may be used to endorse or promote products derived
  18. * from this software without specific prior written permission.
  19. *
  20. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  21. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  22. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  23. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  24. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  25. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  26. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  27. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  28. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  30. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31. *
  32. */
  33. #ifndef CSLR_PWMSS_H_
  34. #define CSLR_PWMSS_H_
  35. #ifdef __cplusplus
  36. extern "C"
  37. {
  38. #endif
  39. #include <ti/csl/cslr.h>
  40. #include <ti/csl/tistdtypes.h>
  41. /**************************************************************************
  42. * Register Overlay Structure for ALL
  43. **************************************************************************/
  44. typedef struct {
  45. volatile Uint32 IDVER;
  46. volatile Uint32 SYSCONFIG;
  47. volatile Uint32 CLKCONFIG;
  48. volatile Uint32 CLKSTATUS;
  49. volatile Uint8 RSVD0[32];
  50. } CSL_PwmssRegs;
  51. /**************************************************************************
  52. * Register Macros
  53. **************************************************************************/
  54. #define CSL_PWMSS_CLKSTATUS (0xCU)
  55. #define CSL_PWMSS_CLKCONFIG (0x8U)
  56. #define CSL_PWMSS_SYSCONFIG (0x4U)
  57. #define CSL_PWMSS_IDVER (0x0U)
  58. /**************************************************************************
  59. * Field Definition Macros
  60. **************************************************************************/
  61. /* CLKSTATUS */
  62. #define CSL_PWMSS_CLKSTATUS_ECAP_CLK_EN_ACK_MASK (0x00000001U)
  63. #define CSL_PWMSS_CLKSTATUS_ECAP_CLK_EN_ACK_SHIFT (0U)
  64. #define CSL_PWMSS_CLKSTATUS_ECAP_CLK_EN_ACK_RESETVAL (0x00000000U)
  65. #define CSL_PWMSS_CLKSTATUS_ECAP_CLK_EN_ACK_MAX (0x00000001U)
  66. #define CSL_PWMSS_CLKSTATUS_ECAP_CLKSTOP_ACK_MASK (0x00000002U)
  67. #define CSL_PWMSS_CLKSTATUS_ECAP_CLKSTOP_ACK_SHIFT (1U)
  68. #define CSL_PWMSS_CLKSTATUS_ECAP_CLKSTOP_ACK_RESETVAL (0x00000000U)
  69. #define CSL_PWMSS_CLKSTATUS_ECAP_CLKSTOP_ACK_MAX (0x00000001U)
  70. #define CSL_PWMSS_CLKSTATUS_EQEP_CLK_EN_ACK_MASK (0x00000010U)
  71. #define CSL_PWMSS_CLKSTATUS_EQEP_CLK_EN_ACK_SHIFT (4U)
  72. #define CSL_PWMSS_CLKSTATUS_EQEP_CLK_EN_ACK_RESETVAL (0x00000000U)
  73. #define CSL_PWMSS_CLKSTATUS_EQEP_CLK_EN_ACK_MAX (0x00000001U)
  74. #define CSL_PWMSS_CLKSTATUS_EQEP_CLKSTOP_ACK_MASK (0x00000020U)
  75. #define CSL_PWMSS_CLKSTATUS_EQEP_CLKSTOP_ACK_SHIFT (5U)
  76. #define CSL_PWMSS_CLKSTATUS_EQEP_CLKSTOP_ACK_RESETVAL (0x00000000U)
  77. #define CSL_PWMSS_CLKSTATUS_EQEP_CLKSTOP_ACK_MAX (0x00000001U)
  78. #define CSL_PWMSS_CLKSTATUS_EPWM_CLK_EN_ACK_MASK (0x00000100U)
  79. #define CSL_PWMSS_CLKSTATUS_EPWM_CLK_EN_ACK_SHIFT (8U)
  80. #define CSL_PWMSS_CLKSTATUS_EPWM_CLK_EN_ACK_RESETVAL (0x00000000U)
  81. #define CSL_PWMSS_CLKSTATUS_EPWM_CLK_EN_ACK_MAX (0x00000001U)
  82. #define CSL_PWMSS_CLKSTATUS_EPWM_CLKSTOP_ACK_MASK (0x00000200U)
  83. #define CSL_PWMSS_CLKSTATUS_EPWM_CLKSTOP_ACK_SHIFT (9U)
  84. #define CSL_PWMSS_CLKSTATUS_EPWM_CLKSTOP_ACK_RESETVAL (0x00000000U)
  85. #define CSL_PWMSS_CLKSTATUS_EPWM_CLKSTOP_ACK_MAX (0x00000001U)
  86. #define CSL_PWMSS_CLKSTATUS_RESETVAL (0x00000000U)
  87. /* CLKCONFIG */
  88. #define CSL_PWMSS_CLKCONFIG_ECAPCLK_EN_MASK (0x00000001U)
  89. #define CSL_PWMSS_CLKCONFIG_ECAPCLK_EN_SHIFT (0U)
  90. #define CSL_PWMSS_CLKCONFIG_ECAPCLK_EN_RESETVAL (0x00000001U)
  91. #define CSL_PWMSS_CLKCONFIG_ECAPCLK_EN_MAX (0x00000001U)
  92. #define CSL_PWMSS_CLKCONFIG_ECAPCLKSTOP_REQ_MASK (0x00000002U)
  93. #define CSL_PWMSS_CLKCONFIG_ECAPCLKSTOP_REQ_SHIFT (1U)
  94. #define CSL_PWMSS_CLKCONFIG_ECAPCLKSTOP_REQ_RESETVAL (0x00000000U)
  95. #define CSL_PWMSS_CLKCONFIG_ECAPCLKSTOP_REQ_MAX (0x00000001U)
  96. #define CSL_PWMSS_CLKCONFIG_EQEPCLK_EN_MASK (0x00000010U)
  97. #define CSL_PWMSS_CLKCONFIG_EQEPCLK_EN_SHIFT (4U)
  98. #define CSL_PWMSS_CLKCONFIG_EQEPCLK_EN_RESETVAL (0x00000001U)
  99. #define CSL_PWMSS_CLKCONFIG_EQEPCLK_EN_MAX (0x00000001U)
  100. #define CSL_PWMSS_CLKCONFIG_EQEPCLKSTOP_REQ_MASK (0x00000020U)
  101. #define CSL_PWMSS_CLKCONFIG_EQEPCLKSTOP_REQ_SHIFT (5U)
  102. #define CSL_PWMSS_CLKCONFIG_EQEPCLKSTOP_REQ_RESETVAL (0x00000000U)
  103. #define CSL_PWMSS_CLKCONFIG_EQEPCLKSTOP_REQ_MAX (0x00000001U)
  104. #define CSL_PWMSS_CLKCONFIG_EPWMCLK_EN_MASK (0x00000100U)
  105. #define CSL_PWMSS_CLKCONFIG_EPWMCLK_EN_SHIFT (8U)
  106. #define CSL_PWMSS_CLKCONFIG_EPWMCLK_EN_RESETVAL (0x00000001U)
  107. #define CSL_PWMSS_CLKCONFIG_EPWMCLK_EN_MAX (0x00000001U)
  108. #define CSL_PWMSS_CLKCONFIG_EPWMCLKSTOP_REQ_MASK (0x00000200U)
  109. #define CSL_PWMSS_CLKCONFIG_EPWMCLKSTOP_REQ_SHIFT (9U)
  110. #define CSL_PWMSS_CLKCONFIG_EPWMCLKSTOP_REQ_RESETVAL (0x00000000U)
  111. #define CSL_PWMSS_CLKCONFIG_EPWMCLKSTOP_REQ_MAX (0x00000001U)
  112. #define CSL_PWMSS_CLKCONFIG_RESETVAL (0x00000111U)
  113. /* SYSCONFIG */
  114. #define CSL_PWMSS_SYSCONFIG_SOFTRESET_MASK (0x00000001U)
  115. #define CSL_PWMSS_SYSCONFIG_SOFTRESET_SHIFT (0U)
  116. #define CSL_PWMSS_SYSCONFIG_SOFTRESET_RESETVAL (0x00000000U)
  117. #define CSL_PWMSS_SYSCONFIG_SOFTRESET_MAX (0x00000001U)
  118. #define CSL_PWMSS_SYSCONFIG_FREEEMU_MASK (0x00000002U)
  119. #define CSL_PWMSS_SYSCONFIG_FREEEMU_SHIFT (1U)
  120. #define CSL_PWMSS_SYSCONFIG_FREEEMU_RESETVAL (0x00000000U)
  121. #define CSL_PWMSS_SYSCONFIG_FREEEMU_SENSITIVE_TO_SUSPEND (0U)
  122. #define CSL_PWMSS_SYSCONFIG_FREEEMU_NOT_SENSITIVE_TO_SUSPEND (1U)
  123. #define CSL_PWMSS_SYSCONFIG_FREEEMU_VAL_0 (CSL_PWMSS_SYSCONFIG_FREEEMU_SENSITIVE_TO_SUSPEND)
  124. #define CSL_PWMSS_SYSCONFIG_FREEEMU_VAL_1 (CSL_PWMSS_SYSCONFIG_FREEEMU_NOT_SENSITIVE_TO_SUSPEND)
  125. #define CSL_PWMSS_SYSCONFIG_IDLEMODE_MASK (0x0000000CU)
  126. #define CSL_PWMSS_SYSCONFIG_IDLEMODE_SHIFT (2U)
  127. #define CSL_PWMSS_SYSCONFIG_IDLEMODE_RESETVAL (0x00000002U)
  128. #define CSL_PWMSS_SYSCONFIG_IDLEMODE_FORCE_IDLE (0U)
  129. #define CSL_PWMSS_SYSCONFIG_IDLEMODE_NO_IDLE (1U)
  130. #define CSL_PWMSS_SYSCONFIG_IDLEMODE_SMART_IDLE (2U)
  131. #define CSL_PWMSS_SYSCONFIG_IDLEMODE_VAL_0 (CSL_PWMSS_SYSCONFIG_IDLEMODE_FORCE_IDLE)
  132. #define CSL_PWMSS_SYSCONFIG_IDLEMODE_VAL_1 (CSL_PWMSS_SYSCONFIG_IDLEMODE_NO_IDLE)
  133. #define CSL_PWMSS_SYSCONFIG_IDLEMODE_VAL_2 (CSL_PWMSS_SYSCONFIG_IDLEMODE_SMART_IDLE)
  134. #define CSL_PWMSS_SYSCONFIG_IDLEMODE_VAL_3 (0x00000003U)
  135. #define CSL_PWMSS_SYSCONFIG_STANDBYMODE_MASK (0x00000030U)
  136. #define CSL_PWMSS_SYSCONFIG_STANDBYMODE_SHIFT (4U)
  137. #define CSL_PWMSS_SYSCONFIG_STANDBYMODE_RESETVAL (0x00000002U)
  138. #define CSL_PWMSS_SYSCONFIG_STANDBYMODE_FORCE_STANDBY (0U)
  139. #define CSL_PWMSS_SYSCONFIG_STANDBYMODE_NO_STANDBY (1U)
  140. #define CSL_PWMSS_SYSCONFIG_STANDBYMODE_SMART_STANDBY (2U)
  141. #define CSL_PWMSS_SYSCONFIG_STANDBYMODE_VAL_0 (CSL_PWMSS_SYSCONFIG_STANDBYMODE_FORCE_STANDBY)
  142. #define CSL_PWMSS_SYSCONFIG_STANDBYMODE_VAL_1 (CSL_PWMSS_SYSCONFIG_STANDBYMODE_NO_STANDBY)
  143. #define CSL_PWMSS_SYSCONFIG_STANDBYMODE_VAL_2 (CSL_PWMSS_SYSCONFIG_STANDBYMODE_SMART_STANDBY)
  144. #define CSL_PWMSS_SYSCONFIG_STANDBYMODE_VAL_3 (0x00000003U)
  145. #define CSL_PWMSS_SYSCONFIG_RESETVAL (0x00000028U)
  146. /* IDVER */
  147. #define CSL_PWMSS_IDVER_Y_MINOR_MASK (0x0000003FU)
  148. #define CSL_PWMSS_IDVER_Y_MINOR_SHIFT (0U)
  149. #define CSL_PWMSS_IDVER_Y_MINOR_RESETVAL (0x00000000U)
  150. #define CSL_PWMSS_IDVER_Y_MINOR_MAX (0x0000003fU)
  151. #define CSL_PWMSS_IDVER_CUSTOM_MASK (0x000000C0U)
  152. #define CSL_PWMSS_IDVER_CUSTOM_SHIFT (6U)
  153. #define CSL_PWMSS_IDVER_CUSTOM_RESETVAL (0x00000000U)
  154. #define CSL_PWMSS_IDVER_CUSTOM_MAX (0x00000003U)
  155. #define CSL_PWMSS_IDVER_X_MAJOR_MASK (0x00000700U)
  156. #define CSL_PWMSS_IDVER_X_MAJOR_SHIFT (8U)
  157. #define CSL_PWMSS_IDVER_X_MAJOR_RESETVAL (0x00000000U)
  158. #define CSL_PWMSS_IDVER_X_MAJOR_MAX (0x00000007U)
  159. #define CSL_PWMSS_IDVER_R_RTL_MASK (0x0000F800U)
  160. #define CSL_PWMSS_IDVER_R_RTL_SHIFT (11U)
  161. #define CSL_PWMSS_IDVER_R_RTL_RESETVAL (0x00000000U)
  162. #define CSL_PWMSS_IDVER_R_RTL_MAX (0x0000001fU)
  163. #define CSL_PWMSS_IDVER_FUNC_MASK (0x0FFF0000U)
  164. #define CSL_PWMSS_IDVER_FUNC_SHIFT (16U)
  165. #define CSL_PWMSS_IDVER_FUNC_RESETVAL (0x00000000U)
  166. #define CSL_PWMSS_IDVER_FUNC_MAX (0x00000fffU)
  167. #define CSL_PWMSS_IDVER_SCHEME_MASK (0xC0000000U)
  168. #define CSL_PWMSS_IDVER_SCHEME_SHIFT (30U)
  169. #define CSL_PWMSS_IDVER_SCHEME_RESETVAL (0x00000001U)
  170. #define CSL_PWMSS_IDVER_SCHEME_MAX (0x00000003U)
  171. #define CSL_PWMSS_IDVER_RESETVAL (0x40000000U)
  172. #ifdef __cplusplus
  173. }
  174. #endif
  175. #endif