cslr_cpintc.h 2.7 MB

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  1. /********************************************************************
  2. * Copyright (C) 2003-2008 Texas Instruments Incorporated.
  3. *
  4. * Redistribution and use in source and binary forms, with or without
  5. * modification, are permitted provided that the following conditions
  6. * are met:
  7. *
  8. * Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. *
  11. * Redistributions in binary form must reproduce the above copyright
  12. * notice, this list of conditions and the following disclaimer in the
  13. * documentation and/or other materials provided with the
  14. * distribution.
  15. *
  16. * Neither the name of Texas Instruments Incorporated nor the names of
  17. * its contributors may be used to endorse or promote products derived
  18. * from this software without specific prior written permission.
  19. *
  20. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  21. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  22. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  23. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  24. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  25. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  26. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  27. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  28. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  30. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31. *
  32. */
  33. #ifndef CSLR_CPINTC_H
  34. #define CSLR_CPINTC_H
  35. /* CSL Modification:
  36. * The file has been modified from the AUTOGEN file for the following
  37. * reasons:-
  38. * a) Modified Registers CH_MAP_REG0-CH_MAP_REG255 to an array of bytes of CHMAP[1024]
  39. * b) Modified Registers HINT_MAP_REG0-HINT_MAP_REG63 to an array of HINTMAP[64]
  40. * c) Modified Registers RAW_STATUS_REG0-RAW_STATUS_REG31 to an array of RAW_STATUS_REG[32]
  41. * d) Modified Registers ENA_STATUS_REG0-ENA_STATUS_REG32 to an array of ENA_STATUS_REG[32]
  42. * e) Modified Registers ENABLE_REG0-ENABLE_REG31 to an array of ENABLE_REG[32]
  43. * f) Modified Registers ENABLE_CLR_REG0-ENABLE_CLR_REG31 to an array of ENABLE_CLR_REG[32]
  44. * g) Modified Registers PRI_HINT_REG0-PRI_HINT_REG255 to an array of PRI_HINT_REG[256]
  45. * h) Modified Registers POLARITY_REG0-POLARITY_REG31 to an array of POLARITY_REG[32]
  46. * i) Modified Registers TYPE_REG0-TYPE_REG31 to an array of TYPE_REG[32]
  47. * j) Modified Registers DBG_SELECT_REG0-DBG_SELECT_REG63 to an array of DBG_SELECT_REG[64]
  48. * k) Modified Registers SECURE_ENABLE_REG0-SECURE_ENABLE_REG31 to an array of SECURE_ENABLE_REG[32]
  49. * l) Modified Registers SECURE_ENABLE_CLR_REG0-SECURE_ENABLE_CLR_REG31 to an array of SECURE_ENABLE_CLR_REG[32]
  50. * m) Modified Registers NEST_LEVEL_REG0-NEST_LEVEL_REG255 to an array of NEST_LEVEL_REG[256]
  51. * n) Modified Registers ENABLE_HINT_REG0-ENABLE_HINT_REG7 to an array of ENABLE_HINT_REG[8]
  52. * o) Modified Registers VECTOR_ADDRESS_REG_0-VECTOR_ADDRESS_REG_1023 to an array of VECTOR_ADDRESS_REG[1024]
  53. * p) Modified the header file includes to be RTSC compliant
  54. */
  55. #include <ti/csl/cslr.h>
  56. #include <ti/csl/tistdtypes.h>
  57. /* Minimum unit = 1 byte */
  58. /**************************************************************************\
  59. * Register Overlay Structure
  60. \**************************************************************************/
  61. typedef struct {
  62. volatile Uint32 REVISION_REG;
  63. volatile Uint32 CONTROL_REG;
  64. volatile Uint8 RSVD0[4];
  65. volatile Uint32 HOST_CONTROL_REG;
  66. volatile Uint32 GLOBAL_ENABLE_HINT_REG;
  67. volatile Uint8 RSVD1[8];
  68. volatile Uint32 GLB_NEST_LEVEL_REG;
  69. volatile Uint32 STATUS_SET_INDEX_REG;
  70. volatile Uint32 STATUS_CLR_INDEX_REG;
  71. volatile Uint32 ENABLE_SET_INDEX_REG;
  72. volatile Uint32 ENABLE_CLR_INDEX_REG;
  73. volatile Uint8 RSVD2[4];
  74. volatile Uint32 HINT_ENABLE_SET_INDEX_REG;
  75. volatile Uint32 HINT_ENABLE_CLR_INDEX_REG;
  76. volatile Uint8 RSVD3[28];
  77. volatile Uint32 VECTOR_NULL_REG;
  78. volatile Uint8 RSVD4[36];
  79. volatile Uint32 GLB_PRI_INTR_REG;
  80. volatile Uint32 GLB_VECTOR_ADDR_REG;
  81. volatile Uint8 RSVD5[8];
  82. volatile Uint32 GLOBAL_SECURE_ENABLE_REG;
  83. volatile Uint32 SECURE_PRI_INTR_REG;
  84. volatile Uint8 RSVD6[360];
  85. #ifdef CSL_MODIFICATION
  86. volatile Uint32 RAW_STATUS_REG0;
  87. volatile Uint32 RAW_STATUS_REG1;
  88. volatile Uint32 RAW_STATUS_REG2;
  89. volatile Uint32 RAW_STATUS_REG3;
  90. volatile Uint32 RAW_STATUS_REG4;
  91. volatile Uint32 RAW_STATUS_REG5;
  92. volatile Uint32 RAW_STATUS_REG6;
  93. volatile Uint32 RAW_STATUS_REG7;
  94. volatile Uint32 RAW_STATUS_REG8;
  95. volatile Uint32 RAW_STATUS_REG9;
  96. volatile Uint32 RAW_STATUS_REG10;
  97. volatile Uint32 RAW_STATUS_REG11;
  98. volatile Uint32 RAW_STATUS_REG12;
  99. volatile Uint32 RAW_STATUS_REG13;
  100. volatile Uint32 RAW_STATUS_REG14;
  101. volatile Uint32 RAW_STATUS_REG15;
  102. volatile Uint32 RAW_STATUS_REG16;
  103. volatile Uint32 RAW_STATUS_REG17;
  104. volatile Uint32 RAW_STATUS_REG18;
  105. volatile Uint32 RAW_STATUS_REG19;
  106. volatile Uint32 RAW_STATUS_REG20;
  107. volatile Uint32 RAW_STATUS_REG21;
  108. volatile Uint32 RAW_STATUS_REG22;
  109. volatile Uint32 RAW_STATUS_REG23;
  110. volatile Uint32 RAW_STATUS_REG24;
  111. volatile Uint32 RAW_STATUS_REG25;
  112. volatile Uint32 RAW_STATUS_REG26;
  113. volatile Uint32 RAW_STATUS_REG27;
  114. volatile Uint32 RAW_STATUS_REG28;
  115. volatile Uint32 RAW_STATUS_REG29;
  116. volatile Uint32 RAW_STATUS_REG30;
  117. volatile Uint32 RAW_STATUS_REG31;
  118. #else
  119. volatile Uint32 RAW_STATUS_REG[32];
  120. #endif
  121. #ifdef CSL_MODIFICATION
  122. volatile Uint32 ENA_STATUS_REG0;
  123. volatile Uint32 ENA_STATUS_REG1;
  124. volatile Uint32 ENA_STATUS_REG2;
  125. volatile Uint32 ENA_STATUS_REG3;
  126. volatile Uint32 ENA_STATUS_REG4;
  127. volatile Uint32 ENA_STATUS_REG5;
  128. volatile Uint32 ENA_STATUS_REG6;
  129. volatile Uint32 ENA_STATUS_REG7;
  130. volatile Uint32 ENA_STATUS_REG8;
  131. volatile Uint32 ENA_STATUS_REG9;
  132. volatile Uint32 ENA_STATUS_REG10;
  133. volatile Uint32 ENA_STATUS_REG11;
  134. volatile Uint32 ENA_STATUS_REG12;
  135. volatile Uint32 ENA_STATUS_REG13;
  136. volatile Uint32 ENA_STATUS_REG14;
  137. volatile Uint32 ENA_STATUS_REG15;
  138. volatile Uint32 ENA_STATUS_REG16;
  139. volatile Uint32 ENA_STATUS_REG17;
  140. volatile Uint32 ENA_STATUS_REG18;
  141. volatile Uint32 ENA_STATUS_REG19;
  142. volatile Uint32 ENA_STATUS_REG20;
  143. volatile Uint32 ENA_STATUS_REG21;
  144. volatile Uint32 ENA_STATUS_REG22;
  145. volatile Uint32 ENA_STATUS_REG23;
  146. volatile Uint32 ENA_STATUS_REG24;
  147. volatile Uint32 ENA_STATUS_REG25;
  148. volatile Uint32 ENA_STATUS_REG26;
  149. volatile Uint32 ENA_STATUS_REG27;
  150. volatile Uint32 ENA_STATUS_REG28;
  151. volatile Uint32 ENA_STATUS_REG29;
  152. volatile Uint32 ENA_STATUS_REG30;
  153. volatile Uint32 ENA_STATUS_REG31;
  154. #else
  155. volatile Uint32 ENA_STATUS_REG[32];
  156. #endif
  157. #ifdef CSL_MODIFICATION
  158. volatile Uint32 ENABLE_REG0;
  159. volatile Uint32 ENABLE_REG1;
  160. volatile Uint32 ENABLE_REG2;
  161. volatile Uint32 ENABLE_REG3;
  162. volatile Uint32 ENABLE_REG4;
  163. volatile Uint32 ENABLE_REG5;
  164. volatile Uint32 ENABLE_REG6;
  165. volatile Uint32 ENABLE_REG7;
  166. volatile Uint32 ENABLE_REG8;
  167. volatile Uint32 ENABLE_REG9;
  168. volatile Uint32 ENABLE_REG10;
  169. volatile Uint32 ENABLE_REG11;
  170. volatile Uint32 ENABLE_REG12;
  171. volatile Uint32 ENABLE_REG13;
  172. volatile Uint32 ENABLE_REG14;
  173. volatile Uint32 ENABLE_REG15;
  174. volatile Uint32 ENABLE_REG16;
  175. volatile Uint32 ENABLE_REG17;
  176. volatile Uint32 ENABLE_REG18;
  177. volatile Uint32 ENABLE_REG19;
  178. volatile Uint32 ENABLE_REG20;
  179. volatile Uint32 ENABLE_REG21;
  180. volatile Uint32 ENABLE_REG22;
  181. volatile Uint32 ENABLE_REG23;
  182. volatile Uint32 ENABLE_REG24;
  183. volatile Uint32 ENABLE_REG25;
  184. volatile Uint32 ENABLE_REG26;
  185. volatile Uint32 ENABLE_REG27;
  186. volatile Uint32 ENABLE_REG28;
  187. volatile Uint32 ENABLE_REG29;
  188. volatile Uint32 ENABLE_REG30;
  189. volatile Uint32 ENABLE_REG31;
  190. #else
  191. volatile Uint32 ENABLE_REG[32];
  192. #endif
  193. #ifdef CSL_MODIFICATION
  194. volatile Uint32 ENABLE_CLR_REG0;
  195. volatile Uint32 ENABLE_CLR_REG1;
  196. volatile Uint32 ENABLE_CLR_REG2;
  197. volatile Uint32 ENABLE_CLR_REG3;
  198. volatile Uint32 ENABLE_CLR_REG4;
  199. volatile Uint32 ENABLE_CLR_REG5;
  200. volatile Uint32 ENABLE_CLR_REG6;
  201. volatile Uint32 ENABLE_CLR_REG7;
  202. volatile Uint32 ENABLE_CLR_REG8;
  203. volatile Uint32 ENABLE_CLR_REG9;
  204. volatile Uint32 ENABLE_CLR_REG10;
  205. volatile Uint32 ENABLE_CLR_REG11;
  206. volatile Uint32 ENABLE_CLR_REG12;
  207. volatile Uint32 ENABLE_CLR_REG13;
  208. volatile Uint32 ENABLE_CLR_REG14;
  209. volatile Uint32 ENABLE_CLR_REG15;
  210. volatile Uint32 ENABLE_CLR_REG16;
  211. volatile Uint32 ENABLE_CLR_REG17;
  212. volatile Uint32 ENABLE_CLR_REG18;
  213. volatile Uint32 ENABLE_CLR_REG19;
  214. volatile Uint32 ENABLE_CLR_REG20;
  215. volatile Uint32 ENABLE_CLR_REG21;
  216. volatile Uint32 ENABLE_CLR_REG22;
  217. volatile Uint32 ENABLE_CLR_REG23;
  218. volatile Uint32 ENABLE_CLR_REG24;
  219. volatile Uint32 ENABLE_CLR_REG25;
  220. volatile Uint32 ENABLE_CLR_REG26;
  221. volatile Uint32 ENABLE_CLR_REG27;
  222. volatile Uint32 ENABLE_CLR_REG28;
  223. volatile Uint32 ENABLE_CLR_REG29;
  224. volatile Uint32 ENABLE_CLR_REG30;
  225. volatile Uint32 ENABLE_CLR_REG31;
  226. #else
  227. volatile Uint32 ENABLE_CLR_REG[32];
  228. #endif
  229. #ifdef CSL_MODIFICATION
  230. volatile Uint32 CH_MAP_REG0;
  231. volatile Uint32 CH_MAP_REG1;
  232. volatile Uint32 CH_MAP_REG2;
  233. volatile Uint32 CH_MAP_REG3;
  234. volatile Uint32 CH_MAP_REG4;
  235. volatile Uint32 CH_MAP_REG5;
  236. volatile Uint32 CH_MAP_REG6;
  237. volatile Uint32 CH_MAP_REG7;
  238. volatile Uint32 CH_MAP_REG8;
  239. volatile Uint32 CH_MAP_REG9;
  240. volatile Uint32 CH_MAP_REG10;
  241. volatile Uint32 CH_MAP_REG11;
  242. volatile Uint32 CH_MAP_REG12;
  243. volatile Uint32 CH_MAP_REG13;
  244. volatile Uint32 CH_MAP_REG14;
  245. volatile Uint32 CH_MAP_REG15;
  246. volatile Uint32 CH_MAP_REG16;
  247. volatile Uint32 CH_MAP_REG17;
  248. volatile Uint32 CH_MAP_REG18;
  249. volatile Uint32 CH_MAP_REG19;
  250. volatile Uint32 CH_MAP_REG20;
  251. volatile Uint32 CH_MAP_REG21;
  252. volatile Uint32 CH_MAP_REG22;
  253. volatile Uint32 CH_MAP_REG23;
  254. volatile Uint32 CH_MAP_REG24;
  255. volatile Uint32 CH_MAP_REG25;
  256. volatile Uint32 CH_MAP_REG26;
  257. volatile Uint32 CH_MAP_REG27;
  258. volatile Uint32 CH_MAP_REG28;
  259. volatile Uint32 CH_MAP_REG29;
  260. volatile Uint32 CH_MAP_REG30;
  261. volatile Uint32 CH_MAP_REG31;
  262. volatile Uint32 CH_MAP_REG32;
  263. volatile Uint32 CH_MAP_REG33;
  264. volatile Uint32 CH_MAP_REG34;
  265. volatile Uint32 CH_MAP_REG35;
  266. volatile Uint32 CH_MAP_REG36;
  267. volatile Uint32 CH_MAP_REG37;
  268. volatile Uint32 CH_MAP_REG38;
  269. volatile Uint32 CH_MAP_REG39;
  270. volatile Uint32 CH_MAP_REG40;
  271. volatile Uint32 CH_MAP_REG41;
  272. volatile Uint32 CH_MAP_REG42;
  273. volatile Uint32 CH_MAP_REG43;
  274. volatile Uint32 CH_MAP_REG44;
  275. volatile Uint32 CH_MAP_REG45;
  276. volatile Uint32 CH_MAP_REG46;
  277. volatile Uint32 CH_MAP_REG47;
  278. volatile Uint32 CH_MAP_REG48;
  279. volatile Uint32 CH_MAP_REG49;
  280. volatile Uint32 CH_MAP_REG50;
  281. volatile Uint32 CH_MAP_REG51;
  282. volatile Uint32 CH_MAP_REG52;
  283. volatile Uint32 CH_MAP_REG53;
  284. volatile Uint32 CH_MAP_REG54;
  285. volatile Uint32 CH_MAP_REG55;
  286. volatile Uint32 CH_MAP_REG56;
  287. volatile Uint32 CH_MAP_REG57;
  288. volatile Uint32 CH_MAP_REG58;
  289. volatile Uint32 CH_MAP_REG59;
  290. volatile Uint32 CH_MAP_REG60;
  291. volatile Uint32 CH_MAP_REG61;
  292. volatile Uint32 CH_MAP_REG62;
  293. volatile Uint32 CH_MAP_REG63;
  294. volatile Uint32 CH_MAP_REG64;
  295. volatile Uint32 CH_MAP_REG65;
  296. volatile Uint32 CH_MAP_REG66;
  297. volatile Uint32 CH_MAP_REG67;
  298. volatile Uint32 CH_MAP_REG68;
  299. volatile Uint32 CH_MAP_REG69;
  300. volatile Uint32 CH_MAP_REG70;
  301. volatile Uint32 CH_MAP_REG71;
  302. volatile Uint32 CH_MAP_REG72;
  303. volatile Uint32 CH_MAP_REG73;
  304. volatile Uint32 CH_MAP_REG74;
  305. volatile Uint32 CH_MAP_REG75;
  306. volatile Uint32 CH_MAP_REG76;
  307. volatile Uint32 CH_MAP_REG77;
  308. volatile Uint32 CH_MAP_REG78;
  309. volatile Uint32 CH_MAP_REG79;
  310. volatile Uint32 CH_MAP_REG80;
  311. volatile Uint32 CH_MAP_REG81;
  312. volatile Uint32 CH_MAP_REG82;
  313. volatile Uint32 CH_MAP_REG83;
  314. volatile Uint32 CH_MAP_REG84;
  315. volatile Uint32 CH_MAP_REG85;
  316. volatile Uint32 CH_MAP_REG86;
  317. volatile Uint32 CH_MAP_REG87;
  318. volatile Uint32 CH_MAP_REG88;
  319. volatile Uint32 CH_MAP_REG89;
  320. volatile Uint32 CH_MAP_REG90;
  321. volatile Uint32 CH_MAP_REG91;
  322. volatile Uint32 CH_MAP_REG92;
  323. volatile Uint32 CH_MAP_REG93;
  324. volatile Uint32 CH_MAP_REG94;
  325. volatile Uint32 CH_MAP_REG95;
  326. volatile Uint32 CH_MAP_REG96;
  327. volatile Uint32 CH_MAP_REG97;
  328. volatile Uint32 CH_MAP_REG98;
  329. volatile Uint32 CH_MAP_REG99;
  330. volatile Uint32 CH_MAP_REG100;
  331. volatile Uint32 CH_MAP_REG101;
  332. volatile Uint32 CH_MAP_REG102;
  333. volatile Uint32 CH_MAP_REG103;
  334. volatile Uint32 CH_MAP_REG104;
  335. volatile Uint32 CH_MAP_REG105;
  336. volatile Uint32 CH_MAP_REG106;
  337. volatile Uint32 CH_MAP_REG107;
  338. volatile Uint32 CH_MAP_REG108;
  339. volatile Uint32 CH_MAP_REG109;
  340. volatile Uint32 CH_MAP_REG110;
  341. volatile Uint32 CH_MAP_REG111;
  342. volatile Uint32 CH_MAP_REG112;
  343. volatile Uint32 CH_MAP_REG113;
  344. volatile Uint32 CH_MAP_REG114;
  345. volatile Uint32 CH_MAP_REG115;
  346. volatile Uint32 CH_MAP_REG116;
  347. volatile Uint32 CH_MAP_REG117;
  348. volatile Uint32 CH_MAP_REG118;
  349. volatile Uint32 CH_MAP_REG119;
  350. volatile Uint32 CH_MAP_REG120;
  351. volatile Uint32 CH_MAP_REG121;
  352. volatile Uint32 CH_MAP_REG122;
  353. volatile Uint32 CH_MAP_REG123;
  354. volatile Uint32 CH_MAP_REG124;
  355. volatile Uint32 CH_MAP_REG125;
  356. volatile Uint32 CH_MAP_REG126;
  357. volatile Uint32 CH_MAP_REG127;
  358. volatile Uint32 CH_MAP_REG128;
  359. volatile Uint32 CH_MAP_REG129;
  360. volatile Uint32 CH_MAP_REG130;
  361. volatile Uint32 CH_MAP_REG131;
  362. volatile Uint32 CH_MAP_REG132;
  363. volatile Uint32 CH_MAP_REG133;
  364. volatile Uint32 CH_MAP_REG134;
  365. volatile Uint32 CH_MAP_REG135;
  366. volatile Uint32 CH_MAP_REG136;
  367. volatile Uint32 CH_MAP_REG137;
  368. volatile Uint32 CH_MAP_REG138;
  369. volatile Uint32 CH_MAP_REG139;
  370. volatile Uint32 CH_MAP_REG140;
  371. volatile Uint32 CH_MAP_REG141;
  372. volatile Uint32 CH_MAP_REG142;
  373. volatile Uint32 CH_MAP_REG143;
  374. volatile Uint32 CH_MAP_REG144;
  375. volatile Uint32 CH_MAP_REG145;
  376. volatile Uint32 CH_MAP_REG146;
  377. volatile Uint32 CH_MAP_REG147;
  378. volatile Uint32 CH_MAP_REG148;
  379. volatile Uint32 CH_MAP_REG149;
  380. volatile Uint32 CH_MAP_REG150;
  381. volatile Uint32 CH_MAP_REG151;
  382. volatile Uint32 CH_MAP_REG152;
  383. volatile Uint32 CH_MAP_REG153;
  384. volatile Uint32 CH_MAP_REG154;
  385. volatile Uint32 CH_MAP_REG155;
  386. volatile Uint32 CH_MAP_REG156;
  387. volatile Uint32 CH_MAP_REG157;
  388. volatile Uint32 CH_MAP_REG158;
  389. volatile Uint32 CH_MAP_REG159;
  390. volatile Uint32 CH_MAP_REG160;
  391. volatile Uint32 CH_MAP_REG161;
  392. volatile Uint32 CH_MAP_REG162;
  393. volatile Uint32 CH_MAP_REG163;
  394. volatile Uint32 CH_MAP_REG164;
  395. volatile Uint32 CH_MAP_REG165;
  396. volatile Uint32 CH_MAP_REG166;
  397. volatile Uint32 CH_MAP_REG167;
  398. volatile Uint32 CH_MAP_REG168;
  399. volatile Uint32 CH_MAP_REG169;
  400. volatile Uint32 CH_MAP_REG170;
  401. volatile Uint32 CH_MAP_REG171;
  402. volatile Uint32 CH_MAP_REG172;
  403. volatile Uint32 CH_MAP_REG173;
  404. volatile Uint32 CH_MAP_REG174;
  405. volatile Uint32 CH_MAP_REG175;
  406. volatile Uint32 CH_MAP_REG176;
  407. volatile Uint32 CH_MAP_REG177;
  408. volatile Uint32 CH_MAP_REG178;
  409. volatile Uint32 CH_MAP_REG179;
  410. volatile Uint32 CH_MAP_REG180;
  411. volatile Uint32 CH_MAP_REG181;
  412. volatile Uint32 CH_MAP_REG182;
  413. volatile Uint32 CH_MAP_REG183;
  414. volatile Uint32 CH_MAP_REG184;
  415. volatile Uint32 CH_MAP_REG185;
  416. volatile Uint32 CH_MAP_REG186;
  417. volatile Uint32 CH_MAP_REG187;
  418. volatile Uint32 CH_MAP_REG188;
  419. volatile Uint32 CH_MAP_REG189;
  420. volatile Uint32 CH_MAP_REG190;
  421. volatile Uint32 CH_MAP_REG191;
  422. volatile Uint32 CH_MAP_REG192;
  423. volatile Uint32 CH_MAP_REG193;
  424. volatile Uint32 CH_MAP_REG194;
  425. volatile Uint32 CH_MAP_REG195;
  426. volatile Uint32 CH_MAP_REG196;
  427. volatile Uint32 CH_MAP_REG197;
  428. volatile Uint32 CH_MAP_REG198;
  429. volatile Uint32 CH_MAP_REG199;
  430. volatile Uint32 CH_MAP_REG200;
  431. volatile Uint32 CH_MAP_REG201;
  432. volatile Uint32 CH_MAP_REG202;
  433. volatile Uint32 CH_MAP_REG203;
  434. volatile Uint32 CH_MAP_REG204;
  435. volatile Uint32 CH_MAP_REG205;
  436. volatile Uint32 CH_MAP_REG206;
  437. volatile Uint32 CH_MAP_REG207;
  438. volatile Uint32 CH_MAP_REG208;
  439. volatile Uint32 CH_MAP_REG209;
  440. volatile Uint32 CH_MAP_REG210;
  441. volatile Uint32 CH_MAP_REG211;
  442. volatile Uint32 CH_MAP_REG212;
  443. volatile Uint32 CH_MAP_REG213;
  444. volatile Uint32 CH_MAP_REG214;
  445. volatile Uint32 CH_MAP_REG215;
  446. volatile Uint32 CH_MAP_REG216;
  447. volatile Uint32 CH_MAP_REG217;
  448. volatile Uint32 CH_MAP_REG218;
  449. volatile Uint32 CH_MAP_REG219;
  450. volatile Uint32 CH_MAP_REG220;
  451. volatile Uint32 CH_MAP_REG221;
  452. volatile Uint32 CH_MAP_REG222;
  453. volatile Uint32 CH_MAP_REG223;
  454. volatile Uint32 CH_MAP_REG224;
  455. volatile Uint32 CH_MAP_REG225;
  456. volatile Uint32 CH_MAP_REG226;
  457. volatile Uint32 CH_MAP_REG227;
  458. volatile Uint32 CH_MAP_REG228;
  459. volatile Uint32 CH_MAP_REG229;
  460. volatile Uint32 CH_MAP_REG230;
  461. volatile Uint32 CH_MAP_REG231;
  462. volatile Uint32 CH_MAP_REG232;
  463. volatile Uint32 CH_MAP_REG233;
  464. volatile Uint32 CH_MAP_REG234;
  465. volatile Uint32 CH_MAP_REG235;
  466. volatile Uint32 CH_MAP_REG236;
  467. volatile Uint32 CH_MAP_REG237;
  468. volatile Uint32 CH_MAP_REG238;
  469. volatile Uint32 CH_MAP_REG239;
  470. volatile Uint32 CH_MAP_REG240;
  471. volatile Uint32 CH_MAP_REG241;
  472. volatile Uint32 CH_MAP_REG242;
  473. volatile Uint32 CH_MAP_REG243;
  474. volatile Uint32 CH_MAP_REG244;
  475. volatile Uint32 CH_MAP_REG245;
  476. volatile Uint32 CH_MAP_REG246;
  477. volatile Uint32 CH_MAP_REG247;
  478. volatile Uint32 CH_MAP_REG248;
  479. volatile Uint32 CH_MAP_REG249;
  480. volatile Uint32 CH_MAP_REG250;
  481. volatile Uint32 CH_MAP_REG251;
  482. volatile Uint32 CH_MAP_REG252;
  483. volatile Uint32 CH_MAP_REG253;
  484. volatile Uint32 CH_MAP_REG254;
  485. volatile Uint32 CH_MAP_REG255;
  486. #else
  487. volatile Uint8 CH_MAP[1024];
  488. #endif
  489. #ifdef CSL_MODIFICATION
  490. volatile Uint32 HINT_MAP_REG0;
  491. volatile Uint32 HINT_MAP_REG1;
  492. volatile Uint32 HINT_MAP_REG2;
  493. volatile Uint32 HINT_MAP_REG3;
  494. volatile Uint32 HINT_MAP_REG4;
  495. volatile Uint32 HINT_MAP_REG5;
  496. volatile Uint32 HINT_MAP_REG6;
  497. volatile Uint32 HINT_MAP_REG7;
  498. volatile Uint32 HINT_MAP_REG8;
  499. volatile Uint32 HINT_MAP_REG9;
  500. volatile Uint32 HINT_MAP_REG10;
  501. volatile Uint32 HINT_MAP_REG11;
  502. volatile Uint32 HINT_MAP_REG12;
  503. volatile Uint32 HINT_MAP_REG13;
  504. volatile Uint32 HINT_MAP_REG14;
  505. volatile Uint32 HINT_MAP_REG15;
  506. volatile Uint32 HINT_MAP_REG16;
  507. volatile Uint32 HINT_MAP_REG17;
  508. volatile Uint32 HINT_MAP_REG18;
  509. volatile Uint32 HINT_MAP_REG19;
  510. volatile Uint32 HINT_MAP_REG20;
  511. volatile Uint32 HINT_MAP_REG21;
  512. volatile Uint32 HINT_MAP_REG22;
  513. volatile Uint32 HINT_MAP_REG23;
  514. volatile Uint32 HINT_MAP_REG24;
  515. volatile Uint32 HINT_MAP_REG25;
  516. volatile Uint32 HINT_MAP_REG26;
  517. volatile Uint32 HINT_MAP_REG27;
  518. volatile Uint32 HINT_MAP_REG28;
  519. volatile Uint32 HINT_MAP_REG29;
  520. volatile Uint32 HINT_MAP_REG30;
  521. volatile Uint32 HINT_MAP_REG31;
  522. volatile Uint32 HINT_MAP_REG32;
  523. volatile Uint32 HINT_MAP_REG33;
  524. volatile Uint32 HINT_MAP_REG34;
  525. volatile Uint32 HINT_MAP_REG35;
  526. volatile Uint32 HINT_MAP_REG36;
  527. volatile Uint32 HINT_MAP_REG37;
  528. volatile Uint32 HINT_MAP_REG38;
  529. volatile Uint32 HINT_MAP_REG39;
  530. volatile Uint32 HINT_MAP_REG40;
  531. volatile Uint32 HINT_MAP_REG41;
  532. volatile Uint32 HINT_MAP_REG42;
  533. volatile Uint32 HINT_MAP_REG43;
  534. volatile Uint32 HINT_MAP_REG44;
  535. volatile Uint32 HINT_MAP_REG45;
  536. volatile Uint32 HINT_MAP_REG46;
  537. volatile Uint32 HINT_MAP_REG47;
  538. volatile Uint32 HINT_MAP_REG48;
  539. volatile Uint32 HINT_MAP_REG49;
  540. volatile Uint32 HINT_MAP_REG50;
  541. volatile Uint32 HINT_MAP_REG51;
  542. volatile Uint32 HINT_MAP_REG52;
  543. volatile Uint32 HINT_MAP_REG53;
  544. volatile Uint32 HINT_MAP_REG54;
  545. volatile Uint32 HINT_MAP_REG55;
  546. volatile Uint32 HINT_MAP_REG56;
  547. volatile Uint32 HINT_MAP_REG57;
  548. volatile Uint32 HINT_MAP_REG58;
  549. volatile Uint32 HINT_MAP_REG59;
  550. volatile Uint32 HINT_MAP_REG60;
  551. volatile Uint32 HINT_MAP_REG61;
  552. volatile Uint32 HINT_MAP_REG62;
  553. volatile Uint32 HINT_MAP_REG63;
  554. #else
  555. volatile Uint32 HINT_MAP[64];
  556. #endif
  557. #ifdef CSL_MODIFICATION
  558. volatile Uint32 PRI_HINT_REG0;
  559. volatile Uint32 PRI_HINT_REG1;
  560. volatile Uint32 PRI_HINT_REG2;
  561. volatile Uint32 PRI_HINT_REG3;
  562. volatile Uint32 PRI_HINT_REG4;
  563. volatile Uint32 PRI_HINT_REG5;
  564. volatile Uint32 PRI_HINT_REG6;
  565. volatile Uint32 PRI_HINT_REG7;
  566. volatile Uint32 PRI_HINT_REG8;
  567. volatile Uint32 PRI_HINT_REG9;
  568. volatile Uint32 PRI_HINT_REG10;
  569. volatile Uint32 PRI_HINT_REG11;
  570. volatile Uint32 PRI_HINT_REG12;
  571. volatile Uint32 PRI_HINT_REG13;
  572. volatile Uint32 PRI_HINT_REG14;
  573. volatile Uint32 PRI_HINT_REG15;
  574. volatile Uint32 PRI_HINT_REG16;
  575. volatile Uint32 PRI_HINT_REG17;
  576. volatile Uint32 PRI_HINT_REG18;
  577. volatile Uint32 PRI_HINT_REG19;
  578. volatile Uint32 PRI_HINT_REG20;
  579. volatile Uint32 PRI_HINT_REG21;
  580. volatile Uint32 PRI_HINT_REG22;
  581. volatile Uint32 PRI_HINT_REG23;
  582. volatile Uint32 PRI_HINT_REG24;
  583. volatile Uint32 PRI_HINT_REG25;
  584. volatile Uint32 PRI_HINT_REG26;
  585. volatile Uint32 PRI_HINT_REG27;
  586. volatile Uint32 PRI_HINT_REG28;
  587. volatile Uint32 PRI_HINT_REG29;
  588. volatile Uint32 PRI_HINT_REG30;
  589. volatile Uint32 PRI_HINT_REG31;
  590. volatile Uint32 PRI_HINT_REG32;
  591. volatile Uint32 PRI_HINT_REG33;
  592. volatile Uint32 PRI_HINT_REG34;
  593. volatile Uint32 PRI_HINT_REG35;
  594. volatile Uint32 PRI_HINT_REG36;
  595. volatile Uint32 PRI_HINT_REG37;
  596. volatile Uint32 PRI_HINT_REG38;
  597. volatile Uint32 PRI_HINT_REG39;
  598. volatile Uint32 PRI_HINT_REG40;
  599. volatile Uint32 PRI_HINT_REG41;
  600. volatile Uint32 PRI_HINT_REG42;
  601. volatile Uint32 PRI_HINT_REG43;
  602. volatile Uint32 PRI_HINT_REG44;
  603. volatile Uint32 PRI_HINT_REG45;
  604. volatile Uint32 PRI_HINT_REG46;
  605. volatile Uint32 PRI_HINT_REG47;
  606. volatile Uint32 PRI_HINT_REG48;
  607. volatile Uint32 PRI_HINT_REG49;
  608. volatile Uint32 PRI_HINT_REG50;
  609. volatile Uint32 PRI_HINT_REG51;
  610. volatile Uint32 PRI_HINT_REG52;
  611. volatile Uint32 PRI_HINT_REG53;
  612. volatile Uint32 PRI_HINT_REG54;
  613. volatile Uint32 PRI_HINT_REG55;
  614. volatile Uint32 PRI_HINT_REG56;
  615. volatile Uint32 PRI_HINT_REG57;
  616. volatile Uint32 PRI_HINT_REG58;
  617. volatile Uint32 PRI_HINT_REG59;
  618. volatile Uint32 PRI_HINT_REG60;
  619. volatile Uint32 PRI_HINT_REG61;
  620. volatile Uint32 PRI_HINT_REG62;
  621. volatile Uint32 PRI_HINT_REG63;
  622. volatile Uint32 PRI_HINT_REG64;
  623. volatile Uint32 PRI_HINT_REG65;
  624. volatile Uint32 PRI_HINT_REG66;
  625. volatile Uint32 PRI_HINT_REG67;
  626. volatile Uint32 PRI_HINT_REG68;
  627. volatile Uint32 PRI_HINT_REG69;
  628. volatile Uint32 PRI_HINT_REG70;
  629. volatile Uint32 PRI_HINT_REG71;
  630. volatile Uint32 PRI_HINT_REG72;
  631. volatile Uint32 PRI_HINT_REG73;
  632. volatile Uint32 PRI_HINT_REG74;
  633. volatile Uint32 PRI_HINT_REG75;
  634. volatile Uint32 PRI_HINT_REG76;
  635. volatile Uint32 PRI_HINT_REG77;
  636. volatile Uint32 PRI_HINT_REG78;
  637. volatile Uint32 PRI_HINT_REG79;
  638. volatile Uint32 PRI_HINT_REG80;
  639. volatile Uint32 PRI_HINT_REG81;
  640. volatile Uint32 PRI_HINT_REG82;
  641. volatile Uint32 PRI_HINT_REG83;
  642. volatile Uint32 PRI_HINT_REG84;
  643. volatile Uint32 PRI_HINT_REG85;
  644. volatile Uint32 PRI_HINT_REG86;
  645. volatile Uint32 PRI_HINT_REG87;
  646. volatile Uint32 PRI_HINT_REG88;
  647. volatile Uint32 PRI_HINT_REG89;
  648. volatile Uint32 PRI_HINT_REG90;
  649. volatile Uint32 PRI_HINT_REG91;
  650. volatile Uint32 PRI_HINT_REG92;
  651. volatile Uint32 PRI_HINT_REG93;
  652. volatile Uint32 PRI_HINT_REG94;
  653. volatile Uint32 PRI_HINT_REG95;
  654. volatile Uint32 PRI_HINT_REG96;
  655. volatile Uint32 PRI_HINT_REG97;
  656. volatile Uint32 PRI_HINT_REG98;
  657. volatile Uint32 PRI_HINT_REG99;
  658. volatile Uint32 PRI_HINT_REG100;
  659. volatile Uint32 PRI_HINT_REG101;
  660. volatile Uint32 PRI_HINT_REG102;
  661. volatile Uint32 PRI_HINT_REG103;
  662. volatile Uint32 PRI_HINT_REG104;
  663. volatile Uint32 PRI_HINT_REG105;
  664. volatile Uint32 PRI_HINT_REG106;
  665. volatile Uint32 PRI_HINT_REG107;
  666. volatile Uint32 PRI_HINT_REG108;
  667. volatile Uint32 PRI_HINT_REG109;
  668. volatile Uint32 PRI_HINT_REG110;
  669. volatile Uint32 PRI_HINT_REG111;
  670. volatile Uint32 PRI_HINT_REG112;
  671. volatile Uint32 PRI_HINT_REG113;
  672. volatile Uint32 PRI_HINT_REG114;
  673. volatile Uint32 PRI_HINT_REG115;
  674. volatile Uint32 PRI_HINT_REG116;
  675. volatile Uint32 PRI_HINT_REG117;
  676. volatile Uint32 PRI_HINT_REG118;
  677. volatile Uint32 PRI_HINT_REG119;
  678. volatile Uint32 PRI_HINT_REG120;
  679. volatile Uint32 PRI_HINT_REG121;
  680. volatile Uint32 PRI_HINT_REG122;
  681. volatile Uint32 PRI_HINT_REG123;
  682. volatile Uint32 PRI_HINT_REG124;
  683. volatile Uint32 PRI_HINT_REG125;
  684. volatile Uint32 PRI_HINT_REG126;
  685. volatile Uint32 PRI_HINT_REG127;
  686. volatile Uint32 PRI_HINT_REG128;
  687. volatile Uint32 PRI_HINT_REG129;
  688. volatile Uint32 PRI_HINT_REG130;
  689. volatile Uint32 PRI_HINT_REG131;
  690. volatile Uint32 PRI_HINT_REG132;
  691. volatile Uint32 PRI_HINT_REG133;
  692. volatile Uint32 PRI_HINT_REG134;
  693. volatile Uint32 PRI_HINT_REG135;
  694. volatile Uint32 PRI_HINT_REG136;
  695. volatile Uint32 PRI_HINT_REG137;
  696. volatile Uint32 PRI_HINT_REG138;
  697. volatile Uint32 PRI_HINT_REG139;
  698. volatile Uint32 PRI_HINT_REG140;
  699. volatile Uint32 PRI_HINT_REG141;
  700. volatile Uint32 PRI_HINT_REG142;
  701. volatile Uint32 PRI_HINT_REG143;
  702. volatile Uint32 PRI_HINT_REG144;
  703. volatile Uint32 PRI_HINT_REG145;
  704. volatile Uint32 PRI_HINT_REG146;
  705. volatile Uint32 PRI_HINT_REG147;
  706. volatile Uint32 PRI_HINT_REG148;
  707. volatile Uint32 PRI_HINT_REG149;
  708. volatile Uint32 PRI_HINT_REG150;
  709. volatile Uint32 PRI_HINT_REG151;
  710. volatile Uint32 PRI_HINT_REG152;
  711. volatile Uint32 PRI_HINT_REG153;
  712. volatile Uint32 PRI_HINT_REG154;
  713. volatile Uint32 PRI_HINT_REG155;
  714. volatile Uint32 PRI_HINT_REG156;
  715. volatile Uint32 PRI_HINT_REG157;
  716. volatile Uint32 PRI_HINT_REG158;
  717. volatile Uint32 PRI_HINT_REG159;
  718. volatile Uint32 PRI_HINT_REG160;
  719. volatile Uint32 PRI_HINT_REG161;
  720. volatile Uint32 PRI_HINT_REG162;
  721. volatile Uint32 PRI_HINT_REG163;
  722. volatile Uint32 PRI_HINT_REG164;
  723. volatile Uint32 PRI_HINT_REG165;
  724. volatile Uint32 PRI_HINT_REG166;
  725. volatile Uint32 PRI_HINT_REG167;
  726. volatile Uint32 PRI_HINT_REG168;
  727. volatile Uint32 PRI_HINT_REG169;
  728. volatile Uint32 PRI_HINT_REG170;
  729. volatile Uint32 PRI_HINT_REG171;
  730. volatile Uint32 PRI_HINT_REG172;
  731. volatile Uint32 PRI_HINT_REG173;
  732. volatile Uint32 PRI_HINT_REG174;
  733. volatile Uint32 PRI_HINT_REG175;
  734. volatile Uint32 PRI_HINT_REG176;
  735. volatile Uint32 PRI_HINT_REG177;
  736. volatile Uint32 PRI_HINT_REG178;
  737. volatile Uint32 PRI_HINT_REG179;
  738. volatile Uint32 PRI_HINT_REG180;
  739. volatile Uint32 PRI_HINT_REG181;
  740. volatile Uint32 PRI_HINT_REG182;
  741. volatile Uint32 PRI_HINT_REG183;
  742. volatile Uint32 PRI_HINT_REG184;
  743. volatile Uint32 PRI_HINT_REG185;
  744. volatile Uint32 PRI_HINT_REG186;
  745. volatile Uint32 PRI_HINT_REG187;
  746. volatile Uint32 PRI_HINT_REG188;
  747. volatile Uint32 PRI_HINT_REG189;
  748. volatile Uint32 PRI_HINT_REG190;
  749. volatile Uint32 PRI_HINT_REG191;
  750. volatile Uint32 PRI_HINT_REG192;
  751. volatile Uint32 PRI_HINT_REG193;
  752. volatile Uint32 PRI_HINT_REG194;
  753. volatile Uint32 PRI_HINT_REG195;
  754. volatile Uint32 PRI_HINT_REG196;
  755. volatile Uint32 PRI_HINT_REG197;
  756. volatile Uint32 PRI_HINT_REG198;
  757. volatile Uint32 PRI_HINT_REG199;
  758. volatile Uint32 PRI_HINT_REG200;
  759. volatile Uint32 PRI_HINT_REG201;
  760. volatile Uint32 PRI_HINT_REG202;
  761. volatile Uint32 PRI_HINT_REG203;
  762. volatile Uint32 PRI_HINT_REG204;
  763. volatile Uint32 PRI_HINT_REG205;
  764. volatile Uint32 PRI_HINT_REG206;
  765. volatile Uint32 PRI_HINT_REG207;
  766. volatile Uint32 PRI_HINT_REG208;
  767. volatile Uint32 PRI_HINT_REG209;
  768. volatile Uint32 PRI_HINT_REG210;
  769. volatile Uint32 PRI_HINT_REG211;
  770. volatile Uint32 PRI_HINT_REG212;
  771. volatile Uint32 PRI_HINT_REG213;
  772. volatile Uint32 PRI_HINT_REG214;
  773. volatile Uint32 PRI_HINT_REG215;
  774. volatile Uint32 PRI_HINT_REG216;
  775. volatile Uint32 PRI_HINT_REG217;
  776. volatile Uint32 PRI_HINT_REG218;
  777. volatile Uint32 PRI_HINT_REG219;
  778. volatile Uint32 PRI_HINT_REG220;
  779. volatile Uint32 PRI_HINT_REG221;
  780. volatile Uint32 PRI_HINT_REG222;
  781. volatile Uint32 PRI_HINT_REG223;
  782. volatile Uint32 PRI_HINT_REG224;
  783. volatile Uint32 PRI_HINT_REG225;
  784. volatile Uint32 PRI_HINT_REG226;
  785. volatile Uint32 PRI_HINT_REG227;
  786. volatile Uint32 PRI_HINT_REG228;
  787. volatile Uint32 PRI_HINT_REG229;
  788. volatile Uint32 PRI_HINT_REG230;
  789. volatile Uint32 PRI_HINT_REG231;
  790. volatile Uint32 PRI_HINT_REG232;
  791. volatile Uint32 PRI_HINT_REG233;
  792. volatile Uint32 PRI_HINT_REG234;
  793. volatile Uint32 PRI_HINT_REG235;
  794. volatile Uint32 PRI_HINT_REG236;
  795. volatile Uint32 PRI_HINT_REG237;
  796. volatile Uint32 PRI_HINT_REG238;
  797. volatile Uint32 PRI_HINT_REG239;
  798. volatile Uint32 PRI_HINT_REG240;
  799. volatile Uint32 PRI_HINT_REG241;
  800. volatile Uint32 PRI_HINT_REG242;
  801. volatile Uint32 PRI_HINT_REG243;
  802. volatile Uint32 PRI_HINT_REG244;
  803. volatile Uint32 PRI_HINT_REG245;
  804. volatile Uint32 PRI_HINT_REG246;
  805. volatile Uint32 PRI_HINT_REG247;
  806. volatile Uint32 PRI_HINT_REG248;
  807. volatile Uint32 PRI_HINT_REG249;
  808. volatile Uint32 PRI_HINT_REG250;
  809. volatile Uint32 PRI_HINT_REG251;
  810. volatile Uint32 PRI_HINT_REG252;
  811. volatile Uint32 PRI_HINT_REG253;
  812. volatile Uint32 PRI_HINT_REG254;
  813. volatile Uint32 PRI_HINT_REG255;
  814. #else
  815. volatile Uint32 PRI_HINT_REG[256];
  816. #endif
  817. #ifdef CSL_MODIFICATION
  818. volatile Uint32 POLARITY_REG0;
  819. volatile Uint32 POLARITY_REG1;
  820. volatile Uint32 POLARITY_REG2;
  821. volatile Uint32 POLARITY_REG3;
  822. volatile Uint32 POLARITY_REG4;
  823. volatile Uint32 POLARITY_REG5;
  824. volatile Uint32 POLARITY_REG6;
  825. volatile Uint32 POLARITY_REG7;
  826. volatile Uint32 POLARITY_REG8;
  827. volatile Uint32 POLARITY_REG9;
  828. volatile Uint32 POLARITY_REG10;
  829. volatile Uint32 POLARITY_REG11;
  830. volatile Uint32 POLARITY_REG12;
  831. volatile Uint32 POLARITY_REG13;
  832. volatile Uint32 POLARITY_REG14;
  833. volatile Uint32 POLARITY_REG15;
  834. volatile Uint32 POLARITY_REG16;
  835. volatile Uint32 POLARITY_REG17;
  836. volatile Uint32 POLARITY_REG18;
  837. volatile Uint32 POLARITY_REG19;
  838. volatile Uint32 POLARITY_REG20;
  839. volatile Uint32 POLARITY_REG21;
  840. volatile Uint32 POLARITY_REG22;
  841. volatile Uint32 POLARITY_REG23;
  842. volatile Uint32 POLARITY_REG24;
  843. volatile Uint32 POLARITY_REG25;
  844. volatile Uint32 POLARITY_REG26;
  845. volatile Uint32 POLARITY_REG27;
  846. volatile Uint32 POLARITY_REG28;
  847. volatile Uint32 POLARITY_REG29;
  848. volatile Uint32 POLARITY_REG30;
  849. volatile Uint32 POLARITY_REG31;
  850. #else
  851. volatile Uint32 POLARITY_REG[32];
  852. #endif
  853. #ifdef CSL_MODIFICATION
  854. volatile Uint32 TYPE_REG0;
  855. volatile Uint32 TYPE_REG1;
  856. volatile Uint32 TYPE_REG2;
  857. volatile Uint32 TYPE_REG3;
  858. volatile Uint32 TYPE_REG4;
  859. volatile Uint32 TYPE_REG5;
  860. volatile Uint32 TYPE_REG6;
  861. volatile Uint32 TYPE_REG7;
  862. volatile Uint32 TYPE_REG8;
  863. volatile Uint32 TYPE_REG9;
  864. volatile Uint32 TYPE_REG10;
  865. volatile Uint32 TYPE_REG11;
  866. volatile Uint32 TYPE_REG12;
  867. volatile Uint32 TYPE_REG13;
  868. volatile Uint32 TYPE_REG14;
  869. volatile Uint32 TYPE_REG15;
  870. volatile Uint32 TYPE_REG16;
  871. volatile Uint32 TYPE_REG17;
  872. volatile Uint32 TYPE_REG18;
  873. volatile Uint32 TYPE_REG19;
  874. volatile Uint32 TYPE_REG20;
  875. volatile Uint32 TYPE_REG21;
  876. volatile Uint32 TYPE_REG22;
  877. volatile Uint32 TYPE_REG23;
  878. volatile Uint32 TYPE_REG24;
  879. volatile Uint32 TYPE_REG25;
  880. volatile Uint32 TYPE_REG26;
  881. volatile Uint32 TYPE_REG27;
  882. volatile Uint32 TYPE_REG28;
  883. volatile Uint32 TYPE_REG29;
  884. volatile Uint32 TYPE_REG30;
  885. volatile Uint32 TYPE_REG31;
  886. #else
  887. volatile Uint32 TYPE_REG[32];
  888. #endif
  889. volatile Uint8 RSVD7[256];
  890. #ifdef CSL_MODIFICATION
  891. volatile Uint32 DBG_SELECT_REG0;
  892. volatile Uint32 DBG_SELECT_REG1;
  893. volatile Uint32 DBG_SELECT_REG2;
  894. volatile Uint32 DBG_SELECT_REG3;
  895. volatile Uint32 DBG_SELECT_REG4;
  896. volatile Uint32 DBG_SELECT_REG5;
  897. volatile Uint32 DBG_SELECT_REG6;
  898. volatile Uint32 DBG_SELECT_REG7;
  899. volatile Uint32 DBG_SELECT_REG8;
  900. volatile Uint32 DBG_SELECT_REG9;
  901. volatile Uint32 DBG_SELECT_REG10;
  902. volatile Uint32 DBG_SELECT_REG11;
  903. volatile Uint32 DBG_SELECT_REG12;
  904. volatile Uint32 DBG_SELECT_REG13;
  905. volatile Uint32 DBG_SELECT_REG14;
  906. volatile Uint32 DBG_SELECT_REG15;
  907. volatile Uint32 DBG_SELECT_REG16;
  908. volatile Uint32 DBG_SELECT_REG17;
  909. volatile Uint32 DBG_SELECT_REG18;
  910. volatile Uint32 DBG_SELECT_REG19;
  911. volatile Uint32 DBG_SELECT_REG20;
  912. volatile Uint32 DBG_SELECT_REG21;
  913. volatile Uint32 DBG_SELECT_REG22;
  914. volatile Uint32 DBG_SELECT_REG23;
  915. volatile Uint32 DBG_SELECT_REG24;
  916. volatile Uint32 DBG_SELECT_REG25;
  917. volatile Uint32 DBG_SELECT_REG26;
  918. volatile Uint32 DBG_SELECT_REG27;
  919. volatile Uint32 DBG_SELECT_REG28;
  920. volatile Uint32 DBG_SELECT_REG29;
  921. volatile Uint32 DBG_SELECT_REG30;
  922. volatile Uint32 DBG_SELECT_REG31;
  923. volatile Uint32 DBG_SELECT_REG32;
  924. volatile Uint32 DBG_SELECT_REG33;
  925. volatile Uint32 DBG_SELECT_REG34;
  926. volatile Uint32 DBG_SELECT_REG35;
  927. volatile Uint32 DBG_SELECT_REG36;
  928. volatile Uint32 DBG_SELECT_REG37;
  929. volatile Uint32 DBG_SELECT_REG38;
  930. volatile Uint32 DBG_SELECT_REG39;
  931. volatile Uint32 DBG_SELECT_REG40;
  932. volatile Uint32 DBG_SELECT_REG41;
  933. volatile Uint32 DBG_SELECT_REG42;
  934. volatile Uint32 DBG_SELECT_REG43;
  935. volatile Uint32 DBG_SELECT_REG44;
  936. volatile Uint32 DBG_SELECT_REG45;
  937. volatile Uint32 DBG_SELECT_REG46;
  938. volatile Uint32 DBG_SELECT_REG47;
  939. volatile Uint32 DBG_SELECT_REG48;
  940. volatile Uint32 DBG_SELECT_REG49;
  941. volatile Uint32 DBG_SELECT_REG50;
  942. volatile Uint32 DBG_SELECT_REG51;
  943. volatile Uint32 DBG_SELECT_REG52;
  944. volatile Uint32 DBG_SELECT_REG53;
  945. volatile Uint32 DBG_SELECT_REG54;
  946. volatile Uint32 DBG_SELECT_REG55;
  947. volatile Uint32 DBG_SELECT_REG56;
  948. volatile Uint32 DBG_SELECT_REG57;
  949. volatile Uint32 DBG_SELECT_REG58;
  950. volatile Uint32 DBG_SELECT_REG59;
  951. volatile Uint32 DBG_SELECT_REG60;
  952. volatile Uint32 DBG_SELECT_REG61;
  953. volatile Uint32 DBG_SELECT_REG62;
  954. volatile Uint32 DBG_SELECT_REG63;
  955. #else
  956. volatile Uint32 DBG_SELECT_REG[64];
  957. #endif
  958. #ifdef CSL_MODIFICATION
  959. volatile Uint32 SECURE_ENABLE_REG0;
  960. volatile Uint32 SECURE_ENABLE_REG1;
  961. volatile Uint32 SECURE_ENABLE_REG2;
  962. volatile Uint32 SECURE_ENABLE_REG3;
  963. volatile Uint32 SECURE_ENABLE_REG4;
  964. volatile Uint32 SECURE_ENABLE_REG5;
  965. volatile Uint32 SECURE_ENABLE_REG6;
  966. volatile Uint32 SECURE_ENABLE_REG7;
  967. volatile Uint32 SECURE_ENABLE_REG8;
  968. volatile Uint32 SECURE_ENABLE_REG9;
  969. volatile Uint32 SECURE_ENABLE_REG10;
  970. volatile Uint32 SECURE_ENABLE_REG11;
  971. volatile Uint32 SECURE_ENABLE_REG12;
  972. volatile Uint32 SECURE_ENABLE_REG13;
  973. volatile Uint32 SECURE_ENABLE_REG14;
  974. volatile Uint32 SECURE_ENABLE_REG15;
  975. volatile Uint32 SECURE_ENABLE_REG16;
  976. volatile Uint32 SECURE_ENABLE_REG17;
  977. volatile Uint32 SECURE_ENABLE_REG18;
  978. volatile Uint32 SECURE_ENABLE_REG19;
  979. volatile Uint32 SECURE_ENABLE_REG20;
  980. volatile Uint32 SECURE_ENABLE_REG21;
  981. volatile Uint32 SECURE_ENABLE_REG22;
  982. volatile Uint32 SECURE_ENABLE_REG23;
  983. volatile Uint32 SECURE_ENABLE_REG24;
  984. volatile Uint32 SECURE_ENABLE_REG25;
  985. volatile Uint32 SECURE_ENABLE_REG26;
  986. volatile Uint32 SECURE_ENABLE_REG27;
  987. volatile Uint32 SECURE_ENABLE_REG28;
  988. volatile Uint32 SECURE_ENABLE_REG29;
  989. volatile Uint32 SECURE_ENABLE_REG30;
  990. volatile Uint32 SECURE_ENABLE_REG31;
  991. #else
  992. volatile Uint32 SECURE_ENABLE_REG[32];
  993. #endif
  994. #ifdef CSL_MODIFICATION
  995. volatile Uint32 SECURE_ENABLE_CLR_REG0;
  996. volatile Uint32 SECURE_ENABLE_CLR_REG1;
  997. volatile Uint32 SECURE_ENABLE_CLR_REG2;
  998. volatile Uint32 SECURE_ENABLE_CLR_REG3;
  999. volatile Uint32 SECURE_ENABLE_CLR_REG4;
  1000. volatile Uint32 SECURE_ENABLE_CLR_REG5;
  1001. volatile Uint32 SECURE_ENABLE_CLR_REG6;
  1002. volatile Uint32 SECURE_ENABLE_CLR_REG7;
  1003. volatile Uint32 SECURE_ENABLE_CLR_REG8;
  1004. volatile Uint32 SECURE_ENABLE_CLR_REG9;
  1005. volatile Uint32 SECURE_ENABLE_CLR_REG10;
  1006. volatile Uint32 SECURE_ENABLE_CLR_REG11;
  1007. volatile Uint32 SECURE_ENABLE_CLR_REG12;
  1008. volatile Uint32 SECURE_ENABLE_CLR_REG13;
  1009. volatile Uint32 SECURE_ENABLE_CLR_REG14;
  1010. volatile Uint32 SECURE_ENABLE_CLR_REG15;
  1011. volatile Uint32 SECURE_ENABLE_CLR_REG16;
  1012. volatile Uint32 SECURE_ENABLE_CLR_REG17;
  1013. volatile Uint32 SECURE_ENABLE_CLR_REG18;
  1014. volatile Uint32 SECURE_ENABLE_CLR_REG19;
  1015. volatile Uint32 SECURE_ENABLE_CLR_REG20;
  1016. volatile Uint32 SECURE_ENABLE_CLR_REG21;
  1017. volatile Uint32 SECURE_ENABLE_CLR_REG22;
  1018. volatile Uint32 SECURE_ENABLE_CLR_REG23;
  1019. volatile Uint32 SECURE_ENABLE_CLR_REG24;
  1020. volatile Uint32 SECURE_ENABLE_CLR_REG25;
  1021. volatile Uint32 SECURE_ENABLE_CLR_REG26;
  1022. volatile Uint32 SECURE_ENABLE_CLR_REG27;
  1023. volatile Uint32 SECURE_ENABLE_CLR_REG28;
  1024. volatile Uint32 SECURE_ENABLE_CLR_REG29;
  1025. volatile Uint32 SECURE_ENABLE_CLR_REG30;
  1026. volatile Uint32 SECURE_ENABLE_CLR_REG31;
  1027. #else
  1028. volatile Uint32 SECURE_ENABLE_CLR_REG[32];
  1029. #endif
  1030. #ifdef CSL_MODIFICATION
  1031. volatile Uint32 NEST_LEVEL_REG0;
  1032. volatile Uint32 NEST_LEVEL_REG1;
  1033. volatile Uint32 NEST_LEVEL_REG2;
  1034. volatile Uint32 NEST_LEVEL_REG3;
  1035. volatile Uint32 NEST_LEVEL_REG4;
  1036. volatile Uint32 NEST_LEVEL_REG5;
  1037. volatile Uint32 NEST_LEVEL_REG6;
  1038. volatile Uint32 NEST_LEVEL_REG7;
  1039. volatile Uint32 NEST_LEVEL_REG8;
  1040. volatile Uint32 NEST_LEVEL_REG9;
  1041. volatile Uint32 NEST_LEVEL_REG10;
  1042. volatile Uint32 NEST_LEVEL_REG11;
  1043. volatile Uint32 NEST_LEVEL_REG12;
  1044. volatile Uint32 NEST_LEVEL_REG13;
  1045. volatile Uint32 NEST_LEVEL_REG14;
  1046. volatile Uint32 NEST_LEVEL_REG15;
  1047. volatile Uint32 NEST_LEVEL_REG16;
  1048. volatile Uint32 NEST_LEVEL_REG17;
  1049. volatile Uint32 NEST_LEVEL_REG18;
  1050. volatile Uint32 NEST_LEVEL_REG19;
  1051. volatile Uint32 NEST_LEVEL_REG20;
  1052. volatile Uint32 NEST_LEVEL_REG21;
  1053. volatile Uint32 NEST_LEVEL_REG22;
  1054. volatile Uint32 NEST_LEVEL_REG23;
  1055. volatile Uint32 NEST_LEVEL_REG24;
  1056. volatile Uint32 NEST_LEVEL_REG25;
  1057. volatile Uint32 NEST_LEVEL_REG26;
  1058. volatile Uint32 NEST_LEVEL_REG27;
  1059. volatile Uint32 NEST_LEVEL_REG28;
  1060. volatile Uint32 NEST_LEVEL_REG29;
  1061. volatile Uint32 NEST_LEVEL_REG30;
  1062. volatile Uint32 NEST_LEVEL_REG31;
  1063. volatile Uint32 NEST_LEVEL_REG32;
  1064. volatile Uint32 NEST_LEVEL_REG33;
  1065. volatile Uint32 NEST_LEVEL_REG34;
  1066. volatile Uint32 NEST_LEVEL_REG35;
  1067. volatile Uint32 NEST_LEVEL_REG36;
  1068. volatile Uint32 NEST_LEVEL_REG37;
  1069. volatile Uint32 NEST_LEVEL_REG38;
  1070. volatile Uint32 NEST_LEVEL_REG39;
  1071. volatile Uint32 NEST_LEVEL_REG40;
  1072. volatile Uint32 NEST_LEVEL_REG41;
  1073. volatile Uint32 NEST_LEVEL_REG42;
  1074. volatile Uint32 NEST_LEVEL_REG43;
  1075. volatile Uint32 NEST_LEVEL_REG44;
  1076. volatile Uint32 NEST_LEVEL_REG45;
  1077. volatile Uint32 NEST_LEVEL_REG46;
  1078. volatile Uint32 NEST_LEVEL_REG47;
  1079. volatile Uint32 NEST_LEVEL_REG48;
  1080. volatile Uint32 NEST_LEVEL_REG49;
  1081. volatile Uint32 NEST_LEVEL_REG50;
  1082. volatile Uint32 NEST_LEVEL_REG51;
  1083. volatile Uint32 NEST_LEVEL_REG52;
  1084. volatile Uint32 NEST_LEVEL_REG53;
  1085. volatile Uint32 NEST_LEVEL_REG54;
  1086. volatile Uint32 NEST_LEVEL_REG55;
  1087. volatile Uint32 NEST_LEVEL_REG56;
  1088. volatile Uint32 NEST_LEVEL_REG57;
  1089. volatile Uint32 NEST_LEVEL_REG58;
  1090. volatile Uint32 NEST_LEVEL_REG59;
  1091. volatile Uint32 NEST_LEVEL_REG60;
  1092. volatile Uint32 NEST_LEVEL_REG61;
  1093. volatile Uint32 NEST_LEVEL_REG62;
  1094. volatile Uint32 NEST_LEVEL_REG63;
  1095. volatile Uint32 NEST_LEVEL_REG64;
  1096. volatile Uint32 NEST_LEVEL_REG65;
  1097. volatile Uint32 NEST_LEVEL_REG66;
  1098. volatile Uint32 NEST_LEVEL_REG67;
  1099. volatile Uint32 NEST_LEVEL_REG68;
  1100. volatile Uint32 NEST_LEVEL_REG69;
  1101. volatile Uint32 NEST_LEVEL_REG70;
  1102. volatile Uint32 NEST_LEVEL_REG71;
  1103. volatile Uint32 NEST_LEVEL_REG72;
  1104. volatile Uint32 NEST_LEVEL_REG73;
  1105. volatile Uint32 NEST_LEVEL_REG74;
  1106. volatile Uint32 NEST_LEVEL_REG75;
  1107. volatile Uint32 NEST_LEVEL_REG76;
  1108. volatile Uint32 NEST_LEVEL_REG77;
  1109. volatile Uint32 NEST_LEVEL_REG78;
  1110. volatile Uint32 NEST_LEVEL_REG79;
  1111. volatile Uint32 NEST_LEVEL_REG80;
  1112. volatile Uint32 NEST_LEVEL_REG81;
  1113. volatile Uint32 NEST_LEVEL_REG82;
  1114. volatile Uint32 NEST_LEVEL_REG83;
  1115. volatile Uint32 NEST_LEVEL_REG84;
  1116. volatile Uint32 NEST_LEVEL_REG85;
  1117. volatile Uint32 NEST_LEVEL_REG86;
  1118. volatile Uint32 NEST_LEVEL_REG87;
  1119. volatile Uint32 NEST_LEVEL_REG88;
  1120. volatile Uint32 NEST_LEVEL_REG89;
  1121. volatile Uint32 NEST_LEVEL_REG90;
  1122. volatile Uint32 NEST_LEVEL_REG91;
  1123. volatile Uint32 NEST_LEVEL_REG92;
  1124. volatile Uint32 NEST_LEVEL_REG93;
  1125. volatile Uint32 NEST_LEVEL_REG94;
  1126. volatile Uint32 NEST_LEVEL_REG95;
  1127. volatile Uint32 NEST_LEVEL_REG96;
  1128. volatile Uint32 NEST_LEVEL_REG97;
  1129. volatile Uint32 NEST_LEVEL_REG98;
  1130. volatile Uint32 NEST_LEVEL_REG99;
  1131. volatile Uint32 NEST_LEVEL_REG100;
  1132. volatile Uint32 NEST_LEVEL_REG101;
  1133. volatile Uint32 NEST_LEVEL_REG102;
  1134. volatile Uint32 NEST_LEVEL_REG103;
  1135. volatile Uint32 NEST_LEVEL_REG104;
  1136. volatile Uint32 NEST_LEVEL_REG105;
  1137. volatile Uint32 NEST_LEVEL_REG106;
  1138. volatile Uint32 NEST_LEVEL_REG107;
  1139. volatile Uint32 NEST_LEVEL_REG108;
  1140. volatile Uint32 NEST_LEVEL_REG109;
  1141. volatile Uint32 NEST_LEVEL_REG110;
  1142. volatile Uint32 NEST_LEVEL_REG111;
  1143. volatile Uint32 NEST_LEVEL_REG112;
  1144. volatile Uint32 NEST_LEVEL_REG113;
  1145. volatile Uint32 NEST_LEVEL_REG114;
  1146. volatile Uint32 NEST_LEVEL_REG115;
  1147. volatile Uint32 NEST_LEVEL_REG116;
  1148. volatile Uint32 NEST_LEVEL_REG117;
  1149. volatile Uint32 NEST_LEVEL_REG118;
  1150. volatile Uint32 NEST_LEVEL_REG119;
  1151. volatile Uint32 NEST_LEVEL_REG120;
  1152. volatile Uint32 NEST_LEVEL_REG121;
  1153. volatile Uint32 NEST_LEVEL_REG122;
  1154. volatile Uint32 NEST_LEVEL_REG123;
  1155. volatile Uint32 NEST_LEVEL_REG124;
  1156. volatile Uint32 NEST_LEVEL_REG125;
  1157. volatile Uint32 NEST_LEVEL_REG126;
  1158. volatile Uint32 NEST_LEVEL_REG127;
  1159. volatile Uint32 NEST_LEVEL_REG128;
  1160. volatile Uint32 NEST_LEVEL_REG129;
  1161. volatile Uint32 NEST_LEVEL_REG130;
  1162. volatile Uint32 NEST_LEVEL_REG131;
  1163. volatile Uint32 NEST_LEVEL_REG132;
  1164. volatile Uint32 NEST_LEVEL_REG133;
  1165. volatile Uint32 NEST_LEVEL_REG134;
  1166. volatile Uint32 NEST_LEVEL_REG135;
  1167. volatile Uint32 NEST_LEVEL_REG136;
  1168. volatile Uint32 NEST_LEVEL_REG137;
  1169. volatile Uint32 NEST_LEVEL_REG138;
  1170. volatile Uint32 NEST_LEVEL_REG139;
  1171. volatile Uint32 NEST_LEVEL_REG140;
  1172. volatile Uint32 NEST_LEVEL_REG141;
  1173. volatile Uint32 NEST_LEVEL_REG142;
  1174. volatile Uint32 NEST_LEVEL_REG143;
  1175. volatile Uint32 NEST_LEVEL_REG144;
  1176. volatile Uint32 NEST_LEVEL_REG145;
  1177. volatile Uint32 NEST_LEVEL_REG146;
  1178. volatile Uint32 NEST_LEVEL_REG147;
  1179. volatile Uint32 NEST_LEVEL_REG148;
  1180. volatile Uint32 NEST_LEVEL_REG149;
  1181. volatile Uint32 NEST_LEVEL_REG150;
  1182. volatile Uint32 NEST_LEVEL_REG151;
  1183. volatile Uint32 NEST_LEVEL_REG152;
  1184. volatile Uint32 NEST_LEVEL_REG153;
  1185. volatile Uint32 NEST_LEVEL_REG154;
  1186. volatile Uint32 NEST_LEVEL_REG155;
  1187. volatile Uint32 NEST_LEVEL_REG156;
  1188. volatile Uint32 NEST_LEVEL_REG157;
  1189. volatile Uint32 NEST_LEVEL_REG158;
  1190. volatile Uint32 NEST_LEVEL_REG159;
  1191. volatile Uint32 NEST_LEVEL_REG160;
  1192. volatile Uint32 NEST_LEVEL_REG161;
  1193. volatile Uint32 NEST_LEVEL_REG162;
  1194. volatile Uint32 NEST_LEVEL_REG163;
  1195. volatile Uint32 NEST_LEVEL_REG164;
  1196. volatile Uint32 NEST_LEVEL_REG165;
  1197. volatile Uint32 NEST_LEVEL_REG166;
  1198. volatile Uint32 NEST_LEVEL_REG167;
  1199. volatile Uint32 NEST_LEVEL_REG168;
  1200. volatile Uint32 NEST_LEVEL_REG169;
  1201. volatile Uint32 NEST_LEVEL_REG170;
  1202. volatile Uint32 NEST_LEVEL_REG171;
  1203. volatile Uint32 NEST_LEVEL_REG172;
  1204. volatile Uint32 NEST_LEVEL_REG173;
  1205. volatile Uint32 NEST_LEVEL_REG174;
  1206. volatile Uint32 NEST_LEVEL_REG175;
  1207. volatile Uint32 NEST_LEVEL_REG176;
  1208. volatile Uint32 NEST_LEVEL_REG177;
  1209. volatile Uint32 NEST_LEVEL_REG178;
  1210. volatile Uint32 NEST_LEVEL_REG179;
  1211. volatile Uint32 NEST_LEVEL_REG180;
  1212. volatile Uint32 NEST_LEVEL_REG181;
  1213. volatile Uint32 NEST_LEVEL_REG182;
  1214. volatile Uint32 NEST_LEVEL_REG183;
  1215. volatile Uint32 NEST_LEVEL_REG184;
  1216. volatile Uint32 NEST_LEVEL_REG185;
  1217. volatile Uint32 NEST_LEVEL_REG186;
  1218. volatile Uint32 NEST_LEVEL_REG187;
  1219. volatile Uint32 NEST_LEVEL_REG188;
  1220. volatile Uint32 NEST_LEVEL_REG189;
  1221. volatile Uint32 NEST_LEVEL_REG190;
  1222. volatile Uint32 NEST_LEVEL_REG191;
  1223. volatile Uint32 NEST_LEVEL_REG192;
  1224. volatile Uint32 NEST_LEVEL_REG193;
  1225. volatile Uint32 NEST_LEVEL_REG194;
  1226. volatile Uint32 NEST_LEVEL_REG195;
  1227. volatile Uint32 NEST_LEVEL_REG196;
  1228. volatile Uint32 NEST_LEVEL_REG197;
  1229. volatile Uint32 NEST_LEVEL_REG198;
  1230. volatile Uint32 NEST_LEVEL_REG199;
  1231. volatile Uint32 NEST_LEVEL_REG200;
  1232. volatile Uint32 NEST_LEVEL_REG201;
  1233. volatile Uint32 NEST_LEVEL_REG202;
  1234. volatile Uint32 NEST_LEVEL_REG203;
  1235. volatile Uint32 NEST_LEVEL_REG204;
  1236. volatile Uint32 NEST_LEVEL_REG205;
  1237. volatile Uint32 NEST_LEVEL_REG206;
  1238. volatile Uint32 NEST_LEVEL_REG207;
  1239. volatile Uint32 NEST_LEVEL_REG208;
  1240. volatile Uint32 NEST_LEVEL_REG209;
  1241. volatile Uint32 NEST_LEVEL_REG210;
  1242. volatile Uint32 NEST_LEVEL_REG211;
  1243. volatile Uint32 NEST_LEVEL_REG212;
  1244. volatile Uint32 NEST_LEVEL_REG213;
  1245. volatile Uint32 NEST_LEVEL_REG214;
  1246. volatile Uint32 NEST_LEVEL_REG215;
  1247. volatile Uint32 NEST_LEVEL_REG216;
  1248. volatile Uint32 NEST_LEVEL_REG217;
  1249. volatile Uint32 NEST_LEVEL_REG218;
  1250. volatile Uint32 NEST_LEVEL_REG219;
  1251. volatile Uint32 NEST_LEVEL_REG220;
  1252. volatile Uint32 NEST_LEVEL_REG221;
  1253. volatile Uint32 NEST_LEVEL_REG222;
  1254. volatile Uint32 NEST_LEVEL_REG223;
  1255. volatile Uint32 NEST_LEVEL_REG224;
  1256. volatile Uint32 NEST_LEVEL_REG225;
  1257. volatile Uint32 NEST_LEVEL_REG226;
  1258. volatile Uint32 NEST_LEVEL_REG227;
  1259. volatile Uint32 NEST_LEVEL_REG228;
  1260. volatile Uint32 NEST_LEVEL_REG229;
  1261. volatile Uint32 NEST_LEVEL_REG230;
  1262. volatile Uint32 NEST_LEVEL_REG231;
  1263. volatile Uint32 NEST_LEVEL_REG232;
  1264. volatile Uint32 NEST_LEVEL_REG233;
  1265. volatile Uint32 NEST_LEVEL_REG234;
  1266. volatile Uint32 NEST_LEVEL_REG235;
  1267. volatile Uint32 NEST_LEVEL_REG236;
  1268. volatile Uint32 NEST_LEVEL_REG237;
  1269. volatile Uint32 NEST_LEVEL_REG238;
  1270. volatile Uint32 NEST_LEVEL_REG239;
  1271. volatile Uint32 NEST_LEVEL_REG240;
  1272. volatile Uint32 NEST_LEVEL_REG241;
  1273. volatile Uint32 NEST_LEVEL_REG242;
  1274. volatile Uint32 NEST_LEVEL_REG243;
  1275. volatile Uint32 NEST_LEVEL_REG244;
  1276. volatile Uint32 NEST_LEVEL_REG245;
  1277. volatile Uint32 NEST_LEVEL_REG246;
  1278. volatile Uint32 NEST_LEVEL_REG247;
  1279. volatile Uint32 NEST_LEVEL_REG248;
  1280. volatile Uint32 NEST_LEVEL_REG249;
  1281. volatile Uint32 NEST_LEVEL_REG250;
  1282. volatile Uint32 NEST_LEVEL_REG251;
  1283. volatile Uint32 NEST_LEVEL_REG252;
  1284. volatile Uint32 NEST_LEVEL_REG253;
  1285. volatile Uint32 NEST_LEVEL_REG254;
  1286. volatile Uint32 NEST_LEVEL_REG255;
  1287. #else
  1288. volatile Uint32 NEST_LEVEL_REG[256];
  1289. #endif
  1290. #ifdef CSL_MODIFICATION
  1291. volatile Uint32 ENABLE_HINT_REG0;
  1292. volatile Uint32 ENABLE_HINT_REG1;
  1293. volatile Uint32 ENABLE_HINT_REG2;
  1294. volatile Uint32 ENABLE_HINT_REG3;
  1295. volatile Uint32 ENABLE_HINT_REG4;
  1296. volatile Uint32 ENABLE_HINT_REG5;
  1297. volatile Uint32 ENABLE_HINT_REG6;
  1298. volatile Uint32 ENABLE_HINT_REG7;
  1299. #else
  1300. volatile Uint32 ENABLE_HINT_REG[8];
  1301. #endif
  1302. volatile Uint8 RSVD8[2784];
  1303. #ifdef CSL_MODIFICATION
  1304. volatile Uint32 VECTOR_ADDRESS_REG_0;
  1305. volatile Uint32 VECTOR_ADDRESS_REG_1;
  1306. volatile Uint32 VECTOR_ADDRESS_REG_2;
  1307. volatile Uint32 VECTOR_ADDRESS_REG_3;
  1308. volatile Uint32 VECTOR_ADDRESS_REG_4;
  1309. volatile Uint32 VECTOR_ADDRESS_REG_5;
  1310. volatile Uint32 VECTOR_ADDRESS_REG_6;
  1311. volatile Uint32 VECTOR_ADDRESS_REG_7;
  1312. volatile Uint32 VECTOR_ADDRESS_REG_8;
  1313. volatile Uint32 VECTOR_ADDRESS_REG_9;
  1314. volatile Uint32 VECTOR_ADDRESS_REG_10;
  1315. volatile Uint32 VECTOR_ADDRESS_REG_11;
  1316. volatile Uint32 VECTOR_ADDRESS_REG_12;
  1317. volatile Uint32 VECTOR_ADDRESS_REG_13;
  1318. volatile Uint32 VECTOR_ADDRESS_REG_14;
  1319. volatile Uint32 VECTOR_ADDRESS_REG_15;
  1320. volatile Uint32 VECTOR_ADDRESS_REG_16;
  1321. volatile Uint32 VECTOR_ADDRESS_REG_17;
  1322. volatile Uint32 VECTOR_ADDRESS_REG_18;
  1323. volatile Uint32 VECTOR_ADDRESS_REG_19;
  1324. volatile Uint32 VECTOR_ADDRESS_REG_20;
  1325. volatile Uint32 VECTOR_ADDRESS_REG_21;
  1326. volatile Uint32 VECTOR_ADDRESS_REG_22;
  1327. volatile Uint32 VECTOR_ADDRESS_REG_23;
  1328. volatile Uint32 VECTOR_ADDRESS_REG_24;
  1329. volatile Uint32 VECTOR_ADDRESS_REG_25;
  1330. volatile Uint32 VECTOR_ADDRESS_REG_26;
  1331. volatile Uint32 VECTOR_ADDRESS_REG_27;
  1332. volatile Uint32 VECTOR_ADDRESS_REG_28;
  1333. volatile Uint32 VECTOR_ADDRESS_REG_29;
  1334. volatile Uint32 VECTOR_ADDRESS_REG_30;
  1335. volatile Uint32 VECTOR_ADDRESS_REG_31;
  1336. volatile Uint32 VECTOR_ADDRESS_REG_32;
  1337. volatile Uint32 VECTOR_ADDRESS_REG_33;
  1338. volatile Uint32 VECTOR_ADDRESS_REG_34;
  1339. volatile Uint32 VECTOR_ADDRESS_REG_35;
  1340. volatile Uint32 VECTOR_ADDRESS_REG_36;
  1341. volatile Uint32 VECTOR_ADDRESS_REG_37;
  1342. volatile Uint32 VECTOR_ADDRESS_REG_38;
  1343. volatile Uint32 VECTOR_ADDRESS_REG_39;
  1344. volatile Uint32 VECTOR_ADDRESS_REG_40;
  1345. volatile Uint32 VECTOR_ADDRESS_REG_41;
  1346. volatile Uint32 VECTOR_ADDRESS_REG_42;
  1347. volatile Uint32 VECTOR_ADDRESS_REG_43;
  1348. volatile Uint32 VECTOR_ADDRESS_REG_44;
  1349. volatile Uint32 VECTOR_ADDRESS_REG_45;
  1350. volatile Uint32 VECTOR_ADDRESS_REG_46;
  1351. volatile Uint32 VECTOR_ADDRESS_REG_47;
  1352. volatile Uint32 VECTOR_ADDRESS_REG_48;
  1353. volatile Uint32 VECTOR_ADDRESS_REG_49;
  1354. volatile Uint32 VECTOR_ADDRESS_REG_50;
  1355. volatile Uint32 VECTOR_ADDRESS_REG_51;
  1356. volatile Uint32 VECTOR_ADDRESS_REG_52;
  1357. volatile Uint32 VECTOR_ADDRESS_REG_53;
  1358. volatile Uint32 VECTOR_ADDRESS_REG_54;
  1359. volatile Uint32 VECTOR_ADDRESS_REG_55;
  1360. volatile Uint32 VECTOR_ADDRESS_REG_56;
  1361. volatile Uint32 VECTOR_ADDRESS_REG_57;
  1362. volatile Uint32 VECTOR_ADDRESS_REG_58;
  1363. volatile Uint32 VECTOR_ADDRESS_REG_59;
  1364. volatile Uint32 VECTOR_ADDRESS_REG_60;
  1365. volatile Uint32 VECTOR_ADDRESS_REG_61;
  1366. volatile Uint32 VECTOR_ADDRESS_REG_62;
  1367. volatile Uint32 VECTOR_ADDRESS_REG_63;
  1368. volatile Uint32 VECTOR_ADDRESS_REG_64;
  1369. volatile Uint32 VECTOR_ADDRESS_REG_65;
  1370. volatile Uint32 VECTOR_ADDRESS_REG_66;
  1371. volatile Uint32 VECTOR_ADDRESS_REG_67;
  1372. volatile Uint32 VECTOR_ADDRESS_REG_68;
  1373. volatile Uint32 VECTOR_ADDRESS_REG_69;
  1374. volatile Uint32 VECTOR_ADDRESS_REG_70;
  1375. volatile Uint32 VECTOR_ADDRESS_REG_71;
  1376. volatile Uint32 VECTOR_ADDRESS_REG_72;
  1377. volatile Uint32 VECTOR_ADDRESS_REG_73;
  1378. volatile Uint32 VECTOR_ADDRESS_REG_74;
  1379. volatile Uint32 VECTOR_ADDRESS_REG_75;
  1380. volatile Uint32 VECTOR_ADDRESS_REG_76;
  1381. volatile Uint32 VECTOR_ADDRESS_REG_77;
  1382. volatile Uint32 VECTOR_ADDRESS_REG_78;
  1383. volatile Uint32 VECTOR_ADDRESS_REG_79;
  1384. volatile Uint32 VECTOR_ADDRESS_REG_80;
  1385. volatile Uint32 VECTOR_ADDRESS_REG_81;
  1386. volatile Uint32 VECTOR_ADDRESS_REG_82;
  1387. volatile Uint32 VECTOR_ADDRESS_REG_83;
  1388. volatile Uint32 VECTOR_ADDRESS_REG_84;
  1389. volatile Uint32 VECTOR_ADDRESS_REG_85;
  1390. volatile Uint32 VECTOR_ADDRESS_REG_86;
  1391. volatile Uint32 VECTOR_ADDRESS_REG_87;
  1392. volatile Uint32 VECTOR_ADDRESS_REG_88;
  1393. volatile Uint32 VECTOR_ADDRESS_REG_89;
  1394. volatile Uint32 VECTOR_ADDRESS_REG_90;
  1395. volatile Uint32 VECTOR_ADDRESS_REG_91;
  1396. volatile Uint32 VECTOR_ADDRESS_REG_92;
  1397. volatile Uint32 VECTOR_ADDRESS_REG_93;
  1398. volatile Uint32 VECTOR_ADDRESS_REG_94;
  1399. volatile Uint32 VECTOR_ADDRESS_REG_95;
  1400. volatile Uint32 VECTOR_ADDRESS_REG_96;
  1401. volatile Uint32 VECTOR_ADDRESS_REG_97;
  1402. volatile Uint32 VECTOR_ADDRESS_REG_98;
  1403. volatile Uint32 VECTOR_ADDRESS_REG_99;
  1404. volatile Uint32 VECTOR_ADDRESS_REG_100;
  1405. volatile Uint32 VECTOR_ADDRESS_REG_101;
  1406. volatile Uint32 VECTOR_ADDRESS_REG_102;
  1407. volatile Uint32 VECTOR_ADDRESS_REG_103;
  1408. volatile Uint32 VECTOR_ADDRESS_REG_104;
  1409. volatile Uint32 VECTOR_ADDRESS_REG_105;
  1410. volatile Uint32 VECTOR_ADDRESS_REG_106;
  1411. volatile Uint32 VECTOR_ADDRESS_REG_107;
  1412. volatile Uint32 VECTOR_ADDRESS_REG_108;
  1413. volatile Uint32 VECTOR_ADDRESS_REG_109;
  1414. volatile Uint32 VECTOR_ADDRESS_REG_110;
  1415. volatile Uint32 VECTOR_ADDRESS_REG_111;
  1416. volatile Uint32 VECTOR_ADDRESS_REG_112;
  1417. volatile Uint32 VECTOR_ADDRESS_REG_113;
  1418. volatile Uint32 VECTOR_ADDRESS_REG_114;
  1419. volatile Uint32 VECTOR_ADDRESS_REG_115;
  1420. volatile Uint32 VECTOR_ADDRESS_REG_116;
  1421. volatile Uint32 VECTOR_ADDRESS_REG_117;
  1422. volatile Uint32 VECTOR_ADDRESS_REG_118;
  1423. volatile Uint32 VECTOR_ADDRESS_REG_119;
  1424. volatile Uint32 VECTOR_ADDRESS_REG_120;
  1425. volatile Uint32 VECTOR_ADDRESS_REG_121;
  1426. volatile Uint32 VECTOR_ADDRESS_REG_122;
  1427. volatile Uint32 VECTOR_ADDRESS_REG_123;
  1428. volatile Uint32 VECTOR_ADDRESS_REG_124;
  1429. volatile Uint32 VECTOR_ADDRESS_REG_125;
  1430. volatile Uint32 VECTOR_ADDRESS_REG_126;
  1431. volatile Uint32 VECTOR_ADDRESS_REG_127;
  1432. volatile Uint32 VECTOR_ADDRESS_REG_128;
  1433. volatile Uint32 VECTOR_ADDRESS_REG_129;
  1434. volatile Uint32 VECTOR_ADDRESS_REG_130;
  1435. volatile Uint32 VECTOR_ADDRESS_REG_131;
  1436. volatile Uint32 VECTOR_ADDRESS_REG_132;
  1437. volatile Uint32 VECTOR_ADDRESS_REG_133;
  1438. volatile Uint32 VECTOR_ADDRESS_REG_134;
  1439. volatile Uint32 VECTOR_ADDRESS_REG_135;
  1440. volatile Uint32 VECTOR_ADDRESS_REG_136;
  1441. volatile Uint32 VECTOR_ADDRESS_REG_137;
  1442. volatile Uint32 VECTOR_ADDRESS_REG_138;
  1443. volatile Uint32 VECTOR_ADDRESS_REG_139;
  1444. volatile Uint32 VECTOR_ADDRESS_REG_140;
  1445. volatile Uint32 VECTOR_ADDRESS_REG_141;
  1446. volatile Uint32 VECTOR_ADDRESS_REG_142;
  1447. volatile Uint32 VECTOR_ADDRESS_REG_143;
  1448. volatile Uint32 VECTOR_ADDRESS_REG_144;
  1449. volatile Uint32 VECTOR_ADDRESS_REG_145;
  1450. volatile Uint32 VECTOR_ADDRESS_REG_146;
  1451. volatile Uint32 VECTOR_ADDRESS_REG_147;
  1452. volatile Uint32 VECTOR_ADDRESS_REG_148;
  1453. volatile Uint32 VECTOR_ADDRESS_REG_149;
  1454. volatile Uint32 VECTOR_ADDRESS_REG_150;
  1455. volatile Uint32 VECTOR_ADDRESS_REG_151;
  1456. volatile Uint32 VECTOR_ADDRESS_REG_152;
  1457. volatile Uint32 VECTOR_ADDRESS_REG_153;
  1458. volatile Uint32 VECTOR_ADDRESS_REG_154;
  1459. volatile Uint32 VECTOR_ADDRESS_REG_155;
  1460. volatile Uint32 VECTOR_ADDRESS_REG_156;
  1461. volatile Uint32 VECTOR_ADDRESS_REG_157;
  1462. volatile Uint32 VECTOR_ADDRESS_REG_158;
  1463. volatile Uint32 VECTOR_ADDRESS_REG_159;
  1464. volatile Uint32 VECTOR_ADDRESS_REG_160;
  1465. volatile Uint32 VECTOR_ADDRESS_REG_161;
  1466. volatile Uint32 VECTOR_ADDRESS_REG_162;
  1467. volatile Uint32 VECTOR_ADDRESS_REG_163;
  1468. volatile Uint32 VECTOR_ADDRESS_REG_164;
  1469. volatile Uint32 VECTOR_ADDRESS_REG_165;
  1470. volatile Uint32 VECTOR_ADDRESS_REG_166;
  1471. volatile Uint32 VECTOR_ADDRESS_REG_167;
  1472. volatile Uint32 VECTOR_ADDRESS_REG_168;
  1473. volatile Uint32 VECTOR_ADDRESS_REG_169;
  1474. volatile Uint32 VECTOR_ADDRESS_REG_170;
  1475. volatile Uint32 VECTOR_ADDRESS_REG_171;
  1476. volatile Uint32 VECTOR_ADDRESS_REG_172;
  1477. volatile Uint32 VECTOR_ADDRESS_REG_173;
  1478. volatile Uint32 VECTOR_ADDRESS_REG_174;
  1479. volatile Uint32 VECTOR_ADDRESS_REG_175;
  1480. volatile Uint32 VECTOR_ADDRESS_REG_176;
  1481. volatile Uint32 VECTOR_ADDRESS_REG_177;
  1482. volatile Uint32 VECTOR_ADDRESS_REG_178;
  1483. volatile Uint32 VECTOR_ADDRESS_REG_179;
  1484. volatile Uint32 VECTOR_ADDRESS_REG_180;
  1485. volatile Uint32 VECTOR_ADDRESS_REG_181;
  1486. volatile Uint32 VECTOR_ADDRESS_REG_182;
  1487. volatile Uint32 VECTOR_ADDRESS_REG_183;
  1488. volatile Uint32 VECTOR_ADDRESS_REG_184;
  1489. volatile Uint32 VECTOR_ADDRESS_REG_185;
  1490. volatile Uint32 VECTOR_ADDRESS_REG_186;
  1491. volatile Uint32 VECTOR_ADDRESS_REG_187;
  1492. volatile Uint32 VECTOR_ADDRESS_REG_188;
  1493. volatile Uint32 VECTOR_ADDRESS_REG_189;
  1494. volatile Uint32 VECTOR_ADDRESS_REG_190;
  1495. volatile Uint32 VECTOR_ADDRESS_REG_191;
  1496. volatile Uint32 VECTOR_ADDRESS_REG_192;
  1497. volatile Uint32 VECTOR_ADDRESS_REG_193;
  1498. volatile Uint32 VECTOR_ADDRESS_REG_194;
  1499. volatile Uint32 VECTOR_ADDRESS_REG_195;
  1500. volatile Uint32 VECTOR_ADDRESS_REG_196;
  1501. volatile Uint32 VECTOR_ADDRESS_REG_197;
  1502. volatile Uint32 VECTOR_ADDRESS_REG_198;
  1503. volatile Uint32 VECTOR_ADDRESS_REG_199;
  1504. volatile Uint32 VECTOR_ADDRESS_REG_200;
  1505. volatile Uint32 VECTOR_ADDRESS_REG_201;
  1506. volatile Uint32 VECTOR_ADDRESS_REG_202;
  1507. volatile Uint32 VECTOR_ADDRESS_REG_203;
  1508. volatile Uint32 VECTOR_ADDRESS_REG_204;
  1509. volatile Uint32 VECTOR_ADDRESS_REG_205;
  1510. volatile Uint32 VECTOR_ADDRESS_REG_206;
  1511. volatile Uint32 VECTOR_ADDRESS_REG_207;
  1512. volatile Uint32 VECTOR_ADDRESS_REG_208;
  1513. volatile Uint32 VECTOR_ADDRESS_REG_209;
  1514. volatile Uint32 VECTOR_ADDRESS_REG_210;
  1515. volatile Uint32 VECTOR_ADDRESS_REG_211;
  1516. volatile Uint32 VECTOR_ADDRESS_REG_212;
  1517. volatile Uint32 VECTOR_ADDRESS_REG_213;
  1518. volatile Uint32 VECTOR_ADDRESS_REG_214;
  1519. volatile Uint32 VECTOR_ADDRESS_REG_215;
  1520. volatile Uint32 VECTOR_ADDRESS_REG_216;
  1521. volatile Uint32 VECTOR_ADDRESS_REG_217;
  1522. volatile Uint32 VECTOR_ADDRESS_REG_218;
  1523. volatile Uint32 VECTOR_ADDRESS_REG_219;
  1524. volatile Uint32 VECTOR_ADDRESS_REG_220;
  1525. volatile Uint32 VECTOR_ADDRESS_REG_221;
  1526. volatile Uint32 VECTOR_ADDRESS_REG_222;
  1527. volatile Uint32 VECTOR_ADDRESS_REG_223;
  1528. volatile Uint32 VECTOR_ADDRESS_REG_224;
  1529. volatile Uint32 VECTOR_ADDRESS_REG_225;
  1530. volatile Uint32 VECTOR_ADDRESS_REG_226;
  1531. volatile Uint32 VECTOR_ADDRESS_REG_227;
  1532. volatile Uint32 VECTOR_ADDRESS_REG_228;
  1533. volatile Uint32 VECTOR_ADDRESS_REG_229;
  1534. volatile Uint32 VECTOR_ADDRESS_REG_230;
  1535. volatile Uint32 VECTOR_ADDRESS_REG_231;
  1536. volatile Uint32 VECTOR_ADDRESS_REG_232;
  1537. volatile Uint32 VECTOR_ADDRESS_REG_233;
  1538. volatile Uint32 VECTOR_ADDRESS_REG_234;
  1539. volatile Uint32 VECTOR_ADDRESS_REG_235;
  1540. volatile Uint32 VECTOR_ADDRESS_REG_236;
  1541. volatile Uint32 VECTOR_ADDRESS_REG_237;
  1542. volatile Uint32 VECTOR_ADDRESS_REG_238;
  1543. volatile Uint32 VECTOR_ADDRESS_REG_239;
  1544. volatile Uint32 VECTOR_ADDRESS_REG_240;
  1545. volatile Uint32 VECTOR_ADDRESS_REG_241;
  1546. volatile Uint32 VECTOR_ADDRESS_REG_242;
  1547. volatile Uint32 VECTOR_ADDRESS_REG_243;
  1548. volatile Uint32 VECTOR_ADDRESS_REG_244;
  1549. volatile Uint32 VECTOR_ADDRESS_REG_245;
  1550. volatile Uint32 VECTOR_ADDRESS_REG_246;
  1551. volatile Uint32 VECTOR_ADDRESS_REG_247;
  1552. volatile Uint32 VECTOR_ADDRESS_REG_248;
  1553. volatile Uint32 VECTOR_ADDRESS_REG_249;
  1554. volatile Uint32 VECTOR_ADDRESS_REG_250;
  1555. volatile Uint32 VECTOR_ADDRESS_REG_251;
  1556. volatile Uint32 VECTOR_ADDRESS_REG_252;
  1557. volatile Uint32 VECTOR_ADDRESS_REG_253;
  1558. volatile Uint32 VECTOR_ADDRESS_REG_254;
  1559. volatile Uint32 VECTOR_ADDRESS_REG_255;
  1560. volatile Uint32 VECTOR_ADDRESS_REG_256;
  1561. volatile Uint32 VECTOR_ADDRESS_REG_257;
  1562. volatile Uint32 VECTOR_ADDRESS_REG_258;
  1563. volatile Uint32 VECTOR_ADDRESS_REG_259;
  1564. volatile Uint32 VECTOR_ADDRESS_REG_260;
  1565. volatile Uint32 VECTOR_ADDRESS_REG_261;
  1566. volatile Uint32 VECTOR_ADDRESS_REG_262;
  1567. volatile Uint32 VECTOR_ADDRESS_REG_263;
  1568. volatile Uint32 VECTOR_ADDRESS_REG_264;
  1569. volatile Uint32 VECTOR_ADDRESS_REG_265;
  1570. volatile Uint32 VECTOR_ADDRESS_REG_266;
  1571. volatile Uint32 VECTOR_ADDRESS_REG_267;
  1572. volatile Uint32 VECTOR_ADDRESS_REG_268;
  1573. volatile Uint32 VECTOR_ADDRESS_REG_269;
  1574. volatile Uint32 VECTOR_ADDRESS_REG_270;
  1575. volatile Uint32 VECTOR_ADDRESS_REG_271;
  1576. volatile Uint32 VECTOR_ADDRESS_REG_272;
  1577. volatile Uint32 VECTOR_ADDRESS_REG_273;
  1578. volatile Uint32 VECTOR_ADDRESS_REG_274;
  1579. volatile Uint32 VECTOR_ADDRESS_REG_275;
  1580. volatile Uint32 VECTOR_ADDRESS_REG_276;
  1581. volatile Uint32 VECTOR_ADDRESS_REG_277;
  1582. volatile Uint32 VECTOR_ADDRESS_REG_278;
  1583. volatile Uint32 VECTOR_ADDRESS_REG_279;
  1584. volatile Uint32 VECTOR_ADDRESS_REG_280;
  1585. volatile Uint32 VECTOR_ADDRESS_REG_281;
  1586. volatile Uint32 VECTOR_ADDRESS_REG_282;
  1587. volatile Uint32 VECTOR_ADDRESS_REG_283;
  1588. volatile Uint32 VECTOR_ADDRESS_REG_284;
  1589. volatile Uint32 VECTOR_ADDRESS_REG_285;
  1590. volatile Uint32 VECTOR_ADDRESS_REG_286;
  1591. volatile Uint32 VECTOR_ADDRESS_REG_287;
  1592. volatile Uint32 VECTOR_ADDRESS_REG_288;
  1593. volatile Uint32 VECTOR_ADDRESS_REG_289;
  1594. volatile Uint32 VECTOR_ADDRESS_REG_290;
  1595. volatile Uint32 VECTOR_ADDRESS_REG_291;
  1596. volatile Uint32 VECTOR_ADDRESS_REG_292;
  1597. volatile Uint32 VECTOR_ADDRESS_REG_293;
  1598. volatile Uint32 VECTOR_ADDRESS_REG_294;
  1599. volatile Uint32 VECTOR_ADDRESS_REG_295;
  1600. volatile Uint32 VECTOR_ADDRESS_REG_296;
  1601. volatile Uint32 VECTOR_ADDRESS_REG_297;
  1602. volatile Uint32 VECTOR_ADDRESS_REG_298;
  1603. volatile Uint32 VECTOR_ADDRESS_REG_299;
  1604. volatile Uint32 VECTOR_ADDRESS_REG_300;
  1605. volatile Uint32 VECTOR_ADDRESS_REG_301;
  1606. volatile Uint32 VECTOR_ADDRESS_REG_302;
  1607. volatile Uint32 VECTOR_ADDRESS_REG_303;
  1608. volatile Uint32 VECTOR_ADDRESS_REG_304;
  1609. volatile Uint32 VECTOR_ADDRESS_REG_305;
  1610. volatile Uint32 VECTOR_ADDRESS_REG_306;
  1611. volatile Uint32 VECTOR_ADDRESS_REG_307;
  1612. volatile Uint32 VECTOR_ADDRESS_REG_308;
  1613. volatile Uint32 VECTOR_ADDRESS_REG_309;
  1614. volatile Uint32 VECTOR_ADDRESS_REG_310;
  1615. volatile Uint32 VECTOR_ADDRESS_REG_311;
  1616. volatile Uint32 VECTOR_ADDRESS_REG_312;
  1617. volatile Uint32 VECTOR_ADDRESS_REG_313;
  1618. volatile Uint32 VECTOR_ADDRESS_REG_314;
  1619. volatile Uint32 VECTOR_ADDRESS_REG_315;
  1620. volatile Uint32 VECTOR_ADDRESS_REG_316;
  1621. volatile Uint32 VECTOR_ADDRESS_REG_317;
  1622. volatile Uint32 VECTOR_ADDRESS_REG_318;
  1623. volatile Uint32 VECTOR_ADDRESS_REG_319;
  1624. volatile Uint32 VECTOR_ADDRESS_REG_320;
  1625. volatile Uint32 VECTOR_ADDRESS_REG_321;
  1626. volatile Uint32 VECTOR_ADDRESS_REG_322;
  1627. volatile Uint32 VECTOR_ADDRESS_REG_323;
  1628. volatile Uint32 VECTOR_ADDRESS_REG_324;
  1629. volatile Uint32 VECTOR_ADDRESS_REG_325;
  1630. volatile Uint32 VECTOR_ADDRESS_REG_326;
  1631. volatile Uint32 VECTOR_ADDRESS_REG_327;
  1632. volatile Uint32 VECTOR_ADDRESS_REG_328;
  1633. volatile Uint32 VECTOR_ADDRESS_REG_329;
  1634. volatile Uint32 VECTOR_ADDRESS_REG_330;
  1635. volatile Uint32 VECTOR_ADDRESS_REG_331;
  1636. volatile Uint32 VECTOR_ADDRESS_REG_332;
  1637. volatile Uint32 VECTOR_ADDRESS_REG_333;
  1638. volatile Uint32 VECTOR_ADDRESS_REG_334;
  1639. volatile Uint32 VECTOR_ADDRESS_REG_335;
  1640. volatile Uint32 VECTOR_ADDRESS_REG_336;
  1641. volatile Uint32 VECTOR_ADDRESS_REG_337;
  1642. volatile Uint32 VECTOR_ADDRESS_REG_338;
  1643. volatile Uint32 VECTOR_ADDRESS_REG_339;
  1644. volatile Uint32 VECTOR_ADDRESS_REG_340;
  1645. volatile Uint32 VECTOR_ADDRESS_REG_341;
  1646. volatile Uint32 VECTOR_ADDRESS_REG_342;
  1647. volatile Uint32 VECTOR_ADDRESS_REG_343;
  1648. volatile Uint32 VECTOR_ADDRESS_REG_344;
  1649. volatile Uint32 VECTOR_ADDRESS_REG_345;
  1650. volatile Uint32 VECTOR_ADDRESS_REG_346;
  1651. volatile Uint32 VECTOR_ADDRESS_REG_347;
  1652. volatile Uint32 VECTOR_ADDRESS_REG_348;
  1653. volatile Uint32 VECTOR_ADDRESS_REG_349;
  1654. volatile Uint32 VECTOR_ADDRESS_REG_350;
  1655. volatile Uint32 VECTOR_ADDRESS_REG_351;
  1656. volatile Uint32 VECTOR_ADDRESS_REG_352;
  1657. volatile Uint32 VECTOR_ADDRESS_REG_353;
  1658. volatile Uint32 VECTOR_ADDRESS_REG_354;
  1659. volatile Uint32 VECTOR_ADDRESS_REG_355;
  1660. volatile Uint32 VECTOR_ADDRESS_REG_356;
  1661. volatile Uint32 VECTOR_ADDRESS_REG_357;
  1662. volatile Uint32 VECTOR_ADDRESS_REG_358;
  1663. volatile Uint32 VECTOR_ADDRESS_REG_359;
  1664. volatile Uint32 VECTOR_ADDRESS_REG_360;
  1665. volatile Uint32 VECTOR_ADDRESS_REG_361;
  1666. volatile Uint32 VECTOR_ADDRESS_REG_362;
  1667. volatile Uint32 VECTOR_ADDRESS_REG_363;
  1668. volatile Uint32 VECTOR_ADDRESS_REG_364;
  1669. volatile Uint32 VECTOR_ADDRESS_REG_365;
  1670. volatile Uint32 VECTOR_ADDRESS_REG_366;
  1671. volatile Uint32 VECTOR_ADDRESS_REG_367;
  1672. volatile Uint32 VECTOR_ADDRESS_REG_368;
  1673. volatile Uint32 VECTOR_ADDRESS_REG_369;
  1674. volatile Uint32 VECTOR_ADDRESS_REG_370;
  1675. volatile Uint32 VECTOR_ADDRESS_REG_371;
  1676. volatile Uint32 VECTOR_ADDRESS_REG_372;
  1677. volatile Uint32 VECTOR_ADDRESS_REG_373;
  1678. volatile Uint32 VECTOR_ADDRESS_REG_374;
  1679. volatile Uint32 VECTOR_ADDRESS_REG_375;
  1680. volatile Uint32 VECTOR_ADDRESS_REG_376;
  1681. volatile Uint32 VECTOR_ADDRESS_REG_377;
  1682. volatile Uint32 VECTOR_ADDRESS_REG_378;
  1683. volatile Uint32 VECTOR_ADDRESS_REG_379;
  1684. volatile Uint32 VECTOR_ADDRESS_REG_380;
  1685. volatile Uint32 VECTOR_ADDRESS_REG_381;
  1686. volatile Uint32 VECTOR_ADDRESS_REG_382;
  1687. volatile Uint32 VECTOR_ADDRESS_REG_383;
  1688. volatile Uint32 VECTOR_ADDRESS_REG_384;
  1689. volatile Uint32 VECTOR_ADDRESS_REG_385;
  1690. volatile Uint32 VECTOR_ADDRESS_REG_386;
  1691. volatile Uint32 VECTOR_ADDRESS_REG_387;
  1692. volatile Uint32 VECTOR_ADDRESS_REG_388;
  1693. volatile Uint32 VECTOR_ADDRESS_REG_389;
  1694. volatile Uint32 VECTOR_ADDRESS_REG_390;
  1695. volatile Uint32 VECTOR_ADDRESS_REG_391;
  1696. volatile Uint32 VECTOR_ADDRESS_REG_392;
  1697. volatile Uint32 VECTOR_ADDRESS_REG_393;
  1698. volatile Uint32 VECTOR_ADDRESS_REG_394;
  1699. volatile Uint32 VECTOR_ADDRESS_REG_395;
  1700. volatile Uint32 VECTOR_ADDRESS_REG_396;
  1701. volatile Uint32 VECTOR_ADDRESS_REG_397;
  1702. volatile Uint32 VECTOR_ADDRESS_REG_398;
  1703. volatile Uint32 VECTOR_ADDRESS_REG_399;
  1704. volatile Uint32 VECTOR_ADDRESS_REG_400;
  1705. volatile Uint32 VECTOR_ADDRESS_REG_401;
  1706. volatile Uint32 VECTOR_ADDRESS_REG_402;
  1707. volatile Uint32 VECTOR_ADDRESS_REG_403;
  1708. volatile Uint32 VECTOR_ADDRESS_REG_404;
  1709. volatile Uint32 VECTOR_ADDRESS_REG_405;
  1710. volatile Uint32 VECTOR_ADDRESS_REG_406;
  1711. volatile Uint32 VECTOR_ADDRESS_REG_407;
  1712. volatile Uint32 VECTOR_ADDRESS_REG_408;
  1713. volatile Uint32 VECTOR_ADDRESS_REG_409;
  1714. volatile Uint32 VECTOR_ADDRESS_REG_410;
  1715. volatile Uint32 VECTOR_ADDRESS_REG_411;
  1716. volatile Uint32 VECTOR_ADDRESS_REG_412;
  1717. volatile Uint32 VECTOR_ADDRESS_REG_413;
  1718. volatile Uint32 VECTOR_ADDRESS_REG_414;
  1719. volatile Uint32 VECTOR_ADDRESS_REG_415;
  1720. volatile Uint32 VECTOR_ADDRESS_REG_416;
  1721. volatile Uint32 VECTOR_ADDRESS_REG_417;
  1722. volatile Uint32 VECTOR_ADDRESS_REG_418;
  1723. volatile Uint32 VECTOR_ADDRESS_REG_419;
  1724. volatile Uint32 VECTOR_ADDRESS_REG_420;
  1725. volatile Uint32 VECTOR_ADDRESS_REG_421;
  1726. volatile Uint32 VECTOR_ADDRESS_REG_422;
  1727. volatile Uint32 VECTOR_ADDRESS_REG_423;
  1728. volatile Uint32 VECTOR_ADDRESS_REG_424;
  1729. volatile Uint32 VECTOR_ADDRESS_REG_425;
  1730. volatile Uint32 VECTOR_ADDRESS_REG_426;
  1731. volatile Uint32 VECTOR_ADDRESS_REG_427;
  1732. volatile Uint32 VECTOR_ADDRESS_REG_428;
  1733. volatile Uint32 VECTOR_ADDRESS_REG_429;
  1734. volatile Uint32 VECTOR_ADDRESS_REG_430;
  1735. volatile Uint32 VECTOR_ADDRESS_REG_431;
  1736. volatile Uint32 VECTOR_ADDRESS_REG_432;
  1737. volatile Uint32 VECTOR_ADDRESS_REG_433;
  1738. volatile Uint32 VECTOR_ADDRESS_REG_434;
  1739. volatile Uint32 VECTOR_ADDRESS_REG_435;
  1740. volatile Uint32 VECTOR_ADDRESS_REG_436;
  1741. volatile Uint32 VECTOR_ADDRESS_REG_437;
  1742. volatile Uint32 VECTOR_ADDRESS_REG_438;
  1743. volatile Uint32 VECTOR_ADDRESS_REG_439;
  1744. volatile Uint32 VECTOR_ADDRESS_REG_440;
  1745. volatile Uint32 VECTOR_ADDRESS_REG_441;
  1746. volatile Uint32 VECTOR_ADDRESS_REG_442;
  1747. volatile Uint32 VECTOR_ADDRESS_REG_443;
  1748. volatile Uint32 VECTOR_ADDRESS_REG_444;
  1749. volatile Uint32 VECTOR_ADDRESS_REG_445;
  1750. volatile Uint32 VECTOR_ADDRESS_REG_446;
  1751. volatile Uint32 VECTOR_ADDRESS_REG_447;
  1752. volatile Uint32 VECTOR_ADDRESS_REG_448;
  1753. volatile Uint32 VECTOR_ADDRESS_REG_449;
  1754. volatile Uint32 VECTOR_ADDRESS_REG_450;
  1755. volatile Uint32 VECTOR_ADDRESS_REG_451;
  1756. volatile Uint32 VECTOR_ADDRESS_REG_452;
  1757. volatile Uint32 VECTOR_ADDRESS_REG_453;
  1758. volatile Uint32 VECTOR_ADDRESS_REG_454;
  1759. volatile Uint32 VECTOR_ADDRESS_REG_455;
  1760. volatile Uint32 VECTOR_ADDRESS_REG_456;
  1761. volatile Uint32 VECTOR_ADDRESS_REG_457;
  1762. volatile Uint32 VECTOR_ADDRESS_REG_458;
  1763. volatile Uint32 VECTOR_ADDRESS_REG_459;
  1764. volatile Uint32 VECTOR_ADDRESS_REG_460;
  1765. volatile Uint32 VECTOR_ADDRESS_REG_461;
  1766. volatile Uint32 VECTOR_ADDRESS_REG_462;
  1767. volatile Uint32 VECTOR_ADDRESS_REG_463;
  1768. volatile Uint32 VECTOR_ADDRESS_REG_464;
  1769. volatile Uint32 VECTOR_ADDRESS_REG_465;
  1770. volatile Uint32 VECTOR_ADDRESS_REG_466;
  1771. volatile Uint32 VECTOR_ADDRESS_REG_467;
  1772. volatile Uint32 VECTOR_ADDRESS_REG_468;
  1773. volatile Uint32 VECTOR_ADDRESS_REG_469;
  1774. volatile Uint32 VECTOR_ADDRESS_REG_470;
  1775. volatile Uint32 VECTOR_ADDRESS_REG_471;
  1776. volatile Uint32 VECTOR_ADDRESS_REG_472;
  1777. volatile Uint32 VECTOR_ADDRESS_REG_473;
  1778. volatile Uint32 VECTOR_ADDRESS_REG_474;
  1779. volatile Uint32 VECTOR_ADDRESS_REG_475;
  1780. volatile Uint32 VECTOR_ADDRESS_REG_476;
  1781. volatile Uint32 VECTOR_ADDRESS_REG_477;
  1782. volatile Uint32 VECTOR_ADDRESS_REG_478;
  1783. volatile Uint32 VECTOR_ADDRESS_REG_479;
  1784. volatile Uint32 VECTOR_ADDRESS_REG_480;
  1785. volatile Uint32 VECTOR_ADDRESS_REG_481;
  1786. volatile Uint32 VECTOR_ADDRESS_REG_482;
  1787. volatile Uint32 VECTOR_ADDRESS_REG_483;
  1788. volatile Uint32 VECTOR_ADDRESS_REG_484;
  1789. volatile Uint32 VECTOR_ADDRESS_REG_485;
  1790. volatile Uint32 VECTOR_ADDRESS_REG_486;
  1791. volatile Uint32 VECTOR_ADDRESS_REG_487;
  1792. volatile Uint32 VECTOR_ADDRESS_REG_488;
  1793. volatile Uint32 VECTOR_ADDRESS_REG_489;
  1794. volatile Uint32 VECTOR_ADDRESS_REG_490;
  1795. volatile Uint32 VECTOR_ADDRESS_REG_491;
  1796. volatile Uint32 VECTOR_ADDRESS_REG_492;
  1797. volatile Uint32 VECTOR_ADDRESS_REG_493;
  1798. volatile Uint32 VECTOR_ADDRESS_REG_494;
  1799. volatile Uint32 VECTOR_ADDRESS_REG_495;
  1800. volatile Uint32 VECTOR_ADDRESS_REG_496;
  1801. volatile Uint32 VECTOR_ADDRESS_REG_497;
  1802. volatile Uint32 VECTOR_ADDRESS_REG_498;
  1803. volatile Uint32 VECTOR_ADDRESS_REG_499;
  1804. volatile Uint32 VECTOR_ADDRESS_REG_500;
  1805. volatile Uint32 VECTOR_ADDRESS_REG_501;
  1806. volatile Uint32 VECTOR_ADDRESS_REG_502;
  1807. volatile Uint32 VECTOR_ADDRESS_REG_503;
  1808. volatile Uint32 VECTOR_ADDRESS_REG_504;
  1809. volatile Uint32 VECTOR_ADDRESS_REG_505;
  1810. volatile Uint32 VECTOR_ADDRESS_REG_506;
  1811. volatile Uint32 VECTOR_ADDRESS_REG_507;
  1812. volatile Uint32 VECTOR_ADDRESS_REG_508;
  1813. volatile Uint32 VECTOR_ADDRESS_REG_509;
  1814. volatile Uint32 VECTOR_ADDRESS_REG_510;
  1815. volatile Uint32 VECTOR_ADDRESS_REG_511;
  1816. volatile Uint32 VECTOR_ADDRESS_REG_512;
  1817. volatile Uint32 VECTOR_ADDRESS_REG_513;
  1818. volatile Uint32 VECTOR_ADDRESS_REG_514;
  1819. volatile Uint32 VECTOR_ADDRESS_REG_515;
  1820. volatile Uint32 VECTOR_ADDRESS_REG_516;
  1821. volatile Uint32 VECTOR_ADDRESS_REG_517;
  1822. volatile Uint32 VECTOR_ADDRESS_REG_518;
  1823. volatile Uint32 VECTOR_ADDRESS_REG_519;
  1824. volatile Uint32 VECTOR_ADDRESS_REG_520;
  1825. volatile Uint32 VECTOR_ADDRESS_REG_521;
  1826. volatile Uint32 VECTOR_ADDRESS_REG_522;
  1827. volatile Uint32 VECTOR_ADDRESS_REG_523;
  1828. volatile Uint32 VECTOR_ADDRESS_REG_524;
  1829. volatile Uint32 VECTOR_ADDRESS_REG_525;
  1830. volatile Uint32 VECTOR_ADDRESS_REG_526;
  1831. volatile Uint32 VECTOR_ADDRESS_REG_527;
  1832. volatile Uint32 VECTOR_ADDRESS_REG_528;
  1833. volatile Uint32 VECTOR_ADDRESS_REG_529;
  1834. volatile Uint32 VECTOR_ADDRESS_REG_530;
  1835. volatile Uint32 VECTOR_ADDRESS_REG_531;
  1836. volatile Uint32 VECTOR_ADDRESS_REG_532;
  1837. volatile Uint32 VECTOR_ADDRESS_REG_533;
  1838. volatile Uint32 VECTOR_ADDRESS_REG_534;
  1839. volatile Uint32 VECTOR_ADDRESS_REG_535;
  1840. volatile Uint32 VECTOR_ADDRESS_REG_536;
  1841. volatile Uint32 VECTOR_ADDRESS_REG_537;
  1842. volatile Uint32 VECTOR_ADDRESS_REG_538;
  1843. volatile Uint32 VECTOR_ADDRESS_REG_539;
  1844. volatile Uint32 VECTOR_ADDRESS_REG_540;
  1845. volatile Uint32 VECTOR_ADDRESS_REG_541;
  1846. volatile Uint32 VECTOR_ADDRESS_REG_542;
  1847. volatile Uint32 VECTOR_ADDRESS_REG_543;
  1848. volatile Uint32 VECTOR_ADDRESS_REG_544;
  1849. volatile Uint32 VECTOR_ADDRESS_REG_545;
  1850. volatile Uint32 VECTOR_ADDRESS_REG_546;
  1851. volatile Uint32 VECTOR_ADDRESS_REG_547;
  1852. volatile Uint32 VECTOR_ADDRESS_REG_548;
  1853. volatile Uint32 VECTOR_ADDRESS_REG_549;
  1854. volatile Uint32 VECTOR_ADDRESS_REG_550;
  1855. volatile Uint32 VECTOR_ADDRESS_REG_551;
  1856. volatile Uint32 VECTOR_ADDRESS_REG_552;
  1857. volatile Uint32 VECTOR_ADDRESS_REG_553;
  1858. volatile Uint32 VECTOR_ADDRESS_REG_554;
  1859. volatile Uint32 VECTOR_ADDRESS_REG_555;
  1860. volatile Uint32 VECTOR_ADDRESS_REG_556;
  1861. volatile Uint32 VECTOR_ADDRESS_REG_557;
  1862. volatile Uint32 VECTOR_ADDRESS_REG_558;
  1863. volatile Uint32 VECTOR_ADDRESS_REG_559;
  1864. volatile Uint32 VECTOR_ADDRESS_REG_560;
  1865. volatile Uint32 VECTOR_ADDRESS_REG_561;
  1866. volatile Uint32 VECTOR_ADDRESS_REG_562;
  1867. volatile Uint32 VECTOR_ADDRESS_REG_563;
  1868. volatile Uint32 VECTOR_ADDRESS_REG_564;
  1869. volatile Uint32 VECTOR_ADDRESS_REG_565;
  1870. volatile Uint32 VECTOR_ADDRESS_REG_566;
  1871. volatile Uint32 VECTOR_ADDRESS_REG_567;
  1872. volatile Uint32 VECTOR_ADDRESS_REG_568;
  1873. volatile Uint32 VECTOR_ADDRESS_REG_569;
  1874. volatile Uint32 VECTOR_ADDRESS_REG_570;
  1875. volatile Uint32 VECTOR_ADDRESS_REG_571;
  1876. volatile Uint32 VECTOR_ADDRESS_REG_572;
  1877. volatile Uint32 VECTOR_ADDRESS_REG_573;
  1878. volatile Uint32 VECTOR_ADDRESS_REG_574;
  1879. volatile Uint32 VECTOR_ADDRESS_REG_575;
  1880. volatile Uint32 VECTOR_ADDRESS_REG_576;
  1881. volatile Uint32 VECTOR_ADDRESS_REG_577;
  1882. volatile Uint32 VECTOR_ADDRESS_REG_578;
  1883. volatile Uint32 VECTOR_ADDRESS_REG_579;
  1884. volatile Uint32 VECTOR_ADDRESS_REG_580;
  1885. volatile Uint32 VECTOR_ADDRESS_REG_581;
  1886. volatile Uint32 VECTOR_ADDRESS_REG_582;
  1887. volatile Uint32 VECTOR_ADDRESS_REG_583;
  1888. volatile Uint32 VECTOR_ADDRESS_REG_584;
  1889. volatile Uint32 VECTOR_ADDRESS_REG_585;
  1890. volatile Uint32 VECTOR_ADDRESS_REG_586;
  1891. volatile Uint32 VECTOR_ADDRESS_REG_587;
  1892. volatile Uint32 VECTOR_ADDRESS_REG_588;
  1893. volatile Uint32 VECTOR_ADDRESS_REG_589;
  1894. volatile Uint32 VECTOR_ADDRESS_REG_590;
  1895. volatile Uint32 VECTOR_ADDRESS_REG_591;
  1896. volatile Uint32 VECTOR_ADDRESS_REG_592;
  1897. volatile Uint32 VECTOR_ADDRESS_REG_593;
  1898. volatile Uint32 VECTOR_ADDRESS_REG_594;
  1899. volatile Uint32 VECTOR_ADDRESS_REG_595;
  1900. volatile Uint32 VECTOR_ADDRESS_REG_596;
  1901. volatile Uint32 VECTOR_ADDRESS_REG_597;
  1902. volatile Uint32 VECTOR_ADDRESS_REG_598;
  1903. volatile Uint32 VECTOR_ADDRESS_REG_599;
  1904. volatile Uint32 VECTOR_ADDRESS_REG_600;
  1905. volatile Uint32 VECTOR_ADDRESS_REG_601;
  1906. volatile Uint32 VECTOR_ADDRESS_REG_602;
  1907. volatile Uint32 VECTOR_ADDRESS_REG_603;
  1908. volatile Uint32 VECTOR_ADDRESS_REG_604;
  1909. volatile Uint32 VECTOR_ADDRESS_REG_605;
  1910. volatile Uint32 VECTOR_ADDRESS_REG_606;
  1911. volatile Uint32 VECTOR_ADDRESS_REG_607;
  1912. volatile Uint32 VECTOR_ADDRESS_REG_608;
  1913. volatile Uint32 VECTOR_ADDRESS_REG_609;
  1914. volatile Uint32 VECTOR_ADDRESS_REG_610;
  1915. volatile Uint32 VECTOR_ADDRESS_REG_611;
  1916. volatile Uint32 VECTOR_ADDRESS_REG_612;
  1917. volatile Uint32 VECTOR_ADDRESS_REG_613;
  1918. volatile Uint32 VECTOR_ADDRESS_REG_614;
  1919. volatile Uint32 VECTOR_ADDRESS_REG_615;
  1920. volatile Uint32 VECTOR_ADDRESS_REG_616;
  1921. volatile Uint32 VECTOR_ADDRESS_REG_617;
  1922. volatile Uint32 VECTOR_ADDRESS_REG_618;
  1923. volatile Uint32 VECTOR_ADDRESS_REG_619;
  1924. volatile Uint32 VECTOR_ADDRESS_REG_620;
  1925. volatile Uint32 VECTOR_ADDRESS_REG_621;
  1926. volatile Uint32 VECTOR_ADDRESS_REG_622;
  1927. volatile Uint32 VECTOR_ADDRESS_REG_623;
  1928. volatile Uint32 VECTOR_ADDRESS_REG_624;
  1929. volatile Uint32 VECTOR_ADDRESS_REG_625;
  1930. volatile Uint32 VECTOR_ADDRESS_REG_626;
  1931. volatile Uint32 VECTOR_ADDRESS_REG_627;
  1932. volatile Uint32 VECTOR_ADDRESS_REG_628;
  1933. volatile Uint32 VECTOR_ADDRESS_REG_629;
  1934. volatile Uint32 VECTOR_ADDRESS_REG_630;
  1935. volatile Uint32 VECTOR_ADDRESS_REG_631;
  1936. volatile Uint32 VECTOR_ADDRESS_REG_632;
  1937. volatile Uint32 VECTOR_ADDRESS_REG_633;
  1938. volatile Uint32 VECTOR_ADDRESS_REG_634;
  1939. volatile Uint32 VECTOR_ADDRESS_REG_635;
  1940. volatile Uint32 VECTOR_ADDRESS_REG_636;
  1941. volatile Uint32 VECTOR_ADDRESS_REG_637;
  1942. volatile Uint32 VECTOR_ADDRESS_REG_638;
  1943. volatile Uint32 VECTOR_ADDRESS_REG_639;
  1944. volatile Uint32 VECTOR_ADDRESS_REG_640;
  1945. volatile Uint32 VECTOR_ADDRESS_REG_641;
  1946. volatile Uint32 VECTOR_ADDRESS_REG_642;
  1947. volatile Uint32 VECTOR_ADDRESS_REG_643;
  1948. volatile Uint32 VECTOR_ADDRESS_REG_644;
  1949. volatile Uint32 VECTOR_ADDRESS_REG_645;
  1950. volatile Uint32 VECTOR_ADDRESS_REG_646;
  1951. volatile Uint32 VECTOR_ADDRESS_REG_647;
  1952. volatile Uint32 VECTOR_ADDRESS_REG_648;
  1953. volatile Uint32 VECTOR_ADDRESS_REG_649;
  1954. volatile Uint32 VECTOR_ADDRESS_REG_650;
  1955. volatile Uint32 VECTOR_ADDRESS_REG_651;
  1956. volatile Uint32 VECTOR_ADDRESS_REG_652;
  1957. volatile Uint32 VECTOR_ADDRESS_REG_653;
  1958. volatile Uint32 VECTOR_ADDRESS_REG_654;
  1959. volatile Uint32 VECTOR_ADDRESS_REG_655;
  1960. volatile Uint32 VECTOR_ADDRESS_REG_656;
  1961. volatile Uint32 VECTOR_ADDRESS_REG_657;
  1962. volatile Uint32 VECTOR_ADDRESS_REG_658;
  1963. volatile Uint32 VECTOR_ADDRESS_REG_659;
  1964. volatile Uint32 VECTOR_ADDRESS_REG_660;
  1965. volatile Uint32 VECTOR_ADDRESS_REG_661;
  1966. volatile Uint32 VECTOR_ADDRESS_REG_662;
  1967. volatile Uint32 VECTOR_ADDRESS_REG_663;
  1968. volatile Uint32 VECTOR_ADDRESS_REG_664;
  1969. volatile Uint32 VECTOR_ADDRESS_REG_665;
  1970. volatile Uint32 VECTOR_ADDRESS_REG_666;
  1971. volatile Uint32 VECTOR_ADDRESS_REG_667;
  1972. volatile Uint32 VECTOR_ADDRESS_REG_668;
  1973. volatile Uint32 VECTOR_ADDRESS_REG_669;
  1974. volatile Uint32 VECTOR_ADDRESS_REG_670;
  1975. volatile Uint32 VECTOR_ADDRESS_REG_671;
  1976. volatile Uint32 VECTOR_ADDRESS_REG_672;
  1977. volatile Uint32 VECTOR_ADDRESS_REG_673;
  1978. volatile Uint32 VECTOR_ADDRESS_REG_674;
  1979. volatile Uint32 VECTOR_ADDRESS_REG_675;
  1980. volatile Uint32 VECTOR_ADDRESS_REG_676;
  1981. volatile Uint32 VECTOR_ADDRESS_REG_677;
  1982. volatile Uint32 VECTOR_ADDRESS_REG_678;
  1983. volatile Uint32 VECTOR_ADDRESS_REG_679;
  1984. volatile Uint32 VECTOR_ADDRESS_REG_680;
  1985. volatile Uint32 VECTOR_ADDRESS_REG_681;
  1986. volatile Uint32 VECTOR_ADDRESS_REG_682;
  1987. volatile Uint32 VECTOR_ADDRESS_REG_683;
  1988. volatile Uint32 VECTOR_ADDRESS_REG_684;
  1989. volatile Uint32 VECTOR_ADDRESS_REG_685;
  1990. volatile Uint32 VECTOR_ADDRESS_REG_686;
  1991. volatile Uint32 VECTOR_ADDRESS_REG_687;
  1992. volatile Uint32 VECTOR_ADDRESS_REG_688;
  1993. volatile Uint32 VECTOR_ADDRESS_REG_689;
  1994. volatile Uint32 VECTOR_ADDRESS_REG_690;
  1995. volatile Uint32 VECTOR_ADDRESS_REG_691;
  1996. volatile Uint32 VECTOR_ADDRESS_REG_692;
  1997. volatile Uint32 VECTOR_ADDRESS_REG_693;
  1998. volatile Uint32 VECTOR_ADDRESS_REG_694;
  1999. volatile Uint32 VECTOR_ADDRESS_REG_695;
  2000. volatile Uint32 VECTOR_ADDRESS_REG_696;
  2001. volatile Uint32 VECTOR_ADDRESS_REG_697;
  2002. volatile Uint32 VECTOR_ADDRESS_REG_698;
  2003. volatile Uint32 VECTOR_ADDRESS_REG_699;
  2004. volatile Uint32 VECTOR_ADDRESS_REG_700;
  2005. volatile Uint32 VECTOR_ADDRESS_REG_701;
  2006. volatile Uint32 VECTOR_ADDRESS_REG_702;
  2007. volatile Uint32 VECTOR_ADDRESS_REG_703;
  2008. volatile Uint32 VECTOR_ADDRESS_REG_704;
  2009. volatile Uint32 VECTOR_ADDRESS_REG_705;
  2010. volatile Uint32 VECTOR_ADDRESS_REG_706;
  2011. volatile Uint32 VECTOR_ADDRESS_REG_707;
  2012. volatile Uint32 VECTOR_ADDRESS_REG_708;
  2013. volatile Uint32 VECTOR_ADDRESS_REG_709;
  2014. volatile Uint32 VECTOR_ADDRESS_REG_710;
  2015. volatile Uint32 VECTOR_ADDRESS_REG_711;
  2016. volatile Uint32 VECTOR_ADDRESS_REG_712;
  2017. volatile Uint32 VECTOR_ADDRESS_REG_713;
  2018. volatile Uint32 VECTOR_ADDRESS_REG_714;
  2019. volatile Uint32 VECTOR_ADDRESS_REG_715;
  2020. volatile Uint32 VECTOR_ADDRESS_REG_716;
  2021. volatile Uint32 VECTOR_ADDRESS_REG_717;
  2022. volatile Uint32 VECTOR_ADDRESS_REG_718;
  2023. volatile Uint32 VECTOR_ADDRESS_REG_719;
  2024. volatile Uint32 VECTOR_ADDRESS_REG_720;
  2025. volatile Uint32 VECTOR_ADDRESS_REG_721;
  2026. volatile Uint32 VECTOR_ADDRESS_REG_722;
  2027. volatile Uint32 VECTOR_ADDRESS_REG_723;
  2028. volatile Uint32 VECTOR_ADDRESS_REG_724;
  2029. volatile Uint32 VECTOR_ADDRESS_REG_725;
  2030. volatile Uint32 VECTOR_ADDRESS_REG_726;
  2031. volatile Uint32 VECTOR_ADDRESS_REG_727;
  2032. volatile Uint32 VECTOR_ADDRESS_REG_728;
  2033. volatile Uint32 VECTOR_ADDRESS_REG_729;
  2034. volatile Uint32 VECTOR_ADDRESS_REG_730;
  2035. volatile Uint32 VECTOR_ADDRESS_REG_731;
  2036. volatile Uint32 VECTOR_ADDRESS_REG_732;
  2037. volatile Uint32 VECTOR_ADDRESS_REG_733;
  2038. volatile Uint32 VECTOR_ADDRESS_REG_734;
  2039. volatile Uint32 VECTOR_ADDRESS_REG_735;
  2040. volatile Uint32 VECTOR_ADDRESS_REG_736;
  2041. volatile Uint32 VECTOR_ADDRESS_REG_737;
  2042. volatile Uint32 VECTOR_ADDRESS_REG_738;
  2043. volatile Uint32 VECTOR_ADDRESS_REG_739;
  2044. volatile Uint32 VECTOR_ADDRESS_REG_740;
  2045. volatile Uint32 VECTOR_ADDRESS_REG_741;
  2046. volatile Uint32 VECTOR_ADDRESS_REG_742;
  2047. volatile Uint32 VECTOR_ADDRESS_REG_743;
  2048. volatile Uint32 VECTOR_ADDRESS_REG_744;
  2049. volatile Uint32 VECTOR_ADDRESS_REG_745;
  2050. volatile Uint32 VECTOR_ADDRESS_REG_746;
  2051. volatile Uint32 VECTOR_ADDRESS_REG_747;
  2052. volatile Uint32 VECTOR_ADDRESS_REG_748;
  2053. volatile Uint32 VECTOR_ADDRESS_REG_749;
  2054. volatile Uint32 VECTOR_ADDRESS_REG_750;
  2055. volatile Uint32 VECTOR_ADDRESS_REG_751;
  2056. volatile Uint32 VECTOR_ADDRESS_REG_752;
  2057. volatile Uint32 VECTOR_ADDRESS_REG_753;
  2058. volatile Uint32 VECTOR_ADDRESS_REG_754;
  2059. volatile Uint32 VECTOR_ADDRESS_REG_755;
  2060. volatile Uint32 VECTOR_ADDRESS_REG_756;
  2061. volatile Uint32 VECTOR_ADDRESS_REG_757;
  2062. volatile Uint32 VECTOR_ADDRESS_REG_758;
  2063. volatile Uint32 VECTOR_ADDRESS_REG_759;
  2064. volatile Uint32 VECTOR_ADDRESS_REG_760;
  2065. volatile Uint32 VECTOR_ADDRESS_REG_761;
  2066. volatile Uint32 VECTOR_ADDRESS_REG_762;
  2067. volatile Uint32 VECTOR_ADDRESS_REG_763;
  2068. volatile Uint32 VECTOR_ADDRESS_REG_764;
  2069. volatile Uint32 VECTOR_ADDRESS_REG_765;
  2070. volatile Uint32 VECTOR_ADDRESS_REG_766;
  2071. volatile Uint32 VECTOR_ADDRESS_REG_767;
  2072. volatile Uint32 VECTOR_ADDRESS_REG_768;
  2073. volatile Uint32 VECTOR_ADDRESS_REG_769;
  2074. volatile Uint32 VECTOR_ADDRESS_REG_770;
  2075. volatile Uint32 VECTOR_ADDRESS_REG_771;
  2076. volatile Uint32 VECTOR_ADDRESS_REG_772;
  2077. volatile Uint32 VECTOR_ADDRESS_REG_773;
  2078. volatile Uint32 VECTOR_ADDRESS_REG_774;
  2079. volatile Uint32 VECTOR_ADDRESS_REG_775;
  2080. volatile Uint32 VECTOR_ADDRESS_REG_776;
  2081. volatile Uint32 VECTOR_ADDRESS_REG_777;
  2082. volatile Uint32 VECTOR_ADDRESS_REG_778;
  2083. volatile Uint32 VECTOR_ADDRESS_REG_779;
  2084. volatile Uint32 VECTOR_ADDRESS_REG_780;
  2085. volatile Uint32 VECTOR_ADDRESS_REG_781;
  2086. volatile Uint32 VECTOR_ADDRESS_REG_782;
  2087. volatile Uint32 VECTOR_ADDRESS_REG_783;
  2088. volatile Uint32 VECTOR_ADDRESS_REG_784;
  2089. volatile Uint32 VECTOR_ADDRESS_REG_785;
  2090. volatile Uint32 VECTOR_ADDRESS_REG_786;
  2091. volatile Uint32 VECTOR_ADDRESS_REG_787;
  2092. volatile Uint32 VECTOR_ADDRESS_REG_788;
  2093. volatile Uint32 VECTOR_ADDRESS_REG_789;
  2094. volatile Uint32 VECTOR_ADDRESS_REG_790;
  2095. volatile Uint32 VECTOR_ADDRESS_REG_791;
  2096. volatile Uint32 VECTOR_ADDRESS_REG_792;
  2097. volatile Uint32 VECTOR_ADDRESS_REG_793;
  2098. volatile Uint32 VECTOR_ADDRESS_REG_794;
  2099. volatile Uint32 VECTOR_ADDRESS_REG_795;
  2100. volatile Uint32 VECTOR_ADDRESS_REG_796;
  2101. volatile Uint32 VECTOR_ADDRESS_REG_797;
  2102. volatile Uint32 VECTOR_ADDRESS_REG_798;
  2103. volatile Uint32 VECTOR_ADDRESS_REG_799;
  2104. volatile Uint32 VECTOR_ADDRESS_REG_800;
  2105. volatile Uint32 VECTOR_ADDRESS_REG_801;
  2106. volatile Uint32 VECTOR_ADDRESS_REG_802;
  2107. volatile Uint32 VECTOR_ADDRESS_REG_803;
  2108. volatile Uint32 VECTOR_ADDRESS_REG_804;
  2109. volatile Uint32 VECTOR_ADDRESS_REG_805;
  2110. volatile Uint32 VECTOR_ADDRESS_REG_806;
  2111. volatile Uint32 VECTOR_ADDRESS_REG_807;
  2112. volatile Uint32 VECTOR_ADDRESS_REG_808;
  2113. volatile Uint32 VECTOR_ADDRESS_REG_809;
  2114. volatile Uint32 VECTOR_ADDRESS_REG_810;
  2115. volatile Uint32 VECTOR_ADDRESS_REG_811;
  2116. volatile Uint32 VECTOR_ADDRESS_REG_812;
  2117. volatile Uint32 VECTOR_ADDRESS_REG_813;
  2118. volatile Uint32 VECTOR_ADDRESS_REG_814;
  2119. volatile Uint32 VECTOR_ADDRESS_REG_815;
  2120. volatile Uint32 VECTOR_ADDRESS_REG_816;
  2121. volatile Uint32 VECTOR_ADDRESS_REG_817;
  2122. volatile Uint32 VECTOR_ADDRESS_REG_818;
  2123. volatile Uint32 VECTOR_ADDRESS_REG_819;
  2124. volatile Uint32 VECTOR_ADDRESS_REG_820;
  2125. volatile Uint32 VECTOR_ADDRESS_REG_821;
  2126. volatile Uint32 VECTOR_ADDRESS_REG_822;
  2127. volatile Uint32 VECTOR_ADDRESS_REG_823;
  2128. volatile Uint32 VECTOR_ADDRESS_REG_824;
  2129. volatile Uint32 VECTOR_ADDRESS_REG_825;
  2130. volatile Uint32 VECTOR_ADDRESS_REG_826;
  2131. volatile Uint32 VECTOR_ADDRESS_REG_827;
  2132. volatile Uint32 VECTOR_ADDRESS_REG_828;
  2133. volatile Uint32 VECTOR_ADDRESS_REG_829;
  2134. volatile Uint32 VECTOR_ADDRESS_REG_830;
  2135. volatile Uint32 VECTOR_ADDRESS_REG_831;
  2136. volatile Uint32 VECTOR_ADDRESS_REG_832;
  2137. volatile Uint32 VECTOR_ADDRESS_REG_833;
  2138. volatile Uint32 VECTOR_ADDRESS_REG_834;
  2139. volatile Uint32 VECTOR_ADDRESS_REG_835;
  2140. volatile Uint32 VECTOR_ADDRESS_REG_836;
  2141. volatile Uint32 VECTOR_ADDRESS_REG_837;
  2142. volatile Uint32 VECTOR_ADDRESS_REG_838;
  2143. volatile Uint32 VECTOR_ADDRESS_REG_839;
  2144. volatile Uint32 VECTOR_ADDRESS_REG_840;
  2145. volatile Uint32 VECTOR_ADDRESS_REG_841;
  2146. volatile Uint32 VECTOR_ADDRESS_REG_842;
  2147. volatile Uint32 VECTOR_ADDRESS_REG_843;
  2148. volatile Uint32 VECTOR_ADDRESS_REG_844;
  2149. volatile Uint32 VECTOR_ADDRESS_REG_845;
  2150. volatile Uint32 VECTOR_ADDRESS_REG_846;
  2151. volatile Uint32 VECTOR_ADDRESS_REG_847;
  2152. volatile Uint32 VECTOR_ADDRESS_REG_848;
  2153. volatile Uint32 VECTOR_ADDRESS_REG_849;
  2154. volatile Uint32 VECTOR_ADDRESS_REG_850;
  2155. volatile Uint32 VECTOR_ADDRESS_REG_851;
  2156. volatile Uint32 VECTOR_ADDRESS_REG_852;
  2157. volatile Uint32 VECTOR_ADDRESS_REG_853;
  2158. volatile Uint32 VECTOR_ADDRESS_REG_854;
  2159. volatile Uint32 VECTOR_ADDRESS_REG_855;
  2160. volatile Uint32 VECTOR_ADDRESS_REG_856;
  2161. volatile Uint32 VECTOR_ADDRESS_REG_857;
  2162. volatile Uint32 VECTOR_ADDRESS_REG_858;
  2163. volatile Uint32 VECTOR_ADDRESS_REG_859;
  2164. volatile Uint32 VECTOR_ADDRESS_REG_860;
  2165. volatile Uint32 VECTOR_ADDRESS_REG_861;
  2166. volatile Uint32 VECTOR_ADDRESS_REG_862;
  2167. volatile Uint32 VECTOR_ADDRESS_REG_863;
  2168. volatile Uint32 VECTOR_ADDRESS_REG_864;
  2169. volatile Uint32 VECTOR_ADDRESS_REG_865;
  2170. volatile Uint32 VECTOR_ADDRESS_REG_866;
  2171. volatile Uint32 VECTOR_ADDRESS_REG_867;
  2172. volatile Uint32 VECTOR_ADDRESS_REG_868;
  2173. volatile Uint32 VECTOR_ADDRESS_REG_869;
  2174. volatile Uint32 VECTOR_ADDRESS_REG_870;
  2175. volatile Uint32 VECTOR_ADDRESS_REG_871;
  2176. volatile Uint32 VECTOR_ADDRESS_REG_872;
  2177. volatile Uint32 VECTOR_ADDRESS_REG_873;
  2178. volatile Uint32 VECTOR_ADDRESS_REG_874;
  2179. volatile Uint32 VECTOR_ADDRESS_REG_875;
  2180. volatile Uint32 VECTOR_ADDRESS_REG_876;
  2181. volatile Uint32 VECTOR_ADDRESS_REG_877;
  2182. volatile Uint32 VECTOR_ADDRESS_REG_878;
  2183. volatile Uint32 VECTOR_ADDRESS_REG_879;
  2184. volatile Uint32 VECTOR_ADDRESS_REG_880;
  2185. volatile Uint32 VECTOR_ADDRESS_REG_881;
  2186. volatile Uint32 VECTOR_ADDRESS_REG_882;
  2187. volatile Uint32 VECTOR_ADDRESS_REG_883;
  2188. volatile Uint32 VECTOR_ADDRESS_REG_884;
  2189. volatile Uint32 VECTOR_ADDRESS_REG_885;
  2190. volatile Uint32 VECTOR_ADDRESS_REG_886;
  2191. volatile Uint32 VECTOR_ADDRESS_REG_887;
  2192. volatile Uint32 VECTOR_ADDRESS_REG_888;
  2193. volatile Uint32 VECTOR_ADDRESS_REG_889;
  2194. volatile Uint32 VECTOR_ADDRESS_REG_890;
  2195. volatile Uint32 VECTOR_ADDRESS_REG_891;
  2196. volatile Uint32 VECTOR_ADDRESS_REG_892;
  2197. volatile Uint32 VECTOR_ADDRESS_REG_893;
  2198. volatile Uint32 VECTOR_ADDRESS_REG_894;
  2199. volatile Uint32 VECTOR_ADDRESS_REG_895;
  2200. volatile Uint32 VECTOR_ADDRESS_REG_896;
  2201. volatile Uint32 VECTOR_ADDRESS_REG_897;
  2202. volatile Uint32 VECTOR_ADDRESS_REG_898;
  2203. volatile Uint32 VECTOR_ADDRESS_REG_899;
  2204. volatile Uint32 VECTOR_ADDRESS_REG_900;
  2205. volatile Uint32 VECTOR_ADDRESS_REG_901;
  2206. volatile Uint32 VECTOR_ADDRESS_REG_902;
  2207. volatile Uint32 VECTOR_ADDRESS_REG_903;
  2208. volatile Uint32 VECTOR_ADDRESS_REG_904;
  2209. volatile Uint32 VECTOR_ADDRESS_REG_905;
  2210. volatile Uint32 VECTOR_ADDRESS_REG_906;
  2211. volatile Uint32 VECTOR_ADDRESS_REG_907;
  2212. volatile Uint32 VECTOR_ADDRESS_REG_908;
  2213. volatile Uint32 VECTOR_ADDRESS_REG_909;
  2214. volatile Uint32 VECTOR_ADDRESS_REG_910;
  2215. volatile Uint32 VECTOR_ADDRESS_REG_911;
  2216. volatile Uint32 VECTOR_ADDRESS_REG_912;
  2217. volatile Uint32 VECTOR_ADDRESS_REG_913;
  2218. volatile Uint32 VECTOR_ADDRESS_REG_914;
  2219. volatile Uint32 VECTOR_ADDRESS_REG_915;
  2220. volatile Uint32 VECTOR_ADDRESS_REG_916;
  2221. volatile Uint32 VECTOR_ADDRESS_REG_917;
  2222. volatile Uint32 VECTOR_ADDRESS_REG_918;
  2223. volatile Uint32 VECTOR_ADDRESS_REG_919;
  2224. volatile Uint32 VECTOR_ADDRESS_REG_920;
  2225. volatile Uint32 VECTOR_ADDRESS_REG_921;
  2226. volatile Uint32 VECTOR_ADDRESS_REG_922;
  2227. volatile Uint32 VECTOR_ADDRESS_REG_923;
  2228. volatile Uint32 VECTOR_ADDRESS_REG_924;
  2229. volatile Uint32 VECTOR_ADDRESS_REG_925;
  2230. volatile Uint32 VECTOR_ADDRESS_REG_926;
  2231. volatile Uint32 VECTOR_ADDRESS_REG_927;
  2232. volatile Uint32 VECTOR_ADDRESS_REG_928;
  2233. volatile Uint32 VECTOR_ADDRESS_REG_929;
  2234. volatile Uint32 VECTOR_ADDRESS_REG_930;
  2235. volatile Uint32 VECTOR_ADDRESS_REG_931;
  2236. volatile Uint32 VECTOR_ADDRESS_REG_932;
  2237. volatile Uint32 VECTOR_ADDRESS_REG_933;
  2238. volatile Uint32 VECTOR_ADDRESS_REG_934;
  2239. volatile Uint32 VECTOR_ADDRESS_REG_935;
  2240. volatile Uint32 VECTOR_ADDRESS_REG_936;
  2241. volatile Uint32 VECTOR_ADDRESS_REG_937;
  2242. volatile Uint32 VECTOR_ADDRESS_REG_938;
  2243. volatile Uint32 VECTOR_ADDRESS_REG_939;
  2244. volatile Uint32 VECTOR_ADDRESS_REG_940;
  2245. volatile Uint32 VECTOR_ADDRESS_REG_941;
  2246. volatile Uint32 VECTOR_ADDRESS_REG_942;
  2247. volatile Uint32 VECTOR_ADDRESS_REG_943;
  2248. volatile Uint32 VECTOR_ADDRESS_REG_944;
  2249. volatile Uint32 VECTOR_ADDRESS_REG_945;
  2250. volatile Uint32 VECTOR_ADDRESS_REG_946;
  2251. volatile Uint32 VECTOR_ADDRESS_REG_947;
  2252. volatile Uint32 VECTOR_ADDRESS_REG_948;
  2253. volatile Uint32 VECTOR_ADDRESS_REG_949;
  2254. volatile Uint32 VECTOR_ADDRESS_REG_950;
  2255. volatile Uint32 VECTOR_ADDRESS_REG_951;
  2256. volatile Uint32 VECTOR_ADDRESS_REG_952;
  2257. volatile Uint32 VECTOR_ADDRESS_REG_953;
  2258. volatile Uint32 VECTOR_ADDRESS_REG_954;
  2259. volatile Uint32 VECTOR_ADDRESS_REG_955;
  2260. volatile Uint32 VECTOR_ADDRESS_REG_956;
  2261. volatile Uint32 VECTOR_ADDRESS_REG_957;
  2262. volatile Uint32 VECTOR_ADDRESS_REG_958;
  2263. volatile Uint32 VECTOR_ADDRESS_REG_959;
  2264. volatile Uint32 VECTOR_ADDRESS_REG_960;
  2265. volatile Uint32 VECTOR_ADDRESS_REG_961;
  2266. volatile Uint32 VECTOR_ADDRESS_REG_962;
  2267. volatile Uint32 VECTOR_ADDRESS_REG_963;
  2268. volatile Uint32 VECTOR_ADDRESS_REG_964;
  2269. volatile Uint32 VECTOR_ADDRESS_REG_965;
  2270. volatile Uint32 VECTOR_ADDRESS_REG_966;
  2271. volatile Uint32 VECTOR_ADDRESS_REG_967;
  2272. volatile Uint32 VECTOR_ADDRESS_REG_968;
  2273. volatile Uint32 VECTOR_ADDRESS_REG_969;
  2274. volatile Uint32 VECTOR_ADDRESS_REG_970;
  2275. volatile Uint32 VECTOR_ADDRESS_REG_971;
  2276. volatile Uint32 VECTOR_ADDRESS_REG_972;
  2277. volatile Uint32 VECTOR_ADDRESS_REG_973;
  2278. volatile Uint32 VECTOR_ADDRESS_REG_974;
  2279. volatile Uint32 VECTOR_ADDRESS_REG_975;
  2280. volatile Uint32 VECTOR_ADDRESS_REG_976;
  2281. volatile Uint32 VECTOR_ADDRESS_REG_977;
  2282. volatile Uint32 VECTOR_ADDRESS_REG_978;
  2283. volatile Uint32 VECTOR_ADDRESS_REG_979;
  2284. volatile Uint32 VECTOR_ADDRESS_REG_980;
  2285. volatile Uint32 VECTOR_ADDRESS_REG_981;
  2286. volatile Uint32 VECTOR_ADDRESS_REG_982;
  2287. volatile Uint32 VECTOR_ADDRESS_REG_983;
  2288. volatile Uint32 VECTOR_ADDRESS_REG_984;
  2289. volatile Uint32 VECTOR_ADDRESS_REG_985;
  2290. volatile Uint32 VECTOR_ADDRESS_REG_986;
  2291. volatile Uint32 VECTOR_ADDRESS_REG_987;
  2292. volatile Uint32 VECTOR_ADDRESS_REG_988;
  2293. volatile Uint32 VECTOR_ADDRESS_REG_989;
  2294. volatile Uint32 VECTOR_ADDRESS_REG_990;
  2295. volatile Uint32 VECTOR_ADDRESS_REG_991;
  2296. volatile Uint32 VECTOR_ADDRESS_REG_992;
  2297. volatile Uint32 VECTOR_ADDRESS_REG_993;
  2298. volatile Uint32 VECTOR_ADDRESS_REG_994;
  2299. volatile Uint32 VECTOR_ADDRESS_REG_995;
  2300. volatile Uint32 VECTOR_ADDRESS_REG_996;
  2301. volatile Uint32 VECTOR_ADDRESS_REG_997;
  2302. volatile Uint32 VECTOR_ADDRESS_REG_998;
  2303. volatile Uint32 VECTOR_ADDRESS_REG_999;
  2304. volatile Uint32 VECTOR_ADDRESS_REG_1000;
  2305. volatile Uint32 VECTOR_ADDRESS_REG_1001;
  2306. volatile Uint32 VECTOR_ADDRESS_REG_1002;
  2307. volatile Uint32 VECTOR_ADDRESS_REG_1003;
  2308. volatile Uint32 VECTOR_ADDRESS_REG_1004;
  2309. volatile Uint32 VECTOR_ADDRESS_REG_1005;
  2310. volatile Uint32 VECTOR_ADDRESS_REG_1006;
  2311. volatile Uint32 VECTOR_ADDRESS_REG_1007;
  2312. volatile Uint32 VECTOR_ADDRESS_REG_1008;
  2313. volatile Uint32 VECTOR_ADDRESS_REG_1009;
  2314. volatile Uint32 VECTOR_ADDRESS_REG_1010;
  2315. volatile Uint32 VECTOR_ADDRESS_REG_1011;
  2316. volatile Uint32 VECTOR_ADDRESS_REG_1012;
  2317. volatile Uint32 VECTOR_ADDRESS_REG_1013;
  2318. volatile Uint32 VECTOR_ADDRESS_REG_1014;
  2319. volatile Uint32 VECTOR_ADDRESS_REG_1015;
  2320. volatile Uint32 VECTOR_ADDRESS_REG_1016;
  2321. volatile Uint32 VECTOR_ADDRESS_REG_1017;
  2322. volatile Uint32 VECTOR_ADDRESS_REG_1018;
  2323. volatile Uint32 VECTOR_ADDRESS_REG_1019;
  2324. volatile Uint32 VECTOR_ADDRESS_REG_1020;
  2325. volatile Uint32 VECTOR_ADDRESS_REG_1021;
  2326. volatile Uint32 VECTOR_ADDRESS_REG_1022;
  2327. volatile Uint32 VECTOR_ADDRESS_REG_1023;
  2328. #else
  2329. volatile Uint32 VECTOR_ADDRESS_REG[1024];
  2330. #endif
  2331. } CSL_CPINTCRegs;
  2332. /**************************************************************************\
  2333. * Field Definition Macros
  2334. \**************************************************************************/
  2335. /* revision_reg */
  2336. #define CSL_CPINTC_REVISION_REG_REV_SCHEME_MASK (0xC0000000u)
  2337. #define CSL_CPINTC_REVISION_REG_REV_SCHEME_SHIFT (0x0000001Eu)
  2338. #define CSL_CPINTC_REVISION_REG_REV_SCHEME_RESETVAL (0x00000001u)
  2339. #define CSL_CPINTC_REVISION_REG_REV_MODULE_MASK (0x0FFF0000u)
  2340. #define CSL_CPINTC_REVISION_REG_REV_MODULE_SHIFT (0x00000010u)
  2341. #define CSL_CPINTC_REVISION_REG_REV_MODULE_RESETVAL (0x00000E82u)
  2342. #define CSL_CPINTC_REVISION_REG_REV_RTL_MASK (0x0000F800u)
  2343. #define CSL_CPINTC_REVISION_REG_REV_RTL_SHIFT (0x0000000Bu)
  2344. #define CSL_CPINTC_REVISION_REG_REV_RTL_RESETVAL (0x00000015u)
  2345. #define CSL_CPINTC_REVISION_REG_REV_MAJOR_MASK (0x00000700u)
  2346. #define CSL_CPINTC_REVISION_REG_REV_MAJOR_SHIFT (0x00000008u)
  2347. #define CSL_CPINTC_REVISION_REG_REV_MAJOR_RESETVAL (0x00000001u)
  2348. #define CSL_CPINTC_REVISION_REG_REV_CUSTOM_MASK (0x000000C0u)
  2349. #define CSL_CPINTC_REVISION_REG_REV_CUSTOM_SHIFT (0x00000006u)
  2350. #define CSL_CPINTC_REVISION_REG_REV_CUSTOM_RESETVAL (0x00000000u)
  2351. #define CSL_CPINTC_REVISION_REG_REV_MINOR_MASK (0x0000003Fu)
  2352. #define CSL_CPINTC_REVISION_REG_REV_MINOR_SHIFT (0x00000000u)
  2353. #define CSL_CPINTC_REVISION_REG_REV_MINOR_RESETVAL (0x00000000u)
  2354. #define CSL_CPINTC_REVISION_REG_RESETVAL (0x4E82A900u)
  2355. /* control_reg */
  2356. #define CSL_CPINTC_CONTROL_REG_WAKEUP_MODE_MASK (0x00000002u)
  2357. #define CSL_CPINTC_CONTROL_REG_WAKEUP_MODE_SHIFT (0x00000001u)
  2358. #define CSL_CPINTC_CONTROL_REG_WAKEUP_MODE_RESETVAL (0x00000000u)
  2359. #define CSL_CPINTC_CONTROL_REG_NEST_MODE_MASK (0x0000000Cu)
  2360. #define CSL_CPINTC_CONTROL_REG_NEST_MODE_SHIFT (0x00000002u)
  2361. #define CSL_CPINTC_CONTROL_REG_NEST_MODE_RESETVAL (0x00000000u)
  2362. #define CSL_CPINTC_CONTROL_REG_PRIORITY_HOLD_MODE_MASK (0x00000010u)
  2363. #define CSL_CPINTC_CONTROL_REG_PRIORITY_HOLD_MODE_SHIFT (0x00000004u)
  2364. #define CSL_CPINTC_CONTROL_REG_PRIORITY_HOLD_MODE_RESETVAL (0x00000000u)
  2365. #define CSL_CPINTC_CONTROL_REG_RESETVAL (0x00000000u)
  2366. /* host_control_reg */
  2367. #define CSL_CPINTC_HOST_CONTROL_REG_HOST_CONTROL_REG_MASK (0xFFFFFFFFu)
  2368. #define CSL_CPINTC_HOST_CONTROL_REG_HOST_CONTROL_REG_SHIFT (0x00000000u)
  2369. #define CSL_CPINTC_HOST_CONTROL_REG_HOST_CONTROL_REG_RESETVAL (0x00000000u)
  2370. #define CSL_CPINTC_HOST_CONTROL_REG_RESETVAL (0x00000000u)
  2371. /* global_enable_hint_reg */
  2372. #define CSL_CPINTC_GLOBAL_ENABLE_HINT_REG_ENABLE_HINT_ANY_MASK (0x00000001u)
  2373. #define CSL_CPINTC_GLOBAL_ENABLE_HINT_REG_ENABLE_HINT_ANY_SHIFT (0x00000000u)
  2374. #define CSL_CPINTC_GLOBAL_ENABLE_HINT_REG_ENABLE_HINT_ANY_RESETVAL (0x00000000u)
  2375. #define CSL_CPINTC_GLOBAL_ENABLE_HINT_REG_RESETVAL (0x00000000u)
  2376. /* glb_nest_level_reg */
  2377. #define CSL_CPINTC_GLB_NEST_LEVEL_REG_GLB_NEST_LEVEL_MASK (0x000001FFu)
  2378. #define CSL_CPINTC_GLB_NEST_LEVEL_REG_GLB_NEST_LEVEL_SHIFT (0x00000000u)
  2379. #define CSL_CPINTC_GLB_NEST_LEVEL_REG_GLB_NEST_LEVEL_RESETVAL (0x00000100u)
  2380. #define CSL_CPINTC_GLB_NEST_LEVEL_REG_RESETVAL (0x00000100u)
  2381. /* status_set_index_reg */
  2382. #define CSL_CPINTC_STATUS_SET_INDEX_REG_STATUS_SET_INDEX_MASK (0x000003FFu)
  2383. #define CSL_CPINTC_STATUS_SET_INDEX_REG_STATUS_SET_INDEX_SHIFT (0x00000000u)
  2384. #define CSL_CPINTC_STATUS_SET_INDEX_REG_STATUS_SET_INDEX_RESETVAL (0x00000000u)
  2385. #define CSL_CPINTC_STATUS_SET_INDEX_REG_RESETVAL (0x00000000u)
  2386. /* status_clr_index_reg */
  2387. #define CSL_CPINTC_STATUS_CLR_INDEX_REG_STATUS_CLR_INDEX_MASK (0x000003FFu)
  2388. #define CSL_CPINTC_STATUS_CLR_INDEX_REG_STATUS_CLR_INDEX_SHIFT (0x00000000u)
  2389. #define CSL_CPINTC_STATUS_CLR_INDEX_REG_STATUS_CLR_INDEX_RESETVAL (0x00000000u)
  2390. #define CSL_CPINTC_STATUS_CLR_INDEX_REG_RESETVAL (0x00000000u)
  2391. /* enable_set_index_reg */
  2392. #define CSL_CPINTC_ENABLE_SET_INDEX_REG_ENABLE_SET_INDEX_MASK (0x000003FFu)
  2393. #define CSL_CPINTC_ENABLE_SET_INDEX_REG_ENABLE_SET_INDEX_SHIFT (0x00000000u)
  2394. #define CSL_CPINTC_ENABLE_SET_INDEX_REG_ENABLE_SET_INDEX_RESETVAL (0x00000000u)
  2395. #define CSL_CPINTC_ENABLE_SET_INDEX_REG_RESETVAL (0x00000000u)
  2396. /* enable_clr_index_reg */
  2397. #define CSL_CPINTC_ENABLE_CLR_INDEX_REG_ENABLE_CLR_INDEX_MASK (0x000003FFu)
  2398. #define CSL_CPINTC_ENABLE_CLR_INDEX_REG_ENABLE_CLR_INDEX_SHIFT (0x00000000u)
  2399. #define CSL_CPINTC_ENABLE_CLR_INDEX_REG_ENABLE_CLR_INDEX_RESETVAL (0x00000000u)
  2400. #define CSL_CPINTC_ENABLE_CLR_INDEX_REG_RESETVAL (0x00000000u)
  2401. /* hint_enable_set_index_reg */
  2402. #define CSL_CPINTC_HINT_ENABLE_SET_INDEX_REG_HINT_ENABLE_SET_INDEX_MASK (0x000000FFu)
  2403. #define CSL_CPINTC_HINT_ENABLE_SET_INDEX_REG_HINT_ENABLE_SET_INDEX_SHIFT (0x00000000u)
  2404. #define CSL_CPINTC_HINT_ENABLE_SET_INDEX_REG_HINT_ENABLE_SET_INDEX_RESETVAL (0x00000000u)
  2405. #define CSL_CPINTC_HINT_ENABLE_SET_INDEX_REG_RESETVAL (0x00000000u)
  2406. /* hint_enable_clr_index_reg */
  2407. #define CSL_CPINTC_HINT_ENABLE_CLR_INDEX_REG_HINT_ENABLE_CLR_INDEX_MASK (0x000000FFu)
  2408. #define CSL_CPINTC_HINT_ENABLE_CLR_INDEX_REG_HINT_ENABLE_CLR_INDEX_SHIFT (0x00000000u)
  2409. #define CSL_CPINTC_HINT_ENABLE_CLR_INDEX_REG_HINT_ENABLE_CLR_INDEX_RESETVAL (0x00000000u)
  2410. #define CSL_CPINTC_HINT_ENABLE_CLR_INDEX_REG_RESETVAL (0x00000000u)
  2411. /* vector_null_reg */
  2412. #define CSL_CPINTC_VECTOR_NULL_REG_VECTOR_NULL_ADDR_MASK (0xFFFFFFFFu)
  2413. #define CSL_CPINTC_VECTOR_NULL_REG_VECTOR_NULL_ADDR_SHIFT (0x00000000u)
  2414. #define CSL_CPINTC_VECTOR_NULL_REG_VECTOR_NULL_ADDR_RESETVAL (0x00000000u)
  2415. #define CSL_CPINTC_VECTOR_NULL_REG_RESETVAL (0x00000000u)
  2416. /* glb_pri_intr_reg */
  2417. #define CSL_CPINTC_GLB_PRI_INTR_REG_GLB_PRI_INTR_MASK (0x000003FFu)
  2418. #define CSL_CPINTC_GLB_PRI_INTR_REG_GLB_PRI_INTR_SHIFT (0x00000000u)
  2419. #define CSL_CPINTC_GLB_PRI_INTR_REG_GLB_PRI_INTR_RESETVAL (0x00000000u)
  2420. #define CSL_CPINTC_GLB_PRI_INTR_REG_GLB_NONE_MASK (0x80000000u)
  2421. #define CSL_CPINTC_GLB_PRI_INTR_REG_GLB_NONE_SHIFT (0x0000001Fu)
  2422. #define CSL_CPINTC_GLB_PRI_INTR_REG_GLB_NONE_RESETVAL (0x00000001u)
  2423. #define CSL_CPINTC_GLB_PRI_INTR_REG_RESETVAL (0x80000000u)
  2424. /* glb_vector_addr_reg */
  2425. #define CSL_CPINTC_GLB_VECTOR_ADDR_REG_GLB_VECTOR_ADDR_MASK (0xFFFFFFFFu)
  2426. #define CSL_CPINTC_GLB_VECTOR_ADDR_REG_GLB_VECTOR_ADDR_SHIFT (0x00000000u)
  2427. #define CSL_CPINTC_GLB_VECTOR_ADDR_REG_GLB_VECTOR_ADDR_RESETVAL (0x00000000u)
  2428. #define CSL_CPINTC_GLB_VECTOR_ADDR_REG_RESETVAL (0x00000000u)
  2429. /* global_secure_enable_reg */
  2430. #define CSL_CPINTC_GLOBAL_SECURE_ENABLE_REG_SEC_ENABLE_ANY_MASK (0x00000001u)
  2431. #define CSL_CPINTC_GLOBAL_SECURE_ENABLE_REG_SEC_ENABLE_ANY_SHIFT (0x00000000u)
  2432. #define CSL_CPINTC_GLOBAL_SECURE_ENABLE_REG_SEC_ENABLE_ANY_RESETVAL (0x00000000u)
  2433. #define CSL_CPINTC_GLOBAL_SECURE_ENABLE_REG_SECURE_ADV_EN_MASK (0x00000002u)
  2434. #define CSL_CPINTC_GLOBAL_SECURE_ENABLE_REG_SECURE_ADV_EN_SHIFT (0x00000001u)
  2435. #define CSL_CPINTC_GLOBAL_SECURE_ENABLE_REG_SECURE_ADV_EN_RESETVAL (0x00000000u)
  2436. #define CSL_CPINTC_GLOBAL_SECURE_ENABLE_REG_RESETVAL (0x00000000u)
  2437. /* secure_pri_intr_reg */
  2438. #define CSL_CPINTC_SECURE_PRI_INTR_REG_SEC_PRI_INTR_MASK (0x000003FFu)
  2439. #define CSL_CPINTC_SECURE_PRI_INTR_REG_SEC_PRI_INTR_SHIFT (0x00000000u)
  2440. #define CSL_CPINTC_SECURE_PRI_INTR_REG_SEC_PRI_INTR_RESETVAL (0x00000000u)
  2441. #define CSL_CPINTC_SECURE_PRI_INTR_REG_SEC_PRI_NONE_MASK (0x80000000u)
  2442. #define CSL_CPINTC_SECURE_PRI_INTR_REG_SEC_PRI_NONE_SHIFT (0x0000001Fu)
  2443. #define CSL_CPINTC_SECURE_PRI_INTR_REG_SEC_PRI_NONE_RESETVAL (0x00000000u)
  2444. #define CSL_CPINTC_SECURE_PRI_INTR_REG_RESETVAL (0x00000000u)
  2445. /* raw_status_reg0 */
  2446. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_0_MASK (0x00000001u)
  2447. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_0_SHIFT (0x00000000u)
  2448. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_0_RESETVAL (0x00000000u)
  2449. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_1_MASK (0x00000002u)
  2450. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_1_SHIFT (0x00000001u)
  2451. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_1_RESETVAL (0x00000000u)
  2452. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_2_MASK (0x00000004u)
  2453. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_2_SHIFT (0x00000002u)
  2454. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_2_RESETVAL (0x00000000u)
  2455. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_3_MASK (0x00000008u)
  2456. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_3_SHIFT (0x00000003u)
  2457. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_3_RESETVAL (0x00000000u)
  2458. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_4_MASK (0x00000010u)
  2459. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_4_SHIFT (0x00000004u)
  2460. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_4_RESETVAL (0x00000000u)
  2461. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_5_MASK (0x00000020u)
  2462. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_5_SHIFT (0x00000005u)
  2463. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_5_RESETVAL (0x00000000u)
  2464. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_6_MASK (0x00000040u)
  2465. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_6_SHIFT (0x00000006u)
  2466. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_6_RESETVAL (0x00000000u)
  2467. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_7_MASK (0x00000080u)
  2468. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_7_SHIFT (0x00000007u)
  2469. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_7_RESETVAL (0x00000000u)
  2470. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_8_MASK (0x00000100u)
  2471. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_8_SHIFT (0x00000008u)
  2472. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_8_RESETVAL (0x00000000u)
  2473. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_9_MASK (0x00000200u)
  2474. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_9_SHIFT (0x00000009u)
  2475. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_9_RESETVAL (0x00000000u)
  2476. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_10_MASK (0x00000400u)
  2477. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_10_SHIFT (0x0000000Au)
  2478. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_10_RESETVAL (0x00000000u)
  2479. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_11_MASK (0x00000800u)
  2480. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_11_SHIFT (0x0000000Bu)
  2481. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_11_RESETVAL (0x00000000u)
  2482. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_12_MASK (0x00001000u)
  2483. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_12_SHIFT (0x0000000Cu)
  2484. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_12_RESETVAL (0x00000000u)
  2485. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_13_MASK (0x00002000u)
  2486. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_13_SHIFT (0x0000000Du)
  2487. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_13_RESETVAL (0x00000000u)
  2488. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_14_MASK (0x00004000u)
  2489. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_14_SHIFT (0x0000000Eu)
  2490. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_14_RESETVAL (0x00000000u)
  2491. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_15_MASK (0x00008000u)
  2492. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_15_SHIFT (0x0000000Fu)
  2493. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_15_RESETVAL (0x00000000u)
  2494. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_16_MASK (0x00010000u)
  2495. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_16_SHIFT (0x00000010u)
  2496. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_16_RESETVAL (0x00000000u)
  2497. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_17_MASK (0x00020000u)
  2498. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_17_SHIFT (0x00000011u)
  2499. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_17_RESETVAL (0x00000000u)
  2500. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_18_MASK (0x00040000u)
  2501. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_18_SHIFT (0x00000012u)
  2502. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_18_RESETVAL (0x00000000u)
  2503. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_19_MASK (0x00080000u)
  2504. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_19_SHIFT (0x00000013u)
  2505. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_19_RESETVAL (0x00000000u)
  2506. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_20_MASK (0x00100000u)
  2507. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_20_SHIFT (0x00000014u)
  2508. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_20_RESETVAL (0x00000000u)
  2509. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_21_MASK (0x00200000u)
  2510. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_21_SHIFT (0x00000015u)
  2511. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_21_RESETVAL (0x00000000u)
  2512. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_22_MASK (0x00400000u)
  2513. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_22_SHIFT (0x00000016u)
  2514. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_22_RESETVAL (0x00000000u)
  2515. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_23_MASK (0x00800000u)
  2516. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_23_SHIFT (0x00000017u)
  2517. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_23_RESETVAL (0x00000000u)
  2518. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_24_MASK (0x01000000u)
  2519. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_24_SHIFT (0x00000018u)
  2520. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_24_RESETVAL (0x00000000u)
  2521. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_25_MASK (0x02000000u)
  2522. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_25_SHIFT (0x00000019u)
  2523. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_25_RESETVAL (0x00000000u)
  2524. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_26_MASK (0x04000000u)
  2525. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_26_SHIFT (0x0000001Au)
  2526. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_26_RESETVAL (0x00000000u)
  2527. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_27_MASK (0x08000000u)
  2528. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_27_SHIFT (0x0000001Bu)
  2529. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_27_RESETVAL (0x00000000u)
  2530. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_28_MASK (0x10000000u)
  2531. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_28_SHIFT (0x0000001Cu)
  2532. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_28_RESETVAL (0x00000000u)
  2533. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_29_MASK (0x20000000u)
  2534. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_29_SHIFT (0x0000001Du)
  2535. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_29_RESETVAL (0x00000000u)
  2536. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_30_MASK (0x40000000u)
  2537. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_30_SHIFT (0x0000001Eu)
  2538. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_30_RESETVAL (0x00000000u)
  2539. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_31_MASK (0x80000000u)
  2540. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_31_SHIFT (0x0000001Fu)
  2541. #define CSL_CPINTC_RAW_STATUS_REG0_RAW_STATUS_31_RESETVAL (0x00000000u)
  2542. #define CSL_CPINTC_RAW_STATUS_REG0_RESETVAL (0x00000000u)
  2543. /* raw_status_reg1 */
  2544. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_32_MASK (0x00000001u)
  2545. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_32_SHIFT (0x00000000u)
  2546. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_32_RESETVAL (0x00000000u)
  2547. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_33_MASK (0x00000002u)
  2548. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_33_SHIFT (0x00000001u)
  2549. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_33_RESETVAL (0x00000000u)
  2550. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_34_MASK (0x00000004u)
  2551. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_34_SHIFT (0x00000002u)
  2552. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_34_RESETVAL (0x00000000u)
  2553. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_35_MASK (0x00000008u)
  2554. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_35_SHIFT (0x00000003u)
  2555. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_35_RESETVAL (0x00000000u)
  2556. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_36_MASK (0x00000010u)
  2557. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_36_SHIFT (0x00000004u)
  2558. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_36_RESETVAL (0x00000000u)
  2559. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_37_MASK (0x00000020u)
  2560. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_37_SHIFT (0x00000005u)
  2561. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_37_RESETVAL (0x00000000u)
  2562. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_38_MASK (0x00000040u)
  2563. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_38_SHIFT (0x00000006u)
  2564. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_38_RESETVAL (0x00000000u)
  2565. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_39_MASK (0x00000080u)
  2566. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_39_SHIFT (0x00000007u)
  2567. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_39_RESETVAL (0x00000000u)
  2568. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_40_MASK (0x00000100u)
  2569. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_40_SHIFT (0x00000008u)
  2570. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_40_RESETVAL (0x00000000u)
  2571. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_41_MASK (0x00000200u)
  2572. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_41_SHIFT (0x00000009u)
  2573. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_41_RESETVAL (0x00000000u)
  2574. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_42_MASK (0x00000400u)
  2575. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_42_SHIFT (0x0000000Au)
  2576. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_42_RESETVAL (0x00000000u)
  2577. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_43_MASK (0x00000800u)
  2578. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_43_SHIFT (0x0000000Bu)
  2579. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_43_RESETVAL (0x00000000u)
  2580. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_44_MASK (0x00001000u)
  2581. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_44_SHIFT (0x0000000Cu)
  2582. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_44_RESETVAL (0x00000000u)
  2583. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_45_MASK (0x00002000u)
  2584. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_45_SHIFT (0x0000000Du)
  2585. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_45_RESETVAL (0x00000000u)
  2586. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_46_MASK (0x00004000u)
  2587. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_46_SHIFT (0x0000000Eu)
  2588. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_46_RESETVAL (0x00000000u)
  2589. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_47_MASK (0x00008000u)
  2590. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_47_SHIFT (0x0000000Fu)
  2591. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_47_RESETVAL (0x00000000u)
  2592. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_48_MASK (0x00010000u)
  2593. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_48_SHIFT (0x00000010u)
  2594. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_48_RESETVAL (0x00000000u)
  2595. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_49_MASK (0x00020000u)
  2596. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_49_SHIFT (0x00000011u)
  2597. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_49_RESETVAL (0x00000000u)
  2598. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_50_MASK (0x00040000u)
  2599. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_50_SHIFT (0x00000012u)
  2600. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_50_RESETVAL (0x00000000u)
  2601. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_51_MASK (0x00080000u)
  2602. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_51_SHIFT (0x00000013u)
  2603. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_51_RESETVAL (0x00000000u)
  2604. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_52_MASK (0x00100000u)
  2605. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_52_SHIFT (0x00000014u)
  2606. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_52_RESETVAL (0x00000000u)
  2607. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_53_MASK (0x00200000u)
  2608. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_53_SHIFT (0x00000015u)
  2609. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_53_RESETVAL (0x00000000u)
  2610. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_54_MASK (0x00400000u)
  2611. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_54_SHIFT (0x00000016u)
  2612. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_54_RESETVAL (0x00000000u)
  2613. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_55_MASK (0x00800000u)
  2614. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_55_SHIFT (0x00000017u)
  2615. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_55_RESETVAL (0x00000000u)
  2616. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_56_MASK (0x01000000u)
  2617. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_56_SHIFT (0x00000018u)
  2618. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_56_RESETVAL (0x00000000u)
  2619. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_57_MASK (0x02000000u)
  2620. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_57_SHIFT (0x00000019u)
  2621. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_57_RESETVAL (0x00000000u)
  2622. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_58_MASK (0x04000000u)
  2623. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_58_SHIFT (0x0000001Au)
  2624. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_58_RESETVAL (0x00000000u)
  2625. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_59_MASK (0x08000000u)
  2626. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_59_SHIFT (0x0000001Bu)
  2627. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_59_RESETVAL (0x00000000u)
  2628. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_60_MASK (0x10000000u)
  2629. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_60_SHIFT (0x0000001Cu)
  2630. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_60_RESETVAL (0x00000000u)
  2631. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_61_MASK (0x20000000u)
  2632. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_61_SHIFT (0x0000001Du)
  2633. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_61_RESETVAL (0x00000000u)
  2634. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_62_MASK (0x40000000u)
  2635. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_62_SHIFT (0x0000001Eu)
  2636. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_62_RESETVAL (0x00000000u)
  2637. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_63_MASK (0x80000000u)
  2638. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_63_SHIFT (0x0000001Fu)
  2639. #define CSL_CPINTC_RAW_STATUS_REG1_RAW_STATUS_63_RESETVAL (0x00000000u)
  2640. #define CSL_CPINTC_RAW_STATUS_REG1_RESETVAL (0x00000000u)
  2641. /* raw_status_reg2 */
  2642. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_64_MASK (0x00000001u)
  2643. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_64_SHIFT (0x00000000u)
  2644. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_64_RESETVAL (0x00000000u)
  2645. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_65_MASK (0x00000002u)
  2646. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_65_SHIFT (0x00000001u)
  2647. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_65_RESETVAL (0x00000000u)
  2648. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_66_MASK (0x00000004u)
  2649. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_66_SHIFT (0x00000002u)
  2650. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_66_RESETVAL (0x00000000u)
  2651. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_67_MASK (0x00000008u)
  2652. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_67_SHIFT (0x00000003u)
  2653. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_67_RESETVAL (0x00000000u)
  2654. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_68_MASK (0x00000010u)
  2655. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_68_SHIFT (0x00000004u)
  2656. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_68_RESETVAL (0x00000000u)
  2657. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_69_MASK (0x00000020u)
  2658. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_69_SHIFT (0x00000005u)
  2659. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_69_RESETVAL (0x00000000u)
  2660. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_70_MASK (0x00000040u)
  2661. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_70_SHIFT (0x00000006u)
  2662. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_70_RESETVAL (0x00000000u)
  2663. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_71_MASK (0x00000080u)
  2664. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_71_SHIFT (0x00000007u)
  2665. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_71_RESETVAL (0x00000000u)
  2666. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_72_MASK (0x00000100u)
  2667. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_72_SHIFT (0x00000008u)
  2668. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_72_RESETVAL (0x00000000u)
  2669. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_73_MASK (0x00000200u)
  2670. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_73_SHIFT (0x00000009u)
  2671. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_73_RESETVAL (0x00000000u)
  2672. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_74_MASK (0x00000400u)
  2673. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_74_SHIFT (0x0000000Au)
  2674. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_74_RESETVAL (0x00000000u)
  2675. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_75_MASK (0x00000800u)
  2676. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_75_SHIFT (0x0000000Bu)
  2677. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_75_RESETVAL (0x00000000u)
  2678. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_76_MASK (0x00001000u)
  2679. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_76_SHIFT (0x0000000Cu)
  2680. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_76_RESETVAL (0x00000000u)
  2681. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_77_MASK (0x00002000u)
  2682. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_77_SHIFT (0x0000000Du)
  2683. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_77_RESETVAL (0x00000000u)
  2684. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_78_MASK (0x00004000u)
  2685. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_78_SHIFT (0x0000000Eu)
  2686. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_78_RESETVAL (0x00000000u)
  2687. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_79_MASK (0x00008000u)
  2688. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_79_SHIFT (0x0000000Fu)
  2689. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_79_RESETVAL (0x00000000u)
  2690. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_80_MASK (0x00010000u)
  2691. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_80_SHIFT (0x00000010u)
  2692. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_80_RESETVAL (0x00000000u)
  2693. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_81_MASK (0x00020000u)
  2694. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_81_SHIFT (0x00000011u)
  2695. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_81_RESETVAL (0x00000000u)
  2696. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_82_MASK (0x00040000u)
  2697. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_82_SHIFT (0x00000012u)
  2698. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_82_RESETVAL (0x00000000u)
  2699. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_83_MASK (0x00080000u)
  2700. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_83_SHIFT (0x00000013u)
  2701. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_83_RESETVAL (0x00000000u)
  2702. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_84_MASK (0x00100000u)
  2703. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_84_SHIFT (0x00000014u)
  2704. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_84_RESETVAL (0x00000000u)
  2705. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_85_MASK (0x00200000u)
  2706. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_85_SHIFT (0x00000015u)
  2707. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_85_RESETVAL (0x00000000u)
  2708. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_86_MASK (0x00400000u)
  2709. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_86_SHIFT (0x00000016u)
  2710. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_86_RESETVAL (0x00000000u)
  2711. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_87_MASK (0x00800000u)
  2712. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_87_SHIFT (0x00000017u)
  2713. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_87_RESETVAL (0x00000000u)
  2714. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_88_MASK (0x01000000u)
  2715. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_88_SHIFT (0x00000018u)
  2716. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_88_RESETVAL (0x00000000u)
  2717. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_89_MASK (0x02000000u)
  2718. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_89_SHIFT (0x00000019u)
  2719. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_89_RESETVAL (0x00000000u)
  2720. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_90_MASK (0x04000000u)
  2721. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_90_SHIFT (0x0000001Au)
  2722. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_90_RESETVAL (0x00000000u)
  2723. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_91_MASK (0x08000000u)
  2724. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_91_SHIFT (0x0000001Bu)
  2725. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_91_RESETVAL (0x00000000u)
  2726. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_92_MASK (0x10000000u)
  2727. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_92_SHIFT (0x0000001Cu)
  2728. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_92_RESETVAL (0x00000000u)
  2729. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_93_MASK (0x20000000u)
  2730. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_93_SHIFT (0x0000001Du)
  2731. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_93_RESETVAL (0x00000000u)
  2732. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_94_MASK (0x40000000u)
  2733. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_94_SHIFT (0x0000001Eu)
  2734. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_94_RESETVAL (0x00000000u)
  2735. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_95_MASK (0x80000000u)
  2736. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_95_SHIFT (0x0000001Fu)
  2737. #define CSL_CPINTC_RAW_STATUS_REG2_RAW_STATUS_95_RESETVAL (0x00000000u)
  2738. #define CSL_CPINTC_RAW_STATUS_REG2_RESETVAL (0x00000000u)
  2739. /* raw_status_reg3 */
  2740. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_96_MASK (0x00000001u)
  2741. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_96_SHIFT (0x00000000u)
  2742. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_96_RESETVAL (0x00000000u)
  2743. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_97_MASK (0x00000002u)
  2744. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_97_SHIFT (0x00000001u)
  2745. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_97_RESETVAL (0x00000000u)
  2746. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_98_MASK (0x00000004u)
  2747. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_98_SHIFT (0x00000002u)
  2748. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_98_RESETVAL (0x00000000u)
  2749. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_99_MASK (0x00000008u)
  2750. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_99_SHIFT (0x00000003u)
  2751. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_99_RESETVAL (0x00000000u)
  2752. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_100_MASK (0x00000010u)
  2753. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_100_SHIFT (0x00000004u)
  2754. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_100_RESETVAL (0x00000000u)
  2755. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_101_MASK (0x00000020u)
  2756. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_101_SHIFT (0x00000005u)
  2757. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_101_RESETVAL (0x00000000u)
  2758. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_102_MASK (0x00000040u)
  2759. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_102_SHIFT (0x00000006u)
  2760. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_102_RESETVAL (0x00000000u)
  2761. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_103_MASK (0x00000080u)
  2762. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_103_SHIFT (0x00000007u)
  2763. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_103_RESETVAL (0x00000000u)
  2764. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_104_MASK (0x00000100u)
  2765. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_104_SHIFT (0x00000008u)
  2766. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_104_RESETVAL (0x00000000u)
  2767. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_105_MASK (0x00000200u)
  2768. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_105_SHIFT (0x00000009u)
  2769. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_105_RESETVAL (0x00000000u)
  2770. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_106_MASK (0x00000400u)
  2771. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_106_SHIFT (0x0000000Au)
  2772. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_106_RESETVAL (0x00000000u)
  2773. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_107_MASK (0x00000800u)
  2774. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_107_SHIFT (0x0000000Bu)
  2775. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_107_RESETVAL (0x00000000u)
  2776. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_108_MASK (0x00001000u)
  2777. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_108_SHIFT (0x0000000Cu)
  2778. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_108_RESETVAL (0x00000000u)
  2779. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_109_MASK (0x00002000u)
  2780. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_109_SHIFT (0x0000000Du)
  2781. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_109_RESETVAL (0x00000000u)
  2782. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_110_MASK (0x00004000u)
  2783. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_110_SHIFT (0x0000000Eu)
  2784. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_110_RESETVAL (0x00000000u)
  2785. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_111_MASK (0x00008000u)
  2786. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_111_SHIFT (0x0000000Fu)
  2787. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_111_RESETVAL (0x00000000u)
  2788. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_112_MASK (0x00010000u)
  2789. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_112_SHIFT (0x00000010u)
  2790. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_112_RESETVAL (0x00000000u)
  2791. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_113_MASK (0x00020000u)
  2792. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_113_SHIFT (0x00000011u)
  2793. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_113_RESETVAL (0x00000000u)
  2794. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_114_MASK (0x00040000u)
  2795. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_114_SHIFT (0x00000012u)
  2796. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_114_RESETVAL (0x00000000u)
  2797. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_115_MASK (0x00080000u)
  2798. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_115_SHIFT (0x00000013u)
  2799. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_115_RESETVAL (0x00000000u)
  2800. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_116_MASK (0x00100000u)
  2801. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_116_SHIFT (0x00000014u)
  2802. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_116_RESETVAL (0x00000000u)
  2803. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_117_MASK (0x00200000u)
  2804. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_117_SHIFT (0x00000015u)
  2805. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_117_RESETVAL (0x00000000u)
  2806. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_118_MASK (0x00400000u)
  2807. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_118_SHIFT (0x00000016u)
  2808. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_118_RESETVAL (0x00000000u)
  2809. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_119_MASK (0x00800000u)
  2810. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_119_SHIFT (0x00000017u)
  2811. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_119_RESETVAL (0x00000000u)
  2812. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_120_MASK (0x01000000u)
  2813. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_120_SHIFT (0x00000018u)
  2814. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_120_RESETVAL (0x00000000u)
  2815. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_121_MASK (0x02000000u)
  2816. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_121_SHIFT (0x00000019u)
  2817. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_121_RESETVAL (0x00000000u)
  2818. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_122_MASK (0x04000000u)
  2819. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_122_SHIFT (0x0000001Au)
  2820. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_122_RESETVAL (0x00000000u)
  2821. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_123_MASK (0x08000000u)
  2822. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_123_SHIFT (0x0000001Bu)
  2823. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_123_RESETVAL (0x00000000u)
  2824. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_124_MASK (0x10000000u)
  2825. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_124_SHIFT (0x0000001Cu)
  2826. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_124_RESETVAL (0x00000000u)
  2827. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_125_MASK (0x20000000u)
  2828. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_125_SHIFT (0x0000001Du)
  2829. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_125_RESETVAL (0x00000000u)
  2830. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_126_MASK (0x40000000u)
  2831. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_126_SHIFT (0x0000001Eu)
  2832. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_126_RESETVAL (0x00000000u)
  2833. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_127_MASK (0x80000000u)
  2834. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_127_SHIFT (0x0000001Fu)
  2835. #define CSL_CPINTC_RAW_STATUS_REG3_RAW_STATUS_127_RESETVAL (0x00000000u)
  2836. #define CSL_CPINTC_RAW_STATUS_REG3_RESETVAL (0x00000000u)
  2837. /* raw_status_reg4 */
  2838. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_128_MASK (0x00000001u)
  2839. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_128_SHIFT (0x00000000u)
  2840. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_128_RESETVAL (0x00000000u)
  2841. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_129_MASK (0x00000002u)
  2842. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_129_SHIFT (0x00000001u)
  2843. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_129_RESETVAL (0x00000000u)
  2844. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_130_MASK (0x00000004u)
  2845. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_130_SHIFT (0x00000002u)
  2846. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_130_RESETVAL (0x00000000u)
  2847. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_131_MASK (0x00000008u)
  2848. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_131_SHIFT (0x00000003u)
  2849. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_131_RESETVAL (0x00000000u)
  2850. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_132_MASK (0x00000010u)
  2851. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_132_SHIFT (0x00000004u)
  2852. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_132_RESETVAL (0x00000000u)
  2853. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_133_MASK (0x00000020u)
  2854. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_133_SHIFT (0x00000005u)
  2855. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_133_RESETVAL (0x00000000u)
  2856. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_134_MASK (0x00000040u)
  2857. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_134_SHIFT (0x00000006u)
  2858. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_134_RESETVAL (0x00000000u)
  2859. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_135_MASK (0x00000080u)
  2860. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_135_SHIFT (0x00000007u)
  2861. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_135_RESETVAL (0x00000000u)
  2862. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_136_MASK (0x00000100u)
  2863. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_136_SHIFT (0x00000008u)
  2864. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_136_RESETVAL (0x00000000u)
  2865. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_137_MASK (0x00000200u)
  2866. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_137_SHIFT (0x00000009u)
  2867. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_137_RESETVAL (0x00000000u)
  2868. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_138_MASK (0x00000400u)
  2869. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_138_SHIFT (0x0000000Au)
  2870. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_138_RESETVAL (0x00000000u)
  2871. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_139_MASK (0x00000800u)
  2872. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_139_SHIFT (0x0000000Bu)
  2873. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_139_RESETVAL (0x00000000u)
  2874. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_140_MASK (0x00001000u)
  2875. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_140_SHIFT (0x0000000Cu)
  2876. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_140_RESETVAL (0x00000000u)
  2877. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_141_MASK (0x00002000u)
  2878. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_141_SHIFT (0x0000000Du)
  2879. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_141_RESETVAL (0x00000000u)
  2880. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_142_MASK (0x00004000u)
  2881. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_142_SHIFT (0x0000000Eu)
  2882. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_142_RESETVAL (0x00000000u)
  2883. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_143_MASK (0x00008000u)
  2884. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_143_SHIFT (0x0000000Fu)
  2885. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_143_RESETVAL (0x00000000u)
  2886. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_144_MASK (0x00010000u)
  2887. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_144_SHIFT (0x00000010u)
  2888. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_144_RESETVAL (0x00000000u)
  2889. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_145_MASK (0x00020000u)
  2890. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_145_SHIFT (0x00000011u)
  2891. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_145_RESETVAL (0x00000000u)
  2892. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_146_MASK (0x00040000u)
  2893. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_146_SHIFT (0x00000012u)
  2894. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_146_RESETVAL (0x00000000u)
  2895. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_147_MASK (0x00080000u)
  2896. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_147_SHIFT (0x00000013u)
  2897. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_147_RESETVAL (0x00000000u)
  2898. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_148_MASK (0x00100000u)
  2899. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_148_SHIFT (0x00000014u)
  2900. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_148_RESETVAL (0x00000000u)
  2901. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_149_MASK (0x00200000u)
  2902. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_149_SHIFT (0x00000015u)
  2903. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_149_RESETVAL (0x00000000u)
  2904. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_150_MASK (0x00400000u)
  2905. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_150_SHIFT (0x00000016u)
  2906. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_150_RESETVAL (0x00000000u)
  2907. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_151_MASK (0x00800000u)
  2908. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_151_SHIFT (0x00000017u)
  2909. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_151_RESETVAL (0x00000000u)
  2910. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_152_MASK (0x01000000u)
  2911. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_152_SHIFT (0x00000018u)
  2912. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_152_RESETVAL (0x00000000u)
  2913. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_153_MASK (0x02000000u)
  2914. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_153_SHIFT (0x00000019u)
  2915. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_153_RESETVAL (0x00000000u)
  2916. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_154_MASK (0x04000000u)
  2917. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_154_SHIFT (0x0000001Au)
  2918. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_154_RESETVAL (0x00000000u)
  2919. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_155_MASK (0x08000000u)
  2920. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_155_SHIFT (0x0000001Bu)
  2921. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_155_RESETVAL (0x00000000u)
  2922. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_156_MASK (0x10000000u)
  2923. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_156_SHIFT (0x0000001Cu)
  2924. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_156_RESETVAL (0x00000000u)
  2925. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_157_MASK (0x20000000u)
  2926. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_157_SHIFT (0x0000001Du)
  2927. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_157_RESETVAL (0x00000000u)
  2928. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_158_MASK (0x40000000u)
  2929. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_158_SHIFT (0x0000001Eu)
  2930. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_158_RESETVAL (0x00000000u)
  2931. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_159_MASK (0x80000000u)
  2932. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_159_SHIFT (0x0000001Fu)
  2933. #define CSL_CPINTC_RAW_STATUS_REG4_RAW_STATUS_159_RESETVAL (0x00000000u)
  2934. #define CSL_CPINTC_RAW_STATUS_REG4_RESETVAL (0x00000000u)
  2935. /* raw_status_reg5 */
  2936. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_160_MASK (0x00000001u)
  2937. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_160_SHIFT (0x00000000u)
  2938. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_160_RESETVAL (0x00000000u)
  2939. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_161_MASK (0x00000002u)
  2940. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_161_SHIFT (0x00000001u)
  2941. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_161_RESETVAL (0x00000000u)
  2942. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_162_MASK (0x00000004u)
  2943. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_162_SHIFT (0x00000002u)
  2944. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_162_RESETVAL (0x00000000u)
  2945. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_163_MASK (0x00000008u)
  2946. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_163_SHIFT (0x00000003u)
  2947. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_163_RESETVAL (0x00000000u)
  2948. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_164_MASK (0x00000010u)
  2949. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_164_SHIFT (0x00000004u)
  2950. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_164_RESETVAL (0x00000000u)
  2951. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_165_MASK (0x00000020u)
  2952. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_165_SHIFT (0x00000005u)
  2953. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_165_RESETVAL (0x00000000u)
  2954. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_166_MASK (0x00000040u)
  2955. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_166_SHIFT (0x00000006u)
  2956. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_166_RESETVAL (0x00000000u)
  2957. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_167_MASK (0x00000080u)
  2958. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_167_SHIFT (0x00000007u)
  2959. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_167_RESETVAL (0x00000000u)
  2960. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_168_MASK (0x00000100u)
  2961. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_168_SHIFT (0x00000008u)
  2962. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_168_RESETVAL (0x00000000u)
  2963. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_169_MASK (0x00000200u)
  2964. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_169_SHIFT (0x00000009u)
  2965. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_169_RESETVAL (0x00000000u)
  2966. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_170_MASK (0x00000400u)
  2967. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_170_SHIFT (0x0000000Au)
  2968. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_170_RESETVAL (0x00000000u)
  2969. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_171_MASK (0x00000800u)
  2970. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_171_SHIFT (0x0000000Bu)
  2971. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_171_RESETVAL (0x00000000u)
  2972. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_172_MASK (0x00001000u)
  2973. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_172_SHIFT (0x0000000Cu)
  2974. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_172_RESETVAL (0x00000000u)
  2975. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_173_MASK (0x00002000u)
  2976. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_173_SHIFT (0x0000000Du)
  2977. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_173_RESETVAL (0x00000000u)
  2978. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_174_MASK (0x00004000u)
  2979. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_174_SHIFT (0x0000000Eu)
  2980. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_174_RESETVAL (0x00000000u)
  2981. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_175_MASK (0x00008000u)
  2982. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_175_SHIFT (0x0000000Fu)
  2983. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_175_RESETVAL (0x00000000u)
  2984. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_176_MASK (0x00010000u)
  2985. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_176_SHIFT (0x00000010u)
  2986. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_176_RESETVAL (0x00000000u)
  2987. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_177_MASK (0x00020000u)
  2988. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_177_SHIFT (0x00000011u)
  2989. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_177_RESETVAL (0x00000000u)
  2990. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_178_MASK (0x00040000u)
  2991. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_178_SHIFT (0x00000012u)
  2992. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_178_RESETVAL (0x00000000u)
  2993. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_179_MASK (0x00080000u)
  2994. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_179_SHIFT (0x00000013u)
  2995. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_179_RESETVAL (0x00000000u)
  2996. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_180_MASK (0x00100000u)
  2997. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_180_SHIFT (0x00000014u)
  2998. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_180_RESETVAL (0x00000000u)
  2999. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_181_MASK (0x00200000u)
  3000. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_181_SHIFT (0x00000015u)
  3001. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_181_RESETVAL (0x00000000u)
  3002. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_182_MASK (0x00400000u)
  3003. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_182_SHIFT (0x00000016u)
  3004. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_182_RESETVAL (0x00000000u)
  3005. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_183_MASK (0x00800000u)
  3006. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_183_SHIFT (0x00000017u)
  3007. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_183_RESETVAL (0x00000000u)
  3008. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_184_MASK (0x01000000u)
  3009. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_184_SHIFT (0x00000018u)
  3010. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_184_RESETVAL (0x00000000u)
  3011. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_185_MASK (0x02000000u)
  3012. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_185_SHIFT (0x00000019u)
  3013. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_185_RESETVAL (0x00000000u)
  3014. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_186_MASK (0x04000000u)
  3015. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_186_SHIFT (0x0000001Au)
  3016. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_186_RESETVAL (0x00000000u)
  3017. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_187_MASK (0x08000000u)
  3018. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_187_SHIFT (0x0000001Bu)
  3019. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_187_RESETVAL (0x00000000u)
  3020. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_188_MASK (0x10000000u)
  3021. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_188_SHIFT (0x0000001Cu)
  3022. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_188_RESETVAL (0x00000000u)
  3023. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_189_MASK (0x20000000u)
  3024. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_189_SHIFT (0x0000001Du)
  3025. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_189_RESETVAL (0x00000000u)
  3026. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_190_MASK (0x40000000u)
  3027. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_190_SHIFT (0x0000001Eu)
  3028. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_190_RESETVAL (0x00000000u)
  3029. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_191_MASK (0x80000000u)
  3030. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_191_SHIFT (0x0000001Fu)
  3031. #define CSL_CPINTC_RAW_STATUS_REG5_RAW_STATUS_191_RESETVAL (0x00000000u)
  3032. #define CSL_CPINTC_RAW_STATUS_REG5_RESETVAL (0x00000000u)
  3033. /* raw_status_reg6 */
  3034. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_192_MASK (0x00000001u)
  3035. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_192_SHIFT (0x00000000u)
  3036. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_192_RESETVAL (0x00000000u)
  3037. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_193_MASK (0x00000002u)
  3038. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_193_SHIFT (0x00000001u)
  3039. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_193_RESETVAL (0x00000000u)
  3040. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_194_MASK (0x00000004u)
  3041. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_194_SHIFT (0x00000002u)
  3042. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_194_RESETVAL (0x00000000u)
  3043. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_195_MASK (0x00000008u)
  3044. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_195_SHIFT (0x00000003u)
  3045. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_195_RESETVAL (0x00000000u)
  3046. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_196_MASK (0x00000010u)
  3047. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_196_SHIFT (0x00000004u)
  3048. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_196_RESETVAL (0x00000000u)
  3049. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_197_MASK (0x00000020u)
  3050. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_197_SHIFT (0x00000005u)
  3051. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_197_RESETVAL (0x00000000u)
  3052. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_198_MASK (0x00000040u)
  3053. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_198_SHIFT (0x00000006u)
  3054. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_198_RESETVAL (0x00000000u)
  3055. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_199_MASK (0x00000080u)
  3056. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_199_SHIFT (0x00000007u)
  3057. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_199_RESETVAL (0x00000000u)
  3058. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_200_MASK (0x00000100u)
  3059. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_200_SHIFT (0x00000008u)
  3060. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_200_RESETVAL (0x00000000u)
  3061. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_201_MASK (0x00000200u)
  3062. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_201_SHIFT (0x00000009u)
  3063. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_201_RESETVAL (0x00000000u)
  3064. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_202_MASK (0x00000400u)
  3065. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_202_SHIFT (0x0000000Au)
  3066. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_202_RESETVAL (0x00000000u)
  3067. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_203_MASK (0x00000800u)
  3068. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_203_SHIFT (0x0000000Bu)
  3069. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_203_RESETVAL (0x00000000u)
  3070. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_204_MASK (0x00001000u)
  3071. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_204_SHIFT (0x0000000Cu)
  3072. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_204_RESETVAL (0x00000000u)
  3073. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_205_MASK (0x00002000u)
  3074. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_205_SHIFT (0x0000000Du)
  3075. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_205_RESETVAL (0x00000000u)
  3076. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_206_MASK (0x00004000u)
  3077. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_206_SHIFT (0x0000000Eu)
  3078. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_206_RESETVAL (0x00000000u)
  3079. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_207_MASK (0x00008000u)
  3080. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_207_SHIFT (0x0000000Fu)
  3081. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_207_RESETVAL (0x00000000u)
  3082. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_208_MASK (0x00010000u)
  3083. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_208_SHIFT (0x00000010u)
  3084. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_208_RESETVAL (0x00000000u)
  3085. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_209_MASK (0x00020000u)
  3086. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_209_SHIFT (0x00000011u)
  3087. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_209_RESETVAL (0x00000000u)
  3088. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_210_MASK (0x00040000u)
  3089. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_210_SHIFT (0x00000012u)
  3090. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_210_RESETVAL (0x00000000u)
  3091. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_211_MASK (0x00080000u)
  3092. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_211_SHIFT (0x00000013u)
  3093. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_211_RESETVAL (0x00000000u)
  3094. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_212_MASK (0x00100000u)
  3095. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_212_SHIFT (0x00000014u)
  3096. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_212_RESETVAL (0x00000000u)
  3097. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_213_MASK (0x00200000u)
  3098. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_213_SHIFT (0x00000015u)
  3099. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_213_RESETVAL (0x00000000u)
  3100. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_214_MASK (0x00400000u)
  3101. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_214_SHIFT (0x00000016u)
  3102. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_214_RESETVAL (0x00000000u)
  3103. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_215_MASK (0x00800000u)
  3104. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_215_SHIFT (0x00000017u)
  3105. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_215_RESETVAL (0x00000000u)
  3106. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_216_MASK (0x01000000u)
  3107. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_216_SHIFT (0x00000018u)
  3108. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_216_RESETVAL (0x00000000u)
  3109. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_217_MASK (0x02000000u)
  3110. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_217_SHIFT (0x00000019u)
  3111. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_217_RESETVAL (0x00000000u)
  3112. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_218_MASK (0x04000000u)
  3113. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_218_SHIFT (0x0000001Au)
  3114. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_218_RESETVAL (0x00000000u)
  3115. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_219_MASK (0x08000000u)
  3116. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_219_SHIFT (0x0000001Bu)
  3117. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_219_RESETVAL (0x00000000u)
  3118. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_220_MASK (0x10000000u)
  3119. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_220_SHIFT (0x0000001Cu)
  3120. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_220_RESETVAL (0x00000000u)
  3121. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_221_MASK (0x20000000u)
  3122. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_221_SHIFT (0x0000001Du)
  3123. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_221_RESETVAL (0x00000000u)
  3124. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_222_MASK (0x40000000u)
  3125. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_222_SHIFT (0x0000001Eu)
  3126. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_222_RESETVAL (0x00000000u)
  3127. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_223_MASK (0x80000000u)
  3128. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_223_SHIFT (0x0000001Fu)
  3129. #define CSL_CPINTC_RAW_STATUS_REG6_RAW_STATUS_223_RESETVAL (0x00000000u)
  3130. #define CSL_CPINTC_RAW_STATUS_REG6_RESETVAL (0x00000000u)
  3131. /* raw_status_reg7 */
  3132. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_224_MASK (0x00000001u)
  3133. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_224_SHIFT (0x00000000u)
  3134. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_224_RESETVAL (0x00000000u)
  3135. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_225_MASK (0x00000002u)
  3136. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_225_SHIFT (0x00000001u)
  3137. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_225_RESETVAL (0x00000000u)
  3138. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_226_MASK (0x00000004u)
  3139. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_226_SHIFT (0x00000002u)
  3140. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_226_RESETVAL (0x00000000u)
  3141. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_227_MASK (0x00000008u)
  3142. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_227_SHIFT (0x00000003u)
  3143. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_227_RESETVAL (0x00000000u)
  3144. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_228_MASK (0x00000010u)
  3145. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_228_SHIFT (0x00000004u)
  3146. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_228_RESETVAL (0x00000000u)
  3147. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_229_MASK (0x00000020u)
  3148. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_229_SHIFT (0x00000005u)
  3149. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_229_RESETVAL (0x00000000u)
  3150. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_230_MASK (0x00000040u)
  3151. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_230_SHIFT (0x00000006u)
  3152. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_230_RESETVAL (0x00000000u)
  3153. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_231_MASK (0x00000080u)
  3154. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_231_SHIFT (0x00000007u)
  3155. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_231_RESETVAL (0x00000000u)
  3156. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_232_MASK (0x00000100u)
  3157. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_232_SHIFT (0x00000008u)
  3158. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_232_RESETVAL (0x00000000u)
  3159. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_233_MASK (0x00000200u)
  3160. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_233_SHIFT (0x00000009u)
  3161. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_233_RESETVAL (0x00000000u)
  3162. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_234_MASK (0x00000400u)
  3163. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_234_SHIFT (0x0000000Au)
  3164. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_234_RESETVAL (0x00000000u)
  3165. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_235_MASK (0x00000800u)
  3166. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_235_SHIFT (0x0000000Bu)
  3167. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_235_RESETVAL (0x00000000u)
  3168. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_236_MASK (0x00001000u)
  3169. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_236_SHIFT (0x0000000Cu)
  3170. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_236_RESETVAL (0x00000000u)
  3171. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_237_MASK (0x00002000u)
  3172. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_237_SHIFT (0x0000000Du)
  3173. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_237_RESETVAL (0x00000000u)
  3174. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_238_MASK (0x00004000u)
  3175. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_238_SHIFT (0x0000000Eu)
  3176. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_238_RESETVAL (0x00000000u)
  3177. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_239_MASK (0x00008000u)
  3178. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_239_SHIFT (0x0000000Fu)
  3179. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_239_RESETVAL (0x00000000u)
  3180. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_240_MASK (0x00010000u)
  3181. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_240_SHIFT (0x00000010u)
  3182. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_240_RESETVAL (0x00000000u)
  3183. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_241_MASK (0x00020000u)
  3184. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_241_SHIFT (0x00000011u)
  3185. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_241_RESETVAL (0x00000000u)
  3186. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_242_MASK (0x00040000u)
  3187. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_242_SHIFT (0x00000012u)
  3188. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_242_RESETVAL (0x00000000u)
  3189. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_243_MASK (0x00080000u)
  3190. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_243_SHIFT (0x00000013u)
  3191. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_243_RESETVAL (0x00000000u)
  3192. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_244_MASK (0x00100000u)
  3193. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_244_SHIFT (0x00000014u)
  3194. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_244_RESETVAL (0x00000000u)
  3195. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_245_MASK (0x00200000u)
  3196. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_245_SHIFT (0x00000015u)
  3197. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_245_RESETVAL (0x00000000u)
  3198. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_246_MASK (0x00400000u)
  3199. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_246_SHIFT (0x00000016u)
  3200. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_246_RESETVAL (0x00000000u)
  3201. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_247_MASK (0x00800000u)
  3202. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_247_SHIFT (0x00000017u)
  3203. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_247_RESETVAL (0x00000000u)
  3204. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_248_MASK (0x01000000u)
  3205. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_248_SHIFT (0x00000018u)
  3206. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_248_RESETVAL (0x00000000u)
  3207. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_249_MASK (0x02000000u)
  3208. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_249_SHIFT (0x00000019u)
  3209. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_249_RESETVAL (0x00000000u)
  3210. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_250_MASK (0x04000000u)
  3211. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_250_SHIFT (0x0000001Au)
  3212. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_250_RESETVAL (0x00000000u)
  3213. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_251_MASK (0x08000000u)
  3214. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_251_SHIFT (0x0000001Bu)
  3215. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_251_RESETVAL (0x00000000u)
  3216. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_252_MASK (0x10000000u)
  3217. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_252_SHIFT (0x0000001Cu)
  3218. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_252_RESETVAL (0x00000000u)
  3219. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_253_MASK (0x20000000u)
  3220. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_253_SHIFT (0x0000001Du)
  3221. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_253_RESETVAL (0x00000000u)
  3222. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_254_MASK (0x40000000u)
  3223. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_254_SHIFT (0x0000001Eu)
  3224. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_254_RESETVAL (0x00000000u)
  3225. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_255_MASK (0x80000000u)
  3226. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_255_SHIFT (0x0000001Fu)
  3227. #define CSL_CPINTC_RAW_STATUS_REG7_RAW_STATUS_255_RESETVAL (0x00000000u)
  3228. #define CSL_CPINTC_RAW_STATUS_REG7_RESETVAL (0x00000000u)
  3229. /* raw_status_reg8 */
  3230. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_256_MASK (0x00000001u)
  3231. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_256_SHIFT (0x00000000u)
  3232. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_256_RESETVAL (0x00000000u)
  3233. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_257_MASK (0x00000002u)
  3234. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_257_SHIFT (0x00000001u)
  3235. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_257_RESETVAL (0x00000000u)
  3236. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_258_MASK (0x00000004u)
  3237. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_258_SHIFT (0x00000002u)
  3238. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_258_RESETVAL (0x00000000u)
  3239. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_259_MASK (0x00000008u)
  3240. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_259_SHIFT (0x00000003u)
  3241. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_259_RESETVAL (0x00000000u)
  3242. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_260_MASK (0x00000010u)
  3243. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_260_SHIFT (0x00000004u)
  3244. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_260_RESETVAL (0x00000000u)
  3245. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_261_MASK (0x00000020u)
  3246. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_261_SHIFT (0x00000005u)
  3247. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_261_RESETVAL (0x00000000u)
  3248. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_262_MASK (0x00000040u)
  3249. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_262_SHIFT (0x00000006u)
  3250. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_262_RESETVAL (0x00000000u)
  3251. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_263_MASK (0x00000080u)
  3252. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_263_SHIFT (0x00000007u)
  3253. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_263_RESETVAL (0x00000000u)
  3254. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_264_MASK (0x00000100u)
  3255. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_264_SHIFT (0x00000008u)
  3256. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_264_RESETVAL (0x00000000u)
  3257. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_265_MASK (0x00000200u)
  3258. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_265_SHIFT (0x00000009u)
  3259. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_265_RESETVAL (0x00000000u)
  3260. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_266_MASK (0x00000400u)
  3261. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_266_SHIFT (0x0000000Au)
  3262. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_266_RESETVAL (0x00000000u)
  3263. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_267_MASK (0x00000800u)
  3264. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_267_SHIFT (0x0000000Bu)
  3265. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_267_RESETVAL (0x00000000u)
  3266. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_268_MASK (0x00001000u)
  3267. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_268_SHIFT (0x0000000Cu)
  3268. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_268_RESETVAL (0x00000000u)
  3269. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_269_MASK (0x00002000u)
  3270. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_269_SHIFT (0x0000000Du)
  3271. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_269_RESETVAL (0x00000000u)
  3272. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_270_MASK (0x00004000u)
  3273. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_270_SHIFT (0x0000000Eu)
  3274. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_270_RESETVAL (0x00000000u)
  3275. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_271_MASK (0x00008000u)
  3276. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_271_SHIFT (0x0000000Fu)
  3277. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_271_RESETVAL (0x00000000u)
  3278. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_272_MASK (0x00010000u)
  3279. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_272_SHIFT (0x00000010u)
  3280. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_272_RESETVAL (0x00000000u)
  3281. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_273_MASK (0x00020000u)
  3282. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_273_SHIFT (0x00000011u)
  3283. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_273_RESETVAL (0x00000000u)
  3284. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_274_MASK (0x00040000u)
  3285. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_274_SHIFT (0x00000012u)
  3286. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_274_RESETVAL (0x00000000u)
  3287. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_275_MASK (0x00080000u)
  3288. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_275_SHIFT (0x00000013u)
  3289. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_275_RESETVAL (0x00000000u)
  3290. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_276_MASK (0x00100000u)
  3291. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_276_SHIFT (0x00000014u)
  3292. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_276_RESETVAL (0x00000000u)
  3293. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_277_MASK (0x00200000u)
  3294. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_277_SHIFT (0x00000015u)
  3295. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_277_RESETVAL (0x00000000u)
  3296. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_278_MASK (0x00400000u)
  3297. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_278_SHIFT (0x00000016u)
  3298. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_278_RESETVAL (0x00000000u)
  3299. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_279_MASK (0x00800000u)
  3300. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_279_SHIFT (0x00000017u)
  3301. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_279_RESETVAL (0x00000000u)
  3302. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_280_MASK (0x01000000u)
  3303. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_280_SHIFT (0x00000018u)
  3304. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_280_RESETVAL (0x00000000u)
  3305. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_281_MASK (0x02000000u)
  3306. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_281_SHIFT (0x00000019u)
  3307. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_281_RESETVAL (0x00000000u)
  3308. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_282_MASK (0x04000000u)
  3309. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_282_SHIFT (0x0000001Au)
  3310. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_282_RESETVAL (0x00000000u)
  3311. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_283_MASK (0x08000000u)
  3312. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_283_SHIFT (0x0000001Bu)
  3313. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_283_RESETVAL (0x00000000u)
  3314. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_284_MASK (0x10000000u)
  3315. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_284_SHIFT (0x0000001Cu)
  3316. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_284_RESETVAL (0x00000000u)
  3317. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_285_MASK (0x20000000u)
  3318. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_285_SHIFT (0x0000001Du)
  3319. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_285_RESETVAL (0x00000000u)
  3320. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_286_MASK (0x40000000u)
  3321. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_286_SHIFT (0x0000001Eu)
  3322. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_286_RESETVAL (0x00000000u)
  3323. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_287_MASK (0x80000000u)
  3324. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_287_SHIFT (0x0000001Fu)
  3325. #define CSL_CPINTC_RAW_STATUS_REG8_RAW_STATUS_287_RESETVAL (0x00000000u)
  3326. #define CSL_CPINTC_RAW_STATUS_REG8_RESETVAL (0x00000000u)
  3327. /* raw_status_reg9 */
  3328. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_288_MASK (0x00000001u)
  3329. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_288_SHIFT (0x00000000u)
  3330. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_288_RESETVAL (0x00000000u)
  3331. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_289_MASK (0x00000002u)
  3332. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_289_SHIFT (0x00000001u)
  3333. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_289_RESETVAL (0x00000000u)
  3334. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_290_MASK (0x00000004u)
  3335. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_290_SHIFT (0x00000002u)
  3336. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_290_RESETVAL (0x00000000u)
  3337. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_291_MASK (0x00000008u)
  3338. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_291_SHIFT (0x00000003u)
  3339. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_291_RESETVAL (0x00000000u)
  3340. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_292_MASK (0x00000010u)
  3341. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_292_SHIFT (0x00000004u)
  3342. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_292_RESETVAL (0x00000000u)
  3343. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_293_MASK (0x00000020u)
  3344. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_293_SHIFT (0x00000005u)
  3345. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_293_RESETVAL (0x00000000u)
  3346. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_294_MASK (0x00000040u)
  3347. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_294_SHIFT (0x00000006u)
  3348. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_294_RESETVAL (0x00000000u)
  3349. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_295_MASK (0x00000080u)
  3350. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_295_SHIFT (0x00000007u)
  3351. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_295_RESETVAL (0x00000000u)
  3352. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_296_MASK (0x00000100u)
  3353. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_296_SHIFT (0x00000008u)
  3354. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_296_RESETVAL (0x00000000u)
  3355. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_297_MASK (0x00000200u)
  3356. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_297_SHIFT (0x00000009u)
  3357. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_297_RESETVAL (0x00000000u)
  3358. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_298_MASK (0x00000400u)
  3359. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_298_SHIFT (0x0000000Au)
  3360. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_298_RESETVAL (0x00000000u)
  3361. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_299_MASK (0x00000800u)
  3362. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_299_SHIFT (0x0000000Bu)
  3363. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_299_RESETVAL (0x00000000u)
  3364. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_300_MASK (0x00001000u)
  3365. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_300_SHIFT (0x0000000Cu)
  3366. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_300_RESETVAL (0x00000000u)
  3367. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_301_MASK (0x00002000u)
  3368. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_301_SHIFT (0x0000000Du)
  3369. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_301_RESETVAL (0x00000000u)
  3370. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_302_MASK (0x00004000u)
  3371. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_302_SHIFT (0x0000000Eu)
  3372. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_302_RESETVAL (0x00000000u)
  3373. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_303_MASK (0x00008000u)
  3374. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_303_SHIFT (0x0000000Fu)
  3375. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_303_RESETVAL (0x00000000u)
  3376. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_304_MASK (0x00010000u)
  3377. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_304_SHIFT (0x00000010u)
  3378. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_304_RESETVAL (0x00000000u)
  3379. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_305_MASK (0x00020000u)
  3380. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_305_SHIFT (0x00000011u)
  3381. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_305_RESETVAL (0x00000000u)
  3382. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_306_MASK (0x00040000u)
  3383. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_306_SHIFT (0x00000012u)
  3384. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_306_RESETVAL (0x00000000u)
  3385. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_307_MASK (0x00080000u)
  3386. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_307_SHIFT (0x00000013u)
  3387. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_307_RESETVAL (0x00000000u)
  3388. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_308_MASK (0x00100000u)
  3389. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_308_SHIFT (0x00000014u)
  3390. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_308_RESETVAL (0x00000000u)
  3391. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_309_MASK (0x00200000u)
  3392. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_309_SHIFT (0x00000015u)
  3393. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_309_RESETVAL (0x00000000u)
  3394. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_310_MASK (0x00400000u)
  3395. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_310_SHIFT (0x00000016u)
  3396. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_310_RESETVAL (0x00000000u)
  3397. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_311_MASK (0x00800000u)
  3398. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_311_SHIFT (0x00000017u)
  3399. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_311_RESETVAL (0x00000000u)
  3400. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_312_MASK (0x01000000u)
  3401. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_312_SHIFT (0x00000018u)
  3402. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_312_RESETVAL (0x00000000u)
  3403. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_313_MASK (0x02000000u)
  3404. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_313_SHIFT (0x00000019u)
  3405. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_313_RESETVAL (0x00000000u)
  3406. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_314_MASK (0x04000000u)
  3407. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_314_SHIFT (0x0000001Au)
  3408. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_314_RESETVAL (0x00000000u)
  3409. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_315_MASK (0x08000000u)
  3410. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_315_SHIFT (0x0000001Bu)
  3411. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_315_RESETVAL (0x00000000u)
  3412. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_316_MASK (0x10000000u)
  3413. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_316_SHIFT (0x0000001Cu)
  3414. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_316_RESETVAL (0x00000000u)
  3415. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_317_MASK (0x20000000u)
  3416. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_317_SHIFT (0x0000001Du)
  3417. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_317_RESETVAL (0x00000000u)
  3418. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_318_MASK (0x40000000u)
  3419. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_318_SHIFT (0x0000001Eu)
  3420. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_318_RESETVAL (0x00000000u)
  3421. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_319_MASK (0x80000000u)
  3422. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_319_SHIFT (0x0000001Fu)
  3423. #define CSL_CPINTC_RAW_STATUS_REG9_RAW_STATUS_319_RESETVAL (0x00000000u)
  3424. #define CSL_CPINTC_RAW_STATUS_REG9_RESETVAL (0x00000000u)
  3425. /* raw_status_reg10 */
  3426. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_320_MASK (0x00000001u)
  3427. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_320_SHIFT (0x00000000u)
  3428. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_320_RESETVAL (0x00000000u)
  3429. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_321_MASK (0x00000002u)
  3430. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_321_SHIFT (0x00000001u)
  3431. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_321_RESETVAL (0x00000000u)
  3432. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_322_MASK (0x00000004u)
  3433. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_322_SHIFT (0x00000002u)
  3434. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_322_RESETVAL (0x00000000u)
  3435. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_323_MASK (0x00000008u)
  3436. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_323_SHIFT (0x00000003u)
  3437. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_323_RESETVAL (0x00000000u)
  3438. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_324_MASK (0x00000010u)
  3439. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_324_SHIFT (0x00000004u)
  3440. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_324_RESETVAL (0x00000000u)
  3441. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_325_MASK (0x00000020u)
  3442. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_325_SHIFT (0x00000005u)
  3443. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_325_RESETVAL (0x00000000u)
  3444. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_326_MASK (0x00000040u)
  3445. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_326_SHIFT (0x00000006u)
  3446. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_326_RESETVAL (0x00000000u)
  3447. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_327_MASK (0x00000080u)
  3448. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_327_SHIFT (0x00000007u)
  3449. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_327_RESETVAL (0x00000000u)
  3450. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_328_MASK (0x00000100u)
  3451. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_328_SHIFT (0x00000008u)
  3452. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_328_RESETVAL (0x00000000u)
  3453. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_329_MASK (0x00000200u)
  3454. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_329_SHIFT (0x00000009u)
  3455. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_329_RESETVAL (0x00000000u)
  3456. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_330_MASK (0x00000400u)
  3457. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_330_SHIFT (0x0000000Au)
  3458. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_330_RESETVAL (0x00000000u)
  3459. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_331_MASK (0x00000800u)
  3460. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_331_SHIFT (0x0000000Bu)
  3461. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_331_RESETVAL (0x00000000u)
  3462. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_332_MASK (0x00001000u)
  3463. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_332_SHIFT (0x0000000Cu)
  3464. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_332_RESETVAL (0x00000000u)
  3465. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_333_MASK (0x00002000u)
  3466. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_333_SHIFT (0x0000000Du)
  3467. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_333_RESETVAL (0x00000000u)
  3468. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_334_MASK (0x00004000u)
  3469. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_334_SHIFT (0x0000000Eu)
  3470. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_334_RESETVAL (0x00000000u)
  3471. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_335_MASK (0x00008000u)
  3472. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_335_SHIFT (0x0000000Fu)
  3473. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_335_RESETVAL (0x00000000u)
  3474. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_336_MASK (0x00010000u)
  3475. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_336_SHIFT (0x00000010u)
  3476. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_336_RESETVAL (0x00000000u)
  3477. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_337_MASK (0x00020000u)
  3478. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_337_SHIFT (0x00000011u)
  3479. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_337_RESETVAL (0x00000000u)
  3480. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_338_MASK (0x00040000u)
  3481. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_338_SHIFT (0x00000012u)
  3482. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_338_RESETVAL (0x00000000u)
  3483. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_339_MASK (0x00080000u)
  3484. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_339_SHIFT (0x00000013u)
  3485. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_339_RESETVAL (0x00000000u)
  3486. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_340_MASK (0x00100000u)
  3487. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_340_SHIFT (0x00000014u)
  3488. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_340_RESETVAL (0x00000000u)
  3489. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_341_MASK (0x00200000u)
  3490. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_341_SHIFT (0x00000015u)
  3491. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_341_RESETVAL (0x00000000u)
  3492. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_342_MASK (0x00400000u)
  3493. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_342_SHIFT (0x00000016u)
  3494. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_342_RESETVAL (0x00000000u)
  3495. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_343_MASK (0x00800000u)
  3496. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_343_SHIFT (0x00000017u)
  3497. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_343_RESETVAL (0x00000000u)
  3498. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_344_MASK (0x01000000u)
  3499. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_344_SHIFT (0x00000018u)
  3500. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_344_RESETVAL (0x00000000u)
  3501. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_345_MASK (0x02000000u)
  3502. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_345_SHIFT (0x00000019u)
  3503. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_345_RESETVAL (0x00000000u)
  3504. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_346_MASK (0x04000000u)
  3505. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_346_SHIFT (0x0000001Au)
  3506. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_346_RESETVAL (0x00000000u)
  3507. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_347_MASK (0x08000000u)
  3508. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_347_SHIFT (0x0000001Bu)
  3509. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_347_RESETVAL (0x00000000u)
  3510. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_348_MASK (0x10000000u)
  3511. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_348_SHIFT (0x0000001Cu)
  3512. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_348_RESETVAL (0x00000000u)
  3513. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_349_MASK (0x20000000u)
  3514. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_349_SHIFT (0x0000001Du)
  3515. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_349_RESETVAL (0x00000000u)
  3516. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_350_MASK (0x40000000u)
  3517. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_350_SHIFT (0x0000001Eu)
  3518. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_350_RESETVAL (0x00000000u)
  3519. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_351_MASK (0x80000000u)
  3520. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_351_SHIFT (0x0000001Fu)
  3521. #define CSL_CPINTC_RAW_STATUS_REG10_RAW_STATUS_351_RESETVAL (0x00000000u)
  3522. #define CSL_CPINTC_RAW_STATUS_REG10_RESETVAL (0x00000000u)
  3523. /* raw_status_reg11 */
  3524. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_352_MASK (0x00000001u)
  3525. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_352_SHIFT (0x00000000u)
  3526. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_352_RESETVAL (0x00000000u)
  3527. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_353_MASK (0x00000002u)
  3528. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_353_SHIFT (0x00000001u)
  3529. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_353_RESETVAL (0x00000000u)
  3530. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_354_MASK (0x00000004u)
  3531. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_354_SHIFT (0x00000002u)
  3532. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_354_RESETVAL (0x00000000u)
  3533. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_355_MASK (0x00000008u)
  3534. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_355_SHIFT (0x00000003u)
  3535. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_355_RESETVAL (0x00000000u)
  3536. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_356_MASK (0x00000010u)
  3537. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_356_SHIFT (0x00000004u)
  3538. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_356_RESETVAL (0x00000000u)
  3539. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_357_MASK (0x00000020u)
  3540. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_357_SHIFT (0x00000005u)
  3541. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_357_RESETVAL (0x00000000u)
  3542. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_358_MASK (0x00000040u)
  3543. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_358_SHIFT (0x00000006u)
  3544. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_358_RESETVAL (0x00000000u)
  3545. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_359_MASK (0x00000080u)
  3546. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_359_SHIFT (0x00000007u)
  3547. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_359_RESETVAL (0x00000000u)
  3548. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_360_MASK (0x00000100u)
  3549. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_360_SHIFT (0x00000008u)
  3550. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_360_RESETVAL (0x00000000u)
  3551. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_361_MASK (0x00000200u)
  3552. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_361_SHIFT (0x00000009u)
  3553. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_361_RESETVAL (0x00000000u)
  3554. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_362_MASK (0x00000400u)
  3555. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_362_SHIFT (0x0000000Au)
  3556. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_362_RESETVAL (0x00000000u)
  3557. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_363_MASK (0x00000800u)
  3558. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_363_SHIFT (0x0000000Bu)
  3559. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_363_RESETVAL (0x00000000u)
  3560. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_364_MASK (0x00001000u)
  3561. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_364_SHIFT (0x0000000Cu)
  3562. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_364_RESETVAL (0x00000000u)
  3563. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_365_MASK (0x00002000u)
  3564. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_365_SHIFT (0x0000000Du)
  3565. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_365_RESETVAL (0x00000000u)
  3566. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_366_MASK (0x00004000u)
  3567. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_366_SHIFT (0x0000000Eu)
  3568. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_366_RESETVAL (0x00000000u)
  3569. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_367_MASK (0x00008000u)
  3570. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_367_SHIFT (0x0000000Fu)
  3571. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_367_RESETVAL (0x00000000u)
  3572. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_368_MASK (0x00010000u)
  3573. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_368_SHIFT (0x00000010u)
  3574. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_368_RESETVAL (0x00000000u)
  3575. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_369_MASK (0x00020000u)
  3576. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_369_SHIFT (0x00000011u)
  3577. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_369_RESETVAL (0x00000000u)
  3578. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_370_MASK (0x00040000u)
  3579. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_370_SHIFT (0x00000012u)
  3580. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_370_RESETVAL (0x00000000u)
  3581. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_371_MASK (0x00080000u)
  3582. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_371_SHIFT (0x00000013u)
  3583. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_371_RESETVAL (0x00000000u)
  3584. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_372_MASK (0x00100000u)
  3585. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_372_SHIFT (0x00000014u)
  3586. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_372_RESETVAL (0x00000000u)
  3587. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_373_MASK (0x00200000u)
  3588. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_373_SHIFT (0x00000015u)
  3589. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_373_RESETVAL (0x00000000u)
  3590. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_374_MASK (0x00400000u)
  3591. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_374_SHIFT (0x00000016u)
  3592. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_374_RESETVAL (0x00000000u)
  3593. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_375_MASK (0x00800000u)
  3594. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_375_SHIFT (0x00000017u)
  3595. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_375_RESETVAL (0x00000000u)
  3596. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_376_MASK (0x01000000u)
  3597. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_376_SHIFT (0x00000018u)
  3598. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_376_RESETVAL (0x00000000u)
  3599. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_377_MASK (0x02000000u)
  3600. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_377_SHIFT (0x00000019u)
  3601. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_377_RESETVAL (0x00000000u)
  3602. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_378_MASK (0x04000000u)
  3603. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_378_SHIFT (0x0000001Au)
  3604. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_378_RESETVAL (0x00000000u)
  3605. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_379_MASK (0x08000000u)
  3606. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_379_SHIFT (0x0000001Bu)
  3607. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_379_RESETVAL (0x00000000u)
  3608. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_380_MASK (0x10000000u)
  3609. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_380_SHIFT (0x0000001Cu)
  3610. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_380_RESETVAL (0x00000000u)
  3611. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_381_MASK (0x20000000u)
  3612. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_381_SHIFT (0x0000001Du)
  3613. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_381_RESETVAL (0x00000000u)
  3614. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_382_MASK (0x40000000u)
  3615. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_382_SHIFT (0x0000001Eu)
  3616. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_382_RESETVAL (0x00000000u)
  3617. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_383_MASK (0x80000000u)
  3618. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_383_SHIFT (0x0000001Fu)
  3619. #define CSL_CPINTC_RAW_STATUS_REG11_RAW_STATUS_383_RESETVAL (0x00000000u)
  3620. #define CSL_CPINTC_RAW_STATUS_REG11_RESETVAL (0x00000000u)
  3621. /* raw_status_reg12 */
  3622. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_384_MASK (0x00000001u)
  3623. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_384_SHIFT (0x00000000u)
  3624. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_384_RESETVAL (0x00000000u)
  3625. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_385_MASK (0x00000002u)
  3626. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_385_SHIFT (0x00000001u)
  3627. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_385_RESETVAL (0x00000000u)
  3628. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_386_MASK (0x00000004u)
  3629. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_386_SHIFT (0x00000002u)
  3630. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_386_RESETVAL (0x00000000u)
  3631. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_387_MASK (0x00000008u)
  3632. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_387_SHIFT (0x00000003u)
  3633. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_387_RESETVAL (0x00000000u)
  3634. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_388_MASK (0x00000010u)
  3635. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_388_SHIFT (0x00000004u)
  3636. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_388_RESETVAL (0x00000000u)
  3637. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_389_MASK (0x00000020u)
  3638. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_389_SHIFT (0x00000005u)
  3639. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_389_RESETVAL (0x00000000u)
  3640. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_390_MASK (0x00000040u)
  3641. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_390_SHIFT (0x00000006u)
  3642. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_390_RESETVAL (0x00000000u)
  3643. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_391_MASK (0x00000080u)
  3644. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_391_SHIFT (0x00000007u)
  3645. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_391_RESETVAL (0x00000000u)
  3646. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_392_MASK (0x00000100u)
  3647. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_392_SHIFT (0x00000008u)
  3648. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_392_RESETVAL (0x00000000u)
  3649. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_393_MASK (0x00000200u)
  3650. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_393_SHIFT (0x00000009u)
  3651. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_393_RESETVAL (0x00000000u)
  3652. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_394_MASK (0x00000400u)
  3653. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_394_SHIFT (0x0000000Au)
  3654. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_394_RESETVAL (0x00000000u)
  3655. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_395_MASK (0x00000800u)
  3656. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_395_SHIFT (0x0000000Bu)
  3657. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_395_RESETVAL (0x00000000u)
  3658. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_396_MASK (0x00001000u)
  3659. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_396_SHIFT (0x0000000Cu)
  3660. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_396_RESETVAL (0x00000000u)
  3661. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_397_MASK (0x00002000u)
  3662. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_397_SHIFT (0x0000000Du)
  3663. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_397_RESETVAL (0x00000000u)
  3664. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_398_MASK (0x00004000u)
  3665. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_398_SHIFT (0x0000000Eu)
  3666. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_398_RESETVAL (0x00000000u)
  3667. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_399_MASK (0x00008000u)
  3668. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_399_SHIFT (0x0000000Fu)
  3669. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_399_RESETVAL (0x00000000u)
  3670. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_400_MASK (0x00010000u)
  3671. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_400_SHIFT (0x00000010u)
  3672. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_400_RESETVAL (0x00000000u)
  3673. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_401_MASK (0x00020000u)
  3674. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_401_SHIFT (0x00000011u)
  3675. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_401_RESETVAL (0x00000000u)
  3676. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_402_MASK (0x00040000u)
  3677. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_402_SHIFT (0x00000012u)
  3678. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_402_RESETVAL (0x00000000u)
  3679. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_403_MASK (0x00080000u)
  3680. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_403_SHIFT (0x00000013u)
  3681. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_403_RESETVAL (0x00000000u)
  3682. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_404_MASK (0x00100000u)
  3683. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_404_SHIFT (0x00000014u)
  3684. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_404_RESETVAL (0x00000000u)
  3685. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_405_MASK (0x00200000u)
  3686. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_405_SHIFT (0x00000015u)
  3687. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_405_RESETVAL (0x00000000u)
  3688. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_406_MASK (0x00400000u)
  3689. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_406_SHIFT (0x00000016u)
  3690. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_406_RESETVAL (0x00000000u)
  3691. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_407_MASK (0x00800000u)
  3692. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_407_SHIFT (0x00000017u)
  3693. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_407_RESETVAL (0x00000000u)
  3694. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_408_MASK (0x01000000u)
  3695. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_408_SHIFT (0x00000018u)
  3696. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_408_RESETVAL (0x00000000u)
  3697. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_409_MASK (0x02000000u)
  3698. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_409_SHIFT (0x00000019u)
  3699. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_409_RESETVAL (0x00000000u)
  3700. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_410_MASK (0x04000000u)
  3701. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_410_SHIFT (0x0000001Au)
  3702. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_410_RESETVAL (0x00000000u)
  3703. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_411_MASK (0x08000000u)
  3704. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_411_SHIFT (0x0000001Bu)
  3705. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_411_RESETVAL (0x00000000u)
  3706. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_412_MASK (0x10000000u)
  3707. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_412_SHIFT (0x0000001Cu)
  3708. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_412_RESETVAL (0x00000000u)
  3709. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_413_MASK (0x20000000u)
  3710. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_413_SHIFT (0x0000001Du)
  3711. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_413_RESETVAL (0x00000000u)
  3712. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_414_MASK (0x40000000u)
  3713. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_414_SHIFT (0x0000001Eu)
  3714. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_414_RESETVAL (0x00000000u)
  3715. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_415_MASK (0x80000000u)
  3716. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_415_SHIFT (0x0000001Fu)
  3717. #define CSL_CPINTC_RAW_STATUS_REG12_RAW_STATUS_415_RESETVAL (0x00000000u)
  3718. #define CSL_CPINTC_RAW_STATUS_REG12_RESETVAL (0x00000000u)
  3719. /* raw_status_reg13 */
  3720. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_416_MASK (0x00000001u)
  3721. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_416_SHIFT (0x00000000u)
  3722. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_416_RESETVAL (0x00000000u)
  3723. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_417_MASK (0x00000002u)
  3724. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_417_SHIFT (0x00000001u)
  3725. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_417_RESETVAL (0x00000000u)
  3726. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_418_MASK (0x00000004u)
  3727. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_418_SHIFT (0x00000002u)
  3728. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_418_RESETVAL (0x00000000u)
  3729. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_419_MASK (0x00000008u)
  3730. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_419_SHIFT (0x00000003u)
  3731. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_419_RESETVAL (0x00000000u)
  3732. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_420_MASK (0x00000010u)
  3733. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_420_SHIFT (0x00000004u)
  3734. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_420_RESETVAL (0x00000000u)
  3735. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_421_MASK (0x00000020u)
  3736. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_421_SHIFT (0x00000005u)
  3737. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_421_RESETVAL (0x00000000u)
  3738. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_422_MASK (0x00000040u)
  3739. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_422_SHIFT (0x00000006u)
  3740. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_422_RESETVAL (0x00000000u)
  3741. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_423_MASK (0x00000080u)
  3742. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_423_SHIFT (0x00000007u)
  3743. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_423_RESETVAL (0x00000000u)
  3744. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_424_MASK (0x00000100u)
  3745. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_424_SHIFT (0x00000008u)
  3746. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_424_RESETVAL (0x00000000u)
  3747. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_425_MASK (0x00000200u)
  3748. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_425_SHIFT (0x00000009u)
  3749. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_425_RESETVAL (0x00000000u)
  3750. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_426_MASK (0x00000400u)
  3751. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_426_SHIFT (0x0000000Au)
  3752. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_426_RESETVAL (0x00000000u)
  3753. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_427_MASK (0x00000800u)
  3754. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_427_SHIFT (0x0000000Bu)
  3755. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_427_RESETVAL (0x00000000u)
  3756. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_428_MASK (0x00001000u)
  3757. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_428_SHIFT (0x0000000Cu)
  3758. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_428_RESETVAL (0x00000000u)
  3759. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_429_MASK (0x00002000u)
  3760. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_429_SHIFT (0x0000000Du)
  3761. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_429_RESETVAL (0x00000000u)
  3762. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_430_MASK (0x00004000u)
  3763. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_430_SHIFT (0x0000000Eu)
  3764. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_430_RESETVAL (0x00000000u)
  3765. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_431_MASK (0x00008000u)
  3766. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_431_SHIFT (0x0000000Fu)
  3767. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_431_RESETVAL (0x00000000u)
  3768. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_432_MASK (0x00010000u)
  3769. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_432_SHIFT (0x00000010u)
  3770. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_432_RESETVAL (0x00000000u)
  3771. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_433_MASK (0x00020000u)
  3772. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_433_SHIFT (0x00000011u)
  3773. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_433_RESETVAL (0x00000000u)
  3774. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_434_MASK (0x00040000u)
  3775. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_434_SHIFT (0x00000012u)
  3776. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_434_RESETVAL (0x00000000u)
  3777. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_435_MASK (0x00080000u)
  3778. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_435_SHIFT (0x00000013u)
  3779. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_435_RESETVAL (0x00000000u)
  3780. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_436_MASK (0x00100000u)
  3781. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_436_SHIFT (0x00000014u)
  3782. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_436_RESETVAL (0x00000000u)
  3783. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_437_MASK (0x00200000u)
  3784. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_437_SHIFT (0x00000015u)
  3785. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_437_RESETVAL (0x00000000u)
  3786. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_438_MASK (0x00400000u)
  3787. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_438_SHIFT (0x00000016u)
  3788. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_438_RESETVAL (0x00000000u)
  3789. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_439_MASK (0x00800000u)
  3790. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_439_SHIFT (0x00000017u)
  3791. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_439_RESETVAL (0x00000000u)
  3792. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_440_MASK (0x01000000u)
  3793. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_440_SHIFT (0x00000018u)
  3794. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_440_RESETVAL (0x00000000u)
  3795. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_441_MASK (0x02000000u)
  3796. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_441_SHIFT (0x00000019u)
  3797. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_441_RESETVAL (0x00000000u)
  3798. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_442_MASK (0x04000000u)
  3799. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_442_SHIFT (0x0000001Au)
  3800. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_442_RESETVAL (0x00000000u)
  3801. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_443_MASK (0x08000000u)
  3802. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_443_SHIFT (0x0000001Bu)
  3803. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_443_RESETVAL (0x00000000u)
  3804. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_444_MASK (0x10000000u)
  3805. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_444_SHIFT (0x0000001Cu)
  3806. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_444_RESETVAL (0x00000000u)
  3807. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_445_MASK (0x20000000u)
  3808. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_445_SHIFT (0x0000001Du)
  3809. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_445_RESETVAL (0x00000000u)
  3810. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_446_MASK (0x40000000u)
  3811. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_446_SHIFT (0x0000001Eu)
  3812. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_446_RESETVAL (0x00000000u)
  3813. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_447_MASK (0x80000000u)
  3814. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_447_SHIFT (0x0000001Fu)
  3815. #define CSL_CPINTC_RAW_STATUS_REG13_RAW_STATUS_447_RESETVAL (0x00000000u)
  3816. #define CSL_CPINTC_RAW_STATUS_REG13_RESETVAL (0x00000000u)
  3817. /* raw_status_reg14 */
  3818. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_448_MASK (0x00000001u)
  3819. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_448_SHIFT (0x00000000u)
  3820. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_448_RESETVAL (0x00000000u)
  3821. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_449_MASK (0x00000002u)
  3822. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_449_SHIFT (0x00000001u)
  3823. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_449_RESETVAL (0x00000000u)
  3824. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_450_MASK (0x00000004u)
  3825. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_450_SHIFT (0x00000002u)
  3826. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_450_RESETVAL (0x00000000u)
  3827. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_451_MASK (0x00000008u)
  3828. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_451_SHIFT (0x00000003u)
  3829. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_451_RESETVAL (0x00000000u)
  3830. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_452_MASK (0x00000010u)
  3831. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_452_SHIFT (0x00000004u)
  3832. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_452_RESETVAL (0x00000000u)
  3833. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_453_MASK (0x00000020u)
  3834. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_453_SHIFT (0x00000005u)
  3835. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_453_RESETVAL (0x00000000u)
  3836. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_454_MASK (0x00000040u)
  3837. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_454_SHIFT (0x00000006u)
  3838. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_454_RESETVAL (0x00000000u)
  3839. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_455_MASK (0x00000080u)
  3840. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_455_SHIFT (0x00000007u)
  3841. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_455_RESETVAL (0x00000000u)
  3842. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_456_MASK (0x00000100u)
  3843. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_456_SHIFT (0x00000008u)
  3844. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_456_RESETVAL (0x00000000u)
  3845. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_457_MASK (0x00000200u)
  3846. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_457_SHIFT (0x00000009u)
  3847. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_457_RESETVAL (0x00000000u)
  3848. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_458_MASK (0x00000400u)
  3849. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_458_SHIFT (0x0000000Au)
  3850. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_458_RESETVAL (0x00000000u)
  3851. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_459_MASK (0x00000800u)
  3852. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_459_SHIFT (0x0000000Bu)
  3853. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_459_RESETVAL (0x00000000u)
  3854. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_460_MASK (0x00001000u)
  3855. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_460_SHIFT (0x0000000Cu)
  3856. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_460_RESETVAL (0x00000000u)
  3857. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_461_MASK (0x00002000u)
  3858. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_461_SHIFT (0x0000000Du)
  3859. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_461_RESETVAL (0x00000000u)
  3860. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_462_MASK (0x00004000u)
  3861. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_462_SHIFT (0x0000000Eu)
  3862. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_462_RESETVAL (0x00000000u)
  3863. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_463_MASK (0x00008000u)
  3864. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_463_SHIFT (0x0000000Fu)
  3865. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_463_RESETVAL (0x00000000u)
  3866. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_464_MASK (0x00010000u)
  3867. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_464_SHIFT (0x00000010u)
  3868. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_464_RESETVAL (0x00000000u)
  3869. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_465_MASK (0x00020000u)
  3870. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_465_SHIFT (0x00000011u)
  3871. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_465_RESETVAL (0x00000000u)
  3872. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_466_MASK (0x00040000u)
  3873. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_466_SHIFT (0x00000012u)
  3874. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_466_RESETVAL (0x00000000u)
  3875. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_467_MASK (0x00080000u)
  3876. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_467_SHIFT (0x00000013u)
  3877. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_467_RESETVAL (0x00000000u)
  3878. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_468_MASK (0x00100000u)
  3879. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_468_SHIFT (0x00000014u)
  3880. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_468_RESETVAL (0x00000000u)
  3881. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_469_MASK (0x00200000u)
  3882. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_469_SHIFT (0x00000015u)
  3883. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_469_RESETVAL (0x00000000u)
  3884. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_470_MASK (0x00400000u)
  3885. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_470_SHIFT (0x00000016u)
  3886. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_470_RESETVAL (0x00000000u)
  3887. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_471_MASK (0x00800000u)
  3888. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_471_SHIFT (0x00000017u)
  3889. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_471_RESETVAL (0x00000000u)
  3890. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_472_MASK (0x01000000u)
  3891. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_472_SHIFT (0x00000018u)
  3892. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_472_RESETVAL (0x00000000u)
  3893. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_473_MASK (0x02000000u)
  3894. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_473_SHIFT (0x00000019u)
  3895. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_473_RESETVAL (0x00000000u)
  3896. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_474_MASK (0x04000000u)
  3897. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_474_SHIFT (0x0000001Au)
  3898. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_474_RESETVAL (0x00000000u)
  3899. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_475_MASK (0x08000000u)
  3900. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_475_SHIFT (0x0000001Bu)
  3901. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_475_RESETVAL (0x00000000u)
  3902. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_476_MASK (0x10000000u)
  3903. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_476_SHIFT (0x0000001Cu)
  3904. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_476_RESETVAL (0x00000000u)
  3905. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_477_MASK (0x20000000u)
  3906. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_477_SHIFT (0x0000001Du)
  3907. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_477_RESETVAL (0x00000000u)
  3908. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_478_MASK (0x40000000u)
  3909. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_478_SHIFT (0x0000001Eu)
  3910. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_478_RESETVAL (0x00000000u)
  3911. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_479_MASK (0x80000000u)
  3912. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_479_SHIFT (0x0000001Fu)
  3913. #define CSL_CPINTC_RAW_STATUS_REG14_RAW_STATUS_479_RESETVAL (0x00000000u)
  3914. #define CSL_CPINTC_RAW_STATUS_REG14_RESETVAL (0x00000000u)
  3915. /* raw_status_reg15 */
  3916. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_480_MASK (0x00000001u)
  3917. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_480_SHIFT (0x00000000u)
  3918. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_480_RESETVAL (0x00000000u)
  3919. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_481_MASK (0x00000002u)
  3920. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_481_SHIFT (0x00000001u)
  3921. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_481_RESETVAL (0x00000000u)
  3922. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_482_MASK (0x00000004u)
  3923. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_482_SHIFT (0x00000002u)
  3924. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_482_RESETVAL (0x00000000u)
  3925. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_483_MASK (0x00000008u)
  3926. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_483_SHIFT (0x00000003u)
  3927. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_483_RESETVAL (0x00000000u)
  3928. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_484_MASK (0x00000010u)
  3929. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_484_SHIFT (0x00000004u)
  3930. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_484_RESETVAL (0x00000000u)
  3931. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_485_MASK (0x00000020u)
  3932. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_485_SHIFT (0x00000005u)
  3933. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_485_RESETVAL (0x00000000u)
  3934. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_486_MASK (0x00000040u)
  3935. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_486_SHIFT (0x00000006u)
  3936. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_486_RESETVAL (0x00000000u)
  3937. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_487_MASK (0x00000080u)
  3938. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_487_SHIFT (0x00000007u)
  3939. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_487_RESETVAL (0x00000000u)
  3940. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_488_MASK (0x00000100u)
  3941. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_488_SHIFT (0x00000008u)
  3942. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_488_RESETVAL (0x00000000u)
  3943. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_489_MASK (0x00000200u)
  3944. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_489_SHIFT (0x00000009u)
  3945. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_489_RESETVAL (0x00000000u)
  3946. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_490_MASK (0x00000400u)
  3947. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_490_SHIFT (0x0000000Au)
  3948. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_490_RESETVAL (0x00000000u)
  3949. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_491_MASK (0x00000800u)
  3950. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_491_SHIFT (0x0000000Bu)
  3951. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_491_RESETVAL (0x00000000u)
  3952. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_492_MASK (0x00001000u)
  3953. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_492_SHIFT (0x0000000Cu)
  3954. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_492_RESETVAL (0x00000000u)
  3955. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_493_MASK (0x00002000u)
  3956. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_493_SHIFT (0x0000000Du)
  3957. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_493_RESETVAL (0x00000000u)
  3958. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_494_MASK (0x00004000u)
  3959. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_494_SHIFT (0x0000000Eu)
  3960. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_494_RESETVAL (0x00000000u)
  3961. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_495_MASK (0x00008000u)
  3962. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_495_SHIFT (0x0000000Fu)
  3963. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_495_RESETVAL (0x00000000u)
  3964. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_496_MASK (0x00010000u)
  3965. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_496_SHIFT (0x00000010u)
  3966. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_496_RESETVAL (0x00000000u)
  3967. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_497_MASK (0x00020000u)
  3968. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_497_SHIFT (0x00000011u)
  3969. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_497_RESETVAL (0x00000000u)
  3970. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_498_MASK (0x00040000u)
  3971. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_498_SHIFT (0x00000012u)
  3972. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_498_RESETVAL (0x00000000u)
  3973. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_499_MASK (0x00080000u)
  3974. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_499_SHIFT (0x00000013u)
  3975. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_499_RESETVAL (0x00000000u)
  3976. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_500_MASK (0x00100000u)
  3977. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_500_SHIFT (0x00000014u)
  3978. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_500_RESETVAL (0x00000000u)
  3979. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_501_MASK (0x00200000u)
  3980. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_501_SHIFT (0x00000015u)
  3981. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_501_RESETVAL (0x00000000u)
  3982. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_502_MASK (0x00400000u)
  3983. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_502_SHIFT (0x00000016u)
  3984. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_502_RESETVAL (0x00000000u)
  3985. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_503_MASK (0x00800000u)
  3986. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_503_SHIFT (0x00000017u)
  3987. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_503_RESETVAL (0x00000000u)
  3988. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_504_MASK (0x01000000u)
  3989. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_504_SHIFT (0x00000018u)
  3990. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_504_RESETVAL (0x00000000u)
  3991. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_505_MASK (0x02000000u)
  3992. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_505_SHIFT (0x00000019u)
  3993. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_505_RESETVAL (0x00000000u)
  3994. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_506_MASK (0x04000000u)
  3995. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_506_SHIFT (0x0000001Au)
  3996. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_506_RESETVAL (0x00000000u)
  3997. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_507_MASK (0x08000000u)
  3998. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_507_SHIFT (0x0000001Bu)
  3999. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_507_RESETVAL (0x00000000u)
  4000. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_508_MASK (0x10000000u)
  4001. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_508_SHIFT (0x0000001Cu)
  4002. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_508_RESETVAL (0x00000000u)
  4003. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_509_MASK (0x20000000u)
  4004. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_509_SHIFT (0x0000001Du)
  4005. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_509_RESETVAL (0x00000000u)
  4006. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_510_MASK (0x40000000u)
  4007. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_510_SHIFT (0x0000001Eu)
  4008. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_510_RESETVAL (0x00000000u)
  4009. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_511_MASK (0x80000000u)
  4010. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_511_SHIFT (0x0000001Fu)
  4011. #define CSL_CPINTC_RAW_STATUS_REG15_RAW_STATUS_511_RESETVAL (0x00000000u)
  4012. #define CSL_CPINTC_RAW_STATUS_REG15_RESETVAL (0x00000000u)
  4013. /* raw_status_reg16 */
  4014. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_512_MASK (0x00000001u)
  4015. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_512_SHIFT (0x00000000u)
  4016. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_512_RESETVAL (0x00000000u)
  4017. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_513_MASK (0x00000002u)
  4018. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_513_SHIFT (0x00000001u)
  4019. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_513_RESETVAL (0x00000000u)
  4020. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_514_MASK (0x00000004u)
  4021. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_514_SHIFT (0x00000002u)
  4022. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_514_RESETVAL (0x00000000u)
  4023. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_515_MASK (0x00000008u)
  4024. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_515_SHIFT (0x00000003u)
  4025. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_515_RESETVAL (0x00000000u)
  4026. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_516_MASK (0x00000010u)
  4027. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_516_SHIFT (0x00000004u)
  4028. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_516_RESETVAL (0x00000000u)
  4029. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_517_MASK (0x00000020u)
  4030. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_517_SHIFT (0x00000005u)
  4031. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_517_RESETVAL (0x00000000u)
  4032. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_518_MASK (0x00000040u)
  4033. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_518_SHIFT (0x00000006u)
  4034. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_518_RESETVAL (0x00000000u)
  4035. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_519_MASK (0x00000080u)
  4036. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_519_SHIFT (0x00000007u)
  4037. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_519_RESETVAL (0x00000000u)
  4038. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_520_MASK (0x00000100u)
  4039. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_520_SHIFT (0x00000008u)
  4040. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_520_RESETVAL (0x00000000u)
  4041. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_521_MASK (0x00000200u)
  4042. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_521_SHIFT (0x00000009u)
  4043. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_521_RESETVAL (0x00000000u)
  4044. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_522_MASK (0x00000400u)
  4045. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_522_SHIFT (0x0000000Au)
  4046. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_522_RESETVAL (0x00000000u)
  4047. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_523_MASK (0x00000800u)
  4048. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_523_SHIFT (0x0000000Bu)
  4049. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_523_RESETVAL (0x00000000u)
  4050. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_524_MASK (0x00001000u)
  4051. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_524_SHIFT (0x0000000Cu)
  4052. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_524_RESETVAL (0x00000000u)
  4053. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_525_MASK (0x00002000u)
  4054. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_525_SHIFT (0x0000000Du)
  4055. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_525_RESETVAL (0x00000000u)
  4056. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_526_MASK (0x00004000u)
  4057. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_526_SHIFT (0x0000000Eu)
  4058. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_526_RESETVAL (0x00000000u)
  4059. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_527_MASK (0x00008000u)
  4060. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_527_SHIFT (0x0000000Fu)
  4061. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_527_RESETVAL (0x00000000u)
  4062. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_528_MASK (0x00010000u)
  4063. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_528_SHIFT (0x00000010u)
  4064. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_528_RESETVAL (0x00000000u)
  4065. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_529_MASK (0x00020000u)
  4066. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_529_SHIFT (0x00000011u)
  4067. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_529_RESETVAL (0x00000000u)
  4068. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_530_MASK (0x00040000u)
  4069. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_530_SHIFT (0x00000012u)
  4070. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_530_RESETVAL (0x00000000u)
  4071. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_531_MASK (0x00080000u)
  4072. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_531_SHIFT (0x00000013u)
  4073. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_531_RESETVAL (0x00000000u)
  4074. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_532_MASK (0x00100000u)
  4075. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_532_SHIFT (0x00000014u)
  4076. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_532_RESETVAL (0x00000000u)
  4077. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_533_MASK (0x00200000u)
  4078. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_533_SHIFT (0x00000015u)
  4079. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_533_RESETVAL (0x00000000u)
  4080. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_534_MASK (0x00400000u)
  4081. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_534_SHIFT (0x00000016u)
  4082. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_534_RESETVAL (0x00000000u)
  4083. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_535_MASK (0x00800000u)
  4084. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_535_SHIFT (0x00000017u)
  4085. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_535_RESETVAL (0x00000000u)
  4086. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_536_MASK (0x01000000u)
  4087. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_536_SHIFT (0x00000018u)
  4088. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_536_RESETVAL (0x00000000u)
  4089. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_537_MASK (0x02000000u)
  4090. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_537_SHIFT (0x00000019u)
  4091. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_537_RESETVAL (0x00000000u)
  4092. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_538_MASK (0x04000000u)
  4093. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_538_SHIFT (0x0000001Au)
  4094. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_538_RESETVAL (0x00000000u)
  4095. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_539_MASK (0x08000000u)
  4096. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_539_SHIFT (0x0000001Bu)
  4097. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_539_RESETVAL (0x00000000u)
  4098. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_540_MASK (0x10000000u)
  4099. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_540_SHIFT (0x0000001Cu)
  4100. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_540_RESETVAL (0x00000000u)
  4101. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_541_MASK (0x20000000u)
  4102. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_541_SHIFT (0x0000001Du)
  4103. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_541_RESETVAL (0x00000000u)
  4104. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_542_MASK (0x40000000u)
  4105. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_542_SHIFT (0x0000001Eu)
  4106. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_542_RESETVAL (0x00000000u)
  4107. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_543_MASK (0x80000000u)
  4108. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_543_SHIFT (0x0000001Fu)
  4109. #define CSL_CPINTC_RAW_STATUS_REG16_RAW_STATUS_543_RESETVAL (0x00000000u)
  4110. #define CSL_CPINTC_RAW_STATUS_REG16_RESETVAL (0x00000000u)
  4111. /* raw_status_reg17 */
  4112. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_544_MASK (0x00000001u)
  4113. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_544_SHIFT (0x00000000u)
  4114. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_544_RESETVAL (0x00000000u)
  4115. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_545_MASK (0x00000002u)
  4116. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_545_SHIFT (0x00000001u)
  4117. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_545_RESETVAL (0x00000000u)
  4118. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_546_MASK (0x00000004u)
  4119. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_546_SHIFT (0x00000002u)
  4120. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_546_RESETVAL (0x00000000u)
  4121. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_547_MASK (0x00000008u)
  4122. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_547_SHIFT (0x00000003u)
  4123. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_547_RESETVAL (0x00000000u)
  4124. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_548_MASK (0x00000010u)
  4125. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_548_SHIFT (0x00000004u)
  4126. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_548_RESETVAL (0x00000000u)
  4127. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_549_MASK (0x00000020u)
  4128. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_549_SHIFT (0x00000005u)
  4129. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_549_RESETVAL (0x00000000u)
  4130. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_550_MASK (0x00000040u)
  4131. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_550_SHIFT (0x00000006u)
  4132. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_550_RESETVAL (0x00000000u)
  4133. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_551_MASK (0x00000080u)
  4134. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_551_SHIFT (0x00000007u)
  4135. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_551_RESETVAL (0x00000000u)
  4136. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_552_MASK (0x00000100u)
  4137. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_552_SHIFT (0x00000008u)
  4138. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_552_RESETVAL (0x00000000u)
  4139. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_553_MASK (0x00000200u)
  4140. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_553_SHIFT (0x00000009u)
  4141. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_553_RESETVAL (0x00000000u)
  4142. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_554_MASK (0x00000400u)
  4143. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_554_SHIFT (0x0000000Au)
  4144. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_554_RESETVAL (0x00000000u)
  4145. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_555_MASK (0x00000800u)
  4146. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_555_SHIFT (0x0000000Bu)
  4147. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_555_RESETVAL (0x00000000u)
  4148. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_556_MASK (0x00001000u)
  4149. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_556_SHIFT (0x0000000Cu)
  4150. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_556_RESETVAL (0x00000000u)
  4151. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_557_MASK (0x00002000u)
  4152. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_557_SHIFT (0x0000000Du)
  4153. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_557_RESETVAL (0x00000000u)
  4154. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_558_MASK (0x00004000u)
  4155. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_558_SHIFT (0x0000000Eu)
  4156. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_558_RESETVAL (0x00000000u)
  4157. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_559_MASK (0x00008000u)
  4158. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_559_SHIFT (0x0000000Fu)
  4159. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_559_RESETVAL (0x00000000u)
  4160. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_560_MASK (0x00010000u)
  4161. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_560_SHIFT (0x00000010u)
  4162. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_560_RESETVAL (0x00000000u)
  4163. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_561_MASK (0x00020000u)
  4164. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_561_SHIFT (0x00000011u)
  4165. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_561_RESETVAL (0x00000000u)
  4166. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_562_MASK (0x00040000u)
  4167. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_562_SHIFT (0x00000012u)
  4168. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_562_RESETVAL (0x00000000u)
  4169. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_563_MASK (0x00080000u)
  4170. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_563_SHIFT (0x00000013u)
  4171. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_563_RESETVAL (0x00000000u)
  4172. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_564_MASK (0x00100000u)
  4173. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_564_SHIFT (0x00000014u)
  4174. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_564_RESETVAL (0x00000000u)
  4175. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_565_MASK (0x00200000u)
  4176. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_565_SHIFT (0x00000015u)
  4177. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_565_RESETVAL (0x00000000u)
  4178. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_566_MASK (0x00400000u)
  4179. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_566_SHIFT (0x00000016u)
  4180. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_566_RESETVAL (0x00000000u)
  4181. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_567_MASK (0x00800000u)
  4182. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_567_SHIFT (0x00000017u)
  4183. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_567_RESETVAL (0x00000000u)
  4184. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_568_MASK (0x01000000u)
  4185. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_568_SHIFT (0x00000018u)
  4186. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_568_RESETVAL (0x00000000u)
  4187. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_569_MASK (0x02000000u)
  4188. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_569_SHIFT (0x00000019u)
  4189. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_569_RESETVAL (0x00000000u)
  4190. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_570_MASK (0x04000000u)
  4191. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_570_SHIFT (0x0000001Au)
  4192. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_570_RESETVAL (0x00000000u)
  4193. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_571_MASK (0x08000000u)
  4194. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_571_SHIFT (0x0000001Bu)
  4195. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_571_RESETVAL (0x00000000u)
  4196. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_572_MASK (0x10000000u)
  4197. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_572_SHIFT (0x0000001Cu)
  4198. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_572_RESETVAL (0x00000000u)
  4199. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_573_MASK (0x20000000u)
  4200. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_573_SHIFT (0x0000001Du)
  4201. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_573_RESETVAL (0x00000000u)
  4202. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_574_MASK (0x40000000u)
  4203. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_574_SHIFT (0x0000001Eu)
  4204. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_574_RESETVAL (0x00000000u)
  4205. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_575_MASK (0x80000000u)
  4206. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_575_SHIFT (0x0000001Fu)
  4207. #define CSL_CPINTC_RAW_STATUS_REG17_RAW_STATUS_575_RESETVAL (0x00000000u)
  4208. #define CSL_CPINTC_RAW_STATUS_REG17_RESETVAL (0x00000000u)
  4209. /* raw_status_reg18 */
  4210. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_576_MASK (0x00000001u)
  4211. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_576_SHIFT (0x00000000u)
  4212. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_576_RESETVAL (0x00000000u)
  4213. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_577_MASK (0x00000002u)
  4214. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_577_SHIFT (0x00000001u)
  4215. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_577_RESETVAL (0x00000000u)
  4216. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_578_MASK (0x00000004u)
  4217. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_578_SHIFT (0x00000002u)
  4218. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_578_RESETVAL (0x00000000u)
  4219. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_579_MASK (0x00000008u)
  4220. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_579_SHIFT (0x00000003u)
  4221. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_579_RESETVAL (0x00000000u)
  4222. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_580_MASK (0x00000010u)
  4223. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_580_SHIFT (0x00000004u)
  4224. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_580_RESETVAL (0x00000000u)
  4225. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_581_MASK (0x00000020u)
  4226. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_581_SHIFT (0x00000005u)
  4227. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_581_RESETVAL (0x00000000u)
  4228. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_582_MASK (0x00000040u)
  4229. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_582_SHIFT (0x00000006u)
  4230. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_582_RESETVAL (0x00000000u)
  4231. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_583_MASK (0x00000080u)
  4232. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_583_SHIFT (0x00000007u)
  4233. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_583_RESETVAL (0x00000000u)
  4234. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_584_MASK (0x00000100u)
  4235. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_584_SHIFT (0x00000008u)
  4236. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_584_RESETVAL (0x00000000u)
  4237. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_585_MASK (0x00000200u)
  4238. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_585_SHIFT (0x00000009u)
  4239. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_585_RESETVAL (0x00000000u)
  4240. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_586_MASK (0x00000400u)
  4241. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_586_SHIFT (0x0000000Au)
  4242. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_586_RESETVAL (0x00000000u)
  4243. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_587_MASK (0x00000800u)
  4244. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_587_SHIFT (0x0000000Bu)
  4245. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_587_RESETVAL (0x00000000u)
  4246. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_588_MASK (0x00001000u)
  4247. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_588_SHIFT (0x0000000Cu)
  4248. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_588_RESETVAL (0x00000000u)
  4249. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_589_MASK (0x00002000u)
  4250. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_589_SHIFT (0x0000000Du)
  4251. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_589_RESETVAL (0x00000000u)
  4252. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_590_MASK (0x00004000u)
  4253. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_590_SHIFT (0x0000000Eu)
  4254. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_590_RESETVAL (0x00000000u)
  4255. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_591_MASK (0x00008000u)
  4256. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_591_SHIFT (0x0000000Fu)
  4257. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_591_RESETVAL (0x00000000u)
  4258. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_592_MASK (0x00010000u)
  4259. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_592_SHIFT (0x00000010u)
  4260. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_592_RESETVAL (0x00000000u)
  4261. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_593_MASK (0x00020000u)
  4262. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_593_SHIFT (0x00000011u)
  4263. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_593_RESETVAL (0x00000000u)
  4264. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_594_MASK (0x00040000u)
  4265. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_594_SHIFT (0x00000012u)
  4266. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_594_RESETVAL (0x00000000u)
  4267. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_595_MASK (0x00080000u)
  4268. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_595_SHIFT (0x00000013u)
  4269. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_595_RESETVAL (0x00000000u)
  4270. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_596_MASK (0x00100000u)
  4271. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_596_SHIFT (0x00000014u)
  4272. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_596_RESETVAL (0x00000000u)
  4273. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_597_MASK (0x00200000u)
  4274. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_597_SHIFT (0x00000015u)
  4275. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_597_RESETVAL (0x00000000u)
  4276. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_598_MASK (0x00400000u)
  4277. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_598_SHIFT (0x00000016u)
  4278. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_598_RESETVAL (0x00000000u)
  4279. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_599_MASK (0x00800000u)
  4280. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_599_SHIFT (0x00000017u)
  4281. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_599_RESETVAL (0x00000000u)
  4282. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_600_MASK (0x01000000u)
  4283. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_600_SHIFT (0x00000018u)
  4284. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_600_RESETVAL (0x00000000u)
  4285. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_601_MASK (0x02000000u)
  4286. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_601_SHIFT (0x00000019u)
  4287. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_601_RESETVAL (0x00000000u)
  4288. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_602_MASK (0x04000000u)
  4289. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_602_SHIFT (0x0000001Au)
  4290. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_602_RESETVAL (0x00000000u)
  4291. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_603_MASK (0x08000000u)
  4292. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_603_SHIFT (0x0000001Bu)
  4293. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_603_RESETVAL (0x00000000u)
  4294. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_604_MASK (0x10000000u)
  4295. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_604_SHIFT (0x0000001Cu)
  4296. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_604_RESETVAL (0x00000000u)
  4297. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_605_MASK (0x20000000u)
  4298. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_605_SHIFT (0x0000001Du)
  4299. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_605_RESETVAL (0x00000000u)
  4300. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_606_MASK (0x40000000u)
  4301. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_606_SHIFT (0x0000001Eu)
  4302. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_606_RESETVAL (0x00000000u)
  4303. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_607_MASK (0x80000000u)
  4304. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_607_SHIFT (0x0000001Fu)
  4305. #define CSL_CPINTC_RAW_STATUS_REG18_RAW_STATUS_607_RESETVAL (0x00000000u)
  4306. #define CSL_CPINTC_RAW_STATUS_REG18_RESETVAL (0x00000000u)
  4307. /* raw_status_reg19 */
  4308. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_608_MASK (0x00000001u)
  4309. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_608_SHIFT (0x00000000u)
  4310. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_608_RESETVAL (0x00000000u)
  4311. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_609_MASK (0x00000002u)
  4312. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_609_SHIFT (0x00000001u)
  4313. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_609_RESETVAL (0x00000000u)
  4314. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_610_MASK (0x00000004u)
  4315. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_610_SHIFT (0x00000002u)
  4316. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_610_RESETVAL (0x00000000u)
  4317. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_611_MASK (0x00000008u)
  4318. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_611_SHIFT (0x00000003u)
  4319. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_611_RESETVAL (0x00000000u)
  4320. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_612_MASK (0x00000010u)
  4321. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_612_SHIFT (0x00000004u)
  4322. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_612_RESETVAL (0x00000000u)
  4323. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_613_MASK (0x00000020u)
  4324. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_613_SHIFT (0x00000005u)
  4325. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_613_RESETVAL (0x00000000u)
  4326. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_614_MASK (0x00000040u)
  4327. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_614_SHIFT (0x00000006u)
  4328. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_614_RESETVAL (0x00000000u)
  4329. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_615_MASK (0x00000080u)
  4330. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_615_SHIFT (0x00000007u)
  4331. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_615_RESETVAL (0x00000000u)
  4332. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_616_MASK (0x00000100u)
  4333. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_616_SHIFT (0x00000008u)
  4334. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_616_RESETVAL (0x00000000u)
  4335. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_617_MASK (0x00000200u)
  4336. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_617_SHIFT (0x00000009u)
  4337. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_617_RESETVAL (0x00000000u)
  4338. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_618_MASK (0x00000400u)
  4339. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_618_SHIFT (0x0000000Au)
  4340. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_618_RESETVAL (0x00000000u)
  4341. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_619_MASK (0x00000800u)
  4342. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_619_SHIFT (0x0000000Bu)
  4343. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_619_RESETVAL (0x00000000u)
  4344. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_620_MASK (0x00001000u)
  4345. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_620_SHIFT (0x0000000Cu)
  4346. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_620_RESETVAL (0x00000000u)
  4347. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_621_MASK (0x00002000u)
  4348. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_621_SHIFT (0x0000000Du)
  4349. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_621_RESETVAL (0x00000000u)
  4350. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_622_MASK (0x00004000u)
  4351. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_622_SHIFT (0x0000000Eu)
  4352. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_622_RESETVAL (0x00000000u)
  4353. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_623_MASK (0x00008000u)
  4354. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_623_SHIFT (0x0000000Fu)
  4355. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_623_RESETVAL (0x00000000u)
  4356. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_624_MASK (0x00010000u)
  4357. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_624_SHIFT (0x00000010u)
  4358. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_624_RESETVAL (0x00000000u)
  4359. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_625_MASK (0x00020000u)
  4360. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_625_SHIFT (0x00000011u)
  4361. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_625_RESETVAL (0x00000000u)
  4362. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_626_MASK (0x00040000u)
  4363. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_626_SHIFT (0x00000012u)
  4364. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_626_RESETVAL (0x00000000u)
  4365. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_627_MASK (0x00080000u)
  4366. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_627_SHIFT (0x00000013u)
  4367. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_627_RESETVAL (0x00000000u)
  4368. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_628_MASK (0x00100000u)
  4369. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_628_SHIFT (0x00000014u)
  4370. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_628_RESETVAL (0x00000000u)
  4371. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_629_MASK (0x00200000u)
  4372. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_629_SHIFT (0x00000015u)
  4373. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_629_RESETVAL (0x00000000u)
  4374. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_630_MASK (0x00400000u)
  4375. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_630_SHIFT (0x00000016u)
  4376. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_630_RESETVAL (0x00000000u)
  4377. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_631_MASK (0x00800000u)
  4378. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_631_SHIFT (0x00000017u)
  4379. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_631_RESETVAL (0x00000000u)
  4380. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_632_MASK (0x01000000u)
  4381. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_632_SHIFT (0x00000018u)
  4382. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_632_RESETVAL (0x00000000u)
  4383. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_633_MASK (0x02000000u)
  4384. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_633_SHIFT (0x00000019u)
  4385. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_633_RESETVAL (0x00000000u)
  4386. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_634_MASK (0x04000000u)
  4387. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_634_SHIFT (0x0000001Au)
  4388. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_634_RESETVAL (0x00000000u)
  4389. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_635_MASK (0x08000000u)
  4390. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_635_SHIFT (0x0000001Bu)
  4391. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_635_RESETVAL (0x00000000u)
  4392. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_636_MASK (0x10000000u)
  4393. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_636_SHIFT (0x0000001Cu)
  4394. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_636_RESETVAL (0x00000000u)
  4395. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_637_MASK (0x20000000u)
  4396. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_637_SHIFT (0x0000001Du)
  4397. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_637_RESETVAL (0x00000000u)
  4398. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_638_MASK (0x40000000u)
  4399. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_638_SHIFT (0x0000001Eu)
  4400. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_638_RESETVAL (0x00000000u)
  4401. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_639_MASK (0x80000000u)
  4402. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_639_SHIFT (0x0000001Fu)
  4403. #define CSL_CPINTC_RAW_STATUS_REG19_RAW_STATUS_639_RESETVAL (0x00000000u)
  4404. #define CSL_CPINTC_RAW_STATUS_REG19_RESETVAL (0x00000000u)
  4405. /* raw_status_reg20 */
  4406. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_640_MASK (0x00000001u)
  4407. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_640_SHIFT (0x00000000u)
  4408. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_640_RESETVAL (0x00000000u)
  4409. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_641_MASK (0x00000002u)
  4410. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_641_SHIFT (0x00000001u)
  4411. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_641_RESETVAL (0x00000000u)
  4412. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_642_MASK (0x00000004u)
  4413. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_642_SHIFT (0x00000002u)
  4414. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_642_RESETVAL (0x00000000u)
  4415. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_643_MASK (0x00000008u)
  4416. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_643_SHIFT (0x00000003u)
  4417. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_643_RESETVAL (0x00000000u)
  4418. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_644_MASK (0x00000010u)
  4419. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_644_SHIFT (0x00000004u)
  4420. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_644_RESETVAL (0x00000000u)
  4421. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_645_MASK (0x00000020u)
  4422. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_645_SHIFT (0x00000005u)
  4423. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_645_RESETVAL (0x00000000u)
  4424. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_646_MASK (0x00000040u)
  4425. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_646_SHIFT (0x00000006u)
  4426. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_646_RESETVAL (0x00000000u)
  4427. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_647_MASK (0x00000080u)
  4428. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_647_SHIFT (0x00000007u)
  4429. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_647_RESETVAL (0x00000000u)
  4430. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_648_MASK (0x00000100u)
  4431. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_648_SHIFT (0x00000008u)
  4432. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_648_RESETVAL (0x00000000u)
  4433. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_649_MASK (0x00000200u)
  4434. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_649_SHIFT (0x00000009u)
  4435. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_649_RESETVAL (0x00000000u)
  4436. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_650_MASK (0x00000400u)
  4437. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_650_SHIFT (0x0000000Au)
  4438. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_650_RESETVAL (0x00000000u)
  4439. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_651_MASK (0x00000800u)
  4440. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_651_SHIFT (0x0000000Bu)
  4441. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_651_RESETVAL (0x00000000u)
  4442. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_652_MASK (0x00001000u)
  4443. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_652_SHIFT (0x0000000Cu)
  4444. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_652_RESETVAL (0x00000000u)
  4445. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_653_MASK (0x00002000u)
  4446. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_653_SHIFT (0x0000000Du)
  4447. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_653_RESETVAL (0x00000000u)
  4448. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_654_MASK (0x00004000u)
  4449. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_654_SHIFT (0x0000000Eu)
  4450. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_654_RESETVAL (0x00000000u)
  4451. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_655_MASK (0x00008000u)
  4452. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_655_SHIFT (0x0000000Fu)
  4453. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_655_RESETVAL (0x00000000u)
  4454. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_656_MASK (0x00010000u)
  4455. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_656_SHIFT (0x00000010u)
  4456. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_656_RESETVAL (0x00000000u)
  4457. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_657_MASK (0x00020000u)
  4458. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_657_SHIFT (0x00000011u)
  4459. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_657_RESETVAL (0x00000000u)
  4460. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_658_MASK (0x00040000u)
  4461. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_658_SHIFT (0x00000012u)
  4462. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_658_RESETVAL (0x00000000u)
  4463. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_659_MASK (0x00080000u)
  4464. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_659_SHIFT (0x00000013u)
  4465. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_659_RESETVAL (0x00000000u)
  4466. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_660_MASK (0x00100000u)
  4467. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_660_SHIFT (0x00000014u)
  4468. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_660_RESETVAL (0x00000000u)
  4469. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_661_MASK (0x00200000u)
  4470. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_661_SHIFT (0x00000015u)
  4471. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_661_RESETVAL (0x00000000u)
  4472. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_662_MASK (0x00400000u)
  4473. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_662_SHIFT (0x00000016u)
  4474. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_662_RESETVAL (0x00000000u)
  4475. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_663_MASK (0x00800000u)
  4476. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_663_SHIFT (0x00000017u)
  4477. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_663_RESETVAL (0x00000000u)
  4478. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_664_MASK (0x01000000u)
  4479. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_664_SHIFT (0x00000018u)
  4480. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_664_RESETVAL (0x00000000u)
  4481. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_665_MASK (0x02000000u)
  4482. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_665_SHIFT (0x00000019u)
  4483. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_665_RESETVAL (0x00000000u)
  4484. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_666_MASK (0x04000000u)
  4485. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_666_SHIFT (0x0000001Au)
  4486. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_666_RESETVAL (0x00000000u)
  4487. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_667_MASK (0x08000000u)
  4488. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_667_SHIFT (0x0000001Bu)
  4489. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_667_RESETVAL (0x00000000u)
  4490. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_668_MASK (0x10000000u)
  4491. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_668_SHIFT (0x0000001Cu)
  4492. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_668_RESETVAL (0x00000000u)
  4493. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_669_MASK (0x20000000u)
  4494. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_669_SHIFT (0x0000001Du)
  4495. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_669_RESETVAL (0x00000000u)
  4496. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_670_MASK (0x40000000u)
  4497. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_670_SHIFT (0x0000001Eu)
  4498. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_670_RESETVAL (0x00000000u)
  4499. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_671_MASK (0x80000000u)
  4500. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_671_SHIFT (0x0000001Fu)
  4501. #define CSL_CPINTC_RAW_STATUS_REG20_RAW_STATUS_671_RESETVAL (0x00000000u)
  4502. #define CSL_CPINTC_RAW_STATUS_REG20_RESETVAL (0x00000000u)
  4503. /* raw_status_reg21 */
  4504. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_672_MASK (0x00000001u)
  4505. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_672_SHIFT (0x00000000u)
  4506. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_672_RESETVAL (0x00000000u)
  4507. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_673_MASK (0x00000002u)
  4508. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_673_SHIFT (0x00000001u)
  4509. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_673_RESETVAL (0x00000000u)
  4510. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_674_MASK (0x00000004u)
  4511. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_674_SHIFT (0x00000002u)
  4512. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_674_RESETVAL (0x00000000u)
  4513. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_675_MASK (0x00000008u)
  4514. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_675_SHIFT (0x00000003u)
  4515. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_675_RESETVAL (0x00000000u)
  4516. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_676_MASK (0x00000010u)
  4517. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_676_SHIFT (0x00000004u)
  4518. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_676_RESETVAL (0x00000000u)
  4519. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_677_MASK (0x00000020u)
  4520. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_677_SHIFT (0x00000005u)
  4521. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_677_RESETVAL (0x00000000u)
  4522. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_678_MASK (0x00000040u)
  4523. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_678_SHIFT (0x00000006u)
  4524. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_678_RESETVAL (0x00000000u)
  4525. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_679_MASK (0x00000080u)
  4526. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_679_SHIFT (0x00000007u)
  4527. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_679_RESETVAL (0x00000000u)
  4528. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_680_MASK (0x00000100u)
  4529. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_680_SHIFT (0x00000008u)
  4530. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_680_RESETVAL (0x00000000u)
  4531. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_681_MASK (0x00000200u)
  4532. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_681_SHIFT (0x00000009u)
  4533. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_681_RESETVAL (0x00000000u)
  4534. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_682_MASK (0x00000400u)
  4535. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_682_SHIFT (0x0000000Au)
  4536. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_682_RESETVAL (0x00000000u)
  4537. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_683_MASK (0x00000800u)
  4538. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_683_SHIFT (0x0000000Bu)
  4539. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_683_RESETVAL (0x00000000u)
  4540. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_684_MASK (0x00001000u)
  4541. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_684_SHIFT (0x0000000Cu)
  4542. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_684_RESETVAL (0x00000000u)
  4543. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_685_MASK (0x00002000u)
  4544. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_685_SHIFT (0x0000000Du)
  4545. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_685_RESETVAL (0x00000000u)
  4546. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_686_MASK (0x00004000u)
  4547. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_686_SHIFT (0x0000000Eu)
  4548. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_686_RESETVAL (0x00000000u)
  4549. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_687_MASK (0x00008000u)
  4550. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_687_SHIFT (0x0000000Fu)
  4551. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_687_RESETVAL (0x00000000u)
  4552. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_688_MASK (0x00010000u)
  4553. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_688_SHIFT (0x00000010u)
  4554. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_688_RESETVAL (0x00000000u)
  4555. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_689_MASK (0x00020000u)
  4556. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_689_SHIFT (0x00000011u)
  4557. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_689_RESETVAL (0x00000000u)
  4558. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_690_MASK (0x00040000u)
  4559. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_690_SHIFT (0x00000012u)
  4560. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_690_RESETVAL (0x00000000u)
  4561. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_691_MASK (0x00080000u)
  4562. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_691_SHIFT (0x00000013u)
  4563. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_691_RESETVAL (0x00000000u)
  4564. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_692_MASK (0x00100000u)
  4565. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_692_SHIFT (0x00000014u)
  4566. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_692_RESETVAL (0x00000000u)
  4567. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_693_MASK (0x00200000u)
  4568. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_693_SHIFT (0x00000015u)
  4569. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_693_RESETVAL (0x00000000u)
  4570. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_694_MASK (0x00400000u)
  4571. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_694_SHIFT (0x00000016u)
  4572. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_694_RESETVAL (0x00000000u)
  4573. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_695_MASK (0x00800000u)
  4574. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_695_SHIFT (0x00000017u)
  4575. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_695_RESETVAL (0x00000000u)
  4576. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_696_MASK (0x01000000u)
  4577. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_696_SHIFT (0x00000018u)
  4578. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_696_RESETVAL (0x00000000u)
  4579. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_697_MASK (0x02000000u)
  4580. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_697_SHIFT (0x00000019u)
  4581. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_697_RESETVAL (0x00000000u)
  4582. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_698_MASK (0x04000000u)
  4583. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_698_SHIFT (0x0000001Au)
  4584. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_698_RESETVAL (0x00000000u)
  4585. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_699_MASK (0x08000000u)
  4586. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_699_SHIFT (0x0000001Bu)
  4587. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_699_RESETVAL (0x00000000u)
  4588. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_700_MASK (0x10000000u)
  4589. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_700_SHIFT (0x0000001Cu)
  4590. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_700_RESETVAL (0x00000000u)
  4591. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_701_MASK (0x20000000u)
  4592. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_701_SHIFT (0x0000001Du)
  4593. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_701_RESETVAL (0x00000000u)
  4594. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_702_MASK (0x40000000u)
  4595. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_702_SHIFT (0x0000001Eu)
  4596. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_702_RESETVAL (0x00000000u)
  4597. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_703_MASK (0x80000000u)
  4598. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_703_SHIFT (0x0000001Fu)
  4599. #define CSL_CPINTC_RAW_STATUS_REG21_RAW_STATUS_703_RESETVAL (0x00000000u)
  4600. #define CSL_CPINTC_RAW_STATUS_REG21_RESETVAL (0x00000000u)
  4601. /* raw_status_reg22 */
  4602. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_704_MASK (0x00000001u)
  4603. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_704_SHIFT (0x00000000u)
  4604. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_704_RESETVAL (0x00000000u)
  4605. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_705_MASK (0x00000002u)
  4606. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_705_SHIFT (0x00000001u)
  4607. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_705_RESETVAL (0x00000000u)
  4608. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_706_MASK (0x00000004u)
  4609. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_706_SHIFT (0x00000002u)
  4610. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_706_RESETVAL (0x00000000u)
  4611. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_707_MASK (0x00000008u)
  4612. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_707_SHIFT (0x00000003u)
  4613. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_707_RESETVAL (0x00000000u)
  4614. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_708_MASK (0x00000010u)
  4615. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_708_SHIFT (0x00000004u)
  4616. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_708_RESETVAL (0x00000000u)
  4617. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_709_MASK (0x00000020u)
  4618. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_709_SHIFT (0x00000005u)
  4619. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_709_RESETVAL (0x00000000u)
  4620. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_710_MASK (0x00000040u)
  4621. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_710_SHIFT (0x00000006u)
  4622. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_710_RESETVAL (0x00000000u)
  4623. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_711_MASK (0x00000080u)
  4624. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_711_SHIFT (0x00000007u)
  4625. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_711_RESETVAL (0x00000000u)
  4626. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_712_MASK (0x00000100u)
  4627. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_712_SHIFT (0x00000008u)
  4628. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_712_RESETVAL (0x00000000u)
  4629. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_713_MASK (0x00000200u)
  4630. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_713_SHIFT (0x00000009u)
  4631. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_713_RESETVAL (0x00000000u)
  4632. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_714_MASK (0x00000400u)
  4633. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_714_SHIFT (0x0000000Au)
  4634. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_714_RESETVAL (0x00000000u)
  4635. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_715_MASK (0x00000800u)
  4636. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_715_SHIFT (0x0000000Bu)
  4637. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_715_RESETVAL (0x00000000u)
  4638. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_716_MASK (0x00001000u)
  4639. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_716_SHIFT (0x0000000Cu)
  4640. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_716_RESETVAL (0x00000000u)
  4641. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_717_MASK (0x00002000u)
  4642. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_717_SHIFT (0x0000000Du)
  4643. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_717_RESETVAL (0x00000000u)
  4644. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_718_MASK (0x00004000u)
  4645. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_718_SHIFT (0x0000000Eu)
  4646. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_718_RESETVAL (0x00000000u)
  4647. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_719_MASK (0x00008000u)
  4648. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_719_SHIFT (0x0000000Fu)
  4649. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_719_RESETVAL (0x00000000u)
  4650. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_720_MASK (0x00010000u)
  4651. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_720_SHIFT (0x00000010u)
  4652. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_720_RESETVAL (0x00000000u)
  4653. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_721_MASK (0x00020000u)
  4654. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_721_SHIFT (0x00000011u)
  4655. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_721_RESETVAL (0x00000000u)
  4656. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_722_MASK (0x00040000u)
  4657. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_722_SHIFT (0x00000012u)
  4658. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_722_RESETVAL (0x00000000u)
  4659. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_723_MASK (0x00080000u)
  4660. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_723_SHIFT (0x00000013u)
  4661. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_723_RESETVAL (0x00000000u)
  4662. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_724_MASK (0x00100000u)
  4663. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_724_SHIFT (0x00000014u)
  4664. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_724_RESETVAL (0x00000000u)
  4665. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_725_MASK (0x00200000u)
  4666. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_725_SHIFT (0x00000015u)
  4667. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_725_RESETVAL (0x00000000u)
  4668. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_726_MASK (0x00400000u)
  4669. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_726_SHIFT (0x00000016u)
  4670. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_726_RESETVAL (0x00000000u)
  4671. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_727_MASK (0x00800000u)
  4672. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_727_SHIFT (0x00000017u)
  4673. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_727_RESETVAL (0x00000000u)
  4674. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_728_MASK (0x01000000u)
  4675. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_728_SHIFT (0x00000018u)
  4676. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_728_RESETVAL (0x00000000u)
  4677. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_729_MASK (0x02000000u)
  4678. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_729_SHIFT (0x00000019u)
  4679. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_729_RESETVAL (0x00000000u)
  4680. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_730_MASK (0x04000000u)
  4681. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_730_SHIFT (0x0000001Au)
  4682. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_730_RESETVAL (0x00000000u)
  4683. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_731_MASK (0x08000000u)
  4684. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_731_SHIFT (0x0000001Bu)
  4685. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_731_RESETVAL (0x00000000u)
  4686. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_732_MASK (0x10000000u)
  4687. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_732_SHIFT (0x0000001Cu)
  4688. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_732_RESETVAL (0x00000000u)
  4689. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_733_MASK (0x20000000u)
  4690. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_733_SHIFT (0x0000001Du)
  4691. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_733_RESETVAL (0x00000000u)
  4692. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_734_MASK (0x40000000u)
  4693. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_734_SHIFT (0x0000001Eu)
  4694. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_734_RESETVAL (0x00000000u)
  4695. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_735_MASK (0x80000000u)
  4696. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_735_SHIFT (0x0000001Fu)
  4697. #define CSL_CPINTC_RAW_STATUS_REG22_RAW_STATUS_735_RESETVAL (0x00000000u)
  4698. #define CSL_CPINTC_RAW_STATUS_REG22_RESETVAL (0x00000000u)
  4699. /* raw_status_reg23 */
  4700. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_736_MASK (0x00000001u)
  4701. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_736_SHIFT (0x00000000u)
  4702. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_736_RESETVAL (0x00000000u)
  4703. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_737_MASK (0x00000002u)
  4704. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_737_SHIFT (0x00000001u)
  4705. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_737_RESETVAL (0x00000000u)
  4706. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_738_MASK (0x00000004u)
  4707. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_738_SHIFT (0x00000002u)
  4708. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_738_RESETVAL (0x00000000u)
  4709. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_739_MASK (0x00000008u)
  4710. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_739_SHIFT (0x00000003u)
  4711. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_739_RESETVAL (0x00000000u)
  4712. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_740_MASK (0x00000010u)
  4713. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_740_SHIFT (0x00000004u)
  4714. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_740_RESETVAL (0x00000000u)
  4715. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_741_MASK (0x00000020u)
  4716. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_741_SHIFT (0x00000005u)
  4717. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_741_RESETVAL (0x00000000u)
  4718. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_742_MASK (0x00000040u)
  4719. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_742_SHIFT (0x00000006u)
  4720. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_742_RESETVAL (0x00000000u)
  4721. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_743_MASK (0x00000080u)
  4722. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_743_SHIFT (0x00000007u)
  4723. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_743_RESETVAL (0x00000000u)
  4724. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_744_MASK (0x00000100u)
  4725. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_744_SHIFT (0x00000008u)
  4726. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_744_RESETVAL (0x00000000u)
  4727. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_745_MASK (0x00000200u)
  4728. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_745_SHIFT (0x00000009u)
  4729. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_745_RESETVAL (0x00000000u)
  4730. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_746_MASK (0x00000400u)
  4731. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_746_SHIFT (0x0000000Au)
  4732. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_746_RESETVAL (0x00000000u)
  4733. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_747_MASK (0x00000800u)
  4734. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_747_SHIFT (0x0000000Bu)
  4735. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_747_RESETVAL (0x00000000u)
  4736. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_748_MASK (0x00001000u)
  4737. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_748_SHIFT (0x0000000Cu)
  4738. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_748_RESETVAL (0x00000000u)
  4739. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_749_MASK (0x00002000u)
  4740. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_749_SHIFT (0x0000000Du)
  4741. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_749_RESETVAL (0x00000000u)
  4742. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_750_MASK (0x00004000u)
  4743. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_750_SHIFT (0x0000000Eu)
  4744. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_750_RESETVAL (0x00000000u)
  4745. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_751_MASK (0x00008000u)
  4746. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_751_SHIFT (0x0000000Fu)
  4747. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_751_RESETVAL (0x00000000u)
  4748. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_752_MASK (0x00010000u)
  4749. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_752_SHIFT (0x00000010u)
  4750. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_752_RESETVAL (0x00000000u)
  4751. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_753_MASK (0x00020000u)
  4752. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_753_SHIFT (0x00000011u)
  4753. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_753_RESETVAL (0x00000000u)
  4754. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_754_MASK (0x00040000u)
  4755. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_754_SHIFT (0x00000012u)
  4756. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_754_RESETVAL (0x00000000u)
  4757. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_755_MASK (0x00080000u)
  4758. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_755_SHIFT (0x00000013u)
  4759. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_755_RESETVAL (0x00000000u)
  4760. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_756_MASK (0x00100000u)
  4761. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_756_SHIFT (0x00000014u)
  4762. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_756_RESETVAL (0x00000000u)
  4763. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_757_MASK (0x00200000u)
  4764. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_757_SHIFT (0x00000015u)
  4765. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_757_RESETVAL (0x00000000u)
  4766. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_758_MASK (0x00400000u)
  4767. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_758_SHIFT (0x00000016u)
  4768. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_758_RESETVAL (0x00000000u)
  4769. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_759_MASK (0x00800000u)
  4770. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_759_SHIFT (0x00000017u)
  4771. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_759_RESETVAL (0x00000000u)
  4772. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_760_MASK (0x01000000u)
  4773. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_760_SHIFT (0x00000018u)
  4774. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_760_RESETVAL (0x00000000u)
  4775. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_761_MASK (0x02000000u)
  4776. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_761_SHIFT (0x00000019u)
  4777. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_761_RESETVAL (0x00000000u)
  4778. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_762_MASK (0x04000000u)
  4779. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_762_SHIFT (0x0000001Au)
  4780. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_762_RESETVAL (0x00000000u)
  4781. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_763_MASK (0x08000000u)
  4782. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_763_SHIFT (0x0000001Bu)
  4783. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_763_RESETVAL (0x00000000u)
  4784. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_764_MASK (0x10000000u)
  4785. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_764_SHIFT (0x0000001Cu)
  4786. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_764_RESETVAL (0x00000000u)
  4787. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_765_MASK (0x20000000u)
  4788. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_765_SHIFT (0x0000001Du)
  4789. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_765_RESETVAL (0x00000000u)
  4790. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_766_MASK (0x40000000u)
  4791. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_766_SHIFT (0x0000001Eu)
  4792. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_766_RESETVAL (0x00000000u)
  4793. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_767_MASK (0x80000000u)
  4794. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_767_SHIFT (0x0000001Fu)
  4795. #define CSL_CPINTC_RAW_STATUS_REG23_RAW_STATUS_767_RESETVAL (0x00000000u)
  4796. #define CSL_CPINTC_RAW_STATUS_REG23_RESETVAL (0x00000000u)
  4797. /* raw_status_reg24 */
  4798. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_768_MASK (0x00000001u)
  4799. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_768_SHIFT (0x00000000u)
  4800. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_768_RESETVAL (0x00000000u)
  4801. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_769_MASK (0x00000002u)
  4802. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_769_SHIFT (0x00000001u)
  4803. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_769_RESETVAL (0x00000000u)
  4804. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_770_MASK (0x00000004u)
  4805. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_770_SHIFT (0x00000002u)
  4806. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_770_RESETVAL (0x00000000u)
  4807. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_771_MASK (0x00000008u)
  4808. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_771_SHIFT (0x00000003u)
  4809. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_771_RESETVAL (0x00000000u)
  4810. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_772_MASK (0x00000010u)
  4811. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_772_SHIFT (0x00000004u)
  4812. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_772_RESETVAL (0x00000000u)
  4813. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_773_MASK (0x00000020u)
  4814. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_773_SHIFT (0x00000005u)
  4815. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_773_RESETVAL (0x00000000u)
  4816. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_774_MASK (0x00000040u)
  4817. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_774_SHIFT (0x00000006u)
  4818. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_774_RESETVAL (0x00000000u)
  4819. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_775_MASK (0x00000080u)
  4820. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_775_SHIFT (0x00000007u)
  4821. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_775_RESETVAL (0x00000000u)
  4822. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_776_MASK (0x00000100u)
  4823. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_776_SHIFT (0x00000008u)
  4824. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_776_RESETVAL (0x00000000u)
  4825. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_777_MASK (0x00000200u)
  4826. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_777_SHIFT (0x00000009u)
  4827. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_777_RESETVAL (0x00000000u)
  4828. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_778_MASK (0x00000400u)
  4829. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_778_SHIFT (0x0000000Au)
  4830. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_778_RESETVAL (0x00000000u)
  4831. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_779_MASK (0x00000800u)
  4832. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_779_SHIFT (0x0000000Bu)
  4833. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_779_RESETVAL (0x00000000u)
  4834. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_780_MASK (0x00001000u)
  4835. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_780_SHIFT (0x0000000Cu)
  4836. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_780_RESETVAL (0x00000000u)
  4837. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_781_MASK (0x00002000u)
  4838. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_781_SHIFT (0x0000000Du)
  4839. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_781_RESETVAL (0x00000000u)
  4840. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_782_MASK (0x00004000u)
  4841. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_782_SHIFT (0x0000000Eu)
  4842. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_782_RESETVAL (0x00000000u)
  4843. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_783_MASK (0x00008000u)
  4844. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_783_SHIFT (0x0000000Fu)
  4845. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_783_RESETVAL (0x00000000u)
  4846. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_784_MASK (0x00010000u)
  4847. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_784_SHIFT (0x00000010u)
  4848. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_784_RESETVAL (0x00000000u)
  4849. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_785_MASK (0x00020000u)
  4850. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_785_SHIFT (0x00000011u)
  4851. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_785_RESETVAL (0x00000000u)
  4852. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_786_MASK (0x00040000u)
  4853. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_786_SHIFT (0x00000012u)
  4854. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_786_RESETVAL (0x00000000u)
  4855. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_787_MASK (0x00080000u)
  4856. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_787_SHIFT (0x00000013u)
  4857. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_787_RESETVAL (0x00000000u)
  4858. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_788_MASK (0x00100000u)
  4859. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_788_SHIFT (0x00000014u)
  4860. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_788_RESETVAL (0x00000000u)
  4861. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_789_MASK (0x00200000u)
  4862. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_789_SHIFT (0x00000015u)
  4863. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_789_RESETVAL (0x00000000u)
  4864. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_790_MASK (0x00400000u)
  4865. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_790_SHIFT (0x00000016u)
  4866. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_790_RESETVAL (0x00000000u)
  4867. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_791_MASK (0x00800000u)
  4868. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_791_SHIFT (0x00000017u)
  4869. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_791_RESETVAL (0x00000000u)
  4870. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_792_MASK (0x01000000u)
  4871. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_792_SHIFT (0x00000018u)
  4872. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_792_RESETVAL (0x00000000u)
  4873. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_793_MASK (0x02000000u)
  4874. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_793_SHIFT (0x00000019u)
  4875. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_793_RESETVAL (0x00000000u)
  4876. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_794_MASK (0x04000000u)
  4877. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_794_SHIFT (0x0000001Au)
  4878. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_794_RESETVAL (0x00000000u)
  4879. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_795_MASK (0x08000000u)
  4880. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_795_SHIFT (0x0000001Bu)
  4881. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_795_RESETVAL (0x00000000u)
  4882. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_796_MASK (0x10000000u)
  4883. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_796_SHIFT (0x0000001Cu)
  4884. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_796_RESETVAL (0x00000000u)
  4885. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_797_MASK (0x20000000u)
  4886. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_797_SHIFT (0x0000001Du)
  4887. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_797_RESETVAL (0x00000000u)
  4888. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_798_MASK (0x40000000u)
  4889. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_798_SHIFT (0x0000001Eu)
  4890. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_798_RESETVAL (0x00000000u)
  4891. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_799_MASK (0x80000000u)
  4892. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_799_SHIFT (0x0000001Fu)
  4893. #define CSL_CPINTC_RAW_STATUS_REG24_RAW_STATUS_799_RESETVAL (0x00000000u)
  4894. #define CSL_CPINTC_RAW_STATUS_REG24_RESETVAL (0x00000000u)
  4895. /* raw_status_reg25 */
  4896. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_800_MASK (0x00000001u)
  4897. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_800_SHIFT (0x00000000u)
  4898. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_800_RESETVAL (0x00000000u)
  4899. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_801_MASK (0x00000002u)
  4900. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_801_SHIFT (0x00000001u)
  4901. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_801_RESETVAL (0x00000000u)
  4902. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_802_MASK (0x00000004u)
  4903. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_802_SHIFT (0x00000002u)
  4904. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_802_RESETVAL (0x00000000u)
  4905. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_803_MASK (0x00000008u)
  4906. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_803_SHIFT (0x00000003u)
  4907. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_803_RESETVAL (0x00000000u)
  4908. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_804_MASK (0x00000010u)
  4909. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_804_SHIFT (0x00000004u)
  4910. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_804_RESETVAL (0x00000000u)
  4911. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_805_MASK (0x00000020u)
  4912. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_805_SHIFT (0x00000005u)
  4913. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_805_RESETVAL (0x00000000u)
  4914. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_806_MASK (0x00000040u)
  4915. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_806_SHIFT (0x00000006u)
  4916. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_806_RESETVAL (0x00000000u)
  4917. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_807_MASK (0x00000080u)
  4918. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_807_SHIFT (0x00000007u)
  4919. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_807_RESETVAL (0x00000000u)
  4920. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_808_MASK (0x00000100u)
  4921. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_808_SHIFT (0x00000008u)
  4922. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_808_RESETVAL (0x00000000u)
  4923. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_809_MASK (0x00000200u)
  4924. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_809_SHIFT (0x00000009u)
  4925. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_809_RESETVAL (0x00000000u)
  4926. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_810_MASK (0x00000400u)
  4927. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_810_SHIFT (0x0000000Au)
  4928. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_810_RESETVAL (0x00000000u)
  4929. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_811_MASK (0x00000800u)
  4930. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_811_SHIFT (0x0000000Bu)
  4931. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_811_RESETVAL (0x00000000u)
  4932. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_812_MASK (0x00001000u)
  4933. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_812_SHIFT (0x0000000Cu)
  4934. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_812_RESETVAL (0x00000000u)
  4935. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_813_MASK (0x00002000u)
  4936. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_813_SHIFT (0x0000000Du)
  4937. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_813_RESETVAL (0x00000000u)
  4938. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_814_MASK (0x00004000u)
  4939. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_814_SHIFT (0x0000000Eu)
  4940. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_814_RESETVAL (0x00000000u)
  4941. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_815_MASK (0x00008000u)
  4942. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_815_SHIFT (0x0000000Fu)
  4943. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_815_RESETVAL (0x00000000u)
  4944. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_816_MASK (0x00010000u)
  4945. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_816_SHIFT (0x00000010u)
  4946. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_816_RESETVAL (0x00000000u)
  4947. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_817_MASK (0x00020000u)
  4948. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_817_SHIFT (0x00000011u)
  4949. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_817_RESETVAL (0x00000000u)
  4950. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_818_MASK (0x00040000u)
  4951. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_818_SHIFT (0x00000012u)
  4952. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_818_RESETVAL (0x00000000u)
  4953. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_819_MASK (0x00080000u)
  4954. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_819_SHIFT (0x00000013u)
  4955. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_819_RESETVAL (0x00000000u)
  4956. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_820_MASK (0x00100000u)
  4957. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_820_SHIFT (0x00000014u)
  4958. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_820_RESETVAL (0x00000000u)
  4959. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_821_MASK (0x00200000u)
  4960. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_821_SHIFT (0x00000015u)
  4961. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_821_RESETVAL (0x00000000u)
  4962. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_822_MASK (0x00400000u)
  4963. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_822_SHIFT (0x00000016u)
  4964. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_822_RESETVAL (0x00000000u)
  4965. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_823_MASK (0x00800000u)
  4966. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_823_SHIFT (0x00000017u)
  4967. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_823_RESETVAL (0x00000000u)
  4968. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_824_MASK (0x01000000u)
  4969. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_824_SHIFT (0x00000018u)
  4970. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_824_RESETVAL (0x00000000u)
  4971. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_825_MASK (0x02000000u)
  4972. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_825_SHIFT (0x00000019u)
  4973. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_825_RESETVAL (0x00000000u)
  4974. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_826_MASK (0x04000000u)
  4975. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_826_SHIFT (0x0000001Au)
  4976. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_826_RESETVAL (0x00000000u)
  4977. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_827_MASK (0x08000000u)
  4978. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_827_SHIFT (0x0000001Bu)
  4979. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_827_RESETVAL (0x00000000u)
  4980. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_828_MASK (0x10000000u)
  4981. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_828_SHIFT (0x0000001Cu)
  4982. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_828_RESETVAL (0x00000000u)
  4983. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_829_MASK (0x20000000u)
  4984. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_829_SHIFT (0x0000001Du)
  4985. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_829_RESETVAL (0x00000000u)
  4986. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_830_MASK (0x40000000u)
  4987. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_830_SHIFT (0x0000001Eu)
  4988. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_830_RESETVAL (0x00000000u)
  4989. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_831_MASK (0x80000000u)
  4990. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_831_SHIFT (0x0000001Fu)
  4991. #define CSL_CPINTC_RAW_STATUS_REG25_RAW_STATUS_831_RESETVAL (0x00000000u)
  4992. #define CSL_CPINTC_RAW_STATUS_REG25_RESETVAL (0x00000000u)
  4993. /* raw_status_reg26 */
  4994. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_832_MASK (0x00000001u)
  4995. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_832_SHIFT (0x00000000u)
  4996. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_832_RESETVAL (0x00000000u)
  4997. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_833_MASK (0x00000002u)
  4998. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_833_SHIFT (0x00000001u)
  4999. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_833_RESETVAL (0x00000000u)
  5000. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_834_MASK (0x00000004u)
  5001. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_834_SHIFT (0x00000002u)
  5002. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_834_RESETVAL (0x00000000u)
  5003. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_835_MASK (0x00000008u)
  5004. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_835_SHIFT (0x00000003u)
  5005. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_835_RESETVAL (0x00000000u)
  5006. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_836_MASK (0x00000010u)
  5007. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_836_SHIFT (0x00000004u)
  5008. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_836_RESETVAL (0x00000000u)
  5009. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_837_MASK (0x00000020u)
  5010. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_837_SHIFT (0x00000005u)
  5011. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_837_RESETVAL (0x00000000u)
  5012. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_838_MASK (0x00000040u)
  5013. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_838_SHIFT (0x00000006u)
  5014. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_838_RESETVAL (0x00000000u)
  5015. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_839_MASK (0x00000080u)
  5016. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_839_SHIFT (0x00000007u)
  5017. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_839_RESETVAL (0x00000000u)
  5018. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_840_MASK (0x00000100u)
  5019. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_840_SHIFT (0x00000008u)
  5020. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_840_RESETVAL (0x00000000u)
  5021. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_841_MASK (0x00000200u)
  5022. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_841_SHIFT (0x00000009u)
  5023. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_841_RESETVAL (0x00000000u)
  5024. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_842_MASK (0x00000400u)
  5025. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_842_SHIFT (0x0000000Au)
  5026. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_842_RESETVAL (0x00000000u)
  5027. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_843_MASK (0x00000800u)
  5028. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_843_SHIFT (0x0000000Bu)
  5029. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_843_RESETVAL (0x00000000u)
  5030. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_844_MASK (0x00001000u)
  5031. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_844_SHIFT (0x0000000Cu)
  5032. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_844_RESETVAL (0x00000000u)
  5033. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_845_MASK (0x00002000u)
  5034. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_845_SHIFT (0x0000000Du)
  5035. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_845_RESETVAL (0x00000000u)
  5036. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_846_MASK (0x00004000u)
  5037. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_846_SHIFT (0x0000000Eu)
  5038. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_846_RESETVAL (0x00000000u)
  5039. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_847_MASK (0x00008000u)
  5040. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_847_SHIFT (0x0000000Fu)
  5041. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_847_RESETVAL (0x00000000u)
  5042. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_848_MASK (0x00010000u)
  5043. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_848_SHIFT (0x00000010u)
  5044. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_848_RESETVAL (0x00000000u)
  5045. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_849_MASK (0x00020000u)
  5046. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_849_SHIFT (0x00000011u)
  5047. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_849_RESETVAL (0x00000000u)
  5048. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_850_MASK (0x00040000u)
  5049. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_850_SHIFT (0x00000012u)
  5050. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_850_RESETVAL (0x00000000u)
  5051. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_851_MASK (0x00080000u)
  5052. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_851_SHIFT (0x00000013u)
  5053. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_851_RESETVAL (0x00000000u)
  5054. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_852_MASK (0x00100000u)
  5055. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_852_SHIFT (0x00000014u)
  5056. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_852_RESETVAL (0x00000000u)
  5057. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_853_MASK (0x00200000u)
  5058. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_853_SHIFT (0x00000015u)
  5059. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_853_RESETVAL (0x00000000u)
  5060. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_854_MASK (0x00400000u)
  5061. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_854_SHIFT (0x00000016u)
  5062. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_854_RESETVAL (0x00000000u)
  5063. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_855_MASK (0x00800000u)
  5064. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_855_SHIFT (0x00000017u)
  5065. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_855_RESETVAL (0x00000000u)
  5066. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_856_MASK (0x01000000u)
  5067. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_856_SHIFT (0x00000018u)
  5068. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_856_RESETVAL (0x00000000u)
  5069. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_857_MASK (0x02000000u)
  5070. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_857_SHIFT (0x00000019u)
  5071. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_857_RESETVAL (0x00000000u)
  5072. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_858_MASK (0x04000000u)
  5073. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_858_SHIFT (0x0000001Au)
  5074. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_858_RESETVAL (0x00000000u)
  5075. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_859_MASK (0x08000000u)
  5076. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_859_SHIFT (0x0000001Bu)
  5077. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_859_RESETVAL (0x00000000u)
  5078. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_860_MASK (0x10000000u)
  5079. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_860_SHIFT (0x0000001Cu)
  5080. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_860_RESETVAL (0x00000000u)
  5081. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_861_MASK (0x20000000u)
  5082. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_861_SHIFT (0x0000001Du)
  5083. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_861_RESETVAL (0x00000000u)
  5084. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_862_MASK (0x40000000u)
  5085. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_862_SHIFT (0x0000001Eu)
  5086. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_862_RESETVAL (0x00000000u)
  5087. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_863_MASK (0x80000000u)
  5088. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_863_SHIFT (0x0000001Fu)
  5089. #define CSL_CPINTC_RAW_STATUS_REG26_RAW_STATUS_863_RESETVAL (0x00000000u)
  5090. #define CSL_CPINTC_RAW_STATUS_REG26_RESETVAL (0x00000000u)
  5091. /* raw_status_reg27 */
  5092. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_864_MASK (0x00000001u)
  5093. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_864_SHIFT (0x00000000u)
  5094. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_864_RESETVAL (0x00000000u)
  5095. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_865_MASK (0x00000002u)
  5096. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_865_SHIFT (0x00000001u)
  5097. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_865_RESETVAL (0x00000000u)
  5098. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_866_MASK (0x00000004u)
  5099. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_866_SHIFT (0x00000002u)
  5100. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_866_RESETVAL (0x00000000u)
  5101. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_867_MASK (0x00000008u)
  5102. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_867_SHIFT (0x00000003u)
  5103. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_867_RESETVAL (0x00000000u)
  5104. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_868_MASK (0x00000010u)
  5105. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_868_SHIFT (0x00000004u)
  5106. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_868_RESETVAL (0x00000000u)
  5107. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_869_MASK (0x00000020u)
  5108. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_869_SHIFT (0x00000005u)
  5109. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_869_RESETVAL (0x00000000u)
  5110. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_870_MASK (0x00000040u)
  5111. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_870_SHIFT (0x00000006u)
  5112. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_870_RESETVAL (0x00000000u)
  5113. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_871_MASK (0x00000080u)
  5114. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_871_SHIFT (0x00000007u)
  5115. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_871_RESETVAL (0x00000000u)
  5116. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_872_MASK (0x00000100u)
  5117. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_872_SHIFT (0x00000008u)
  5118. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_872_RESETVAL (0x00000000u)
  5119. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_873_MASK (0x00000200u)
  5120. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_873_SHIFT (0x00000009u)
  5121. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_873_RESETVAL (0x00000000u)
  5122. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_874_MASK (0x00000400u)
  5123. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_874_SHIFT (0x0000000Au)
  5124. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_874_RESETVAL (0x00000000u)
  5125. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_875_MASK (0x00000800u)
  5126. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_875_SHIFT (0x0000000Bu)
  5127. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_875_RESETVAL (0x00000000u)
  5128. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_876_MASK (0x00001000u)
  5129. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_876_SHIFT (0x0000000Cu)
  5130. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_876_RESETVAL (0x00000000u)
  5131. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_877_MASK (0x00002000u)
  5132. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_877_SHIFT (0x0000000Du)
  5133. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_877_RESETVAL (0x00000000u)
  5134. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_878_MASK (0x00004000u)
  5135. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_878_SHIFT (0x0000000Eu)
  5136. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_878_RESETVAL (0x00000000u)
  5137. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_879_MASK (0x00008000u)
  5138. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_879_SHIFT (0x0000000Fu)
  5139. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_879_RESETVAL (0x00000000u)
  5140. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_880_MASK (0x00010000u)
  5141. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_880_SHIFT (0x00000010u)
  5142. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_880_RESETVAL (0x00000000u)
  5143. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_881_MASK (0x00020000u)
  5144. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_881_SHIFT (0x00000011u)
  5145. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_881_RESETVAL (0x00000000u)
  5146. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_882_MASK (0x00040000u)
  5147. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_882_SHIFT (0x00000012u)
  5148. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_882_RESETVAL (0x00000000u)
  5149. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_883_MASK (0x00080000u)
  5150. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_883_SHIFT (0x00000013u)
  5151. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_883_RESETVAL (0x00000000u)
  5152. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_884_MASK (0x00100000u)
  5153. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_884_SHIFT (0x00000014u)
  5154. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_884_RESETVAL (0x00000000u)
  5155. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_885_MASK (0x00200000u)
  5156. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_885_SHIFT (0x00000015u)
  5157. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_885_RESETVAL (0x00000000u)
  5158. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_886_MASK (0x00400000u)
  5159. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_886_SHIFT (0x00000016u)
  5160. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_886_RESETVAL (0x00000000u)
  5161. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_887_MASK (0x00800000u)
  5162. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_887_SHIFT (0x00000017u)
  5163. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_887_RESETVAL (0x00000000u)
  5164. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_888_MASK (0x01000000u)
  5165. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_888_SHIFT (0x00000018u)
  5166. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_888_RESETVAL (0x00000000u)
  5167. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_889_MASK (0x02000000u)
  5168. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_889_SHIFT (0x00000019u)
  5169. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_889_RESETVAL (0x00000000u)
  5170. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_890_MASK (0x04000000u)
  5171. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_890_SHIFT (0x0000001Au)
  5172. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_890_RESETVAL (0x00000000u)
  5173. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_891_MASK (0x08000000u)
  5174. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_891_SHIFT (0x0000001Bu)
  5175. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_891_RESETVAL (0x00000000u)
  5176. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_892_MASK (0x10000000u)
  5177. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_892_SHIFT (0x0000001Cu)
  5178. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_892_RESETVAL (0x00000000u)
  5179. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_893_MASK (0x20000000u)
  5180. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_893_SHIFT (0x0000001Du)
  5181. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_893_RESETVAL (0x00000000u)
  5182. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_894_MASK (0x40000000u)
  5183. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_894_SHIFT (0x0000001Eu)
  5184. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_894_RESETVAL (0x00000000u)
  5185. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_895_MASK (0x80000000u)
  5186. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_895_SHIFT (0x0000001Fu)
  5187. #define CSL_CPINTC_RAW_STATUS_REG27_RAW_STATUS_895_RESETVAL (0x00000000u)
  5188. #define CSL_CPINTC_RAW_STATUS_REG27_RESETVAL (0x00000000u)
  5189. /* raw_status_reg28 */
  5190. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_896_MASK (0x00000001u)
  5191. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_896_SHIFT (0x00000000u)
  5192. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_896_RESETVAL (0x00000000u)
  5193. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_897_MASK (0x00000002u)
  5194. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_897_SHIFT (0x00000001u)
  5195. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_897_RESETVAL (0x00000000u)
  5196. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_898_MASK (0x00000004u)
  5197. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_898_SHIFT (0x00000002u)
  5198. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_898_RESETVAL (0x00000000u)
  5199. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_899_MASK (0x00000008u)
  5200. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_899_SHIFT (0x00000003u)
  5201. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_899_RESETVAL (0x00000000u)
  5202. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_900_MASK (0x00000010u)
  5203. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_900_SHIFT (0x00000004u)
  5204. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_900_RESETVAL (0x00000000u)
  5205. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_901_MASK (0x00000020u)
  5206. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_901_SHIFT (0x00000005u)
  5207. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_901_RESETVAL (0x00000000u)
  5208. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_902_MASK (0x00000040u)
  5209. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_902_SHIFT (0x00000006u)
  5210. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_902_RESETVAL (0x00000000u)
  5211. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_903_MASK (0x00000080u)
  5212. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_903_SHIFT (0x00000007u)
  5213. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_903_RESETVAL (0x00000000u)
  5214. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_904_MASK (0x00000100u)
  5215. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_904_SHIFT (0x00000008u)
  5216. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_904_RESETVAL (0x00000000u)
  5217. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_905_MASK (0x00000200u)
  5218. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_905_SHIFT (0x00000009u)
  5219. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_905_RESETVAL (0x00000000u)
  5220. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_906_MASK (0x00000400u)
  5221. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_906_SHIFT (0x0000000Au)
  5222. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_906_RESETVAL (0x00000000u)
  5223. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_907_MASK (0x00000800u)
  5224. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_907_SHIFT (0x0000000Bu)
  5225. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_907_RESETVAL (0x00000000u)
  5226. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_908_MASK (0x00001000u)
  5227. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_908_SHIFT (0x0000000Cu)
  5228. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_908_RESETVAL (0x00000000u)
  5229. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_909_MASK (0x00002000u)
  5230. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_909_SHIFT (0x0000000Du)
  5231. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_909_RESETVAL (0x00000000u)
  5232. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_910_MASK (0x00004000u)
  5233. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_910_SHIFT (0x0000000Eu)
  5234. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_910_RESETVAL (0x00000000u)
  5235. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_911_MASK (0x00008000u)
  5236. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_911_SHIFT (0x0000000Fu)
  5237. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_911_RESETVAL (0x00000000u)
  5238. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_912_MASK (0x00010000u)
  5239. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_912_SHIFT (0x00000010u)
  5240. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_912_RESETVAL (0x00000000u)
  5241. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_913_MASK (0x00020000u)
  5242. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_913_SHIFT (0x00000011u)
  5243. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_913_RESETVAL (0x00000000u)
  5244. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_914_MASK (0x00040000u)
  5245. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_914_SHIFT (0x00000012u)
  5246. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_914_RESETVAL (0x00000000u)
  5247. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_915_MASK (0x00080000u)
  5248. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_915_SHIFT (0x00000013u)
  5249. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_915_RESETVAL (0x00000000u)
  5250. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_916_MASK (0x00100000u)
  5251. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_916_SHIFT (0x00000014u)
  5252. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_916_RESETVAL (0x00000000u)
  5253. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_917_MASK (0x00200000u)
  5254. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_917_SHIFT (0x00000015u)
  5255. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_917_RESETVAL (0x00000000u)
  5256. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_918_MASK (0x00400000u)
  5257. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_918_SHIFT (0x00000016u)
  5258. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_918_RESETVAL (0x00000000u)
  5259. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_919_MASK (0x00800000u)
  5260. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_919_SHIFT (0x00000017u)
  5261. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_919_RESETVAL (0x00000000u)
  5262. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_920_MASK (0x01000000u)
  5263. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_920_SHIFT (0x00000018u)
  5264. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_920_RESETVAL (0x00000000u)
  5265. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_921_MASK (0x02000000u)
  5266. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_921_SHIFT (0x00000019u)
  5267. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_921_RESETVAL (0x00000000u)
  5268. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_922_MASK (0x04000000u)
  5269. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_922_SHIFT (0x0000001Au)
  5270. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_922_RESETVAL (0x00000000u)
  5271. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_923_MASK (0x08000000u)
  5272. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_923_SHIFT (0x0000001Bu)
  5273. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_923_RESETVAL (0x00000000u)
  5274. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_924_MASK (0x10000000u)
  5275. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_924_SHIFT (0x0000001Cu)
  5276. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_924_RESETVAL (0x00000000u)
  5277. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_925_MASK (0x20000000u)
  5278. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_925_SHIFT (0x0000001Du)
  5279. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_925_RESETVAL (0x00000000u)
  5280. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_926_MASK (0x40000000u)
  5281. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_926_SHIFT (0x0000001Eu)
  5282. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_926_RESETVAL (0x00000000u)
  5283. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_927_MASK (0x80000000u)
  5284. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_927_SHIFT (0x0000001Fu)
  5285. #define CSL_CPINTC_RAW_STATUS_REG28_RAW_STATUS_927_RESETVAL (0x00000000u)
  5286. #define CSL_CPINTC_RAW_STATUS_REG28_RESETVAL (0x00000000u)
  5287. /* raw_status_reg29 */
  5288. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_928_MASK (0x00000001u)
  5289. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_928_SHIFT (0x00000000u)
  5290. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_928_RESETVAL (0x00000000u)
  5291. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_929_MASK (0x00000002u)
  5292. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_929_SHIFT (0x00000001u)
  5293. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_929_RESETVAL (0x00000000u)
  5294. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_930_MASK (0x00000004u)
  5295. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_930_SHIFT (0x00000002u)
  5296. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_930_RESETVAL (0x00000000u)
  5297. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_931_MASK (0x00000008u)
  5298. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_931_SHIFT (0x00000003u)
  5299. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_931_RESETVAL (0x00000000u)
  5300. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_932_MASK (0x00000010u)
  5301. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_932_SHIFT (0x00000004u)
  5302. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_932_RESETVAL (0x00000000u)
  5303. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_933_MASK (0x00000020u)
  5304. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_933_SHIFT (0x00000005u)
  5305. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_933_RESETVAL (0x00000000u)
  5306. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_934_MASK (0x00000040u)
  5307. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_934_SHIFT (0x00000006u)
  5308. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_934_RESETVAL (0x00000000u)
  5309. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_935_MASK (0x00000080u)
  5310. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_935_SHIFT (0x00000007u)
  5311. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_935_RESETVAL (0x00000000u)
  5312. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_936_MASK (0x00000100u)
  5313. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_936_SHIFT (0x00000008u)
  5314. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_936_RESETVAL (0x00000000u)
  5315. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_937_MASK (0x00000200u)
  5316. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_937_SHIFT (0x00000009u)
  5317. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_937_RESETVAL (0x00000000u)
  5318. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_938_MASK (0x00000400u)
  5319. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_938_SHIFT (0x0000000Au)
  5320. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_938_RESETVAL (0x00000000u)
  5321. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_939_MASK (0x00000800u)
  5322. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_939_SHIFT (0x0000000Bu)
  5323. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_939_RESETVAL (0x00000000u)
  5324. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_940_MASK (0x00001000u)
  5325. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_940_SHIFT (0x0000000Cu)
  5326. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_940_RESETVAL (0x00000000u)
  5327. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_941_MASK (0x00002000u)
  5328. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_941_SHIFT (0x0000000Du)
  5329. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_941_RESETVAL (0x00000000u)
  5330. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_942_MASK (0x00004000u)
  5331. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_942_SHIFT (0x0000000Eu)
  5332. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_942_RESETVAL (0x00000000u)
  5333. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_943_MASK (0x00008000u)
  5334. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_943_SHIFT (0x0000000Fu)
  5335. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_943_RESETVAL (0x00000000u)
  5336. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_944_MASK (0x00010000u)
  5337. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_944_SHIFT (0x00000010u)
  5338. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_944_RESETVAL (0x00000000u)
  5339. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_945_MASK (0x00020000u)
  5340. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_945_SHIFT (0x00000011u)
  5341. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_945_RESETVAL (0x00000000u)
  5342. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_946_MASK (0x00040000u)
  5343. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_946_SHIFT (0x00000012u)
  5344. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_946_RESETVAL (0x00000000u)
  5345. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_947_MASK (0x00080000u)
  5346. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_947_SHIFT (0x00000013u)
  5347. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_947_RESETVAL (0x00000000u)
  5348. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_948_MASK (0x00100000u)
  5349. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_948_SHIFT (0x00000014u)
  5350. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_948_RESETVAL (0x00000000u)
  5351. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_949_MASK (0x00200000u)
  5352. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_949_SHIFT (0x00000015u)
  5353. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_949_RESETVAL (0x00000000u)
  5354. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_950_MASK (0x00400000u)
  5355. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_950_SHIFT (0x00000016u)
  5356. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_950_RESETVAL (0x00000000u)
  5357. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_951_MASK (0x00800000u)
  5358. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_951_SHIFT (0x00000017u)
  5359. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_951_RESETVAL (0x00000000u)
  5360. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_952_MASK (0x01000000u)
  5361. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_952_SHIFT (0x00000018u)
  5362. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_952_RESETVAL (0x00000000u)
  5363. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_953_MASK (0x02000000u)
  5364. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_953_SHIFT (0x00000019u)
  5365. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_953_RESETVAL (0x00000000u)
  5366. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_954_MASK (0x04000000u)
  5367. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_954_SHIFT (0x0000001Au)
  5368. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_954_RESETVAL (0x00000000u)
  5369. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_955_MASK (0x08000000u)
  5370. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_955_SHIFT (0x0000001Bu)
  5371. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_955_RESETVAL (0x00000000u)
  5372. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_956_MASK (0x10000000u)
  5373. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_956_SHIFT (0x0000001Cu)
  5374. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_956_RESETVAL (0x00000000u)
  5375. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_957_MASK (0x20000000u)
  5376. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_957_SHIFT (0x0000001Du)
  5377. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_957_RESETVAL (0x00000000u)
  5378. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_958_MASK (0x40000000u)
  5379. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_958_SHIFT (0x0000001Eu)
  5380. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_958_RESETVAL (0x00000000u)
  5381. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_959_MASK (0x80000000u)
  5382. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_959_SHIFT (0x0000001Fu)
  5383. #define CSL_CPINTC_RAW_STATUS_REG29_RAW_STATUS_959_RESETVAL (0x00000000u)
  5384. #define CSL_CPINTC_RAW_STATUS_REG29_RESETVAL (0x00000000u)
  5385. /* raw_status_reg30 */
  5386. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_960_MASK (0x00000001u)
  5387. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_960_SHIFT (0x00000000u)
  5388. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_960_RESETVAL (0x00000000u)
  5389. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_961_MASK (0x00000002u)
  5390. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_961_SHIFT (0x00000001u)
  5391. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_961_RESETVAL (0x00000000u)
  5392. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_962_MASK (0x00000004u)
  5393. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_962_SHIFT (0x00000002u)
  5394. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_962_RESETVAL (0x00000000u)
  5395. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_963_MASK (0x00000008u)
  5396. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_963_SHIFT (0x00000003u)
  5397. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_963_RESETVAL (0x00000000u)
  5398. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_964_MASK (0x00000010u)
  5399. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_964_SHIFT (0x00000004u)
  5400. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_964_RESETVAL (0x00000000u)
  5401. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_965_MASK (0x00000020u)
  5402. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_965_SHIFT (0x00000005u)
  5403. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_965_RESETVAL (0x00000000u)
  5404. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_966_MASK (0x00000040u)
  5405. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_966_SHIFT (0x00000006u)
  5406. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_966_RESETVAL (0x00000000u)
  5407. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_967_MASK (0x00000080u)
  5408. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_967_SHIFT (0x00000007u)
  5409. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_967_RESETVAL (0x00000000u)
  5410. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_968_MASK (0x00000100u)
  5411. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_968_SHIFT (0x00000008u)
  5412. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_968_RESETVAL (0x00000000u)
  5413. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_969_MASK (0x00000200u)
  5414. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_969_SHIFT (0x00000009u)
  5415. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_969_RESETVAL (0x00000000u)
  5416. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_970_MASK (0x00000400u)
  5417. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_970_SHIFT (0x0000000Au)
  5418. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_970_RESETVAL (0x00000000u)
  5419. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_971_MASK (0x00000800u)
  5420. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_971_SHIFT (0x0000000Bu)
  5421. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_971_RESETVAL (0x00000000u)
  5422. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_972_MASK (0x00001000u)
  5423. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_972_SHIFT (0x0000000Cu)
  5424. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_972_RESETVAL (0x00000000u)
  5425. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_973_MASK (0x00002000u)
  5426. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_973_SHIFT (0x0000000Du)
  5427. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_973_RESETVAL (0x00000000u)
  5428. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_974_MASK (0x00004000u)
  5429. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_974_SHIFT (0x0000000Eu)
  5430. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_974_RESETVAL (0x00000000u)
  5431. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_975_MASK (0x00008000u)
  5432. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_975_SHIFT (0x0000000Fu)
  5433. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_975_RESETVAL (0x00000000u)
  5434. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_976_MASK (0x00010000u)
  5435. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_976_SHIFT (0x00000010u)
  5436. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_976_RESETVAL (0x00000000u)
  5437. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_977_MASK (0x00020000u)
  5438. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_977_SHIFT (0x00000011u)
  5439. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_977_RESETVAL (0x00000000u)
  5440. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_978_MASK (0x00040000u)
  5441. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_978_SHIFT (0x00000012u)
  5442. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_978_RESETVAL (0x00000000u)
  5443. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_979_MASK (0x00080000u)
  5444. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_979_SHIFT (0x00000013u)
  5445. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_979_RESETVAL (0x00000000u)
  5446. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_980_MASK (0x00100000u)
  5447. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_980_SHIFT (0x00000014u)
  5448. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_980_RESETVAL (0x00000000u)
  5449. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_981_MASK (0x00200000u)
  5450. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_981_SHIFT (0x00000015u)
  5451. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_981_RESETVAL (0x00000000u)
  5452. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_982_MASK (0x00400000u)
  5453. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_982_SHIFT (0x00000016u)
  5454. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_982_RESETVAL (0x00000000u)
  5455. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_983_MASK (0x00800000u)
  5456. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_983_SHIFT (0x00000017u)
  5457. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_983_RESETVAL (0x00000000u)
  5458. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_984_MASK (0x01000000u)
  5459. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_984_SHIFT (0x00000018u)
  5460. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_984_RESETVAL (0x00000000u)
  5461. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_985_MASK (0x02000000u)
  5462. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_985_SHIFT (0x00000019u)
  5463. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_985_RESETVAL (0x00000000u)
  5464. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_986_MASK (0x04000000u)
  5465. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_986_SHIFT (0x0000001Au)
  5466. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_986_RESETVAL (0x00000000u)
  5467. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_987_MASK (0x08000000u)
  5468. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_987_SHIFT (0x0000001Bu)
  5469. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_987_RESETVAL (0x00000000u)
  5470. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_988_MASK (0x10000000u)
  5471. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_988_SHIFT (0x0000001Cu)
  5472. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_988_RESETVAL (0x00000000u)
  5473. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_989_MASK (0x20000000u)
  5474. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_989_SHIFT (0x0000001Du)
  5475. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_989_RESETVAL (0x00000000u)
  5476. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_990_MASK (0x40000000u)
  5477. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_990_SHIFT (0x0000001Eu)
  5478. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_990_RESETVAL (0x00000000u)
  5479. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_991_MASK (0x80000000u)
  5480. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_991_SHIFT (0x0000001Fu)
  5481. #define CSL_CPINTC_RAW_STATUS_REG30_RAW_STATUS_991_RESETVAL (0x00000000u)
  5482. #define CSL_CPINTC_RAW_STATUS_REG30_RESETVAL (0x00000000u)
  5483. /* raw_status_reg31 */
  5484. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_992_MASK (0x00000001u)
  5485. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_992_SHIFT (0x00000000u)
  5486. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_992_RESETVAL (0x00000000u)
  5487. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_993_MASK (0x00000002u)
  5488. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_993_SHIFT (0x00000001u)
  5489. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_993_RESETVAL (0x00000000u)
  5490. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_994_MASK (0x00000004u)
  5491. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_994_SHIFT (0x00000002u)
  5492. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_994_RESETVAL (0x00000000u)
  5493. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_995_MASK (0x00000008u)
  5494. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_995_SHIFT (0x00000003u)
  5495. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_995_RESETVAL (0x00000000u)
  5496. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_996_MASK (0x00000010u)
  5497. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_996_SHIFT (0x00000004u)
  5498. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_996_RESETVAL (0x00000000u)
  5499. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_997_MASK (0x00000020u)
  5500. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_997_SHIFT (0x00000005u)
  5501. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_997_RESETVAL (0x00000000u)
  5502. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_998_MASK (0x00000040u)
  5503. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_998_SHIFT (0x00000006u)
  5504. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_998_RESETVAL (0x00000000u)
  5505. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_999_MASK (0x00000080u)
  5506. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_999_SHIFT (0x00000007u)
  5507. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_999_RESETVAL (0x00000000u)
  5508. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1000_MASK (0x00000100u)
  5509. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1000_SHIFT (0x00000008u)
  5510. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1000_RESETVAL (0x00000000u)
  5511. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1001_MASK (0x00000200u)
  5512. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1001_SHIFT (0x00000009u)
  5513. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1001_RESETVAL (0x00000000u)
  5514. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1002_MASK (0x00000400u)
  5515. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1002_SHIFT (0x0000000Au)
  5516. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1002_RESETVAL (0x00000000u)
  5517. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1003_MASK (0x00000800u)
  5518. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1003_SHIFT (0x0000000Bu)
  5519. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1003_RESETVAL (0x00000000u)
  5520. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1004_MASK (0x00001000u)
  5521. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1004_SHIFT (0x0000000Cu)
  5522. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1004_RESETVAL (0x00000000u)
  5523. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1005_MASK (0x00002000u)
  5524. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1005_SHIFT (0x0000000Du)
  5525. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1005_RESETVAL (0x00000000u)
  5526. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1006_MASK (0x00004000u)
  5527. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1006_SHIFT (0x0000000Eu)
  5528. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1006_RESETVAL (0x00000000u)
  5529. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1007_MASK (0x00008000u)
  5530. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1007_SHIFT (0x0000000Fu)
  5531. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1007_RESETVAL (0x00000000u)
  5532. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1008_MASK (0x00010000u)
  5533. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1008_SHIFT (0x00000010u)
  5534. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1008_RESETVAL (0x00000000u)
  5535. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1009_MASK (0x00020000u)
  5536. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1009_SHIFT (0x00000011u)
  5537. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1009_RESETVAL (0x00000000u)
  5538. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1010_MASK (0x00040000u)
  5539. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1010_SHIFT (0x00000012u)
  5540. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1010_RESETVAL (0x00000000u)
  5541. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1011_MASK (0x00080000u)
  5542. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1011_SHIFT (0x00000013u)
  5543. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1011_RESETVAL (0x00000000u)
  5544. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1012_MASK (0x00100000u)
  5545. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1012_SHIFT (0x00000014u)
  5546. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1012_RESETVAL (0x00000000u)
  5547. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1013_MASK (0x00200000u)
  5548. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1013_SHIFT (0x00000015u)
  5549. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1013_RESETVAL (0x00000000u)
  5550. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1014_MASK (0x00400000u)
  5551. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1014_SHIFT (0x00000016u)
  5552. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1014_RESETVAL (0x00000000u)
  5553. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1015_MASK (0x00800000u)
  5554. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1015_SHIFT (0x00000017u)
  5555. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1015_RESETVAL (0x00000000u)
  5556. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1016_MASK (0x01000000u)
  5557. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1016_SHIFT (0x00000018u)
  5558. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1016_RESETVAL (0x00000000u)
  5559. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1017_MASK (0x02000000u)
  5560. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1017_SHIFT (0x00000019u)
  5561. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1017_RESETVAL (0x00000000u)
  5562. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1018_MASK (0x04000000u)
  5563. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1018_SHIFT (0x0000001Au)
  5564. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1018_RESETVAL (0x00000000u)
  5565. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1019_MASK (0x08000000u)
  5566. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1019_SHIFT (0x0000001Bu)
  5567. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1019_RESETVAL (0x00000000u)
  5568. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1020_MASK (0x10000000u)
  5569. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1020_SHIFT (0x0000001Cu)
  5570. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1020_RESETVAL (0x00000000u)
  5571. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1021_MASK (0x20000000u)
  5572. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1021_SHIFT (0x0000001Du)
  5573. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1021_RESETVAL (0x00000000u)
  5574. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1022_MASK (0x40000000u)
  5575. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1022_SHIFT (0x0000001Eu)
  5576. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1022_RESETVAL (0x00000000u)
  5577. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1023_MASK (0x80000000u)
  5578. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1023_SHIFT (0x0000001Fu)
  5579. #define CSL_CPINTC_RAW_STATUS_REG31_RAW_STATUS_1023_RESETVAL (0x00000000u)
  5580. #define CSL_CPINTC_RAW_STATUS_REG31_RESETVAL (0x00000000u)
  5581. /* ena_status_reg0 */
  5582. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_0_MASK (0x00000001u)
  5583. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_0_SHIFT (0x00000000u)
  5584. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_0_RESETVAL (0x00000000u)
  5585. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_1_MASK (0x00000002u)
  5586. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_1_SHIFT (0x00000001u)
  5587. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_1_RESETVAL (0x00000000u)
  5588. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_2_MASK (0x00000004u)
  5589. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_2_SHIFT (0x00000002u)
  5590. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_2_RESETVAL (0x00000000u)
  5591. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_3_MASK (0x00000008u)
  5592. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_3_SHIFT (0x00000003u)
  5593. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_3_RESETVAL (0x00000000u)
  5594. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_4_MASK (0x00000010u)
  5595. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_4_SHIFT (0x00000004u)
  5596. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_4_RESETVAL (0x00000000u)
  5597. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_5_MASK (0x00000020u)
  5598. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_5_SHIFT (0x00000005u)
  5599. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_5_RESETVAL (0x00000000u)
  5600. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_6_MASK (0x00000040u)
  5601. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_6_SHIFT (0x00000006u)
  5602. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_6_RESETVAL (0x00000000u)
  5603. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_7_MASK (0x00000080u)
  5604. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_7_SHIFT (0x00000007u)
  5605. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_7_RESETVAL (0x00000000u)
  5606. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_8_MASK (0x00000100u)
  5607. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_8_SHIFT (0x00000008u)
  5608. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_8_RESETVAL (0x00000000u)
  5609. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_9_MASK (0x00000200u)
  5610. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_9_SHIFT (0x00000009u)
  5611. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_9_RESETVAL (0x00000000u)
  5612. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_10_MASK (0x00000400u)
  5613. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_10_SHIFT (0x0000000Au)
  5614. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_10_RESETVAL (0x00000000u)
  5615. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_11_MASK (0x00000800u)
  5616. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_11_SHIFT (0x0000000Bu)
  5617. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_11_RESETVAL (0x00000000u)
  5618. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_12_MASK (0x00001000u)
  5619. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_12_SHIFT (0x0000000Cu)
  5620. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_12_RESETVAL (0x00000000u)
  5621. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_13_MASK (0x00002000u)
  5622. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_13_SHIFT (0x0000000Du)
  5623. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_13_RESETVAL (0x00000000u)
  5624. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_14_MASK (0x00004000u)
  5625. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_14_SHIFT (0x0000000Eu)
  5626. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_14_RESETVAL (0x00000000u)
  5627. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_15_MASK (0x00008000u)
  5628. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_15_SHIFT (0x0000000Fu)
  5629. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_15_RESETVAL (0x00000000u)
  5630. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_16_MASK (0x00010000u)
  5631. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_16_SHIFT (0x00000010u)
  5632. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_16_RESETVAL (0x00000000u)
  5633. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_17_MASK (0x00020000u)
  5634. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_17_SHIFT (0x00000011u)
  5635. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_17_RESETVAL (0x00000000u)
  5636. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_18_MASK (0x00040000u)
  5637. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_18_SHIFT (0x00000012u)
  5638. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_18_RESETVAL (0x00000000u)
  5639. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_19_MASK (0x00080000u)
  5640. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_19_SHIFT (0x00000013u)
  5641. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_19_RESETVAL (0x00000000u)
  5642. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_20_MASK (0x00100000u)
  5643. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_20_SHIFT (0x00000014u)
  5644. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_20_RESETVAL (0x00000000u)
  5645. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_21_MASK (0x00200000u)
  5646. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_21_SHIFT (0x00000015u)
  5647. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_21_RESETVAL (0x00000000u)
  5648. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_22_MASK (0x00400000u)
  5649. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_22_SHIFT (0x00000016u)
  5650. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_22_RESETVAL (0x00000000u)
  5651. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_23_MASK (0x00800000u)
  5652. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_23_SHIFT (0x00000017u)
  5653. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_23_RESETVAL (0x00000000u)
  5654. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_24_MASK (0x01000000u)
  5655. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_24_SHIFT (0x00000018u)
  5656. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_24_RESETVAL (0x00000000u)
  5657. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_25_MASK (0x02000000u)
  5658. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_25_SHIFT (0x00000019u)
  5659. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_25_RESETVAL (0x00000000u)
  5660. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_26_MASK (0x04000000u)
  5661. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_26_SHIFT (0x0000001Au)
  5662. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_26_RESETVAL (0x00000000u)
  5663. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_27_MASK (0x08000000u)
  5664. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_27_SHIFT (0x0000001Bu)
  5665. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_27_RESETVAL (0x00000000u)
  5666. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_28_MASK (0x10000000u)
  5667. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_28_SHIFT (0x0000001Cu)
  5668. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_28_RESETVAL (0x00000000u)
  5669. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_29_MASK (0x20000000u)
  5670. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_29_SHIFT (0x0000001Du)
  5671. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_29_RESETVAL (0x00000000u)
  5672. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_30_MASK (0x40000000u)
  5673. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_30_SHIFT (0x0000001Eu)
  5674. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_30_RESETVAL (0x00000000u)
  5675. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_31_MASK (0x80000000u)
  5676. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_31_SHIFT (0x0000001Fu)
  5677. #define CSL_CPINTC_ENA_STATUS_REG0_ENA_STATUS_31_RESETVAL (0x00000000u)
  5678. #define CSL_CPINTC_ENA_STATUS_REG0_RESETVAL (0x00000000u)
  5679. /* ena_status_reg1 */
  5680. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_32_MASK (0x00000001u)
  5681. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_32_SHIFT (0x00000000u)
  5682. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_32_RESETVAL (0x00000000u)
  5683. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_33_MASK (0x00000002u)
  5684. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_33_SHIFT (0x00000001u)
  5685. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_33_RESETVAL (0x00000000u)
  5686. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_34_MASK (0x00000004u)
  5687. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_34_SHIFT (0x00000002u)
  5688. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_34_RESETVAL (0x00000000u)
  5689. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_35_MASK (0x00000008u)
  5690. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_35_SHIFT (0x00000003u)
  5691. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_35_RESETVAL (0x00000000u)
  5692. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_36_MASK (0x00000010u)
  5693. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_36_SHIFT (0x00000004u)
  5694. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_36_RESETVAL (0x00000000u)
  5695. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_37_MASK (0x00000020u)
  5696. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_37_SHIFT (0x00000005u)
  5697. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_37_RESETVAL (0x00000000u)
  5698. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_38_MASK (0x00000040u)
  5699. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_38_SHIFT (0x00000006u)
  5700. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_38_RESETVAL (0x00000000u)
  5701. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_39_MASK (0x00000080u)
  5702. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_39_SHIFT (0x00000007u)
  5703. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_39_RESETVAL (0x00000000u)
  5704. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_40_MASK (0x00000100u)
  5705. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_40_SHIFT (0x00000008u)
  5706. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_40_RESETVAL (0x00000000u)
  5707. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_41_MASK (0x00000200u)
  5708. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_41_SHIFT (0x00000009u)
  5709. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_41_RESETVAL (0x00000000u)
  5710. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_42_MASK (0x00000400u)
  5711. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_42_SHIFT (0x0000000Au)
  5712. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_42_RESETVAL (0x00000000u)
  5713. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_43_MASK (0x00000800u)
  5714. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_43_SHIFT (0x0000000Bu)
  5715. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_43_RESETVAL (0x00000000u)
  5716. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_44_MASK (0x00001000u)
  5717. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_44_SHIFT (0x0000000Cu)
  5718. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_44_RESETVAL (0x00000000u)
  5719. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_45_MASK (0x00002000u)
  5720. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_45_SHIFT (0x0000000Du)
  5721. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_45_RESETVAL (0x00000000u)
  5722. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_46_MASK (0x00004000u)
  5723. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_46_SHIFT (0x0000000Eu)
  5724. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_46_RESETVAL (0x00000000u)
  5725. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_47_MASK (0x00008000u)
  5726. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_47_SHIFT (0x0000000Fu)
  5727. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_47_RESETVAL (0x00000000u)
  5728. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_48_MASK (0x00010000u)
  5729. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_48_SHIFT (0x00000010u)
  5730. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_48_RESETVAL (0x00000000u)
  5731. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_49_MASK (0x00020000u)
  5732. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_49_SHIFT (0x00000011u)
  5733. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_49_RESETVAL (0x00000000u)
  5734. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_50_MASK (0x00040000u)
  5735. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_50_SHIFT (0x00000012u)
  5736. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_50_RESETVAL (0x00000000u)
  5737. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_51_MASK (0x00080000u)
  5738. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_51_SHIFT (0x00000013u)
  5739. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_51_RESETVAL (0x00000000u)
  5740. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_52_MASK (0x00100000u)
  5741. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_52_SHIFT (0x00000014u)
  5742. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_52_RESETVAL (0x00000000u)
  5743. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_53_MASK (0x00200000u)
  5744. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_53_SHIFT (0x00000015u)
  5745. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_53_RESETVAL (0x00000000u)
  5746. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_54_MASK (0x00400000u)
  5747. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_54_SHIFT (0x00000016u)
  5748. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_54_RESETVAL (0x00000000u)
  5749. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_55_MASK (0x00800000u)
  5750. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_55_SHIFT (0x00000017u)
  5751. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_55_RESETVAL (0x00000000u)
  5752. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_56_MASK (0x01000000u)
  5753. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_56_SHIFT (0x00000018u)
  5754. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_56_RESETVAL (0x00000000u)
  5755. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_57_MASK (0x02000000u)
  5756. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_57_SHIFT (0x00000019u)
  5757. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_57_RESETVAL (0x00000000u)
  5758. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_58_MASK (0x04000000u)
  5759. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_58_SHIFT (0x0000001Au)
  5760. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_58_RESETVAL (0x00000000u)
  5761. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_59_MASK (0x08000000u)
  5762. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_59_SHIFT (0x0000001Bu)
  5763. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_59_RESETVAL (0x00000000u)
  5764. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_60_MASK (0x10000000u)
  5765. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_60_SHIFT (0x0000001Cu)
  5766. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_60_RESETVAL (0x00000000u)
  5767. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_61_MASK (0x20000000u)
  5768. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_61_SHIFT (0x0000001Du)
  5769. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_61_RESETVAL (0x00000000u)
  5770. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_62_MASK (0x40000000u)
  5771. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_62_SHIFT (0x0000001Eu)
  5772. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_62_RESETVAL (0x00000000u)
  5773. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_63_MASK (0x80000000u)
  5774. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_63_SHIFT (0x0000001Fu)
  5775. #define CSL_CPINTC_ENA_STATUS_REG1_ENA_STATUS_63_RESETVAL (0x00000000u)
  5776. #define CSL_CPINTC_ENA_STATUS_REG1_RESETVAL (0x00000000u)
  5777. /* ena_status_reg2 */
  5778. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_64_MASK (0x00000001u)
  5779. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_64_SHIFT (0x00000000u)
  5780. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_64_RESETVAL (0x00000000u)
  5781. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_65_MASK (0x00000002u)
  5782. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_65_SHIFT (0x00000001u)
  5783. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_65_RESETVAL (0x00000000u)
  5784. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_66_MASK (0x00000004u)
  5785. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_66_SHIFT (0x00000002u)
  5786. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_66_RESETVAL (0x00000000u)
  5787. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_67_MASK (0x00000008u)
  5788. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_67_SHIFT (0x00000003u)
  5789. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_67_RESETVAL (0x00000000u)
  5790. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_68_MASK (0x00000010u)
  5791. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_68_SHIFT (0x00000004u)
  5792. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_68_RESETVAL (0x00000000u)
  5793. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_69_MASK (0x00000020u)
  5794. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_69_SHIFT (0x00000005u)
  5795. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_69_RESETVAL (0x00000000u)
  5796. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_70_MASK (0x00000040u)
  5797. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_70_SHIFT (0x00000006u)
  5798. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_70_RESETVAL (0x00000000u)
  5799. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_71_MASK (0x00000080u)
  5800. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_71_SHIFT (0x00000007u)
  5801. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_71_RESETVAL (0x00000000u)
  5802. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_72_MASK (0x00000100u)
  5803. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_72_SHIFT (0x00000008u)
  5804. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_72_RESETVAL (0x00000000u)
  5805. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_73_MASK (0x00000200u)
  5806. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_73_SHIFT (0x00000009u)
  5807. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_73_RESETVAL (0x00000000u)
  5808. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_74_MASK (0x00000400u)
  5809. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_74_SHIFT (0x0000000Au)
  5810. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_74_RESETVAL (0x00000000u)
  5811. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_75_MASK (0x00000800u)
  5812. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_75_SHIFT (0x0000000Bu)
  5813. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_75_RESETVAL (0x00000000u)
  5814. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_76_MASK (0x00001000u)
  5815. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_76_SHIFT (0x0000000Cu)
  5816. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_76_RESETVAL (0x00000000u)
  5817. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_77_MASK (0x00002000u)
  5818. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_77_SHIFT (0x0000000Du)
  5819. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_77_RESETVAL (0x00000000u)
  5820. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_78_MASK (0x00004000u)
  5821. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_78_SHIFT (0x0000000Eu)
  5822. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_78_RESETVAL (0x00000000u)
  5823. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_79_MASK (0x00008000u)
  5824. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_79_SHIFT (0x0000000Fu)
  5825. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_79_RESETVAL (0x00000000u)
  5826. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_80_MASK (0x00010000u)
  5827. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_80_SHIFT (0x00000010u)
  5828. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_80_RESETVAL (0x00000000u)
  5829. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_81_MASK (0x00020000u)
  5830. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_81_SHIFT (0x00000011u)
  5831. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_81_RESETVAL (0x00000000u)
  5832. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_82_MASK (0x00040000u)
  5833. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_82_SHIFT (0x00000012u)
  5834. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_82_RESETVAL (0x00000000u)
  5835. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_83_MASK (0x00080000u)
  5836. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_83_SHIFT (0x00000013u)
  5837. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_83_RESETVAL (0x00000000u)
  5838. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_84_MASK (0x00100000u)
  5839. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_84_SHIFT (0x00000014u)
  5840. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_84_RESETVAL (0x00000000u)
  5841. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_85_MASK (0x00200000u)
  5842. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_85_SHIFT (0x00000015u)
  5843. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_85_RESETVAL (0x00000000u)
  5844. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_86_MASK (0x00400000u)
  5845. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_86_SHIFT (0x00000016u)
  5846. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_86_RESETVAL (0x00000000u)
  5847. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_87_MASK (0x00800000u)
  5848. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_87_SHIFT (0x00000017u)
  5849. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_87_RESETVAL (0x00000000u)
  5850. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_88_MASK (0x01000000u)
  5851. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_88_SHIFT (0x00000018u)
  5852. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_88_RESETVAL (0x00000000u)
  5853. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_89_MASK (0x02000000u)
  5854. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_89_SHIFT (0x00000019u)
  5855. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_89_RESETVAL (0x00000000u)
  5856. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_90_MASK (0x04000000u)
  5857. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_90_SHIFT (0x0000001Au)
  5858. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_90_RESETVAL (0x00000000u)
  5859. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_91_MASK (0x08000000u)
  5860. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_91_SHIFT (0x0000001Bu)
  5861. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_91_RESETVAL (0x00000000u)
  5862. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_92_MASK (0x10000000u)
  5863. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_92_SHIFT (0x0000001Cu)
  5864. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_92_RESETVAL (0x00000000u)
  5865. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_93_MASK (0x20000000u)
  5866. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_93_SHIFT (0x0000001Du)
  5867. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_93_RESETVAL (0x00000000u)
  5868. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_94_MASK (0x40000000u)
  5869. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_94_SHIFT (0x0000001Eu)
  5870. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_94_RESETVAL (0x00000000u)
  5871. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_95_MASK (0x80000000u)
  5872. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_95_SHIFT (0x0000001Fu)
  5873. #define CSL_CPINTC_ENA_STATUS_REG2_ENA_STATUS_95_RESETVAL (0x00000000u)
  5874. #define CSL_CPINTC_ENA_STATUS_REG2_RESETVAL (0x00000000u)
  5875. /* ena_status_reg3 */
  5876. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_96_MASK (0x00000001u)
  5877. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_96_SHIFT (0x00000000u)
  5878. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_96_RESETVAL (0x00000000u)
  5879. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_97_MASK (0x00000002u)
  5880. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_97_SHIFT (0x00000001u)
  5881. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_97_RESETVAL (0x00000000u)
  5882. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_98_MASK (0x00000004u)
  5883. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_98_SHIFT (0x00000002u)
  5884. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_98_RESETVAL (0x00000000u)
  5885. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_99_MASK (0x00000008u)
  5886. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_99_SHIFT (0x00000003u)
  5887. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_99_RESETVAL (0x00000000u)
  5888. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_100_MASK (0x00000010u)
  5889. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_100_SHIFT (0x00000004u)
  5890. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_100_RESETVAL (0x00000000u)
  5891. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_101_MASK (0x00000020u)
  5892. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_101_SHIFT (0x00000005u)
  5893. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_101_RESETVAL (0x00000000u)
  5894. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_102_MASK (0x00000040u)
  5895. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_102_SHIFT (0x00000006u)
  5896. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_102_RESETVAL (0x00000000u)
  5897. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_103_MASK (0x00000080u)
  5898. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_103_SHIFT (0x00000007u)
  5899. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_103_RESETVAL (0x00000000u)
  5900. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_104_MASK (0x00000100u)
  5901. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_104_SHIFT (0x00000008u)
  5902. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_104_RESETVAL (0x00000000u)
  5903. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_105_MASK (0x00000200u)
  5904. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_105_SHIFT (0x00000009u)
  5905. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_105_RESETVAL (0x00000000u)
  5906. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_106_MASK (0x00000400u)
  5907. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_106_SHIFT (0x0000000Au)
  5908. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_106_RESETVAL (0x00000000u)
  5909. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_107_MASK (0x00000800u)
  5910. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_107_SHIFT (0x0000000Bu)
  5911. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_107_RESETVAL (0x00000000u)
  5912. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_108_MASK (0x00001000u)
  5913. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_108_SHIFT (0x0000000Cu)
  5914. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_108_RESETVAL (0x00000000u)
  5915. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_109_MASK (0x00002000u)
  5916. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_109_SHIFT (0x0000000Du)
  5917. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_109_RESETVAL (0x00000000u)
  5918. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_110_MASK (0x00004000u)
  5919. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_110_SHIFT (0x0000000Eu)
  5920. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_110_RESETVAL (0x00000000u)
  5921. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_111_MASK (0x00008000u)
  5922. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_111_SHIFT (0x0000000Fu)
  5923. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_111_RESETVAL (0x00000000u)
  5924. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_112_MASK (0x00010000u)
  5925. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_112_SHIFT (0x00000010u)
  5926. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_112_RESETVAL (0x00000000u)
  5927. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_113_MASK (0x00020000u)
  5928. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_113_SHIFT (0x00000011u)
  5929. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_113_RESETVAL (0x00000000u)
  5930. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_114_MASK (0x00040000u)
  5931. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_114_SHIFT (0x00000012u)
  5932. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_114_RESETVAL (0x00000000u)
  5933. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_115_MASK (0x00080000u)
  5934. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_115_SHIFT (0x00000013u)
  5935. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_115_RESETVAL (0x00000000u)
  5936. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_116_MASK (0x00100000u)
  5937. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_116_SHIFT (0x00000014u)
  5938. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_116_RESETVAL (0x00000000u)
  5939. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_117_MASK (0x00200000u)
  5940. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_117_SHIFT (0x00000015u)
  5941. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_117_RESETVAL (0x00000000u)
  5942. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_118_MASK (0x00400000u)
  5943. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_118_SHIFT (0x00000016u)
  5944. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_118_RESETVAL (0x00000000u)
  5945. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_119_MASK (0x00800000u)
  5946. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_119_SHIFT (0x00000017u)
  5947. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_119_RESETVAL (0x00000000u)
  5948. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_120_MASK (0x01000000u)
  5949. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_120_SHIFT (0x00000018u)
  5950. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_120_RESETVAL (0x00000000u)
  5951. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_121_MASK (0x02000000u)
  5952. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_121_SHIFT (0x00000019u)
  5953. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_121_RESETVAL (0x00000000u)
  5954. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_122_MASK (0x04000000u)
  5955. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_122_SHIFT (0x0000001Au)
  5956. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_122_RESETVAL (0x00000000u)
  5957. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_123_MASK (0x08000000u)
  5958. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_123_SHIFT (0x0000001Bu)
  5959. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_123_RESETVAL (0x00000000u)
  5960. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_124_MASK (0x10000000u)
  5961. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_124_SHIFT (0x0000001Cu)
  5962. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_124_RESETVAL (0x00000000u)
  5963. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_125_MASK (0x20000000u)
  5964. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_125_SHIFT (0x0000001Du)
  5965. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_125_RESETVAL (0x00000000u)
  5966. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_126_MASK (0x40000000u)
  5967. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_126_SHIFT (0x0000001Eu)
  5968. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_126_RESETVAL (0x00000000u)
  5969. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_127_MASK (0x80000000u)
  5970. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_127_SHIFT (0x0000001Fu)
  5971. #define CSL_CPINTC_ENA_STATUS_REG3_ENA_STATUS_127_RESETVAL (0x00000000u)
  5972. #define CSL_CPINTC_ENA_STATUS_REG3_RESETVAL (0x00000000u)
  5973. /* ena_status_reg4 */
  5974. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_128_MASK (0x00000001u)
  5975. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_128_SHIFT (0x00000000u)
  5976. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_128_RESETVAL (0x00000000u)
  5977. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_129_MASK (0x00000002u)
  5978. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_129_SHIFT (0x00000001u)
  5979. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_129_RESETVAL (0x00000000u)
  5980. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_130_MASK (0x00000004u)
  5981. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_130_SHIFT (0x00000002u)
  5982. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_130_RESETVAL (0x00000000u)
  5983. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_131_MASK (0x00000008u)
  5984. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_131_SHIFT (0x00000003u)
  5985. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_131_RESETVAL (0x00000000u)
  5986. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_132_MASK (0x00000010u)
  5987. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_132_SHIFT (0x00000004u)
  5988. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_132_RESETVAL (0x00000000u)
  5989. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_133_MASK (0x00000020u)
  5990. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_133_SHIFT (0x00000005u)
  5991. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_133_RESETVAL (0x00000000u)
  5992. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_134_MASK (0x00000040u)
  5993. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_134_SHIFT (0x00000006u)
  5994. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_134_RESETVAL (0x00000000u)
  5995. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_135_MASK (0x00000080u)
  5996. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_135_SHIFT (0x00000007u)
  5997. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_135_RESETVAL (0x00000000u)
  5998. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_136_MASK (0x00000100u)
  5999. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_136_SHIFT (0x00000008u)
  6000. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_136_RESETVAL (0x00000000u)
  6001. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_137_MASK (0x00000200u)
  6002. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_137_SHIFT (0x00000009u)
  6003. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_137_RESETVAL (0x00000000u)
  6004. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_138_MASK (0x00000400u)
  6005. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_138_SHIFT (0x0000000Au)
  6006. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_138_RESETVAL (0x00000000u)
  6007. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_139_MASK (0x00000800u)
  6008. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_139_SHIFT (0x0000000Bu)
  6009. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_139_RESETVAL (0x00000000u)
  6010. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_140_MASK (0x00001000u)
  6011. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_140_SHIFT (0x0000000Cu)
  6012. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_140_RESETVAL (0x00000000u)
  6013. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_141_MASK (0x00002000u)
  6014. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_141_SHIFT (0x0000000Du)
  6015. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_141_RESETVAL (0x00000000u)
  6016. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_142_MASK (0x00004000u)
  6017. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_142_SHIFT (0x0000000Eu)
  6018. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_142_RESETVAL (0x00000000u)
  6019. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_143_MASK (0x00008000u)
  6020. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_143_SHIFT (0x0000000Fu)
  6021. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_143_RESETVAL (0x00000000u)
  6022. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_144_MASK (0x00010000u)
  6023. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_144_SHIFT (0x00000010u)
  6024. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_144_RESETVAL (0x00000000u)
  6025. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_145_MASK (0x00020000u)
  6026. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_145_SHIFT (0x00000011u)
  6027. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_145_RESETVAL (0x00000000u)
  6028. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_146_MASK (0x00040000u)
  6029. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_146_SHIFT (0x00000012u)
  6030. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_146_RESETVAL (0x00000000u)
  6031. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_147_MASK (0x00080000u)
  6032. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_147_SHIFT (0x00000013u)
  6033. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_147_RESETVAL (0x00000000u)
  6034. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_148_MASK (0x00100000u)
  6035. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_148_SHIFT (0x00000014u)
  6036. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_148_RESETVAL (0x00000000u)
  6037. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_149_MASK (0x00200000u)
  6038. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_149_SHIFT (0x00000015u)
  6039. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_149_RESETVAL (0x00000000u)
  6040. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_150_MASK (0x00400000u)
  6041. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_150_SHIFT (0x00000016u)
  6042. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_150_RESETVAL (0x00000000u)
  6043. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_151_MASK (0x00800000u)
  6044. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_151_SHIFT (0x00000017u)
  6045. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_151_RESETVAL (0x00000000u)
  6046. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_152_MASK (0x01000000u)
  6047. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_152_SHIFT (0x00000018u)
  6048. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_152_RESETVAL (0x00000000u)
  6049. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_153_MASK (0x02000000u)
  6050. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_153_SHIFT (0x00000019u)
  6051. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_153_RESETVAL (0x00000000u)
  6052. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_154_MASK (0x04000000u)
  6053. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_154_SHIFT (0x0000001Au)
  6054. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_154_RESETVAL (0x00000000u)
  6055. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_155_MASK (0x08000000u)
  6056. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_155_SHIFT (0x0000001Bu)
  6057. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_155_RESETVAL (0x00000000u)
  6058. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_156_MASK (0x10000000u)
  6059. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_156_SHIFT (0x0000001Cu)
  6060. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_156_RESETVAL (0x00000000u)
  6061. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_157_MASK (0x20000000u)
  6062. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_157_SHIFT (0x0000001Du)
  6063. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_157_RESETVAL (0x00000000u)
  6064. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_158_MASK (0x40000000u)
  6065. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_158_SHIFT (0x0000001Eu)
  6066. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_158_RESETVAL (0x00000000u)
  6067. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_159_MASK (0x80000000u)
  6068. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_159_SHIFT (0x0000001Fu)
  6069. #define CSL_CPINTC_ENA_STATUS_REG4_ENA_STATUS_159_RESETVAL (0x00000000u)
  6070. #define CSL_CPINTC_ENA_STATUS_REG4_RESETVAL (0x00000000u)
  6071. /* ena_status_reg5 */
  6072. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_160_MASK (0x00000001u)
  6073. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_160_SHIFT (0x00000000u)
  6074. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_160_RESETVAL (0x00000000u)
  6075. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_161_MASK (0x00000002u)
  6076. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_161_SHIFT (0x00000001u)
  6077. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_161_RESETVAL (0x00000000u)
  6078. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_162_MASK (0x00000004u)
  6079. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_162_SHIFT (0x00000002u)
  6080. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_162_RESETVAL (0x00000000u)
  6081. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_163_MASK (0x00000008u)
  6082. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_163_SHIFT (0x00000003u)
  6083. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_163_RESETVAL (0x00000000u)
  6084. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_164_MASK (0x00000010u)
  6085. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_164_SHIFT (0x00000004u)
  6086. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_164_RESETVAL (0x00000000u)
  6087. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_165_MASK (0x00000020u)
  6088. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_165_SHIFT (0x00000005u)
  6089. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_165_RESETVAL (0x00000000u)
  6090. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_166_MASK (0x00000040u)
  6091. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_166_SHIFT (0x00000006u)
  6092. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_166_RESETVAL (0x00000000u)
  6093. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_167_MASK (0x00000080u)
  6094. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_167_SHIFT (0x00000007u)
  6095. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_167_RESETVAL (0x00000000u)
  6096. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_168_MASK (0x00000100u)
  6097. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_168_SHIFT (0x00000008u)
  6098. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_168_RESETVAL (0x00000000u)
  6099. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_169_MASK (0x00000200u)
  6100. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_169_SHIFT (0x00000009u)
  6101. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_169_RESETVAL (0x00000000u)
  6102. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_170_MASK (0x00000400u)
  6103. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_170_SHIFT (0x0000000Au)
  6104. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_170_RESETVAL (0x00000000u)
  6105. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_171_MASK (0x00000800u)
  6106. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_171_SHIFT (0x0000000Bu)
  6107. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_171_RESETVAL (0x00000000u)
  6108. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_172_MASK (0x00001000u)
  6109. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_172_SHIFT (0x0000000Cu)
  6110. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_172_RESETVAL (0x00000000u)
  6111. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_173_MASK (0x00002000u)
  6112. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_173_SHIFT (0x0000000Du)
  6113. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_173_RESETVAL (0x00000000u)
  6114. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_174_MASK (0x00004000u)
  6115. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_174_SHIFT (0x0000000Eu)
  6116. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_174_RESETVAL (0x00000000u)
  6117. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_175_MASK (0x00008000u)
  6118. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_175_SHIFT (0x0000000Fu)
  6119. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_175_RESETVAL (0x00000000u)
  6120. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_176_MASK (0x00010000u)
  6121. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_176_SHIFT (0x00000010u)
  6122. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_176_RESETVAL (0x00000000u)
  6123. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_177_MASK (0x00020000u)
  6124. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_177_SHIFT (0x00000011u)
  6125. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_177_RESETVAL (0x00000000u)
  6126. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_178_MASK (0x00040000u)
  6127. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_178_SHIFT (0x00000012u)
  6128. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_178_RESETVAL (0x00000000u)
  6129. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_179_MASK (0x00080000u)
  6130. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_179_SHIFT (0x00000013u)
  6131. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_179_RESETVAL (0x00000000u)
  6132. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_180_MASK (0x00100000u)
  6133. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_180_SHIFT (0x00000014u)
  6134. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_180_RESETVAL (0x00000000u)
  6135. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_181_MASK (0x00200000u)
  6136. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_181_SHIFT (0x00000015u)
  6137. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_181_RESETVAL (0x00000000u)
  6138. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_182_MASK (0x00400000u)
  6139. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_182_SHIFT (0x00000016u)
  6140. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_182_RESETVAL (0x00000000u)
  6141. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_183_MASK (0x00800000u)
  6142. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_183_SHIFT (0x00000017u)
  6143. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_183_RESETVAL (0x00000000u)
  6144. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_184_MASK (0x01000000u)
  6145. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_184_SHIFT (0x00000018u)
  6146. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_184_RESETVAL (0x00000000u)
  6147. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_185_MASK (0x02000000u)
  6148. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_185_SHIFT (0x00000019u)
  6149. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_185_RESETVAL (0x00000000u)
  6150. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_186_MASK (0x04000000u)
  6151. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_186_SHIFT (0x0000001Au)
  6152. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_186_RESETVAL (0x00000000u)
  6153. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_187_MASK (0x08000000u)
  6154. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_187_SHIFT (0x0000001Bu)
  6155. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_187_RESETVAL (0x00000000u)
  6156. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_188_MASK (0x10000000u)
  6157. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_188_SHIFT (0x0000001Cu)
  6158. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_188_RESETVAL (0x00000000u)
  6159. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_189_MASK (0x20000000u)
  6160. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_189_SHIFT (0x0000001Du)
  6161. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_189_RESETVAL (0x00000000u)
  6162. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_190_MASK (0x40000000u)
  6163. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_190_SHIFT (0x0000001Eu)
  6164. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_190_RESETVAL (0x00000000u)
  6165. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_191_MASK (0x80000000u)
  6166. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_191_SHIFT (0x0000001Fu)
  6167. #define CSL_CPINTC_ENA_STATUS_REG5_ENA_STATUS_191_RESETVAL (0x00000000u)
  6168. #define CSL_CPINTC_ENA_STATUS_REG5_RESETVAL (0x00000000u)
  6169. /* ena_status_reg6 */
  6170. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_192_MASK (0x00000001u)
  6171. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_192_SHIFT (0x00000000u)
  6172. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_192_RESETVAL (0x00000000u)
  6173. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_193_MASK (0x00000002u)
  6174. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_193_SHIFT (0x00000001u)
  6175. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_193_RESETVAL (0x00000000u)
  6176. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_194_MASK (0x00000004u)
  6177. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_194_SHIFT (0x00000002u)
  6178. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_194_RESETVAL (0x00000000u)
  6179. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_195_MASK (0x00000008u)
  6180. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_195_SHIFT (0x00000003u)
  6181. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_195_RESETVAL (0x00000000u)
  6182. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_196_MASK (0x00000010u)
  6183. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_196_SHIFT (0x00000004u)
  6184. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_196_RESETVAL (0x00000000u)
  6185. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_197_MASK (0x00000020u)
  6186. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_197_SHIFT (0x00000005u)
  6187. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_197_RESETVAL (0x00000000u)
  6188. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_198_MASK (0x00000040u)
  6189. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_198_SHIFT (0x00000006u)
  6190. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_198_RESETVAL (0x00000000u)
  6191. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_199_MASK (0x00000080u)
  6192. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_199_SHIFT (0x00000007u)
  6193. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_199_RESETVAL (0x00000000u)
  6194. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_200_MASK (0x00000100u)
  6195. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_200_SHIFT (0x00000008u)
  6196. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_200_RESETVAL (0x00000000u)
  6197. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_201_MASK (0x00000200u)
  6198. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_201_SHIFT (0x00000009u)
  6199. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_201_RESETVAL (0x00000000u)
  6200. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_202_MASK (0x00000400u)
  6201. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_202_SHIFT (0x0000000Au)
  6202. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_202_RESETVAL (0x00000000u)
  6203. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_203_MASK (0x00000800u)
  6204. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_203_SHIFT (0x0000000Bu)
  6205. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_203_RESETVAL (0x00000000u)
  6206. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_204_MASK (0x00001000u)
  6207. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_204_SHIFT (0x0000000Cu)
  6208. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_204_RESETVAL (0x00000000u)
  6209. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_205_MASK (0x00002000u)
  6210. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_205_SHIFT (0x0000000Du)
  6211. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_205_RESETVAL (0x00000000u)
  6212. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_206_MASK (0x00004000u)
  6213. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_206_SHIFT (0x0000000Eu)
  6214. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_206_RESETVAL (0x00000000u)
  6215. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_207_MASK (0x00008000u)
  6216. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_207_SHIFT (0x0000000Fu)
  6217. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_207_RESETVAL (0x00000000u)
  6218. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_208_MASK (0x00010000u)
  6219. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_208_SHIFT (0x00000010u)
  6220. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_208_RESETVAL (0x00000000u)
  6221. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_209_MASK (0x00020000u)
  6222. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_209_SHIFT (0x00000011u)
  6223. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_209_RESETVAL (0x00000000u)
  6224. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_210_MASK (0x00040000u)
  6225. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_210_SHIFT (0x00000012u)
  6226. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_210_RESETVAL (0x00000000u)
  6227. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_211_MASK (0x00080000u)
  6228. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_211_SHIFT (0x00000013u)
  6229. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_211_RESETVAL (0x00000000u)
  6230. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_212_MASK (0x00100000u)
  6231. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_212_SHIFT (0x00000014u)
  6232. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_212_RESETVAL (0x00000000u)
  6233. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_213_MASK (0x00200000u)
  6234. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_213_SHIFT (0x00000015u)
  6235. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_213_RESETVAL (0x00000000u)
  6236. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_214_MASK (0x00400000u)
  6237. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_214_SHIFT (0x00000016u)
  6238. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_214_RESETVAL (0x00000000u)
  6239. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_215_MASK (0x00800000u)
  6240. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_215_SHIFT (0x00000017u)
  6241. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_215_RESETVAL (0x00000000u)
  6242. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_216_MASK (0x01000000u)
  6243. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_216_SHIFT (0x00000018u)
  6244. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_216_RESETVAL (0x00000000u)
  6245. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_217_MASK (0x02000000u)
  6246. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_217_SHIFT (0x00000019u)
  6247. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_217_RESETVAL (0x00000000u)
  6248. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_218_MASK (0x04000000u)
  6249. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_218_SHIFT (0x0000001Au)
  6250. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_218_RESETVAL (0x00000000u)
  6251. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_219_MASK (0x08000000u)
  6252. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_219_SHIFT (0x0000001Bu)
  6253. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_219_RESETVAL (0x00000000u)
  6254. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_220_MASK (0x10000000u)
  6255. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_220_SHIFT (0x0000001Cu)
  6256. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_220_RESETVAL (0x00000000u)
  6257. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_221_MASK (0x20000000u)
  6258. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_221_SHIFT (0x0000001Du)
  6259. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_221_RESETVAL (0x00000000u)
  6260. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_222_MASK (0x40000000u)
  6261. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_222_SHIFT (0x0000001Eu)
  6262. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_222_RESETVAL (0x00000000u)
  6263. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_223_MASK (0x80000000u)
  6264. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_223_SHIFT (0x0000001Fu)
  6265. #define CSL_CPINTC_ENA_STATUS_REG6_ENA_STATUS_223_RESETVAL (0x00000000u)
  6266. #define CSL_CPINTC_ENA_STATUS_REG6_RESETVAL (0x00000000u)
  6267. /* ena_status_reg7 */
  6268. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_224_MASK (0x00000001u)
  6269. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_224_SHIFT (0x00000000u)
  6270. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_224_RESETVAL (0x00000000u)
  6271. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_225_MASK (0x00000002u)
  6272. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_225_SHIFT (0x00000001u)
  6273. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_225_RESETVAL (0x00000000u)
  6274. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_226_MASK (0x00000004u)
  6275. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_226_SHIFT (0x00000002u)
  6276. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_226_RESETVAL (0x00000000u)
  6277. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_227_MASK (0x00000008u)
  6278. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_227_SHIFT (0x00000003u)
  6279. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_227_RESETVAL (0x00000000u)
  6280. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_228_MASK (0x00000010u)
  6281. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_228_SHIFT (0x00000004u)
  6282. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_228_RESETVAL (0x00000000u)
  6283. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_229_MASK (0x00000020u)
  6284. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_229_SHIFT (0x00000005u)
  6285. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_229_RESETVAL (0x00000000u)
  6286. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_230_MASK (0x00000040u)
  6287. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_230_SHIFT (0x00000006u)
  6288. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_230_RESETVAL (0x00000000u)
  6289. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_231_MASK (0x00000080u)
  6290. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_231_SHIFT (0x00000007u)
  6291. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_231_RESETVAL (0x00000000u)
  6292. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_232_MASK (0x00000100u)
  6293. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_232_SHIFT (0x00000008u)
  6294. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_232_RESETVAL (0x00000000u)
  6295. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_233_MASK (0x00000200u)
  6296. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_233_SHIFT (0x00000009u)
  6297. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_233_RESETVAL (0x00000000u)
  6298. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_234_MASK (0x00000400u)
  6299. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_234_SHIFT (0x0000000Au)
  6300. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_234_RESETVAL (0x00000000u)
  6301. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_235_MASK (0x00000800u)
  6302. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_235_SHIFT (0x0000000Bu)
  6303. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_235_RESETVAL (0x00000000u)
  6304. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_236_MASK (0x00001000u)
  6305. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_236_SHIFT (0x0000000Cu)
  6306. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_236_RESETVAL (0x00000000u)
  6307. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_237_MASK (0x00002000u)
  6308. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_237_SHIFT (0x0000000Du)
  6309. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_237_RESETVAL (0x00000000u)
  6310. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_238_MASK (0x00004000u)
  6311. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_238_SHIFT (0x0000000Eu)
  6312. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_238_RESETVAL (0x00000000u)
  6313. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_239_MASK (0x00008000u)
  6314. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_239_SHIFT (0x0000000Fu)
  6315. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_239_RESETVAL (0x00000000u)
  6316. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_240_MASK (0x00010000u)
  6317. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_240_SHIFT (0x00000010u)
  6318. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_240_RESETVAL (0x00000000u)
  6319. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_241_MASK (0x00020000u)
  6320. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_241_SHIFT (0x00000011u)
  6321. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_241_RESETVAL (0x00000000u)
  6322. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_242_MASK (0x00040000u)
  6323. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_242_SHIFT (0x00000012u)
  6324. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_242_RESETVAL (0x00000000u)
  6325. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_243_MASK (0x00080000u)
  6326. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_243_SHIFT (0x00000013u)
  6327. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_243_RESETVAL (0x00000000u)
  6328. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_244_MASK (0x00100000u)
  6329. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_244_SHIFT (0x00000014u)
  6330. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_244_RESETVAL (0x00000000u)
  6331. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_245_MASK (0x00200000u)
  6332. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_245_SHIFT (0x00000015u)
  6333. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_245_RESETVAL (0x00000000u)
  6334. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_246_MASK (0x00400000u)
  6335. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_246_SHIFT (0x00000016u)
  6336. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_246_RESETVAL (0x00000000u)
  6337. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_247_MASK (0x00800000u)
  6338. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_247_SHIFT (0x00000017u)
  6339. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_247_RESETVAL (0x00000000u)
  6340. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_248_MASK (0x01000000u)
  6341. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_248_SHIFT (0x00000018u)
  6342. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_248_RESETVAL (0x00000000u)
  6343. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_249_MASK (0x02000000u)
  6344. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_249_SHIFT (0x00000019u)
  6345. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_249_RESETVAL (0x00000000u)
  6346. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_250_MASK (0x04000000u)
  6347. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_250_SHIFT (0x0000001Au)
  6348. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_250_RESETVAL (0x00000000u)
  6349. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_251_MASK (0x08000000u)
  6350. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_251_SHIFT (0x0000001Bu)
  6351. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_251_RESETVAL (0x00000000u)
  6352. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_252_MASK (0x10000000u)
  6353. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_252_SHIFT (0x0000001Cu)
  6354. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_252_RESETVAL (0x00000000u)
  6355. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_253_MASK (0x20000000u)
  6356. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_253_SHIFT (0x0000001Du)
  6357. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_253_RESETVAL (0x00000000u)
  6358. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_254_MASK (0x40000000u)
  6359. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_254_SHIFT (0x0000001Eu)
  6360. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_254_RESETVAL (0x00000000u)
  6361. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_255_MASK (0x80000000u)
  6362. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_255_SHIFT (0x0000001Fu)
  6363. #define CSL_CPINTC_ENA_STATUS_REG7_ENA_STATUS_255_RESETVAL (0x00000000u)
  6364. #define CSL_CPINTC_ENA_STATUS_REG7_RESETVAL (0x00000000u)
  6365. /* ena_status_reg8 */
  6366. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_256_MASK (0x00000001u)
  6367. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_256_SHIFT (0x00000000u)
  6368. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_256_RESETVAL (0x00000000u)
  6369. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_257_MASK (0x00000002u)
  6370. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_257_SHIFT (0x00000001u)
  6371. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_257_RESETVAL (0x00000000u)
  6372. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_258_MASK (0x00000004u)
  6373. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_258_SHIFT (0x00000002u)
  6374. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_258_RESETVAL (0x00000000u)
  6375. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_259_MASK (0x00000008u)
  6376. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_259_SHIFT (0x00000003u)
  6377. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_259_RESETVAL (0x00000000u)
  6378. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_260_MASK (0x00000010u)
  6379. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_260_SHIFT (0x00000004u)
  6380. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_260_RESETVAL (0x00000000u)
  6381. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_261_MASK (0x00000020u)
  6382. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_261_SHIFT (0x00000005u)
  6383. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_261_RESETVAL (0x00000000u)
  6384. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_262_MASK (0x00000040u)
  6385. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_262_SHIFT (0x00000006u)
  6386. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_262_RESETVAL (0x00000000u)
  6387. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_263_MASK (0x00000080u)
  6388. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_263_SHIFT (0x00000007u)
  6389. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_263_RESETVAL (0x00000000u)
  6390. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_264_MASK (0x00000100u)
  6391. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_264_SHIFT (0x00000008u)
  6392. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_264_RESETVAL (0x00000000u)
  6393. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_265_MASK (0x00000200u)
  6394. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_265_SHIFT (0x00000009u)
  6395. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_265_RESETVAL (0x00000000u)
  6396. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_266_MASK (0x00000400u)
  6397. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_266_SHIFT (0x0000000Au)
  6398. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_266_RESETVAL (0x00000000u)
  6399. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_267_MASK (0x00000800u)
  6400. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_267_SHIFT (0x0000000Bu)
  6401. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_267_RESETVAL (0x00000000u)
  6402. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_268_MASK (0x00001000u)
  6403. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_268_SHIFT (0x0000000Cu)
  6404. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_268_RESETVAL (0x00000000u)
  6405. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_269_MASK (0x00002000u)
  6406. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_269_SHIFT (0x0000000Du)
  6407. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_269_RESETVAL (0x00000000u)
  6408. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_270_MASK (0x00004000u)
  6409. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_270_SHIFT (0x0000000Eu)
  6410. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_270_RESETVAL (0x00000000u)
  6411. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_271_MASK (0x00008000u)
  6412. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_271_SHIFT (0x0000000Fu)
  6413. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_271_RESETVAL (0x00000000u)
  6414. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_272_MASK (0x00010000u)
  6415. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_272_SHIFT (0x00000010u)
  6416. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_272_RESETVAL (0x00000000u)
  6417. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_273_MASK (0x00020000u)
  6418. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_273_SHIFT (0x00000011u)
  6419. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_273_RESETVAL (0x00000000u)
  6420. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_274_MASK (0x00040000u)
  6421. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_274_SHIFT (0x00000012u)
  6422. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_274_RESETVAL (0x00000000u)
  6423. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_275_MASK (0x00080000u)
  6424. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_275_SHIFT (0x00000013u)
  6425. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_275_RESETVAL (0x00000000u)
  6426. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_276_MASK (0x00100000u)
  6427. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_276_SHIFT (0x00000014u)
  6428. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_276_RESETVAL (0x00000000u)
  6429. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_277_MASK (0x00200000u)
  6430. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_277_SHIFT (0x00000015u)
  6431. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_277_RESETVAL (0x00000000u)
  6432. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_278_MASK (0x00400000u)
  6433. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_278_SHIFT (0x00000016u)
  6434. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_278_RESETVAL (0x00000000u)
  6435. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_279_MASK (0x00800000u)
  6436. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_279_SHIFT (0x00000017u)
  6437. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_279_RESETVAL (0x00000000u)
  6438. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_280_MASK (0x01000000u)
  6439. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_280_SHIFT (0x00000018u)
  6440. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_280_RESETVAL (0x00000000u)
  6441. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_281_MASK (0x02000000u)
  6442. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_281_SHIFT (0x00000019u)
  6443. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_281_RESETVAL (0x00000000u)
  6444. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_282_MASK (0x04000000u)
  6445. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_282_SHIFT (0x0000001Au)
  6446. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_282_RESETVAL (0x00000000u)
  6447. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_283_MASK (0x08000000u)
  6448. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_283_SHIFT (0x0000001Bu)
  6449. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_283_RESETVAL (0x00000000u)
  6450. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_284_MASK (0x10000000u)
  6451. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_284_SHIFT (0x0000001Cu)
  6452. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_284_RESETVAL (0x00000000u)
  6453. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_285_MASK (0x20000000u)
  6454. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_285_SHIFT (0x0000001Du)
  6455. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_285_RESETVAL (0x00000000u)
  6456. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_286_MASK (0x40000000u)
  6457. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_286_SHIFT (0x0000001Eu)
  6458. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_286_RESETVAL (0x00000000u)
  6459. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_287_MASK (0x80000000u)
  6460. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_287_SHIFT (0x0000001Fu)
  6461. #define CSL_CPINTC_ENA_STATUS_REG8_ENA_STATUS_287_RESETVAL (0x00000000u)
  6462. #define CSL_CPINTC_ENA_STATUS_REG8_RESETVAL (0x00000000u)
  6463. /* ena_status_reg9 */
  6464. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_288_MASK (0x00000001u)
  6465. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_288_SHIFT (0x00000000u)
  6466. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_288_RESETVAL (0x00000000u)
  6467. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_289_MASK (0x00000002u)
  6468. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_289_SHIFT (0x00000001u)
  6469. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_289_RESETVAL (0x00000000u)
  6470. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_290_MASK (0x00000004u)
  6471. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_290_SHIFT (0x00000002u)
  6472. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_290_RESETVAL (0x00000000u)
  6473. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_291_MASK (0x00000008u)
  6474. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_291_SHIFT (0x00000003u)
  6475. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_291_RESETVAL (0x00000000u)
  6476. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_292_MASK (0x00000010u)
  6477. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_292_SHIFT (0x00000004u)
  6478. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_292_RESETVAL (0x00000000u)
  6479. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_293_MASK (0x00000020u)
  6480. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_293_SHIFT (0x00000005u)
  6481. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_293_RESETVAL (0x00000000u)
  6482. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_294_MASK (0x00000040u)
  6483. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_294_SHIFT (0x00000006u)
  6484. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_294_RESETVAL (0x00000000u)
  6485. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_295_MASK (0x00000080u)
  6486. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_295_SHIFT (0x00000007u)
  6487. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_295_RESETVAL (0x00000000u)
  6488. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_296_MASK (0x00000100u)
  6489. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_296_SHIFT (0x00000008u)
  6490. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_296_RESETVAL (0x00000000u)
  6491. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_297_MASK (0x00000200u)
  6492. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_297_SHIFT (0x00000009u)
  6493. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_297_RESETVAL (0x00000000u)
  6494. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_298_MASK (0x00000400u)
  6495. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_298_SHIFT (0x0000000Au)
  6496. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_298_RESETVAL (0x00000000u)
  6497. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_299_MASK (0x00000800u)
  6498. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_299_SHIFT (0x0000000Bu)
  6499. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_299_RESETVAL (0x00000000u)
  6500. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_300_MASK (0x00001000u)
  6501. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_300_SHIFT (0x0000000Cu)
  6502. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_300_RESETVAL (0x00000000u)
  6503. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_301_MASK (0x00002000u)
  6504. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_301_SHIFT (0x0000000Du)
  6505. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_301_RESETVAL (0x00000000u)
  6506. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_302_MASK (0x00004000u)
  6507. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_302_SHIFT (0x0000000Eu)
  6508. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_302_RESETVAL (0x00000000u)
  6509. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_303_MASK (0x00008000u)
  6510. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_303_SHIFT (0x0000000Fu)
  6511. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_303_RESETVAL (0x00000000u)
  6512. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_304_MASK (0x00010000u)
  6513. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_304_SHIFT (0x00000010u)
  6514. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_304_RESETVAL (0x00000000u)
  6515. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_305_MASK (0x00020000u)
  6516. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_305_SHIFT (0x00000011u)
  6517. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_305_RESETVAL (0x00000000u)
  6518. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_306_MASK (0x00040000u)
  6519. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_306_SHIFT (0x00000012u)
  6520. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_306_RESETVAL (0x00000000u)
  6521. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_307_MASK (0x00080000u)
  6522. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_307_SHIFT (0x00000013u)
  6523. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_307_RESETVAL (0x00000000u)
  6524. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_308_MASK (0x00100000u)
  6525. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_308_SHIFT (0x00000014u)
  6526. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_308_RESETVAL (0x00000000u)
  6527. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_309_MASK (0x00200000u)
  6528. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_309_SHIFT (0x00000015u)
  6529. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_309_RESETVAL (0x00000000u)
  6530. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_310_MASK (0x00400000u)
  6531. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_310_SHIFT (0x00000016u)
  6532. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_310_RESETVAL (0x00000000u)
  6533. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_311_MASK (0x00800000u)
  6534. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_311_SHIFT (0x00000017u)
  6535. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_311_RESETVAL (0x00000000u)
  6536. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_312_MASK (0x01000000u)
  6537. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_312_SHIFT (0x00000018u)
  6538. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_312_RESETVAL (0x00000000u)
  6539. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_313_MASK (0x02000000u)
  6540. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_313_SHIFT (0x00000019u)
  6541. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_313_RESETVAL (0x00000000u)
  6542. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_314_MASK (0x04000000u)
  6543. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_314_SHIFT (0x0000001Au)
  6544. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_314_RESETVAL (0x00000000u)
  6545. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_315_MASK (0x08000000u)
  6546. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_315_SHIFT (0x0000001Bu)
  6547. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_315_RESETVAL (0x00000000u)
  6548. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_316_MASK (0x10000000u)
  6549. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_316_SHIFT (0x0000001Cu)
  6550. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_316_RESETVAL (0x00000000u)
  6551. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_317_MASK (0x20000000u)
  6552. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_317_SHIFT (0x0000001Du)
  6553. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_317_RESETVAL (0x00000000u)
  6554. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_318_MASK (0x40000000u)
  6555. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_318_SHIFT (0x0000001Eu)
  6556. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_318_RESETVAL (0x00000000u)
  6557. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_319_MASK (0x80000000u)
  6558. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_319_SHIFT (0x0000001Fu)
  6559. #define CSL_CPINTC_ENA_STATUS_REG9_ENA_STATUS_319_RESETVAL (0x00000000u)
  6560. #define CSL_CPINTC_ENA_STATUS_REG9_RESETVAL (0x00000000u)
  6561. /* ena_status_reg10 */
  6562. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_320_MASK (0x00000001u)
  6563. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_320_SHIFT (0x00000000u)
  6564. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_320_RESETVAL (0x00000000u)
  6565. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_321_MASK (0x00000002u)
  6566. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_321_SHIFT (0x00000001u)
  6567. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_321_RESETVAL (0x00000000u)
  6568. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_322_MASK (0x00000004u)
  6569. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_322_SHIFT (0x00000002u)
  6570. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_322_RESETVAL (0x00000000u)
  6571. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_323_MASK (0x00000008u)
  6572. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_323_SHIFT (0x00000003u)
  6573. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_323_RESETVAL (0x00000000u)
  6574. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_324_MASK (0x00000010u)
  6575. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_324_SHIFT (0x00000004u)
  6576. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_324_RESETVAL (0x00000000u)
  6577. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_325_MASK (0x00000020u)
  6578. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_325_SHIFT (0x00000005u)
  6579. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_325_RESETVAL (0x00000000u)
  6580. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_326_MASK (0x00000040u)
  6581. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_326_SHIFT (0x00000006u)
  6582. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_326_RESETVAL (0x00000000u)
  6583. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_327_MASK (0x00000080u)
  6584. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_327_SHIFT (0x00000007u)
  6585. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_327_RESETVAL (0x00000000u)
  6586. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_328_MASK (0x00000100u)
  6587. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_328_SHIFT (0x00000008u)
  6588. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_328_RESETVAL (0x00000000u)
  6589. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_329_MASK (0x00000200u)
  6590. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_329_SHIFT (0x00000009u)
  6591. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_329_RESETVAL (0x00000000u)
  6592. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_330_MASK (0x00000400u)
  6593. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_330_SHIFT (0x0000000Au)
  6594. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_330_RESETVAL (0x00000000u)
  6595. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_331_MASK (0x00000800u)
  6596. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_331_SHIFT (0x0000000Bu)
  6597. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_331_RESETVAL (0x00000000u)
  6598. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_332_MASK (0x00001000u)
  6599. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_332_SHIFT (0x0000000Cu)
  6600. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_332_RESETVAL (0x00000000u)
  6601. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_333_MASK (0x00002000u)
  6602. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_333_SHIFT (0x0000000Du)
  6603. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_333_RESETVAL (0x00000000u)
  6604. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_334_MASK (0x00004000u)
  6605. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_334_SHIFT (0x0000000Eu)
  6606. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_334_RESETVAL (0x00000000u)
  6607. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_335_MASK (0x00008000u)
  6608. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_335_SHIFT (0x0000000Fu)
  6609. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_335_RESETVAL (0x00000000u)
  6610. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_336_MASK (0x00010000u)
  6611. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_336_SHIFT (0x00000010u)
  6612. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_336_RESETVAL (0x00000000u)
  6613. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_337_MASK (0x00020000u)
  6614. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_337_SHIFT (0x00000011u)
  6615. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_337_RESETVAL (0x00000000u)
  6616. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_338_MASK (0x00040000u)
  6617. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_338_SHIFT (0x00000012u)
  6618. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_338_RESETVAL (0x00000000u)
  6619. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_339_MASK (0x00080000u)
  6620. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_339_SHIFT (0x00000013u)
  6621. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_339_RESETVAL (0x00000000u)
  6622. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_340_MASK (0x00100000u)
  6623. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_340_SHIFT (0x00000014u)
  6624. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_340_RESETVAL (0x00000000u)
  6625. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_341_MASK (0x00200000u)
  6626. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_341_SHIFT (0x00000015u)
  6627. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_341_RESETVAL (0x00000000u)
  6628. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_342_MASK (0x00400000u)
  6629. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_342_SHIFT (0x00000016u)
  6630. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_342_RESETVAL (0x00000000u)
  6631. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_343_MASK (0x00800000u)
  6632. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_343_SHIFT (0x00000017u)
  6633. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_343_RESETVAL (0x00000000u)
  6634. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_344_MASK (0x01000000u)
  6635. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_344_SHIFT (0x00000018u)
  6636. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_344_RESETVAL (0x00000000u)
  6637. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_345_MASK (0x02000000u)
  6638. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_345_SHIFT (0x00000019u)
  6639. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_345_RESETVAL (0x00000000u)
  6640. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_346_MASK (0x04000000u)
  6641. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_346_SHIFT (0x0000001Au)
  6642. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_346_RESETVAL (0x00000000u)
  6643. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_347_MASK (0x08000000u)
  6644. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_347_SHIFT (0x0000001Bu)
  6645. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_347_RESETVAL (0x00000000u)
  6646. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_348_MASK (0x10000000u)
  6647. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_348_SHIFT (0x0000001Cu)
  6648. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_348_RESETVAL (0x00000000u)
  6649. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_349_MASK (0x20000000u)
  6650. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_349_SHIFT (0x0000001Du)
  6651. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_349_RESETVAL (0x00000000u)
  6652. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_350_MASK (0x40000000u)
  6653. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_350_SHIFT (0x0000001Eu)
  6654. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_350_RESETVAL (0x00000000u)
  6655. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_351_MASK (0x80000000u)
  6656. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_351_SHIFT (0x0000001Fu)
  6657. #define CSL_CPINTC_ENA_STATUS_REG10_ENA_STATUS_351_RESETVAL (0x00000000u)
  6658. #define CSL_CPINTC_ENA_STATUS_REG10_RESETVAL (0x00000000u)
  6659. /* ena_status_reg11 */
  6660. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_352_MASK (0x00000001u)
  6661. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_352_SHIFT (0x00000000u)
  6662. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_352_RESETVAL (0x00000000u)
  6663. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_353_MASK (0x00000002u)
  6664. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_353_SHIFT (0x00000001u)
  6665. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_353_RESETVAL (0x00000000u)
  6666. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_354_MASK (0x00000004u)
  6667. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_354_SHIFT (0x00000002u)
  6668. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_354_RESETVAL (0x00000000u)
  6669. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_355_MASK (0x00000008u)
  6670. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_355_SHIFT (0x00000003u)
  6671. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_355_RESETVAL (0x00000000u)
  6672. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_356_MASK (0x00000010u)
  6673. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_356_SHIFT (0x00000004u)
  6674. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_356_RESETVAL (0x00000000u)
  6675. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_357_MASK (0x00000020u)
  6676. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_357_SHIFT (0x00000005u)
  6677. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_357_RESETVAL (0x00000000u)
  6678. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_358_MASK (0x00000040u)
  6679. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_358_SHIFT (0x00000006u)
  6680. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_358_RESETVAL (0x00000000u)
  6681. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_359_MASK (0x00000080u)
  6682. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_359_SHIFT (0x00000007u)
  6683. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_359_RESETVAL (0x00000000u)
  6684. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_360_MASK (0x00000100u)
  6685. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_360_SHIFT (0x00000008u)
  6686. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_360_RESETVAL (0x00000000u)
  6687. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_361_MASK (0x00000200u)
  6688. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_361_SHIFT (0x00000009u)
  6689. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_361_RESETVAL (0x00000000u)
  6690. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_362_MASK (0x00000400u)
  6691. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_362_SHIFT (0x0000000Au)
  6692. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_362_RESETVAL (0x00000000u)
  6693. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_363_MASK (0x00000800u)
  6694. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_363_SHIFT (0x0000000Bu)
  6695. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_363_RESETVAL (0x00000000u)
  6696. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_364_MASK (0x00001000u)
  6697. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_364_SHIFT (0x0000000Cu)
  6698. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_364_RESETVAL (0x00000000u)
  6699. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_365_MASK (0x00002000u)
  6700. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_365_SHIFT (0x0000000Du)
  6701. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_365_RESETVAL (0x00000000u)
  6702. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_366_MASK (0x00004000u)
  6703. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_366_SHIFT (0x0000000Eu)
  6704. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_366_RESETVAL (0x00000000u)
  6705. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_367_MASK (0x00008000u)
  6706. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_367_SHIFT (0x0000000Fu)
  6707. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_367_RESETVAL (0x00000000u)
  6708. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_368_MASK (0x00010000u)
  6709. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_368_SHIFT (0x00000010u)
  6710. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_368_RESETVAL (0x00000000u)
  6711. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_369_MASK (0x00020000u)
  6712. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_369_SHIFT (0x00000011u)
  6713. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_369_RESETVAL (0x00000000u)
  6714. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_370_MASK (0x00040000u)
  6715. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_370_SHIFT (0x00000012u)
  6716. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_370_RESETVAL (0x00000000u)
  6717. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_371_MASK (0x00080000u)
  6718. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_371_SHIFT (0x00000013u)
  6719. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_371_RESETVAL (0x00000000u)
  6720. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_372_MASK (0x00100000u)
  6721. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_372_SHIFT (0x00000014u)
  6722. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_372_RESETVAL (0x00000000u)
  6723. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_373_MASK (0x00200000u)
  6724. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_373_SHIFT (0x00000015u)
  6725. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_373_RESETVAL (0x00000000u)
  6726. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_374_MASK (0x00400000u)
  6727. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_374_SHIFT (0x00000016u)
  6728. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_374_RESETVAL (0x00000000u)
  6729. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_375_MASK (0x00800000u)
  6730. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_375_SHIFT (0x00000017u)
  6731. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_375_RESETVAL (0x00000000u)
  6732. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_376_MASK (0x01000000u)
  6733. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_376_SHIFT (0x00000018u)
  6734. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_376_RESETVAL (0x00000000u)
  6735. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_377_MASK (0x02000000u)
  6736. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_377_SHIFT (0x00000019u)
  6737. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_377_RESETVAL (0x00000000u)
  6738. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_378_MASK (0x04000000u)
  6739. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_378_SHIFT (0x0000001Au)
  6740. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_378_RESETVAL (0x00000000u)
  6741. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_379_MASK (0x08000000u)
  6742. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_379_SHIFT (0x0000001Bu)
  6743. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_379_RESETVAL (0x00000000u)
  6744. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_380_MASK (0x10000000u)
  6745. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_380_SHIFT (0x0000001Cu)
  6746. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_380_RESETVAL (0x00000000u)
  6747. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_381_MASK (0x20000000u)
  6748. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_381_SHIFT (0x0000001Du)
  6749. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_381_RESETVAL (0x00000000u)
  6750. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_382_MASK (0x40000000u)
  6751. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_382_SHIFT (0x0000001Eu)
  6752. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_382_RESETVAL (0x00000000u)
  6753. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_383_MASK (0x80000000u)
  6754. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_383_SHIFT (0x0000001Fu)
  6755. #define CSL_CPINTC_ENA_STATUS_REG11_ENA_STATUS_383_RESETVAL (0x00000000u)
  6756. #define CSL_CPINTC_ENA_STATUS_REG11_RESETVAL (0x00000000u)
  6757. /* ena_status_reg12 */
  6758. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_384_MASK (0x00000001u)
  6759. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_384_SHIFT (0x00000000u)
  6760. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_384_RESETVAL (0x00000000u)
  6761. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_385_MASK (0x00000002u)
  6762. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_385_SHIFT (0x00000001u)
  6763. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_385_RESETVAL (0x00000000u)
  6764. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_386_MASK (0x00000004u)
  6765. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_386_SHIFT (0x00000002u)
  6766. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_386_RESETVAL (0x00000000u)
  6767. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_387_MASK (0x00000008u)
  6768. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_387_SHIFT (0x00000003u)
  6769. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_387_RESETVAL (0x00000000u)
  6770. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_388_MASK (0x00000010u)
  6771. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_388_SHIFT (0x00000004u)
  6772. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_388_RESETVAL (0x00000000u)
  6773. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_389_MASK (0x00000020u)
  6774. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_389_SHIFT (0x00000005u)
  6775. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_389_RESETVAL (0x00000000u)
  6776. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_390_MASK (0x00000040u)
  6777. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_390_SHIFT (0x00000006u)
  6778. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_390_RESETVAL (0x00000000u)
  6779. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_391_MASK (0x00000080u)
  6780. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_391_SHIFT (0x00000007u)
  6781. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_391_RESETVAL (0x00000000u)
  6782. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_392_MASK (0x00000100u)
  6783. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_392_SHIFT (0x00000008u)
  6784. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_392_RESETVAL (0x00000000u)
  6785. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_393_MASK (0x00000200u)
  6786. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_393_SHIFT (0x00000009u)
  6787. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_393_RESETVAL (0x00000000u)
  6788. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_394_MASK (0x00000400u)
  6789. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_394_SHIFT (0x0000000Au)
  6790. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_394_RESETVAL (0x00000000u)
  6791. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_395_MASK (0x00000800u)
  6792. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_395_SHIFT (0x0000000Bu)
  6793. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_395_RESETVAL (0x00000000u)
  6794. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_396_MASK (0x00001000u)
  6795. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_396_SHIFT (0x0000000Cu)
  6796. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_396_RESETVAL (0x00000000u)
  6797. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_397_MASK (0x00002000u)
  6798. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_397_SHIFT (0x0000000Du)
  6799. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_397_RESETVAL (0x00000000u)
  6800. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_398_MASK (0x00004000u)
  6801. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_398_SHIFT (0x0000000Eu)
  6802. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_398_RESETVAL (0x00000000u)
  6803. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_399_MASK (0x00008000u)
  6804. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_399_SHIFT (0x0000000Fu)
  6805. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_399_RESETVAL (0x00000000u)
  6806. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_400_MASK (0x00010000u)
  6807. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_400_SHIFT (0x00000010u)
  6808. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_400_RESETVAL (0x00000000u)
  6809. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_401_MASK (0x00020000u)
  6810. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_401_SHIFT (0x00000011u)
  6811. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_401_RESETVAL (0x00000000u)
  6812. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_402_MASK (0x00040000u)
  6813. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_402_SHIFT (0x00000012u)
  6814. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_402_RESETVAL (0x00000000u)
  6815. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_403_MASK (0x00080000u)
  6816. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_403_SHIFT (0x00000013u)
  6817. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_403_RESETVAL (0x00000000u)
  6818. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_404_MASK (0x00100000u)
  6819. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_404_SHIFT (0x00000014u)
  6820. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_404_RESETVAL (0x00000000u)
  6821. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_405_MASK (0x00200000u)
  6822. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_405_SHIFT (0x00000015u)
  6823. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_405_RESETVAL (0x00000000u)
  6824. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_406_MASK (0x00400000u)
  6825. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_406_SHIFT (0x00000016u)
  6826. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_406_RESETVAL (0x00000000u)
  6827. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_407_MASK (0x00800000u)
  6828. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_407_SHIFT (0x00000017u)
  6829. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_407_RESETVAL (0x00000000u)
  6830. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_408_MASK (0x01000000u)
  6831. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_408_SHIFT (0x00000018u)
  6832. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_408_RESETVAL (0x00000000u)
  6833. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_409_MASK (0x02000000u)
  6834. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_409_SHIFT (0x00000019u)
  6835. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_409_RESETVAL (0x00000000u)
  6836. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_410_MASK (0x04000000u)
  6837. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_410_SHIFT (0x0000001Au)
  6838. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_410_RESETVAL (0x00000000u)
  6839. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_411_MASK (0x08000000u)
  6840. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_411_SHIFT (0x0000001Bu)
  6841. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_411_RESETVAL (0x00000000u)
  6842. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_412_MASK (0x10000000u)
  6843. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_412_SHIFT (0x0000001Cu)
  6844. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_412_RESETVAL (0x00000000u)
  6845. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_413_MASK (0x20000000u)
  6846. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_413_SHIFT (0x0000001Du)
  6847. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_413_RESETVAL (0x00000000u)
  6848. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_414_MASK (0x40000000u)
  6849. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_414_SHIFT (0x0000001Eu)
  6850. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_414_RESETVAL (0x00000000u)
  6851. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_415_MASK (0x80000000u)
  6852. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_415_SHIFT (0x0000001Fu)
  6853. #define CSL_CPINTC_ENA_STATUS_REG12_ENA_STATUS_415_RESETVAL (0x00000000u)
  6854. #define CSL_CPINTC_ENA_STATUS_REG12_RESETVAL (0x00000000u)
  6855. /* ena_status_reg13 */
  6856. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_416_MASK (0x00000001u)
  6857. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_416_SHIFT (0x00000000u)
  6858. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_416_RESETVAL (0x00000000u)
  6859. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_417_MASK (0x00000002u)
  6860. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_417_SHIFT (0x00000001u)
  6861. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_417_RESETVAL (0x00000000u)
  6862. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_418_MASK (0x00000004u)
  6863. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_418_SHIFT (0x00000002u)
  6864. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_418_RESETVAL (0x00000000u)
  6865. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_419_MASK (0x00000008u)
  6866. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_419_SHIFT (0x00000003u)
  6867. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_419_RESETVAL (0x00000000u)
  6868. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_420_MASK (0x00000010u)
  6869. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_420_SHIFT (0x00000004u)
  6870. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_420_RESETVAL (0x00000000u)
  6871. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_421_MASK (0x00000020u)
  6872. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_421_SHIFT (0x00000005u)
  6873. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_421_RESETVAL (0x00000000u)
  6874. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_422_MASK (0x00000040u)
  6875. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_422_SHIFT (0x00000006u)
  6876. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_422_RESETVAL (0x00000000u)
  6877. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_423_MASK (0x00000080u)
  6878. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_423_SHIFT (0x00000007u)
  6879. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_423_RESETVAL (0x00000000u)
  6880. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_424_MASK (0x00000100u)
  6881. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_424_SHIFT (0x00000008u)
  6882. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_424_RESETVAL (0x00000000u)
  6883. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_425_MASK (0x00000200u)
  6884. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_425_SHIFT (0x00000009u)
  6885. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_425_RESETVAL (0x00000000u)
  6886. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_426_MASK (0x00000400u)
  6887. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_426_SHIFT (0x0000000Au)
  6888. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_426_RESETVAL (0x00000000u)
  6889. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_427_MASK (0x00000800u)
  6890. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_427_SHIFT (0x0000000Bu)
  6891. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_427_RESETVAL (0x00000000u)
  6892. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_428_MASK (0x00001000u)
  6893. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_428_SHIFT (0x0000000Cu)
  6894. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_428_RESETVAL (0x00000000u)
  6895. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_429_MASK (0x00002000u)
  6896. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_429_SHIFT (0x0000000Du)
  6897. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_429_RESETVAL (0x00000000u)
  6898. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_430_MASK (0x00004000u)
  6899. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_430_SHIFT (0x0000000Eu)
  6900. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_430_RESETVAL (0x00000000u)
  6901. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_431_MASK (0x00008000u)
  6902. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_431_SHIFT (0x0000000Fu)
  6903. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_431_RESETVAL (0x00000000u)
  6904. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_432_MASK (0x00010000u)
  6905. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_432_SHIFT (0x00000010u)
  6906. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_432_RESETVAL (0x00000000u)
  6907. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_433_MASK (0x00020000u)
  6908. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_433_SHIFT (0x00000011u)
  6909. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_433_RESETVAL (0x00000000u)
  6910. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_434_MASK (0x00040000u)
  6911. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_434_SHIFT (0x00000012u)
  6912. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_434_RESETVAL (0x00000000u)
  6913. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_435_MASK (0x00080000u)
  6914. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_435_SHIFT (0x00000013u)
  6915. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_435_RESETVAL (0x00000000u)
  6916. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_436_MASK (0x00100000u)
  6917. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_436_SHIFT (0x00000014u)
  6918. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_436_RESETVAL (0x00000000u)
  6919. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_437_MASK (0x00200000u)
  6920. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_437_SHIFT (0x00000015u)
  6921. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_437_RESETVAL (0x00000000u)
  6922. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_438_MASK (0x00400000u)
  6923. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_438_SHIFT (0x00000016u)
  6924. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_438_RESETVAL (0x00000000u)
  6925. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_439_MASK (0x00800000u)
  6926. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_439_SHIFT (0x00000017u)
  6927. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_439_RESETVAL (0x00000000u)
  6928. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_440_MASK (0x01000000u)
  6929. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_440_SHIFT (0x00000018u)
  6930. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_440_RESETVAL (0x00000000u)
  6931. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_441_MASK (0x02000000u)
  6932. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_441_SHIFT (0x00000019u)
  6933. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_441_RESETVAL (0x00000000u)
  6934. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_442_MASK (0x04000000u)
  6935. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_442_SHIFT (0x0000001Au)
  6936. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_442_RESETVAL (0x00000000u)
  6937. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_443_MASK (0x08000000u)
  6938. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_443_SHIFT (0x0000001Bu)
  6939. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_443_RESETVAL (0x00000000u)
  6940. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_444_MASK (0x10000000u)
  6941. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_444_SHIFT (0x0000001Cu)
  6942. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_444_RESETVAL (0x00000000u)
  6943. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_445_MASK (0x20000000u)
  6944. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_445_SHIFT (0x0000001Du)
  6945. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_445_RESETVAL (0x00000000u)
  6946. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_446_MASK (0x40000000u)
  6947. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_446_SHIFT (0x0000001Eu)
  6948. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_446_RESETVAL (0x00000000u)
  6949. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_447_MASK (0x80000000u)
  6950. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_447_SHIFT (0x0000001Fu)
  6951. #define CSL_CPINTC_ENA_STATUS_REG13_ENA_STATUS_447_RESETVAL (0x00000000u)
  6952. #define CSL_CPINTC_ENA_STATUS_REG13_RESETVAL (0x00000000u)
  6953. /* ena_status_reg14 */
  6954. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_448_MASK (0x00000001u)
  6955. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_448_SHIFT (0x00000000u)
  6956. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_448_RESETVAL (0x00000000u)
  6957. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_449_MASK (0x00000002u)
  6958. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_449_SHIFT (0x00000001u)
  6959. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_449_RESETVAL (0x00000000u)
  6960. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_450_MASK (0x00000004u)
  6961. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_450_SHIFT (0x00000002u)
  6962. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_450_RESETVAL (0x00000000u)
  6963. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_451_MASK (0x00000008u)
  6964. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_451_SHIFT (0x00000003u)
  6965. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_451_RESETVAL (0x00000000u)
  6966. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_452_MASK (0x00000010u)
  6967. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_452_SHIFT (0x00000004u)
  6968. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_452_RESETVAL (0x00000000u)
  6969. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_453_MASK (0x00000020u)
  6970. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_453_SHIFT (0x00000005u)
  6971. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_453_RESETVAL (0x00000000u)
  6972. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_454_MASK (0x00000040u)
  6973. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_454_SHIFT (0x00000006u)
  6974. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_454_RESETVAL (0x00000000u)
  6975. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_455_MASK (0x00000080u)
  6976. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_455_SHIFT (0x00000007u)
  6977. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_455_RESETVAL (0x00000000u)
  6978. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_456_MASK (0x00000100u)
  6979. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_456_SHIFT (0x00000008u)
  6980. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_456_RESETVAL (0x00000000u)
  6981. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_457_MASK (0x00000200u)
  6982. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_457_SHIFT (0x00000009u)
  6983. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_457_RESETVAL (0x00000000u)
  6984. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_458_MASK (0x00000400u)
  6985. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_458_SHIFT (0x0000000Au)
  6986. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_458_RESETVAL (0x00000000u)
  6987. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_459_MASK (0x00000800u)
  6988. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_459_SHIFT (0x0000000Bu)
  6989. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_459_RESETVAL (0x00000000u)
  6990. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_460_MASK (0x00001000u)
  6991. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_460_SHIFT (0x0000000Cu)
  6992. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_460_RESETVAL (0x00000000u)
  6993. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_461_MASK (0x00002000u)
  6994. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_461_SHIFT (0x0000000Du)
  6995. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_461_RESETVAL (0x00000000u)
  6996. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_462_MASK (0x00004000u)
  6997. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_462_SHIFT (0x0000000Eu)
  6998. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_462_RESETVAL (0x00000000u)
  6999. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_463_MASK (0x00008000u)
  7000. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_463_SHIFT (0x0000000Fu)
  7001. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_463_RESETVAL (0x00000000u)
  7002. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_464_MASK (0x00010000u)
  7003. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_464_SHIFT (0x00000010u)
  7004. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_464_RESETVAL (0x00000000u)
  7005. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_465_MASK (0x00020000u)
  7006. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_465_SHIFT (0x00000011u)
  7007. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_465_RESETVAL (0x00000000u)
  7008. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_466_MASK (0x00040000u)
  7009. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_466_SHIFT (0x00000012u)
  7010. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_466_RESETVAL (0x00000000u)
  7011. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_467_MASK (0x00080000u)
  7012. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_467_SHIFT (0x00000013u)
  7013. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_467_RESETVAL (0x00000000u)
  7014. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_468_MASK (0x00100000u)
  7015. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_468_SHIFT (0x00000014u)
  7016. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_468_RESETVAL (0x00000000u)
  7017. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_469_MASK (0x00200000u)
  7018. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_469_SHIFT (0x00000015u)
  7019. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_469_RESETVAL (0x00000000u)
  7020. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_470_MASK (0x00400000u)
  7021. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_470_SHIFT (0x00000016u)
  7022. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_470_RESETVAL (0x00000000u)
  7023. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_471_MASK (0x00800000u)
  7024. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_471_SHIFT (0x00000017u)
  7025. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_471_RESETVAL (0x00000000u)
  7026. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_472_MASK (0x01000000u)
  7027. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_472_SHIFT (0x00000018u)
  7028. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_472_RESETVAL (0x00000000u)
  7029. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_473_MASK (0x02000000u)
  7030. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_473_SHIFT (0x00000019u)
  7031. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_473_RESETVAL (0x00000000u)
  7032. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_474_MASK (0x04000000u)
  7033. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_474_SHIFT (0x0000001Au)
  7034. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_474_RESETVAL (0x00000000u)
  7035. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_475_MASK (0x08000000u)
  7036. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_475_SHIFT (0x0000001Bu)
  7037. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_475_RESETVAL (0x00000000u)
  7038. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_476_MASK (0x10000000u)
  7039. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_476_SHIFT (0x0000001Cu)
  7040. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_476_RESETVAL (0x00000000u)
  7041. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_477_MASK (0x20000000u)
  7042. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_477_SHIFT (0x0000001Du)
  7043. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_477_RESETVAL (0x00000000u)
  7044. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_478_MASK (0x40000000u)
  7045. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_478_SHIFT (0x0000001Eu)
  7046. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_478_RESETVAL (0x00000000u)
  7047. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_479_MASK (0x80000000u)
  7048. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_479_SHIFT (0x0000001Fu)
  7049. #define CSL_CPINTC_ENA_STATUS_REG14_ENA_STATUS_479_RESETVAL (0x00000000u)
  7050. #define CSL_CPINTC_ENA_STATUS_REG14_RESETVAL (0x00000000u)
  7051. /* ena_status_reg15 */
  7052. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_480_MASK (0x00000001u)
  7053. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_480_SHIFT (0x00000000u)
  7054. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_480_RESETVAL (0x00000000u)
  7055. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_481_MASK (0x00000002u)
  7056. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_481_SHIFT (0x00000001u)
  7057. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_481_RESETVAL (0x00000000u)
  7058. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_482_MASK (0x00000004u)
  7059. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_482_SHIFT (0x00000002u)
  7060. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_482_RESETVAL (0x00000000u)
  7061. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_483_MASK (0x00000008u)
  7062. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_483_SHIFT (0x00000003u)
  7063. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_483_RESETVAL (0x00000000u)
  7064. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_484_MASK (0x00000010u)
  7065. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_484_SHIFT (0x00000004u)
  7066. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_484_RESETVAL (0x00000000u)
  7067. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_485_MASK (0x00000020u)
  7068. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_485_SHIFT (0x00000005u)
  7069. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_485_RESETVAL (0x00000000u)
  7070. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_486_MASK (0x00000040u)
  7071. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_486_SHIFT (0x00000006u)
  7072. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_486_RESETVAL (0x00000000u)
  7073. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_487_MASK (0x00000080u)
  7074. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_487_SHIFT (0x00000007u)
  7075. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_487_RESETVAL (0x00000000u)
  7076. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_488_MASK (0x00000100u)
  7077. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_488_SHIFT (0x00000008u)
  7078. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_488_RESETVAL (0x00000000u)
  7079. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_489_MASK (0x00000200u)
  7080. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_489_SHIFT (0x00000009u)
  7081. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_489_RESETVAL (0x00000000u)
  7082. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_490_MASK (0x00000400u)
  7083. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_490_SHIFT (0x0000000Au)
  7084. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_490_RESETVAL (0x00000000u)
  7085. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_491_MASK (0x00000800u)
  7086. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_491_SHIFT (0x0000000Bu)
  7087. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_491_RESETVAL (0x00000000u)
  7088. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_492_MASK (0x00001000u)
  7089. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_492_SHIFT (0x0000000Cu)
  7090. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_492_RESETVAL (0x00000000u)
  7091. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_493_MASK (0x00002000u)
  7092. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_493_SHIFT (0x0000000Du)
  7093. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_493_RESETVAL (0x00000000u)
  7094. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_494_MASK (0x00004000u)
  7095. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_494_SHIFT (0x0000000Eu)
  7096. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_494_RESETVAL (0x00000000u)
  7097. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_495_MASK (0x00008000u)
  7098. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_495_SHIFT (0x0000000Fu)
  7099. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_495_RESETVAL (0x00000000u)
  7100. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_496_MASK (0x00010000u)
  7101. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_496_SHIFT (0x00000010u)
  7102. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_496_RESETVAL (0x00000000u)
  7103. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_497_MASK (0x00020000u)
  7104. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_497_SHIFT (0x00000011u)
  7105. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_497_RESETVAL (0x00000000u)
  7106. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_498_MASK (0x00040000u)
  7107. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_498_SHIFT (0x00000012u)
  7108. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_498_RESETVAL (0x00000000u)
  7109. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_499_MASK (0x00080000u)
  7110. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_499_SHIFT (0x00000013u)
  7111. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_499_RESETVAL (0x00000000u)
  7112. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_500_MASK (0x00100000u)
  7113. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_500_SHIFT (0x00000014u)
  7114. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_500_RESETVAL (0x00000000u)
  7115. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_501_MASK (0x00200000u)
  7116. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_501_SHIFT (0x00000015u)
  7117. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_501_RESETVAL (0x00000000u)
  7118. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_502_MASK (0x00400000u)
  7119. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_502_SHIFT (0x00000016u)
  7120. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_502_RESETVAL (0x00000000u)
  7121. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_503_MASK (0x00800000u)
  7122. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_503_SHIFT (0x00000017u)
  7123. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_503_RESETVAL (0x00000000u)
  7124. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_504_MASK (0x01000000u)
  7125. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_504_SHIFT (0x00000018u)
  7126. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_504_RESETVAL (0x00000000u)
  7127. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_505_MASK (0x02000000u)
  7128. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_505_SHIFT (0x00000019u)
  7129. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_505_RESETVAL (0x00000000u)
  7130. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_506_MASK (0x04000000u)
  7131. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_506_SHIFT (0x0000001Au)
  7132. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_506_RESETVAL (0x00000000u)
  7133. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_507_MASK (0x08000000u)
  7134. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_507_SHIFT (0x0000001Bu)
  7135. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_507_RESETVAL (0x00000000u)
  7136. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_508_MASK (0x10000000u)
  7137. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_508_SHIFT (0x0000001Cu)
  7138. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_508_RESETVAL (0x00000000u)
  7139. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_509_MASK (0x20000000u)
  7140. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_509_SHIFT (0x0000001Du)
  7141. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_509_RESETVAL (0x00000000u)
  7142. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_510_MASK (0x40000000u)
  7143. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_510_SHIFT (0x0000001Eu)
  7144. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_510_RESETVAL (0x00000000u)
  7145. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_511_MASK (0x80000000u)
  7146. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_511_SHIFT (0x0000001Fu)
  7147. #define CSL_CPINTC_ENA_STATUS_REG15_ENA_STATUS_511_RESETVAL (0x00000000u)
  7148. #define CSL_CPINTC_ENA_STATUS_REG15_RESETVAL (0x00000000u)
  7149. /* ena_status_reg16 */
  7150. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_512_MASK (0x00000001u)
  7151. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_512_SHIFT (0x00000000u)
  7152. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_512_RESETVAL (0x00000000u)
  7153. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_513_MASK (0x00000002u)
  7154. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_513_SHIFT (0x00000001u)
  7155. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_513_RESETVAL (0x00000000u)
  7156. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_514_MASK (0x00000004u)
  7157. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_514_SHIFT (0x00000002u)
  7158. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_514_RESETVAL (0x00000000u)
  7159. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_515_MASK (0x00000008u)
  7160. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_515_SHIFT (0x00000003u)
  7161. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_515_RESETVAL (0x00000000u)
  7162. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_516_MASK (0x00000010u)
  7163. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_516_SHIFT (0x00000004u)
  7164. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_516_RESETVAL (0x00000000u)
  7165. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_517_MASK (0x00000020u)
  7166. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_517_SHIFT (0x00000005u)
  7167. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_517_RESETVAL (0x00000000u)
  7168. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_518_MASK (0x00000040u)
  7169. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_518_SHIFT (0x00000006u)
  7170. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_518_RESETVAL (0x00000000u)
  7171. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_519_MASK (0x00000080u)
  7172. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_519_SHIFT (0x00000007u)
  7173. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_519_RESETVAL (0x00000000u)
  7174. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_520_MASK (0x00000100u)
  7175. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_520_SHIFT (0x00000008u)
  7176. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_520_RESETVAL (0x00000000u)
  7177. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_521_MASK (0x00000200u)
  7178. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_521_SHIFT (0x00000009u)
  7179. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_521_RESETVAL (0x00000000u)
  7180. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_522_MASK (0x00000400u)
  7181. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_522_SHIFT (0x0000000Au)
  7182. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_522_RESETVAL (0x00000000u)
  7183. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_523_MASK (0x00000800u)
  7184. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_523_SHIFT (0x0000000Bu)
  7185. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_523_RESETVAL (0x00000000u)
  7186. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_524_MASK (0x00001000u)
  7187. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_524_SHIFT (0x0000000Cu)
  7188. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_524_RESETVAL (0x00000000u)
  7189. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_525_MASK (0x00002000u)
  7190. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_525_SHIFT (0x0000000Du)
  7191. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_525_RESETVAL (0x00000000u)
  7192. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_526_MASK (0x00004000u)
  7193. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_526_SHIFT (0x0000000Eu)
  7194. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_526_RESETVAL (0x00000000u)
  7195. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_527_MASK (0x00008000u)
  7196. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_527_SHIFT (0x0000000Fu)
  7197. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_527_RESETVAL (0x00000000u)
  7198. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_528_MASK (0x00010000u)
  7199. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_528_SHIFT (0x00000010u)
  7200. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_528_RESETVAL (0x00000000u)
  7201. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_529_MASK (0x00020000u)
  7202. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_529_SHIFT (0x00000011u)
  7203. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_529_RESETVAL (0x00000000u)
  7204. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_530_MASK (0x00040000u)
  7205. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_530_SHIFT (0x00000012u)
  7206. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_530_RESETVAL (0x00000000u)
  7207. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_531_MASK (0x00080000u)
  7208. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_531_SHIFT (0x00000013u)
  7209. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_531_RESETVAL (0x00000000u)
  7210. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_532_MASK (0x00100000u)
  7211. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_532_SHIFT (0x00000014u)
  7212. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_532_RESETVAL (0x00000000u)
  7213. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_533_MASK (0x00200000u)
  7214. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_533_SHIFT (0x00000015u)
  7215. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_533_RESETVAL (0x00000000u)
  7216. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_534_MASK (0x00400000u)
  7217. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_534_SHIFT (0x00000016u)
  7218. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_534_RESETVAL (0x00000000u)
  7219. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_535_MASK (0x00800000u)
  7220. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_535_SHIFT (0x00000017u)
  7221. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_535_RESETVAL (0x00000000u)
  7222. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_536_MASK (0x01000000u)
  7223. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_536_SHIFT (0x00000018u)
  7224. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_536_RESETVAL (0x00000000u)
  7225. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_537_MASK (0x02000000u)
  7226. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_537_SHIFT (0x00000019u)
  7227. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_537_RESETVAL (0x00000000u)
  7228. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_538_MASK (0x04000000u)
  7229. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_538_SHIFT (0x0000001Au)
  7230. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_538_RESETVAL (0x00000000u)
  7231. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_539_MASK (0x08000000u)
  7232. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_539_SHIFT (0x0000001Bu)
  7233. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_539_RESETVAL (0x00000000u)
  7234. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_540_MASK (0x10000000u)
  7235. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_540_SHIFT (0x0000001Cu)
  7236. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_540_RESETVAL (0x00000000u)
  7237. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_541_MASK (0x20000000u)
  7238. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_541_SHIFT (0x0000001Du)
  7239. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_541_RESETVAL (0x00000000u)
  7240. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_542_MASK (0x40000000u)
  7241. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_542_SHIFT (0x0000001Eu)
  7242. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_542_RESETVAL (0x00000000u)
  7243. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_543_MASK (0x80000000u)
  7244. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_543_SHIFT (0x0000001Fu)
  7245. #define CSL_CPINTC_ENA_STATUS_REG16_ENA_STATUS_543_RESETVAL (0x00000000u)
  7246. #define CSL_CPINTC_ENA_STATUS_REG16_RESETVAL (0x00000000u)
  7247. /* ena_status_reg17 */
  7248. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_544_MASK (0x00000001u)
  7249. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_544_SHIFT (0x00000000u)
  7250. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_544_RESETVAL (0x00000000u)
  7251. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_545_MASK (0x00000002u)
  7252. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_545_SHIFT (0x00000001u)
  7253. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_545_RESETVAL (0x00000000u)
  7254. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_546_MASK (0x00000004u)
  7255. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_546_SHIFT (0x00000002u)
  7256. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_546_RESETVAL (0x00000000u)
  7257. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_547_MASK (0x00000008u)
  7258. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_547_SHIFT (0x00000003u)
  7259. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_547_RESETVAL (0x00000000u)
  7260. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_548_MASK (0x00000010u)
  7261. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_548_SHIFT (0x00000004u)
  7262. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_548_RESETVAL (0x00000000u)
  7263. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_549_MASK (0x00000020u)
  7264. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_549_SHIFT (0x00000005u)
  7265. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_549_RESETVAL (0x00000000u)
  7266. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_550_MASK (0x00000040u)
  7267. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_550_SHIFT (0x00000006u)
  7268. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_550_RESETVAL (0x00000000u)
  7269. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_551_MASK (0x00000080u)
  7270. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_551_SHIFT (0x00000007u)
  7271. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_551_RESETVAL (0x00000000u)
  7272. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_552_MASK (0x00000100u)
  7273. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_552_SHIFT (0x00000008u)
  7274. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_552_RESETVAL (0x00000000u)
  7275. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_553_MASK (0x00000200u)
  7276. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_553_SHIFT (0x00000009u)
  7277. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_553_RESETVAL (0x00000000u)
  7278. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_554_MASK (0x00000400u)
  7279. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_554_SHIFT (0x0000000Au)
  7280. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_554_RESETVAL (0x00000000u)
  7281. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_555_MASK (0x00000800u)
  7282. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_555_SHIFT (0x0000000Bu)
  7283. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_555_RESETVAL (0x00000000u)
  7284. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_556_MASK (0x00001000u)
  7285. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_556_SHIFT (0x0000000Cu)
  7286. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_556_RESETVAL (0x00000000u)
  7287. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_557_MASK (0x00002000u)
  7288. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_557_SHIFT (0x0000000Du)
  7289. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_557_RESETVAL (0x00000000u)
  7290. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_558_MASK (0x00004000u)
  7291. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_558_SHIFT (0x0000000Eu)
  7292. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_558_RESETVAL (0x00000000u)
  7293. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_559_MASK (0x00008000u)
  7294. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_559_SHIFT (0x0000000Fu)
  7295. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_559_RESETVAL (0x00000000u)
  7296. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_560_MASK (0x00010000u)
  7297. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_560_SHIFT (0x00000010u)
  7298. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_560_RESETVAL (0x00000000u)
  7299. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_561_MASK (0x00020000u)
  7300. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_561_SHIFT (0x00000011u)
  7301. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_561_RESETVAL (0x00000000u)
  7302. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_562_MASK (0x00040000u)
  7303. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_562_SHIFT (0x00000012u)
  7304. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_562_RESETVAL (0x00000000u)
  7305. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_563_MASK (0x00080000u)
  7306. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_563_SHIFT (0x00000013u)
  7307. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_563_RESETVAL (0x00000000u)
  7308. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_564_MASK (0x00100000u)
  7309. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_564_SHIFT (0x00000014u)
  7310. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_564_RESETVAL (0x00000000u)
  7311. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_565_MASK (0x00200000u)
  7312. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_565_SHIFT (0x00000015u)
  7313. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_565_RESETVAL (0x00000000u)
  7314. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_566_MASK (0x00400000u)
  7315. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_566_SHIFT (0x00000016u)
  7316. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_566_RESETVAL (0x00000000u)
  7317. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_567_MASK (0x00800000u)
  7318. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_567_SHIFT (0x00000017u)
  7319. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_567_RESETVAL (0x00000000u)
  7320. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_568_MASK (0x01000000u)
  7321. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_568_SHIFT (0x00000018u)
  7322. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_568_RESETVAL (0x00000000u)
  7323. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_569_MASK (0x02000000u)
  7324. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_569_SHIFT (0x00000019u)
  7325. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_569_RESETVAL (0x00000000u)
  7326. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_570_MASK (0x04000000u)
  7327. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_570_SHIFT (0x0000001Au)
  7328. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_570_RESETVAL (0x00000000u)
  7329. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_571_MASK (0x08000000u)
  7330. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_571_SHIFT (0x0000001Bu)
  7331. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_571_RESETVAL (0x00000000u)
  7332. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_572_MASK (0x10000000u)
  7333. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_572_SHIFT (0x0000001Cu)
  7334. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_572_RESETVAL (0x00000000u)
  7335. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_573_MASK (0x20000000u)
  7336. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_573_SHIFT (0x0000001Du)
  7337. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_573_RESETVAL (0x00000000u)
  7338. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_574_MASK (0x40000000u)
  7339. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_574_SHIFT (0x0000001Eu)
  7340. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_574_RESETVAL (0x00000000u)
  7341. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_575_MASK (0x80000000u)
  7342. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_575_SHIFT (0x0000001Fu)
  7343. #define CSL_CPINTC_ENA_STATUS_REG17_ENA_STATUS_575_RESETVAL (0x00000000u)
  7344. #define CSL_CPINTC_ENA_STATUS_REG17_RESETVAL (0x00000000u)
  7345. /* ena_status_reg18 */
  7346. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_576_MASK (0x00000001u)
  7347. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_576_SHIFT (0x00000000u)
  7348. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_576_RESETVAL (0x00000000u)
  7349. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_577_MASK (0x00000002u)
  7350. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_577_SHIFT (0x00000001u)
  7351. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_577_RESETVAL (0x00000000u)
  7352. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_578_MASK (0x00000004u)
  7353. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_578_SHIFT (0x00000002u)
  7354. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_578_RESETVAL (0x00000000u)
  7355. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_579_MASK (0x00000008u)
  7356. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_579_SHIFT (0x00000003u)
  7357. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_579_RESETVAL (0x00000000u)
  7358. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_580_MASK (0x00000010u)
  7359. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_580_SHIFT (0x00000004u)
  7360. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_580_RESETVAL (0x00000000u)
  7361. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_581_MASK (0x00000020u)
  7362. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_581_SHIFT (0x00000005u)
  7363. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_581_RESETVAL (0x00000000u)
  7364. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_582_MASK (0x00000040u)
  7365. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_582_SHIFT (0x00000006u)
  7366. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_582_RESETVAL (0x00000000u)
  7367. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_583_MASK (0x00000080u)
  7368. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_583_SHIFT (0x00000007u)
  7369. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_583_RESETVAL (0x00000000u)
  7370. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_584_MASK (0x00000100u)
  7371. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_584_SHIFT (0x00000008u)
  7372. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_584_RESETVAL (0x00000000u)
  7373. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_585_MASK (0x00000200u)
  7374. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_585_SHIFT (0x00000009u)
  7375. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_585_RESETVAL (0x00000000u)
  7376. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_586_MASK (0x00000400u)
  7377. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_586_SHIFT (0x0000000Au)
  7378. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_586_RESETVAL (0x00000000u)
  7379. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_587_MASK (0x00000800u)
  7380. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_587_SHIFT (0x0000000Bu)
  7381. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_587_RESETVAL (0x00000000u)
  7382. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_588_MASK (0x00001000u)
  7383. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_588_SHIFT (0x0000000Cu)
  7384. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_588_RESETVAL (0x00000000u)
  7385. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_589_MASK (0x00002000u)
  7386. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_589_SHIFT (0x0000000Du)
  7387. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_589_RESETVAL (0x00000000u)
  7388. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_590_MASK (0x00004000u)
  7389. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_590_SHIFT (0x0000000Eu)
  7390. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_590_RESETVAL (0x00000000u)
  7391. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_591_MASK (0x00008000u)
  7392. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_591_SHIFT (0x0000000Fu)
  7393. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_591_RESETVAL (0x00000000u)
  7394. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_592_MASK (0x00010000u)
  7395. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_592_SHIFT (0x00000010u)
  7396. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_592_RESETVAL (0x00000000u)
  7397. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_593_MASK (0x00020000u)
  7398. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_593_SHIFT (0x00000011u)
  7399. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_593_RESETVAL (0x00000000u)
  7400. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_594_MASK (0x00040000u)
  7401. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_594_SHIFT (0x00000012u)
  7402. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_594_RESETVAL (0x00000000u)
  7403. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_595_MASK (0x00080000u)
  7404. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_595_SHIFT (0x00000013u)
  7405. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_595_RESETVAL (0x00000000u)
  7406. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_596_MASK (0x00100000u)
  7407. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_596_SHIFT (0x00000014u)
  7408. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_596_RESETVAL (0x00000000u)
  7409. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_597_MASK (0x00200000u)
  7410. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_597_SHIFT (0x00000015u)
  7411. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_597_RESETVAL (0x00000000u)
  7412. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_598_MASK (0x00400000u)
  7413. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_598_SHIFT (0x00000016u)
  7414. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_598_RESETVAL (0x00000000u)
  7415. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_599_MASK (0x00800000u)
  7416. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_599_SHIFT (0x00000017u)
  7417. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_599_RESETVAL (0x00000000u)
  7418. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_600_MASK (0x01000000u)
  7419. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_600_SHIFT (0x00000018u)
  7420. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_600_RESETVAL (0x00000000u)
  7421. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_601_MASK (0x02000000u)
  7422. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_601_SHIFT (0x00000019u)
  7423. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_601_RESETVAL (0x00000000u)
  7424. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_602_MASK (0x04000000u)
  7425. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_602_SHIFT (0x0000001Au)
  7426. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_602_RESETVAL (0x00000000u)
  7427. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_603_MASK (0x08000000u)
  7428. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_603_SHIFT (0x0000001Bu)
  7429. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_603_RESETVAL (0x00000000u)
  7430. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_604_MASK (0x10000000u)
  7431. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_604_SHIFT (0x0000001Cu)
  7432. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_604_RESETVAL (0x00000000u)
  7433. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_605_MASK (0x20000000u)
  7434. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_605_SHIFT (0x0000001Du)
  7435. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_605_RESETVAL (0x00000000u)
  7436. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_606_MASK (0x40000000u)
  7437. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_606_SHIFT (0x0000001Eu)
  7438. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_606_RESETVAL (0x00000000u)
  7439. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_607_MASK (0x80000000u)
  7440. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_607_SHIFT (0x0000001Fu)
  7441. #define CSL_CPINTC_ENA_STATUS_REG18_ENA_STATUS_607_RESETVAL (0x00000000u)
  7442. #define CSL_CPINTC_ENA_STATUS_REG18_RESETVAL (0x00000000u)
  7443. /* ena_status_reg19 */
  7444. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_608_MASK (0x00000001u)
  7445. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_608_SHIFT (0x00000000u)
  7446. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_608_RESETVAL (0x00000000u)
  7447. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_609_MASK (0x00000002u)
  7448. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_609_SHIFT (0x00000001u)
  7449. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_609_RESETVAL (0x00000000u)
  7450. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_610_MASK (0x00000004u)
  7451. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_610_SHIFT (0x00000002u)
  7452. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_610_RESETVAL (0x00000000u)
  7453. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_611_MASK (0x00000008u)
  7454. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_611_SHIFT (0x00000003u)
  7455. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_611_RESETVAL (0x00000000u)
  7456. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_612_MASK (0x00000010u)
  7457. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_612_SHIFT (0x00000004u)
  7458. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_612_RESETVAL (0x00000000u)
  7459. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_613_MASK (0x00000020u)
  7460. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_613_SHIFT (0x00000005u)
  7461. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_613_RESETVAL (0x00000000u)
  7462. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_614_MASK (0x00000040u)
  7463. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_614_SHIFT (0x00000006u)
  7464. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_614_RESETVAL (0x00000000u)
  7465. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_615_MASK (0x00000080u)
  7466. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_615_SHIFT (0x00000007u)
  7467. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_615_RESETVAL (0x00000000u)
  7468. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_616_MASK (0x00000100u)
  7469. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_616_SHIFT (0x00000008u)
  7470. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_616_RESETVAL (0x00000000u)
  7471. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_617_MASK (0x00000200u)
  7472. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_617_SHIFT (0x00000009u)
  7473. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_617_RESETVAL (0x00000000u)
  7474. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_618_MASK (0x00000400u)
  7475. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_618_SHIFT (0x0000000Au)
  7476. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_618_RESETVAL (0x00000000u)
  7477. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_619_MASK (0x00000800u)
  7478. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_619_SHIFT (0x0000000Bu)
  7479. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_619_RESETVAL (0x00000000u)
  7480. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_620_MASK (0x00001000u)
  7481. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_620_SHIFT (0x0000000Cu)
  7482. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_620_RESETVAL (0x00000000u)
  7483. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_621_MASK (0x00002000u)
  7484. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_621_SHIFT (0x0000000Du)
  7485. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_621_RESETVAL (0x00000000u)
  7486. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_622_MASK (0x00004000u)
  7487. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_622_SHIFT (0x0000000Eu)
  7488. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_622_RESETVAL (0x00000000u)
  7489. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_623_MASK (0x00008000u)
  7490. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_623_SHIFT (0x0000000Fu)
  7491. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_623_RESETVAL (0x00000000u)
  7492. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_624_MASK (0x00010000u)
  7493. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_624_SHIFT (0x00000010u)
  7494. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_624_RESETVAL (0x00000000u)
  7495. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_625_MASK (0x00020000u)
  7496. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_625_SHIFT (0x00000011u)
  7497. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_625_RESETVAL (0x00000000u)
  7498. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_626_MASK (0x00040000u)
  7499. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_626_SHIFT (0x00000012u)
  7500. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_626_RESETVAL (0x00000000u)
  7501. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_627_MASK (0x00080000u)
  7502. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_627_SHIFT (0x00000013u)
  7503. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_627_RESETVAL (0x00000000u)
  7504. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_628_MASK (0x00100000u)
  7505. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_628_SHIFT (0x00000014u)
  7506. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_628_RESETVAL (0x00000000u)
  7507. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_629_MASK (0x00200000u)
  7508. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_629_SHIFT (0x00000015u)
  7509. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_629_RESETVAL (0x00000000u)
  7510. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_630_MASK (0x00400000u)
  7511. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_630_SHIFT (0x00000016u)
  7512. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_630_RESETVAL (0x00000000u)
  7513. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_631_MASK (0x00800000u)
  7514. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_631_SHIFT (0x00000017u)
  7515. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_631_RESETVAL (0x00000000u)
  7516. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_632_MASK (0x01000000u)
  7517. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_632_SHIFT (0x00000018u)
  7518. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_632_RESETVAL (0x00000000u)
  7519. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_633_MASK (0x02000000u)
  7520. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_633_SHIFT (0x00000019u)
  7521. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_633_RESETVAL (0x00000000u)
  7522. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_634_MASK (0x04000000u)
  7523. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_634_SHIFT (0x0000001Au)
  7524. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_634_RESETVAL (0x00000000u)
  7525. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_635_MASK (0x08000000u)
  7526. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_635_SHIFT (0x0000001Bu)
  7527. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_635_RESETVAL (0x00000000u)
  7528. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_636_MASK (0x10000000u)
  7529. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_636_SHIFT (0x0000001Cu)
  7530. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_636_RESETVAL (0x00000000u)
  7531. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_637_MASK (0x20000000u)
  7532. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_637_SHIFT (0x0000001Du)
  7533. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_637_RESETVAL (0x00000000u)
  7534. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_638_MASK (0x40000000u)
  7535. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_638_SHIFT (0x0000001Eu)
  7536. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_638_RESETVAL (0x00000000u)
  7537. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_639_MASK (0x80000000u)
  7538. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_639_SHIFT (0x0000001Fu)
  7539. #define CSL_CPINTC_ENA_STATUS_REG19_ENA_STATUS_639_RESETVAL (0x00000000u)
  7540. #define CSL_CPINTC_ENA_STATUS_REG19_RESETVAL (0x00000000u)
  7541. /* ena_status_reg20 */
  7542. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_640_MASK (0x00000001u)
  7543. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_640_SHIFT (0x00000000u)
  7544. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_640_RESETVAL (0x00000000u)
  7545. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_641_MASK (0x00000002u)
  7546. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_641_SHIFT (0x00000001u)
  7547. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_641_RESETVAL (0x00000000u)
  7548. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_642_MASK (0x00000004u)
  7549. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_642_SHIFT (0x00000002u)
  7550. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_642_RESETVAL (0x00000000u)
  7551. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_643_MASK (0x00000008u)
  7552. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_643_SHIFT (0x00000003u)
  7553. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_643_RESETVAL (0x00000000u)
  7554. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_644_MASK (0x00000010u)
  7555. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_644_SHIFT (0x00000004u)
  7556. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_644_RESETVAL (0x00000000u)
  7557. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_645_MASK (0x00000020u)
  7558. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_645_SHIFT (0x00000005u)
  7559. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_645_RESETVAL (0x00000000u)
  7560. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_646_MASK (0x00000040u)
  7561. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_646_SHIFT (0x00000006u)
  7562. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_646_RESETVAL (0x00000000u)
  7563. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_647_MASK (0x00000080u)
  7564. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_647_SHIFT (0x00000007u)
  7565. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_647_RESETVAL (0x00000000u)
  7566. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_648_MASK (0x00000100u)
  7567. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_648_SHIFT (0x00000008u)
  7568. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_648_RESETVAL (0x00000000u)
  7569. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_649_MASK (0x00000200u)
  7570. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_649_SHIFT (0x00000009u)
  7571. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_649_RESETVAL (0x00000000u)
  7572. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_650_MASK (0x00000400u)
  7573. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_650_SHIFT (0x0000000Au)
  7574. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_650_RESETVAL (0x00000000u)
  7575. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_651_MASK (0x00000800u)
  7576. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_651_SHIFT (0x0000000Bu)
  7577. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_651_RESETVAL (0x00000000u)
  7578. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_652_MASK (0x00001000u)
  7579. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_652_SHIFT (0x0000000Cu)
  7580. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_652_RESETVAL (0x00000000u)
  7581. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_653_MASK (0x00002000u)
  7582. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_653_SHIFT (0x0000000Du)
  7583. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_653_RESETVAL (0x00000000u)
  7584. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_654_MASK (0x00004000u)
  7585. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_654_SHIFT (0x0000000Eu)
  7586. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_654_RESETVAL (0x00000000u)
  7587. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_655_MASK (0x00008000u)
  7588. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_655_SHIFT (0x0000000Fu)
  7589. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_655_RESETVAL (0x00000000u)
  7590. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_656_MASK (0x00010000u)
  7591. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_656_SHIFT (0x00000010u)
  7592. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_656_RESETVAL (0x00000000u)
  7593. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_657_MASK (0x00020000u)
  7594. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_657_SHIFT (0x00000011u)
  7595. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_657_RESETVAL (0x00000000u)
  7596. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_658_MASK (0x00040000u)
  7597. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_658_SHIFT (0x00000012u)
  7598. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_658_RESETVAL (0x00000000u)
  7599. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_659_MASK (0x00080000u)
  7600. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_659_SHIFT (0x00000013u)
  7601. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_659_RESETVAL (0x00000000u)
  7602. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_660_MASK (0x00100000u)
  7603. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_660_SHIFT (0x00000014u)
  7604. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_660_RESETVAL (0x00000000u)
  7605. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_661_MASK (0x00200000u)
  7606. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_661_SHIFT (0x00000015u)
  7607. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_661_RESETVAL (0x00000000u)
  7608. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_662_MASK (0x00400000u)
  7609. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_662_SHIFT (0x00000016u)
  7610. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_662_RESETVAL (0x00000000u)
  7611. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_663_MASK (0x00800000u)
  7612. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_663_SHIFT (0x00000017u)
  7613. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_663_RESETVAL (0x00000000u)
  7614. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_664_MASK (0x01000000u)
  7615. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_664_SHIFT (0x00000018u)
  7616. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_664_RESETVAL (0x00000000u)
  7617. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_665_MASK (0x02000000u)
  7618. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_665_SHIFT (0x00000019u)
  7619. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_665_RESETVAL (0x00000000u)
  7620. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_666_MASK (0x04000000u)
  7621. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_666_SHIFT (0x0000001Au)
  7622. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_666_RESETVAL (0x00000000u)
  7623. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_667_MASK (0x08000000u)
  7624. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_667_SHIFT (0x0000001Bu)
  7625. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_667_RESETVAL (0x00000000u)
  7626. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_668_MASK (0x10000000u)
  7627. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_668_SHIFT (0x0000001Cu)
  7628. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_668_RESETVAL (0x00000000u)
  7629. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_669_MASK (0x20000000u)
  7630. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_669_SHIFT (0x0000001Du)
  7631. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_669_RESETVAL (0x00000000u)
  7632. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_670_MASK (0x40000000u)
  7633. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_670_SHIFT (0x0000001Eu)
  7634. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_670_RESETVAL (0x00000000u)
  7635. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_671_MASK (0x80000000u)
  7636. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_671_SHIFT (0x0000001Fu)
  7637. #define CSL_CPINTC_ENA_STATUS_REG20_ENA_STATUS_671_RESETVAL (0x00000000u)
  7638. #define CSL_CPINTC_ENA_STATUS_REG20_RESETVAL (0x00000000u)
  7639. /* ena_status_reg21 */
  7640. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_672_MASK (0x00000001u)
  7641. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_672_SHIFT (0x00000000u)
  7642. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_672_RESETVAL (0x00000000u)
  7643. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_673_MASK (0x00000002u)
  7644. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_673_SHIFT (0x00000001u)
  7645. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_673_RESETVAL (0x00000000u)
  7646. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_674_MASK (0x00000004u)
  7647. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_674_SHIFT (0x00000002u)
  7648. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_674_RESETVAL (0x00000000u)
  7649. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_675_MASK (0x00000008u)
  7650. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_675_SHIFT (0x00000003u)
  7651. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_675_RESETVAL (0x00000000u)
  7652. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_676_MASK (0x00000010u)
  7653. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_676_SHIFT (0x00000004u)
  7654. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_676_RESETVAL (0x00000000u)
  7655. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_677_MASK (0x00000020u)
  7656. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_677_SHIFT (0x00000005u)
  7657. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_677_RESETVAL (0x00000000u)
  7658. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_678_MASK (0x00000040u)
  7659. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_678_SHIFT (0x00000006u)
  7660. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_678_RESETVAL (0x00000000u)
  7661. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_679_MASK (0x00000080u)
  7662. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_679_SHIFT (0x00000007u)
  7663. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_679_RESETVAL (0x00000000u)
  7664. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_680_MASK (0x00000100u)
  7665. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_680_SHIFT (0x00000008u)
  7666. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_680_RESETVAL (0x00000000u)
  7667. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_681_MASK (0x00000200u)
  7668. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_681_SHIFT (0x00000009u)
  7669. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_681_RESETVAL (0x00000000u)
  7670. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_682_MASK (0x00000400u)
  7671. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_682_SHIFT (0x0000000Au)
  7672. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_682_RESETVAL (0x00000000u)
  7673. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_683_MASK (0x00000800u)
  7674. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_683_SHIFT (0x0000000Bu)
  7675. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_683_RESETVAL (0x00000000u)
  7676. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_684_MASK (0x00001000u)
  7677. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_684_SHIFT (0x0000000Cu)
  7678. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_684_RESETVAL (0x00000000u)
  7679. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_685_MASK (0x00002000u)
  7680. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_685_SHIFT (0x0000000Du)
  7681. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_685_RESETVAL (0x00000000u)
  7682. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_686_MASK (0x00004000u)
  7683. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_686_SHIFT (0x0000000Eu)
  7684. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_686_RESETVAL (0x00000000u)
  7685. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_687_MASK (0x00008000u)
  7686. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_687_SHIFT (0x0000000Fu)
  7687. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_687_RESETVAL (0x00000000u)
  7688. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_688_MASK (0x00010000u)
  7689. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_688_SHIFT (0x00000010u)
  7690. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_688_RESETVAL (0x00000000u)
  7691. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_689_MASK (0x00020000u)
  7692. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_689_SHIFT (0x00000011u)
  7693. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_689_RESETVAL (0x00000000u)
  7694. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_690_MASK (0x00040000u)
  7695. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_690_SHIFT (0x00000012u)
  7696. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_690_RESETVAL (0x00000000u)
  7697. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_691_MASK (0x00080000u)
  7698. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_691_SHIFT (0x00000013u)
  7699. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_691_RESETVAL (0x00000000u)
  7700. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_692_MASK (0x00100000u)
  7701. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_692_SHIFT (0x00000014u)
  7702. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_692_RESETVAL (0x00000000u)
  7703. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_693_MASK (0x00200000u)
  7704. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_693_SHIFT (0x00000015u)
  7705. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_693_RESETVAL (0x00000000u)
  7706. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_694_MASK (0x00400000u)
  7707. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_694_SHIFT (0x00000016u)
  7708. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_694_RESETVAL (0x00000000u)
  7709. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_695_MASK (0x00800000u)
  7710. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_695_SHIFT (0x00000017u)
  7711. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_695_RESETVAL (0x00000000u)
  7712. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_696_MASK (0x01000000u)
  7713. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_696_SHIFT (0x00000018u)
  7714. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_696_RESETVAL (0x00000000u)
  7715. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_697_MASK (0x02000000u)
  7716. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_697_SHIFT (0x00000019u)
  7717. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_697_RESETVAL (0x00000000u)
  7718. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_698_MASK (0x04000000u)
  7719. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_698_SHIFT (0x0000001Au)
  7720. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_698_RESETVAL (0x00000000u)
  7721. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_699_MASK (0x08000000u)
  7722. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_699_SHIFT (0x0000001Bu)
  7723. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_699_RESETVAL (0x00000000u)
  7724. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_700_MASK (0x10000000u)
  7725. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_700_SHIFT (0x0000001Cu)
  7726. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_700_RESETVAL (0x00000000u)
  7727. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_701_MASK (0x20000000u)
  7728. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_701_SHIFT (0x0000001Du)
  7729. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_701_RESETVAL (0x00000000u)
  7730. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_702_MASK (0x40000000u)
  7731. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_702_SHIFT (0x0000001Eu)
  7732. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_702_RESETVAL (0x00000000u)
  7733. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_703_MASK (0x80000000u)
  7734. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_703_SHIFT (0x0000001Fu)
  7735. #define CSL_CPINTC_ENA_STATUS_REG21_ENA_STATUS_703_RESETVAL (0x00000000u)
  7736. #define CSL_CPINTC_ENA_STATUS_REG21_RESETVAL (0x00000000u)
  7737. /* ena_status_reg22 */
  7738. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_704_MASK (0x00000001u)
  7739. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_704_SHIFT (0x00000000u)
  7740. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_704_RESETVAL (0x00000000u)
  7741. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_705_MASK (0x00000002u)
  7742. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_705_SHIFT (0x00000001u)
  7743. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_705_RESETVAL (0x00000000u)
  7744. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_706_MASK (0x00000004u)
  7745. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_706_SHIFT (0x00000002u)
  7746. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_706_RESETVAL (0x00000000u)
  7747. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_707_MASK (0x00000008u)
  7748. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_707_SHIFT (0x00000003u)
  7749. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_707_RESETVAL (0x00000000u)
  7750. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_708_MASK (0x00000010u)
  7751. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_708_SHIFT (0x00000004u)
  7752. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_708_RESETVAL (0x00000000u)
  7753. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_709_MASK (0x00000020u)
  7754. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_709_SHIFT (0x00000005u)
  7755. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_709_RESETVAL (0x00000000u)
  7756. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_710_MASK (0x00000040u)
  7757. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_710_SHIFT (0x00000006u)
  7758. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_710_RESETVAL (0x00000000u)
  7759. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_711_MASK (0x00000080u)
  7760. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_711_SHIFT (0x00000007u)
  7761. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_711_RESETVAL (0x00000000u)
  7762. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_712_MASK (0x00000100u)
  7763. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_712_SHIFT (0x00000008u)
  7764. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_712_RESETVAL (0x00000000u)
  7765. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_713_MASK (0x00000200u)
  7766. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_713_SHIFT (0x00000009u)
  7767. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_713_RESETVAL (0x00000000u)
  7768. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_714_MASK (0x00000400u)
  7769. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_714_SHIFT (0x0000000Au)
  7770. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_714_RESETVAL (0x00000000u)
  7771. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_715_MASK (0x00000800u)
  7772. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_715_SHIFT (0x0000000Bu)
  7773. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_715_RESETVAL (0x00000000u)
  7774. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_716_MASK (0x00001000u)
  7775. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_716_SHIFT (0x0000000Cu)
  7776. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_716_RESETVAL (0x00000000u)
  7777. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_717_MASK (0x00002000u)
  7778. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_717_SHIFT (0x0000000Du)
  7779. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_717_RESETVAL (0x00000000u)
  7780. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_718_MASK (0x00004000u)
  7781. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_718_SHIFT (0x0000000Eu)
  7782. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_718_RESETVAL (0x00000000u)
  7783. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_719_MASK (0x00008000u)
  7784. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_719_SHIFT (0x0000000Fu)
  7785. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_719_RESETVAL (0x00000000u)
  7786. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_720_MASK (0x00010000u)
  7787. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_720_SHIFT (0x00000010u)
  7788. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_720_RESETVAL (0x00000000u)
  7789. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_721_MASK (0x00020000u)
  7790. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_721_SHIFT (0x00000011u)
  7791. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_721_RESETVAL (0x00000000u)
  7792. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_722_MASK (0x00040000u)
  7793. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_722_SHIFT (0x00000012u)
  7794. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_722_RESETVAL (0x00000000u)
  7795. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_723_MASK (0x00080000u)
  7796. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_723_SHIFT (0x00000013u)
  7797. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_723_RESETVAL (0x00000000u)
  7798. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_724_MASK (0x00100000u)
  7799. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_724_SHIFT (0x00000014u)
  7800. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_724_RESETVAL (0x00000000u)
  7801. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_725_MASK (0x00200000u)
  7802. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_725_SHIFT (0x00000015u)
  7803. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_725_RESETVAL (0x00000000u)
  7804. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_726_MASK (0x00400000u)
  7805. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_726_SHIFT (0x00000016u)
  7806. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_726_RESETVAL (0x00000000u)
  7807. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_727_MASK (0x00800000u)
  7808. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_727_SHIFT (0x00000017u)
  7809. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_727_RESETVAL (0x00000000u)
  7810. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_728_MASK (0x01000000u)
  7811. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_728_SHIFT (0x00000018u)
  7812. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_728_RESETVAL (0x00000000u)
  7813. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_729_MASK (0x02000000u)
  7814. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_729_SHIFT (0x00000019u)
  7815. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_729_RESETVAL (0x00000000u)
  7816. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_730_MASK (0x04000000u)
  7817. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_730_SHIFT (0x0000001Au)
  7818. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_730_RESETVAL (0x00000000u)
  7819. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_731_MASK (0x08000000u)
  7820. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_731_SHIFT (0x0000001Bu)
  7821. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_731_RESETVAL (0x00000000u)
  7822. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_732_MASK (0x10000000u)
  7823. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_732_SHIFT (0x0000001Cu)
  7824. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_732_RESETVAL (0x00000000u)
  7825. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_733_MASK (0x20000000u)
  7826. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_733_SHIFT (0x0000001Du)
  7827. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_733_RESETVAL (0x00000000u)
  7828. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_734_MASK (0x40000000u)
  7829. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_734_SHIFT (0x0000001Eu)
  7830. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_734_RESETVAL (0x00000000u)
  7831. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_735_MASK (0x80000000u)
  7832. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_735_SHIFT (0x0000001Fu)
  7833. #define CSL_CPINTC_ENA_STATUS_REG22_ENA_STATUS_735_RESETVAL (0x00000000u)
  7834. #define CSL_CPINTC_ENA_STATUS_REG22_RESETVAL (0x00000000u)
  7835. /* ena_status_reg23 */
  7836. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_736_MASK (0x00000001u)
  7837. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_736_SHIFT (0x00000000u)
  7838. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_736_RESETVAL (0x00000000u)
  7839. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_737_MASK (0x00000002u)
  7840. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_737_SHIFT (0x00000001u)
  7841. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_737_RESETVAL (0x00000000u)
  7842. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_738_MASK (0x00000004u)
  7843. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_738_SHIFT (0x00000002u)
  7844. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_738_RESETVAL (0x00000000u)
  7845. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_739_MASK (0x00000008u)
  7846. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_739_SHIFT (0x00000003u)
  7847. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_739_RESETVAL (0x00000000u)
  7848. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_740_MASK (0x00000010u)
  7849. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_740_SHIFT (0x00000004u)
  7850. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_740_RESETVAL (0x00000000u)
  7851. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_741_MASK (0x00000020u)
  7852. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_741_SHIFT (0x00000005u)
  7853. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_741_RESETVAL (0x00000000u)
  7854. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_742_MASK (0x00000040u)
  7855. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_742_SHIFT (0x00000006u)
  7856. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_742_RESETVAL (0x00000000u)
  7857. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_743_MASK (0x00000080u)
  7858. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_743_SHIFT (0x00000007u)
  7859. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_743_RESETVAL (0x00000000u)
  7860. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_744_MASK (0x00000100u)
  7861. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_744_SHIFT (0x00000008u)
  7862. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_744_RESETVAL (0x00000000u)
  7863. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_745_MASK (0x00000200u)
  7864. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_745_SHIFT (0x00000009u)
  7865. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_745_RESETVAL (0x00000000u)
  7866. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_746_MASK (0x00000400u)
  7867. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_746_SHIFT (0x0000000Au)
  7868. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_746_RESETVAL (0x00000000u)
  7869. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_747_MASK (0x00000800u)
  7870. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_747_SHIFT (0x0000000Bu)
  7871. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_747_RESETVAL (0x00000000u)
  7872. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_748_MASK (0x00001000u)
  7873. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_748_SHIFT (0x0000000Cu)
  7874. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_748_RESETVAL (0x00000000u)
  7875. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_749_MASK (0x00002000u)
  7876. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_749_SHIFT (0x0000000Du)
  7877. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_749_RESETVAL (0x00000000u)
  7878. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_750_MASK (0x00004000u)
  7879. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_750_SHIFT (0x0000000Eu)
  7880. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_750_RESETVAL (0x00000000u)
  7881. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_751_MASK (0x00008000u)
  7882. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_751_SHIFT (0x0000000Fu)
  7883. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_751_RESETVAL (0x00000000u)
  7884. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_752_MASK (0x00010000u)
  7885. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_752_SHIFT (0x00000010u)
  7886. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_752_RESETVAL (0x00000000u)
  7887. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_753_MASK (0x00020000u)
  7888. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_753_SHIFT (0x00000011u)
  7889. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_753_RESETVAL (0x00000000u)
  7890. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_754_MASK (0x00040000u)
  7891. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_754_SHIFT (0x00000012u)
  7892. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_754_RESETVAL (0x00000000u)
  7893. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_755_MASK (0x00080000u)
  7894. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_755_SHIFT (0x00000013u)
  7895. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_755_RESETVAL (0x00000000u)
  7896. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_756_MASK (0x00100000u)
  7897. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_756_SHIFT (0x00000014u)
  7898. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_756_RESETVAL (0x00000000u)
  7899. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_757_MASK (0x00200000u)
  7900. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_757_SHIFT (0x00000015u)
  7901. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_757_RESETVAL (0x00000000u)
  7902. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_758_MASK (0x00400000u)
  7903. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_758_SHIFT (0x00000016u)
  7904. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_758_RESETVAL (0x00000000u)
  7905. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_759_MASK (0x00800000u)
  7906. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_759_SHIFT (0x00000017u)
  7907. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_759_RESETVAL (0x00000000u)
  7908. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_760_MASK (0x01000000u)
  7909. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_760_SHIFT (0x00000018u)
  7910. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_760_RESETVAL (0x00000000u)
  7911. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_761_MASK (0x02000000u)
  7912. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_761_SHIFT (0x00000019u)
  7913. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_761_RESETVAL (0x00000000u)
  7914. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_762_MASK (0x04000000u)
  7915. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_762_SHIFT (0x0000001Au)
  7916. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_762_RESETVAL (0x00000000u)
  7917. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_763_MASK (0x08000000u)
  7918. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_763_SHIFT (0x0000001Bu)
  7919. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_763_RESETVAL (0x00000000u)
  7920. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_764_MASK (0x10000000u)
  7921. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_764_SHIFT (0x0000001Cu)
  7922. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_764_RESETVAL (0x00000000u)
  7923. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_765_MASK (0x20000000u)
  7924. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_765_SHIFT (0x0000001Du)
  7925. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_765_RESETVAL (0x00000000u)
  7926. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_766_MASK (0x40000000u)
  7927. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_766_SHIFT (0x0000001Eu)
  7928. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_766_RESETVAL (0x00000000u)
  7929. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_767_MASK (0x80000000u)
  7930. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_767_SHIFT (0x0000001Fu)
  7931. #define CSL_CPINTC_ENA_STATUS_REG23_ENA_STATUS_767_RESETVAL (0x00000000u)
  7932. #define CSL_CPINTC_ENA_STATUS_REG23_RESETVAL (0x00000000u)
  7933. /* ena_status_reg24 */
  7934. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_768_MASK (0x00000001u)
  7935. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_768_SHIFT (0x00000000u)
  7936. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_768_RESETVAL (0x00000000u)
  7937. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_769_MASK (0x00000002u)
  7938. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_769_SHIFT (0x00000001u)
  7939. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_769_RESETVAL (0x00000000u)
  7940. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_770_MASK (0x00000004u)
  7941. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_770_SHIFT (0x00000002u)
  7942. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_770_RESETVAL (0x00000000u)
  7943. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_771_MASK (0x00000008u)
  7944. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_771_SHIFT (0x00000003u)
  7945. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_771_RESETVAL (0x00000000u)
  7946. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_772_MASK (0x00000010u)
  7947. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_772_SHIFT (0x00000004u)
  7948. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_772_RESETVAL (0x00000000u)
  7949. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_773_MASK (0x00000020u)
  7950. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_773_SHIFT (0x00000005u)
  7951. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_773_RESETVAL (0x00000000u)
  7952. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_774_MASK (0x00000040u)
  7953. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_774_SHIFT (0x00000006u)
  7954. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_774_RESETVAL (0x00000000u)
  7955. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_775_MASK (0x00000080u)
  7956. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_775_SHIFT (0x00000007u)
  7957. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_775_RESETVAL (0x00000000u)
  7958. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_776_MASK (0x00000100u)
  7959. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_776_SHIFT (0x00000008u)
  7960. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_776_RESETVAL (0x00000000u)
  7961. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_777_MASK (0x00000200u)
  7962. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_777_SHIFT (0x00000009u)
  7963. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_777_RESETVAL (0x00000000u)
  7964. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_778_MASK (0x00000400u)
  7965. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_778_SHIFT (0x0000000Au)
  7966. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_778_RESETVAL (0x00000000u)
  7967. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_779_MASK (0x00000800u)
  7968. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_779_SHIFT (0x0000000Bu)
  7969. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_779_RESETVAL (0x00000000u)
  7970. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_780_MASK (0x00001000u)
  7971. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_780_SHIFT (0x0000000Cu)
  7972. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_780_RESETVAL (0x00000000u)
  7973. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_781_MASK (0x00002000u)
  7974. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_781_SHIFT (0x0000000Du)
  7975. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_781_RESETVAL (0x00000000u)
  7976. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_782_MASK (0x00004000u)
  7977. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_782_SHIFT (0x0000000Eu)
  7978. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_782_RESETVAL (0x00000000u)
  7979. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_783_MASK (0x00008000u)
  7980. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_783_SHIFT (0x0000000Fu)
  7981. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_783_RESETVAL (0x00000000u)
  7982. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_784_MASK (0x00010000u)
  7983. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_784_SHIFT (0x00000010u)
  7984. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_784_RESETVAL (0x00000000u)
  7985. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_785_MASK (0x00020000u)
  7986. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_785_SHIFT (0x00000011u)
  7987. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_785_RESETVAL (0x00000000u)
  7988. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_786_MASK (0x00040000u)
  7989. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_786_SHIFT (0x00000012u)
  7990. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_786_RESETVAL (0x00000000u)
  7991. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_787_MASK (0x00080000u)
  7992. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_787_SHIFT (0x00000013u)
  7993. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_787_RESETVAL (0x00000000u)
  7994. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_788_MASK (0x00100000u)
  7995. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_788_SHIFT (0x00000014u)
  7996. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_788_RESETVAL (0x00000000u)
  7997. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_789_MASK (0x00200000u)
  7998. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_789_SHIFT (0x00000015u)
  7999. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_789_RESETVAL (0x00000000u)
  8000. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_790_MASK (0x00400000u)
  8001. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_790_SHIFT (0x00000016u)
  8002. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_790_RESETVAL (0x00000000u)
  8003. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_791_MASK (0x00800000u)
  8004. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_791_SHIFT (0x00000017u)
  8005. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_791_RESETVAL (0x00000000u)
  8006. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_792_MASK (0x01000000u)
  8007. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_792_SHIFT (0x00000018u)
  8008. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_792_RESETVAL (0x00000000u)
  8009. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_793_MASK (0x02000000u)
  8010. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_793_SHIFT (0x00000019u)
  8011. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_793_RESETVAL (0x00000000u)
  8012. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_794_MASK (0x04000000u)
  8013. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_794_SHIFT (0x0000001Au)
  8014. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_794_RESETVAL (0x00000000u)
  8015. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_795_MASK (0x08000000u)
  8016. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_795_SHIFT (0x0000001Bu)
  8017. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_795_RESETVAL (0x00000000u)
  8018. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_796_MASK (0x10000000u)
  8019. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_796_SHIFT (0x0000001Cu)
  8020. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_796_RESETVAL (0x00000000u)
  8021. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_797_MASK (0x20000000u)
  8022. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_797_SHIFT (0x0000001Du)
  8023. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_797_RESETVAL (0x00000000u)
  8024. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_798_MASK (0x40000000u)
  8025. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_798_SHIFT (0x0000001Eu)
  8026. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_798_RESETVAL (0x00000000u)
  8027. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_799_MASK (0x80000000u)
  8028. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_799_SHIFT (0x0000001Fu)
  8029. #define CSL_CPINTC_ENA_STATUS_REG24_ENA_STATUS_799_RESETVAL (0x00000000u)
  8030. #define CSL_CPINTC_ENA_STATUS_REG24_RESETVAL (0x00000000u)
  8031. /* ena_status_reg25 */
  8032. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_800_MASK (0x00000001u)
  8033. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_800_SHIFT (0x00000000u)
  8034. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_800_RESETVAL (0x00000000u)
  8035. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_801_MASK (0x00000002u)
  8036. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_801_SHIFT (0x00000001u)
  8037. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_801_RESETVAL (0x00000000u)
  8038. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_802_MASK (0x00000004u)
  8039. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_802_SHIFT (0x00000002u)
  8040. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_802_RESETVAL (0x00000000u)
  8041. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_803_MASK (0x00000008u)
  8042. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_803_SHIFT (0x00000003u)
  8043. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_803_RESETVAL (0x00000000u)
  8044. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_804_MASK (0x00000010u)
  8045. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_804_SHIFT (0x00000004u)
  8046. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_804_RESETVAL (0x00000000u)
  8047. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_805_MASK (0x00000020u)
  8048. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_805_SHIFT (0x00000005u)
  8049. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_805_RESETVAL (0x00000000u)
  8050. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_806_MASK (0x00000040u)
  8051. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_806_SHIFT (0x00000006u)
  8052. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_806_RESETVAL (0x00000000u)
  8053. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_807_MASK (0x00000080u)
  8054. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_807_SHIFT (0x00000007u)
  8055. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_807_RESETVAL (0x00000000u)
  8056. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_808_MASK (0x00000100u)
  8057. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_808_SHIFT (0x00000008u)
  8058. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_808_RESETVAL (0x00000000u)
  8059. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_809_MASK (0x00000200u)
  8060. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_809_SHIFT (0x00000009u)
  8061. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_809_RESETVAL (0x00000000u)
  8062. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_810_MASK (0x00000400u)
  8063. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_810_SHIFT (0x0000000Au)
  8064. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_810_RESETVAL (0x00000000u)
  8065. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_811_MASK (0x00000800u)
  8066. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_811_SHIFT (0x0000000Bu)
  8067. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_811_RESETVAL (0x00000000u)
  8068. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_812_MASK (0x00001000u)
  8069. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_812_SHIFT (0x0000000Cu)
  8070. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_812_RESETVAL (0x00000000u)
  8071. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_813_MASK (0x00002000u)
  8072. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_813_SHIFT (0x0000000Du)
  8073. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_813_RESETVAL (0x00000000u)
  8074. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_814_MASK (0x00004000u)
  8075. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_814_SHIFT (0x0000000Eu)
  8076. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_814_RESETVAL (0x00000000u)
  8077. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_815_MASK (0x00008000u)
  8078. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_815_SHIFT (0x0000000Fu)
  8079. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_815_RESETVAL (0x00000000u)
  8080. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_816_MASK (0x00010000u)
  8081. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_816_SHIFT (0x00000010u)
  8082. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_816_RESETVAL (0x00000000u)
  8083. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_817_MASK (0x00020000u)
  8084. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_817_SHIFT (0x00000011u)
  8085. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_817_RESETVAL (0x00000000u)
  8086. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_818_MASK (0x00040000u)
  8087. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_818_SHIFT (0x00000012u)
  8088. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_818_RESETVAL (0x00000000u)
  8089. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_819_MASK (0x00080000u)
  8090. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_819_SHIFT (0x00000013u)
  8091. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_819_RESETVAL (0x00000000u)
  8092. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_820_MASK (0x00100000u)
  8093. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_820_SHIFT (0x00000014u)
  8094. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_820_RESETVAL (0x00000000u)
  8095. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_821_MASK (0x00200000u)
  8096. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_821_SHIFT (0x00000015u)
  8097. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_821_RESETVAL (0x00000000u)
  8098. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_822_MASK (0x00400000u)
  8099. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_822_SHIFT (0x00000016u)
  8100. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_822_RESETVAL (0x00000000u)
  8101. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_823_MASK (0x00800000u)
  8102. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_823_SHIFT (0x00000017u)
  8103. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_823_RESETVAL (0x00000000u)
  8104. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_824_MASK (0x01000000u)
  8105. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_824_SHIFT (0x00000018u)
  8106. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_824_RESETVAL (0x00000000u)
  8107. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_825_MASK (0x02000000u)
  8108. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_825_SHIFT (0x00000019u)
  8109. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_825_RESETVAL (0x00000000u)
  8110. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_826_MASK (0x04000000u)
  8111. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_826_SHIFT (0x0000001Au)
  8112. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_826_RESETVAL (0x00000000u)
  8113. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_827_MASK (0x08000000u)
  8114. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_827_SHIFT (0x0000001Bu)
  8115. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_827_RESETVAL (0x00000000u)
  8116. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_828_MASK (0x10000000u)
  8117. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_828_SHIFT (0x0000001Cu)
  8118. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_828_RESETVAL (0x00000000u)
  8119. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_829_MASK (0x20000000u)
  8120. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_829_SHIFT (0x0000001Du)
  8121. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_829_RESETVAL (0x00000000u)
  8122. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_830_MASK (0x40000000u)
  8123. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_830_SHIFT (0x0000001Eu)
  8124. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_830_RESETVAL (0x00000000u)
  8125. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_831_MASK (0x80000000u)
  8126. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_831_SHIFT (0x0000001Fu)
  8127. #define CSL_CPINTC_ENA_STATUS_REG25_ENA_STATUS_831_RESETVAL (0x00000000u)
  8128. #define CSL_CPINTC_ENA_STATUS_REG25_RESETVAL (0x00000000u)
  8129. /* ena_status_reg26 */
  8130. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_832_MASK (0x00000001u)
  8131. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_832_SHIFT (0x00000000u)
  8132. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_832_RESETVAL (0x00000000u)
  8133. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_833_MASK (0x00000002u)
  8134. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_833_SHIFT (0x00000001u)
  8135. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_833_RESETVAL (0x00000000u)
  8136. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_834_MASK (0x00000004u)
  8137. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_834_SHIFT (0x00000002u)
  8138. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_834_RESETVAL (0x00000000u)
  8139. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_835_MASK (0x00000008u)
  8140. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_835_SHIFT (0x00000003u)
  8141. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_835_RESETVAL (0x00000000u)
  8142. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_836_MASK (0x00000010u)
  8143. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_836_SHIFT (0x00000004u)
  8144. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_836_RESETVAL (0x00000000u)
  8145. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_837_MASK (0x00000020u)
  8146. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_837_SHIFT (0x00000005u)
  8147. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_837_RESETVAL (0x00000000u)
  8148. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_838_MASK (0x00000040u)
  8149. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_838_SHIFT (0x00000006u)
  8150. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_838_RESETVAL (0x00000000u)
  8151. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_839_MASK (0x00000080u)
  8152. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_839_SHIFT (0x00000007u)
  8153. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_839_RESETVAL (0x00000000u)
  8154. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_840_MASK (0x00000100u)
  8155. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_840_SHIFT (0x00000008u)
  8156. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_840_RESETVAL (0x00000000u)
  8157. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_841_MASK (0x00000200u)
  8158. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_841_SHIFT (0x00000009u)
  8159. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_841_RESETVAL (0x00000000u)
  8160. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_842_MASK (0x00000400u)
  8161. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_842_SHIFT (0x0000000Au)
  8162. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_842_RESETVAL (0x00000000u)
  8163. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_843_MASK (0x00000800u)
  8164. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_843_SHIFT (0x0000000Bu)
  8165. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_843_RESETVAL (0x00000000u)
  8166. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_844_MASK (0x00001000u)
  8167. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_844_SHIFT (0x0000000Cu)
  8168. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_844_RESETVAL (0x00000000u)
  8169. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_845_MASK (0x00002000u)
  8170. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_845_SHIFT (0x0000000Du)
  8171. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_845_RESETVAL (0x00000000u)
  8172. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_846_MASK (0x00004000u)
  8173. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_846_SHIFT (0x0000000Eu)
  8174. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_846_RESETVAL (0x00000000u)
  8175. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_847_MASK (0x00008000u)
  8176. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_847_SHIFT (0x0000000Fu)
  8177. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_847_RESETVAL (0x00000000u)
  8178. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_848_MASK (0x00010000u)
  8179. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_848_SHIFT (0x00000010u)
  8180. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_848_RESETVAL (0x00000000u)
  8181. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_849_MASK (0x00020000u)
  8182. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_849_SHIFT (0x00000011u)
  8183. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_849_RESETVAL (0x00000000u)
  8184. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_850_MASK (0x00040000u)
  8185. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_850_SHIFT (0x00000012u)
  8186. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_850_RESETVAL (0x00000000u)
  8187. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_851_MASK (0x00080000u)
  8188. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_851_SHIFT (0x00000013u)
  8189. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_851_RESETVAL (0x00000000u)
  8190. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_852_MASK (0x00100000u)
  8191. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_852_SHIFT (0x00000014u)
  8192. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_852_RESETVAL (0x00000000u)
  8193. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_853_MASK (0x00200000u)
  8194. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_853_SHIFT (0x00000015u)
  8195. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_853_RESETVAL (0x00000000u)
  8196. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_854_MASK (0x00400000u)
  8197. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_854_SHIFT (0x00000016u)
  8198. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_854_RESETVAL (0x00000000u)
  8199. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_855_MASK (0x00800000u)
  8200. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_855_SHIFT (0x00000017u)
  8201. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_855_RESETVAL (0x00000000u)
  8202. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_856_MASK (0x01000000u)
  8203. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_856_SHIFT (0x00000018u)
  8204. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_856_RESETVAL (0x00000000u)
  8205. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_857_MASK (0x02000000u)
  8206. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_857_SHIFT (0x00000019u)
  8207. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_857_RESETVAL (0x00000000u)
  8208. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_858_MASK (0x04000000u)
  8209. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_858_SHIFT (0x0000001Au)
  8210. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_858_RESETVAL (0x00000000u)
  8211. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_859_MASK (0x08000000u)
  8212. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_859_SHIFT (0x0000001Bu)
  8213. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_859_RESETVAL (0x00000000u)
  8214. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_860_MASK (0x10000000u)
  8215. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_860_SHIFT (0x0000001Cu)
  8216. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_860_RESETVAL (0x00000000u)
  8217. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_861_MASK (0x20000000u)
  8218. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_861_SHIFT (0x0000001Du)
  8219. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_861_RESETVAL (0x00000000u)
  8220. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_862_MASK (0x40000000u)
  8221. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_862_SHIFT (0x0000001Eu)
  8222. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_862_RESETVAL (0x00000000u)
  8223. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_863_MASK (0x80000000u)
  8224. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_863_SHIFT (0x0000001Fu)
  8225. #define CSL_CPINTC_ENA_STATUS_REG26_ENA_STATUS_863_RESETVAL (0x00000000u)
  8226. #define CSL_CPINTC_ENA_STATUS_REG26_RESETVAL (0x00000000u)
  8227. /* ena_status_reg27 */
  8228. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_864_MASK (0x00000001u)
  8229. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_864_SHIFT (0x00000000u)
  8230. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_864_RESETVAL (0x00000000u)
  8231. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_865_MASK (0x00000002u)
  8232. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_865_SHIFT (0x00000001u)
  8233. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_865_RESETVAL (0x00000000u)
  8234. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_866_MASK (0x00000004u)
  8235. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_866_SHIFT (0x00000002u)
  8236. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_866_RESETVAL (0x00000000u)
  8237. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_867_MASK (0x00000008u)
  8238. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_867_SHIFT (0x00000003u)
  8239. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_867_RESETVAL (0x00000000u)
  8240. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_868_MASK (0x00000010u)
  8241. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_868_SHIFT (0x00000004u)
  8242. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_868_RESETVAL (0x00000000u)
  8243. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_869_MASK (0x00000020u)
  8244. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_869_SHIFT (0x00000005u)
  8245. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_869_RESETVAL (0x00000000u)
  8246. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_870_MASK (0x00000040u)
  8247. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_870_SHIFT (0x00000006u)
  8248. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_870_RESETVAL (0x00000000u)
  8249. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_871_MASK (0x00000080u)
  8250. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_871_SHIFT (0x00000007u)
  8251. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_871_RESETVAL (0x00000000u)
  8252. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_872_MASK (0x00000100u)
  8253. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_872_SHIFT (0x00000008u)
  8254. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_872_RESETVAL (0x00000000u)
  8255. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_873_MASK (0x00000200u)
  8256. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_873_SHIFT (0x00000009u)
  8257. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_873_RESETVAL (0x00000000u)
  8258. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_874_MASK (0x00000400u)
  8259. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_874_SHIFT (0x0000000Au)
  8260. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_874_RESETVAL (0x00000000u)
  8261. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_875_MASK (0x00000800u)
  8262. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_875_SHIFT (0x0000000Bu)
  8263. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_875_RESETVAL (0x00000000u)
  8264. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_876_MASK (0x00001000u)
  8265. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_876_SHIFT (0x0000000Cu)
  8266. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_876_RESETVAL (0x00000000u)
  8267. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_877_MASK (0x00002000u)
  8268. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_877_SHIFT (0x0000000Du)
  8269. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_877_RESETVAL (0x00000000u)
  8270. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_878_MASK (0x00004000u)
  8271. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_878_SHIFT (0x0000000Eu)
  8272. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_878_RESETVAL (0x00000000u)
  8273. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_879_MASK (0x00008000u)
  8274. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_879_SHIFT (0x0000000Fu)
  8275. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_879_RESETVAL (0x00000000u)
  8276. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_880_MASK (0x00010000u)
  8277. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_880_SHIFT (0x00000010u)
  8278. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_880_RESETVAL (0x00000000u)
  8279. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_881_MASK (0x00020000u)
  8280. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_881_SHIFT (0x00000011u)
  8281. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_881_RESETVAL (0x00000000u)
  8282. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_882_MASK (0x00040000u)
  8283. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_882_SHIFT (0x00000012u)
  8284. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_882_RESETVAL (0x00000000u)
  8285. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_883_MASK (0x00080000u)
  8286. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_883_SHIFT (0x00000013u)
  8287. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_883_RESETVAL (0x00000000u)
  8288. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_884_MASK (0x00100000u)
  8289. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_884_SHIFT (0x00000014u)
  8290. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_884_RESETVAL (0x00000000u)
  8291. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_885_MASK (0x00200000u)
  8292. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_885_SHIFT (0x00000015u)
  8293. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_885_RESETVAL (0x00000000u)
  8294. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_886_MASK (0x00400000u)
  8295. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_886_SHIFT (0x00000016u)
  8296. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_886_RESETVAL (0x00000000u)
  8297. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_887_MASK (0x00800000u)
  8298. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_887_SHIFT (0x00000017u)
  8299. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_887_RESETVAL (0x00000000u)
  8300. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_888_MASK (0x01000000u)
  8301. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_888_SHIFT (0x00000018u)
  8302. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_888_RESETVAL (0x00000000u)
  8303. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_889_MASK (0x02000000u)
  8304. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_889_SHIFT (0x00000019u)
  8305. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_889_RESETVAL (0x00000000u)
  8306. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_890_MASK (0x04000000u)
  8307. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_890_SHIFT (0x0000001Au)
  8308. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_890_RESETVAL (0x00000000u)
  8309. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_891_MASK (0x08000000u)
  8310. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_891_SHIFT (0x0000001Bu)
  8311. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_891_RESETVAL (0x00000000u)
  8312. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_892_MASK (0x10000000u)
  8313. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_892_SHIFT (0x0000001Cu)
  8314. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_892_RESETVAL (0x00000000u)
  8315. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_893_MASK (0x20000000u)
  8316. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_893_SHIFT (0x0000001Du)
  8317. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_893_RESETVAL (0x00000000u)
  8318. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_894_MASK (0x40000000u)
  8319. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_894_SHIFT (0x0000001Eu)
  8320. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_894_RESETVAL (0x00000000u)
  8321. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_895_MASK (0x80000000u)
  8322. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_895_SHIFT (0x0000001Fu)
  8323. #define CSL_CPINTC_ENA_STATUS_REG27_ENA_STATUS_895_RESETVAL (0x00000000u)
  8324. #define CSL_CPINTC_ENA_STATUS_REG27_RESETVAL (0x00000000u)
  8325. /* ena_status_reg28 */
  8326. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_896_MASK (0x00000001u)
  8327. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_896_SHIFT (0x00000000u)
  8328. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_896_RESETVAL (0x00000000u)
  8329. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_897_MASK (0x00000002u)
  8330. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_897_SHIFT (0x00000001u)
  8331. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_897_RESETVAL (0x00000000u)
  8332. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_898_MASK (0x00000004u)
  8333. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_898_SHIFT (0x00000002u)
  8334. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_898_RESETVAL (0x00000000u)
  8335. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_899_MASK (0x00000008u)
  8336. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_899_SHIFT (0x00000003u)
  8337. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_899_RESETVAL (0x00000000u)
  8338. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_900_MASK (0x00000010u)
  8339. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_900_SHIFT (0x00000004u)
  8340. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_900_RESETVAL (0x00000000u)
  8341. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_901_MASK (0x00000020u)
  8342. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_901_SHIFT (0x00000005u)
  8343. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_901_RESETVAL (0x00000000u)
  8344. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_902_MASK (0x00000040u)
  8345. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_902_SHIFT (0x00000006u)
  8346. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_902_RESETVAL (0x00000000u)
  8347. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_903_MASK (0x00000080u)
  8348. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_903_SHIFT (0x00000007u)
  8349. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_903_RESETVAL (0x00000000u)
  8350. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_904_MASK (0x00000100u)
  8351. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_904_SHIFT (0x00000008u)
  8352. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_904_RESETVAL (0x00000000u)
  8353. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_905_MASK (0x00000200u)
  8354. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_905_SHIFT (0x00000009u)
  8355. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_905_RESETVAL (0x00000000u)
  8356. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_906_MASK (0x00000400u)
  8357. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_906_SHIFT (0x0000000Au)
  8358. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_906_RESETVAL (0x00000000u)
  8359. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_907_MASK (0x00000800u)
  8360. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_907_SHIFT (0x0000000Bu)
  8361. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_907_RESETVAL (0x00000000u)
  8362. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_908_MASK (0x00001000u)
  8363. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_908_SHIFT (0x0000000Cu)
  8364. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_908_RESETVAL (0x00000000u)
  8365. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_909_MASK (0x00002000u)
  8366. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_909_SHIFT (0x0000000Du)
  8367. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_909_RESETVAL (0x00000000u)
  8368. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_910_MASK (0x00004000u)
  8369. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_910_SHIFT (0x0000000Eu)
  8370. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_910_RESETVAL (0x00000000u)
  8371. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_911_MASK (0x00008000u)
  8372. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_911_SHIFT (0x0000000Fu)
  8373. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_911_RESETVAL (0x00000000u)
  8374. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_912_MASK (0x00010000u)
  8375. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_912_SHIFT (0x00000010u)
  8376. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_912_RESETVAL (0x00000000u)
  8377. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_913_MASK (0x00020000u)
  8378. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_913_SHIFT (0x00000011u)
  8379. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_913_RESETVAL (0x00000000u)
  8380. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_914_MASK (0x00040000u)
  8381. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_914_SHIFT (0x00000012u)
  8382. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_914_RESETVAL (0x00000000u)
  8383. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_915_MASK (0x00080000u)
  8384. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_915_SHIFT (0x00000013u)
  8385. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_915_RESETVAL (0x00000000u)
  8386. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_916_MASK (0x00100000u)
  8387. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_916_SHIFT (0x00000014u)
  8388. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_916_RESETVAL (0x00000000u)
  8389. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_917_MASK (0x00200000u)
  8390. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_917_SHIFT (0x00000015u)
  8391. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_917_RESETVAL (0x00000000u)
  8392. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_918_MASK (0x00400000u)
  8393. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_918_SHIFT (0x00000016u)
  8394. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_918_RESETVAL (0x00000000u)
  8395. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_919_MASK (0x00800000u)
  8396. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_919_SHIFT (0x00000017u)
  8397. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_919_RESETVAL (0x00000000u)
  8398. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_920_MASK (0x01000000u)
  8399. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_920_SHIFT (0x00000018u)
  8400. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_920_RESETVAL (0x00000000u)
  8401. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_921_MASK (0x02000000u)
  8402. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_921_SHIFT (0x00000019u)
  8403. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_921_RESETVAL (0x00000000u)
  8404. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_922_MASK (0x04000000u)
  8405. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_922_SHIFT (0x0000001Au)
  8406. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_922_RESETVAL (0x00000000u)
  8407. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_923_MASK (0x08000000u)
  8408. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_923_SHIFT (0x0000001Bu)
  8409. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_923_RESETVAL (0x00000000u)
  8410. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_924_MASK (0x10000000u)
  8411. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_924_SHIFT (0x0000001Cu)
  8412. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_924_RESETVAL (0x00000000u)
  8413. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_925_MASK (0x20000000u)
  8414. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_925_SHIFT (0x0000001Du)
  8415. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_925_RESETVAL (0x00000000u)
  8416. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_926_MASK (0x40000000u)
  8417. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_926_SHIFT (0x0000001Eu)
  8418. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_926_RESETVAL (0x00000000u)
  8419. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_927_MASK (0x80000000u)
  8420. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_927_SHIFT (0x0000001Fu)
  8421. #define CSL_CPINTC_ENA_STATUS_REG28_ENA_STATUS_927_RESETVAL (0x00000000u)
  8422. #define CSL_CPINTC_ENA_STATUS_REG28_RESETVAL (0x00000000u)
  8423. /* ena_status_reg29 */
  8424. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_928_MASK (0x00000001u)
  8425. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_928_SHIFT (0x00000000u)
  8426. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_928_RESETVAL (0x00000000u)
  8427. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_929_MASK (0x00000002u)
  8428. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_929_SHIFT (0x00000001u)
  8429. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_929_RESETVAL (0x00000000u)
  8430. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_930_MASK (0x00000004u)
  8431. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_930_SHIFT (0x00000002u)
  8432. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_930_RESETVAL (0x00000000u)
  8433. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_931_MASK (0x00000008u)
  8434. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_931_SHIFT (0x00000003u)
  8435. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_931_RESETVAL (0x00000000u)
  8436. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_932_MASK (0x00000010u)
  8437. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_932_SHIFT (0x00000004u)
  8438. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_932_RESETVAL (0x00000000u)
  8439. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_933_MASK (0x00000020u)
  8440. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_933_SHIFT (0x00000005u)
  8441. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_933_RESETVAL (0x00000000u)
  8442. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_934_MASK (0x00000040u)
  8443. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_934_SHIFT (0x00000006u)
  8444. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_934_RESETVAL (0x00000000u)
  8445. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_935_MASK (0x00000080u)
  8446. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_935_SHIFT (0x00000007u)
  8447. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_935_RESETVAL (0x00000000u)
  8448. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_936_MASK (0x00000100u)
  8449. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_936_SHIFT (0x00000008u)
  8450. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_936_RESETVAL (0x00000000u)
  8451. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_937_MASK (0x00000200u)
  8452. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_937_SHIFT (0x00000009u)
  8453. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_937_RESETVAL (0x00000000u)
  8454. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_938_MASK (0x00000400u)
  8455. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_938_SHIFT (0x0000000Au)
  8456. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_938_RESETVAL (0x00000000u)
  8457. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_939_MASK (0x00000800u)
  8458. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_939_SHIFT (0x0000000Bu)
  8459. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_939_RESETVAL (0x00000000u)
  8460. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_940_MASK (0x00001000u)
  8461. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_940_SHIFT (0x0000000Cu)
  8462. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_940_RESETVAL (0x00000000u)
  8463. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_941_MASK (0x00002000u)
  8464. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_941_SHIFT (0x0000000Du)
  8465. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_941_RESETVAL (0x00000000u)
  8466. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_942_MASK (0x00004000u)
  8467. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_942_SHIFT (0x0000000Eu)
  8468. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_942_RESETVAL (0x00000000u)
  8469. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_943_MASK (0x00008000u)
  8470. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_943_SHIFT (0x0000000Fu)
  8471. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_943_RESETVAL (0x00000000u)
  8472. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_944_MASK (0x00010000u)
  8473. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_944_SHIFT (0x00000010u)
  8474. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_944_RESETVAL (0x00000000u)
  8475. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_945_MASK (0x00020000u)
  8476. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_945_SHIFT (0x00000011u)
  8477. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_945_RESETVAL (0x00000000u)
  8478. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_946_MASK (0x00040000u)
  8479. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_946_SHIFT (0x00000012u)
  8480. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_946_RESETVAL (0x00000000u)
  8481. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_947_MASK (0x00080000u)
  8482. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_947_SHIFT (0x00000013u)
  8483. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_947_RESETVAL (0x00000000u)
  8484. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_948_MASK (0x00100000u)
  8485. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_948_SHIFT (0x00000014u)
  8486. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_948_RESETVAL (0x00000000u)
  8487. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_949_MASK (0x00200000u)
  8488. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_949_SHIFT (0x00000015u)
  8489. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_949_RESETVAL (0x00000000u)
  8490. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_950_MASK (0x00400000u)
  8491. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_950_SHIFT (0x00000016u)
  8492. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_950_RESETVAL (0x00000000u)
  8493. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_951_MASK (0x00800000u)
  8494. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_951_SHIFT (0x00000017u)
  8495. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_951_RESETVAL (0x00000000u)
  8496. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_952_MASK (0x01000000u)
  8497. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_952_SHIFT (0x00000018u)
  8498. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_952_RESETVAL (0x00000000u)
  8499. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_953_MASK (0x02000000u)
  8500. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_953_SHIFT (0x00000019u)
  8501. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_953_RESETVAL (0x00000000u)
  8502. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_954_MASK (0x04000000u)
  8503. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_954_SHIFT (0x0000001Au)
  8504. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_954_RESETVAL (0x00000000u)
  8505. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_955_MASK (0x08000000u)
  8506. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_955_SHIFT (0x0000001Bu)
  8507. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_955_RESETVAL (0x00000000u)
  8508. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_956_MASK (0x10000000u)
  8509. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_956_SHIFT (0x0000001Cu)
  8510. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_956_RESETVAL (0x00000000u)
  8511. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_957_MASK (0x20000000u)
  8512. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_957_SHIFT (0x0000001Du)
  8513. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_957_RESETVAL (0x00000000u)
  8514. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_958_MASK (0x40000000u)
  8515. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_958_SHIFT (0x0000001Eu)
  8516. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_958_RESETVAL (0x00000000u)
  8517. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_959_MASK (0x80000000u)
  8518. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_959_SHIFT (0x0000001Fu)
  8519. #define CSL_CPINTC_ENA_STATUS_REG29_ENA_STATUS_959_RESETVAL (0x00000000u)
  8520. #define CSL_CPINTC_ENA_STATUS_REG29_RESETVAL (0x00000000u)
  8521. /* ena_status_reg30 */
  8522. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_960_MASK (0x00000001u)
  8523. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_960_SHIFT (0x00000000u)
  8524. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_960_RESETVAL (0x00000000u)
  8525. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_961_MASK (0x00000002u)
  8526. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_961_SHIFT (0x00000001u)
  8527. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_961_RESETVAL (0x00000000u)
  8528. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_962_MASK (0x00000004u)
  8529. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_962_SHIFT (0x00000002u)
  8530. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_962_RESETVAL (0x00000000u)
  8531. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_963_MASK (0x00000008u)
  8532. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_963_SHIFT (0x00000003u)
  8533. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_963_RESETVAL (0x00000000u)
  8534. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_964_MASK (0x00000010u)
  8535. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_964_SHIFT (0x00000004u)
  8536. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_964_RESETVAL (0x00000000u)
  8537. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_965_MASK (0x00000020u)
  8538. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_965_SHIFT (0x00000005u)
  8539. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_965_RESETVAL (0x00000000u)
  8540. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_966_MASK (0x00000040u)
  8541. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_966_SHIFT (0x00000006u)
  8542. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_966_RESETVAL (0x00000000u)
  8543. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_967_MASK (0x00000080u)
  8544. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_967_SHIFT (0x00000007u)
  8545. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_967_RESETVAL (0x00000000u)
  8546. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_968_MASK (0x00000100u)
  8547. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_968_SHIFT (0x00000008u)
  8548. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_968_RESETVAL (0x00000000u)
  8549. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_969_MASK (0x00000200u)
  8550. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_969_SHIFT (0x00000009u)
  8551. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_969_RESETVAL (0x00000000u)
  8552. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_970_MASK (0x00000400u)
  8553. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_970_SHIFT (0x0000000Au)
  8554. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_970_RESETVAL (0x00000000u)
  8555. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_971_MASK (0x00000800u)
  8556. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_971_SHIFT (0x0000000Bu)
  8557. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_971_RESETVAL (0x00000000u)
  8558. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_972_MASK (0x00001000u)
  8559. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_972_SHIFT (0x0000000Cu)
  8560. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_972_RESETVAL (0x00000000u)
  8561. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_973_MASK (0x00002000u)
  8562. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_973_SHIFT (0x0000000Du)
  8563. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_973_RESETVAL (0x00000000u)
  8564. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_974_MASK (0x00004000u)
  8565. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_974_SHIFT (0x0000000Eu)
  8566. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_974_RESETVAL (0x00000000u)
  8567. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_975_MASK (0x00008000u)
  8568. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_975_SHIFT (0x0000000Fu)
  8569. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_975_RESETVAL (0x00000000u)
  8570. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_976_MASK (0x00010000u)
  8571. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_976_SHIFT (0x00000010u)
  8572. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_976_RESETVAL (0x00000000u)
  8573. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_977_MASK (0x00020000u)
  8574. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_977_SHIFT (0x00000011u)
  8575. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_977_RESETVAL (0x00000000u)
  8576. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_978_MASK (0x00040000u)
  8577. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_978_SHIFT (0x00000012u)
  8578. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_978_RESETVAL (0x00000000u)
  8579. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_979_MASK (0x00080000u)
  8580. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_979_SHIFT (0x00000013u)
  8581. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_979_RESETVAL (0x00000000u)
  8582. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_980_MASK (0x00100000u)
  8583. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_980_SHIFT (0x00000014u)
  8584. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_980_RESETVAL (0x00000000u)
  8585. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_981_MASK (0x00200000u)
  8586. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_981_SHIFT (0x00000015u)
  8587. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_981_RESETVAL (0x00000000u)
  8588. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_982_MASK (0x00400000u)
  8589. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_982_SHIFT (0x00000016u)
  8590. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_982_RESETVAL (0x00000000u)
  8591. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_983_MASK (0x00800000u)
  8592. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_983_SHIFT (0x00000017u)
  8593. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_983_RESETVAL (0x00000000u)
  8594. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_984_MASK (0x01000000u)
  8595. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_984_SHIFT (0x00000018u)
  8596. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_984_RESETVAL (0x00000000u)
  8597. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_985_MASK (0x02000000u)
  8598. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_985_SHIFT (0x00000019u)
  8599. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_985_RESETVAL (0x00000000u)
  8600. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_986_MASK (0x04000000u)
  8601. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_986_SHIFT (0x0000001Au)
  8602. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_986_RESETVAL (0x00000000u)
  8603. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_987_MASK (0x08000000u)
  8604. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_987_SHIFT (0x0000001Bu)
  8605. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_987_RESETVAL (0x00000000u)
  8606. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_988_MASK (0x10000000u)
  8607. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_988_SHIFT (0x0000001Cu)
  8608. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_988_RESETVAL (0x00000000u)
  8609. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_989_MASK (0x20000000u)
  8610. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_989_SHIFT (0x0000001Du)
  8611. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_989_RESETVAL (0x00000000u)
  8612. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_990_MASK (0x40000000u)
  8613. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_990_SHIFT (0x0000001Eu)
  8614. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_990_RESETVAL (0x00000000u)
  8615. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_991_MASK (0x80000000u)
  8616. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_991_SHIFT (0x0000001Fu)
  8617. #define CSL_CPINTC_ENA_STATUS_REG30_ENA_STATUS_991_RESETVAL (0x00000000u)
  8618. #define CSL_CPINTC_ENA_STATUS_REG30_RESETVAL (0x00000000u)
  8619. /* ena_status_reg31 */
  8620. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_992_MASK (0x00000001u)
  8621. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_992_SHIFT (0x00000000u)
  8622. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_992_RESETVAL (0x00000000u)
  8623. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_993_MASK (0x00000002u)
  8624. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_993_SHIFT (0x00000001u)
  8625. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_993_RESETVAL (0x00000000u)
  8626. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_994_MASK (0x00000004u)
  8627. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_994_SHIFT (0x00000002u)
  8628. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_994_RESETVAL (0x00000000u)
  8629. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_995_MASK (0x00000008u)
  8630. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_995_SHIFT (0x00000003u)
  8631. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_995_RESETVAL (0x00000000u)
  8632. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_996_MASK (0x00000010u)
  8633. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_996_SHIFT (0x00000004u)
  8634. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_996_RESETVAL (0x00000000u)
  8635. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_997_MASK (0x00000020u)
  8636. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_997_SHIFT (0x00000005u)
  8637. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_997_RESETVAL (0x00000000u)
  8638. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_998_MASK (0x00000040u)
  8639. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_998_SHIFT (0x00000006u)
  8640. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_998_RESETVAL (0x00000000u)
  8641. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_999_MASK (0x00000080u)
  8642. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_999_SHIFT (0x00000007u)
  8643. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_999_RESETVAL (0x00000000u)
  8644. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1000_MASK (0x00000100u)
  8645. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1000_SHIFT (0x00000008u)
  8646. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1000_RESETVAL (0x00000000u)
  8647. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1001_MASK (0x00000200u)
  8648. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1001_SHIFT (0x00000009u)
  8649. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1001_RESETVAL (0x00000000u)
  8650. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1002_MASK (0x00000400u)
  8651. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1002_SHIFT (0x0000000Au)
  8652. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1002_RESETVAL (0x00000000u)
  8653. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1003_MASK (0x00000800u)
  8654. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1003_SHIFT (0x0000000Bu)
  8655. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1003_RESETVAL (0x00000000u)
  8656. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1004_MASK (0x00001000u)
  8657. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1004_SHIFT (0x0000000Cu)
  8658. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1004_RESETVAL (0x00000000u)
  8659. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1005_MASK (0x00002000u)
  8660. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1005_SHIFT (0x0000000Du)
  8661. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1005_RESETVAL (0x00000000u)
  8662. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1006_MASK (0x00004000u)
  8663. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1006_SHIFT (0x0000000Eu)
  8664. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1006_RESETVAL (0x00000000u)
  8665. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1007_MASK (0x00008000u)
  8666. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1007_SHIFT (0x0000000Fu)
  8667. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1007_RESETVAL (0x00000000u)
  8668. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1008_MASK (0x00010000u)
  8669. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1008_SHIFT (0x00000010u)
  8670. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1008_RESETVAL (0x00000000u)
  8671. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1009_MASK (0x00020000u)
  8672. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1009_SHIFT (0x00000011u)
  8673. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1009_RESETVAL (0x00000000u)
  8674. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1010_MASK (0x00040000u)
  8675. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1010_SHIFT (0x00000012u)
  8676. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1010_RESETVAL (0x00000000u)
  8677. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1011_MASK (0x00080000u)
  8678. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1011_SHIFT (0x00000013u)
  8679. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1011_RESETVAL (0x00000000u)
  8680. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1012_MASK (0x00100000u)
  8681. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1012_SHIFT (0x00000014u)
  8682. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1012_RESETVAL (0x00000000u)
  8683. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1013_MASK (0x00200000u)
  8684. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1013_SHIFT (0x00000015u)
  8685. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1013_RESETVAL (0x00000000u)
  8686. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1014_MASK (0x00400000u)
  8687. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1014_SHIFT (0x00000016u)
  8688. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1014_RESETVAL (0x00000000u)
  8689. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1015_MASK (0x00800000u)
  8690. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1015_SHIFT (0x00000017u)
  8691. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1015_RESETVAL (0x00000000u)
  8692. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1016_MASK (0x01000000u)
  8693. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1016_SHIFT (0x00000018u)
  8694. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1016_RESETVAL (0x00000000u)
  8695. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1017_MASK (0x02000000u)
  8696. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1017_SHIFT (0x00000019u)
  8697. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1017_RESETVAL (0x00000000u)
  8698. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1018_MASK (0x04000000u)
  8699. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1018_SHIFT (0x0000001Au)
  8700. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1018_RESETVAL (0x00000000u)
  8701. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1019_MASK (0x08000000u)
  8702. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1019_SHIFT (0x0000001Bu)
  8703. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1019_RESETVAL (0x00000000u)
  8704. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1020_MASK (0x10000000u)
  8705. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1020_SHIFT (0x0000001Cu)
  8706. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1020_RESETVAL (0x00000000u)
  8707. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1021_MASK (0x20000000u)
  8708. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1021_SHIFT (0x0000001Du)
  8709. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1021_RESETVAL (0x00000000u)
  8710. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1022_MASK (0x40000000u)
  8711. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1022_SHIFT (0x0000001Eu)
  8712. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1022_RESETVAL (0x00000000u)
  8713. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1023_MASK (0x80000000u)
  8714. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1023_SHIFT (0x0000001Fu)
  8715. #define CSL_CPINTC_ENA_STATUS_REG31_ENA_STATUS_1023_RESETVAL (0x00000000u)
  8716. #define CSL_CPINTC_ENA_STATUS_REG31_RESETVAL (0x00000000u)
  8717. /* enable_reg0 */
  8718. #define CSL_CPINTC_ENABLE_REG0_ENABLE_0_MASK (0x00000001u)
  8719. #define CSL_CPINTC_ENABLE_REG0_ENABLE_0_SHIFT (0x00000000u)
  8720. #define CSL_CPINTC_ENABLE_REG0_ENABLE_0_RESETVAL (0x00000000u)
  8721. #define CSL_CPINTC_ENABLE_REG0_ENABLE_1_MASK (0x00000002u)
  8722. #define CSL_CPINTC_ENABLE_REG0_ENABLE_1_SHIFT (0x00000001u)
  8723. #define CSL_CPINTC_ENABLE_REG0_ENABLE_1_RESETVAL (0x00000000u)
  8724. #define CSL_CPINTC_ENABLE_REG0_ENABLE_2_MASK (0x00000004u)
  8725. #define CSL_CPINTC_ENABLE_REG0_ENABLE_2_SHIFT (0x00000002u)
  8726. #define CSL_CPINTC_ENABLE_REG0_ENABLE_2_RESETVAL (0x00000000u)
  8727. #define CSL_CPINTC_ENABLE_REG0_ENABLE_3_MASK (0x00000008u)
  8728. #define CSL_CPINTC_ENABLE_REG0_ENABLE_3_SHIFT (0x00000003u)
  8729. #define CSL_CPINTC_ENABLE_REG0_ENABLE_3_RESETVAL (0x00000000u)
  8730. #define CSL_CPINTC_ENABLE_REG0_ENABLE_4_MASK (0x00000010u)
  8731. #define CSL_CPINTC_ENABLE_REG0_ENABLE_4_SHIFT (0x00000004u)
  8732. #define CSL_CPINTC_ENABLE_REG0_ENABLE_4_RESETVAL (0x00000000u)
  8733. #define CSL_CPINTC_ENABLE_REG0_ENABLE_5_MASK (0x00000020u)
  8734. #define CSL_CPINTC_ENABLE_REG0_ENABLE_5_SHIFT (0x00000005u)
  8735. #define CSL_CPINTC_ENABLE_REG0_ENABLE_5_RESETVAL (0x00000000u)
  8736. #define CSL_CPINTC_ENABLE_REG0_ENABLE_6_MASK (0x00000040u)
  8737. #define CSL_CPINTC_ENABLE_REG0_ENABLE_6_SHIFT (0x00000006u)
  8738. #define CSL_CPINTC_ENABLE_REG0_ENABLE_6_RESETVAL (0x00000000u)
  8739. #define CSL_CPINTC_ENABLE_REG0_ENABLE_7_MASK (0x00000080u)
  8740. #define CSL_CPINTC_ENABLE_REG0_ENABLE_7_SHIFT (0x00000007u)
  8741. #define CSL_CPINTC_ENABLE_REG0_ENABLE_7_RESETVAL (0x00000000u)
  8742. #define CSL_CPINTC_ENABLE_REG0_ENABLE_8_MASK (0x00000100u)
  8743. #define CSL_CPINTC_ENABLE_REG0_ENABLE_8_SHIFT (0x00000008u)
  8744. #define CSL_CPINTC_ENABLE_REG0_ENABLE_8_RESETVAL (0x00000000u)
  8745. #define CSL_CPINTC_ENABLE_REG0_ENABLE_9_MASK (0x00000200u)
  8746. #define CSL_CPINTC_ENABLE_REG0_ENABLE_9_SHIFT (0x00000009u)
  8747. #define CSL_CPINTC_ENABLE_REG0_ENABLE_9_RESETVAL (0x00000000u)
  8748. #define CSL_CPINTC_ENABLE_REG0_ENABLE_10_MASK (0x00000400u)
  8749. #define CSL_CPINTC_ENABLE_REG0_ENABLE_10_SHIFT (0x0000000Au)
  8750. #define CSL_CPINTC_ENABLE_REG0_ENABLE_10_RESETVAL (0x00000000u)
  8751. #define CSL_CPINTC_ENABLE_REG0_ENABLE_11_MASK (0x00000800u)
  8752. #define CSL_CPINTC_ENABLE_REG0_ENABLE_11_SHIFT (0x0000000Bu)
  8753. #define CSL_CPINTC_ENABLE_REG0_ENABLE_11_RESETVAL (0x00000000u)
  8754. #define CSL_CPINTC_ENABLE_REG0_ENABLE_12_MASK (0x00001000u)
  8755. #define CSL_CPINTC_ENABLE_REG0_ENABLE_12_SHIFT (0x0000000Cu)
  8756. #define CSL_CPINTC_ENABLE_REG0_ENABLE_12_RESETVAL (0x00000000u)
  8757. #define CSL_CPINTC_ENABLE_REG0_ENABLE_13_MASK (0x00002000u)
  8758. #define CSL_CPINTC_ENABLE_REG0_ENABLE_13_SHIFT (0x0000000Du)
  8759. #define CSL_CPINTC_ENABLE_REG0_ENABLE_13_RESETVAL (0x00000000u)
  8760. #define CSL_CPINTC_ENABLE_REG0_ENABLE_14_MASK (0x00004000u)
  8761. #define CSL_CPINTC_ENABLE_REG0_ENABLE_14_SHIFT (0x0000000Eu)
  8762. #define CSL_CPINTC_ENABLE_REG0_ENABLE_14_RESETVAL (0x00000000u)
  8763. #define CSL_CPINTC_ENABLE_REG0_ENABLE_15_MASK (0x00008000u)
  8764. #define CSL_CPINTC_ENABLE_REG0_ENABLE_15_SHIFT (0x0000000Fu)
  8765. #define CSL_CPINTC_ENABLE_REG0_ENABLE_15_RESETVAL (0x00000000u)
  8766. #define CSL_CPINTC_ENABLE_REG0_ENABLE_16_MASK (0x00010000u)
  8767. #define CSL_CPINTC_ENABLE_REG0_ENABLE_16_SHIFT (0x00000010u)
  8768. #define CSL_CPINTC_ENABLE_REG0_ENABLE_16_RESETVAL (0x00000000u)
  8769. #define CSL_CPINTC_ENABLE_REG0_ENABLE_17_MASK (0x00020000u)
  8770. #define CSL_CPINTC_ENABLE_REG0_ENABLE_17_SHIFT (0x00000011u)
  8771. #define CSL_CPINTC_ENABLE_REG0_ENABLE_17_RESETVAL (0x00000000u)
  8772. #define CSL_CPINTC_ENABLE_REG0_ENABLE_18_MASK (0x00040000u)
  8773. #define CSL_CPINTC_ENABLE_REG0_ENABLE_18_SHIFT (0x00000012u)
  8774. #define CSL_CPINTC_ENABLE_REG0_ENABLE_18_RESETVAL (0x00000000u)
  8775. #define CSL_CPINTC_ENABLE_REG0_ENABLE_19_MASK (0x00080000u)
  8776. #define CSL_CPINTC_ENABLE_REG0_ENABLE_19_SHIFT (0x00000013u)
  8777. #define CSL_CPINTC_ENABLE_REG0_ENABLE_19_RESETVAL (0x00000000u)
  8778. #define CSL_CPINTC_ENABLE_REG0_ENABLE_20_MASK (0x00100000u)
  8779. #define CSL_CPINTC_ENABLE_REG0_ENABLE_20_SHIFT (0x00000014u)
  8780. #define CSL_CPINTC_ENABLE_REG0_ENABLE_20_RESETVAL (0x00000000u)
  8781. #define CSL_CPINTC_ENABLE_REG0_ENABLE_21_MASK (0x00200000u)
  8782. #define CSL_CPINTC_ENABLE_REG0_ENABLE_21_SHIFT (0x00000015u)
  8783. #define CSL_CPINTC_ENABLE_REG0_ENABLE_21_RESETVAL (0x00000000u)
  8784. #define CSL_CPINTC_ENABLE_REG0_ENABLE_22_MASK (0x00400000u)
  8785. #define CSL_CPINTC_ENABLE_REG0_ENABLE_22_SHIFT (0x00000016u)
  8786. #define CSL_CPINTC_ENABLE_REG0_ENABLE_22_RESETVAL (0x00000000u)
  8787. #define CSL_CPINTC_ENABLE_REG0_ENABLE_23_MASK (0x00800000u)
  8788. #define CSL_CPINTC_ENABLE_REG0_ENABLE_23_SHIFT (0x00000017u)
  8789. #define CSL_CPINTC_ENABLE_REG0_ENABLE_23_RESETVAL (0x00000000u)
  8790. #define CSL_CPINTC_ENABLE_REG0_ENABLE_24_MASK (0x01000000u)
  8791. #define CSL_CPINTC_ENABLE_REG0_ENABLE_24_SHIFT (0x00000018u)
  8792. #define CSL_CPINTC_ENABLE_REG0_ENABLE_24_RESETVAL (0x00000000u)
  8793. #define CSL_CPINTC_ENABLE_REG0_ENABLE_25_MASK (0x02000000u)
  8794. #define CSL_CPINTC_ENABLE_REG0_ENABLE_25_SHIFT (0x00000019u)
  8795. #define CSL_CPINTC_ENABLE_REG0_ENABLE_25_RESETVAL (0x00000000u)
  8796. #define CSL_CPINTC_ENABLE_REG0_ENABLE_26_MASK (0x04000000u)
  8797. #define CSL_CPINTC_ENABLE_REG0_ENABLE_26_SHIFT (0x0000001Au)
  8798. #define CSL_CPINTC_ENABLE_REG0_ENABLE_26_RESETVAL (0x00000000u)
  8799. #define CSL_CPINTC_ENABLE_REG0_ENABLE_27_MASK (0x08000000u)
  8800. #define CSL_CPINTC_ENABLE_REG0_ENABLE_27_SHIFT (0x0000001Bu)
  8801. #define CSL_CPINTC_ENABLE_REG0_ENABLE_27_RESETVAL (0x00000000u)
  8802. #define CSL_CPINTC_ENABLE_REG0_ENABLE_28_MASK (0x10000000u)
  8803. #define CSL_CPINTC_ENABLE_REG0_ENABLE_28_SHIFT (0x0000001Cu)
  8804. #define CSL_CPINTC_ENABLE_REG0_ENABLE_28_RESETVAL (0x00000000u)
  8805. #define CSL_CPINTC_ENABLE_REG0_ENABLE_29_MASK (0x20000000u)
  8806. #define CSL_CPINTC_ENABLE_REG0_ENABLE_29_SHIFT (0x0000001Du)
  8807. #define CSL_CPINTC_ENABLE_REG0_ENABLE_29_RESETVAL (0x00000000u)
  8808. #define CSL_CPINTC_ENABLE_REG0_ENABLE_30_MASK (0x40000000u)
  8809. #define CSL_CPINTC_ENABLE_REG0_ENABLE_30_SHIFT (0x0000001Eu)
  8810. #define CSL_CPINTC_ENABLE_REG0_ENABLE_30_RESETVAL (0x00000000u)
  8811. #define CSL_CPINTC_ENABLE_REG0_ENABLE_31_MASK (0x80000000u)
  8812. #define CSL_CPINTC_ENABLE_REG0_ENABLE_31_SHIFT (0x0000001Fu)
  8813. #define CSL_CPINTC_ENABLE_REG0_ENABLE_31_RESETVAL (0x00000000u)
  8814. #define CSL_CPINTC_ENABLE_REG0_RESETVAL (0x00000000u)
  8815. /* enable_reg1 */
  8816. #define CSL_CPINTC_ENABLE_REG1_ENABLE_32_MASK (0x00000001u)
  8817. #define CSL_CPINTC_ENABLE_REG1_ENABLE_32_SHIFT (0x00000000u)
  8818. #define CSL_CPINTC_ENABLE_REG1_ENABLE_32_RESETVAL (0x00000000u)
  8819. #define CSL_CPINTC_ENABLE_REG1_ENABLE_33_MASK (0x00000002u)
  8820. #define CSL_CPINTC_ENABLE_REG1_ENABLE_33_SHIFT (0x00000001u)
  8821. #define CSL_CPINTC_ENABLE_REG1_ENABLE_33_RESETVAL (0x00000000u)
  8822. #define CSL_CPINTC_ENABLE_REG1_ENABLE_34_MASK (0x00000004u)
  8823. #define CSL_CPINTC_ENABLE_REG1_ENABLE_34_SHIFT (0x00000002u)
  8824. #define CSL_CPINTC_ENABLE_REG1_ENABLE_34_RESETVAL (0x00000000u)
  8825. #define CSL_CPINTC_ENABLE_REG1_ENABLE_35_MASK (0x00000008u)
  8826. #define CSL_CPINTC_ENABLE_REG1_ENABLE_35_SHIFT (0x00000003u)
  8827. #define CSL_CPINTC_ENABLE_REG1_ENABLE_35_RESETVAL (0x00000000u)
  8828. #define CSL_CPINTC_ENABLE_REG1_ENABLE_36_MASK (0x00000010u)
  8829. #define CSL_CPINTC_ENABLE_REG1_ENABLE_36_SHIFT (0x00000004u)
  8830. #define CSL_CPINTC_ENABLE_REG1_ENABLE_36_RESETVAL (0x00000000u)
  8831. #define CSL_CPINTC_ENABLE_REG1_ENABLE_37_MASK (0x00000020u)
  8832. #define CSL_CPINTC_ENABLE_REG1_ENABLE_37_SHIFT (0x00000005u)
  8833. #define CSL_CPINTC_ENABLE_REG1_ENABLE_37_RESETVAL (0x00000000u)
  8834. #define CSL_CPINTC_ENABLE_REG1_ENABLE_38_MASK (0x00000040u)
  8835. #define CSL_CPINTC_ENABLE_REG1_ENABLE_38_SHIFT (0x00000006u)
  8836. #define CSL_CPINTC_ENABLE_REG1_ENABLE_38_RESETVAL (0x00000000u)
  8837. #define CSL_CPINTC_ENABLE_REG1_ENABLE_39_MASK (0x00000080u)
  8838. #define CSL_CPINTC_ENABLE_REG1_ENABLE_39_SHIFT (0x00000007u)
  8839. #define CSL_CPINTC_ENABLE_REG1_ENABLE_39_RESETVAL (0x00000000u)
  8840. #define CSL_CPINTC_ENABLE_REG1_ENABLE_40_MASK (0x00000100u)
  8841. #define CSL_CPINTC_ENABLE_REG1_ENABLE_40_SHIFT (0x00000008u)
  8842. #define CSL_CPINTC_ENABLE_REG1_ENABLE_40_RESETVAL (0x00000000u)
  8843. #define CSL_CPINTC_ENABLE_REG1_ENABLE_41_MASK (0x00000200u)
  8844. #define CSL_CPINTC_ENABLE_REG1_ENABLE_41_SHIFT (0x00000009u)
  8845. #define CSL_CPINTC_ENABLE_REG1_ENABLE_41_RESETVAL (0x00000000u)
  8846. #define CSL_CPINTC_ENABLE_REG1_ENABLE_42_MASK (0x00000400u)
  8847. #define CSL_CPINTC_ENABLE_REG1_ENABLE_42_SHIFT (0x0000000Au)
  8848. #define CSL_CPINTC_ENABLE_REG1_ENABLE_42_RESETVAL (0x00000000u)
  8849. #define CSL_CPINTC_ENABLE_REG1_ENABLE_43_MASK (0x00000800u)
  8850. #define CSL_CPINTC_ENABLE_REG1_ENABLE_43_SHIFT (0x0000000Bu)
  8851. #define CSL_CPINTC_ENABLE_REG1_ENABLE_43_RESETVAL (0x00000000u)
  8852. #define CSL_CPINTC_ENABLE_REG1_ENABLE_44_MASK (0x00001000u)
  8853. #define CSL_CPINTC_ENABLE_REG1_ENABLE_44_SHIFT (0x0000000Cu)
  8854. #define CSL_CPINTC_ENABLE_REG1_ENABLE_44_RESETVAL (0x00000000u)
  8855. #define CSL_CPINTC_ENABLE_REG1_ENABLE_45_MASK (0x00002000u)
  8856. #define CSL_CPINTC_ENABLE_REG1_ENABLE_45_SHIFT (0x0000000Du)
  8857. #define CSL_CPINTC_ENABLE_REG1_ENABLE_45_RESETVAL (0x00000000u)
  8858. #define CSL_CPINTC_ENABLE_REG1_ENABLE_46_MASK (0x00004000u)
  8859. #define CSL_CPINTC_ENABLE_REG1_ENABLE_46_SHIFT (0x0000000Eu)
  8860. #define CSL_CPINTC_ENABLE_REG1_ENABLE_46_RESETVAL (0x00000000u)
  8861. #define CSL_CPINTC_ENABLE_REG1_ENABLE_47_MASK (0x00008000u)
  8862. #define CSL_CPINTC_ENABLE_REG1_ENABLE_47_SHIFT (0x0000000Fu)
  8863. #define CSL_CPINTC_ENABLE_REG1_ENABLE_47_RESETVAL (0x00000000u)
  8864. #define CSL_CPINTC_ENABLE_REG1_ENABLE_48_MASK (0x00010000u)
  8865. #define CSL_CPINTC_ENABLE_REG1_ENABLE_48_SHIFT (0x00000010u)
  8866. #define CSL_CPINTC_ENABLE_REG1_ENABLE_48_RESETVAL (0x00000000u)
  8867. #define CSL_CPINTC_ENABLE_REG1_ENABLE_49_MASK (0x00020000u)
  8868. #define CSL_CPINTC_ENABLE_REG1_ENABLE_49_SHIFT (0x00000011u)
  8869. #define CSL_CPINTC_ENABLE_REG1_ENABLE_49_RESETVAL (0x00000000u)
  8870. #define CSL_CPINTC_ENABLE_REG1_ENABLE_50_MASK (0x00040000u)
  8871. #define CSL_CPINTC_ENABLE_REG1_ENABLE_50_SHIFT (0x00000012u)
  8872. #define CSL_CPINTC_ENABLE_REG1_ENABLE_50_RESETVAL (0x00000000u)
  8873. #define CSL_CPINTC_ENABLE_REG1_ENABLE_51_MASK (0x00080000u)
  8874. #define CSL_CPINTC_ENABLE_REG1_ENABLE_51_SHIFT (0x00000013u)
  8875. #define CSL_CPINTC_ENABLE_REG1_ENABLE_51_RESETVAL (0x00000000u)
  8876. #define CSL_CPINTC_ENABLE_REG1_ENABLE_52_MASK (0x00100000u)
  8877. #define CSL_CPINTC_ENABLE_REG1_ENABLE_52_SHIFT (0x00000014u)
  8878. #define CSL_CPINTC_ENABLE_REG1_ENABLE_52_RESETVAL (0x00000000u)
  8879. #define CSL_CPINTC_ENABLE_REG1_ENABLE_53_MASK (0x00200000u)
  8880. #define CSL_CPINTC_ENABLE_REG1_ENABLE_53_SHIFT (0x00000015u)
  8881. #define CSL_CPINTC_ENABLE_REG1_ENABLE_53_RESETVAL (0x00000000u)
  8882. #define CSL_CPINTC_ENABLE_REG1_ENABLE_54_MASK (0x00400000u)
  8883. #define CSL_CPINTC_ENABLE_REG1_ENABLE_54_SHIFT (0x00000016u)
  8884. #define CSL_CPINTC_ENABLE_REG1_ENABLE_54_RESETVAL (0x00000000u)
  8885. #define CSL_CPINTC_ENABLE_REG1_ENABLE_55_MASK (0x00800000u)
  8886. #define CSL_CPINTC_ENABLE_REG1_ENABLE_55_SHIFT (0x00000017u)
  8887. #define CSL_CPINTC_ENABLE_REG1_ENABLE_55_RESETVAL (0x00000000u)
  8888. #define CSL_CPINTC_ENABLE_REG1_ENABLE_56_MASK (0x01000000u)
  8889. #define CSL_CPINTC_ENABLE_REG1_ENABLE_56_SHIFT (0x00000018u)
  8890. #define CSL_CPINTC_ENABLE_REG1_ENABLE_56_RESETVAL (0x00000000u)
  8891. #define CSL_CPINTC_ENABLE_REG1_ENABLE_57_MASK (0x02000000u)
  8892. #define CSL_CPINTC_ENABLE_REG1_ENABLE_57_SHIFT (0x00000019u)
  8893. #define CSL_CPINTC_ENABLE_REG1_ENABLE_57_RESETVAL (0x00000000u)
  8894. #define CSL_CPINTC_ENABLE_REG1_ENABLE_58_MASK (0x04000000u)
  8895. #define CSL_CPINTC_ENABLE_REG1_ENABLE_58_SHIFT (0x0000001Au)
  8896. #define CSL_CPINTC_ENABLE_REG1_ENABLE_58_RESETVAL (0x00000000u)
  8897. #define CSL_CPINTC_ENABLE_REG1_ENABLE_59_MASK (0x08000000u)
  8898. #define CSL_CPINTC_ENABLE_REG1_ENABLE_59_SHIFT (0x0000001Bu)
  8899. #define CSL_CPINTC_ENABLE_REG1_ENABLE_59_RESETVAL (0x00000000u)
  8900. #define CSL_CPINTC_ENABLE_REG1_ENABLE_60_MASK (0x10000000u)
  8901. #define CSL_CPINTC_ENABLE_REG1_ENABLE_60_SHIFT (0x0000001Cu)
  8902. #define CSL_CPINTC_ENABLE_REG1_ENABLE_60_RESETVAL (0x00000000u)
  8903. #define CSL_CPINTC_ENABLE_REG1_ENABLE_61_MASK (0x20000000u)
  8904. #define CSL_CPINTC_ENABLE_REG1_ENABLE_61_SHIFT (0x0000001Du)
  8905. #define CSL_CPINTC_ENABLE_REG1_ENABLE_61_RESETVAL (0x00000000u)
  8906. #define CSL_CPINTC_ENABLE_REG1_ENABLE_62_MASK (0x40000000u)
  8907. #define CSL_CPINTC_ENABLE_REG1_ENABLE_62_SHIFT (0x0000001Eu)
  8908. #define CSL_CPINTC_ENABLE_REG1_ENABLE_62_RESETVAL (0x00000000u)
  8909. #define CSL_CPINTC_ENABLE_REG1_ENABLE_63_MASK (0x80000000u)
  8910. #define CSL_CPINTC_ENABLE_REG1_ENABLE_63_SHIFT (0x0000001Fu)
  8911. #define CSL_CPINTC_ENABLE_REG1_ENABLE_63_RESETVAL (0x00000000u)
  8912. #define CSL_CPINTC_ENABLE_REG1_RESETVAL (0x00000000u)
  8913. /* enable_reg2 */
  8914. #define CSL_CPINTC_ENABLE_REG2_ENABLE_64_MASK (0x00000001u)
  8915. #define CSL_CPINTC_ENABLE_REG2_ENABLE_64_SHIFT (0x00000000u)
  8916. #define CSL_CPINTC_ENABLE_REG2_ENABLE_64_RESETVAL (0x00000000u)
  8917. #define CSL_CPINTC_ENABLE_REG2_ENABLE_65_MASK (0x00000002u)
  8918. #define CSL_CPINTC_ENABLE_REG2_ENABLE_65_SHIFT (0x00000001u)
  8919. #define CSL_CPINTC_ENABLE_REG2_ENABLE_65_RESETVAL (0x00000000u)
  8920. #define CSL_CPINTC_ENABLE_REG2_ENABLE_66_MASK (0x00000004u)
  8921. #define CSL_CPINTC_ENABLE_REG2_ENABLE_66_SHIFT (0x00000002u)
  8922. #define CSL_CPINTC_ENABLE_REG2_ENABLE_66_RESETVAL (0x00000000u)
  8923. #define CSL_CPINTC_ENABLE_REG2_ENABLE_67_MASK (0x00000008u)
  8924. #define CSL_CPINTC_ENABLE_REG2_ENABLE_67_SHIFT (0x00000003u)
  8925. #define CSL_CPINTC_ENABLE_REG2_ENABLE_67_RESETVAL (0x00000000u)
  8926. #define CSL_CPINTC_ENABLE_REG2_ENABLE_68_MASK (0x00000010u)
  8927. #define CSL_CPINTC_ENABLE_REG2_ENABLE_68_SHIFT (0x00000004u)
  8928. #define CSL_CPINTC_ENABLE_REG2_ENABLE_68_RESETVAL (0x00000000u)
  8929. #define CSL_CPINTC_ENABLE_REG2_ENABLE_69_MASK (0x00000020u)
  8930. #define CSL_CPINTC_ENABLE_REG2_ENABLE_69_SHIFT (0x00000005u)
  8931. #define CSL_CPINTC_ENABLE_REG2_ENABLE_69_RESETVAL (0x00000000u)
  8932. #define CSL_CPINTC_ENABLE_REG2_ENABLE_70_MASK (0x00000040u)
  8933. #define CSL_CPINTC_ENABLE_REG2_ENABLE_70_SHIFT (0x00000006u)
  8934. #define CSL_CPINTC_ENABLE_REG2_ENABLE_70_RESETVAL (0x00000000u)
  8935. #define CSL_CPINTC_ENABLE_REG2_ENABLE_71_MASK (0x00000080u)
  8936. #define CSL_CPINTC_ENABLE_REG2_ENABLE_71_SHIFT (0x00000007u)
  8937. #define CSL_CPINTC_ENABLE_REG2_ENABLE_71_RESETVAL (0x00000000u)
  8938. #define CSL_CPINTC_ENABLE_REG2_ENABLE_72_MASK (0x00000100u)
  8939. #define CSL_CPINTC_ENABLE_REG2_ENABLE_72_SHIFT (0x00000008u)
  8940. #define CSL_CPINTC_ENABLE_REG2_ENABLE_72_RESETVAL (0x00000000u)
  8941. #define CSL_CPINTC_ENABLE_REG2_ENABLE_73_MASK (0x00000200u)
  8942. #define CSL_CPINTC_ENABLE_REG2_ENABLE_73_SHIFT (0x00000009u)
  8943. #define CSL_CPINTC_ENABLE_REG2_ENABLE_73_RESETVAL (0x00000000u)
  8944. #define CSL_CPINTC_ENABLE_REG2_ENABLE_74_MASK (0x00000400u)
  8945. #define CSL_CPINTC_ENABLE_REG2_ENABLE_74_SHIFT (0x0000000Au)
  8946. #define CSL_CPINTC_ENABLE_REG2_ENABLE_74_RESETVAL (0x00000000u)
  8947. #define CSL_CPINTC_ENABLE_REG2_ENABLE_75_MASK (0x00000800u)
  8948. #define CSL_CPINTC_ENABLE_REG2_ENABLE_75_SHIFT (0x0000000Bu)
  8949. #define CSL_CPINTC_ENABLE_REG2_ENABLE_75_RESETVAL (0x00000000u)
  8950. #define CSL_CPINTC_ENABLE_REG2_ENABLE_76_MASK (0x00001000u)
  8951. #define CSL_CPINTC_ENABLE_REG2_ENABLE_76_SHIFT (0x0000000Cu)
  8952. #define CSL_CPINTC_ENABLE_REG2_ENABLE_76_RESETVAL (0x00000000u)
  8953. #define CSL_CPINTC_ENABLE_REG2_ENABLE_77_MASK (0x00002000u)
  8954. #define CSL_CPINTC_ENABLE_REG2_ENABLE_77_SHIFT (0x0000000Du)
  8955. #define CSL_CPINTC_ENABLE_REG2_ENABLE_77_RESETVAL (0x00000000u)
  8956. #define CSL_CPINTC_ENABLE_REG2_ENABLE_78_MASK (0x00004000u)
  8957. #define CSL_CPINTC_ENABLE_REG2_ENABLE_78_SHIFT (0x0000000Eu)
  8958. #define CSL_CPINTC_ENABLE_REG2_ENABLE_78_RESETVAL (0x00000000u)
  8959. #define CSL_CPINTC_ENABLE_REG2_ENABLE_79_MASK (0x00008000u)
  8960. #define CSL_CPINTC_ENABLE_REG2_ENABLE_79_SHIFT (0x0000000Fu)
  8961. #define CSL_CPINTC_ENABLE_REG2_ENABLE_79_RESETVAL (0x00000000u)
  8962. #define CSL_CPINTC_ENABLE_REG2_ENABLE_80_MASK (0x00010000u)
  8963. #define CSL_CPINTC_ENABLE_REG2_ENABLE_80_SHIFT (0x00000010u)
  8964. #define CSL_CPINTC_ENABLE_REG2_ENABLE_80_RESETVAL (0x00000000u)
  8965. #define CSL_CPINTC_ENABLE_REG2_ENABLE_81_MASK (0x00020000u)
  8966. #define CSL_CPINTC_ENABLE_REG2_ENABLE_81_SHIFT (0x00000011u)
  8967. #define CSL_CPINTC_ENABLE_REG2_ENABLE_81_RESETVAL (0x00000000u)
  8968. #define CSL_CPINTC_ENABLE_REG2_ENABLE_82_MASK (0x00040000u)
  8969. #define CSL_CPINTC_ENABLE_REG2_ENABLE_82_SHIFT (0x00000012u)
  8970. #define CSL_CPINTC_ENABLE_REG2_ENABLE_82_RESETVAL (0x00000000u)
  8971. #define CSL_CPINTC_ENABLE_REG2_ENABLE_83_MASK (0x00080000u)
  8972. #define CSL_CPINTC_ENABLE_REG2_ENABLE_83_SHIFT (0x00000013u)
  8973. #define CSL_CPINTC_ENABLE_REG2_ENABLE_83_RESETVAL (0x00000000u)
  8974. #define CSL_CPINTC_ENABLE_REG2_ENABLE_84_MASK (0x00100000u)
  8975. #define CSL_CPINTC_ENABLE_REG2_ENABLE_84_SHIFT (0x00000014u)
  8976. #define CSL_CPINTC_ENABLE_REG2_ENABLE_84_RESETVAL (0x00000000u)
  8977. #define CSL_CPINTC_ENABLE_REG2_ENABLE_85_MASK (0x00200000u)
  8978. #define CSL_CPINTC_ENABLE_REG2_ENABLE_85_SHIFT (0x00000015u)
  8979. #define CSL_CPINTC_ENABLE_REG2_ENABLE_85_RESETVAL (0x00000000u)
  8980. #define CSL_CPINTC_ENABLE_REG2_ENABLE_86_MASK (0x00400000u)
  8981. #define CSL_CPINTC_ENABLE_REG2_ENABLE_86_SHIFT (0x00000016u)
  8982. #define CSL_CPINTC_ENABLE_REG2_ENABLE_86_RESETVAL (0x00000000u)
  8983. #define CSL_CPINTC_ENABLE_REG2_ENABLE_87_MASK (0x00800000u)
  8984. #define CSL_CPINTC_ENABLE_REG2_ENABLE_87_SHIFT (0x00000017u)
  8985. #define CSL_CPINTC_ENABLE_REG2_ENABLE_87_RESETVAL (0x00000000u)
  8986. #define CSL_CPINTC_ENABLE_REG2_ENABLE_88_MASK (0x01000000u)
  8987. #define CSL_CPINTC_ENABLE_REG2_ENABLE_88_SHIFT (0x00000018u)
  8988. #define CSL_CPINTC_ENABLE_REG2_ENABLE_88_RESETVAL (0x00000000u)
  8989. #define CSL_CPINTC_ENABLE_REG2_ENABLE_89_MASK (0x02000000u)
  8990. #define CSL_CPINTC_ENABLE_REG2_ENABLE_89_SHIFT (0x00000019u)
  8991. #define CSL_CPINTC_ENABLE_REG2_ENABLE_89_RESETVAL (0x00000000u)
  8992. #define CSL_CPINTC_ENABLE_REG2_ENABLE_90_MASK (0x04000000u)
  8993. #define CSL_CPINTC_ENABLE_REG2_ENABLE_90_SHIFT (0x0000001Au)
  8994. #define CSL_CPINTC_ENABLE_REG2_ENABLE_90_RESETVAL (0x00000000u)
  8995. #define CSL_CPINTC_ENABLE_REG2_ENABLE_91_MASK (0x08000000u)
  8996. #define CSL_CPINTC_ENABLE_REG2_ENABLE_91_SHIFT (0x0000001Bu)
  8997. #define CSL_CPINTC_ENABLE_REG2_ENABLE_91_RESETVAL (0x00000000u)
  8998. #define CSL_CPINTC_ENABLE_REG2_ENABLE_92_MASK (0x10000000u)
  8999. #define CSL_CPINTC_ENABLE_REG2_ENABLE_92_SHIFT (0x0000001Cu)
  9000. #define CSL_CPINTC_ENABLE_REG2_ENABLE_92_RESETVAL (0x00000000u)
  9001. #define CSL_CPINTC_ENABLE_REG2_ENABLE_93_MASK (0x20000000u)
  9002. #define CSL_CPINTC_ENABLE_REG2_ENABLE_93_SHIFT (0x0000001Du)
  9003. #define CSL_CPINTC_ENABLE_REG2_ENABLE_93_RESETVAL (0x00000000u)
  9004. #define CSL_CPINTC_ENABLE_REG2_ENABLE_94_MASK (0x40000000u)
  9005. #define CSL_CPINTC_ENABLE_REG2_ENABLE_94_SHIFT (0x0000001Eu)
  9006. #define CSL_CPINTC_ENABLE_REG2_ENABLE_94_RESETVAL (0x00000000u)
  9007. #define CSL_CPINTC_ENABLE_REG2_ENABLE_95_MASK (0x80000000u)
  9008. #define CSL_CPINTC_ENABLE_REG2_ENABLE_95_SHIFT (0x0000001Fu)
  9009. #define CSL_CPINTC_ENABLE_REG2_ENABLE_95_RESETVAL (0x00000000u)
  9010. #define CSL_CPINTC_ENABLE_REG2_RESETVAL (0x00000000u)
  9011. /* enable_reg3 */
  9012. #define CSL_CPINTC_ENABLE_REG3_ENABLE_96_MASK (0x00000001u)
  9013. #define CSL_CPINTC_ENABLE_REG3_ENABLE_96_SHIFT (0x00000000u)
  9014. #define CSL_CPINTC_ENABLE_REG3_ENABLE_96_RESETVAL (0x00000000u)
  9015. #define CSL_CPINTC_ENABLE_REG3_ENABLE_97_MASK (0x00000002u)
  9016. #define CSL_CPINTC_ENABLE_REG3_ENABLE_97_SHIFT (0x00000001u)
  9017. #define CSL_CPINTC_ENABLE_REG3_ENABLE_97_RESETVAL (0x00000000u)
  9018. #define CSL_CPINTC_ENABLE_REG3_ENABLE_98_MASK (0x00000004u)
  9019. #define CSL_CPINTC_ENABLE_REG3_ENABLE_98_SHIFT (0x00000002u)
  9020. #define CSL_CPINTC_ENABLE_REG3_ENABLE_98_RESETVAL (0x00000000u)
  9021. #define CSL_CPINTC_ENABLE_REG3_ENABLE_99_MASK (0x00000008u)
  9022. #define CSL_CPINTC_ENABLE_REG3_ENABLE_99_SHIFT (0x00000003u)
  9023. #define CSL_CPINTC_ENABLE_REG3_ENABLE_99_RESETVAL (0x00000000u)
  9024. #define CSL_CPINTC_ENABLE_REG3_ENABLE_100_MASK (0x00000010u)
  9025. #define CSL_CPINTC_ENABLE_REG3_ENABLE_100_SHIFT (0x00000004u)
  9026. #define CSL_CPINTC_ENABLE_REG3_ENABLE_100_RESETVAL (0x00000000u)
  9027. #define CSL_CPINTC_ENABLE_REG3_ENABLE_101_MASK (0x00000020u)
  9028. #define CSL_CPINTC_ENABLE_REG3_ENABLE_101_SHIFT (0x00000005u)
  9029. #define CSL_CPINTC_ENABLE_REG3_ENABLE_101_RESETVAL (0x00000000u)
  9030. #define CSL_CPINTC_ENABLE_REG3_ENABLE_102_MASK (0x00000040u)
  9031. #define CSL_CPINTC_ENABLE_REG3_ENABLE_102_SHIFT (0x00000006u)
  9032. #define CSL_CPINTC_ENABLE_REG3_ENABLE_102_RESETVAL (0x00000000u)
  9033. #define CSL_CPINTC_ENABLE_REG3_ENABLE_103_MASK (0x00000080u)
  9034. #define CSL_CPINTC_ENABLE_REG3_ENABLE_103_SHIFT (0x00000007u)
  9035. #define CSL_CPINTC_ENABLE_REG3_ENABLE_103_RESETVAL (0x00000000u)
  9036. #define CSL_CPINTC_ENABLE_REG3_ENABLE_104_MASK (0x00000100u)
  9037. #define CSL_CPINTC_ENABLE_REG3_ENABLE_104_SHIFT (0x00000008u)
  9038. #define CSL_CPINTC_ENABLE_REG3_ENABLE_104_RESETVAL (0x00000000u)
  9039. #define CSL_CPINTC_ENABLE_REG3_ENABLE_105_MASK (0x00000200u)
  9040. #define CSL_CPINTC_ENABLE_REG3_ENABLE_105_SHIFT (0x00000009u)
  9041. #define CSL_CPINTC_ENABLE_REG3_ENABLE_105_RESETVAL (0x00000000u)
  9042. #define CSL_CPINTC_ENABLE_REG3_ENABLE_106_MASK (0x00000400u)
  9043. #define CSL_CPINTC_ENABLE_REG3_ENABLE_106_SHIFT (0x0000000Au)
  9044. #define CSL_CPINTC_ENABLE_REG3_ENABLE_106_RESETVAL (0x00000000u)
  9045. #define CSL_CPINTC_ENABLE_REG3_ENABLE_107_MASK (0x00000800u)
  9046. #define CSL_CPINTC_ENABLE_REG3_ENABLE_107_SHIFT (0x0000000Bu)
  9047. #define CSL_CPINTC_ENABLE_REG3_ENABLE_107_RESETVAL (0x00000000u)
  9048. #define CSL_CPINTC_ENABLE_REG3_ENABLE_108_MASK (0x00001000u)
  9049. #define CSL_CPINTC_ENABLE_REG3_ENABLE_108_SHIFT (0x0000000Cu)
  9050. #define CSL_CPINTC_ENABLE_REG3_ENABLE_108_RESETVAL (0x00000000u)
  9051. #define CSL_CPINTC_ENABLE_REG3_ENABLE_109_MASK (0x00002000u)
  9052. #define CSL_CPINTC_ENABLE_REG3_ENABLE_109_SHIFT (0x0000000Du)
  9053. #define CSL_CPINTC_ENABLE_REG3_ENABLE_109_RESETVAL (0x00000000u)
  9054. #define CSL_CPINTC_ENABLE_REG3_ENABLE_110_MASK (0x00004000u)
  9055. #define CSL_CPINTC_ENABLE_REG3_ENABLE_110_SHIFT (0x0000000Eu)
  9056. #define CSL_CPINTC_ENABLE_REG3_ENABLE_110_RESETVAL (0x00000000u)
  9057. #define CSL_CPINTC_ENABLE_REG3_ENABLE_111_MASK (0x00008000u)
  9058. #define CSL_CPINTC_ENABLE_REG3_ENABLE_111_SHIFT (0x0000000Fu)
  9059. #define CSL_CPINTC_ENABLE_REG3_ENABLE_111_RESETVAL (0x00000000u)
  9060. #define CSL_CPINTC_ENABLE_REG3_ENABLE_112_MASK (0x00010000u)
  9061. #define CSL_CPINTC_ENABLE_REG3_ENABLE_112_SHIFT (0x00000010u)
  9062. #define CSL_CPINTC_ENABLE_REG3_ENABLE_112_RESETVAL (0x00000000u)
  9063. #define CSL_CPINTC_ENABLE_REG3_ENABLE_113_MASK (0x00020000u)
  9064. #define CSL_CPINTC_ENABLE_REG3_ENABLE_113_SHIFT (0x00000011u)
  9065. #define CSL_CPINTC_ENABLE_REG3_ENABLE_113_RESETVAL (0x00000000u)
  9066. #define CSL_CPINTC_ENABLE_REG3_ENABLE_114_MASK (0x00040000u)
  9067. #define CSL_CPINTC_ENABLE_REG3_ENABLE_114_SHIFT (0x00000012u)
  9068. #define CSL_CPINTC_ENABLE_REG3_ENABLE_114_RESETVAL (0x00000000u)
  9069. #define CSL_CPINTC_ENABLE_REG3_ENABLE_115_MASK (0x00080000u)
  9070. #define CSL_CPINTC_ENABLE_REG3_ENABLE_115_SHIFT (0x00000013u)
  9071. #define CSL_CPINTC_ENABLE_REG3_ENABLE_115_RESETVAL (0x00000000u)
  9072. #define CSL_CPINTC_ENABLE_REG3_ENABLE_116_MASK (0x00100000u)
  9073. #define CSL_CPINTC_ENABLE_REG3_ENABLE_116_SHIFT (0x00000014u)
  9074. #define CSL_CPINTC_ENABLE_REG3_ENABLE_116_RESETVAL (0x00000000u)
  9075. #define CSL_CPINTC_ENABLE_REG3_ENABLE_117_MASK (0x00200000u)
  9076. #define CSL_CPINTC_ENABLE_REG3_ENABLE_117_SHIFT (0x00000015u)
  9077. #define CSL_CPINTC_ENABLE_REG3_ENABLE_117_RESETVAL (0x00000000u)
  9078. #define CSL_CPINTC_ENABLE_REG3_ENABLE_118_MASK (0x00400000u)
  9079. #define CSL_CPINTC_ENABLE_REG3_ENABLE_118_SHIFT (0x00000016u)
  9080. #define CSL_CPINTC_ENABLE_REG3_ENABLE_118_RESETVAL (0x00000000u)
  9081. #define CSL_CPINTC_ENABLE_REG3_ENABLE_119_MASK (0x00800000u)
  9082. #define CSL_CPINTC_ENABLE_REG3_ENABLE_119_SHIFT (0x00000017u)
  9083. #define CSL_CPINTC_ENABLE_REG3_ENABLE_119_RESETVAL (0x00000000u)
  9084. #define CSL_CPINTC_ENABLE_REG3_ENABLE_120_MASK (0x01000000u)
  9085. #define CSL_CPINTC_ENABLE_REG3_ENABLE_120_SHIFT (0x00000018u)
  9086. #define CSL_CPINTC_ENABLE_REG3_ENABLE_120_RESETVAL (0x00000000u)
  9087. #define CSL_CPINTC_ENABLE_REG3_ENABLE_121_MASK (0x02000000u)
  9088. #define CSL_CPINTC_ENABLE_REG3_ENABLE_121_SHIFT (0x00000019u)
  9089. #define CSL_CPINTC_ENABLE_REG3_ENABLE_121_RESETVAL (0x00000000u)
  9090. #define CSL_CPINTC_ENABLE_REG3_ENABLE_122_MASK (0x04000000u)
  9091. #define CSL_CPINTC_ENABLE_REG3_ENABLE_122_SHIFT (0x0000001Au)
  9092. #define CSL_CPINTC_ENABLE_REG3_ENABLE_122_RESETVAL (0x00000000u)
  9093. #define CSL_CPINTC_ENABLE_REG3_ENABLE_123_MASK (0x08000000u)
  9094. #define CSL_CPINTC_ENABLE_REG3_ENABLE_123_SHIFT (0x0000001Bu)
  9095. #define CSL_CPINTC_ENABLE_REG3_ENABLE_123_RESETVAL (0x00000000u)
  9096. #define CSL_CPINTC_ENABLE_REG3_ENABLE_124_MASK (0x10000000u)
  9097. #define CSL_CPINTC_ENABLE_REG3_ENABLE_124_SHIFT (0x0000001Cu)
  9098. #define CSL_CPINTC_ENABLE_REG3_ENABLE_124_RESETVAL (0x00000000u)
  9099. #define CSL_CPINTC_ENABLE_REG3_ENABLE_125_MASK (0x20000000u)
  9100. #define CSL_CPINTC_ENABLE_REG3_ENABLE_125_SHIFT (0x0000001Du)
  9101. #define CSL_CPINTC_ENABLE_REG3_ENABLE_125_RESETVAL (0x00000000u)
  9102. #define CSL_CPINTC_ENABLE_REG3_ENABLE_126_MASK (0x40000000u)
  9103. #define CSL_CPINTC_ENABLE_REG3_ENABLE_126_SHIFT (0x0000001Eu)
  9104. #define CSL_CPINTC_ENABLE_REG3_ENABLE_126_RESETVAL (0x00000000u)
  9105. #define CSL_CPINTC_ENABLE_REG3_ENABLE_127_MASK (0x80000000u)
  9106. #define CSL_CPINTC_ENABLE_REG3_ENABLE_127_SHIFT (0x0000001Fu)
  9107. #define CSL_CPINTC_ENABLE_REG3_ENABLE_127_RESETVAL (0x00000000u)
  9108. #define CSL_CPINTC_ENABLE_REG3_RESETVAL (0x00000000u)
  9109. /* enable_reg4 */
  9110. #define CSL_CPINTC_ENABLE_REG4_ENABLE_128_MASK (0x00000001u)
  9111. #define CSL_CPINTC_ENABLE_REG4_ENABLE_128_SHIFT (0x00000000u)
  9112. #define CSL_CPINTC_ENABLE_REG4_ENABLE_128_RESETVAL (0x00000000u)
  9113. #define CSL_CPINTC_ENABLE_REG4_ENABLE_129_MASK (0x00000002u)
  9114. #define CSL_CPINTC_ENABLE_REG4_ENABLE_129_SHIFT (0x00000001u)
  9115. #define CSL_CPINTC_ENABLE_REG4_ENABLE_129_RESETVAL (0x00000000u)
  9116. #define CSL_CPINTC_ENABLE_REG4_ENABLE_130_MASK (0x00000004u)
  9117. #define CSL_CPINTC_ENABLE_REG4_ENABLE_130_SHIFT (0x00000002u)
  9118. #define CSL_CPINTC_ENABLE_REG4_ENABLE_130_RESETVAL (0x00000000u)
  9119. #define CSL_CPINTC_ENABLE_REG4_ENABLE_131_MASK (0x00000008u)
  9120. #define CSL_CPINTC_ENABLE_REG4_ENABLE_131_SHIFT (0x00000003u)
  9121. #define CSL_CPINTC_ENABLE_REG4_ENABLE_131_RESETVAL (0x00000000u)
  9122. #define CSL_CPINTC_ENABLE_REG4_ENABLE_132_MASK (0x00000010u)
  9123. #define CSL_CPINTC_ENABLE_REG4_ENABLE_132_SHIFT (0x00000004u)
  9124. #define CSL_CPINTC_ENABLE_REG4_ENABLE_132_RESETVAL (0x00000000u)
  9125. #define CSL_CPINTC_ENABLE_REG4_ENABLE_133_MASK (0x00000020u)
  9126. #define CSL_CPINTC_ENABLE_REG4_ENABLE_133_SHIFT (0x00000005u)
  9127. #define CSL_CPINTC_ENABLE_REG4_ENABLE_133_RESETVAL (0x00000000u)
  9128. #define CSL_CPINTC_ENABLE_REG4_ENABLE_134_MASK (0x00000040u)
  9129. #define CSL_CPINTC_ENABLE_REG4_ENABLE_134_SHIFT (0x00000006u)
  9130. #define CSL_CPINTC_ENABLE_REG4_ENABLE_134_RESETVAL (0x00000000u)
  9131. #define CSL_CPINTC_ENABLE_REG4_ENABLE_135_MASK (0x00000080u)
  9132. #define CSL_CPINTC_ENABLE_REG4_ENABLE_135_SHIFT (0x00000007u)
  9133. #define CSL_CPINTC_ENABLE_REG4_ENABLE_135_RESETVAL (0x00000000u)
  9134. #define CSL_CPINTC_ENABLE_REG4_ENABLE_136_MASK (0x00000100u)
  9135. #define CSL_CPINTC_ENABLE_REG4_ENABLE_136_SHIFT (0x00000008u)
  9136. #define CSL_CPINTC_ENABLE_REG4_ENABLE_136_RESETVAL (0x00000000u)
  9137. #define CSL_CPINTC_ENABLE_REG4_ENABLE_137_MASK (0x00000200u)
  9138. #define CSL_CPINTC_ENABLE_REG4_ENABLE_137_SHIFT (0x00000009u)
  9139. #define CSL_CPINTC_ENABLE_REG4_ENABLE_137_RESETVAL (0x00000000u)
  9140. #define CSL_CPINTC_ENABLE_REG4_ENABLE_138_MASK (0x00000400u)
  9141. #define CSL_CPINTC_ENABLE_REG4_ENABLE_138_SHIFT (0x0000000Au)
  9142. #define CSL_CPINTC_ENABLE_REG4_ENABLE_138_RESETVAL (0x00000000u)
  9143. #define CSL_CPINTC_ENABLE_REG4_ENABLE_139_MASK (0x00000800u)
  9144. #define CSL_CPINTC_ENABLE_REG4_ENABLE_139_SHIFT (0x0000000Bu)
  9145. #define CSL_CPINTC_ENABLE_REG4_ENABLE_139_RESETVAL (0x00000000u)
  9146. #define CSL_CPINTC_ENABLE_REG4_ENABLE_140_MASK (0x00001000u)
  9147. #define CSL_CPINTC_ENABLE_REG4_ENABLE_140_SHIFT (0x0000000Cu)
  9148. #define CSL_CPINTC_ENABLE_REG4_ENABLE_140_RESETVAL (0x00000000u)
  9149. #define CSL_CPINTC_ENABLE_REG4_ENABLE_141_MASK (0x00002000u)
  9150. #define CSL_CPINTC_ENABLE_REG4_ENABLE_141_SHIFT (0x0000000Du)
  9151. #define CSL_CPINTC_ENABLE_REG4_ENABLE_141_RESETVAL (0x00000000u)
  9152. #define CSL_CPINTC_ENABLE_REG4_ENABLE_142_MASK (0x00004000u)
  9153. #define CSL_CPINTC_ENABLE_REG4_ENABLE_142_SHIFT (0x0000000Eu)
  9154. #define CSL_CPINTC_ENABLE_REG4_ENABLE_142_RESETVAL (0x00000000u)
  9155. #define CSL_CPINTC_ENABLE_REG4_ENABLE_143_MASK (0x00008000u)
  9156. #define CSL_CPINTC_ENABLE_REG4_ENABLE_143_SHIFT (0x0000000Fu)
  9157. #define CSL_CPINTC_ENABLE_REG4_ENABLE_143_RESETVAL (0x00000000u)
  9158. #define CSL_CPINTC_ENABLE_REG4_ENABLE_144_MASK (0x00010000u)
  9159. #define CSL_CPINTC_ENABLE_REG4_ENABLE_144_SHIFT (0x00000010u)
  9160. #define CSL_CPINTC_ENABLE_REG4_ENABLE_144_RESETVAL (0x00000000u)
  9161. #define CSL_CPINTC_ENABLE_REG4_ENABLE_145_MASK (0x00020000u)
  9162. #define CSL_CPINTC_ENABLE_REG4_ENABLE_145_SHIFT (0x00000011u)
  9163. #define CSL_CPINTC_ENABLE_REG4_ENABLE_145_RESETVAL (0x00000000u)
  9164. #define CSL_CPINTC_ENABLE_REG4_ENABLE_146_MASK (0x00040000u)
  9165. #define CSL_CPINTC_ENABLE_REG4_ENABLE_146_SHIFT (0x00000012u)
  9166. #define CSL_CPINTC_ENABLE_REG4_ENABLE_146_RESETVAL (0x00000000u)
  9167. #define CSL_CPINTC_ENABLE_REG4_ENABLE_147_MASK (0x00080000u)
  9168. #define CSL_CPINTC_ENABLE_REG4_ENABLE_147_SHIFT (0x00000013u)
  9169. #define CSL_CPINTC_ENABLE_REG4_ENABLE_147_RESETVAL (0x00000000u)
  9170. #define CSL_CPINTC_ENABLE_REG4_ENABLE_148_MASK (0x00100000u)
  9171. #define CSL_CPINTC_ENABLE_REG4_ENABLE_148_SHIFT (0x00000014u)
  9172. #define CSL_CPINTC_ENABLE_REG4_ENABLE_148_RESETVAL (0x00000000u)
  9173. #define CSL_CPINTC_ENABLE_REG4_ENABLE_149_MASK (0x00200000u)
  9174. #define CSL_CPINTC_ENABLE_REG4_ENABLE_149_SHIFT (0x00000015u)
  9175. #define CSL_CPINTC_ENABLE_REG4_ENABLE_149_RESETVAL (0x00000000u)
  9176. #define CSL_CPINTC_ENABLE_REG4_ENABLE_150_MASK (0x00400000u)
  9177. #define CSL_CPINTC_ENABLE_REG4_ENABLE_150_SHIFT (0x00000016u)
  9178. #define CSL_CPINTC_ENABLE_REG4_ENABLE_150_RESETVAL (0x00000000u)
  9179. #define CSL_CPINTC_ENABLE_REG4_ENABLE_151_MASK (0x00800000u)
  9180. #define CSL_CPINTC_ENABLE_REG4_ENABLE_151_SHIFT (0x00000017u)
  9181. #define CSL_CPINTC_ENABLE_REG4_ENABLE_151_RESETVAL (0x00000000u)
  9182. #define CSL_CPINTC_ENABLE_REG4_ENABLE_152_MASK (0x01000000u)
  9183. #define CSL_CPINTC_ENABLE_REG4_ENABLE_152_SHIFT (0x00000018u)
  9184. #define CSL_CPINTC_ENABLE_REG4_ENABLE_152_RESETVAL (0x00000000u)
  9185. #define CSL_CPINTC_ENABLE_REG4_ENABLE_153_MASK (0x02000000u)
  9186. #define CSL_CPINTC_ENABLE_REG4_ENABLE_153_SHIFT (0x00000019u)
  9187. #define CSL_CPINTC_ENABLE_REG4_ENABLE_153_RESETVAL (0x00000000u)
  9188. #define CSL_CPINTC_ENABLE_REG4_ENABLE_154_MASK (0x04000000u)
  9189. #define CSL_CPINTC_ENABLE_REG4_ENABLE_154_SHIFT (0x0000001Au)
  9190. #define CSL_CPINTC_ENABLE_REG4_ENABLE_154_RESETVAL (0x00000000u)
  9191. #define CSL_CPINTC_ENABLE_REG4_ENABLE_155_MASK (0x08000000u)
  9192. #define CSL_CPINTC_ENABLE_REG4_ENABLE_155_SHIFT (0x0000001Bu)
  9193. #define CSL_CPINTC_ENABLE_REG4_ENABLE_155_RESETVAL (0x00000000u)
  9194. #define CSL_CPINTC_ENABLE_REG4_ENABLE_156_MASK (0x10000000u)
  9195. #define CSL_CPINTC_ENABLE_REG4_ENABLE_156_SHIFT (0x0000001Cu)
  9196. #define CSL_CPINTC_ENABLE_REG4_ENABLE_156_RESETVAL (0x00000000u)
  9197. #define CSL_CPINTC_ENABLE_REG4_ENABLE_157_MASK (0x20000000u)
  9198. #define CSL_CPINTC_ENABLE_REG4_ENABLE_157_SHIFT (0x0000001Du)
  9199. #define CSL_CPINTC_ENABLE_REG4_ENABLE_157_RESETVAL (0x00000000u)
  9200. #define CSL_CPINTC_ENABLE_REG4_ENABLE_158_MASK (0x40000000u)
  9201. #define CSL_CPINTC_ENABLE_REG4_ENABLE_158_SHIFT (0x0000001Eu)
  9202. #define CSL_CPINTC_ENABLE_REG4_ENABLE_158_RESETVAL (0x00000000u)
  9203. #define CSL_CPINTC_ENABLE_REG4_ENABLE_159_MASK (0x80000000u)
  9204. #define CSL_CPINTC_ENABLE_REG4_ENABLE_159_SHIFT (0x0000001Fu)
  9205. #define CSL_CPINTC_ENABLE_REG4_ENABLE_159_RESETVAL (0x00000000u)
  9206. #define CSL_CPINTC_ENABLE_REG4_RESETVAL (0x00000000u)
  9207. /* enable_reg5 */
  9208. #define CSL_CPINTC_ENABLE_REG5_ENABLE_160_MASK (0x00000001u)
  9209. #define CSL_CPINTC_ENABLE_REG5_ENABLE_160_SHIFT (0x00000000u)
  9210. #define CSL_CPINTC_ENABLE_REG5_ENABLE_160_RESETVAL (0x00000000u)
  9211. #define CSL_CPINTC_ENABLE_REG5_ENABLE_161_MASK (0x00000002u)
  9212. #define CSL_CPINTC_ENABLE_REG5_ENABLE_161_SHIFT (0x00000001u)
  9213. #define CSL_CPINTC_ENABLE_REG5_ENABLE_161_RESETVAL (0x00000000u)
  9214. #define CSL_CPINTC_ENABLE_REG5_ENABLE_162_MASK (0x00000004u)
  9215. #define CSL_CPINTC_ENABLE_REG5_ENABLE_162_SHIFT (0x00000002u)
  9216. #define CSL_CPINTC_ENABLE_REG5_ENABLE_162_RESETVAL (0x00000000u)
  9217. #define CSL_CPINTC_ENABLE_REG5_ENABLE_163_MASK (0x00000008u)
  9218. #define CSL_CPINTC_ENABLE_REG5_ENABLE_163_SHIFT (0x00000003u)
  9219. #define CSL_CPINTC_ENABLE_REG5_ENABLE_163_RESETVAL (0x00000000u)
  9220. #define CSL_CPINTC_ENABLE_REG5_ENABLE_164_MASK (0x00000010u)
  9221. #define CSL_CPINTC_ENABLE_REG5_ENABLE_164_SHIFT (0x00000004u)
  9222. #define CSL_CPINTC_ENABLE_REG5_ENABLE_164_RESETVAL (0x00000000u)
  9223. #define CSL_CPINTC_ENABLE_REG5_ENABLE_165_MASK (0x00000020u)
  9224. #define CSL_CPINTC_ENABLE_REG5_ENABLE_165_SHIFT (0x00000005u)
  9225. #define CSL_CPINTC_ENABLE_REG5_ENABLE_165_RESETVAL (0x00000000u)
  9226. #define CSL_CPINTC_ENABLE_REG5_ENABLE_166_MASK (0x00000040u)
  9227. #define CSL_CPINTC_ENABLE_REG5_ENABLE_166_SHIFT (0x00000006u)
  9228. #define CSL_CPINTC_ENABLE_REG5_ENABLE_166_RESETVAL (0x00000000u)
  9229. #define CSL_CPINTC_ENABLE_REG5_ENABLE_167_MASK (0x00000080u)
  9230. #define CSL_CPINTC_ENABLE_REG5_ENABLE_167_SHIFT (0x00000007u)
  9231. #define CSL_CPINTC_ENABLE_REG5_ENABLE_167_RESETVAL (0x00000000u)
  9232. #define CSL_CPINTC_ENABLE_REG5_ENABLE_168_MASK (0x00000100u)
  9233. #define CSL_CPINTC_ENABLE_REG5_ENABLE_168_SHIFT (0x00000008u)
  9234. #define CSL_CPINTC_ENABLE_REG5_ENABLE_168_RESETVAL (0x00000000u)
  9235. #define CSL_CPINTC_ENABLE_REG5_ENABLE_169_MASK (0x00000200u)
  9236. #define CSL_CPINTC_ENABLE_REG5_ENABLE_169_SHIFT (0x00000009u)
  9237. #define CSL_CPINTC_ENABLE_REG5_ENABLE_169_RESETVAL (0x00000000u)
  9238. #define CSL_CPINTC_ENABLE_REG5_ENABLE_170_MASK (0x00000400u)
  9239. #define CSL_CPINTC_ENABLE_REG5_ENABLE_170_SHIFT (0x0000000Au)
  9240. #define CSL_CPINTC_ENABLE_REG5_ENABLE_170_RESETVAL (0x00000000u)
  9241. #define CSL_CPINTC_ENABLE_REG5_ENABLE_171_MASK (0x00000800u)
  9242. #define CSL_CPINTC_ENABLE_REG5_ENABLE_171_SHIFT (0x0000000Bu)
  9243. #define CSL_CPINTC_ENABLE_REG5_ENABLE_171_RESETVAL (0x00000000u)
  9244. #define CSL_CPINTC_ENABLE_REG5_ENABLE_172_MASK (0x00001000u)
  9245. #define CSL_CPINTC_ENABLE_REG5_ENABLE_172_SHIFT (0x0000000Cu)
  9246. #define CSL_CPINTC_ENABLE_REG5_ENABLE_172_RESETVAL (0x00000000u)
  9247. #define CSL_CPINTC_ENABLE_REG5_ENABLE_173_MASK (0x00002000u)
  9248. #define CSL_CPINTC_ENABLE_REG5_ENABLE_173_SHIFT (0x0000000Du)
  9249. #define CSL_CPINTC_ENABLE_REG5_ENABLE_173_RESETVAL (0x00000000u)
  9250. #define CSL_CPINTC_ENABLE_REG5_ENABLE_174_MASK (0x00004000u)
  9251. #define CSL_CPINTC_ENABLE_REG5_ENABLE_174_SHIFT (0x0000000Eu)
  9252. #define CSL_CPINTC_ENABLE_REG5_ENABLE_174_RESETVAL (0x00000000u)
  9253. #define CSL_CPINTC_ENABLE_REG5_ENABLE_175_MASK (0x00008000u)
  9254. #define CSL_CPINTC_ENABLE_REG5_ENABLE_175_SHIFT (0x0000000Fu)
  9255. #define CSL_CPINTC_ENABLE_REG5_ENABLE_175_RESETVAL (0x00000000u)
  9256. #define CSL_CPINTC_ENABLE_REG5_ENABLE_176_MASK (0x00010000u)
  9257. #define CSL_CPINTC_ENABLE_REG5_ENABLE_176_SHIFT (0x00000010u)
  9258. #define CSL_CPINTC_ENABLE_REG5_ENABLE_176_RESETVAL (0x00000000u)
  9259. #define CSL_CPINTC_ENABLE_REG5_ENABLE_177_MASK (0x00020000u)
  9260. #define CSL_CPINTC_ENABLE_REG5_ENABLE_177_SHIFT (0x00000011u)
  9261. #define CSL_CPINTC_ENABLE_REG5_ENABLE_177_RESETVAL (0x00000000u)
  9262. #define CSL_CPINTC_ENABLE_REG5_ENABLE_178_MASK (0x00040000u)
  9263. #define CSL_CPINTC_ENABLE_REG5_ENABLE_178_SHIFT (0x00000012u)
  9264. #define CSL_CPINTC_ENABLE_REG5_ENABLE_178_RESETVAL (0x00000000u)
  9265. #define CSL_CPINTC_ENABLE_REG5_ENABLE_179_MASK (0x00080000u)
  9266. #define CSL_CPINTC_ENABLE_REG5_ENABLE_179_SHIFT (0x00000013u)
  9267. #define CSL_CPINTC_ENABLE_REG5_ENABLE_179_RESETVAL (0x00000000u)
  9268. #define CSL_CPINTC_ENABLE_REG5_ENABLE_180_MASK (0x00100000u)
  9269. #define CSL_CPINTC_ENABLE_REG5_ENABLE_180_SHIFT (0x00000014u)
  9270. #define CSL_CPINTC_ENABLE_REG5_ENABLE_180_RESETVAL (0x00000000u)
  9271. #define CSL_CPINTC_ENABLE_REG5_ENABLE_181_MASK (0x00200000u)
  9272. #define CSL_CPINTC_ENABLE_REG5_ENABLE_181_SHIFT (0x00000015u)
  9273. #define CSL_CPINTC_ENABLE_REG5_ENABLE_181_RESETVAL (0x00000000u)
  9274. #define CSL_CPINTC_ENABLE_REG5_ENABLE_182_MASK (0x00400000u)
  9275. #define CSL_CPINTC_ENABLE_REG5_ENABLE_182_SHIFT (0x00000016u)
  9276. #define CSL_CPINTC_ENABLE_REG5_ENABLE_182_RESETVAL (0x00000000u)
  9277. #define CSL_CPINTC_ENABLE_REG5_ENABLE_183_MASK (0x00800000u)
  9278. #define CSL_CPINTC_ENABLE_REG5_ENABLE_183_SHIFT (0x00000017u)
  9279. #define CSL_CPINTC_ENABLE_REG5_ENABLE_183_RESETVAL (0x00000000u)
  9280. #define CSL_CPINTC_ENABLE_REG5_ENABLE_184_MASK (0x01000000u)
  9281. #define CSL_CPINTC_ENABLE_REG5_ENABLE_184_SHIFT (0x00000018u)
  9282. #define CSL_CPINTC_ENABLE_REG5_ENABLE_184_RESETVAL (0x00000000u)
  9283. #define CSL_CPINTC_ENABLE_REG5_ENABLE_185_MASK (0x02000000u)
  9284. #define CSL_CPINTC_ENABLE_REG5_ENABLE_185_SHIFT (0x00000019u)
  9285. #define CSL_CPINTC_ENABLE_REG5_ENABLE_185_RESETVAL (0x00000000u)
  9286. #define CSL_CPINTC_ENABLE_REG5_ENABLE_186_MASK (0x04000000u)
  9287. #define CSL_CPINTC_ENABLE_REG5_ENABLE_186_SHIFT (0x0000001Au)
  9288. #define CSL_CPINTC_ENABLE_REG5_ENABLE_186_RESETVAL (0x00000000u)
  9289. #define CSL_CPINTC_ENABLE_REG5_ENABLE_187_MASK (0x08000000u)
  9290. #define CSL_CPINTC_ENABLE_REG5_ENABLE_187_SHIFT (0x0000001Bu)
  9291. #define CSL_CPINTC_ENABLE_REG5_ENABLE_187_RESETVAL (0x00000000u)
  9292. #define CSL_CPINTC_ENABLE_REG5_ENABLE_188_MASK (0x10000000u)
  9293. #define CSL_CPINTC_ENABLE_REG5_ENABLE_188_SHIFT (0x0000001Cu)
  9294. #define CSL_CPINTC_ENABLE_REG5_ENABLE_188_RESETVAL (0x00000000u)
  9295. #define CSL_CPINTC_ENABLE_REG5_ENABLE_189_MASK (0x20000000u)
  9296. #define CSL_CPINTC_ENABLE_REG5_ENABLE_189_SHIFT (0x0000001Du)
  9297. #define CSL_CPINTC_ENABLE_REG5_ENABLE_189_RESETVAL (0x00000000u)
  9298. #define CSL_CPINTC_ENABLE_REG5_ENABLE_190_MASK (0x40000000u)
  9299. #define CSL_CPINTC_ENABLE_REG5_ENABLE_190_SHIFT (0x0000001Eu)
  9300. #define CSL_CPINTC_ENABLE_REG5_ENABLE_190_RESETVAL (0x00000000u)
  9301. #define CSL_CPINTC_ENABLE_REG5_ENABLE_191_MASK (0x80000000u)
  9302. #define CSL_CPINTC_ENABLE_REG5_ENABLE_191_SHIFT (0x0000001Fu)
  9303. #define CSL_CPINTC_ENABLE_REG5_ENABLE_191_RESETVAL (0x00000000u)
  9304. #define CSL_CPINTC_ENABLE_REG5_RESETVAL (0x00000000u)
  9305. /* enable_reg6 */
  9306. #define CSL_CPINTC_ENABLE_REG6_ENABLE_192_MASK (0x00000001u)
  9307. #define CSL_CPINTC_ENABLE_REG6_ENABLE_192_SHIFT (0x00000000u)
  9308. #define CSL_CPINTC_ENABLE_REG6_ENABLE_192_RESETVAL (0x00000000u)
  9309. #define CSL_CPINTC_ENABLE_REG6_ENABLE_193_MASK (0x00000002u)
  9310. #define CSL_CPINTC_ENABLE_REG6_ENABLE_193_SHIFT (0x00000001u)
  9311. #define CSL_CPINTC_ENABLE_REG6_ENABLE_193_RESETVAL (0x00000000u)
  9312. #define CSL_CPINTC_ENABLE_REG6_ENABLE_194_MASK (0x00000004u)
  9313. #define CSL_CPINTC_ENABLE_REG6_ENABLE_194_SHIFT (0x00000002u)
  9314. #define CSL_CPINTC_ENABLE_REG6_ENABLE_194_RESETVAL (0x00000000u)
  9315. #define CSL_CPINTC_ENABLE_REG6_ENABLE_195_MASK (0x00000008u)
  9316. #define CSL_CPINTC_ENABLE_REG6_ENABLE_195_SHIFT (0x00000003u)
  9317. #define CSL_CPINTC_ENABLE_REG6_ENABLE_195_RESETVAL (0x00000000u)
  9318. #define CSL_CPINTC_ENABLE_REG6_ENABLE_196_MASK (0x00000010u)
  9319. #define CSL_CPINTC_ENABLE_REG6_ENABLE_196_SHIFT (0x00000004u)
  9320. #define CSL_CPINTC_ENABLE_REG6_ENABLE_196_RESETVAL (0x00000000u)
  9321. #define CSL_CPINTC_ENABLE_REG6_ENABLE_197_MASK (0x00000020u)
  9322. #define CSL_CPINTC_ENABLE_REG6_ENABLE_197_SHIFT (0x00000005u)
  9323. #define CSL_CPINTC_ENABLE_REG6_ENABLE_197_RESETVAL (0x00000000u)
  9324. #define CSL_CPINTC_ENABLE_REG6_ENABLE_198_MASK (0x00000040u)
  9325. #define CSL_CPINTC_ENABLE_REG6_ENABLE_198_SHIFT (0x00000006u)
  9326. #define CSL_CPINTC_ENABLE_REG6_ENABLE_198_RESETVAL (0x00000000u)
  9327. #define CSL_CPINTC_ENABLE_REG6_ENABLE_199_MASK (0x00000080u)
  9328. #define CSL_CPINTC_ENABLE_REG6_ENABLE_199_SHIFT (0x00000007u)
  9329. #define CSL_CPINTC_ENABLE_REG6_ENABLE_199_RESETVAL (0x00000000u)
  9330. #define CSL_CPINTC_ENABLE_REG6_ENABLE_200_MASK (0x00000100u)
  9331. #define CSL_CPINTC_ENABLE_REG6_ENABLE_200_SHIFT (0x00000008u)
  9332. #define CSL_CPINTC_ENABLE_REG6_ENABLE_200_RESETVAL (0x00000000u)
  9333. #define CSL_CPINTC_ENABLE_REG6_ENABLE_201_MASK (0x00000200u)
  9334. #define CSL_CPINTC_ENABLE_REG6_ENABLE_201_SHIFT (0x00000009u)
  9335. #define CSL_CPINTC_ENABLE_REG6_ENABLE_201_RESETVAL (0x00000000u)
  9336. #define CSL_CPINTC_ENABLE_REG6_ENABLE_202_MASK (0x00000400u)
  9337. #define CSL_CPINTC_ENABLE_REG6_ENABLE_202_SHIFT (0x0000000Au)
  9338. #define CSL_CPINTC_ENABLE_REG6_ENABLE_202_RESETVAL (0x00000000u)
  9339. #define CSL_CPINTC_ENABLE_REG6_ENABLE_203_MASK (0x00000800u)
  9340. #define CSL_CPINTC_ENABLE_REG6_ENABLE_203_SHIFT (0x0000000Bu)
  9341. #define CSL_CPINTC_ENABLE_REG6_ENABLE_203_RESETVAL (0x00000000u)
  9342. #define CSL_CPINTC_ENABLE_REG6_ENABLE_204_MASK (0x00001000u)
  9343. #define CSL_CPINTC_ENABLE_REG6_ENABLE_204_SHIFT (0x0000000Cu)
  9344. #define CSL_CPINTC_ENABLE_REG6_ENABLE_204_RESETVAL (0x00000000u)
  9345. #define CSL_CPINTC_ENABLE_REG6_ENABLE_205_MASK (0x00002000u)
  9346. #define CSL_CPINTC_ENABLE_REG6_ENABLE_205_SHIFT (0x0000000Du)
  9347. #define CSL_CPINTC_ENABLE_REG6_ENABLE_205_RESETVAL (0x00000000u)
  9348. #define CSL_CPINTC_ENABLE_REG6_ENABLE_206_MASK (0x00004000u)
  9349. #define CSL_CPINTC_ENABLE_REG6_ENABLE_206_SHIFT (0x0000000Eu)
  9350. #define CSL_CPINTC_ENABLE_REG6_ENABLE_206_RESETVAL (0x00000000u)
  9351. #define CSL_CPINTC_ENABLE_REG6_ENABLE_207_MASK (0x00008000u)
  9352. #define CSL_CPINTC_ENABLE_REG6_ENABLE_207_SHIFT (0x0000000Fu)
  9353. #define CSL_CPINTC_ENABLE_REG6_ENABLE_207_RESETVAL (0x00000000u)
  9354. #define CSL_CPINTC_ENABLE_REG6_ENABLE_208_MASK (0x00010000u)
  9355. #define CSL_CPINTC_ENABLE_REG6_ENABLE_208_SHIFT (0x00000010u)
  9356. #define CSL_CPINTC_ENABLE_REG6_ENABLE_208_RESETVAL (0x00000000u)
  9357. #define CSL_CPINTC_ENABLE_REG6_ENABLE_209_MASK (0x00020000u)
  9358. #define CSL_CPINTC_ENABLE_REG6_ENABLE_209_SHIFT (0x00000011u)
  9359. #define CSL_CPINTC_ENABLE_REG6_ENABLE_209_RESETVAL (0x00000000u)
  9360. #define CSL_CPINTC_ENABLE_REG6_ENABLE_210_MASK (0x00040000u)
  9361. #define CSL_CPINTC_ENABLE_REG6_ENABLE_210_SHIFT (0x00000012u)
  9362. #define CSL_CPINTC_ENABLE_REG6_ENABLE_210_RESETVAL (0x00000000u)
  9363. #define CSL_CPINTC_ENABLE_REG6_ENABLE_211_MASK (0x00080000u)
  9364. #define CSL_CPINTC_ENABLE_REG6_ENABLE_211_SHIFT (0x00000013u)
  9365. #define CSL_CPINTC_ENABLE_REG6_ENABLE_211_RESETVAL (0x00000000u)
  9366. #define CSL_CPINTC_ENABLE_REG6_ENABLE_212_MASK (0x00100000u)
  9367. #define CSL_CPINTC_ENABLE_REG6_ENABLE_212_SHIFT (0x00000014u)
  9368. #define CSL_CPINTC_ENABLE_REG6_ENABLE_212_RESETVAL (0x00000000u)
  9369. #define CSL_CPINTC_ENABLE_REG6_ENABLE_213_MASK (0x00200000u)
  9370. #define CSL_CPINTC_ENABLE_REG6_ENABLE_213_SHIFT (0x00000015u)
  9371. #define CSL_CPINTC_ENABLE_REG6_ENABLE_213_RESETVAL (0x00000000u)
  9372. #define CSL_CPINTC_ENABLE_REG6_ENABLE_214_MASK (0x00400000u)
  9373. #define CSL_CPINTC_ENABLE_REG6_ENABLE_214_SHIFT (0x00000016u)
  9374. #define CSL_CPINTC_ENABLE_REG6_ENABLE_214_RESETVAL (0x00000000u)
  9375. #define CSL_CPINTC_ENABLE_REG6_ENABLE_215_MASK (0x00800000u)
  9376. #define CSL_CPINTC_ENABLE_REG6_ENABLE_215_SHIFT (0x00000017u)
  9377. #define CSL_CPINTC_ENABLE_REG6_ENABLE_215_RESETVAL (0x00000000u)
  9378. #define CSL_CPINTC_ENABLE_REG6_ENABLE_216_MASK (0x01000000u)
  9379. #define CSL_CPINTC_ENABLE_REG6_ENABLE_216_SHIFT (0x00000018u)
  9380. #define CSL_CPINTC_ENABLE_REG6_ENABLE_216_RESETVAL (0x00000000u)
  9381. #define CSL_CPINTC_ENABLE_REG6_ENABLE_217_MASK (0x02000000u)
  9382. #define CSL_CPINTC_ENABLE_REG6_ENABLE_217_SHIFT (0x00000019u)
  9383. #define CSL_CPINTC_ENABLE_REG6_ENABLE_217_RESETVAL (0x00000000u)
  9384. #define CSL_CPINTC_ENABLE_REG6_ENABLE_218_MASK (0x04000000u)
  9385. #define CSL_CPINTC_ENABLE_REG6_ENABLE_218_SHIFT (0x0000001Au)
  9386. #define CSL_CPINTC_ENABLE_REG6_ENABLE_218_RESETVAL (0x00000000u)
  9387. #define CSL_CPINTC_ENABLE_REG6_ENABLE_219_MASK (0x08000000u)
  9388. #define CSL_CPINTC_ENABLE_REG6_ENABLE_219_SHIFT (0x0000001Bu)
  9389. #define CSL_CPINTC_ENABLE_REG6_ENABLE_219_RESETVAL (0x00000000u)
  9390. #define CSL_CPINTC_ENABLE_REG6_ENABLE_220_MASK (0x10000000u)
  9391. #define CSL_CPINTC_ENABLE_REG6_ENABLE_220_SHIFT (0x0000001Cu)
  9392. #define CSL_CPINTC_ENABLE_REG6_ENABLE_220_RESETVAL (0x00000000u)
  9393. #define CSL_CPINTC_ENABLE_REG6_ENABLE_221_MASK (0x20000000u)
  9394. #define CSL_CPINTC_ENABLE_REG6_ENABLE_221_SHIFT (0x0000001Du)
  9395. #define CSL_CPINTC_ENABLE_REG6_ENABLE_221_RESETVAL (0x00000000u)
  9396. #define CSL_CPINTC_ENABLE_REG6_ENABLE_222_MASK (0x40000000u)
  9397. #define CSL_CPINTC_ENABLE_REG6_ENABLE_222_SHIFT (0x0000001Eu)
  9398. #define CSL_CPINTC_ENABLE_REG6_ENABLE_222_RESETVAL (0x00000000u)
  9399. #define CSL_CPINTC_ENABLE_REG6_ENABLE_223_MASK (0x80000000u)
  9400. #define CSL_CPINTC_ENABLE_REG6_ENABLE_223_SHIFT (0x0000001Fu)
  9401. #define CSL_CPINTC_ENABLE_REG6_ENABLE_223_RESETVAL (0x00000000u)
  9402. #define CSL_CPINTC_ENABLE_REG6_RESETVAL (0x00000000u)
  9403. /* enable_reg7 */
  9404. #define CSL_CPINTC_ENABLE_REG7_ENABLE_224_MASK (0x00000001u)
  9405. #define CSL_CPINTC_ENABLE_REG7_ENABLE_224_SHIFT (0x00000000u)
  9406. #define CSL_CPINTC_ENABLE_REG7_ENABLE_224_RESETVAL (0x00000000u)
  9407. #define CSL_CPINTC_ENABLE_REG7_ENABLE_225_MASK (0x00000002u)
  9408. #define CSL_CPINTC_ENABLE_REG7_ENABLE_225_SHIFT (0x00000001u)
  9409. #define CSL_CPINTC_ENABLE_REG7_ENABLE_225_RESETVAL (0x00000000u)
  9410. #define CSL_CPINTC_ENABLE_REG7_ENABLE_226_MASK (0x00000004u)
  9411. #define CSL_CPINTC_ENABLE_REG7_ENABLE_226_SHIFT (0x00000002u)
  9412. #define CSL_CPINTC_ENABLE_REG7_ENABLE_226_RESETVAL (0x00000000u)
  9413. #define CSL_CPINTC_ENABLE_REG7_ENABLE_227_MASK (0x00000008u)
  9414. #define CSL_CPINTC_ENABLE_REG7_ENABLE_227_SHIFT (0x00000003u)
  9415. #define CSL_CPINTC_ENABLE_REG7_ENABLE_227_RESETVAL (0x00000000u)
  9416. #define CSL_CPINTC_ENABLE_REG7_ENABLE_228_MASK (0x00000010u)
  9417. #define CSL_CPINTC_ENABLE_REG7_ENABLE_228_SHIFT (0x00000004u)
  9418. #define CSL_CPINTC_ENABLE_REG7_ENABLE_228_RESETVAL (0x00000000u)
  9419. #define CSL_CPINTC_ENABLE_REG7_ENABLE_229_MASK (0x00000020u)
  9420. #define CSL_CPINTC_ENABLE_REG7_ENABLE_229_SHIFT (0x00000005u)
  9421. #define CSL_CPINTC_ENABLE_REG7_ENABLE_229_RESETVAL (0x00000000u)
  9422. #define CSL_CPINTC_ENABLE_REG7_ENABLE_230_MASK (0x00000040u)
  9423. #define CSL_CPINTC_ENABLE_REG7_ENABLE_230_SHIFT (0x00000006u)
  9424. #define CSL_CPINTC_ENABLE_REG7_ENABLE_230_RESETVAL (0x00000000u)
  9425. #define CSL_CPINTC_ENABLE_REG7_ENABLE_231_MASK (0x00000080u)
  9426. #define CSL_CPINTC_ENABLE_REG7_ENABLE_231_SHIFT (0x00000007u)
  9427. #define CSL_CPINTC_ENABLE_REG7_ENABLE_231_RESETVAL (0x00000000u)
  9428. #define CSL_CPINTC_ENABLE_REG7_ENABLE_232_MASK (0x00000100u)
  9429. #define CSL_CPINTC_ENABLE_REG7_ENABLE_232_SHIFT (0x00000008u)
  9430. #define CSL_CPINTC_ENABLE_REG7_ENABLE_232_RESETVAL (0x00000000u)
  9431. #define CSL_CPINTC_ENABLE_REG7_ENABLE_233_MASK (0x00000200u)
  9432. #define CSL_CPINTC_ENABLE_REG7_ENABLE_233_SHIFT (0x00000009u)
  9433. #define CSL_CPINTC_ENABLE_REG7_ENABLE_233_RESETVAL (0x00000000u)
  9434. #define CSL_CPINTC_ENABLE_REG7_ENABLE_234_MASK (0x00000400u)
  9435. #define CSL_CPINTC_ENABLE_REG7_ENABLE_234_SHIFT (0x0000000Au)
  9436. #define CSL_CPINTC_ENABLE_REG7_ENABLE_234_RESETVAL (0x00000000u)
  9437. #define CSL_CPINTC_ENABLE_REG7_ENABLE_235_MASK (0x00000800u)
  9438. #define CSL_CPINTC_ENABLE_REG7_ENABLE_235_SHIFT (0x0000000Bu)
  9439. #define CSL_CPINTC_ENABLE_REG7_ENABLE_235_RESETVAL (0x00000000u)
  9440. #define CSL_CPINTC_ENABLE_REG7_ENABLE_236_MASK (0x00001000u)
  9441. #define CSL_CPINTC_ENABLE_REG7_ENABLE_236_SHIFT (0x0000000Cu)
  9442. #define CSL_CPINTC_ENABLE_REG7_ENABLE_236_RESETVAL (0x00000000u)
  9443. #define CSL_CPINTC_ENABLE_REG7_ENABLE_237_MASK (0x00002000u)
  9444. #define CSL_CPINTC_ENABLE_REG7_ENABLE_237_SHIFT (0x0000000Du)
  9445. #define CSL_CPINTC_ENABLE_REG7_ENABLE_237_RESETVAL (0x00000000u)
  9446. #define CSL_CPINTC_ENABLE_REG7_ENABLE_238_MASK (0x00004000u)
  9447. #define CSL_CPINTC_ENABLE_REG7_ENABLE_238_SHIFT (0x0000000Eu)
  9448. #define CSL_CPINTC_ENABLE_REG7_ENABLE_238_RESETVAL (0x00000000u)
  9449. #define CSL_CPINTC_ENABLE_REG7_ENABLE_239_MASK (0x00008000u)
  9450. #define CSL_CPINTC_ENABLE_REG7_ENABLE_239_SHIFT (0x0000000Fu)
  9451. #define CSL_CPINTC_ENABLE_REG7_ENABLE_239_RESETVAL (0x00000000u)
  9452. #define CSL_CPINTC_ENABLE_REG7_ENABLE_240_MASK (0x00010000u)
  9453. #define CSL_CPINTC_ENABLE_REG7_ENABLE_240_SHIFT (0x00000010u)
  9454. #define CSL_CPINTC_ENABLE_REG7_ENABLE_240_RESETVAL (0x00000000u)
  9455. #define CSL_CPINTC_ENABLE_REG7_ENABLE_241_MASK (0x00020000u)
  9456. #define CSL_CPINTC_ENABLE_REG7_ENABLE_241_SHIFT (0x00000011u)
  9457. #define CSL_CPINTC_ENABLE_REG7_ENABLE_241_RESETVAL (0x00000000u)
  9458. #define CSL_CPINTC_ENABLE_REG7_ENABLE_242_MASK (0x00040000u)
  9459. #define CSL_CPINTC_ENABLE_REG7_ENABLE_242_SHIFT (0x00000012u)
  9460. #define CSL_CPINTC_ENABLE_REG7_ENABLE_242_RESETVAL (0x00000000u)
  9461. #define CSL_CPINTC_ENABLE_REG7_ENABLE_243_MASK (0x00080000u)
  9462. #define CSL_CPINTC_ENABLE_REG7_ENABLE_243_SHIFT (0x00000013u)
  9463. #define CSL_CPINTC_ENABLE_REG7_ENABLE_243_RESETVAL (0x00000000u)
  9464. #define CSL_CPINTC_ENABLE_REG7_ENABLE_244_MASK (0x00100000u)
  9465. #define CSL_CPINTC_ENABLE_REG7_ENABLE_244_SHIFT (0x00000014u)
  9466. #define CSL_CPINTC_ENABLE_REG7_ENABLE_244_RESETVAL (0x00000000u)
  9467. #define CSL_CPINTC_ENABLE_REG7_ENABLE_245_MASK (0x00200000u)
  9468. #define CSL_CPINTC_ENABLE_REG7_ENABLE_245_SHIFT (0x00000015u)
  9469. #define CSL_CPINTC_ENABLE_REG7_ENABLE_245_RESETVAL (0x00000000u)
  9470. #define CSL_CPINTC_ENABLE_REG7_ENABLE_246_MASK (0x00400000u)
  9471. #define CSL_CPINTC_ENABLE_REG7_ENABLE_246_SHIFT (0x00000016u)
  9472. #define CSL_CPINTC_ENABLE_REG7_ENABLE_246_RESETVAL (0x00000000u)
  9473. #define CSL_CPINTC_ENABLE_REG7_ENABLE_247_MASK (0x00800000u)
  9474. #define CSL_CPINTC_ENABLE_REG7_ENABLE_247_SHIFT (0x00000017u)
  9475. #define CSL_CPINTC_ENABLE_REG7_ENABLE_247_RESETVAL (0x00000000u)
  9476. #define CSL_CPINTC_ENABLE_REG7_ENABLE_248_MASK (0x01000000u)
  9477. #define CSL_CPINTC_ENABLE_REG7_ENABLE_248_SHIFT (0x00000018u)
  9478. #define CSL_CPINTC_ENABLE_REG7_ENABLE_248_RESETVAL (0x00000000u)
  9479. #define CSL_CPINTC_ENABLE_REG7_ENABLE_249_MASK (0x02000000u)
  9480. #define CSL_CPINTC_ENABLE_REG7_ENABLE_249_SHIFT (0x00000019u)
  9481. #define CSL_CPINTC_ENABLE_REG7_ENABLE_249_RESETVAL (0x00000000u)
  9482. #define CSL_CPINTC_ENABLE_REG7_ENABLE_250_MASK (0x04000000u)
  9483. #define CSL_CPINTC_ENABLE_REG7_ENABLE_250_SHIFT (0x0000001Au)
  9484. #define CSL_CPINTC_ENABLE_REG7_ENABLE_250_RESETVAL (0x00000000u)
  9485. #define CSL_CPINTC_ENABLE_REG7_ENABLE_251_MASK (0x08000000u)
  9486. #define CSL_CPINTC_ENABLE_REG7_ENABLE_251_SHIFT (0x0000001Bu)
  9487. #define CSL_CPINTC_ENABLE_REG7_ENABLE_251_RESETVAL (0x00000000u)
  9488. #define CSL_CPINTC_ENABLE_REG7_ENABLE_252_MASK (0x10000000u)
  9489. #define CSL_CPINTC_ENABLE_REG7_ENABLE_252_SHIFT (0x0000001Cu)
  9490. #define CSL_CPINTC_ENABLE_REG7_ENABLE_252_RESETVAL (0x00000000u)
  9491. #define CSL_CPINTC_ENABLE_REG7_ENABLE_253_MASK (0x20000000u)
  9492. #define CSL_CPINTC_ENABLE_REG7_ENABLE_253_SHIFT (0x0000001Du)
  9493. #define CSL_CPINTC_ENABLE_REG7_ENABLE_253_RESETVAL (0x00000000u)
  9494. #define CSL_CPINTC_ENABLE_REG7_ENABLE_254_MASK (0x40000000u)
  9495. #define CSL_CPINTC_ENABLE_REG7_ENABLE_254_SHIFT (0x0000001Eu)
  9496. #define CSL_CPINTC_ENABLE_REG7_ENABLE_254_RESETVAL (0x00000000u)
  9497. #define CSL_CPINTC_ENABLE_REG7_ENABLE_255_MASK (0x80000000u)
  9498. #define CSL_CPINTC_ENABLE_REG7_ENABLE_255_SHIFT (0x0000001Fu)
  9499. #define CSL_CPINTC_ENABLE_REG7_ENABLE_255_RESETVAL (0x00000000u)
  9500. #define CSL_CPINTC_ENABLE_REG7_RESETVAL (0x00000000u)
  9501. /* enable_reg8 */
  9502. #define CSL_CPINTC_ENABLE_REG8_ENABLE_256_MASK (0x00000001u)
  9503. #define CSL_CPINTC_ENABLE_REG8_ENABLE_256_SHIFT (0x00000000u)
  9504. #define CSL_CPINTC_ENABLE_REG8_ENABLE_256_RESETVAL (0x00000000u)
  9505. #define CSL_CPINTC_ENABLE_REG8_ENABLE_257_MASK (0x00000002u)
  9506. #define CSL_CPINTC_ENABLE_REG8_ENABLE_257_SHIFT (0x00000001u)
  9507. #define CSL_CPINTC_ENABLE_REG8_ENABLE_257_RESETVAL (0x00000000u)
  9508. #define CSL_CPINTC_ENABLE_REG8_ENABLE_258_MASK (0x00000004u)
  9509. #define CSL_CPINTC_ENABLE_REG8_ENABLE_258_SHIFT (0x00000002u)
  9510. #define CSL_CPINTC_ENABLE_REG8_ENABLE_258_RESETVAL (0x00000000u)
  9511. #define CSL_CPINTC_ENABLE_REG8_ENABLE_259_MASK (0x00000008u)
  9512. #define CSL_CPINTC_ENABLE_REG8_ENABLE_259_SHIFT (0x00000003u)
  9513. #define CSL_CPINTC_ENABLE_REG8_ENABLE_259_RESETVAL (0x00000000u)
  9514. #define CSL_CPINTC_ENABLE_REG8_ENABLE_260_MASK (0x00000010u)
  9515. #define CSL_CPINTC_ENABLE_REG8_ENABLE_260_SHIFT (0x00000004u)
  9516. #define CSL_CPINTC_ENABLE_REG8_ENABLE_260_RESETVAL (0x00000000u)
  9517. #define CSL_CPINTC_ENABLE_REG8_ENABLE_261_MASK (0x00000020u)
  9518. #define CSL_CPINTC_ENABLE_REG8_ENABLE_261_SHIFT (0x00000005u)
  9519. #define CSL_CPINTC_ENABLE_REG8_ENABLE_261_RESETVAL (0x00000000u)
  9520. #define CSL_CPINTC_ENABLE_REG8_ENABLE_262_MASK (0x00000040u)
  9521. #define CSL_CPINTC_ENABLE_REG8_ENABLE_262_SHIFT (0x00000006u)
  9522. #define CSL_CPINTC_ENABLE_REG8_ENABLE_262_RESETVAL (0x00000000u)
  9523. #define CSL_CPINTC_ENABLE_REG8_ENABLE_263_MASK (0x00000080u)
  9524. #define CSL_CPINTC_ENABLE_REG8_ENABLE_263_SHIFT (0x00000007u)
  9525. #define CSL_CPINTC_ENABLE_REG8_ENABLE_263_RESETVAL (0x00000000u)
  9526. #define CSL_CPINTC_ENABLE_REG8_ENABLE_264_MASK (0x00000100u)
  9527. #define CSL_CPINTC_ENABLE_REG8_ENABLE_264_SHIFT (0x00000008u)
  9528. #define CSL_CPINTC_ENABLE_REG8_ENABLE_264_RESETVAL (0x00000000u)
  9529. #define CSL_CPINTC_ENABLE_REG8_ENABLE_265_MASK (0x00000200u)
  9530. #define CSL_CPINTC_ENABLE_REG8_ENABLE_265_SHIFT (0x00000009u)
  9531. #define CSL_CPINTC_ENABLE_REG8_ENABLE_265_RESETVAL (0x00000000u)
  9532. #define CSL_CPINTC_ENABLE_REG8_ENABLE_266_MASK (0x00000400u)
  9533. #define CSL_CPINTC_ENABLE_REG8_ENABLE_266_SHIFT (0x0000000Au)
  9534. #define CSL_CPINTC_ENABLE_REG8_ENABLE_266_RESETVAL (0x00000000u)
  9535. #define CSL_CPINTC_ENABLE_REG8_ENABLE_267_MASK (0x00000800u)
  9536. #define CSL_CPINTC_ENABLE_REG8_ENABLE_267_SHIFT (0x0000000Bu)
  9537. #define CSL_CPINTC_ENABLE_REG8_ENABLE_267_RESETVAL (0x00000000u)
  9538. #define CSL_CPINTC_ENABLE_REG8_ENABLE_268_MASK (0x00001000u)
  9539. #define CSL_CPINTC_ENABLE_REG8_ENABLE_268_SHIFT (0x0000000Cu)
  9540. #define CSL_CPINTC_ENABLE_REG8_ENABLE_268_RESETVAL (0x00000000u)
  9541. #define CSL_CPINTC_ENABLE_REG8_ENABLE_269_MASK (0x00002000u)
  9542. #define CSL_CPINTC_ENABLE_REG8_ENABLE_269_SHIFT (0x0000000Du)
  9543. #define CSL_CPINTC_ENABLE_REG8_ENABLE_269_RESETVAL (0x00000000u)
  9544. #define CSL_CPINTC_ENABLE_REG8_ENABLE_270_MASK (0x00004000u)
  9545. #define CSL_CPINTC_ENABLE_REG8_ENABLE_270_SHIFT (0x0000000Eu)
  9546. #define CSL_CPINTC_ENABLE_REG8_ENABLE_270_RESETVAL (0x00000000u)
  9547. #define CSL_CPINTC_ENABLE_REG8_ENABLE_271_MASK (0x00008000u)
  9548. #define CSL_CPINTC_ENABLE_REG8_ENABLE_271_SHIFT (0x0000000Fu)
  9549. #define CSL_CPINTC_ENABLE_REG8_ENABLE_271_RESETVAL (0x00000000u)
  9550. #define CSL_CPINTC_ENABLE_REG8_ENABLE_272_MASK (0x00010000u)
  9551. #define CSL_CPINTC_ENABLE_REG8_ENABLE_272_SHIFT (0x00000010u)
  9552. #define CSL_CPINTC_ENABLE_REG8_ENABLE_272_RESETVAL (0x00000000u)
  9553. #define CSL_CPINTC_ENABLE_REG8_ENABLE_273_MASK (0x00020000u)
  9554. #define CSL_CPINTC_ENABLE_REG8_ENABLE_273_SHIFT (0x00000011u)
  9555. #define CSL_CPINTC_ENABLE_REG8_ENABLE_273_RESETVAL (0x00000000u)
  9556. #define CSL_CPINTC_ENABLE_REG8_ENABLE_274_MASK (0x00040000u)
  9557. #define CSL_CPINTC_ENABLE_REG8_ENABLE_274_SHIFT (0x00000012u)
  9558. #define CSL_CPINTC_ENABLE_REG8_ENABLE_274_RESETVAL (0x00000000u)
  9559. #define CSL_CPINTC_ENABLE_REG8_ENABLE_275_MASK (0x00080000u)
  9560. #define CSL_CPINTC_ENABLE_REG8_ENABLE_275_SHIFT (0x00000013u)
  9561. #define CSL_CPINTC_ENABLE_REG8_ENABLE_275_RESETVAL (0x00000000u)
  9562. #define CSL_CPINTC_ENABLE_REG8_ENABLE_276_MASK (0x00100000u)
  9563. #define CSL_CPINTC_ENABLE_REG8_ENABLE_276_SHIFT (0x00000014u)
  9564. #define CSL_CPINTC_ENABLE_REG8_ENABLE_276_RESETVAL (0x00000000u)
  9565. #define CSL_CPINTC_ENABLE_REG8_ENABLE_277_MASK (0x00200000u)
  9566. #define CSL_CPINTC_ENABLE_REG8_ENABLE_277_SHIFT (0x00000015u)
  9567. #define CSL_CPINTC_ENABLE_REG8_ENABLE_277_RESETVAL (0x00000000u)
  9568. #define CSL_CPINTC_ENABLE_REG8_ENABLE_278_MASK (0x00400000u)
  9569. #define CSL_CPINTC_ENABLE_REG8_ENABLE_278_SHIFT (0x00000016u)
  9570. #define CSL_CPINTC_ENABLE_REG8_ENABLE_278_RESETVAL (0x00000000u)
  9571. #define CSL_CPINTC_ENABLE_REG8_ENABLE_279_MASK (0x00800000u)
  9572. #define CSL_CPINTC_ENABLE_REG8_ENABLE_279_SHIFT (0x00000017u)
  9573. #define CSL_CPINTC_ENABLE_REG8_ENABLE_279_RESETVAL (0x00000000u)
  9574. #define CSL_CPINTC_ENABLE_REG8_ENABLE_280_MASK (0x01000000u)
  9575. #define CSL_CPINTC_ENABLE_REG8_ENABLE_280_SHIFT (0x00000018u)
  9576. #define CSL_CPINTC_ENABLE_REG8_ENABLE_280_RESETVAL (0x00000000u)
  9577. #define CSL_CPINTC_ENABLE_REG8_ENABLE_281_MASK (0x02000000u)
  9578. #define CSL_CPINTC_ENABLE_REG8_ENABLE_281_SHIFT (0x00000019u)
  9579. #define CSL_CPINTC_ENABLE_REG8_ENABLE_281_RESETVAL (0x00000000u)
  9580. #define CSL_CPINTC_ENABLE_REG8_ENABLE_282_MASK (0x04000000u)
  9581. #define CSL_CPINTC_ENABLE_REG8_ENABLE_282_SHIFT (0x0000001Au)
  9582. #define CSL_CPINTC_ENABLE_REG8_ENABLE_282_RESETVAL (0x00000000u)
  9583. #define CSL_CPINTC_ENABLE_REG8_ENABLE_283_MASK (0x08000000u)
  9584. #define CSL_CPINTC_ENABLE_REG8_ENABLE_283_SHIFT (0x0000001Bu)
  9585. #define CSL_CPINTC_ENABLE_REG8_ENABLE_283_RESETVAL (0x00000000u)
  9586. #define CSL_CPINTC_ENABLE_REG8_ENABLE_284_MASK (0x10000000u)
  9587. #define CSL_CPINTC_ENABLE_REG8_ENABLE_284_SHIFT (0x0000001Cu)
  9588. #define CSL_CPINTC_ENABLE_REG8_ENABLE_284_RESETVAL (0x00000000u)
  9589. #define CSL_CPINTC_ENABLE_REG8_ENABLE_285_MASK (0x20000000u)
  9590. #define CSL_CPINTC_ENABLE_REG8_ENABLE_285_SHIFT (0x0000001Du)
  9591. #define CSL_CPINTC_ENABLE_REG8_ENABLE_285_RESETVAL (0x00000000u)
  9592. #define CSL_CPINTC_ENABLE_REG8_ENABLE_286_MASK (0x40000000u)
  9593. #define CSL_CPINTC_ENABLE_REG8_ENABLE_286_SHIFT (0x0000001Eu)
  9594. #define CSL_CPINTC_ENABLE_REG8_ENABLE_286_RESETVAL (0x00000000u)
  9595. #define CSL_CPINTC_ENABLE_REG8_ENABLE_287_MASK (0x80000000u)
  9596. #define CSL_CPINTC_ENABLE_REG8_ENABLE_287_SHIFT (0x0000001Fu)
  9597. #define CSL_CPINTC_ENABLE_REG8_ENABLE_287_RESETVAL (0x00000000u)
  9598. #define CSL_CPINTC_ENABLE_REG8_RESETVAL (0x00000000u)
  9599. /* enable_reg9 */
  9600. #define CSL_CPINTC_ENABLE_REG9_ENABLE_288_MASK (0x00000001u)
  9601. #define CSL_CPINTC_ENABLE_REG9_ENABLE_288_SHIFT (0x00000000u)
  9602. #define CSL_CPINTC_ENABLE_REG9_ENABLE_288_RESETVAL (0x00000000u)
  9603. #define CSL_CPINTC_ENABLE_REG9_ENABLE_289_MASK (0x00000002u)
  9604. #define CSL_CPINTC_ENABLE_REG9_ENABLE_289_SHIFT (0x00000001u)
  9605. #define CSL_CPINTC_ENABLE_REG9_ENABLE_289_RESETVAL (0x00000000u)
  9606. #define CSL_CPINTC_ENABLE_REG9_ENABLE_290_MASK (0x00000004u)
  9607. #define CSL_CPINTC_ENABLE_REG9_ENABLE_290_SHIFT (0x00000002u)
  9608. #define CSL_CPINTC_ENABLE_REG9_ENABLE_290_RESETVAL (0x00000000u)
  9609. #define CSL_CPINTC_ENABLE_REG9_ENABLE_291_MASK (0x00000008u)
  9610. #define CSL_CPINTC_ENABLE_REG9_ENABLE_291_SHIFT (0x00000003u)
  9611. #define CSL_CPINTC_ENABLE_REG9_ENABLE_291_RESETVAL (0x00000000u)
  9612. #define CSL_CPINTC_ENABLE_REG9_ENABLE_292_MASK (0x00000010u)
  9613. #define CSL_CPINTC_ENABLE_REG9_ENABLE_292_SHIFT (0x00000004u)
  9614. #define CSL_CPINTC_ENABLE_REG9_ENABLE_292_RESETVAL (0x00000000u)
  9615. #define CSL_CPINTC_ENABLE_REG9_ENABLE_293_MASK (0x00000020u)
  9616. #define CSL_CPINTC_ENABLE_REG9_ENABLE_293_SHIFT (0x00000005u)
  9617. #define CSL_CPINTC_ENABLE_REG9_ENABLE_293_RESETVAL (0x00000000u)
  9618. #define CSL_CPINTC_ENABLE_REG9_ENABLE_294_MASK (0x00000040u)
  9619. #define CSL_CPINTC_ENABLE_REG9_ENABLE_294_SHIFT (0x00000006u)
  9620. #define CSL_CPINTC_ENABLE_REG9_ENABLE_294_RESETVAL (0x00000000u)
  9621. #define CSL_CPINTC_ENABLE_REG9_ENABLE_295_MASK (0x00000080u)
  9622. #define CSL_CPINTC_ENABLE_REG9_ENABLE_295_SHIFT (0x00000007u)
  9623. #define CSL_CPINTC_ENABLE_REG9_ENABLE_295_RESETVAL (0x00000000u)
  9624. #define CSL_CPINTC_ENABLE_REG9_ENABLE_296_MASK (0x00000100u)
  9625. #define CSL_CPINTC_ENABLE_REG9_ENABLE_296_SHIFT (0x00000008u)
  9626. #define CSL_CPINTC_ENABLE_REG9_ENABLE_296_RESETVAL (0x00000000u)
  9627. #define CSL_CPINTC_ENABLE_REG9_ENABLE_297_MASK (0x00000200u)
  9628. #define CSL_CPINTC_ENABLE_REG9_ENABLE_297_SHIFT (0x00000009u)
  9629. #define CSL_CPINTC_ENABLE_REG9_ENABLE_297_RESETVAL (0x00000000u)
  9630. #define CSL_CPINTC_ENABLE_REG9_ENABLE_298_MASK (0x00000400u)
  9631. #define CSL_CPINTC_ENABLE_REG9_ENABLE_298_SHIFT (0x0000000Au)
  9632. #define CSL_CPINTC_ENABLE_REG9_ENABLE_298_RESETVAL (0x00000000u)
  9633. #define CSL_CPINTC_ENABLE_REG9_ENABLE_299_MASK (0x00000800u)
  9634. #define CSL_CPINTC_ENABLE_REG9_ENABLE_299_SHIFT (0x0000000Bu)
  9635. #define CSL_CPINTC_ENABLE_REG9_ENABLE_299_RESETVAL (0x00000000u)
  9636. #define CSL_CPINTC_ENABLE_REG9_ENABLE_300_MASK (0x00001000u)
  9637. #define CSL_CPINTC_ENABLE_REG9_ENABLE_300_SHIFT (0x0000000Cu)
  9638. #define CSL_CPINTC_ENABLE_REG9_ENABLE_300_RESETVAL (0x00000000u)
  9639. #define CSL_CPINTC_ENABLE_REG9_ENABLE_301_MASK (0x00002000u)
  9640. #define CSL_CPINTC_ENABLE_REG9_ENABLE_301_SHIFT (0x0000000Du)
  9641. #define CSL_CPINTC_ENABLE_REG9_ENABLE_301_RESETVAL (0x00000000u)
  9642. #define CSL_CPINTC_ENABLE_REG9_ENABLE_302_MASK (0x00004000u)
  9643. #define CSL_CPINTC_ENABLE_REG9_ENABLE_302_SHIFT (0x0000000Eu)
  9644. #define CSL_CPINTC_ENABLE_REG9_ENABLE_302_RESETVAL (0x00000000u)
  9645. #define CSL_CPINTC_ENABLE_REG9_ENABLE_303_MASK (0x00008000u)
  9646. #define CSL_CPINTC_ENABLE_REG9_ENABLE_303_SHIFT (0x0000000Fu)
  9647. #define CSL_CPINTC_ENABLE_REG9_ENABLE_303_RESETVAL (0x00000000u)
  9648. #define CSL_CPINTC_ENABLE_REG9_ENABLE_304_MASK (0x00010000u)
  9649. #define CSL_CPINTC_ENABLE_REG9_ENABLE_304_SHIFT (0x00000010u)
  9650. #define CSL_CPINTC_ENABLE_REG9_ENABLE_304_RESETVAL (0x00000000u)
  9651. #define CSL_CPINTC_ENABLE_REG9_ENABLE_305_MASK (0x00020000u)
  9652. #define CSL_CPINTC_ENABLE_REG9_ENABLE_305_SHIFT (0x00000011u)
  9653. #define CSL_CPINTC_ENABLE_REG9_ENABLE_305_RESETVAL (0x00000000u)
  9654. #define CSL_CPINTC_ENABLE_REG9_ENABLE_306_MASK (0x00040000u)
  9655. #define CSL_CPINTC_ENABLE_REG9_ENABLE_306_SHIFT (0x00000012u)
  9656. #define CSL_CPINTC_ENABLE_REG9_ENABLE_306_RESETVAL (0x00000000u)
  9657. #define CSL_CPINTC_ENABLE_REG9_ENABLE_307_MASK (0x00080000u)
  9658. #define CSL_CPINTC_ENABLE_REG9_ENABLE_307_SHIFT (0x00000013u)
  9659. #define CSL_CPINTC_ENABLE_REG9_ENABLE_307_RESETVAL (0x00000000u)
  9660. #define CSL_CPINTC_ENABLE_REG9_ENABLE_308_MASK (0x00100000u)
  9661. #define CSL_CPINTC_ENABLE_REG9_ENABLE_308_SHIFT (0x00000014u)
  9662. #define CSL_CPINTC_ENABLE_REG9_ENABLE_308_RESETVAL (0x00000000u)
  9663. #define CSL_CPINTC_ENABLE_REG9_ENABLE_309_MASK (0x00200000u)
  9664. #define CSL_CPINTC_ENABLE_REG9_ENABLE_309_SHIFT (0x00000015u)
  9665. #define CSL_CPINTC_ENABLE_REG9_ENABLE_309_RESETVAL (0x00000000u)
  9666. #define CSL_CPINTC_ENABLE_REG9_ENABLE_310_MASK (0x00400000u)
  9667. #define CSL_CPINTC_ENABLE_REG9_ENABLE_310_SHIFT (0x00000016u)
  9668. #define CSL_CPINTC_ENABLE_REG9_ENABLE_310_RESETVAL (0x00000000u)
  9669. #define CSL_CPINTC_ENABLE_REG9_ENABLE_311_MASK (0x00800000u)
  9670. #define CSL_CPINTC_ENABLE_REG9_ENABLE_311_SHIFT (0x00000017u)
  9671. #define CSL_CPINTC_ENABLE_REG9_ENABLE_311_RESETVAL (0x00000000u)
  9672. #define CSL_CPINTC_ENABLE_REG9_ENABLE_312_MASK (0x01000000u)
  9673. #define CSL_CPINTC_ENABLE_REG9_ENABLE_312_SHIFT (0x00000018u)
  9674. #define CSL_CPINTC_ENABLE_REG9_ENABLE_312_RESETVAL (0x00000000u)
  9675. #define CSL_CPINTC_ENABLE_REG9_ENABLE_313_MASK (0x02000000u)
  9676. #define CSL_CPINTC_ENABLE_REG9_ENABLE_313_SHIFT (0x00000019u)
  9677. #define CSL_CPINTC_ENABLE_REG9_ENABLE_313_RESETVAL (0x00000000u)
  9678. #define CSL_CPINTC_ENABLE_REG9_ENABLE_314_MASK (0x04000000u)
  9679. #define CSL_CPINTC_ENABLE_REG9_ENABLE_314_SHIFT (0x0000001Au)
  9680. #define CSL_CPINTC_ENABLE_REG9_ENABLE_314_RESETVAL (0x00000000u)
  9681. #define CSL_CPINTC_ENABLE_REG9_ENABLE_315_MASK (0x08000000u)
  9682. #define CSL_CPINTC_ENABLE_REG9_ENABLE_315_SHIFT (0x0000001Bu)
  9683. #define CSL_CPINTC_ENABLE_REG9_ENABLE_315_RESETVAL (0x00000000u)
  9684. #define CSL_CPINTC_ENABLE_REG9_ENABLE_316_MASK (0x10000000u)
  9685. #define CSL_CPINTC_ENABLE_REG9_ENABLE_316_SHIFT (0x0000001Cu)
  9686. #define CSL_CPINTC_ENABLE_REG9_ENABLE_316_RESETVAL (0x00000000u)
  9687. #define CSL_CPINTC_ENABLE_REG9_ENABLE_317_MASK (0x20000000u)
  9688. #define CSL_CPINTC_ENABLE_REG9_ENABLE_317_SHIFT (0x0000001Du)
  9689. #define CSL_CPINTC_ENABLE_REG9_ENABLE_317_RESETVAL (0x00000000u)
  9690. #define CSL_CPINTC_ENABLE_REG9_ENABLE_318_MASK (0x40000000u)
  9691. #define CSL_CPINTC_ENABLE_REG9_ENABLE_318_SHIFT (0x0000001Eu)
  9692. #define CSL_CPINTC_ENABLE_REG9_ENABLE_318_RESETVAL (0x00000000u)
  9693. #define CSL_CPINTC_ENABLE_REG9_ENABLE_319_MASK (0x80000000u)
  9694. #define CSL_CPINTC_ENABLE_REG9_ENABLE_319_SHIFT (0x0000001Fu)
  9695. #define CSL_CPINTC_ENABLE_REG9_ENABLE_319_RESETVAL (0x00000000u)
  9696. #define CSL_CPINTC_ENABLE_REG9_RESETVAL (0x00000000u)
  9697. /* enable_reg10 */
  9698. #define CSL_CPINTC_ENABLE_REG10_ENABLE_320_MASK (0x00000001u)
  9699. #define CSL_CPINTC_ENABLE_REG10_ENABLE_320_SHIFT (0x00000000u)
  9700. #define CSL_CPINTC_ENABLE_REG10_ENABLE_320_RESETVAL (0x00000000u)
  9701. #define CSL_CPINTC_ENABLE_REG10_ENABLE_321_MASK (0x00000002u)
  9702. #define CSL_CPINTC_ENABLE_REG10_ENABLE_321_SHIFT (0x00000001u)
  9703. #define CSL_CPINTC_ENABLE_REG10_ENABLE_321_RESETVAL (0x00000000u)
  9704. #define CSL_CPINTC_ENABLE_REG10_ENABLE_322_MASK (0x00000004u)
  9705. #define CSL_CPINTC_ENABLE_REG10_ENABLE_322_SHIFT (0x00000002u)
  9706. #define CSL_CPINTC_ENABLE_REG10_ENABLE_322_RESETVAL (0x00000000u)
  9707. #define CSL_CPINTC_ENABLE_REG10_ENABLE_323_MASK (0x00000008u)
  9708. #define CSL_CPINTC_ENABLE_REG10_ENABLE_323_SHIFT (0x00000003u)
  9709. #define CSL_CPINTC_ENABLE_REG10_ENABLE_323_RESETVAL (0x00000000u)
  9710. #define CSL_CPINTC_ENABLE_REG10_ENABLE_324_MASK (0x00000010u)
  9711. #define CSL_CPINTC_ENABLE_REG10_ENABLE_324_SHIFT (0x00000004u)
  9712. #define CSL_CPINTC_ENABLE_REG10_ENABLE_324_RESETVAL (0x00000000u)
  9713. #define CSL_CPINTC_ENABLE_REG10_ENABLE_325_MASK (0x00000020u)
  9714. #define CSL_CPINTC_ENABLE_REG10_ENABLE_325_SHIFT (0x00000005u)
  9715. #define CSL_CPINTC_ENABLE_REG10_ENABLE_325_RESETVAL (0x00000000u)
  9716. #define CSL_CPINTC_ENABLE_REG10_ENABLE_326_MASK (0x00000040u)
  9717. #define CSL_CPINTC_ENABLE_REG10_ENABLE_326_SHIFT (0x00000006u)
  9718. #define CSL_CPINTC_ENABLE_REG10_ENABLE_326_RESETVAL (0x00000000u)
  9719. #define CSL_CPINTC_ENABLE_REG10_ENABLE_327_MASK (0x00000080u)
  9720. #define CSL_CPINTC_ENABLE_REG10_ENABLE_327_SHIFT (0x00000007u)
  9721. #define CSL_CPINTC_ENABLE_REG10_ENABLE_327_RESETVAL (0x00000000u)
  9722. #define CSL_CPINTC_ENABLE_REG10_ENABLE_328_MASK (0x00000100u)
  9723. #define CSL_CPINTC_ENABLE_REG10_ENABLE_328_SHIFT (0x00000008u)
  9724. #define CSL_CPINTC_ENABLE_REG10_ENABLE_328_RESETVAL (0x00000000u)
  9725. #define CSL_CPINTC_ENABLE_REG10_ENABLE_329_MASK (0x00000200u)
  9726. #define CSL_CPINTC_ENABLE_REG10_ENABLE_329_SHIFT (0x00000009u)
  9727. #define CSL_CPINTC_ENABLE_REG10_ENABLE_329_RESETVAL (0x00000000u)
  9728. #define CSL_CPINTC_ENABLE_REG10_ENABLE_330_MASK (0x00000400u)
  9729. #define CSL_CPINTC_ENABLE_REG10_ENABLE_330_SHIFT (0x0000000Au)
  9730. #define CSL_CPINTC_ENABLE_REG10_ENABLE_330_RESETVAL (0x00000000u)
  9731. #define CSL_CPINTC_ENABLE_REG10_ENABLE_331_MASK (0x00000800u)
  9732. #define CSL_CPINTC_ENABLE_REG10_ENABLE_331_SHIFT (0x0000000Bu)
  9733. #define CSL_CPINTC_ENABLE_REG10_ENABLE_331_RESETVAL (0x00000000u)
  9734. #define CSL_CPINTC_ENABLE_REG10_ENABLE_332_MASK (0x00001000u)
  9735. #define CSL_CPINTC_ENABLE_REG10_ENABLE_332_SHIFT (0x0000000Cu)
  9736. #define CSL_CPINTC_ENABLE_REG10_ENABLE_332_RESETVAL (0x00000000u)
  9737. #define CSL_CPINTC_ENABLE_REG10_ENABLE_333_MASK (0x00002000u)
  9738. #define CSL_CPINTC_ENABLE_REG10_ENABLE_333_SHIFT (0x0000000Du)
  9739. #define CSL_CPINTC_ENABLE_REG10_ENABLE_333_RESETVAL (0x00000000u)
  9740. #define CSL_CPINTC_ENABLE_REG10_ENABLE_334_MASK (0x00004000u)
  9741. #define CSL_CPINTC_ENABLE_REG10_ENABLE_334_SHIFT (0x0000000Eu)
  9742. #define CSL_CPINTC_ENABLE_REG10_ENABLE_334_RESETVAL (0x00000000u)
  9743. #define CSL_CPINTC_ENABLE_REG10_ENABLE_335_MASK (0x00008000u)
  9744. #define CSL_CPINTC_ENABLE_REG10_ENABLE_335_SHIFT (0x0000000Fu)
  9745. #define CSL_CPINTC_ENABLE_REG10_ENABLE_335_RESETVAL (0x00000000u)
  9746. #define CSL_CPINTC_ENABLE_REG10_ENABLE_336_MASK (0x00010000u)
  9747. #define CSL_CPINTC_ENABLE_REG10_ENABLE_336_SHIFT (0x00000010u)
  9748. #define CSL_CPINTC_ENABLE_REG10_ENABLE_336_RESETVAL (0x00000000u)
  9749. #define CSL_CPINTC_ENABLE_REG10_ENABLE_337_MASK (0x00020000u)
  9750. #define CSL_CPINTC_ENABLE_REG10_ENABLE_337_SHIFT (0x00000011u)
  9751. #define CSL_CPINTC_ENABLE_REG10_ENABLE_337_RESETVAL (0x00000000u)
  9752. #define CSL_CPINTC_ENABLE_REG10_ENABLE_338_MASK (0x00040000u)
  9753. #define CSL_CPINTC_ENABLE_REG10_ENABLE_338_SHIFT (0x00000012u)
  9754. #define CSL_CPINTC_ENABLE_REG10_ENABLE_338_RESETVAL (0x00000000u)
  9755. #define CSL_CPINTC_ENABLE_REG10_ENABLE_339_MASK (0x00080000u)
  9756. #define CSL_CPINTC_ENABLE_REG10_ENABLE_339_SHIFT (0x00000013u)
  9757. #define CSL_CPINTC_ENABLE_REG10_ENABLE_339_RESETVAL (0x00000000u)
  9758. #define CSL_CPINTC_ENABLE_REG10_ENABLE_340_MASK (0x00100000u)
  9759. #define CSL_CPINTC_ENABLE_REG10_ENABLE_340_SHIFT (0x00000014u)
  9760. #define CSL_CPINTC_ENABLE_REG10_ENABLE_340_RESETVAL (0x00000000u)
  9761. #define CSL_CPINTC_ENABLE_REG10_ENABLE_341_MASK (0x00200000u)
  9762. #define CSL_CPINTC_ENABLE_REG10_ENABLE_341_SHIFT (0x00000015u)
  9763. #define CSL_CPINTC_ENABLE_REG10_ENABLE_341_RESETVAL (0x00000000u)
  9764. #define CSL_CPINTC_ENABLE_REG10_ENABLE_342_MASK (0x00400000u)
  9765. #define CSL_CPINTC_ENABLE_REG10_ENABLE_342_SHIFT (0x00000016u)
  9766. #define CSL_CPINTC_ENABLE_REG10_ENABLE_342_RESETVAL (0x00000000u)
  9767. #define CSL_CPINTC_ENABLE_REG10_ENABLE_343_MASK (0x00800000u)
  9768. #define CSL_CPINTC_ENABLE_REG10_ENABLE_343_SHIFT (0x00000017u)
  9769. #define CSL_CPINTC_ENABLE_REG10_ENABLE_343_RESETVAL (0x00000000u)
  9770. #define CSL_CPINTC_ENABLE_REG10_ENABLE_344_MASK (0x01000000u)
  9771. #define CSL_CPINTC_ENABLE_REG10_ENABLE_344_SHIFT (0x00000018u)
  9772. #define CSL_CPINTC_ENABLE_REG10_ENABLE_344_RESETVAL (0x00000000u)
  9773. #define CSL_CPINTC_ENABLE_REG10_ENABLE_345_MASK (0x02000000u)
  9774. #define CSL_CPINTC_ENABLE_REG10_ENABLE_345_SHIFT (0x00000019u)
  9775. #define CSL_CPINTC_ENABLE_REG10_ENABLE_345_RESETVAL (0x00000000u)
  9776. #define CSL_CPINTC_ENABLE_REG10_ENABLE_346_MASK (0x04000000u)
  9777. #define CSL_CPINTC_ENABLE_REG10_ENABLE_346_SHIFT (0x0000001Au)
  9778. #define CSL_CPINTC_ENABLE_REG10_ENABLE_346_RESETVAL (0x00000000u)
  9779. #define CSL_CPINTC_ENABLE_REG10_ENABLE_347_MASK (0x08000000u)
  9780. #define CSL_CPINTC_ENABLE_REG10_ENABLE_347_SHIFT (0x0000001Bu)
  9781. #define CSL_CPINTC_ENABLE_REG10_ENABLE_347_RESETVAL (0x00000000u)
  9782. #define CSL_CPINTC_ENABLE_REG10_ENABLE_348_MASK (0x10000000u)
  9783. #define CSL_CPINTC_ENABLE_REG10_ENABLE_348_SHIFT (0x0000001Cu)
  9784. #define CSL_CPINTC_ENABLE_REG10_ENABLE_348_RESETVAL (0x00000000u)
  9785. #define CSL_CPINTC_ENABLE_REG10_ENABLE_349_MASK (0x20000000u)
  9786. #define CSL_CPINTC_ENABLE_REG10_ENABLE_349_SHIFT (0x0000001Du)
  9787. #define CSL_CPINTC_ENABLE_REG10_ENABLE_349_RESETVAL (0x00000000u)
  9788. #define CSL_CPINTC_ENABLE_REG10_ENABLE_350_MASK (0x40000000u)
  9789. #define CSL_CPINTC_ENABLE_REG10_ENABLE_350_SHIFT (0x0000001Eu)
  9790. #define CSL_CPINTC_ENABLE_REG10_ENABLE_350_RESETVAL (0x00000000u)
  9791. #define CSL_CPINTC_ENABLE_REG10_ENABLE_351_MASK (0x80000000u)
  9792. #define CSL_CPINTC_ENABLE_REG10_ENABLE_351_SHIFT (0x0000001Fu)
  9793. #define CSL_CPINTC_ENABLE_REG10_ENABLE_351_RESETVAL (0x00000000u)
  9794. #define CSL_CPINTC_ENABLE_REG10_RESETVAL (0x00000000u)
  9795. /* enable_reg11 */
  9796. #define CSL_CPINTC_ENABLE_REG11_ENABLE_352_MASK (0x00000001u)
  9797. #define CSL_CPINTC_ENABLE_REG11_ENABLE_352_SHIFT (0x00000000u)
  9798. #define CSL_CPINTC_ENABLE_REG11_ENABLE_352_RESETVAL (0x00000000u)
  9799. #define CSL_CPINTC_ENABLE_REG11_ENABLE_353_MASK (0x00000002u)
  9800. #define CSL_CPINTC_ENABLE_REG11_ENABLE_353_SHIFT (0x00000001u)
  9801. #define CSL_CPINTC_ENABLE_REG11_ENABLE_353_RESETVAL (0x00000000u)
  9802. #define CSL_CPINTC_ENABLE_REG11_ENABLE_354_MASK (0x00000004u)
  9803. #define CSL_CPINTC_ENABLE_REG11_ENABLE_354_SHIFT (0x00000002u)
  9804. #define CSL_CPINTC_ENABLE_REG11_ENABLE_354_RESETVAL (0x00000000u)
  9805. #define CSL_CPINTC_ENABLE_REG11_ENABLE_355_MASK (0x00000008u)
  9806. #define CSL_CPINTC_ENABLE_REG11_ENABLE_355_SHIFT (0x00000003u)
  9807. #define CSL_CPINTC_ENABLE_REG11_ENABLE_355_RESETVAL (0x00000000u)
  9808. #define CSL_CPINTC_ENABLE_REG11_ENABLE_356_MASK (0x00000010u)
  9809. #define CSL_CPINTC_ENABLE_REG11_ENABLE_356_SHIFT (0x00000004u)
  9810. #define CSL_CPINTC_ENABLE_REG11_ENABLE_356_RESETVAL (0x00000000u)
  9811. #define CSL_CPINTC_ENABLE_REG11_ENABLE_357_MASK (0x00000020u)
  9812. #define CSL_CPINTC_ENABLE_REG11_ENABLE_357_SHIFT (0x00000005u)
  9813. #define CSL_CPINTC_ENABLE_REG11_ENABLE_357_RESETVAL (0x00000000u)
  9814. #define CSL_CPINTC_ENABLE_REG11_ENABLE_358_MASK (0x00000040u)
  9815. #define CSL_CPINTC_ENABLE_REG11_ENABLE_358_SHIFT (0x00000006u)
  9816. #define CSL_CPINTC_ENABLE_REG11_ENABLE_358_RESETVAL (0x00000000u)
  9817. #define CSL_CPINTC_ENABLE_REG11_ENABLE_359_MASK (0x00000080u)
  9818. #define CSL_CPINTC_ENABLE_REG11_ENABLE_359_SHIFT (0x00000007u)
  9819. #define CSL_CPINTC_ENABLE_REG11_ENABLE_359_RESETVAL (0x00000000u)
  9820. #define CSL_CPINTC_ENABLE_REG11_ENABLE_360_MASK (0x00000100u)
  9821. #define CSL_CPINTC_ENABLE_REG11_ENABLE_360_SHIFT (0x00000008u)
  9822. #define CSL_CPINTC_ENABLE_REG11_ENABLE_360_RESETVAL (0x00000000u)
  9823. #define CSL_CPINTC_ENABLE_REG11_ENABLE_361_MASK (0x00000200u)
  9824. #define CSL_CPINTC_ENABLE_REG11_ENABLE_361_SHIFT (0x00000009u)
  9825. #define CSL_CPINTC_ENABLE_REG11_ENABLE_361_RESETVAL (0x00000000u)
  9826. #define CSL_CPINTC_ENABLE_REG11_ENABLE_362_MASK (0x00000400u)
  9827. #define CSL_CPINTC_ENABLE_REG11_ENABLE_362_SHIFT (0x0000000Au)
  9828. #define CSL_CPINTC_ENABLE_REG11_ENABLE_362_RESETVAL (0x00000000u)
  9829. #define CSL_CPINTC_ENABLE_REG11_ENABLE_363_MASK (0x00000800u)
  9830. #define CSL_CPINTC_ENABLE_REG11_ENABLE_363_SHIFT (0x0000000Bu)
  9831. #define CSL_CPINTC_ENABLE_REG11_ENABLE_363_RESETVAL (0x00000000u)
  9832. #define CSL_CPINTC_ENABLE_REG11_ENABLE_364_MASK (0x00001000u)
  9833. #define CSL_CPINTC_ENABLE_REG11_ENABLE_364_SHIFT (0x0000000Cu)
  9834. #define CSL_CPINTC_ENABLE_REG11_ENABLE_364_RESETVAL (0x00000000u)
  9835. #define CSL_CPINTC_ENABLE_REG11_ENABLE_365_MASK (0x00002000u)
  9836. #define CSL_CPINTC_ENABLE_REG11_ENABLE_365_SHIFT (0x0000000Du)
  9837. #define CSL_CPINTC_ENABLE_REG11_ENABLE_365_RESETVAL (0x00000000u)
  9838. #define CSL_CPINTC_ENABLE_REG11_ENABLE_366_MASK (0x00004000u)
  9839. #define CSL_CPINTC_ENABLE_REG11_ENABLE_366_SHIFT (0x0000000Eu)
  9840. #define CSL_CPINTC_ENABLE_REG11_ENABLE_366_RESETVAL (0x00000000u)
  9841. #define CSL_CPINTC_ENABLE_REG11_ENABLE_367_MASK (0x00008000u)
  9842. #define CSL_CPINTC_ENABLE_REG11_ENABLE_367_SHIFT (0x0000000Fu)
  9843. #define CSL_CPINTC_ENABLE_REG11_ENABLE_367_RESETVAL (0x00000000u)
  9844. #define CSL_CPINTC_ENABLE_REG11_ENABLE_368_MASK (0x00010000u)
  9845. #define CSL_CPINTC_ENABLE_REG11_ENABLE_368_SHIFT (0x00000010u)
  9846. #define CSL_CPINTC_ENABLE_REG11_ENABLE_368_RESETVAL (0x00000000u)
  9847. #define CSL_CPINTC_ENABLE_REG11_ENABLE_369_MASK (0x00020000u)
  9848. #define CSL_CPINTC_ENABLE_REG11_ENABLE_369_SHIFT (0x00000011u)
  9849. #define CSL_CPINTC_ENABLE_REG11_ENABLE_369_RESETVAL (0x00000000u)
  9850. #define CSL_CPINTC_ENABLE_REG11_ENABLE_370_MASK (0x00040000u)
  9851. #define CSL_CPINTC_ENABLE_REG11_ENABLE_370_SHIFT (0x00000012u)
  9852. #define CSL_CPINTC_ENABLE_REG11_ENABLE_370_RESETVAL (0x00000000u)
  9853. #define CSL_CPINTC_ENABLE_REG11_ENABLE_371_MASK (0x00080000u)
  9854. #define CSL_CPINTC_ENABLE_REG11_ENABLE_371_SHIFT (0x00000013u)
  9855. #define CSL_CPINTC_ENABLE_REG11_ENABLE_371_RESETVAL (0x00000000u)
  9856. #define CSL_CPINTC_ENABLE_REG11_ENABLE_372_MASK (0x00100000u)
  9857. #define CSL_CPINTC_ENABLE_REG11_ENABLE_372_SHIFT (0x00000014u)
  9858. #define CSL_CPINTC_ENABLE_REG11_ENABLE_372_RESETVAL (0x00000000u)
  9859. #define CSL_CPINTC_ENABLE_REG11_ENABLE_373_MASK (0x00200000u)
  9860. #define CSL_CPINTC_ENABLE_REG11_ENABLE_373_SHIFT (0x00000015u)
  9861. #define CSL_CPINTC_ENABLE_REG11_ENABLE_373_RESETVAL (0x00000000u)
  9862. #define CSL_CPINTC_ENABLE_REG11_ENABLE_374_MASK (0x00400000u)
  9863. #define CSL_CPINTC_ENABLE_REG11_ENABLE_374_SHIFT (0x00000016u)
  9864. #define CSL_CPINTC_ENABLE_REG11_ENABLE_374_RESETVAL (0x00000000u)
  9865. #define CSL_CPINTC_ENABLE_REG11_ENABLE_375_MASK (0x00800000u)
  9866. #define CSL_CPINTC_ENABLE_REG11_ENABLE_375_SHIFT (0x00000017u)
  9867. #define CSL_CPINTC_ENABLE_REG11_ENABLE_375_RESETVAL (0x00000000u)
  9868. #define CSL_CPINTC_ENABLE_REG11_ENABLE_376_MASK (0x01000000u)
  9869. #define CSL_CPINTC_ENABLE_REG11_ENABLE_376_SHIFT (0x00000018u)
  9870. #define CSL_CPINTC_ENABLE_REG11_ENABLE_376_RESETVAL (0x00000000u)
  9871. #define CSL_CPINTC_ENABLE_REG11_ENABLE_377_MASK (0x02000000u)
  9872. #define CSL_CPINTC_ENABLE_REG11_ENABLE_377_SHIFT (0x00000019u)
  9873. #define CSL_CPINTC_ENABLE_REG11_ENABLE_377_RESETVAL (0x00000000u)
  9874. #define CSL_CPINTC_ENABLE_REG11_ENABLE_378_MASK (0x04000000u)
  9875. #define CSL_CPINTC_ENABLE_REG11_ENABLE_378_SHIFT (0x0000001Au)
  9876. #define CSL_CPINTC_ENABLE_REG11_ENABLE_378_RESETVAL (0x00000000u)
  9877. #define CSL_CPINTC_ENABLE_REG11_ENABLE_379_MASK (0x08000000u)
  9878. #define CSL_CPINTC_ENABLE_REG11_ENABLE_379_SHIFT (0x0000001Bu)
  9879. #define CSL_CPINTC_ENABLE_REG11_ENABLE_379_RESETVAL (0x00000000u)
  9880. #define CSL_CPINTC_ENABLE_REG11_ENABLE_380_MASK (0x10000000u)
  9881. #define CSL_CPINTC_ENABLE_REG11_ENABLE_380_SHIFT (0x0000001Cu)
  9882. #define CSL_CPINTC_ENABLE_REG11_ENABLE_380_RESETVAL (0x00000000u)
  9883. #define CSL_CPINTC_ENABLE_REG11_ENABLE_381_MASK (0x20000000u)
  9884. #define CSL_CPINTC_ENABLE_REG11_ENABLE_381_SHIFT (0x0000001Du)
  9885. #define CSL_CPINTC_ENABLE_REG11_ENABLE_381_RESETVAL (0x00000000u)
  9886. #define CSL_CPINTC_ENABLE_REG11_ENABLE_382_MASK (0x40000000u)
  9887. #define CSL_CPINTC_ENABLE_REG11_ENABLE_382_SHIFT (0x0000001Eu)
  9888. #define CSL_CPINTC_ENABLE_REG11_ENABLE_382_RESETVAL (0x00000000u)
  9889. #define CSL_CPINTC_ENABLE_REG11_ENABLE_383_MASK (0x80000000u)
  9890. #define CSL_CPINTC_ENABLE_REG11_ENABLE_383_SHIFT (0x0000001Fu)
  9891. #define CSL_CPINTC_ENABLE_REG11_ENABLE_383_RESETVAL (0x00000000u)
  9892. #define CSL_CPINTC_ENABLE_REG11_RESETVAL (0x00000000u)
  9893. /* enable_reg12 */
  9894. #define CSL_CPINTC_ENABLE_REG12_ENABLE_384_MASK (0x00000001u)
  9895. #define CSL_CPINTC_ENABLE_REG12_ENABLE_384_SHIFT (0x00000000u)
  9896. #define CSL_CPINTC_ENABLE_REG12_ENABLE_384_RESETVAL (0x00000000u)
  9897. #define CSL_CPINTC_ENABLE_REG12_ENABLE_385_MASK (0x00000002u)
  9898. #define CSL_CPINTC_ENABLE_REG12_ENABLE_385_SHIFT (0x00000001u)
  9899. #define CSL_CPINTC_ENABLE_REG12_ENABLE_385_RESETVAL (0x00000000u)
  9900. #define CSL_CPINTC_ENABLE_REG12_ENABLE_386_MASK (0x00000004u)
  9901. #define CSL_CPINTC_ENABLE_REG12_ENABLE_386_SHIFT (0x00000002u)
  9902. #define CSL_CPINTC_ENABLE_REG12_ENABLE_386_RESETVAL (0x00000000u)
  9903. #define CSL_CPINTC_ENABLE_REG12_ENABLE_387_MASK (0x00000008u)
  9904. #define CSL_CPINTC_ENABLE_REG12_ENABLE_387_SHIFT (0x00000003u)
  9905. #define CSL_CPINTC_ENABLE_REG12_ENABLE_387_RESETVAL (0x00000000u)
  9906. #define CSL_CPINTC_ENABLE_REG12_ENABLE_388_MASK (0x00000010u)
  9907. #define CSL_CPINTC_ENABLE_REG12_ENABLE_388_SHIFT (0x00000004u)
  9908. #define CSL_CPINTC_ENABLE_REG12_ENABLE_388_RESETVAL (0x00000000u)
  9909. #define CSL_CPINTC_ENABLE_REG12_ENABLE_389_MASK (0x00000020u)
  9910. #define CSL_CPINTC_ENABLE_REG12_ENABLE_389_SHIFT (0x00000005u)
  9911. #define CSL_CPINTC_ENABLE_REG12_ENABLE_389_RESETVAL (0x00000000u)
  9912. #define CSL_CPINTC_ENABLE_REG12_ENABLE_390_MASK (0x00000040u)
  9913. #define CSL_CPINTC_ENABLE_REG12_ENABLE_390_SHIFT (0x00000006u)
  9914. #define CSL_CPINTC_ENABLE_REG12_ENABLE_390_RESETVAL (0x00000000u)
  9915. #define CSL_CPINTC_ENABLE_REG12_ENABLE_391_MASK (0x00000080u)
  9916. #define CSL_CPINTC_ENABLE_REG12_ENABLE_391_SHIFT (0x00000007u)
  9917. #define CSL_CPINTC_ENABLE_REG12_ENABLE_391_RESETVAL (0x00000000u)
  9918. #define CSL_CPINTC_ENABLE_REG12_ENABLE_392_MASK (0x00000100u)
  9919. #define CSL_CPINTC_ENABLE_REG12_ENABLE_392_SHIFT (0x00000008u)
  9920. #define CSL_CPINTC_ENABLE_REG12_ENABLE_392_RESETVAL (0x00000000u)
  9921. #define CSL_CPINTC_ENABLE_REG12_ENABLE_393_MASK (0x00000200u)
  9922. #define CSL_CPINTC_ENABLE_REG12_ENABLE_393_SHIFT (0x00000009u)
  9923. #define CSL_CPINTC_ENABLE_REG12_ENABLE_393_RESETVAL (0x00000000u)
  9924. #define CSL_CPINTC_ENABLE_REG12_ENABLE_394_MASK (0x00000400u)
  9925. #define CSL_CPINTC_ENABLE_REG12_ENABLE_394_SHIFT (0x0000000Au)
  9926. #define CSL_CPINTC_ENABLE_REG12_ENABLE_394_RESETVAL (0x00000000u)
  9927. #define CSL_CPINTC_ENABLE_REG12_ENABLE_395_MASK (0x00000800u)
  9928. #define CSL_CPINTC_ENABLE_REG12_ENABLE_395_SHIFT (0x0000000Bu)
  9929. #define CSL_CPINTC_ENABLE_REG12_ENABLE_395_RESETVAL (0x00000000u)
  9930. #define CSL_CPINTC_ENABLE_REG12_ENABLE_396_MASK (0x00001000u)
  9931. #define CSL_CPINTC_ENABLE_REG12_ENABLE_396_SHIFT (0x0000000Cu)
  9932. #define CSL_CPINTC_ENABLE_REG12_ENABLE_396_RESETVAL (0x00000000u)
  9933. #define CSL_CPINTC_ENABLE_REG12_ENABLE_397_MASK (0x00002000u)
  9934. #define CSL_CPINTC_ENABLE_REG12_ENABLE_397_SHIFT (0x0000000Du)
  9935. #define CSL_CPINTC_ENABLE_REG12_ENABLE_397_RESETVAL (0x00000000u)
  9936. #define CSL_CPINTC_ENABLE_REG12_ENABLE_398_MASK (0x00004000u)
  9937. #define CSL_CPINTC_ENABLE_REG12_ENABLE_398_SHIFT (0x0000000Eu)
  9938. #define CSL_CPINTC_ENABLE_REG12_ENABLE_398_RESETVAL (0x00000000u)
  9939. #define CSL_CPINTC_ENABLE_REG12_ENABLE_399_MASK (0x00008000u)
  9940. #define CSL_CPINTC_ENABLE_REG12_ENABLE_399_SHIFT (0x0000000Fu)
  9941. #define CSL_CPINTC_ENABLE_REG12_ENABLE_399_RESETVAL (0x00000000u)
  9942. #define CSL_CPINTC_ENABLE_REG12_ENABLE_400_MASK (0x00010000u)
  9943. #define CSL_CPINTC_ENABLE_REG12_ENABLE_400_SHIFT (0x00000010u)
  9944. #define CSL_CPINTC_ENABLE_REG12_ENABLE_400_RESETVAL (0x00000000u)
  9945. #define CSL_CPINTC_ENABLE_REG12_ENABLE_401_MASK (0x00020000u)
  9946. #define CSL_CPINTC_ENABLE_REG12_ENABLE_401_SHIFT (0x00000011u)
  9947. #define CSL_CPINTC_ENABLE_REG12_ENABLE_401_RESETVAL (0x00000000u)
  9948. #define CSL_CPINTC_ENABLE_REG12_ENABLE_402_MASK (0x00040000u)
  9949. #define CSL_CPINTC_ENABLE_REG12_ENABLE_402_SHIFT (0x00000012u)
  9950. #define CSL_CPINTC_ENABLE_REG12_ENABLE_402_RESETVAL (0x00000000u)
  9951. #define CSL_CPINTC_ENABLE_REG12_ENABLE_403_MASK (0x00080000u)
  9952. #define CSL_CPINTC_ENABLE_REG12_ENABLE_403_SHIFT (0x00000013u)
  9953. #define CSL_CPINTC_ENABLE_REG12_ENABLE_403_RESETVAL (0x00000000u)
  9954. #define CSL_CPINTC_ENABLE_REG12_ENABLE_404_MASK (0x00100000u)
  9955. #define CSL_CPINTC_ENABLE_REG12_ENABLE_404_SHIFT (0x00000014u)
  9956. #define CSL_CPINTC_ENABLE_REG12_ENABLE_404_RESETVAL (0x00000000u)
  9957. #define CSL_CPINTC_ENABLE_REG12_ENABLE_405_MASK (0x00200000u)
  9958. #define CSL_CPINTC_ENABLE_REG12_ENABLE_405_SHIFT (0x00000015u)
  9959. #define CSL_CPINTC_ENABLE_REG12_ENABLE_405_RESETVAL (0x00000000u)
  9960. #define CSL_CPINTC_ENABLE_REG12_ENABLE_406_MASK (0x00400000u)
  9961. #define CSL_CPINTC_ENABLE_REG12_ENABLE_406_SHIFT (0x00000016u)
  9962. #define CSL_CPINTC_ENABLE_REG12_ENABLE_406_RESETVAL (0x00000000u)
  9963. #define CSL_CPINTC_ENABLE_REG12_ENABLE_407_MASK (0x00800000u)
  9964. #define CSL_CPINTC_ENABLE_REG12_ENABLE_407_SHIFT (0x00000017u)
  9965. #define CSL_CPINTC_ENABLE_REG12_ENABLE_407_RESETVAL (0x00000000u)
  9966. #define CSL_CPINTC_ENABLE_REG12_ENABLE_408_MASK (0x01000000u)
  9967. #define CSL_CPINTC_ENABLE_REG12_ENABLE_408_SHIFT (0x00000018u)
  9968. #define CSL_CPINTC_ENABLE_REG12_ENABLE_408_RESETVAL (0x00000000u)
  9969. #define CSL_CPINTC_ENABLE_REG12_ENABLE_409_MASK (0x02000000u)
  9970. #define CSL_CPINTC_ENABLE_REG12_ENABLE_409_SHIFT (0x00000019u)
  9971. #define CSL_CPINTC_ENABLE_REG12_ENABLE_409_RESETVAL (0x00000000u)
  9972. #define CSL_CPINTC_ENABLE_REG12_ENABLE_410_MASK (0x04000000u)
  9973. #define CSL_CPINTC_ENABLE_REG12_ENABLE_410_SHIFT (0x0000001Au)
  9974. #define CSL_CPINTC_ENABLE_REG12_ENABLE_410_RESETVAL (0x00000000u)
  9975. #define CSL_CPINTC_ENABLE_REG12_ENABLE_411_MASK (0x08000000u)
  9976. #define CSL_CPINTC_ENABLE_REG12_ENABLE_411_SHIFT (0x0000001Bu)
  9977. #define CSL_CPINTC_ENABLE_REG12_ENABLE_411_RESETVAL (0x00000000u)
  9978. #define CSL_CPINTC_ENABLE_REG12_ENABLE_412_MASK (0x10000000u)
  9979. #define CSL_CPINTC_ENABLE_REG12_ENABLE_412_SHIFT (0x0000001Cu)
  9980. #define CSL_CPINTC_ENABLE_REG12_ENABLE_412_RESETVAL (0x00000000u)
  9981. #define CSL_CPINTC_ENABLE_REG12_ENABLE_413_MASK (0x20000000u)
  9982. #define CSL_CPINTC_ENABLE_REG12_ENABLE_413_SHIFT (0x0000001Du)
  9983. #define CSL_CPINTC_ENABLE_REG12_ENABLE_413_RESETVAL (0x00000000u)
  9984. #define CSL_CPINTC_ENABLE_REG12_ENABLE_414_MASK (0x40000000u)
  9985. #define CSL_CPINTC_ENABLE_REG12_ENABLE_414_SHIFT (0x0000001Eu)
  9986. #define CSL_CPINTC_ENABLE_REG12_ENABLE_414_RESETVAL (0x00000000u)
  9987. #define CSL_CPINTC_ENABLE_REG12_ENABLE_415_MASK (0x80000000u)
  9988. #define CSL_CPINTC_ENABLE_REG12_ENABLE_415_SHIFT (0x0000001Fu)
  9989. #define CSL_CPINTC_ENABLE_REG12_ENABLE_415_RESETVAL (0x00000000u)
  9990. #define CSL_CPINTC_ENABLE_REG12_RESETVAL (0x00000000u)
  9991. /* enable_reg13 */
  9992. #define CSL_CPINTC_ENABLE_REG13_ENABLE_416_MASK (0x00000001u)
  9993. #define CSL_CPINTC_ENABLE_REG13_ENABLE_416_SHIFT (0x00000000u)
  9994. #define CSL_CPINTC_ENABLE_REG13_ENABLE_416_RESETVAL (0x00000000u)
  9995. #define CSL_CPINTC_ENABLE_REG13_ENABLE_417_MASK (0x00000002u)
  9996. #define CSL_CPINTC_ENABLE_REG13_ENABLE_417_SHIFT (0x00000001u)
  9997. #define CSL_CPINTC_ENABLE_REG13_ENABLE_417_RESETVAL (0x00000000u)
  9998. #define CSL_CPINTC_ENABLE_REG13_ENABLE_418_MASK (0x00000004u)
  9999. #define CSL_CPINTC_ENABLE_REG13_ENABLE_418_SHIFT (0x00000002u)
  10000. #define CSL_CPINTC_ENABLE_REG13_ENABLE_418_RESETVAL (0x00000000u)
  10001. #define CSL_CPINTC_ENABLE_REG13_ENABLE_419_MASK (0x00000008u)
  10002. #define CSL_CPINTC_ENABLE_REG13_ENABLE_419_SHIFT (0x00000003u)
  10003. #define CSL_CPINTC_ENABLE_REG13_ENABLE_419_RESETVAL (0x00000000u)
  10004. #define CSL_CPINTC_ENABLE_REG13_ENABLE_420_MASK (0x00000010u)
  10005. #define CSL_CPINTC_ENABLE_REG13_ENABLE_420_SHIFT (0x00000004u)
  10006. #define CSL_CPINTC_ENABLE_REG13_ENABLE_420_RESETVAL (0x00000000u)
  10007. #define CSL_CPINTC_ENABLE_REG13_ENABLE_421_MASK (0x00000020u)
  10008. #define CSL_CPINTC_ENABLE_REG13_ENABLE_421_SHIFT (0x00000005u)
  10009. #define CSL_CPINTC_ENABLE_REG13_ENABLE_421_RESETVAL (0x00000000u)
  10010. #define CSL_CPINTC_ENABLE_REG13_ENABLE_422_MASK (0x00000040u)
  10011. #define CSL_CPINTC_ENABLE_REG13_ENABLE_422_SHIFT (0x00000006u)
  10012. #define CSL_CPINTC_ENABLE_REG13_ENABLE_422_RESETVAL (0x00000000u)
  10013. #define CSL_CPINTC_ENABLE_REG13_ENABLE_423_MASK (0x00000080u)
  10014. #define CSL_CPINTC_ENABLE_REG13_ENABLE_423_SHIFT (0x00000007u)
  10015. #define CSL_CPINTC_ENABLE_REG13_ENABLE_423_RESETVAL (0x00000000u)
  10016. #define CSL_CPINTC_ENABLE_REG13_ENABLE_424_MASK (0x00000100u)
  10017. #define CSL_CPINTC_ENABLE_REG13_ENABLE_424_SHIFT (0x00000008u)
  10018. #define CSL_CPINTC_ENABLE_REG13_ENABLE_424_RESETVAL (0x00000000u)
  10019. #define CSL_CPINTC_ENABLE_REG13_ENABLE_425_MASK (0x00000200u)
  10020. #define CSL_CPINTC_ENABLE_REG13_ENABLE_425_SHIFT (0x00000009u)
  10021. #define CSL_CPINTC_ENABLE_REG13_ENABLE_425_RESETVAL (0x00000000u)
  10022. #define CSL_CPINTC_ENABLE_REG13_ENABLE_426_MASK (0x00000400u)
  10023. #define CSL_CPINTC_ENABLE_REG13_ENABLE_426_SHIFT (0x0000000Au)
  10024. #define CSL_CPINTC_ENABLE_REG13_ENABLE_426_RESETVAL (0x00000000u)
  10025. #define CSL_CPINTC_ENABLE_REG13_ENABLE_427_MASK (0x00000800u)
  10026. #define CSL_CPINTC_ENABLE_REG13_ENABLE_427_SHIFT (0x0000000Bu)
  10027. #define CSL_CPINTC_ENABLE_REG13_ENABLE_427_RESETVAL (0x00000000u)
  10028. #define CSL_CPINTC_ENABLE_REG13_ENABLE_428_MASK (0x00001000u)
  10029. #define CSL_CPINTC_ENABLE_REG13_ENABLE_428_SHIFT (0x0000000Cu)
  10030. #define CSL_CPINTC_ENABLE_REG13_ENABLE_428_RESETVAL (0x00000000u)
  10031. #define CSL_CPINTC_ENABLE_REG13_ENABLE_429_MASK (0x00002000u)
  10032. #define CSL_CPINTC_ENABLE_REG13_ENABLE_429_SHIFT (0x0000000Du)
  10033. #define CSL_CPINTC_ENABLE_REG13_ENABLE_429_RESETVAL (0x00000000u)
  10034. #define CSL_CPINTC_ENABLE_REG13_ENABLE_430_MASK (0x00004000u)
  10035. #define CSL_CPINTC_ENABLE_REG13_ENABLE_430_SHIFT (0x0000000Eu)
  10036. #define CSL_CPINTC_ENABLE_REG13_ENABLE_430_RESETVAL (0x00000000u)
  10037. #define CSL_CPINTC_ENABLE_REG13_ENABLE_431_MASK (0x00008000u)
  10038. #define CSL_CPINTC_ENABLE_REG13_ENABLE_431_SHIFT (0x0000000Fu)
  10039. #define CSL_CPINTC_ENABLE_REG13_ENABLE_431_RESETVAL (0x00000000u)
  10040. #define CSL_CPINTC_ENABLE_REG13_ENABLE_432_MASK (0x00010000u)
  10041. #define CSL_CPINTC_ENABLE_REG13_ENABLE_432_SHIFT (0x00000010u)
  10042. #define CSL_CPINTC_ENABLE_REG13_ENABLE_432_RESETVAL (0x00000000u)
  10043. #define CSL_CPINTC_ENABLE_REG13_ENABLE_433_MASK (0x00020000u)
  10044. #define CSL_CPINTC_ENABLE_REG13_ENABLE_433_SHIFT (0x00000011u)
  10045. #define CSL_CPINTC_ENABLE_REG13_ENABLE_433_RESETVAL (0x00000000u)
  10046. #define CSL_CPINTC_ENABLE_REG13_ENABLE_434_MASK (0x00040000u)
  10047. #define CSL_CPINTC_ENABLE_REG13_ENABLE_434_SHIFT (0x00000012u)
  10048. #define CSL_CPINTC_ENABLE_REG13_ENABLE_434_RESETVAL (0x00000000u)
  10049. #define CSL_CPINTC_ENABLE_REG13_ENABLE_435_MASK (0x00080000u)
  10050. #define CSL_CPINTC_ENABLE_REG13_ENABLE_435_SHIFT (0x00000013u)
  10051. #define CSL_CPINTC_ENABLE_REG13_ENABLE_435_RESETVAL (0x00000000u)
  10052. #define CSL_CPINTC_ENABLE_REG13_ENABLE_436_MASK (0x00100000u)
  10053. #define CSL_CPINTC_ENABLE_REG13_ENABLE_436_SHIFT (0x00000014u)
  10054. #define CSL_CPINTC_ENABLE_REG13_ENABLE_436_RESETVAL (0x00000000u)
  10055. #define CSL_CPINTC_ENABLE_REG13_ENABLE_437_MASK (0x00200000u)
  10056. #define CSL_CPINTC_ENABLE_REG13_ENABLE_437_SHIFT (0x00000015u)
  10057. #define CSL_CPINTC_ENABLE_REG13_ENABLE_437_RESETVAL (0x00000000u)
  10058. #define CSL_CPINTC_ENABLE_REG13_ENABLE_438_MASK (0x00400000u)
  10059. #define CSL_CPINTC_ENABLE_REG13_ENABLE_438_SHIFT (0x00000016u)
  10060. #define CSL_CPINTC_ENABLE_REG13_ENABLE_438_RESETVAL (0x00000000u)
  10061. #define CSL_CPINTC_ENABLE_REG13_ENABLE_439_MASK (0x00800000u)
  10062. #define CSL_CPINTC_ENABLE_REG13_ENABLE_439_SHIFT (0x00000017u)
  10063. #define CSL_CPINTC_ENABLE_REG13_ENABLE_439_RESETVAL (0x00000000u)
  10064. #define CSL_CPINTC_ENABLE_REG13_ENABLE_440_MASK (0x01000000u)
  10065. #define CSL_CPINTC_ENABLE_REG13_ENABLE_440_SHIFT (0x00000018u)
  10066. #define CSL_CPINTC_ENABLE_REG13_ENABLE_440_RESETVAL (0x00000000u)
  10067. #define CSL_CPINTC_ENABLE_REG13_ENABLE_441_MASK (0x02000000u)
  10068. #define CSL_CPINTC_ENABLE_REG13_ENABLE_441_SHIFT (0x00000019u)
  10069. #define CSL_CPINTC_ENABLE_REG13_ENABLE_441_RESETVAL (0x00000000u)
  10070. #define CSL_CPINTC_ENABLE_REG13_ENABLE_442_MASK (0x04000000u)
  10071. #define CSL_CPINTC_ENABLE_REG13_ENABLE_442_SHIFT (0x0000001Au)
  10072. #define CSL_CPINTC_ENABLE_REG13_ENABLE_442_RESETVAL (0x00000000u)
  10073. #define CSL_CPINTC_ENABLE_REG13_ENABLE_443_MASK (0x08000000u)
  10074. #define CSL_CPINTC_ENABLE_REG13_ENABLE_443_SHIFT (0x0000001Bu)
  10075. #define CSL_CPINTC_ENABLE_REG13_ENABLE_443_RESETVAL (0x00000000u)
  10076. #define CSL_CPINTC_ENABLE_REG13_ENABLE_444_MASK (0x10000000u)
  10077. #define CSL_CPINTC_ENABLE_REG13_ENABLE_444_SHIFT (0x0000001Cu)
  10078. #define CSL_CPINTC_ENABLE_REG13_ENABLE_444_RESETVAL (0x00000000u)
  10079. #define CSL_CPINTC_ENABLE_REG13_ENABLE_445_MASK (0x20000000u)
  10080. #define CSL_CPINTC_ENABLE_REG13_ENABLE_445_SHIFT (0x0000001Du)
  10081. #define CSL_CPINTC_ENABLE_REG13_ENABLE_445_RESETVAL (0x00000000u)
  10082. #define CSL_CPINTC_ENABLE_REG13_ENABLE_446_MASK (0x40000000u)
  10083. #define CSL_CPINTC_ENABLE_REG13_ENABLE_446_SHIFT (0x0000001Eu)
  10084. #define CSL_CPINTC_ENABLE_REG13_ENABLE_446_RESETVAL (0x00000000u)
  10085. #define CSL_CPINTC_ENABLE_REG13_ENABLE_447_MASK (0x80000000u)
  10086. #define CSL_CPINTC_ENABLE_REG13_ENABLE_447_SHIFT (0x0000001Fu)
  10087. #define CSL_CPINTC_ENABLE_REG13_ENABLE_447_RESETVAL (0x00000000u)
  10088. #define CSL_CPINTC_ENABLE_REG13_RESETVAL (0x00000000u)
  10089. /* enable_reg14 */
  10090. #define CSL_CPINTC_ENABLE_REG14_ENABLE_448_MASK (0x00000001u)
  10091. #define CSL_CPINTC_ENABLE_REG14_ENABLE_448_SHIFT (0x00000000u)
  10092. #define CSL_CPINTC_ENABLE_REG14_ENABLE_448_RESETVAL (0x00000000u)
  10093. #define CSL_CPINTC_ENABLE_REG14_ENABLE_449_MASK (0x00000002u)
  10094. #define CSL_CPINTC_ENABLE_REG14_ENABLE_449_SHIFT (0x00000001u)
  10095. #define CSL_CPINTC_ENABLE_REG14_ENABLE_449_RESETVAL (0x00000000u)
  10096. #define CSL_CPINTC_ENABLE_REG14_ENABLE_450_MASK (0x00000004u)
  10097. #define CSL_CPINTC_ENABLE_REG14_ENABLE_450_SHIFT (0x00000002u)
  10098. #define CSL_CPINTC_ENABLE_REG14_ENABLE_450_RESETVAL (0x00000000u)
  10099. #define CSL_CPINTC_ENABLE_REG14_ENABLE_451_MASK (0x00000008u)
  10100. #define CSL_CPINTC_ENABLE_REG14_ENABLE_451_SHIFT (0x00000003u)
  10101. #define CSL_CPINTC_ENABLE_REG14_ENABLE_451_RESETVAL (0x00000000u)
  10102. #define CSL_CPINTC_ENABLE_REG14_ENABLE_452_MASK (0x00000010u)
  10103. #define CSL_CPINTC_ENABLE_REG14_ENABLE_452_SHIFT (0x00000004u)
  10104. #define CSL_CPINTC_ENABLE_REG14_ENABLE_452_RESETVAL (0x00000000u)
  10105. #define CSL_CPINTC_ENABLE_REG14_ENABLE_453_MASK (0x00000020u)
  10106. #define CSL_CPINTC_ENABLE_REG14_ENABLE_453_SHIFT (0x00000005u)
  10107. #define CSL_CPINTC_ENABLE_REG14_ENABLE_453_RESETVAL (0x00000000u)
  10108. #define CSL_CPINTC_ENABLE_REG14_ENABLE_454_MASK (0x00000040u)
  10109. #define CSL_CPINTC_ENABLE_REG14_ENABLE_454_SHIFT (0x00000006u)
  10110. #define CSL_CPINTC_ENABLE_REG14_ENABLE_454_RESETVAL (0x00000000u)
  10111. #define CSL_CPINTC_ENABLE_REG14_ENABLE_455_MASK (0x00000080u)
  10112. #define CSL_CPINTC_ENABLE_REG14_ENABLE_455_SHIFT (0x00000007u)
  10113. #define CSL_CPINTC_ENABLE_REG14_ENABLE_455_RESETVAL (0x00000000u)
  10114. #define CSL_CPINTC_ENABLE_REG14_ENABLE_456_MASK (0x00000100u)
  10115. #define CSL_CPINTC_ENABLE_REG14_ENABLE_456_SHIFT (0x00000008u)
  10116. #define CSL_CPINTC_ENABLE_REG14_ENABLE_456_RESETVAL (0x00000000u)
  10117. #define CSL_CPINTC_ENABLE_REG14_ENABLE_457_MASK (0x00000200u)
  10118. #define CSL_CPINTC_ENABLE_REG14_ENABLE_457_SHIFT (0x00000009u)
  10119. #define CSL_CPINTC_ENABLE_REG14_ENABLE_457_RESETVAL (0x00000000u)
  10120. #define CSL_CPINTC_ENABLE_REG14_ENABLE_458_MASK (0x00000400u)
  10121. #define CSL_CPINTC_ENABLE_REG14_ENABLE_458_SHIFT (0x0000000Au)
  10122. #define CSL_CPINTC_ENABLE_REG14_ENABLE_458_RESETVAL (0x00000000u)
  10123. #define CSL_CPINTC_ENABLE_REG14_ENABLE_459_MASK (0x00000800u)
  10124. #define CSL_CPINTC_ENABLE_REG14_ENABLE_459_SHIFT (0x0000000Bu)
  10125. #define CSL_CPINTC_ENABLE_REG14_ENABLE_459_RESETVAL (0x00000000u)
  10126. #define CSL_CPINTC_ENABLE_REG14_ENABLE_460_MASK (0x00001000u)
  10127. #define CSL_CPINTC_ENABLE_REG14_ENABLE_460_SHIFT (0x0000000Cu)
  10128. #define CSL_CPINTC_ENABLE_REG14_ENABLE_460_RESETVAL (0x00000000u)
  10129. #define CSL_CPINTC_ENABLE_REG14_ENABLE_461_MASK (0x00002000u)
  10130. #define CSL_CPINTC_ENABLE_REG14_ENABLE_461_SHIFT (0x0000000Du)
  10131. #define CSL_CPINTC_ENABLE_REG14_ENABLE_461_RESETVAL (0x00000000u)
  10132. #define CSL_CPINTC_ENABLE_REG14_ENABLE_462_MASK (0x00004000u)
  10133. #define CSL_CPINTC_ENABLE_REG14_ENABLE_462_SHIFT (0x0000000Eu)
  10134. #define CSL_CPINTC_ENABLE_REG14_ENABLE_462_RESETVAL (0x00000000u)
  10135. #define CSL_CPINTC_ENABLE_REG14_ENABLE_463_MASK (0x00008000u)
  10136. #define CSL_CPINTC_ENABLE_REG14_ENABLE_463_SHIFT (0x0000000Fu)
  10137. #define CSL_CPINTC_ENABLE_REG14_ENABLE_463_RESETVAL (0x00000000u)
  10138. #define CSL_CPINTC_ENABLE_REG14_ENABLE_464_MASK (0x00010000u)
  10139. #define CSL_CPINTC_ENABLE_REG14_ENABLE_464_SHIFT (0x00000010u)
  10140. #define CSL_CPINTC_ENABLE_REG14_ENABLE_464_RESETVAL (0x00000000u)
  10141. #define CSL_CPINTC_ENABLE_REG14_ENABLE_465_MASK (0x00020000u)
  10142. #define CSL_CPINTC_ENABLE_REG14_ENABLE_465_SHIFT (0x00000011u)
  10143. #define CSL_CPINTC_ENABLE_REG14_ENABLE_465_RESETVAL (0x00000000u)
  10144. #define CSL_CPINTC_ENABLE_REG14_ENABLE_466_MASK (0x00040000u)
  10145. #define CSL_CPINTC_ENABLE_REG14_ENABLE_466_SHIFT (0x00000012u)
  10146. #define CSL_CPINTC_ENABLE_REG14_ENABLE_466_RESETVAL (0x00000000u)
  10147. #define CSL_CPINTC_ENABLE_REG14_ENABLE_467_MASK (0x00080000u)
  10148. #define CSL_CPINTC_ENABLE_REG14_ENABLE_467_SHIFT (0x00000013u)
  10149. #define CSL_CPINTC_ENABLE_REG14_ENABLE_467_RESETVAL (0x00000000u)
  10150. #define CSL_CPINTC_ENABLE_REG14_ENABLE_468_MASK (0x00100000u)
  10151. #define CSL_CPINTC_ENABLE_REG14_ENABLE_468_SHIFT (0x00000014u)
  10152. #define CSL_CPINTC_ENABLE_REG14_ENABLE_468_RESETVAL (0x00000000u)
  10153. #define CSL_CPINTC_ENABLE_REG14_ENABLE_469_MASK (0x00200000u)
  10154. #define CSL_CPINTC_ENABLE_REG14_ENABLE_469_SHIFT (0x00000015u)
  10155. #define CSL_CPINTC_ENABLE_REG14_ENABLE_469_RESETVAL (0x00000000u)
  10156. #define CSL_CPINTC_ENABLE_REG14_ENABLE_470_MASK (0x00400000u)
  10157. #define CSL_CPINTC_ENABLE_REG14_ENABLE_470_SHIFT (0x00000016u)
  10158. #define CSL_CPINTC_ENABLE_REG14_ENABLE_470_RESETVAL (0x00000000u)
  10159. #define CSL_CPINTC_ENABLE_REG14_ENABLE_471_MASK (0x00800000u)
  10160. #define CSL_CPINTC_ENABLE_REG14_ENABLE_471_SHIFT (0x00000017u)
  10161. #define CSL_CPINTC_ENABLE_REG14_ENABLE_471_RESETVAL (0x00000000u)
  10162. #define CSL_CPINTC_ENABLE_REG14_ENABLE_472_MASK (0x01000000u)
  10163. #define CSL_CPINTC_ENABLE_REG14_ENABLE_472_SHIFT (0x00000018u)
  10164. #define CSL_CPINTC_ENABLE_REG14_ENABLE_472_RESETVAL (0x00000000u)
  10165. #define CSL_CPINTC_ENABLE_REG14_ENABLE_473_MASK (0x02000000u)
  10166. #define CSL_CPINTC_ENABLE_REG14_ENABLE_473_SHIFT (0x00000019u)
  10167. #define CSL_CPINTC_ENABLE_REG14_ENABLE_473_RESETVAL (0x00000000u)
  10168. #define CSL_CPINTC_ENABLE_REG14_ENABLE_474_MASK (0x04000000u)
  10169. #define CSL_CPINTC_ENABLE_REG14_ENABLE_474_SHIFT (0x0000001Au)
  10170. #define CSL_CPINTC_ENABLE_REG14_ENABLE_474_RESETVAL (0x00000000u)
  10171. #define CSL_CPINTC_ENABLE_REG14_ENABLE_475_MASK (0x08000000u)
  10172. #define CSL_CPINTC_ENABLE_REG14_ENABLE_475_SHIFT (0x0000001Bu)
  10173. #define CSL_CPINTC_ENABLE_REG14_ENABLE_475_RESETVAL (0x00000000u)
  10174. #define CSL_CPINTC_ENABLE_REG14_ENABLE_476_MASK (0x10000000u)
  10175. #define CSL_CPINTC_ENABLE_REG14_ENABLE_476_SHIFT (0x0000001Cu)
  10176. #define CSL_CPINTC_ENABLE_REG14_ENABLE_476_RESETVAL (0x00000000u)
  10177. #define CSL_CPINTC_ENABLE_REG14_ENABLE_477_MASK (0x20000000u)
  10178. #define CSL_CPINTC_ENABLE_REG14_ENABLE_477_SHIFT (0x0000001Du)
  10179. #define CSL_CPINTC_ENABLE_REG14_ENABLE_477_RESETVAL (0x00000000u)
  10180. #define CSL_CPINTC_ENABLE_REG14_ENABLE_478_MASK (0x40000000u)
  10181. #define CSL_CPINTC_ENABLE_REG14_ENABLE_478_SHIFT (0x0000001Eu)
  10182. #define CSL_CPINTC_ENABLE_REG14_ENABLE_478_RESETVAL (0x00000000u)
  10183. #define CSL_CPINTC_ENABLE_REG14_ENABLE_479_MASK (0x80000000u)
  10184. #define CSL_CPINTC_ENABLE_REG14_ENABLE_479_SHIFT (0x0000001Fu)
  10185. #define CSL_CPINTC_ENABLE_REG14_ENABLE_479_RESETVAL (0x00000000u)
  10186. #define CSL_CPINTC_ENABLE_REG14_RESETVAL (0x00000000u)
  10187. /* enable_reg15 */
  10188. #define CSL_CPINTC_ENABLE_REG15_ENABLE_480_MASK (0x00000001u)
  10189. #define CSL_CPINTC_ENABLE_REG15_ENABLE_480_SHIFT (0x00000000u)
  10190. #define CSL_CPINTC_ENABLE_REG15_ENABLE_480_RESETVAL (0x00000000u)
  10191. #define CSL_CPINTC_ENABLE_REG15_ENABLE_481_MASK (0x00000002u)
  10192. #define CSL_CPINTC_ENABLE_REG15_ENABLE_481_SHIFT (0x00000001u)
  10193. #define CSL_CPINTC_ENABLE_REG15_ENABLE_481_RESETVAL (0x00000000u)
  10194. #define CSL_CPINTC_ENABLE_REG15_ENABLE_482_MASK (0x00000004u)
  10195. #define CSL_CPINTC_ENABLE_REG15_ENABLE_482_SHIFT (0x00000002u)
  10196. #define CSL_CPINTC_ENABLE_REG15_ENABLE_482_RESETVAL (0x00000000u)
  10197. #define CSL_CPINTC_ENABLE_REG15_ENABLE_483_MASK (0x00000008u)
  10198. #define CSL_CPINTC_ENABLE_REG15_ENABLE_483_SHIFT (0x00000003u)
  10199. #define CSL_CPINTC_ENABLE_REG15_ENABLE_483_RESETVAL (0x00000000u)
  10200. #define CSL_CPINTC_ENABLE_REG15_ENABLE_484_MASK (0x00000010u)
  10201. #define CSL_CPINTC_ENABLE_REG15_ENABLE_484_SHIFT (0x00000004u)
  10202. #define CSL_CPINTC_ENABLE_REG15_ENABLE_484_RESETVAL (0x00000000u)
  10203. #define CSL_CPINTC_ENABLE_REG15_ENABLE_485_MASK (0x00000020u)
  10204. #define CSL_CPINTC_ENABLE_REG15_ENABLE_485_SHIFT (0x00000005u)
  10205. #define CSL_CPINTC_ENABLE_REG15_ENABLE_485_RESETVAL (0x00000000u)
  10206. #define CSL_CPINTC_ENABLE_REG15_ENABLE_486_MASK (0x00000040u)
  10207. #define CSL_CPINTC_ENABLE_REG15_ENABLE_486_SHIFT (0x00000006u)
  10208. #define CSL_CPINTC_ENABLE_REG15_ENABLE_486_RESETVAL (0x00000000u)
  10209. #define CSL_CPINTC_ENABLE_REG15_ENABLE_487_MASK (0x00000080u)
  10210. #define CSL_CPINTC_ENABLE_REG15_ENABLE_487_SHIFT (0x00000007u)
  10211. #define CSL_CPINTC_ENABLE_REG15_ENABLE_487_RESETVAL (0x00000000u)
  10212. #define CSL_CPINTC_ENABLE_REG15_ENABLE_488_MASK (0x00000100u)
  10213. #define CSL_CPINTC_ENABLE_REG15_ENABLE_488_SHIFT (0x00000008u)
  10214. #define CSL_CPINTC_ENABLE_REG15_ENABLE_488_RESETVAL (0x00000000u)
  10215. #define CSL_CPINTC_ENABLE_REG15_ENABLE_489_MASK (0x00000200u)
  10216. #define CSL_CPINTC_ENABLE_REG15_ENABLE_489_SHIFT (0x00000009u)
  10217. #define CSL_CPINTC_ENABLE_REG15_ENABLE_489_RESETVAL (0x00000000u)
  10218. #define CSL_CPINTC_ENABLE_REG15_ENABLE_490_MASK (0x00000400u)
  10219. #define CSL_CPINTC_ENABLE_REG15_ENABLE_490_SHIFT (0x0000000Au)
  10220. #define CSL_CPINTC_ENABLE_REG15_ENABLE_490_RESETVAL (0x00000000u)
  10221. #define CSL_CPINTC_ENABLE_REG15_ENABLE_491_MASK (0x00000800u)
  10222. #define CSL_CPINTC_ENABLE_REG15_ENABLE_491_SHIFT (0x0000000Bu)
  10223. #define CSL_CPINTC_ENABLE_REG15_ENABLE_491_RESETVAL (0x00000000u)
  10224. #define CSL_CPINTC_ENABLE_REG15_ENABLE_492_MASK (0x00001000u)
  10225. #define CSL_CPINTC_ENABLE_REG15_ENABLE_492_SHIFT (0x0000000Cu)
  10226. #define CSL_CPINTC_ENABLE_REG15_ENABLE_492_RESETVAL (0x00000000u)
  10227. #define CSL_CPINTC_ENABLE_REG15_ENABLE_493_MASK (0x00002000u)
  10228. #define CSL_CPINTC_ENABLE_REG15_ENABLE_493_SHIFT (0x0000000Du)
  10229. #define CSL_CPINTC_ENABLE_REG15_ENABLE_493_RESETVAL (0x00000000u)
  10230. #define CSL_CPINTC_ENABLE_REG15_ENABLE_494_MASK (0x00004000u)
  10231. #define CSL_CPINTC_ENABLE_REG15_ENABLE_494_SHIFT (0x0000000Eu)
  10232. #define CSL_CPINTC_ENABLE_REG15_ENABLE_494_RESETVAL (0x00000000u)
  10233. #define CSL_CPINTC_ENABLE_REG15_ENABLE_495_MASK (0x00008000u)
  10234. #define CSL_CPINTC_ENABLE_REG15_ENABLE_495_SHIFT (0x0000000Fu)
  10235. #define CSL_CPINTC_ENABLE_REG15_ENABLE_495_RESETVAL (0x00000000u)
  10236. #define CSL_CPINTC_ENABLE_REG15_ENABLE_496_MASK (0x00010000u)
  10237. #define CSL_CPINTC_ENABLE_REG15_ENABLE_496_SHIFT (0x00000010u)
  10238. #define CSL_CPINTC_ENABLE_REG15_ENABLE_496_RESETVAL (0x00000000u)
  10239. #define CSL_CPINTC_ENABLE_REG15_ENABLE_497_MASK (0x00020000u)
  10240. #define CSL_CPINTC_ENABLE_REG15_ENABLE_497_SHIFT (0x00000011u)
  10241. #define CSL_CPINTC_ENABLE_REG15_ENABLE_497_RESETVAL (0x00000000u)
  10242. #define CSL_CPINTC_ENABLE_REG15_ENABLE_498_MASK (0x00040000u)
  10243. #define CSL_CPINTC_ENABLE_REG15_ENABLE_498_SHIFT (0x00000012u)
  10244. #define CSL_CPINTC_ENABLE_REG15_ENABLE_498_RESETVAL (0x00000000u)
  10245. #define CSL_CPINTC_ENABLE_REG15_ENABLE_499_MASK (0x00080000u)
  10246. #define CSL_CPINTC_ENABLE_REG15_ENABLE_499_SHIFT (0x00000013u)
  10247. #define CSL_CPINTC_ENABLE_REG15_ENABLE_499_RESETVAL (0x00000000u)
  10248. #define CSL_CPINTC_ENABLE_REG15_ENABLE_500_MASK (0x00100000u)
  10249. #define CSL_CPINTC_ENABLE_REG15_ENABLE_500_SHIFT (0x00000014u)
  10250. #define CSL_CPINTC_ENABLE_REG15_ENABLE_500_RESETVAL (0x00000000u)
  10251. #define CSL_CPINTC_ENABLE_REG15_ENABLE_501_MASK (0x00200000u)
  10252. #define CSL_CPINTC_ENABLE_REG15_ENABLE_501_SHIFT (0x00000015u)
  10253. #define CSL_CPINTC_ENABLE_REG15_ENABLE_501_RESETVAL (0x00000000u)
  10254. #define CSL_CPINTC_ENABLE_REG15_ENABLE_502_MASK (0x00400000u)
  10255. #define CSL_CPINTC_ENABLE_REG15_ENABLE_502_SHIFT (0x00000016u)
  10256. #define CSL_CPINTC_ENABLE_REG15_ENABLE_502_RESETVAL (0x00000000u)
  10257. #define CSL_CPINTC_ENABLE_REG15_ENABLE_503_MASK (0x00800000u)
  10258. #define CSL_CPINTC_ENABLE_REG15_ENABLE_503_SHIFT (0x00000017u)
  10259. #define CSL_CPINTC_ENABLE_REG15_ENABLE_503_RESETVAL (0x00000000u)
  10260. #define CSL_CPINTC_ENABLE_REG15_ENABLE_504_MASK (0x01000000u)
  10261. #define CSL_CPINTC_ENABLE_REG15_ENABLE_504_SHIFT (0x00000018u)
  10262. #define CSL_CPINTC_ENABLE_REG15_ENABLE_504_RESETVAL (0x00000000u)
  10263. #define CSL_CPINTC_ENABLE_REG15_ENABLE_505_MASK (0x02000000u)
  10264. #define CSL_CPINTC_ENABLE_REG15_ENABLE_505_SHIFT (0x00000019u)
  10265. #define CSL_CPINTC_ENABLE_REG15_ENABLE_505_RESETVAL (0x00000000u)
  10266. #define CSL_CPINTC_ENABLE_REG15_ENABLE_506_MASK (0x04000000u)
  10267. #define CSL_CPINTC_ENABLE_REG15_ENABLE_506_SHIFT (0x0000001Au)
  10268. #define CSL_CPINTC_ENABLE_REG15_ENABLE_506_RESETVAL (0x00000000u)
  10269. #define CSL_CPINTC_ENABLE_REG15_ENABLE_507_MASK (0x08000000u)
  10270. #define CSL_CPINTC_ENABLE_REG15_ENABLE_507_SHIFT (0x0000001Bu)
  10271. #define CSL_CPINTC_ENABLE_REG15_ENABLE_507_RESETVAL (0x00000000u)
  10272. #define CSL_CPINTC_ENABLE_REG15_ENABLE_508_MASK (0x10000000u)
  10273. #define CSL_CPINTC_ENABLE_REG15_ENABLE_508_SHIFT (0x0000001Cu)
  10274. #define CSL_CPINTC_ENABLE_REG15_ENABLE_508_RESETVAL (0x00000000u)
  10275. #define CSL_CPINTC_ENABLE_REG15_ENABLE_509_MASK (0x20000000u)
  10276. #define CSL_CPINTC_ENABLE_REG15_ENABLE_509_SHIFT (0x0000001Du)
  10277. #define CSL_CPINTC_ENABLE_REG15_ENABLE_509_RESETVAL (0x00000000u)
  10278. #define CSL_CPINTC_ENABLE_REG15_ENABLE_510_MASK (0x40000000u)
  10279. #define CSL_CPINTC_ENABLE_REG15_ENABLE_510_SHIFT (0x0000001Eu)
  10280. #define CSL_CPINTC_ENABLE_REG15_ENABLE_510_RESETVAL (0x00000000u)
  10281. #define CSL_CPINTC_ENABLE_REG15_ENABLE_511_MASK (0x80000000u)
  10282. #define CSL_CPINTC_ENABLE_REG15_ENABLE_511_SHIFT (0x0000001Fu)
  10283. #define CSL_CPINTC_ENABLE_REG15_ENABLE_511_RESETVAL (0x00000000u)
  10284. #define CSL_CPINTC_ENABLE_REG15_RESETVAL (0x00000000u)
  10285. /* enable_reg16 */
  10286. #define CSL_CPINTC_ENABLE_REG16_ENABLE_512_MASK (0x00000001u)
  10287. #define CSL_CPINTC_ENABLE_REG16_ENABLE_512_SHIFT (0x00000000u)
  10288. #define CSL_CPINTC_ENABLE_REG16_ENABLE_512_RESETVAL (0x00000000u)
  10289. #define CSL_CPINTC_ENABLE_REG16_ENABLE_513_MASK (0x00000002u)
  10290. #define CSL_CPINTC_ENABLE_REG16_ENABLE_513_SHIFT (0x00000001u)
  10291. #define CSL_CPINTC_ENABLE_REG16_ENABLE_513_RESETVAL (0x00000000u)
  10292. #define CSL_CPINTC_ENABLE_REG16_ENABLE_514_MASK (0x00000004u)
  10293. #define CSL_CPINTC_ENABLE_REG16_ENABLE_514_SHIFT (0x00000002u)
  10294. #define CSL_CPINTC_ENABLE_REG16_ENABLE_514_RESETVAL (0x00000000u)
  10295. #define CSL_CPINTC_ENABLE_REG16_ENABLE_515_MASK (0x00000008u)
  10296. #define CSL_CPINTC_ENABLE_REG16_ENABLE_515_SHIFT (0x00000003u)
  10297. #define CSL_CPINTC_ENABLE_REG16_ENABLE_515_RESETVAL (0x00000000u)
  10298. #define CSL_CPINTC_ENABLE_REG16_ENABLE_516_MASK (0x00000010u)
  10299. #define CSL_CPINTC_ENABLE_REG16_ENABLE_516_SHIFT (0x00000004u)
  10300. #define CSL_CPINTC_ENABLE_REG16_ENABLE_516_RESETVAL (0x00000000u)
  10301. #define CSL_CPINTC_ENABLE_REG16_ENABLE_517_MASK (0x00000020u)
  10302. #define CSL_CPINTC_ENABLE_REG16_ENABLE_517_SHIFT (0x00000005u)
  10303. #define CSL_CPINTC_ENABLE_REG16_ENABLE_517_RESETVAL (0x00000000u)
  10304. #define CSL_CPINTC_ENABLE_REG16_ENABLE_518_MASK (0x00000040u)
  10305. #define CSL_CPINTC_ENABLE_REG16_ENABLE_518_SHIFT (0x00000006u)
  10306. #define CSL_CPINTC_ENABLE_REG16_ENABLE_518_RESETVAL (0x00000000u)
  10307. #define CSL_CPINTC_ENABLE_REG16_ENABLE_519_MASK (0x00000080u)
  10308. #define CSL_CPINTC_ENABLE_REG16_ENABLE_519_SHIFT (0x00000007u)
  10309. #define CSL_CPINTC_ENABLE_REG16_ENABLE_519_RESETVAL (0x00000000u)
  10310. #define CSL_CPINTC_ENABLE_REG16_ENABLE_520_MASK (0x00000100u)
  10311. #define CSL_CPINTC_ENABLE_REG16_ENABLE_520_SHIFT (0x00000008u)
  10312. #define CSL_CPINTC_ENABLE_REG16_ENABLE_520_RESETVAL (0x00000000u)
  10313. #define CSL_CPINTC_ENABLE_REG16_ENABLE_521_MASK (0x00000200u)
  10314. #define CSL_CPINTC_ENABLE_REG16_ENABLE_521_SHIFT (0x00000009u)
  10315. #define CSL_CPINTC_ENABLE_REG16_ENABLE_521_RESETVAL (0x00000000u)
  10316. #define CSL_CPINTC_ENABLE_REG16_ENABLE_522_MASK (0x00000400u)
  10317. #define CSL_CPINTC_ENABLE_REG16_ENABLE_522_SHIFT (0x0000000Au)
  10318. #define CSL_CPINTC_ENABLE_REG16_ENABLE_522_RESETVAL (0x00000000u)
  10319. #define CSL_CPINTC_ENABLE_REG16_ENABLE_523_MASK (0x00000800u)
  10320. #define CSL_CPINTC_ENABLE_REG16_ENABLE_523_SHIFT (0x0000000Bu)
  10321. #define CSL_CPINTC_ENABLE_REG16_ENABLE_523_RESETVAL (0x00000000u)
  10322. #define CSL_CPINTC_ENABLE_REG16_ENABLE_524_MASK (0x00001000u)
  10323. #define CSL_CPINTC_ENABLE_REG16_ENABLE_524_SHIFT (0x0000000Cu)
  10324. #define CSL_CPINTC_ENABLE_REG16_ENABLE_524_RESETVAL (0x00000000u)
  10325. #define CSL_CPINTC_ENABLE_REG16_ENABLE_525_MASK (0x00002000u)
  10326. #define CSL_CPINTC_ENABLE_REG16_ENABLE_525_SHIFT (0x0000000Du)
  10327. #define CSL_CPINTC_ENABLE_REG16_ENABLE_525_RESETVAL (0x00000000u)
  10328. #define CSL_CPINTC_ENABLE_REG16_ENABLE_526_MASK (0x00004000u)
  10329. #define CSL_CPINTC_ENABLE_REG16_ENABLE_526_SHIFT (0x0000000Eu)
  10330. #define CSL_CPINTC_ENABLE_REG16_ENABLE_526_RESETVAL (0x00000000u)
  10331. #define CSL_CPINTC_ENABLE_REG16_ENABLE_527_MASK (0x00008000u)
  10332. #define CSL_CPINTC_ENABLE_REG16_ENABLE_527_SHIFT (0x0000000Fu)
  10333. #define CSL_CPINTC_ENABLE_REG16_ENABLE_527_RESETVAL (0x00000000u)
  10334. #define CSL_CPINTC_ENABLE_REG16_ENABLE_528_MASK (0x00010000u)
  10335. #define CSL_CPINTC_ENABLE_REG16_ENABLE_528_SHIFT (0x00000010u)
  10336. #define CSL_CPINTC_ENABLE_REG16_ENABLE_528_RESETVAL (0x00000000u)
  10337. #define CSL_CPINTC_ENABLE_REG16_ENABLE_529_MASK (0x00020000u)
  10338. #define CSL_CPINTC_ENABLE_REG16_ENABLE_529_SHIFT (0x00000011u)
  10339. #define CSL_CPINTC_ENABLE_REG16_ENABLE_529_RESETVAL (0x00000000u)
  10340. #define CSL_CPINTC_ENABLE_REG16_ENABLE_530_MASK (0x00040000u)
  10341. #define CSL_CPINTC_ENABLE_REG16_ENABLE_530_SHIFT (0x00000012u)
  10342. #define CSL_CPINTC_ENABLE_REG16_ENABLE_530_RESETVAL (0x00000000u)
  10343. #define CSL_CPINTC_ENABLE_REG16_ENABLE_531_MASK (0x00080000u)
  10344. #define CSL_CPINTC_ENABLE_REG16_ENABLE_531_SHIFT (0x00000013u)
  10345. #define CSL_CPINTC_ENABLE_REG16_ENABLE_531_RESETVAL (0x00000000u)
  10346. #define CSL_CPINTC_ENABLE_REG16_ENABLE_532_MASK (0x00100000u)
  10347. #define CSL_CPINTC_ENABLE_REG16_ENABLE_532_SHIFT (0x00000014u)
  10348. #define CSL_CPINTC_ENABLE_REG16_ENABLE_532_RESETVAL (0x00000000u)
  10349. #define CSL_CPINTC_ENABLE_REG16_ENABLE_533_MASK (0x00200000u)
  10350. #define CSL_CPINTC_ENABLE_REG16_ENABLE_533_SHIFT (0x00000015u)
  10351. #define CSL_CPINTC_ENABLE_REG16_ENABLE_533_RESETVAL (0x00000000u)
  10352. #define CSL_CPINTC_ENABLE_REG16_ENABLE_534_MASK (0x00400000u)
  10353. #define CSL_CPINTC_ENABLE_REG16_ENABLE_534_SHIFT (0x00000016u)
  10354. #define CSL_CPINTC_ENABLE_REG16_ENABLE_534_RESETVAL (0x00000000u)
  10355. #define CSL_CPINTC_ENABLE_REG16_ENABLE_535_MASK (0x00800000u)
  10356. #define CSL_CPINTC_ENABLE_REG16_ENABLE_535_SHIFT (0x00000017u)
  10357. #define CSL_CPINTC_ENABLE_REG16_ENABLE_535_RESETVAL (0x00000000u)
  10358. #define CSL_CPINTC_ENABLE_REG16_ENABLE_536_MASK (0x01000000u)
  10359. #define CSL_CPINTC_ENABLE_REG16_ENABLE_536_SHIFT (0x00000018u)
  10360. #define CSL_CPINTC_ENABLE_REG16_ENABLE_536_RESETVAL (0x00000000u)
  10361. #define CSL_CPINTC_ENABLE_REG16_ENABLE_537_MASK (0x02000000u)
  10362. #define CSL_CPINTC_ENABLE_REG16_ENABLE_537_SHIFT (0x00000019u)
  10363. #define CSL_CPINTC_ENABLE_REG16_ENABLE_537_RESETVAL (0x00000000u)
  10364. #define CSL_CPINTC_ENABLE_REG16_ENABLE_538_MASK (0x04000000u)
  10365. #define CSL_CPINTC_ENABLE_REG16_ENABLE_538_SHIFT (0x0000001Au)
  10366. #define CSL_CPINTC_ENABLE_REG16_ENABLE_538_RESETVAL (0x00000000u)
  10367. #define CSL_CPINTC_ENABLE_REG16_ENABLE_539_MASK (0x08000000u)
  10368. #define CSL_CPINTC_ENABLE_REG16_ENABLE_539_SHIFT (0x0000001Bu)
  10369. #define CSL_CPINTC_ENABLE_REG16_ENABLE_539_RESETVAL (0x00000000u)
  10370. #define CSL_CPINTC_ENABLE_REG16_ENABLE_540_MASK (0x10000000u)
  10371. #define CSL_CPINTC_ENABLE_REG16_ENABLE_540_SHIFT (0x0000001Cu)
  10372. #define CSL_CPINTC_ENABLE_REG16_ENABLE_540_RESETVAL (0x00000000u)
  10373. #define CSL_CPINTC_ENABLE_REG16_ENABLE_541_MASK (0x20000000u)
  10374. #define CSL_CPINTC_ENABLE_REG16_ENABLE_541_SHIFT (0x0000001Du)
  10375. #define CSL_CPINTC_ENABLE_REG16_ENABLE_541_RESETVAL (0x00000000u)
  10376. #define CSL_CPINTC_ENABLE_REG16_ENABLE_542_MASK (0x40000000u)
  10377. #define CSL_CPINTC_ENABLE_REG16_ENABLE_542_SHIFT (0x0000001Eu)
  10378. #define CSL_CPINTC_ENABLE_REG16_ENABLE_542_RESETVAL (0x00000000u)
  10379. #define CSL_CPINTC_ENABLE_REG16_ENABLE_543_MASK (0x80000000u)
  10380. #define CSL_CPINTC_ENABLE_REG16_ENABLE_543_SHIFT (0x0000001Fu)
  10381. #define CSL_CPINTC_ENABLE_REG16_ENABLE_543_RESETVAL (0x00000000u)
  10382. #define CSL_CPINTC_ENABLE_REG16_RESETVAL (0x00000000u)
  10383. /* enable_reg17 */
  10384. #define CSL_CPINTC_ENABLE_REG17_ENABLE_544_MASK (0x00000001u)
  10385. #define CSL_CPINTC_ENABLE_REG17_ENABLE_544_SHIFT (0x00000000u)
  10386. #define CSL_CPINTC_ENABLE_REG17_ENABLE_544_RESETVAL (0x00000000u)
  10387. #define CSL_CPINTC_ENABLE_REG17_ENABLE_545_MASK (0x00000002u)
  10388. #define CSL_CPINTC_ENABLE_REG17_ENABLE_545_SHIFT (0x00000001u)
  10389. #define CSL_CPINTC_ENABLE_REG17_ENABLE_545_RESETVAL (0x00000000u)
  10390. #define CSL_CPINTC_ENABLE_REG17_ENABLE_546_MASK (0x00000004u)
  10391. #define CSL_CPINTC_ENABLE_REG17_ENABLE_546_SHIFT (0x00000002u)
  10392. #define CSL_CPINTC_ENABLE_REG17_ENABLE_546_RESETVAL (0x00000000u)
  10393. #define CSL_CPINTC_ENABLE_REG17_ENABLE_547_MASK (0x00000008u)
  10394. #define CSL_CPINTC_ENABLE_REG17_ENABLE_547_SHIFT (0x00000003u)
  10395. #define CSL_CPINTC_ENABLE_REG17_ENABLE_547_RESETVAL (0x00000000u)
  10396. #define CSL_CPINTC_ENABLE_REG17_ENABLE_548_MASK (0x00000010u)
  10397. #define CSL_CPINTC_ENABLE_REG17_ENABLE_548_SHIFT (0x00000004u)
  10398. #define CSL_CPINTC_ENABLE_REG17_ENABLE_548_RESETVAL (0x00000000u)
  10399. #define CSL_CPINTC_ENABLE_REG17_ENABLE_549_MASK (0x00000020u)
  10400. #define CSL_CPINTC_ENABLE_REG17_ENABLE_549_SHIFT (0x00000005u)
  10401. #define CSL_CPINTC_ENABLE_REG17_ENABLE_549_RESETVAL (0x00000000u)
  10402. #define CSL_CPINTC_ENABLE_REG17_ENABLE_550_MASK (0x00000040u)
  10403. #define CSL_CPINTC_ENABLE_REG17_ENABLE_550_SHIFT (0x00000006u)
  10404. #define CSL_CPINTC_ENABLE_REG17_ENABLE_550_RESETVAL (0x00000000u)
  10405. #define CSL_CPINTC_ENABLE_REG17_ENABLE_551_MASK (0x00000080u)
  10406. #define CSL_CPINTC_ENABLE_REG17_ENABLE_551_SHIFT (0x00000007u)
  10407. #define CSL_CPINTC_ENABLE_REG17_ENABLE_551_RESETVAL (0x00000000u)
  10408. #define CSL_CPINTC_ENABLE_REG17_ENABLE_552_MASK (0x00000100u)
  10409. #define CSL_CPINTC_ENABLE_REG17_ENABLE_552_SHIFT (0x00000008u)
  10410. #define CSL_CPINTC_ENABLE_REG17_ENABLE_552_RESETVAL (0x00000000u)
  10411. #define CSL_CPINTC_ENABLE_REG17_ENABLE_553_MASK (0x00000200u)
  10412. #define CSL_CPINTC_ENABLE_REG17_ENABLE_553_SHIFT (0x00000009u)
  10413. #define CSL_CPINTC_ENABLE_REG17_ENABLE_553_RESETVAL (0x00000000u)
  10414. #define CSL_CPINTC_ENABLE_REG17_ENABLE_554_MASK (0x00000400u)
  10415. #define CSL_CPINTC_ENABLE_REG17_ENABLE_554_SHIFT (0x0000000Au)
  10416. #define CSL_CPINTC_ENABLE_REG17_ENABLE_554_RESETVAL (0x00000000u)
  10417. #define CSL_CPINTC_ENABLE_REG17_ENABLE_555_MASK (0x00000800u)
  10418. #define CSL_CPINTC_ENABLE_REG17_ENABLE_555_SHIFT (0x0000000Bu)
  10419. #define CSL_CPINTC_ENABLE_REG17_ENABLE_555_RESETVAL (0x00000000u)
  10420. #define CSL_CPINTC_ENABLE_REG17_ENABLE_556_MASK (0x00001000u)
  10421. #define CSL_CPINTC_ENABLE_REG17_ENABLE_556_SHIFT (0x0000000Cu)
  10422. #define CSL_CPINTC_ENABLE_REG17_ENABLE_556_RESETVAL (0x00000000u)
  10423. #define CSL_CPINTC_ENABLE_REG17_ENABLE_557_MASK (0x00002000u)
  10424. #define CSL_CPINTC_ENABLE_REG17_ENABLE_557_SHIFT (0x0000000Du)
  10425. #define CSL_CPINTC_ENABLE_REG17_ENABLE_557_RESETVAL (0x00000000u)
  10426. #define CSL_CPINTC_ENABLE_REG17_ENABLE_558_MASK (0x00004000u)
  10427. #define CSL_CPINTC_ENABLE_REG17_ENABLE_558_SHIFT (0x0000000Eu)
  10428. #define CSL_CPINTC_ENABLE_REG17_ENABLE_558_RESETVAL (0x00000000u)
  10429. #define CSL_CPINTC_ENABLE_REG17_ENABLE_559_MASK (0x00008000u)
  10430. #define CSL_CPINTC_ENABLE_REG17_ENABLE_559_SHIFT (0x0000000Fu)
  10431. #define CSL_CPINTC_ENABLE_REG17_ENABLE_559_RESETVAL (0x00000000u)
  10432. #define CSL_CPINTC_ENABLE_REG17_ENABLE_560_MASK (0x00010000u)
  10433. #define CSL_CPINTC_ENABLE_REG17_ENABLE_560_SHIFT (0x00000010u)
  10434. #define CSL_CPINTC_ENABLE_REG17_ENABLE_560_RESETVAL (0x00000000u)
  10435. #define CSL_CPINTC_ENABLE_REG17_ENABLE_561_MASK (0x00020000u)
  10436. #define CSL_CPINTC_ENABLE_REG17_ENABLE_561_SHIFT (0x00000011u)
  10437. #define CSL_CPINTC_ENABLE_REG17_ENABLE_561_RESETVAL (0x00000000u)
  10438. #define CSL_CPINTC_ENABLE_REG17_ENABLE_562_MASK (0x00040000u)
  10439. #define CSL_CPINTC_ENABLE_REG17_ENABLE_562_SHIFT (0x00000012u)
  10440. #define CSL_CPINTC_ENABLE_REG17_ENABLE_562_RESETVAL (0x00000000u)
  10441. #define CSL_CPINTC_ENABLE_REG17_ENABLE_563_MASK (0x00080000u)
  10442. #define CSL_CPINTC_ENABLE_REG17_ENABLE_563_SHIFT (0x00000013u)
  10443. #define CSL_CPINTC_ENABLE_REG17_ENABLE_563_RESETVAL (0x00000000u)
  10444. #define CSL_CPINTC_ENABLE_REG17_ENABLE_564_MASK (0x00100000u)
  10445. #define CSL_CPINTC_ENABLE_REG17_ENABLE_564_SHIFT (0x00000014u)
  10446. #define CSL_CPINTC_ENABLE_REG17_ENABLE_564_RESETVAL (0x00000000u)
  10447. #define CSL_CPINTC_ENABLE_REG17_ENABLE_565_MASK (0x00200000u)
  10448. #define CSL_CPINTC_ENABLE_REG17_ENABLE_565_SHIFT (0x00000015u)
  10449. #define CSL_CPINTC_ENABLE_REG17_ENABLE_565_RESETVAL (0x00000000u)
  10450. #define CSL_CPINTC_ENABLE_REG17_ENABLE_566_MASK (0x00400000u)
  10451. #define CSL_CPINTC_ENABLE_REG17_ENABLE_566_SHIFT (0x00000016u)
  10452. #define CSL_CPINTC_ENABLE_REG17_ENABLE_566_RESETVAL (0x00000000u)
  10453. #define CSL_CPINTC_ENABLE_REG17_ENABLE_567_MASK (0x00800000u)
  10454. #define CSL_CPINTC_ENABLE_REG17_ENABLE_567_SHIFT (0x00000017u)
  10455. #define CSL_CPINTC_ENABLE_REG17_ENABLE_567_RESETVAL (0x00000000u)
  10456. #define CSL_CPINTC_ENABLE_REG17_ENABLE_568_MASK (0x01000000u)
  10457. #define CSL_CPINTC_ENABLE_REG17_ENABLE_568_SHIFT (0x00000018u)
  10458. #define CSL_CPINTC_ENABLE_REG17_ENABLE_568_RESETVAL (0x00000000u)
  10459. #define CSL_CPINTC_ENABLE_REG17_ENABLE_569_MASK (0x02000000u)
  10460. #define CSL_CPINTC_ENABLE_REG17_ENABLE_569_SHIFT (0x00000019u)
  10461. #define CSL_CPINTC_ENABLE_REG17_ENABLE_569_RESETVAL (0x00000000u)
  10462. #define CSL_CPINTC_ENABLE_REG17_ENABLE_570_MASK (0x04000000u)
  10463. #define CSL_CPINTC_ENABLE_REG17_ENABLE_570_SHIFT (0x0000001Au)
  10464. #define CSL_CPINTC_ENABLE_REG17_ENABLE_570_RESETVAL (0x00000000u)
  10465. #define CSL_CPINTC_ENABLE_REG17_ENABLE_571_MASK (0x08000000u)
  10466. #define CSL_CPINTC_ENABLE_REG17_ENABLE_571_SHIFT (0x0000001Bu)
  10467. #define CSL_CPINTC_ENABLE_REG17_ENABLE_571_RESETVAL (0x00000000u)
  10468. #define CSL_CPINTC_ENABLE_REG17_ENABLE_572_MASK (0x10000000u)
  10469. #define CSL_CPINTC_ENABLE_REG17_ENABLE_572_SHIFT (0x0000001Cu)
  10470. #define CSL_CPINTC_ENABLE_REG17_ENABLE_572_RESETVAL (0x00000000u)
  10471. #define CSL_CPINTC_ENABLE_REG17_ENABLE_573_MASK (0x20000000u)
  10472. #define CSL_CPINTC_ENABLE_REG17_ENABLE_573_SHIFT (0x0000001Du)
  10473. #define CSL_CPINTC_ENABLE_REG17_ENABLE_573_RESETVAL (0x00000000u)
  10474. #define CSL_CPINTC_ENABLE_REG17_ENABLE_574_MASK (0x40000000u)
  10475. #define CSL_CPINTC_ENABLE_REG17_ENABLE_574_SHIFT (0x0000001Eu)
  10476. #define CSL_CPINTC_ENABLE_REG17_ENABLE_574_RESETVAL (0x00000000u)
  10477. #define CSL_CPINTC_ENABLE_REG17_ENABLE_575_MASK (0x80000000u)
  10478. #define CSL_CPINTC_ENABLE_REG17_ENABLE_575_SHIFT (0x0000001Fu)
  10479. #define CSL_CPINTC_ENABLE_REG17_ENABLE_575_RESETVAL (0x00000000u)
  10480. #define CSL_CPINTC_ENABLE_REG17_RESETVAL (0x00000000u)
  10481. /* enable_reg18 */
  10482. #define CSL_CPINTC_ENABLE_REG18_ENABLE_576_MASK (0x00000001u)
  10483. #define CSL_CPINTC_ENABLE_REG18_ENABLE_576_SHIFT (0x00000000u)
  10484. #define CSL_CPINTC_ENABLE_REG18_ENABLE_576_RESETVAL (0x00000000u)
  10485. #define CSL_CPINTC_ENABLE_REG18_ENABLE_577_MASK (0x00000002u)
  10486. #define CSL_CPINTC_ENABLE_REG18_ENABLE_577_SHIFT (0x00000001u)
  10487. #define CSL_CPINTC_ENABLE_REG18_ENABLE_577_RESETVAL (0x00000000u)
  10488. #define CSL_CPINTC_ENABLE_REG18_ENABLE_578_MASK (0x00000004u)
  10489. #define CSL_CPINTC_ENABLE_REG18_ENABLE_578_SHIFT (0x00000002u)
  10490. #define CSL_CPINTC_ENABLE_REG18_ENABLE_578_RESETVAL (0x00000000u)
  10491. #define CSL_CPINTC_ENABLE_REG18_ENABLE_579_MASK (0x00000008u)
  10492. #define CSL_CPINTC_ENABLE_REG18_ENABLE_579_SHIFT (0x00000003u)
  10493. #define CSL_CPINTC_ENABLE_REG18_ENABLE_579_RESETVAL (0x00000000u)
  10494. #define CSL_CPINTC_ENABLE_REG18_ENABLE_580_MASK (0x00000010u)
  10495. #define CSL_CPINTC_ENABLE_REG18_ENABLE_580_SHIFT (0x00000004u)
  10496. #define CSL_CPINTC_ENABLE_REG18_ENABLE_580_RESETVAL (0x00000000u)
  10497. #define CSL_CPINTC_ENABLE_REG18_ENABLE_581_MASK (0x00000020u)
  10498. #define CSL_CPINTC_ENABLE_REG18_ENABLE_581_SHIFT (0x00000005u)
  10499. #define CSL_CPINTC_ENABLE_REG18_ENABLE_581_RESETVAL (0x00000000u)
  10500. #define CSL_CPINTC_ENABLE_REG18_ENABLE_582_MASK (0x00000040u)
  10501. #define CSL_CPINTC_ENABLE_REG18_ENABLE_582_SHIFT (0x00000006u)
  10502. #define CSL_CPINTC_ENABLE_REG18_ENABLE_582_RESETVAL (0x00000000u)
  10503. #define CSL_CPINTC_ENABLE_REG18_ENABLE_583_MASK (0x00000080u)
  10504. #define CSL_CPINTC_ENABLE_REG18_ENABLE_583_SHIFT (0x00000007u)
  10505. #define CSL_CPINTC_ENABLE_REG18_ENABLE_583_RESETVAL (0x00000000u)
  10506. #define CSL_CPINTC_ENABLE_REG18_ENABLE_584_MASK (0x00000100u)
  10507. #define CSL_CPINTC_ENABLE_REG18_ENABLE_584_SHIFT (0x00000008u)
  10508. #define CSL_CPINTC_ENABLE_REG18_ENABLE_584_RESETVAL (0x00000000u)
  10509. #define CSL_CPINTC_ENABLE_REG18_ENABLE_585_MASK (0x00000200u)
  10510. #define CSL_CPINTC_ENABLE_REG18_ENABLE_585_SHIFT (0x00000009u)
  10511. #define CSL_CPINTC_ENABLE_REG18_ENABLE_585_RESETVAL (0x00000000u)
  10512. #define CSL_CPINTC_ENABLE_REG18_ENABLE_586_MASK (0x00000400u)
  10513. #define CSL_CPINTC_ENABLE_REG18_ENABLE_586_SHIFT (0x0000000Au)
  10514. #define CSL_CPINTC_ENABLE_REG18_ENABLE_586_RESETVAL (0x00000000u)
  10515. #define CSL_CPINTC_ENABLE_REG18_ENABLE_587_MASK (0x00000800u)
  10516. #define CSL_CPINTC_ENABLE_REG18_ENABLE_587_SHIFT (0x0000000Bu)
  10517. #define CSL_CPINTC_ENABLE_REG18_ENABLE_587_RESETVAL (0x00000000u)
  10518. #define CSL_CPINTC_ENABLE_REG18_ENABLE_588_MASK (0x00001000u)
  10519. #define CSL_CPINTC_ENABLE_REG18_ENABLE_588_SHIFT (0x0000000Cu)
  10520. #define CSL_CPINTC_ENABLE_REG18_ENABLE_588_RESETVAL (0x00000000u)
  10521. #define CSL_CPINTC_ENABLE_REG18_ENABLE_589_MASK (0x00002000u)
  10522. #define CSL_CPINTC_ENABLE_REG18_ENABLE_589_SHIFT (0x0000000Du)
  10523. #define CSL_CPINTC_ENABLE_REG18_ENABLE_589_RESETVAL (0x00000000u)
  10524. #define CSL_CPINTC_ENABLE_REG18_ENABLE_590_MASK (0x00004000u)
  10525. #define CSL_CPINTC_ENABLE_REG18_ENABLE_590_SHIFT (0x0000000Eu)
  10526. #define CSL_CPINTC_ENABLE_REG18_ENABLE_590_RESETVAL (0x00000000u)
  10527. #define CSL_CPINTC_ENABLE_REG18_ENABLE_591_MASK (0x00008000u)
  10528. #define CSL_CPINTC_ENABLE_REG18_ENABLE_591_SHIFT (0x0000000Fu)
  10529. #define CSL_CPINTC_ENABLE_REG18_ENABLE_591_RESETVAL (0x00000000u)
  10530. #define CSL_CPINTC_ENABLE_REG18_ENABLE_592_MASK (0x00010000u)
  10531. #define CSL_CPINTC_ENABLE_REG18_ENABLE_592_SHIFT (0x00000010u)
  10532. #define CSL_CPINTC_ENABLE_REG18_ENABLE_592_RESETVAL (0x00000000u)
  10533. #define CSL_CPINTC_ENABLE_REG18_ENABLE_593_MASK (0x00020000u)
  10534. #define CSL_CPINTC_ENABLE_REG18_ENABLE_593_SHIFT (0x00000011u)
  10535. #define CSL_CPINTC_ENABLE_REG18_ENABLE_593_RESETVAL (0x00000000u)
  10536. #define CSL_CPINTC_ENABLE_REG18_ENABLE_594_MASK (0x00040000u)
  10537. #define CSL_CPINTC_ENABLE_REG18_ENABLE_594_SHIFT (0x00000012u)
  10538. #define CSL_CPINTC_ENABLE_REG18_ENABLE_594_RESETVAL (0x00000000u)
  10539. #define CSL_CPINTC_ENABLE_REG18_ENABLE_595_MASK (0x00080000u)
  10540. #define CSL_CPINTC_ENABLE_REG18_ENABLE_595_SHIFT (0x00000013u)
  10541. #define CSL_CPINTC_ENABLE_REG18_ENABLE_595_RESETVAL (0x00000000u)
  10542. #define CSL_CPINTC_ENABLE_REG18_ENABLE_596_MASK (0x00100000u)
  10543. #define CSL_CPINTC_ENABLE_REG18_ENABLE_596_SHIFT (0x00000014u)
  10544. #define CSL_CPINTC_ENABLE_REG18_ENABLE_596_RESETVAL (0x00000000u)
  10545. #define CSL_CPINTC_ENABLE_REG18_ENABLE_597_MASK (0x00200000u)
  10546. #define CSL_CPINTC_ENABLE_REG18_ENABLE_597_SHIFT (0x00000015u)
  10547. #define CSL_CPINTC_ENABLE_REG18_ENABLE_597_RESETVAL (0x00000000u)
  10548. #define CSL_CPINTC_ENABLE_REG18_ENABLE_598_MASK (0x00400000u)
  10549. #define CSL_CPINTC_ENABLE_REG18_ENABLE_598_SHIFT (0x00000016u)
  10550. #define CSL_CPINTC_ENABLE_REG18_ENABLE_598_RESETVAL (0x00000000u)
  10551. #define CSL_CPINTC_ENABLE_REG18_ENABLE_599_MASK (0x00800000u)
  10552. #define CSL_CPINTC_ENABLE_REG18_ENABLE_599_SHIFT (0x00000017u)
  10553. #define CSL_CPINTC_ENABLE_REG18_ENABLE_599_RESETVAL (0x00000000u)
  10554. #define CSL_CPINTC_ENABLE_REG18_ENABLE_600_MASK (0x01000000u)
  10555. #define CSL_CPINTC_ENABLE_REG18_ENABLE_600_SHIFT (0x00000018u)
  10556. #define CSL_CPINTC_ENABLE_REG18_ENABLE_600_RESETVAL (0x00000000u)
  10557. #define CSL_CPINTC_ENABLE_REG18_ENABLE_601_MASK (0x02000000u)
  10558. #define CSL_CPINTC_ENABLE_REG18_ENABLE_601_SHIFT (0x00000019u)
  10559. #define CSL_CPINTC_ENABLE_REG18_ENABLE_601_RESETVAL (0x00000000u)
  10560. #define CSL_CPINTC_ENABLE_REG18_ENABLE_602_MASK (0x04000000u)
  10561. #define CSL_CPINTC_ENABLE_REG18_ENABLE_602_SHIFT (0x0000001Au)
  10562. #define CSL_CPINTC_ENABLE_REG18_ENABLE_602_RESETVAL (0x00000000u)
  10563. #define CSL_CPINTC_ENABLE_REG18_ENABLE_603_MASK (0x08000000u)
  10564. #define CSL_CPINTC_ENABLE_REG18_ENABLE_603_SHIFT (0x0000001Bu)
  10565. #define CSL_CPINTC_ENABLE_REG18_ENABLE_603_RESETVAL (0x00000000u)
  10566. #define CSL_CPINTC_ENABLE_REG18_ENABLE_604_MASK (0x10000000u)
  10567. #define CSL_CPINTC_ENABLE_REG18_ENABLE_604_SHIFT (0x0000001Cu)
  10568. #define CSL_CPINTC_ENABLE_REG18_ENABLE_604_RESETVAL (0x00000000u)
  10569. #define CSL_CPINTC_ENABLE_REG18_ENABLE_605_MASK (0x20000000u)
  10570. #define CSL_CPINTC_ENABLE_REG18_ENABLE_605_SHIFT (0x0000001Du)
  10571. #define CSL_CPINTC_ENABLE_REG18_ENABLE_605_RESETVAL (0x00000000u)
  10572. #define CSL_CPINTC_ENABLE_REG18_ENABLE_606_MASK (0x40000000u)
  10573. #define CSL_CPINTC_ENABLE_REG18_ENABLE_606_SHIFT (0x0000001Eu)
  10574. #define CSL_CPINTC_ENABLE_REG18_ENABLE_606_RESETVAL (0x00000000u)
  10575. #define CSL_CPINTC_ENABLE_REG18_ENABLE_607_MASK (0x80000000u)
  10576. #define CSL_CPINTC_ENABLE_REG18_ENABLE_607_SHIFT (0x0000001Fu)
  10577. #define CSL_CPINTC_ENABLE_REG18_ENABLE_607_RESETVAL (0x00000000u)
  10578. #define CSL_CPINTC_ENABLE_REG18_RESETVAL (0x00000000u)
  10579. /* enable_reg19 */
  10580. #define CSL_CPINTC_ENABLE_REG19_ENABLE_608_MASK (0x00000001u)
  10581. #define CSL_CPINTC_ENABLE_REG19_ENABLE_608_SHIFT (0x00000000u)
  10582. #define CSL_CPINTC_ENABLE_REG19_ENABLE_608_RESETVAL (0x00000000u)
  10583. #define CSL_CPINTC_ENABLE_REG19_ENABLE_609_MASK (0x00000002u)
  10584. #define CSL_CPINTC_ENABLE_REG19_ENABLE_609_SHIFT (0x00000001u)
  10585. #define CSL_CPINTC_ENABLE_REG19_ENABLE_609_RESETVAL (0x00000000u)
  10586. #define CSL_CPINTC_ENABLE_REG19_ENABLE_610_MASK (0x00000004u)
  10587. #define CSL_CPINTC_ENABLE_REG19_ENABLE_610_SHIFT (0x00000002u)
  10588. #define CSL_CPINTC_ENABLE_REG19_ENABLE_610_RESETVAL (0x00000000u)
  10589. #define CSL_CPINTC_ENABLE_REG19_ENABLE_611_MASK (0x00000008u)
  10590. #define CSL_CPINTC_ENABLE_REG19_ENABLE_611_SHIFT (0x00000003u)
  10591. #define CSL_CPINTC_ENABLE_REG19_ENABLE_611_RESETVAL (0x00000000u)
  10592. #define CSL_CPINTC_ENABLE_REG19_ENABLE_612_MASK (0x00000010u)
  10593. #define CSL_CPINTC_ENABLE_REG19_ENABLE_612_SHIFT (0x00000004u)
  10594. #define CSL_CPINTC_ENABLE_REG19_ENABLE_612_RESETVAL (0x00000000u)
  10595. #define CSL_CPINTC_ENABLE_REG19_ENABLE_613_MASK (0x00000020u)
  10596. #define CSL_CPINTC_ENABLE_REG19_ENABLE_613_SHIFT (0x00000005u)
  10597. #define CSL_CPINTC_ENABLE_REG19_ENABLE_613_RESETVAL (0x00000000u)
  10598. #define CSL_CPINTC_ENABLE_REG19_ENABLE_614_MASK (0x00000040u)
  10599. #define CSL_CPINTC_ENABLE_REG19_ENABLE_614_SHIFT (0x00000006u)
  10600. #define CSL_CPINTC_ENABLE_REG19_ENABLE_614_RESETVAL (0x00000000u)
  10601. #define CSL_CPINTC_ENABLE_REG19_ENABLE_615_MASK (0x00000080u)
  10602. #define CSL_CPINTC_ENABLE_REG19_ENABLE_615_SHIFT (0x00000007u)
  10603. #define CSL_CPINTC_ENABLE_REG19_ENABLE_615_RESETVAL (0x00000000u)
  10604. #define CSL_CPINTC_ENABLE_REG19_ENABLE_616_MASK (0x00000100u)
  10605. #define CSL_CPINTC_ENABLE_REG19_ENABLE_616_SHIFT (0x00000008u)
  10606. #define CSL_CPINTC_ENABLE_REG19_ENABLE_616_RESETVAL (0x00000000u)
  10607. #define CSL_CPINTC_ENABLE_REG19_ENABLE_617_MASK (0x00000200u)
  10608. #define CSL_CPINTC_ENABLE_REG19_ENABLE_617_SHIFT (0x00000009u)
  10609. #define CSL_CPINTC_ENABLE_REG19_ENABLE_617_RESETVAL (0x00000000u)
  10610. #define CSL_CPINTC_ENABLE_REG19_ENABLE_618_MASK (0x00000400u)
  10611. #define CSL_CPINTC_ENABLE_REG19_ENABLE_618_SHIFT (0x0000000Au)
  10612. #define CSL_CPINTC_ENABLE_REG19_ENABLE_618_RESETVAL (0x00000000u)
  10613. #define CSL_CPINTC_ENABLE_REG19_ENABLE_619_MASK (0x00000800u)
  10614. #define CSL_CPINTC_ENABLE_REG19_ENABLE_619_SHIFT (0x0000000Bu)
  10615. #define CSL_CPINTC_ENABLE_REG19_ENABLE_619_RESETVAL (0x00000000u)
  10616. #define CSL_CPINTC_ENABLE_REG19_ENABLE_620_MASK (0x00001000u)
  10617. #define CSL_CPINTC_ENABLE_REG19_ENABLE_620_SHIFT (0x0000000Cu)
  10618. #define CSL_CPINTC_ENABLE_REG19_ENABLE_620_RESETVAL (0x00000000u)
  10619. #define CSL_CPINTC_ENABLE_REG19_ENABLE_621_MASK (0x00002000u)
  10620. #define CSL_CPINTC_ENABLE_REG19_ENABLE_621_SHIFT (0x0000000Du)
  10621. #define CSL_CPINTC_ENABLE_REG19_ENABLE_621_RESETVAL (0x00000000u)
  10622. #define CSL_CPINTC_ENABLE_REG19_ENABLE_622_MASK (0x00004000u)
  10623. #define CSL_CPINTC_ENABLE_REG19_ENABLE_622_SHIFT (0x0000000Eu)
  10624. #define CSL_CPINTC_ENABLE_REG19_ENABLE_622_RESETVAL (0x00000000u)
  10625. #define CSL_CPINTC_ENABLE_REG19_ENABLE_623_MASK (0x00008000u)
  10626. #define CSL_CPINTC_ENABLE_REG19_ENABLE_623_SHIFT (0x0000000Fu)
  10627. #define CSL_CPINTC_ENABLE_REG19_ENABLE_623_RESETVAL (0x00000000u)
  10628. #define CSL_CPINTC_ENABLE_REG19_ENABLE_624_MASK (0x00010000u)
  10629. #define CSL_CPINTC_ENABLE_REG19_ENABLE_624_SHIFT (0x00000010u)
  10630. #define CSL_CPINTC_ENABLE_REG19_ENABLE_624_RESETVAL (0x00000000u)
  10631. #define CSL_CPINTC_ENABLE_REG19_ENABLE_625_MASK (0x00020000u)
  10632. #define CSL_CPINTC_ENABLE_REG19_ENABLE_625_SHIFT (0x00000011u)
  10633. #define CSL_CPINTC_ENABLE_REG19_ENABLE_625_RESETVAL (0x00000000u)
  10634. #define CSL_CPINTC_ENABLE_REG19_ENABLE_626_MASK (0x00040000u)
  10635. #define CSL_CPINTC_ENABLE_REG19_ENABLE_626_SHIFT (0x00000012u)
  10636. #define CSL_CPINTC_ENABLE_REG19_ENABLE_626_RESETVAL (0x00000000u)
  10637. #define CSL_CPINTC_ENABLE_REG19_ENABLE_627_MASK (0x00080000u)
  10638. #define CSL_CPINTC_ENABLE_REG19_ENABLE_627_SHIFT (0x00000013u)
  10639. #define CSL_CPINTC_ENABLE_REG19_ENABLE_627_RESETVAL (0x00000000u)
  10640. #define CSL_CPINTC_ENABLE_REG19_ENABLE_628_MASK (0x00100000u)
  10641. #define CSL_CPINTC_ENABLE_REG19_ENABLE_628_SHIFT (0x00000014u)
  10642. #define CSL_CPINTC_ENABLE_REG19_ENABLE_628_RESETVAL (0x00000000u)
  10643. #define CSL_CPINTC_ENABLE_REG19_ENABLE_629_MASK (0x00200000u)
  10644. #define CSL_CPINTC_ENABLE_REG19_ENABLE_629_SHIFT (0x00000015u)
  10645. #define CSL_CPINTC_ENABLE_REG19_ENABLE_629_RESETVAL (0x00000000u)
  10646. #define CSL_CPINTC_ENABLE_REG19_ENABLE_630_MASK (0x00400000u)
  10647. #define CSL_CPINTC_ENABLE_REG19_ENABLE_630_SHIFT (0x00000016u)
  10648. #define CSL_CPINTC_ENABLE_REG19_ENABLE_630_RESETVAL (0x00000000u)
  10649. #define CSL_CPINTC_ENABLE_REG19_ENABLE_631_MASK (0x00800000u)
  10650. #define CSL_CPINTC_ENABLE_REG19_ENABLE_631_SHIFT (0x00000017u)
  10651. #define CSL_CPINTC_ENABLE_REG19_ENABLE_631_RESETVAL (0x00000000u)
  10652. #define CSL_CPINTC_ENABLE_REG19_ENABLE_632_MASK (0x01000000u)
  10653. #define CSL_CPINTC_ENABLE_REG19_ENABLE_632_SHIFT (0x00000018u)
  10654. #define CSL_CPINTC_ENABLE_REG19_ENABLE_632_RESETVAL (0x00000000u)
  10655. #define CSL_CPINTC_ENABLE_REG19_ENABLE_633_MASK (0x02000000u)
  10656. #define CSL_CPINTC_ENABLE_REG19_ENABLE_633_SHIFT (0x00000019u)
  10657. #define CSL_CPINTC_ENABLE_REG19_ENABLE_633_RESETVAL (0x00000000u)
  10658. #define CSL_CPINTC_ENABLE_REG19_ENABLE_634_MASK (0x04000000u)
  10659. #define CSL_CPINTC_ENABLE_REG19_ENABLE_634_SHIFT (0x0000001Au)
  10660. #define CSL_CPINTC_ENABLE_REG19_ENABLE_634_RESETVAL (0x00000000u)
  10661. #define CSL_CPINTC_ENABLE_REG19_ENABLE_635_MASK (0x08000000u)
  10662. #define CSL_CPINTC_ENABLE_REG19_ENABLE_635_SHIFT (0x0000001Bu)
  10663. #define CSL_CPINTC_ENABLE_REG19_ENABLE_635_RESETVAL (0x00000000u)
  10664. #define CSL_CPINTC_ENABLE_REG19_ENABLE_636_MASK (0x10000000u)
  10665. #define CSL_CPINTC_ENABLE_REG19_ENABLE_636_SHIFT (0x0000001Cu)
  10666. #define CSL_CPINTC_ENABLE_REG19_ENABLE_636_RESETVAL (0x00000000u)
  10667. #define CSL_CPINTC_ENABLE_REG19_ENABLE_637_MASK (0x20000000u)
  10668. #define CSL_CPINTC_ENABLE_REG19_ENABLE_637_SHIFT (0x0000001Du)
  10669. #define CSL_CPINTC_ENABLE_REG19_ENABLE_637_RESETVAL (0x00000000u)
  10670. #define CSL_CPINTC_ENABLE_REG19_ENABLE_638_MASK (0x40000000u)
  10671. #define CSL_CPINTC_ENABLE_REG19_ENABLE_638_SHIFT (0x0000001Eu)
  10672. #define CSL_CPINTC_ENABLE_REG19_ENABLE_638_RESETVAL (0x00000000u)
  10673. #define CSL_CPINTC_ENABLE_REG19_ENABLE_639_MASK (0x80000000u)
  10674. #define CSL_CPINTC_ENABLE_REG19_ENABLE_639_SHIFT (0x0000001Fu)
  10675. #define CSL_CPINTC_ENABLE_REG19_ENABLE_639_RESETVAL (0x00000000u)
  10676. #define CSL_CPINTC_ENABLE_REG19_RESETVAL (0x00000000u)
  10677. /* enable_reg20 */
  10678. #define CSL_CPINTC_ENABLE_REG20_ENABLE_640_MASK (0x00000001u)
  10679. #define CSL_CPINTC_ENABLE_REG20_ENABLE_640_SHIFT (0x00000000u)
  10680. #define CSL_CPINTC_ENABLE_REG20_ENABLE_640_RESETVAL (0x00000000u)
  10681. #define CSL_CPINTC_ENABLE_REG20_ENABLE_641_MASK (0x00000002u)
  10682. #define CSL_CPINTC_ENABLE_REG20_ENABLE_641_SHIFT (0x00000001u)
  10683. #define CSL_CPINTC_ENABLE_REG20_ENABLE_641_RESETVAL (0x00000000u)
  10684. #define CSL_CPINTC_ENABLE_REG20_ENABLE_642_MASK (0x00000004u)
  10685. #define CSL_CPINTC_ENABLE_REG20_ENABLE_642_SHIFT (0x00000002u)
  10686. #define CSL_CPINTC_ENABLE_REG20_ENABLE_642_RESETVAL (0x00000000u)
  10687. #define CSL_CPINTC_ENABLE_REG20_ENABLE_643_MASK (0x00000008u)
  10688. #define CSL_CPINTC_ENABLE_REG20_ENABLE_643_SHIFT (0x00000003u)
  10689. #define CSL_CPINTC_ENABLE_REG20_ENABLE_643_RESETVAL (0x00000000u)
  10690. #define CSL_CPINTC_ENABLE_REG20_ENABLE_644_MASK (0x00000010u)
  10691. #define CSL_CPINTC_ENABLE_REG20_ENABLE_644_SHIFT (0x00000004u)
  10692. #define CSL_CPINTC_ENABLE_REG20_ENABLE_644_RESETVAL (0x00000000u)
  10693. #define CSL_CPINTC_ENABLE_REG20_ENABLE_645_MASK (0x00000020u)
  10694. #define CSL_CPINTC_ENABLE_REG20_ENABLE_645_SHIFT (0x00000005u)
  10695. #define CSL_CPINTC_ENABLE_REG20_ENABLE_645_RESETVAL (0x00000000u)
  10696. #define CSL_CPINTC_ENABLE_REG20_ENABLE_646_MASK (0x00000040u)
  10697. #define CSL_CPINTC_ENABLE_REG20_ENABLE_646_SHIFT (0x00000006u)
  10698. #define CSL_CPINTC_ENABLE_REG20_ENABLE_646_RESETVAL (0x00000000u)
  10699. #define CSL_CPINTC_ENABLE_REG20_ENABLE_647_MASK (0x00000080u)
  10700. #define CSL_CPINTC_ENABLE_REG20_ENABLE_647_SHIFT (0x00000007u)
  10701. #define CSL_CPINTC_ENABLE_REG20_ENABLE_647_RESETVAL (0x00000000u)
  10702. #define CSL_CPINTC_ENABLE_REG20_ENABLE_648_MASK (0x00000100u)
  10703. #define CSL_CPINTC_ENABLE_REG20_ENABLE_648_SHIFT (0x00000008u)
  10704. #define CSL_CPINTC_ENABLE_REG20_ENABLE_648_RESETVAL (0x00000000u)
  10705. #define CSL_CPINTC_ENABLE_REG20_ENABLE_649_MASK (0x00000200u)
  10706. #define CSL_CPINTC_ENABLE_REG20_ENABLE_649_SHIFT (0x00000009u)
  10707. #define CSL_CPINTC_ENABLE_REG20_ENABLE_649_RESETVAL (0x00000000u)
  10708. #define CSL_CPINTC_ENABLE_REG20_ENABLE_650_MASK (0x00000400u)
  10709. #define CSL_CPINTC_ENABLE_REG20_ENABLE_650_SHIFT (0x0000000Au)
  10710. #define CSL_CPINTC_ENABLE_REG20_ENABLE_650_RESETVAL (0x00000000u)
  10711. #define CSL_CPINTC_ENABLE_REG20_ENABLE_651_MASK (0x00000800u)
  10712. #define CSL_CPINTC_ENABLE_REG20_ENABLE_651_SHIFT (0x0000000Bu)
  10713. #define CSL_CPINTC_ENABLE_REG20_ENABLE_651_RESETVAL (0x00000000u)
  10714. #define CSL_CPINTC_ENABLE_REG20_ENABLE_652_MASK (0x00001000u)
  10715. #define CSL_CPINTC_ENABLE_REG20_ENABLE_652_SHIFT (0x0000000Cu)
  10716. #define CSL_CPINTC_ENABLE_REG20_ENABLE_652_RESETVAL (0x00000000u)
  10717. #define CSL_CPINTC_ENABLE_REG20_ENABLE_653_MASK (0x00002000u)
  10718. #define CSL_CPINTC_ENABLE_REG20_ENABLE_653_SHIFT (0x0000000Du)
  10719. #define CSL_CPINTC_ENABLE_REG20_ENABLE_653_RESETVAL (0x00000000u)
  10720. #define CSL_CPINTC_ENABLE_REG20_ENABLE_654_MASK (0x00004000u)
  10721. #define CSL_CPINTC_ENABLE_REG20_ENABLE_654_SHIFT (0x0000000Eu)
  10722. #define CSL_CPINTC_ENABLE_REG20_ENABLE_654_RESETVAL (0x00000000u)
  10723. #define CSL_CPINTC_ENABLE_REG20_ENABLE_655_MASK (0x00008000u)
  10724. #define CSL_CPINTC_ENABLE_REG20_ENABLE_655_SHIFT (0x0000000Fu)
  10725. #define CSL_CPINTC_ENABLE_REG20_ENABLE_655_RESETVAL (0x00000000u)
  10726. #define CSL_CPINTC_ENABLE_REG20_ENABLE_656_MASK (0x00010000u)
  10727. #define CSL_CPINTC_ENABLE_REG20_ENABLE_656_SHIFT (0x00000010u)
  10728. #define CSL_CPINTC_ENABLE_REG20_ENABLE_656_RESETVAL (0x00000000u)
  10729. #define CSL_CPINTC_ENABLE_REG20_ENABLE_657_MASK (0x00020000u)
  10730. #define CSL_CPINTC_ENABLE_REG20_ENABLE_657_SHIFT (0x00000011u)
  10731. #define CSL_CPINTC_ENABLE_REG20_ENABLE_657_RESETVAL (0x00000000u)
  10732. #define CSL_CPINTC_ENABLE_REG20_ENABLE_658_MASK (0x00040000u)
  10733. #define CSL_CPINTC_ENABLE_REG20_ENABLE_658_SHIFT (0x00000012u)
  10734. #define CSL_CPINTC_ENABLE_REG20_ENABLE_658_RESETVAL (0x00000000u)
  10735. #define CSL_CPINTC_ENABLE_REG20_ENABLE_659_MASK (0x00080000u)
  10736. #define CSL_CPINTC_ENABLE_REG20_ENABLE_659_SHIFT (0x00000013u)
  10737. #define CSL_CPINTC_ENABLE_REG20_ENABLE_659_RESETVAL (0x00000000u)
  10738. #define CSL_CPINTC_ENABLE_REG20_ENABLE_660_MASK (0x00100000u)
  10739. #define CSL_CPINTC_ENABLE_REG20_ENABLE_660_SHIFT (0x00000014u)
  10740. #define CSL_CPINTC_ENABLE_REG20_ENABLE_660_RESETVAL (0x00000000u)
  10741. #define CSL_CPINTC_ENABLE_REG20_ENABLE_661_MASK (0x00200000u)
  10742. #define CSL_CPINTC_ENABLE_REG20_ENABLE_661_SHIFT (0x00000015u)
  10743. #define CSL_CPINTC_ENABLE_REG20_ENABLE_661_RESETVAL (0x00000000u)
  10744. #define CSL_CPINTC_ENABLE_REG20_ENABLE_662_MASK (0x00400000u)
  10745. #define CSL_CPINTC_ENABLE_REG20_ENABLE_662_SHIFT (0x00000016u)
  10746. #define CSL_CPINTC_ENABLE_REG20_ENABLE_662_RESETVAL (0x00000000u)
  10747. #define CSL_CPINTC_ENABLE_REG20_ENABLE_663_MASK (0x00800000u)
  10748. #define CSL_CPINTC_ENABLE_REG20_ENABLE_663_SHIFT (0x00000017u)
  10749. #define CSL_CPINTC_ENABLE_REG20_ENABLE_663_RESETVAL (0x00000000u)
  10750. #define CSL_CPINTC_ENABLE_REG20_ENABLE_664_MASK (0x01000000u)
  10751. #define CSL_CPINTC_ENABLE_REG20_ENABLE_664_SHIFT (0x00000018u)
  10752. #define CSL_CPINTC_ENABLE_REG20_ENABLE_664_RESETVAL (0x00000000u)
  10753. #define CSL_CPINTC_ENABLE_REG20_ENABLE_665_MASK (0x02000000u)
  10754. #define CSL_CPINTC_ENABLE_REG20_ENABLE_665_SHIFT (0x00000019u)
  10755. #define CSL_CPINTC_ENABLE_REG20_ENABLE_665_RESETVAL (0x00000000u)
  10756. #define CSL_CPINTC_ENABLE_REG20_ENABLE_666_MASK (0x04000000u)
  10757. #define CSL_CPINTC_ENABLE_REG20_ENABLE_666_SHIFT (0x0000001Au)
  10758. #define CSL_CPINTC_ENABLE_REG20_ENABLE_666_RESETVAL (0x00000000u)
  10759. #define CSL_CPINTC_ENABLE_REG20_ENABLE_667_MASK (0x08000000u)
  10760. #define CSL_CPINTC_ENABLE_REG20_ENABLE_667_SHIFT (0x0000001Bu)
  10761. #define CSL_CPINTC_ENABLE_REG20_ENABLE_667_RESETVAL (0x00000000u)
  10762. #define CSL_CPINTC_ENABLE_REG20_ENABLE_668_MASK (0x10000000u)
  10763. #define CSL_CPINTC_ENABLE_REG20_ENABLE_668_SHIFT (0x0000001Cu)
  10764. #define CSL_CPINTC_ENABLE_REG20_ENABLE_668_RESETVAL (0x00000000u)
  10765. #define CSL_CPINTC_ENABLE_REG20_ENABLE_669_MASK (0x20000000u)
  10766. #define CSL_CPINTC_ENABLE_REG20_ENABLE_669_SHIFT (0x0000001Du)
  10767. #define CSL_CPINTC_ENABLE_REG20_ENABLE_669_RESETVAL (0x00000000u)
  10768. #define CSL_CPINTC_ENABLE_REG20_ENABLE_670_MASK (0x40000000u)
  10769. #define CSL_CPINTC_ENABLE_REG20_ENABLE_670_SHIFT (0x0000001Eu)
  10770. #define CSL_CPINTC_ENABLE_REG20_ENABLE_670_RESETVAL (0x00000000u)
  10771. #define CSL_CPINTC_ENABLE_REG20_ENABLE_671_MASK (0x80000000u)
  10772. #define CSL_CPINTC_ENABLE_REG20_ENABLE_671_SHIFT (0x0000001Fu)
  10773. #define CSL_CPINTC_ENABLE_REG20_ENABLE_671_RESETVAL (0x00000000u)
  10774. #define CSL_CPINTC_ENABLE_REG20_RESETVAL (0x00000000u)
  10775. /* enable_reg21 */
  10776. #define CSL_CPINTC_ENABLE_REG21_ENABLE_672_MASK (0x00000001u)
  10777. #define CSL_CPINTC_ENABLE_REG21_ENABLE_672_SHIFT (0x00000000u)
  10778. #define CSL_CPINTC_ENABLE_REG21_ENABLE_672_RESETVAL (0x00000000u)
  10779. #define CSL_CPINTC_ENABLE_REG21_ENABLE_673_MASK (0x00000002u)
  10780. #define CSL_CPINTC_ENABLE_REG21_ENABLE_673_SHIFT (0x00000001u)
  10781. #define CSL_CPINTC_ENABLE_REG21_ENABLE_673_RESETVAL (0x00000000u)
  10782. #define CSL_CPINTC_ENABLE_REG21_ENABLE_674_MASK (0x00000004u)
  10783. #define CSL_CPINTC_ENABLE_REG21_ENABLE_674_SHIFT (0x00000002u)
  10784. #define CSL_CPINTC_ENABLE_REG21_ENABLE_674_RESETVAL (0x00000000u)
  10785. #define CSL_CPINTC_ENABLE_REG21_ENABLE_675_MASK (0x00000008u)
  10786. #define CSL_CPINTC_ENABLE_REG21_ENABLE_675_SHIFT (0x00000003u)
  10787. #define CSL_CPINTC_ENABLE_REG21_ENABLE_675_RESETVAL (0x00000000u)
  10788. #define CSL_CPINTC_ENABLE_REG21_ENABLE_676_MASK (0x00000010u)
  10789. #define CSL_CPINTC_ENABLE_REG21_ENABLE_676_SHIFT (0x00000004u)
  10790. #define CSL_CPINTC_ENABLE_REG21_ENABLE_676_RESETVAL (0x00000000u)
  10791. #define CSL_CPINTC_ENABLE_REG21_ENABLE_677_MASK (0x00000020u)
  10792. #define CSL_CPINTC_ENABLE_REG21_ENABLE_677_SHIFT (0x00000005u)
  10793. #define CSL_CPINTC_ENABLE_REG21_ENABLE_677_RESETVAL (0x00000000u)
  10794. #define CSL_CPINTC_ENABLE_REG21_ENABLE_678_MASK (0x00000040u)
  10795. #define CSL_CPINTC_ENABLE_REG21_ENABLE_678_SHIFT (0x00000006u)
  10796. #define CSL_CPINTC_ENABLE_REG21_ENABLE_678_RESETVAL (0x00000000u)
  10797. #define CSL_CPINTC_ENABLE_REG21_ENABLE_679_MASK (0x00000080u)
  10798. #define CSL_CPINTC_ENABLE_REG21_ENABLE_679_SHIFT (0x00000007u)
  10799. #define CSL_CPINTC_ENABLE_REG21_ENABLE_679_RESETVAL (0x00000000u)
  10800. #define CSL_CPINTC_ENABLE_REG21_ENABLE_680_MASK (0x00000100u)
  10801. #define CSL_CPINTC_ENABLE_REG21_ENABLE_680_SHIFT (0x00000008u)
  10802. #define CSL_CPINTC_ENABLE_REG21_ENABLE_680_RESETVAL (0x00000000u)
  10803. #define CSL_CPINTC_ENABLE_REG21_ENABLE_681_MASK (0x00000200u)
  10804. #define CSL_CPINTC_ENABLE_REG21_ENABLE_681_SHIFT (0x00000009u)
  10805. #define CSL_CPINTC_ENABLE_REG21_ENABLE_681_RESETVAL (0x00000000u)
  10806. #define CSL_CPINTC_ENABLE_REG21_ENABLE_682_MASK (0x00000400u)
  10807. #define CSL_CPINTC_ENABLE_REG21_ENABLE_682_SHIFT (0x0000000Au)
  10808. #define CSL_CPINTC_ENABLE_REG21_ENABLE_682_RESETVAL (0x00000000u)
  10809. #define CSL_CPINTC_ENABLE_REG21_ENABLE_683_MASK (0x00000800u)
  10810. #define CSL_CPINTC_ENABLE_REG21_ENABLE_683_SHIFT (0x0000000Bu)
  10811. #define CSL_CPINTC_ENABLE_REG21_ENABLE_683_RESETVAL (0x00000000u)
  10812. #define CSL_CPINTC_ENABLE_REG21_ENABLE_684_MASK (0x00001000u)
  10813. #define CSL_CPINTC_ENABLE_REG21_ENABLE_684_SHIFT (0x0000000Cu)
  10814. #define CSL_CPINTC_ENABLE_REG21_ENABLE_684_RESETVAL (0x00000000u)
  10815. #define CSL_CPINTC_ENABLE_REG21_ENABLE_685_MASK (0x00002000u)
  10816. #define CSL_CPINTC_ENABLE_REG21_ENABLE_685_SHIFT (0x0000000Du)
  10817. #define CSL_CPINTC_ENABLE_REG21_ENABLE_685_RESETVAL (0x00000000u)
  10818. #define CSL_CPINTC_ENABLE_REG21_ENABLE_686_MASK (0x00004000u)
  10819. #define CSL_CPINTC_ENABLE_REG21_ENABLE_686_SHIFT (0x0000000Eu)
  10820. #define CSL_CPINTC_ENABLE_REG21_ENABLE_686_RESETVAL (0x00000000u)
  10821. #define CSL_CPINTC_ENABLE_REG21_ENABLE_687_MASK (0x00008000u)
  10822. #define CSL_CPINTC_ENABLE_REG21_ENABLE_687_SHIFT (0x0000000Fu)
  10823. #define CSL_CPINTC_ENABLE_REG21_ENABLE_687_RESETVAL (0x00000000u)
  10824. #define CSL_CPINTC_ENABLE_REG21_ENABLE_688_MASK (0x00010000u)
  10825. #define CSL_CPINTC_ENABLE_REG21_ENABLE_688_SHIFT (0x00000010u)
  10826. #define CSL_CPINTC_ENABLE_REG21_ENABLE_688_RESETVAL (0x00000000u)
  10827. #define CSL_CPINTC_ENABLE_REG21_ENABLE_689_MASK (0x00020000u)
  10828. #define CSL_CPINTC_ENABLE_REG21_ENABLE_689_SHIFT (0x00000011u)
  10829. #define CSL_CPINTC_ENABLE_REG21_ENABLE_689_RESETVAL (0x00000000u)
  10830. #define CSL_CPINTC_ENABLE_REG21_ENABLE_690_MASK (0x00040000u)
  10831. #define CSL_CPINTC_ENABLE_REG21_ENABLE_690_SHIFT (0x00000012u)
  10832. #define CSL_CPINTC_ENABLE_REG21_ENABLE_690_RESETVAL (0x00000000u)
  10833. #define CSL_CPINTC_ENABLE_REG21_ENABLE_691_MASK (0x00080000u)
  10834. #define CSL_CPINTC_ENABLE_REG21_ENABLE_691_SHIFT (0x00000013u)
  10835. #define CSL_CPINTC_ENABLE_REG21_ENABLE_691_RESETVAL (0x00000000u)
  10836. #define CSL_CPINTC_ENABLE_REG21_ENABLE_692_MASK (0x00100000u)
  10837. #define CSL_CPINTC_ENABLE_REG21_ENABLE_692_SHIFT (0x00000014u)
  10838. #define CSL_CPINTC_ENABLE_REG21_ENABLE_692_RESETVAL (0x00000000u)
  10839. #define CSL_CPINTC_ENABLE_REG21_ENABLE_693_MASK (0x00200000u)
  10840. #define CSL_CPINTC_ENABLE_REG21_ENABLE_693_SHIFT (0x00000015u)
  10841. #define CSL_CPINTC_ENABLE_REG21_ENABLE_693_RESETVAL (0x00000000u)
  10842. #define CSL_CPINTC_ENABLE_REG21_ENABLE_694_MASK (0x00400000u)
  10843. #define CSL_CPINTC_ENABLE_REG21_ENABLE_694_SHIFT (0x00000016u)
  10844. #define CSL_CPINTC_ENABLE_REG21_ENABLE_694_RESETVAL (0x00000000u)
  10845. #define CSL_CPINTC_ENABLE_REG21_ENABLE_695_MASK (0x00800000u)
  10846. #define CSL_CPINTC_ENABLE_REG21_ENABLE_695_SHIFT (0x00000017u)
  10847. #define CSL_CPINTC_ENABLE_REG21_ENABLE_695_RESETVAL (0x00000000u)
  10848. #define CSL_CPINTC_ENABLE_REG21_ENABLE_696_MASK (0x01000000u)
  10849. #define CSL_CPINTC_ENABLE_REG21_ENABLE_696_SHIFT (0x00000018u)
  10850. #define CSL_CPINTC_ENABLE_REG21_ENABLE_696_RESETVAL (0x00000000u)
  10851. #define CSL_CPINTC_ENABLE_REG21_ENABLE_697_MASK (0x02000000u)
  10852. #define CSL_CPINTC_ENABLE_REG21_ENABLE_697_SHIFT (0x00000019u)
  10853. #define CSL_CPINTC_ENABLE_REG21_ENABLE_697_RESETVAL (0x00000000u)
  10854. #define CSL_CPINTC_ENABLE_REG21_ENABLE_698_MASK (0x04000000u)
  10855. #define CSL_CPINTC_ENABLE_REG21_ENABLE_698_SHIFT (0x0000001Au)
  10856. #define CSL_CPINTC_ENABLE_REG21_ENABLE_698_RESETVAL (0x00000000u)
  10857. #define CSL_CPINTC_ENABLE_REG21_ENABLE_699_MASK (0x08000000u)
  10858. #define CSL_CPINTC_ENABLE_REG21_ENABLE_699_SHIFT (0x0000001Bu)
  10859. #define CSL_CPINTC_ENABLE_REG21_ENABLE_699_RESETVAL (0x00000000u)
  10860. #define CSL_CPINTC_ENABLE_REG21_ENABLE_700_MASK (0x10000000u)
  10861. #define CSL_CPINTC_ENABLE_REG21_ENABLE_700_SHIFT (0x0000001Cu)
  10862. #define CSL_CPINTC_ENABLE_REG21_ENABLE_700_RESETVAL (0x00000000u)
  10863. #define CSL_CPINTC_ENABLE_REG21_ENABLE_701_MASK (0x20000000u)
  10864. #define CSL_CPINTC_ENABLE_REG21_ENABLE_701_SHIFT (0x0000001Du)
  10865. #define CSL_CPINTC_ENABLE_REG21_ENABLE_701_RESETVAL (0x00000000u)
  10866. #define CSL_CPINTC_ENABLE_REG21_ENABLE_702_MASK (0x40000000u)
  10867. #define CSL_CPINTC_ENABLE_REG21_ENABLE_702_SHIFT (0x0000001Eu)
  10868. #define CSL_CPINTC_ENABLE_REG21_ENABLE_702_RESETVAL (0x00000000u)
  10869. #define CSL_CPINTC_ENABLE_REG21_ENABLE_703_MASK (0x80000000u)
  10870. #define CSL_CPINTC_ENABLE_REG21_ENABLE_703_SHIFT (0x0000001Fu)
  10871. #define CSL_CPINTC_ENABLE_REG21_ENABLE_703_RESETVAL (0x00000000u)
  10872. #define CSL_CPINTC_ENABLE_REG21_RESETVAL (0x00000000u)
  10873. /* enable_reg22 */
  10874. #define CSL_CPINTC_ENABLE_REG22_ENABLE_704_MASK (0x00000001u)
  10875. #define CSL_CPINTC_ENABLE_REG22_ENABLE_704_SHIFT (0x00000000u)
  10876. #define CSL_CPINTC_ENABLE_REG22_ENABLE_704_RESETVAL (0x00000000u)
  10877. #define CSL_CPINTC_ENABLE_REG22_ENABLE_705_MASK (0x00000002u)
  10878. #define CSL_CPINTC_ENABLE_REG22_ENABLE_705_SHIFT (0x00000001u)
  10879. #define CSL_CPINTC_ENABLE_REG22_ENABLE_705_RESETVAL (0x00000000u)
  10880. #define CSL_CPINTC_ENABLE_REG22_ENABLE_706_MASK (0x00000004u)
  10881. #define CSL_CPINTC_ENABLE_REG22_ENABLE_706_SHIFT (0x00000002u)
  10882. #define CSL_CPINTC_ENABLE_REG22_ENABLE_706_RESETVAL (0x00000000u)
  10883. #define CSL_CPINTC_ENABLE_REG22_ENABLE_707_MASK (0x00000008u)
  10884. #define CSL_CPINTC_ENABLE_REG22_ENABLE_707_SHIFT (0x00000003u)
  10885. #define CSL_CPINTC_ENABLE_REG22_ENABLE_707_RESETVAL (0x00000000u)
  10886. #define CSL_CPINTC_ENABLE_REG22_ENABLE_708_MASK (0x00000010u)
  10887. #define CSL_CPINTC_ENABLE_REG22_ENABLE_708_SHIFT (0x00000004u)
  10888. #define CSL_CPINTC_ENABLE_REG22_ENABLE_708_RESETVAL (0x00000000u)
  10889. #define CSL_CPINTC_ENABLE_REG22_ENABLE_709_MASK (0x00000020u)
  10890. #define CSL_CPINTC_ENABLE_REG22_ENABLE_709_SHIFT (0x00000005u)
  10891. #define CSL_CPINTC_ENABLE_REG22_ENABLE_709_RESETVAL (0x00000000u)
  10892. #define CSL_CPINTC_ENABLE_REG22_ENABLE_710_MASK (0x00000040u)
  10893. #define CSL_CPINTC_ENABLE_REG22_ENABLE_710_SHIFT (0x00000006u)
  10894. #define CSL_CPINTC_ENABLE_REG22_ENABLE_710_RESETVAL (0x00000000u)
  10895. #define CSL_CPINTC_ENABLE_REG22_ENABLE_711_MASK (0x00000080u)
  10896. #define CSL_CPINTC_ENABLE_REG22_ENABLE_711_SHIFT (0x00000007u)
  10897. #define CSL_CPINTC_ENABLE_REG22_ENABLE_711_RESETVAL (0x00000000u)
  10898. #define CSL_CPINTC_ENABLE_REG22_ENABLE_712_MASK (0x00000100u)
  10899. #define CSL_CPINTC_ENABLE_REG22_ENABLE_712_SHIFT (0x00000008u)
  10900. #define CSL_CPINTC_ENABLE_REG22_ENABLE_712_RESETVAL (0x00000000u)
  10901. #define CSL_CPINTC_ENABLE_REG22_ENABLE_713_MASK (0x00000200u)
  10902. #define CSL_CPINTC_ENABLE_REG22_ENABLE_713_SHIFT (0x00000009u)
  10903. #define CSL_CPINTC_ENABLE_REG22_ENABLE_713_RESETVAL (0x00000000u)
  10904. #define CSL_CPINTC_ENABLE_REG22_ENABLE_714_MASK (0x00000400u)
  10905. #define CSL_CPINTC_ENABLE_REG22_ENABLE_714_SHIFT (0x0000000Au)
  10906. #define CSL_CPINTC_ENABLE_REG22_ENABLE_714_RESETVAL (0x00000000u)
  10907. #define CSL_CPINTC_ENABLE_REG22_ENABLE_715_MASK (0x00000800u)
  10908. #define CSL_CPINTC_ENABLE_REG22_ENABLE_715_SHIFT (0x0000000Bu)
  10909. #define CSL_CPINTC_ENABLE_REG22_ENABLE_715_RESETVAL (0x00000000u)
  10910. #define CSL_CPINTC_ENABLE_REG22_ENABLE_716_MASK (0x00001000u)
  10911. #define CSL_CPINTC_ENABLE_REG22_ENABLE_716_SHIFT (0x0000000Cu)
  10912. #define CSL_CPINTC_ENABLE_REG22_ENABLE_716_RESETVAL (0x00000000u)
  10913. #define CSL_CPINTC_ENABLE_REG22_ENABLE_717_MASK (0x00002000u)
  10914. #define CSL_CPINTC_ENABLE_REG22_ENABLE_717_SHIFT (0x0000000Du)
  10915. #define CSL_CPINTC_ENABLE_REG22_ENABLE_717_RESETVAL (0x00000000u)
  10916. #define CSL_CPINTC_ENABLE_REG22_ENABLE_718_MASK (0x00004000u)
  10917. #define CSL_CPINTC_ENABLE_REG22_ENABLE_718_SHIFT (0x0000000Eu)
  10918. #define CSL_CPINTC_ENABLE_REG22_ENABLE_718_RESETVAL (0x00000000u)
  10919. #define CSL_CPINTC_ENABLE_REG22_ENABLE_719_MASK (0x00008000u)
  10920. #define CSL_CPINTC_ENABLE_REG22_ENABLE_719_SHIFT (0x0000000Fu)
  10921. #define CSL_CPINTC_ENABLE_REG22_ENABLE_719_RESETVAL (0x00000000u)
  10922. #define CSL_CPINTC_ENABLE_REG22_ENABLE_720_MASK (0x00010000u)
  10923. #define CSL_CPINTC_ENABLE_REG22_ENABLE_720_SHIFT (0x00000010u)
  10924. #define CSL_CPINTC_ENABLE_REG22_ENABLE_720_RESETVAL (0x00000000u)
  10925. #define CSL_CPINTC_ENABLE_REG22_ENABLE_721_MASK (0x00020000u)
  10926. #define CSL_CPINTC_ENABLE_REG22_ENABLE_721_SHIFT (0x00000011u)
  10927. #define CSL_CPINTC_ENABLE_REG22_ENABLE_721_RESETVAL (0x00000000u)
  10928. #define CSL_CPINTC_ENABLE_REG22_ENABLE_722_MASK (0x00040000u)
  10929. #define CSL_CPINTC_ENABLE_REG22_ENABLE_722_SHIFT (0x00000012u)
  10930. #define CSL_CPINTC_ENABLE_REG22_ENABLE_722_RESETVAL (0x00000000u)
  10931. #define CSL_CPINTC_ENABLE_REG22_ENABLE_723_MASK (0x00080000u)
  10932. #define CSL_CPINTC_ENABLE_REG22_ENABLE_723_SHIFT (0x00000013u)
  10933. #define CSL_CPINTC_ENABLE_REG22_ENABLE_723_RESETVAL (0x00000000u)
  10934. #define CSL_CPINTC_ENABLE_REG22_ENABLE_724_MASK (0x00100000u)
  10935. #define CSL_CPINTC_ENABLE_REG22_ENABLE_724_SHIFT (0x00000014u)
  10936. #define CSL_CPINTC_ENABLE_REG22_ENABLE_724_RESETVAL (0x00000000u)
  10937. #define CSL_CPINTC_ENABLE_REG22_ENABLE_725_MASK (0x00200000u)
  10938. #define CSL_CPINTC_ENABLE_REG22_ENABLE_725_SHIFT (0x00000015u)
  10939. #define CSL_CPINTC_ENABLE_REG22_ENABLE_725_RESETVAL (0x00000000u)
  10940. #define CSL_CPINTC_ENABLE_REG22_ENABLE_726_MASK (0x00400000u)
  10941. #define CSL_CPINTC_ENABLE_REG22_ENABLE_726_SHIFT (0x00000016u)
  10942. #define CSL_CPINTC_ENABLE_REG22_ENABLE_726_RESETVAL (0x00000000u)
  10943. #define CSL_CPINTC_ENABLE_REG22_ENABLE_727_MASK (0x00800000u)
  10944. #define CSL_CPINTC_ENABLE_REG22_ENABLE_727_SHIFT (0x00000017u)
  10945. #define CSL_CPINTC_ENABLE_REG22_ENABLE_727_RESETVAL (0x00000000u)
  10946. #define CSL_CPINTC_ENABLE_REG22_ENABLE_728_MASK (0x01000000u)
  10947. #define CSL_CPINTC_ENABLE_REG22_ENABLE_728_SHIFT (0x00000018u)
  10948. #define CSL_CPINTC_ENABLE_REG22_ENABLE_728_RESETVAL (0x00000000u)
  10949. #define CSL_CPINTC_ENABLE_REG22_ENABLE_729_MASK (0x02000000u)
  10950. #define CSL_CPINTC_ENABLE_REG22_ENABLE_729_SHIFT (0x00000019u)
  10951. #define CSL_CPINTC_ENABLE_REG22_ENABLE_729_RESETVAL (0x00000000u)
  10952. #define CSL_CPINTC_ENABLE_REG22_ENABLE_730_MASK (0x04000000u)
  10953. #define CSL_CPINTC_ENABLE_REG22_ENABLE_730_SHIFT (0x0000001Au)
  10954. #define CSL_CPINTC_ENABLE_REG22_ENABLE_730_RESETVAL (0x00000000u)
  10955. #define CSL_CPINTC_ENABLE_REG22_ENABLE_731_MASK (0x08000000u)
  10956. #define CSL_CPINTC_ENABLE_REG22_ENABLE_731_SHIFT (0x0000001Bu)
  10957. #define CSL_CPINTC_ENABLE_REG22_ENABLE_731_RESETVAL (0x00000000u)
  10958. #define CSL_CPINTC_ENABLE_REG22_ENABLE_732_MASK (0x10000000u)
  10959. #define CSL_CPINTC_ENABLE_REG22_ENABLE_732_SHIFT (0x0000001Cu)
  10960. #define CSL_CPINTC_ENABLE_REG22_ENABLE_732_RESETVAL (0x00000000u)
  10961. #define CSL_CPINTC_ENABLE_REG22_ENABLE_733_MASK (0x20000000u)
  10962. #define CSL_CPINTC_ENABLE_REG22_ENABLE_733_SHIFT (0x0000001Du)
  10963. #define CSL_CPINTC_ENABLE_REG22_ENABLE_733_RESETVAL (0x00000000u)
  10964. #define CSL_CPINTC_ENABLE_REG22_ENABLE_734_MASK (0x40000000u)
  10965. #define CSL_CPINTC_ENABLE_REG22_ENABLE_734_SHIFT (0x0000001Eu)
  10966. #define CSL_CPINTC_ENABLE_REG22_ENABLE_734_RESETVAL (0x00000000u)
  10967. #define CSL_CPINTC_ENABLE_REG22_ENABLE_735_MASK (0x80000000u)
  10968. #define CSL_CPINTC_ENABLE_REG22_ENABLE_735_SHIFT (0x0000001Fu)
  10969. #define CSL_CPINTC_ENABLE_REG22_ENABLE_735_RESETVAL (0x00000000u)
  10970. #define CSL_CPINTC_ENABLE_REG22_RESETVAL (0x00000000u)
  10971. /* enable_reg23 */
  10972. #define CSL_CPINTC_ENABLE_REG23_ENABLE_736_MASK (0x00000001u)
  10973. #define CSL_CPINTC_ENABLE_REG23_ENABLE_736_SHIFT (0x00000000u)
  10974. #define CSL_CPINTC_ENABLE_REG23_ENABLE_736_RESETVAL (0x00000000u)
  10975. #define CSL_CPINTC_ENABLE_REG23_ENABLE_737_MASK (0x00000002u)
  10976. #define CSL_CPINTC_ENABLE_REG23_ENABLE_737_SHIFT (0x00000001u)
  10977. #define CSL_CPINTC_ENABLE_REG23_ENABLE_737_RESETVAL (0x00000000u)
  10978. #define CSL_CPINTC_ENABLE_REG23_ENABLE_738_MASK (0x00000004u)
  10979. #define CSL_CPINTC_ENABLE_REG23_ENABLE_738_SHIFT (0x00000002u)
  10980. #define CSL_CPINTC_ENABLE_REG23_ENABLE_738_RESETVAL (0x00000000u)
  10981. #define CSL_CPINTC_ENABLE_REG23_ENABLE_739_MASK (0x00000008u)
  10982. #define CSL_CPINTC_ENABLE_REG23_ENABLE_739_SHIFT (0x00000003u)
  10983. #define CSL_CPINTC_ENABLE_REG23_ENABLE_739_RESETVAL (0x00000000u)
  10984. #define CSL_CPINTC_ENABLE_REG23_ENABLE_740_MASK (0x00000010u)
  10985. #define CSL_CPINTC_ENABLE_REG23_ENABLE_740_SHIFT (0x00000004u)
  10986. #define CSL_CPINTC_ENABLE_REG23_ENABLE_740_RESETVAL (0x00000000u)
  10987. #define CSL_CPINTC_ENABLE_REG23_ENABLE_741_MASK (0x00000020u)
  10988. #define CSL_CPINTC_ENABLE_REG23_ENABLE_741_SHIFT (0x00000005u)
  10989. #define CSL_CPINTC_ENABLE_REG23_ENABLE_741_RESETVAL (0x00000000u)
  10990. #define CSL_CPINTC_ENABLE_REG23_ENABLE_742_MASK (0x00000040u)
  10991. #define CSL_CPINTC_ENABLE_REG23_ENABLE_742_SHIFT (0x00000006u)
  10992. #define CSL_CPINTC_ENABLE_REG23_ENABLE_742_RESETVAL (0x00000000u)
  10993. #define CSL_CPINTC_ENABLE_REG23_ENABLE_743_MASK (0x00000080u)
  10994. #define CSL_CPINTC_ENABLE_REG23_ENABLE_743_SHIFT (0x00000007u)
  10995. #define CSL_CPINTC_ENABLE_REG23_ENABLE_743_RESETVAL (0x00000000u)
  10996. #define CSL_CPINTC_ENABLE_REG23_ENABLE_744_MASK (0x00000100u)
  10997. #define CSL_CPINTC_ENABLE_REG23_ENABLE_744_SHIFT (0x00000008u)
  10998. #define CSL_CPINTC_ENABLE_REG23_ENABLE_744_RESETVAL (0x00000000u)
  10999. #define CSL_CPINTC_ENABLE_REG23_ENABLE_745_MASK (0x00000200u)
  11000. #define CSL_CPINTC_ENABLE_REG23_ENABLE_745_SHIFT (0x00000009u)
  11001. #define CSL_CPINTC_ENABLE_REG23_ENABLE_745_RESETVAL (0x00000000u)
  11002. #define CSL_CPINTC_ENABLE_REG23_ENABLE_746_MASK (0x00000400u)
  11003. #define CSL_CPINTC_ENABLE_REG23_ENABLE_746_SHIFT (0x0000000Au)
  11004. #define CSL_CPINTC_ENABLE_REG23_ENABLE_746_RESETVAL (0x00000000u)
  11005. #define CSL_CPINTC_ENABLE_REG23_ENABLE_747_MASK (0x00000800u)
  11006. #define CSL_CPINTC_ENABLE_REG23_ENABLE_747_SHIFT (0x0000000Bu)
  11007. #define CSL_CPINTC_ENABLE_REG23_ENABLE_747_RESETVAL (0x00000000u)
  11008. #define CSL_CPINTC_ENABLE_REG23_ENABLE_748_MASK (0x00001000u)
  11009. #define CSL_CPINTC_ENABLE_REG23_ENABLE_748_SHIFT (0x0000000Cu)
  11010. #define CSL_CPINTC_ENABLE_REG23_ENABLE_748_RESETVAL (0x00000000u)
  11011. #define CSL_CPINTC_ENABLE_REG23_ENABLE_749_MASK (0x00002000u)
  11012. #define CSL_CPINTC_ENABLE_REG23_ENABLE_749_SHIFT (0x0000000Du)
  11013. #define CSL_CPINTC_ENABLE_REG23_ENABLE_749_RESETVAL (0x00000000u)
  11014. #define CSL_CPINTC_ENABLE_REG23_ENABLE_750_MASK (0x00004000u)
  11015. #define CSL_CPINTC_ENABLE_REG23_ENABLE_750_SHIFT (0x0000000Eu)
  11016. #define CSL_CPINTC_ENABLE_REG23_ENABLE_750_RESETVAL (0x00000000u)
  11017. #define CSL_CPINTC_ENABLE_REG23_ENABLE_751_MASK (0x00008000u)
  11018. #define CSL_CPINTC_ENABLE_REG23_ENABLE_751_SHIFT (0x0000000Fu)
  11019. #define CSL_CPINTC_ENABLE_REG23_ENABLE_751_RESETVAL (0x00000000u)
  11020. #define CSL_CPINTC_ENABLE_REG23_ENABLE_752_MASK (0x00010000u)
  11021. #define CSL_CPINTC_ENABLE_REG23_ENABLE_752_SHIFT (0x00000010u)
  11022. #define CSL_CPINTC_ENABLE_REG23_ENABLE_752_RESETVAL (0x00000000u)
  11023. #define CSL_CPINTC_ENABLE_REG23_ENABLE_753_MASK (0x00020000u)
  11024. #define CSL_CPINTC_ENABLE_REG23_ENABLE_753_SHIFT (0x00000011u)
  11025. #define CSL_CPINTC_ENABLE_REG23_ENABLE_753_RESETVAL (0x00000000u)
  11026. #define CSL_CPINTC_ENABLE_REG23_ENABLE_754_MASK (0x00040000u)
  11027. #define CSL_CPINTC_ENABLE_REG23_ENABLE_754_SHIFT (0x00000012u)
  11028. #define CSL_CPINTC_ENABLE_REG23_ENABLE_754_RESETVAL (0x00000000u)
  11029. #define CSL_CPINTC_ENABLE_REG23_ENABLE_755_MASK (0x00080000u)
  11030. #define CSL_CPINTC_ENABLE_REG23_ENABLE_755_SHIFT (0x00000013u)
  11031. #define CSL_CPINTC_ENABLE_REG23_ENABLE_755_RESETVAL (0x00000000u)
  11032. #define CSL_CPINTC_ENABLE_REG23_ENABLE_756_MASK (0x00100000u)
  11033. #define CSL_CPINTC_ENABLE_REG23_ENABLE_756_SHIFT (0x00000014u)
  11034. #define CSL_CPINTC_ENABLE_REG23_ENABLE_756_RESETVAL (0x00000000u)
  11035. #define CSL_CPINTC_ENABLE_REG23_ENABLE_757_MASK (0x00200000u)
  11036. #define CSL_CPINTC_ENABLE_REG23_ENABLE_757_SHIFT (0x00000015u)
  11037. #define CSL_CPINTC_ENABLE_REG23_ENABLE_757_RESETVAL (0x00000000u)
  11038. #define CSL_CPINTC_ENABLE_REG23_ENABLE_758_MASK (0x00400000u)
  11039. #define CSL_CPINTC_ENABLE_REG23_ENABLE_758_SHIFT (0x00000016u)
  11040. #define CSL_CPINTC_ENABLE_REG23_ENABLE_758_RESETVAL (0x00000000u)
  11041. #define CSL_CPINTC_ENABLE_REG23_ENABLE_759_MASK (0x00800000u)
  11042. #define CSL_CPINTC_ENABLE_REG23_ENABLE_759_SHIFT (0x00000017u)
  11043. #define CSL_CPINTC_ENABLE_REG23_ENABLE_759_RESETVAL (0x00000000u)
  11044. #define CSL_CPINTC_ENABLE_REG23_ENABLE_760_MASK (0x01000000u)
  11045. #define CSL_CPINTC_ENABLE_REG23_ENABLE_760_SHIFT (0x00000018u)
  11046. #define CSL_CPINTC_ENABLE_REG23_ENABLE_760_RESETVAL (0x00000000u)
  11047. #define CSL_CPINTC_ENABLE_REG23_ENABLE_761_MASK (0x02000000u)
  11048. #define CSL_CPINTC_ENABLE_REG23_ENABLE_761_SHIFT (0x00000019u)
  11049. #define CSL_CPINTC_ENABLE_REG23_ENABLE_761_RESETVAL (0x00000000u)
  11050. #define CSL_CPINTC_ENABLE_REG23_ENABLE_762_MASK (0x04000000u)
  11051. #define CSL_CPINTC_ENABLE_REG23_ENABLE_762_SHIFT (0x0000001Au)
  11052. #define CSL_CPINTC_ENABLE_REG23_ENABLE_762_RESETVAL (0x00000000u)
  11053. #define CSL_CPINTC_ENABLE_REG23_ENABLE_763_MASK (0x08000000u)
  11054. #define CSL_CPINTC_ENABLE_REG23_ENABLE_763_SHIFT (0x0000001Bu)
  11055. #define CSL_CPINTC_ENABLE_REG23_ENABLE_763_RESETVAL (0x00000000u)
  11056. #define CSL_CPINTC_ENABLE_REG23_ENABLE_764_MASK (0x10000000u)
  11057. #define CSL_CPINTC_ENABLE_REG23_ENABLE_764_SHIFT (0x0000001Cu)
  11058. #define CSL_CPINTC_ENABLE_REG23_ENABLE_764_RESETVAL (0x00000000u)
  11059. #define CSL_CPINTC_ENABLE_REG23_ENABLE_765_MASK (0x20000000u)
  11060. #define CSL_CPINTC_ENABLE_REG23_ENABLE_765_SHIFT (0x0000001Du)
  11061. #define CSL_CPINTC_ENABLE_REG23_ENABLE_765_RESETVAL (0x00000000u)
  11062. #define CSL_CPINTC_ENABLE_REG23_ENABLE_766_MASK (0x40000000u)
  11063. #define CSL_CPINTC_ENABLE_REG23_ENABLE_766_SHIFT (0x0000001Eu)
  11064. #define CSL_CPINTC_ENABLE_REG23_ENABLE_766_RESETVAL (0x00000000u)
  11065. #define CSL_CPINTC_ENABLE_REG23_ENABLE_767_MASK (0x80000000u)
  11066. #define CSL_CPINTC_ENABLE_REG23_ENABLE_767_SHIFT (0x0000001Fu)
  11067. #define CSL_CPINTC_ENABLE_REG23_ENABLE_767_RESETVAL (0x00000000u)
  11068. #define CSL_CPINTC_ENABLE_REG23_RESETVAL (0x00000000u)
  11069. /* enable_reg24 */
  11070. #define CSL_CPINTC_ENABLE_REG24_ENABLE_768_MASK (0x00000001u)
  11071. #define CSL_CPINTC_ENABLE_REG24_ENABLE_768_SHIFT (0x00000000u)
  11072. #define CSL_CPINTC_ENABLE_REG24_ENABLE_768_RESETVAL (0x00000000u)
  11073. #define CSL_CPINTC_ENABLE_REG24_ENABLE_769_MASK (0x00000002u)
  11074. #define CSL_CPINTC_ENABLE_REG24_ENABLE_769_SHIFT (0x00000001u)
  11075. #define CSL_CPINTC_ENABLE_REG24_ENABLE_769_RESETVAL (0x00000000u)
  11076. #define CSL_CPINTC_ENABLE_REG24_ENABLE_770_MASK (0x00000004u)
  11077. #define CSL_CPINTC_ENABLE_REG24_ENABLE_770_SHIFT (0x00000002u)
  11078. #define CSL_CPINTC_ENABLE_REG24_ENABLE_770_RESETVAL (0x00000000u)
  11079. #define CSL_CPINTC_ENABLE_REG24_ENABLE_771_MASK (0x00000008u)
  11080. #define CSL_CPINTC_ENABLE_REG24_ENABLE_771_SHIFT (0x00000003u)
  11081. #define CSL_CPINTC_ENABLE_REG24_ENABLE_771_RESETVAL (0x00000000u)
  11082. #define CSL_CPINTC_ENABLE_REG24_ENABLE_772_MASK (0x00000010u)
  11083. #define CSL_CPINTC_ENABLE_REG24_ENABLE_772_SHIFT (0x00000004u)
  11084. #define CSL_CPINTC_ENABLE_REG24_ENABLE_772_RESETVAL (0x00000000u)
  11085. #define CSL_CPINTC_ENABLE_REG24_ENABLE_773_MASK (0x00000020u)
  11086. #define CSL_CPINTC_ENABLE_REG24_ENABLE_773_SHIFT (0x00000005u)
  11087. #define CSL_CPINTC_ENABLE_REG24_ENABLE_773_RESETVAL (0x00000000u)
  11088. #define CSL_CPINTC_ENABLE_REG24_ENABLE_774_MASK (0x00000040u)
  11089. #define CSL_CPINTC_ENABLE_REG24_ENABLE_774_SHIFT (0x00000006u)
  11090. #define CSL_CPINTC_ENABLE_REG24_ENABLE_774_RESETVAL (0x00000000u)
  11091. #define CSL_CPINTC_ENABLE_REG24_ENABLE_775_MASK (0x00000080u)
  11092. #define CSL_CPINTC_ENABLE_REG24_ENABLE_775_SHIFT (0x00000007u)
  11093. #define CSL_CPINTC_ENABLE_REG24_ENABLE_775_RESETVAL (0x00000000u)
  11094. #define CSL_CPINTC_ENABLE_REG24_ENABLE_776_MASK (0x00000100u)
  11095. #define CSL_CPINTC_ENABLE_REG24_ENABLE_776_SHIFT (0x00000008u)
  11096. #define CSL_CPINTC_ENABLE_REG24_ENABLE_776_RESETVAL (0x00000000u)
  11097. #define CSL_CPINTC_ENABLE_REG24_ENABLE_777_MASK (0x00000200u)
  11098. #define CSL_CPINTC_ENABLE_REG24_ENABLE_777_SHIFT (0x00000009u)
  11099. #define CSL_CPINTC_ENABLE_REG24_ENABLE_777_RESETVAL (0x00000000u)
  11100. #define CSL_CPINTC_ENABLE_REG24_ENABLE_778_MASK (0x00000400u)
  11101. #define CSL_CPINTC_ENABLE_REG24_ENABLE_778_SHIFT (0x0000000Au)
  11102. #define CSL_CPINTC_ENABLE_REG24_ENABLE_778_RESETVAL (0x00000000u)
  11103. #define CSL_CPINTC_ENABLE_REG24_ENABLE_779_MASK (0x00000800u)
  11104. #define CSL_CPINTC_ENABLE_REG24_ENABLE_779_SHIFT (0x0000000Bu)
  11105. #define CSL_CPINTC_ENABLE_REG24_ENABLE_779_RESETVAL (0x00000000u)
  11106. #define CSL_CPINTC_ENABLE_REG24_ENABLE_780_MASK (0x00001000u)
  11107. #define CSL_CPINTC_ENABLE_REG24_ENABLE_780_SHIFT (0x0000000Cu)
  11108. #define CSL_CPINTC_ENABLE_REG24_ENABLE_780_RESETVAL (0x00000000u)
  11109. #define CSL_CPINTC_ENABLE_REG24_ENABLE_781_MASK (0x00002000u)
  11110. #define CSL_CPINTC_ENABLE_REG24_ENABLE_781_SHIFT (0x0000000Du)
  11111. #define CSL_CPINTC_ENABLE_REG24_ENABLE_781_RESETVAL (0x00000000u)
  11112. #define CSL_CPINTC_ENABLE_REG24_ENABLE_782_MASK (0x00004000u)
  11113. #define CSL_CPINTC_ENABLE_REG24_ENABLE_782_SHIFT (0x0000000Eu)
  11114. #define CSL_CPINTC_ENABLE_REG24_ENABLE_782_RESETVAL (0x00000000u)
  11115. #define CSL_CPINTC_ENABLE_REG24_ENABLE_783_MASK (0x00008000u)
  11116. #define CSL_CPINTC_ENABLE_REG24_ENABLE_783_SHIFT (0x0000000Fu)
  11117. #define CSL_CPINTC_ENABLE_REG24_ENABLE_783_RESETVAL (0x00000000u)
  11118. #define CSL_CPINTC_ENABLE_REG24_ENABLE_784_MASK (0x00010000u)
  11119. #define CSL_CPINTC_ENABLE_REG24_ENABLE_784_SHIFT (0x00000010u)
  11120. #define CSL_CPINTC_ENABLE_REG24_ENABLE_784_RESETVAL (0x00000000u)
  11121. #define CSL_CPINTC_ENABLE_REG24_ENABLE_785_MASK (0x00020000u)
  11122. #define CSL_CPINTC_ENABLE_REG24_ENABLE_785_SHIFT (0x00000011u)
  11123. #define CSL_CPINTC_ENABLE_REG24_ENABLE_785_RESETVAL (0x00000000u)
  11124. #define CSL_CPINTC_ENABLE_REG24_ENABLE_786_MASK (0x00040000u)
  11125. #define CSL_CPINTC_ENABLE_REG24_ENABLE_786_SHIFT (0x00000012u)
  11126. #define CSL_CPINTC_ENABLE_REG24_ENABLE_786_RESETVAL (0x00000000u)
  11127. #define CSL_CPINTC_ENABLE_REG24_ENABLE_787_MASK (0x00080000u)
  11128. #define CSL_CPINTC_ENABLE_REG24_ENABLE_787_SHIFT (0x00000013u)
  11129. #define CSL_CPINTC_ENABLE_REG24_ENABLE_787_RESETVAL (0x00000000u)
  11130. #define CSL_CPINTC_ENABLE_REG24_ENABLE_788_MASK (0x00100000u)
  11131. #define CSL_CPINTC_ENABLE_REG24_ENABLE_788_SHIFT (0x00000014u)
  11132. #define CSL_CPINTC_ENABLE_REG24_ENABLE_788_RESETVAL (0x00000000u)
  11133. #define CSL_CPINTC_ENABLE_REG24_ENABLE_789_MASK (0x00200000u)
  11134. #define CSL_CPINTC_ENABLE_REG24_ENABLE_789_SHIFT (0x00000015u)
  11135. #define CSL_CPINTC_ENABLE_REG24_ENABLE_789_RESETVAL (0x00000000u)
  11136. #define CSL_CPINTC_ENABLE_REG24_ENABLE_790_MASK (0x00400000u)
  11137. #define CSL_CPINTC_ENABLE_REG24_ENABLE_790_SHIFT (0x00000016u)
  11138. #define CSL_CPINTC_ENABLE_REG24_ENABLE_790_RESETVAL (0x00000000u)
  11139. #define CSL_CPINTC_ENABLE_REG24_ENABLE_791_MASK (0x00800000u)
  11140. #define CSL_CPINTC_ENABLE_REG24_ENABLE_791_SHIFT (0x00000017u)
  11141. #define CSL_CPINTC_ENABLE_REG24_ENABLE_791_RESETVAL (0x00000000u)
  11142. #define CSL_CPINTC_ENABLE_REG24_ENABLE_792_MASK (0x01000000u)
  11143. #define CSL_CPINTC_ENABLE_REG24_ENABLE_792_SHIFT (0x00000018u)
  11144. #define CSL_CPINTC_ENABLE_REG24_ENABLE_792_RESETVAL (0x00000000u)
  11145. #define CSL_CPINTC_ENABLE_REG24_ENABLE_793_MASK (0x02000000u)
  11146. #define CSL_CPINTC_ENABLE_REG24_ENABLE_793_SHIFT (0x00000019u)
  11147. #define CSL_CPINTC_ENABLE_REG24_ENABLE_793_RESETVAL (0x00000000u)
  11148. #define CSL_CPINTC_ENABLE_REG24_ENABLE_794_MASK (0x04000000u)
  11149. #define CSL_CPINTC_ENABLE_REG24_ENABLE_794_SHIFT (0x0000001Au)
  11150. #define CSL_CPINTC_ENABLE_REG24_ENABLE_794_RESETVAL (0x00000000u)
  11151. #define CSL_CPINTC_ENABLE_REG24_ENABLE_795_MASK (0x08000000u)
  11152. #define CSL_CPINTC_ENABLE_REG24_ENABLE_795_SHIFT (0x0000001Bu)
  11153. #define CSL_CPINTC_ENABLE_REG24_ENABLE_795_RESETVAL (0x00000000u)
  11154. #define CSL_CPINTC_ENABLE_REG24_ENABLE_796_MASK (0x10000000u)
  11155. #define CSL_CPINTC_ENABLE_REG24_ENABLE_796_SHIFT (0x0000001Cu)
  11156. #define CSL_CPINTC_ENABLE_REG24_ENABLE_796_RESETVAL (0x00000000u)
  11157. #define CSL_CPINTC_ENABLE_REG24_ENABLE_797_MASK (0x20000000u)
  11158. #define CSL_CPINTC_ENABLE_REG24_ENABLE_797_SHIFT (0x0000001Du)
  11159. #define CSL_CPINTC_ENABLE_REG24_ENABLE_797_RESETVAL (0x00000000u)
  11160. #define CSL_CPINTC_ENABLE_REG24_ENABLE_798_MASK (0x40000000u)
  11161. #define CSL_CPINTC_ENABLE_REG24_ENABLE_798_SHIFT (0x0000001Eu)
  11162. #define CSL_CPINTC_ENABLE_REG24_ENABLE_798_RESETVAL (0x00000000u)
  11163. #define CSL_CPINTC_ENABLE_REG24_ENABLE_799_MASK (0x80000000u)
  11164. #define CSL_CPINTC_ENABLE_REG24_ENABLE_799_SHIFT (0x0000001Fu)
  11165. #define CSL_CPINTC_ENABLE_REG24_ENABLE_799_RESETVAL (0x00000000u)
  11166. #define CSL_CPINTC_ENABLE_REG24_RESETVAL (0x00000000u)
  11167. /* enable_reg25 */
  11168. #define CSL_CPINTC_ENABLE_REG25_ENABLE_800_MASK (0x00000001u)
  11169. #define CSL_CPINTC_ENABLE_REG25_ENABLE_800_SHIFT (0x00000000u)
  11170. #define CSL_CPINTC_ENABLE_REG25_ENABLE_800_RESETVAL (0x00000000u)
  11171. #define CSL_CPINTC_ENABLE_REG25_ENABLE_801_MASK (0x00000002u)
  11172. #define CSL_CPINTC_ENABLE_REG25_ENABLE_801_SHIFT (0x00000001u)
  11173. #define CSL_CPINTC_ENABLE_REG25_ENABLE_801_RESETVAL (0x00000000u)
  11174. #define CSL_CPINTC_ENABLE_REG25_ENABLE_802_MASK (0x00000004u)
  11175. #define CSL_CPINTC_ENABLE_REG25_ENABLE_802_SHIFT (0x00000002u)
  11176. #define CSL_CPINTC_ENABLE_REG25_ENABLE_802_RESETVAL (0x00000000u)
  11177. #define CSL_CPINTC_ENABLE_REG25_ENABLE_803_MASK (0x00000008u)
  11178. #define CSL_CPINTC_ENABLE_REG25_ENABLE_803_SHIFT (0x00000003u)
  11179. #define CSL_CPINTC_ENABLE_REG25_ENABLE_803_RESETVAL (0x00000000u)
  11180. #define CSL_CPINTC_ENABLE_REG25_ENABLE_804_MASK (0x00000010u)
  11181. #define CSL_CPINTC_ENABLE_REG25_ENABLE_804_SHIFT (0x00000004u)
  11182. #define CSL_CPINTC_ENABLE_REG25_ENABLE_804_RESETVAL (0x00000000u)
  11183. #define CSL_CPINTC_ENABLE_REG25_ENABLE_805_MASK (0x00000020u)
  11184. #define CSL_CPINTC_ENABLE_REG25_ENABLE_805_SHIFT (0x00000005u)
  11185. #define CSL_CPINTC_ENABLE_REG25_ENABLE_805_RESETVAL (0x00000000u)
  11186. #define CSL_CPINTC_ENABLE_REG25_ENABLE_806_MASK (0x00000040u)
  11187. #define CSL_CPINTC_ENABLE_REG25_ENABLE_806_SHIFT (0x00000006u)
  11188. #define CSL_CPINTC_ENABLE_REG25_ENABLE_806_RESETVAL (0x00000000u)
  11189. #define CSL_CPINTC_ENABLE_REG25_ENABLE_807_MASK (0x00000080u)
  11190. #define CSL_CPINTC_ENABLE_REG25_ENABLE_807_SHIFT (0x00000007u)
  11191. #define CSL_CPINTC_ENABLE_REG25_ENABLE_807_RESETVAL (0x00000000u)
  11192. #define CSL_CPINTC_ENABLE_REG25_ENABLE_808_MASK (0x00000100u)
  11193. #define CSL_CPINTC_ENABLE_REG25_ENABLE_808_SHIFT (0x00000008u)
  11194. #define CSL_CPINTC_ENABLE_REG25_ENABLE_808_RESETVAL (0x00000000u)
  11195. #define CSL_CPINTC_ENABLE_REG25_ENABLE_809_MASK (0x00000200u)
  11196. #define CSL_CPINTC_ENABLE_REG25_ENABLE_809_SHIFT (0x00000009u)
  11197. #define CSL_CPINTC_ENABLE_REG25_ENABLE_809_RESETVAL (0x00000000u)
  11198. #define CSL_CPINTC_ENABLE_REG25_ENABLE_810_MASK (0x00000400u)
  11199. #define CSL_CPINTC_ENABLE_REG25_ENABLE_810_SHIFT (0x0000000Au)
  11200. #define CSL_CPINTC_ENABLE_REG25_ENABLE_810_RESETVAL (0x00000000u)
  11201. #define CSL_CPINTC_ENABLE_REG25_ENABLE_811_MASK (0x00000800u)
  11202. #define CSL_CPINTC_ENABLE_REG25_ENABLE_811_SHIFT (0x0000000Bu)
  11203. #define CSL_CPINTC_ENABLE_REG25_ENABLE_811_RESETVAL (0x00000000u)
  11204. #define CSL_CPINTC_ENABLE_REG25_ENABLE_812_MASK (0x00001000u)
  11205. #define CSL_CPINTC_ENABLE_REG25_ENABLE_812_SHIFT (0x0000000Cu)
  11206. #define CSL_CPINTC_ENABLE_REG25_ENABLE_812_RESETVAL (0x00000000u)
  11207. #define CSL_CPINTC_ENABLE_REG25_ENABLE_813_MASK (0x00002000u)
  11208. #define CSL_CPINTC_ENABLE_REG25_ENABLE_813_SHIFT (0x0000000Du)
  11209. #define CSL_CPINTC_ENABLE_REG25_ENABLE_813_RESETVAL (0x00000000u)
  11210. #define CSL_CPINTC_ENABLE_REG25_ENABLE_814_MASK (0x00004000u)
  11211. #define CSL_CPINTC_ENABLE_REG25_ENABLE_814_SHIFT (0x0000000Eu)
  11212. #define CSL_CPINTC_ENABLE_REG25_ENABLE_814_RESETVAL (0x00000000u)
  11213. #define CSL_CPINTC_ENABLE_REG25_ENABLE_815_MASK (0x00008000u)
  11214. #define CSL_CPINTC_ENABLE_REG25_ENABLE_815_SHIFT (0x0000000Fu)
  11215. #define CSL_CPINTC_ENABLE_REG25_ENABLE_815_RESETVAL (0x00000000u)
  11216. #define CSL_CPINTC_ENABLE_REG25_ENABLE_816_MASK (0x00010000u)
  11217. #define CSL_CPINTC_ENABLE_REG25_ENABLE_816_SHIFT (0x00000010u)
  11218. #define CSL_CPINTC_ENABLE_REG25_ENABLE_816_RESETVAL (0x00000000u)
  11219. #define CSL_CPINTC_ENABLE_REG25_ENABLE_817_MASK (0x00020000u)
  11220. #define CSL_CPINTC_ENABLE_REG25_ENABLE_817_SHIFT (0x00000011u)
  11221. #define CSL_CPINTC_ENABLE_REG25_ENABLE_817_RESETVAL (0x00000000u)
  11222. #define CSL_CPINTC_ENABLE_REG25_ENABLE_818_MASK (0x00040000u)
  11223. #define CSL_CPINTC_ENABLE_REG25_ENABLE_818_SHIFT (0x00000012u)
  11224. #define CSL_CPINTC_ENABLE_REG25_ENABLE_818_RESETVAL (0x00000000u)
  11225. #define CSL_CPINTC_ENABLE_REG25_ENABLE_819_MASK (0x00080000u)
  11226. #define CSL_CPINTC_ENABLE_REG25_ENABLE_819_SHIFT (0x00000013u)
  11227. #define CSL_CPINTC_ENABLE_REG25_ENABLE_819_RESETVAL (0x00000000u)
  11228. #define CSL_CPINTC_ENABLE_REG25_ENABLE_820_MASK (0x00100000u)
  11229. #define CSL_CPINTC_ENABLE_REG25_ENABLE_820_SHIFT (0x00000014u)
  11230. #define CSL_CPINTC_ENABLE_REG25_ENABLE_820_RESETVAL (0x00000000u)
  11231. #define CSL_CPINTC_ENABLE_REG25_ENABLE_821_MASK (0x00200000u)
  11232. #define CSL_CPINTC_ENABLE_REG25_ENABLE_821_SHIFT (0x00000015u)
  11233. #define CSL_CPINTC_ENABLE_REG25_ENABLE_821_RESETVAL (0x00000000u)
  11234. #define CSL_CPINTC_ENABLE_REG25_ENABLE_822_MASK (0x00400000u)
  11235. #define CSL_CPINTC_ENABLE_REG25_ENABLE_822_SHIFT (0x00000016u)
  11236. #define CSL_CPINTC_ENABLE_REG25_ENABLE_822_RESETVAL (0x00000000u)
  11237. #define CSL_CPINTC_ENABLE_REG25_ENABLE_823_MASK (0x00800000u)
  11238. #define CSL_CPINTC_ENABLE_REG25_ENABLE_823_SHIFT (0x00000017u)
  11239. #define CSL_CPINTC_ENABLE_REG25_ENABLE_823_RESETVAL (0x00000000u)
  11240. #define CSL_CPINTC_ENABLE_REG25_ENABLE_824_MASK (0x01000000u)
  11241. #define CSL_CPINTC_ENABLE_REG25_ENABLE_824_SHIFT (0x00000018u)
  11242. #define CSL_CPINTC_ENABLE_REG25_ENABLE_824_RESETVAL (0x00000000u)
  11243. #define CSL_CPINTC_ENABLE_REG25_ENABLE_825_MASK (0x02000000u)
  11244. #define CSL_CPINTC_ENABLE_REG25_ENABLE_825_SHIFT (0x00000019u)
  11245. #define CSL_CPINTC_ENABLE_REG25_ENABLE_825_RESETVAL (0x00000000u)
  11246. #define CSL_CPINTC_ENABLE_REG25_ENABLE_826_MASK (0x04000000u)
  11247. #define CSL_CPINTC_ENABLE_REG25_ENABLE_826_SHIFT (0x0000001Au)
  11248. #define CSL_CPINTC_ENABLE_REG25_ENABLE_826_RESETVAL (0x00000000u)
  11249. #define CSL_CPINTC_ENABLE_REG25_ENABLE_827_MASK (0x08000000u)
  11250. #define CSL_CPINTC_ENABLE_REG25_ENABLE_827_SHIFT (0x0000001Bu)
  11251. #define CSL_CPINTC_ENABLE_REG25_ENABLE_827_RESETVAL (0x00000000u)
  11252. #define CSL_CPINTC_ENABLE_REG25_ENABLE_828_MASK (0x10000000u)
  11253. #define CSL_CPINTC_ENABLE_REG25_ENABLE_828_SHIFT (0x0000001Cu)
  11254. #define CSL_CPINTC_ENABLE_REG25_ENABLE_828_RESETVAL (0x00000000u)
  11255. #define CSL_CPINTC_ENABLE_REG25_ENABLE_829_MASK (0x20000000u)
  11256. #define CSL_CPINTC_ENABLE_REG25_ENABLE_829_SHIFT (0x0000001Du)
  11257. #define CSL_CPINTC_ENABLE_REG25_ENABLE_829_RESETVAL (0x00000000u)
  11258. #define CSL_CPINTC_ENABLE_REG25_ENABLE_830_MASK (0x40000000u)
  11259. #define CSL_CPINTC_ENABLE_REG25_ENABLE_830_SHIFT (0x0000001Eu)
  11260. #define CSL_CPINTC_ENABLE_REG25_ENABLE_830_RESETVAL (0x00000000u)
  11261. #define CSL_CPINTC_ENABLE_REG25_ENABLE_831_MASK (0x80000000u)
  11262. #define CSL_CPINTC_ENABLE_REG25_ENABLE_831_SHIFT (0x0000001Fu)
  11263. #define CSL_CPINTC_ENABLE_REG25_ENABLE_831_RESETVAL (0x00000000u)
  11264. #define CSL_CPINTC_ENABLE_REG25_RESETVAL (0x00000000u)
  11265. /* enable_reg26 */
  11266. #define CSL_CPINTC_ENABLE_REG26_ENABLE_832_MASK (0x00000001u)
  11267. #define CSL_CPINTC_ENABLE_REG26_ENABLE_832_SHIFT (0x00000000u)
  11268. #define CSL_CPINTC_ENABLE_REG26_ENABLE_832_RESETVAL (0x00000000u)
  11269. #define CSL_CPINTC_ENABLE_REG26_ENABLE_833_MASK (0x00000002u)
  11270. #define CSL_CPINTC_ENABLE_REG26_ENABLE_833_SHIFT (0x00000001u)
  11271. #define CSL_CPINTC_ENABLE_REG26_ENABLE_833_RESETVAL (0x00000000u)
  11272. #define CSL_CPINTC_ENABLE_REG26_ENABLE_834_MASK (0x00000004u)
  11273. #define CSL_CPINTC_ENABLE_REG26_ENABLE_834_SHIFT (0x00000002u)
  11274. #define CSL_CPINTC_ENABLE_REG26_ENABLE_834_RESETVAL (0x00000000u)
  11275. #define CSL_CPINTC_ENABLE_REG26_ENABLE_835_MASK (0x00000008u)
  11276. #define CSL_CPINTC_ENABLE_REG26_ENABLE_835_SHIFT (0x00000003u)
  11277. #define CSL_CPINTC_ENABLE_REG26_ENABLE_835_RESETVAL (0x00000000u)
  11278. #define CSL_CPINTC_ENABLE_REG26_ENABLE_836_MASK (0x00000010u)
  11279. #define CSL_CPINTC_ENABLE_REG26_ENABLE_836_SHIFT (0x00000004u)
  11280. #define CSL_CPINTC_ENABLE_REG26_ENABLE_836_RESETVAL (0x00000000u)
  11281. #define CSL_CPINTC_ENABLE_REG26_ENABLE_837_MASK (0x00000020u)
  11282. #define CSL_CPINTC_ENABLE_REG26_ENABLE_837_SHIFT (0x00000005u)
  11283. #define CSL_CPINTC_ENABLE_REG26_ENABLE_837_RESETVAL (0x00000000u)
  11284. #define CSL_CPINTC_ENABLE_REG26_ENABLE_838_MASK (0x00000040u)
  11285. #define CSL_CPINTC_ENABLE_REG26_ENABLE_838_SHIFT (0x00000006u)
  11286. #define CSL_CPINTC_ENABLE_REG26_ENABLE_838_RESETVAL (0x00000000u)
  11287. #define CSL_CPINTC_ENABLE_REG26_ENABLE_839_MASK (0x00000080u)
  11288. #define CSL_CPINTC_ENABLE_REG26_ENABLE_839_SHIFT (0x00000007u)
  11289. #define CSL_CPINTC_ENABLE_REG26_ENABLE_839_RESETVAL (0x00000000u)
  11290. #define CSL_CPINTC_ENABLE_REG26_ENABLE_840_MASK (0x00000100u)
  11291. #define CSL_CPINTC_ENABLE_REG26_ENABLE_840_SHIFT (0x00000008u)
  11292. #define CSL_CPINTC_ENABLE_REG26_ENABLE_840_RESETVAL (0x00000000u)
  11293. #define CSL_CPINTC_ENABLE_REG26_ENABLE_841_MASK (0x00000200u)
  11294. #define CSL_CPINTC_ENABLE_REG26_ENABLE_841_SHIFT (0x00000009u)
  11295. #define CSL_CPINTC_ENABLE_REG26_ENABLE_841_RESETVAL (0x00000000u)
  11296. #define CSL_CPINTC_ENABLE_REG26_ENABLE_842_MASK (0x00000400u)
  11297. #define CSL_CPINTC_ENABLE_REG26_ENABLE_842_SHIFT (0x0000000Au)
  11298. #define CSL_CPINTC_ENABLE_REG26_ENABLE_842_RESETVAL (0x00000000u)
  11299. #define CSL_CPINTC_ENABLE_REG26_ENABLE_843_MASK (0x00000800u)
  11300. #define CSL_CPINTC_ENABLE_REG26_ENABLE_843_SHIFT (0x0000000Bu)
  11301. #define CSL_CPINTC_ENABLE_REG26_ENABLE_843_RESETVAL (0x00000000u)
  11302. #define CSL_CPINTC_ENABLE_REG26_ENABLE_844_MASK (0x00001000u)
  11303. #define CSL_CPINTC_ENABLE_REG26_ENABLE_844_SHIFT (0x0000000Cu)
  11304. #define CSL_CPINTC_ENABLE_REG26_ENABLE_844_RESETVAL (0x00000000u)
  11305. #define CSL_CPINTC_ENABLE_REG26_ENABLE_845_MASK (0x00002000u)
  11306. #define CSL_CPINTC_ENABLE_REG26_ENABLE_845_SHIFT (0x0000000Du)
  11307. #define CSL_CPINTC_ENABLE_REG26_ENABLE_845_RESETVAL (0x00000000u)
  11308. #define CSL_CPINTC_ENABLE_REG26_ENABLE_846_MASK (0x00004000u)
  11309. #define CSL_CPINTC_ENABLE_REG26_ENABLE_846_SHIFT (0x0000000Eu)
  11310. #define CSL_CPINTC_ENABLE_REG26_ENABLE_846_RESETVAL (0x00000000u)
  11311. #define CSL_CPINTC_ENABLE_REG26_ENABLE_847_MASK (0x00008000u)
  11312. #define CSL_CPINTC_ENABLE_REG26_ENABLE_847_SHIFT (0x0000000Fu)
  11313. #define CSL_CPINTC_ENABLE_REG26_ENABLE_847_RESETVAL (0x00000000u)
  11314. #define CSL_CPINTC_ENABLE_REG26_ENABLE_848_MASK (0x00010000u)
  11315. #define CSL_CPINTC_ENABLE_REG26_ENABLE_848_SHIFT (0x00000010u)
  11316. #define CSL_CPINTC_ENABLE_REG26_ENABLE_848_RESETVAL (0x00000000u)
  11317. #define CSL_CPINTC_ENABLE_REG26_ENABLE_849_MASK (0x00020000u)
  11318. #define CSL_CPINTC_ENABLE_REG26_ENABLE_849_SHIFT (0x00000011u)
  11319. #define CSL_CPINTC_ENABLE_REG26_ENABLE_849_RESETVAL (0x00000000u)
  11320. #define CSL_CPINTC_ENABLE_REG26_ENABLE_850_MASK (0x00040000u)
  11321. #define CSL_CPINTC_ENABLE_REG26_ENABLE_850_SHIFT (0x00000012u)
  11322. #define CSL_CPINTC_ENABLE_REG26_ENABLE_850_RESETVAL (0x00000000u)
  11323. #define CSL_CPINTC_ENABLE_REG26_ENABLE_851_MASK (0x00080000u)
  11324. #define CSL_CPINTC_ENABLE_REG26_ENABLE_851_SHIFT (0x00000013u)
  11325. #define CSL_CPINTC_ENABLE_REG26_ENABLE_851_RESETVAL (0x00000000u)
  11326. #define CSL_CPINTC_ENABLE_REG26_ENABLE_852_MASK (0x00100000u)
  11327. #define CSL_CPINTC_ENABLE_REG26_ENABLE_852_SHIFT (0x00000014u)
  11328. #define CSL_CPINTC_ENABLE_REG26_ENABLE_852_RESETVAL (0x00000000u)
  11329. #define CSL_CPINTC_ENABLE_REG26_ENABLE_853_MASK (0x00200000u)
  11330. #define CSL_CPINTC_ENABLE_REG26_ENABLE_853_SHIFT (0x00000015u)
  11331. #define CSL_CPINTC_ENABLE_REG26_ENABLE_853_RESETVAL (0x00000000u)
  11332. #define CSL_CPINTC_ENABLE_REG26_ENABLE_854_MASK (0x00400000u)
  11333. #define CSL_CPINTC_ENABLE_REG26_ENABLE_854_SHIFT (0x00000016u)
  11334. #define CSL_CPINTC_ENABLE_REG26_ENABLE_854_RESETVAL (0x00000000u)
  11335. #define CSL_CPINTC_ENABLE_REG26_ENABLE_855_MASK (0x00800000u)
  11336. #define CSL_CPINTC_ENABLE_REG26_ENABLE_855_SHIFT (0x00000017u)
  11337. #define CSL_CPINTC_ENABLE_REG26_ENABLE_855_RESETVAL (0x00000000u)
  11338. #define CSL_CPINTC_ENABLE_REG26_ENABLE_856_MASK (0x01000000u)
  11339. #define CSL_CPINTC_ENABLE_REG26_ENABLE_856_SHIFT (0x00000018u)
  11340. #define CSL_CPINTC_ENABLE_REG26_ENABLE_856_RESETVAL (0x00000000u)
  11341. #define CSL_CPINTC_ENABLE_REG26_ENABLE_857_MASK (0x02000000u)
  11342. #define CSL_CPINTC_ENABLE_REG26_ENABLE_857_SHIFT (0x00000019u)
  11343. #define CSL_CPINTC_ENABLE_REG26_ENABLE_857_RESETVAL (0x00000000u)
  11344. #define CSL_CPINTC_ENABLE_REG26_ENABLE_858_MASK (0x04000000u)
  11345. #define CSL_CPINTC_ENABLE_REG26_ENABLE_858_SHIFT (0x0000001Au)
  11346. #define CSL_CPINTC_ENABLE_REG26_ENABLE_858_RESETVAL (0x00000000u)
  11347. #define CSL_CPINTC_ENABLE_REG26_ENABLE_859_MASK (0x08000000u)
  11348. #define CSL_CPINTC_ENABLE_REG26_ENABLE_859_SHIFT (0x0000001Bu)
  11349. #define CSL_CPINTC_ENABLE_REG26_ENABLE_859_RESETVAL (0x00000000u)
  11350. #define CSL_CPINTC_ENABLE_REG26_ENABLE_860_MASK (0x10000000u)
  11351. #define CSL_CPINTC_ENABLE_REG26_ENABLE_860_SHIFT (0x0000001Cu)
  11352. #define CSL_CPINTC_ENABLE_REG26_ENABLE_860_RESETVAL (0x00000000u)
  11353. #define CSL_CPINTC_ENABLE_REG26_ENABLE_861_MASK (0x20000000u)
  11354. #define CSL_CPINTC_ENABLE_REG26_ENABLE_861_SHIFT (0x0000001Du)
  11355. #define CSL_CPINTC_ENABLE_REG26_ENABLE_861_RESETVAL (0x00000000u)
  11356. #define CSL_CPINTC_ENABLE_REG26_ENABLE_862_MASK (0x40000000u)
  11357. #define CSL_CPINTC_ENABLE_REG26_ENABLE_862_SHIFT (0x0000001Eu)
  11358. #define CSL_CPINTC_ENABLE_REG26_ENABLE_862_RESETVAL (0x00000000u)
  11359. #define CSL_CPINTC_ENABLE_REG26_ENABLE_863_MASK (0x80000000u)
  11360. #define CSL_CPINTC_ENABLE_REG26_ENABLE_863_SHIFT (0x0000001Fu)
  11361. #define CSL_CPINTC_ENABLE_REG26_ENABLE_863_RESETVAL (0x00000000u)
  11362. #define CSL_CPINTC_ENABLE_REG26_RESETVAL (0x00000000u)
  11363. /* enable_reg27 */
  11364. #define CSL_CPINTC_ENABLE_REG27_ENABLE_864_MASK (0x00000001u)
  11365. #define CSL_CPINTC_ENABLE_REG27_ENABLE_864_SHIFT (0x00000000u)
  11366. #define CSL_CPINTC_ENABLE_REG27_ENABLE_864_RESETVAL (0x00000000u)
  11367. #define CSL_CPINTC_ENABLE_REG27_ENABLE_865_MASK (0x00000002u)
  11368. #define CSL_CPINTC_ENABLE_REG27_ENABLE_865_SHIFT (0x00000001u)
  11369. #define CSL_CPINTC_ENABLE_REG27_ENABLE_865_RESETVAL (0x00000000u)
  11370. #define CSL_CPINTC_ENABLE_REG27_ENABLE_866_MASK (0x00000004u)
  11371. #define CSL_CPINTC_ENABLE_REG27_ENABLE_866_SHIFT (0x00000002u)
  11372. #define CSL_CPINTC_ENABLE_REG27_ENABLE_866_RESETVAL (0x00000000u)
  11373. #define CSL_CPINTC_ENABLE_REG27_ENABLE_867_MASK (0x00000008u)
  11374. #define CSL_CPINTC_ENABLE_REG27_ENABLE_867_SHIFT (0x00000003u)
  11375. #define CSL_CPINTC_ENABLE_REG27_ENABLE_867_RESETVAL (0x00000000u)
  11376. #define CSL_CPINTC_ENABLE_REG27_ENABLE_868_MASK (0x00000010u)
  11377. #define CSL_CPINTC_ENABLE_REG27_ENABLE_868_SHIFT (0x00000004u)
  11378. #define CSL_CPINTC_ENABLE_REG27_ENABLE_868_RESETVAL (0x00000000u)
  11379. #define CSL_CPINTC_ENABLE_REG27_ENABLE_869_MASK (0x00000020u)
  11380. #define CSL_CPINTC_ENABLE_REG27_ENABLE_869_SHIFT (0x00000005u)
  11381. #define CSL_CPINTC_ENABLE_REG27_ENABLE_869_RESETVAL (0x00000000u)
  11382. #define CSL_CPINTC_ENABLE_REG27_ENABLE_870_MASK (0x00000040u)
  11383. #define CSL_CPINTC_ENABLE_REG27_ENABLE_870_SHIFT (0x00000006u)
  11384. #define CSL_CPINTC_ENABLE_REG27_ENABLE_870_RESETVAL (0x00000000u)
  11385. #define CSL_CPINTC_ENABLE_REG27_ENABLE_871_MASK (0x00000080u)
  11386. #define CSL_CPINTC_ENABLE_REG27_ENABLE_871_SHIFT (0x00000007u)
  11387. #define CSL_CPINTC_ENABLE_REG27_ENABLE_871_RESETVAL (0x00000000u)
  11388. #define CSL_CPINTC_ENABLE_REG27_ENABLE_872_MASK (0x00000100u)
  11389. #define CSL_CPINTC_ENABLE_REG27_ENABLE_872_SHIFT (0x00000008u)
  11390. #define CSL_CPINTC_ENABLE_REG27_ENABLE_872_RESETVAL (0x00000000u)
  11391. #define CSL_CPINTC_ENABLE_REG27_ENABLE_873_MASK (0x00000200u)
  11392. #define CSL_CPINTC_ENABLE_REG27_ENABLE_873_SHIFT (0x00000009u)
  11393. #define CSL_CPINTC_ENABLE_REG27_ENABLE_873_RESETVAL (0x00000000u)
  11394. #define CSL_CPINTC_ENABLE_REG27_ENABLE_874_MASK (0x00000400u)
  11395. #define CSL_CPINTC_ENABLE_REG27_ENABLE_874_SHIFT (0x0000000Au)
  11396. #define CSL_CPINTC_ENABLE_REG27_ENABLE_874_RESETVAL (0x00000000u)
  11397. #define CSL_CPINTC_ENABLE_REG27_ENABLE_875_MASK (0x00000800u)
  11398. #define CSL_CPINTC_ENABLE_REG27_ENABLE_875_SHIFT (0x0000000Bu)
  11399. #define CSL_CPINTC_ENABLE_REG27_ENABLE_875_RESETVAL (0x00000000u)
  11400. #define CSL_CPINTC_ENABLE_REG27_ENABLE_876_MASK (0x00001000u)
  11401. #define CSL_CPINTC_ENABLE_REG27_ENABLE_876_SHIFT (0x0000000Cu)
  11402. #define CSL_CPINTC_ENABLE_REG27_ENABLE_876_RESETVAL (0x00000000u)
  11403. #define CSL_CPINTC_ENABLE_REG27_ENABLE_877_MASK (0x00002000u)
  11404. #define CSL_CPINTC_ENABLE_REG27_ENABLE_877_SHIFT (0x0000000Du)
  11405. #define CSL_CPINTC_ENABLE_REG27_ENABLE_877_RESETVAL (0x00000000u)
  11406. #define CSL_CPINTC_ENABLE_REG27_ENABLE_878_MASK (0x00004000u)
  11407. #define CSL_CPINTC_ENABLE_REG27_ENABLE_878_SHIFT (0x0000000Eu)
  11408. #define CSL_CPINTC_ENABLE_REG27_ENABLE_878_RESETVAL (0x00000000u)
  11409. #define CSL_CPINTC_ENABLE_REG27_ENABLE_879_MASK (0x00008000u)
  11410. #define CSL_CPINTC_ENABLE_REG27_ENABLE_879_SHIFT (0x0000000Fu)
  11411. #define CSL_CPINTC_ENABLE_REG27_ENABLE_879_RESETVAL (0x00000000u)
  11412. #define CSL_CPINTC_ENABLE_REG27_ENABLE_880_MASK (0x00010000u)
  11413. #define CSL_CPINTC_ENABLE_REG27_ENABLE_880_SHIFT (0x00000010u)
  11414. #define CSL_CPINTC_ENABLE_REG27_ENABLE_880_RESETVAL (0x00000000u)
  11415. #define CSL_CPINTC_ENABLE_REG27_ENABLE_881_MASK (0x00020000u)
  11416. #define CSL_CPINTC_ENABLE_REG27_ENABLE_881_SHIFT (0x00000011u)
  11417. #define CSL_CPINTC_ENABLE_REG27_ENABLE_881_RESETVAL (0x00000000u)
  11418. #define CSL_CPINTC_ENABLE_REG27_ENABLE_882_MASK (0x00040000u)
  11419. #define CSL_CPINTC_ENABLE_REG27_ENABLE_882_SHIFT (0x00000012u)
  11420. #define CSL_CPINTC_ENABLE_REG27_ENABLE_882_RESETVAL (0x00000000u)
  11421. #define CSL_CPINTC_ENABLE_REG27_ENABLE_883_MASK (0x00080000u)
  11422. #define CSL_CPINTC_ENABLE_REG27_ENABLE_883_SHIFT (0x00000013u)
  11423. #define CSL_CPINTC_ENABLE_REG27_ENABLE_883_RESETVAL (0x00000000u)
  11424. #define CSL_CPINTC_ENABLE_REG27_ENABLE_884_MASK (0x00100000u)
  11425. #define CSL_CPINTC_ENABLE_REG27_ENABLE_884_SHIFT (0x00000014u)
  11426. #define CSL_CPINTC_ENABLE_REG27_ENABLE_884_RESETVAL (0x00000000u)
  11427. #define CSL_CPINTC_ENABLE_REG27_ENABLE_885_MASK (0x00200000u)
  11428. #define CSL_CPINTC_ENABLE_REG27_ENABLE_885_SHIFT (0x00000015u)
  11429. #define CSL_CPINTC_ENABLE_REG27_ENABLE_885_RESETVAL (0x00000000u)
  11430. #define CSL_CPINTC_ENABLE_REG27_ENABLE_886_MASK (0x00400000u)
  11431. #define CSL_CPINTC_ENABLE_REG27_ENABLE_886_SHIFT (0x00000016u)
  11432. #define CSL_CPINTC_ENABLE_REG27_ENABLE_886_RESETVAL (0x00000000u)
  11433. #define CSL_CPINTC_ENABLE_REG27_ENABLE_887_MASK (0x00800000u)
  11434. #define CSL_CPINTC_ENABLE_REG27_ENABLE_887_SHIFT (0x00000017u)
  11435. #define CSL_CPINTC_ENABLE_REG27_ENABLE_887_RESETVAL (0x00000000u)
  11436. #define CSL_CPINTC_ENABLE_REG27_ENABLE_888_MASK (0x01000000u)
  11437. #define CSL_CPINTC_ENABLE_REG27_ENABLE_888_SHIFT (0x00000018u)
  11438. #define CSL_CPINTC_ENABLE_REG27_ENABLE_888_RESETVAL (0x00000000u)
  11439. #define CSL_CPINTC_ENABLE_REG27_ENABLE_889_MASK (0x02000000u)
  11440. #define CSL_CPINTC_ENABLE_REG27_ENABLE_889_SHIFT (0x00000019u)
  11441. #define CSL_CPINTC_ENABLE_REG27_ENABLE_889_RESETVAL (0x00000000u)
  11442. #define CSL_CPINTC_ENABLE_REG27_ENABLE_890_MASK (0x04000000u)
  11443. #define CSL_CPINTC_ENABLE_REG27_ENABLE_890_SHIFT (0x0000001Au)
  11444. #define CSL_CPINTC_ENABLE_REG27_ENABLE_890_RESETVAL (0x00000000u)
  11445. #define CSL_CPINTC_ENABLE_REG27_ENABLE_891_MASK (0x08000000u)
  11446. #define CSL_CPINTC_ENABLE_REG27_ENABLE_891_SHIFT (0x0000001Bu)
  11447. #define CSL_CPINTC_ENABLE_REG27_ENABLE_891_RESETVAL (0x00000000u)
  11448. #define CSL_CPINTC_ENABLE_REG27_ENABLE_892_MASK (0x10000000u)
  11449. #define CSL_CPINTC_ENABLE_REG27_ENABLE_892_SHIFT (0x0000001Cu)
  11450. #define CSL_CPINTC_ENABLE_REG27_ENABLE_892_RESETVAL (0x00000000u)
  11451. #define CSL_CPINTC_ENABLE_REG27_ENABLE_893_MASK (0x20000000u)
  11452. #define CSL_CPINTC_ENABLE_REG27_ENABLE_893_SHIFT (0x0000001Du)
  11453. #define CSL_CPINTC_ENABLE_REG27_ENABLE_893_RESETVAL (0x00000000u)
  11454. #define CSL_CPINTC_ENABLE_REG27_ENABLE_894_MASK (0x40000000u)
  11455. #define CSL_CPINTC_ENABLE_REG27_ENABLE_894_SHIFT (0x0000001Eu)
  11456. #define CSL_CPINTC_ENABLE_REG27_ENABLE_894_RESETVAL (0x00000000u)
  11457. #define CSL_CPINTC_ENABLE_REG27_ENABLE_895_MASK (0x80000000u)
  11458. #define CSL_CPINTC_ENABLE_REG27_ENABLE_895_SHIFT (0x0000001Fu)
  11459. #define CSL_CPINTC_ENABLE_REG27_ENABLE_895_RESETVAL (0x00000000u)
  11460. #define CSL_CPINTC_ENABLE_REG27_RESETVAL (0x00000000u)
  11461. /* enable_reg28 */
  11462. #define CSL_CPINTC_ENABLE_REG28_ENABLE_896_MASK (0x00000001u)
  11463. #define CSL_CPINTC_ENABLE_REG28_ENABLE_896_SHIFT (0x00000000u)
  11464. #define CSL_CPINTC_ENABLE_REG28_ENABLE_896_RESETVAL (0x00000000u)
  11465. #define CSL_CPINTC_ENABLE_REG28_ENABLE_897_MASK (0x00000002u)
  11466. #define CSL_CPINTC_ENABLE_REG28_ENABLE_897_SHIFT (0x00000001u)
  11467. #define CSL_CPINTC_ENABLE_REG28_ENABLE_897_RESETVAL (0x00000000u)
  11468. #define CSL_CPINTC_ENABLE_REG28_ENABLE_898_MASK (0x00000004u)
  11469. #define CSL_CPINTC_ENABLE_REG28_ENABLE_898_SHIFT (0x00000002u)
  11470. #define CSL_CPINTC_ENABLE_REG28_ENABLE_898_RESETVAL (0x00000000u)
  11471. #define CSL_CPINTC_ENABLE_REG28_ENABLE_899_MASK (0x00000008u)
  11472. #define CSL_CPINTC_ENABLE_REG28_ENABLE_899_SHIFT (0x00000003u)
  11473. #define CSL_CPINTC_ENABLE_REG28_ENABLE_899_RESETVAL (0x00000000u)
  11474. #define CSL_CPINTC_ENABLE_REG28_ENABLE_900_MASK (0x00000010u)
  11475. #define CSL_CPINTC_ENABLE_REG28_ENABLE_900_SHIFT (0x00000004u)
  11476. #define CSL_CPINTC_ENABLE_REG28_ENABLE_900_RESETVAL (0x00000000u)
  11477. #define CSL_CPINTC_ENABLE_REG28_ENABLE_901_MASK (0x00000020u)
  11478. #define CSL_CPINTC_ENABLE_REG28_ENABLE_901_SHIFT (0x00000005u)
  11479. #define CSL_CPINTC_ENABLE_REG28_ENABLE_901_RESETVAL (0x00000000u)
  11480. #define CSL_CPINTC_ENABLE_REG28_ENABLE_902_MASK (0x00000040u)
  11481. #define CSL_CPINTC_ENABLE_REG28_ENABLE_902_SHIFT (0x00000006u)
  11482. #define CSL_CPINTC_ENABLE_REG28_ENABLE_902_RESETVAL (0x00000000u)
  11483. #define CSL_CPINTC_ENABLE_REG28_ENABLE_903_MASK (0x00000080u)
  11484. #define CSL_CPINTC_ENABLE_REG28_ENABLE_903_SHIFT (0x00000007u)
  11485. #define CSL_CPINTC_ENABLE_REG28_ENABLE_903_RESETVAL (0x00000000u)
  11486. #define CSL_CPINTC_ENABLE_REG28_ENABLE_904_MASK (0x00000100u)
  11487. #define CSL_CPINTC_ENABLE_REG28_ENABLE_904_SHIFT (0x00000008u)
  11488. #define CSL_CPINTC_ENABLE_REG28_ENABLE_904_RESETVAL (0x00000000u)
  11489. #define CSL_CPINTC_ENABLE_REG28_ENABLE_905_MASK (0x00000200u)
  11490. #define CSL_CPINTC_ENABLE_REG28_ENABLE_905_SHIFT (0x00000009u)
  11491. #define CSL_CPINTC_ENABLE_REG28_ENABLE_905_RESETVAL (0x00000000u)
  11492. #define CSL_CPINTC_ENABLE_REG28_ENABLE_906_MASK (0x00000400u)
  11493. #define CSL_CPINTC_ENABLE_REG28_ENABLE_906_SHIFT (0x0000000Au)
  11494. #define CSL_CPINTC_ENABLE_REG28_ENABLE_906_RESETVAL (0x00000000u)
  11495. #define CSL_CPINTC_ENABLE_REG28_ENABLE_907_MASK (0x00000800u)
  11496. #define CSL_CPINTC_ENABLE_REG28_ENABLE_907_SHIFT (0x0000000Bu)
  11497. #define CSL_CPINTC_ENABLE_REG28_ENABLE_907_RESETVAL (0x00000000u)
  11498. #define CSL_CPINTC_ENABLE_REG28_ENABLE_908_MASK (0x00001000u)
  11499. #define CSL_CPINTC_ENABLE_REG28_ENABLE_908_SHIFT (0x0000000Cu)
  11500. #define CSL_CPINTC_ENABLE_REG28_ENABLE_908_RESETVAL (0x00000000u)
  11501. #define CSL_CPINTC_ENABLE_REG28_ENABLE_909_MASK (0x00002000u)
  11502. #define CSL_CPINTC_ENABLE_REG28_ENABLE_909_SHIFT (0x0000000Du)
  11503. #define CSL_CPINTC_ENABLE_REG28_ENABLE_909_RESETVAL (0x00000000u)
  11504. #define CSL_CPINTC_ENABLE_REG28_ENABLE_910_MASK (0x00004000u)
  11505. #define CSL_CPINTC_ENABLE_REG28_ENABLE_910_SHIFT (0x0000000Eu)
  11506. #define CSL_CPINTC_ENABLE_REG28_ENABLE_910_RESETVAL (0x00000000u)
  11507. #define CSL_CPINTC_ENABLE_REG28_ENABLE_911_MASK (0x00008000u)
  11508. #define CSL_CPINTC_ENABLE_REG28_ENABLE_911_SHIFT (0x0000000Fu)
  11509. #define CSL_CPINTC_ENABLE_REG28_ENABLE_911_RESETVAL (0x00000000u)
  11510. #define CSL_CPINTC_ENABLE_REG28_ENABLE_912_MASK (0x00010000u)
  11511. #define CSL_CPINTC_ENABLE_REG28_ENABLE_912_SHIFT (0x00000010u)
  11512. #define CSL_CPINTC_ENABLE_REG28_ENABLE_912_RESETVAL (0x00000000u)
  11513. #define CSL_CPINTC_ENABLE_REG28_ENABLE_913_MASK (0x00020000u)
  11514. #define CSL_CPINTC_ENABLE_REG28_ENABLE_913_SHIFT (0x00000011u)
  11515. #define CSL_CPINTC_ENABLE_REG28_ENABLE_913_RESETVAL (0x00000000u)
  11516. #define CSL_CPINTC_ENABLE_REG28_ENABLE_914_MASK (0x00040000u)
  11517. #define CSL_CPINTC_ENABLE_REG28_ENABLE_914_SHIFT (0x00000012u)
  11518. #define CSL_CPINTC_ENABLE_REG28_ENABLE_914_RESETVAL (0x00000000u)
  11519. #define CSL_CPINTC_ENABLE_REG28_ENABLE_915_MASK (0x00080000u)
  11520. #define CSL_CPINTC_ENABLE_REG28_ENABLE_915_SHIFT (0x00000013u)
  11521. #define CSL_CPINTC_ENABLE_REG28_ENABLE_915_RESETVAL (0x00000000u)
  11522. #define CSL_CPINTC_ENABLE_REG28_ENABLE_916_MASK (0x00100000u)
  11523. #define CSL_CPINTC_ENABLE_REG28_ENABLE_916_SHIFT (0x00000014u)
  11524. #define CSL_CPINTC_ENABLE_REG28_ENABLE_916_RESETVAL (0x00000000u)
  11525. #define CSL_CPINTC_ENABLE_REG28_ENABLE_917_MASK (0x00200000u)
  11526. #define CSL_CPINTC_ENABLE_REG28_ENABLE_917_SHIFT (0x00000015u)
  11527. #define CSL_CPINTC_ENABLE_REG28_ENABLE_917_RESETVAL (0x00000000u)
  11528. #define CSL_CPINTC_ENABLE_REG28_ENABLE_918_MASK (0x00400000u)
  11529. #define CSL_CPINTC_ENABLE_REG28_ENABLE_918_SHIFT (0x00000016u)
  11530. #define CSL_CPINTC_ENABLE_REG28_ENABLE_918_RESETVAL (0x00000000u)
  11531. #define CSL_CPINTC_ENABLE_REG28_ENABLE_919_MASK (0x00800000u)
  11532. #define CSL_CPINTC_ENABLE_REG28_ENABLE_919_SHIFT (0x00000017u)
  11533. #define CSL_CPINTC_ENABLE_REG28_ENABLE_919_RESETVAL (0x00000000u)
  11534. #define CSL_CPINTC_ENABLE_REG28_ENABLE_920_MASK (0x01000000u)
  11535. #define CSL_CPINTC_ENABLE_REG28_ENABLE_920_SHIFT (0x00000018u)
  11536. #define CSL_CPINTC_ENABLE_REG28_ENABLE_920_RESETVAL (0x00000000u)
  11537. #define CSL_CPINTC_ENABLE_REG28_ENABLE_921_MASK (0x02000000u)
  11538. #define CSL_CPINTC_ENABLE_REG28_ENABLE_921_SHIFT (0x00000019u)
  11539. #define CSL_CPINTC_ENABLE_REG28_ENABLE_921_RESETVAL (0x00000000u)
  11540. #define CSL_CPINTC_ENABLE_REG28_ENABLE_922_MASK (0x04000000u)
  11541. #define CSL_CPINTC_ENABLE_REG28_ENABLE_922_SHIFT (0x0000001Au)
  11542. #define CSL_CPINTC_ENABLE_REG28_ENABLE_922_RESETVAL (0x00000000u)
  11543. #define CSL_CPINTC_ENABLE_REG28_ENABLE_923_MASK (0x08000000u)
  11544. #define CSL_CPINTC_ENABLE_REG28_ENABLE_923_SHIFT (0x0000001Bu)
  11545. #define CSL_CPINTC_ENABLE_REG28_ENABLE_923_RESETVAL (0x00000000u)
  11546. #define CSL_CPINTC_ENABLE_REG28_ENABLE_924_MASK (0x10000000u)
  11547. #define CSL_CPINTC_ENABLE_REG28_ENABLE_924_SHIFT (0x0000001Cu)
  11548. #define CSL_CPINTC_ENABLE_REG28_ENABLE_924_RESETVAL (0x00000000u)
  11549. #define CSL_CPINTC_ENABLE_REG28_ENABLE_925_MASK (0x20000000u)
  11550. #define CSL_CPINTC_ENABLE_REG28_ENABLE_925_SHIFT (0x0000001Du)
  11551. #define CSL_CPINTC_ENABLE_REG28_ENABLE_925_RESETVAL (0x00000000u)
  11552. #define CSL_CPINTC_ENABLE_REG28_ENABLE_926_MASK (0x40000000u)
  11553. #define CSL_CPINTC_ENABLE_REG28_ENABLE_926_SHIFT (0x0000001Eu)
  11554. #define CSL_CPINTC_ENABLE_REG28_ENABLE_926_RESETVAL (0x00000000u)
  11555. #define CSL_CPINTC_ENABLE_REG28_ENABLE_927_MASK (0x80000000u)
  11556. #define CSL_CPINTC_ENABLE_REG28_ENABLE_927_SHIFT (0x0000001Fu)
  11557. #define CSL_CPINTC_ENABLE_REG28_ENABLE_927_RESETVAL (0x00000000u)
  11558. #define CSL_CPINTC_ENABLE_REG28_RESETVAL (0x00000000u)
  11559. /* enable_reg29 */
  11560. #define CSL_CPINTC_ENABLE_REG29_ENABLE_928_MASK (0x00000001u)
  11561. #define CSL_CPINTC_ENABLE_REG29_ENABLE_928_SHIFT (0x00000000u)
  11562. #define CSL_CPINTC_ENABLE_REG29_ENABLE_928_RESETVAL (0x00000000u)
  11563. #define CSL_CPINTC_ENABLE_REG29_ENABLE_929_MASK (0x00000002u)
  11564. #define CSL_CPINTC_ENABLE_REG29_ENABLE_929_SHIFT (0x00000001u)
  11565. #define CSL_CPINTC_ENABLE_REG29_ENABLE_929_RESETVAL (0x00000000u)
  11566. #define CSL_CPINTC_ENABLE_REG29_ENABLE_930_MASK (0x00000004u)
  11567. #define CSL_CPINTC_ENABLE_REG29_ENABLE_930_SHIFT (0x00000002u)
  11568. #define CSL_CPINTC_ENABLE_REG29_ENABLE_930_RESETVAL (0x00000000u)
  11569. #define CSL_CPINTC_ENABLE_REG29_ENABLE_931_MASK (0x00000008u)
  11570. #define CSL_CPINTC_ENABLE_REG29_ENABLE_931_SHIFT (0x00000003u)
  11571. #define CSL_CPINTC_ENABLE_REG29_ENABLE_931_RESETVAL (0x00000000u)
  11572. #define CSL_CPINTC_ENABLE_REG29_ENABLE_932_MASK (0x00000010u)
  11573. #define CSL_CPINTC_ENABLE_REG29_ENABLE_932_SHIFT (0x00000004u)
  11574. #define CSL_CPINTC_ENABLE_REG29_ENABLE_932_RESETVAL (0x00000000u)
  11575. #define CSL_CPINTC_ENABLE_REG29_ENABLE_933_MASK (0x00000020u)
  11576. #define CSL_CPINTC_ENABLE_REG29_ENABLE_933_SHIFT (0x00000005u)
  11577. #define CSL_CPINTC_ENABLE_REG29_ENABLE_933_RESETVAL (0x00000000u)
  11578. #define CSL_CPINTC_ENABLE_REG29_ENABLE_934_MASK (0x00000040u)
  11579. #define CSL_CPINTC_ENABLE_REG29_ENABLE_934_SHIFT (0x00000006u)
  11580. #define CSL_CPINTC_ENABLE_REG29_ENABLE_934_RESETVAL (0x00000000u)
  11581. #define CSL_CPINTC_ENABLE_REG29_ENABLE_935_MASK (0x00000080u)
  11582. #define CSL_CPINTC_ENABLE_REG29_ENABLE_935_SHIFT (0x00000007u)
  11583. #define CSL_CPINTC_ENABLE_REG29_ENABLE_935_RESETVAL (0x00000000u)
  11584. #define CSL_CPINTC_ENABLE_REG29_ENABLE_936_MASK (0x00000100u)
  11585. #define CSL_CPINTC_ENABLE_REG29_ENABLE_936_SHIFT (0x00000008u)
  11586. #define CSL_CPINTC_ENABLE_REG29_ENABLE_936_RESETVAL (0x00000000u)
  11587. #define CSL_CPINTC_ENABLE_REG29_ENABLE_937_MASK (0x00000200u)
  11588. #define CSL_CPINTC_ENABLE_REG29_ENABLE_937_SHIFT (0x00000009u)
  11589. #define CSL_CPINTC_ENABLE_REG29_ENABLE_937_RESETVAL (0x00000000u)
  11590. #define CSL_CPINTC_ENABLE_REG29_ENABLE_938_MASK (0x00000400u)
  11591. #define CSL_CPINTC_ENABLE_REG29_ENABLE_938_SHIFT (0x0000000Au)
  11592. #define CSL_CPINTC_ENABLE_REG29_ENABLE_938_RESETVAL (0x00000000u)
  11593. #define CSL_CPINTC_ENABLE_REG29_ENABLE_939_MASK (0x00000800u)
  11594. #define CSL_CPINTC_ENABLE_REG29_ENABLE_939_SHIFT (0x0000000Bu)
  11595. #define CSL_CPINTC_ENABLE_REG29_ENABLE_939_RESETVAL (0x00000000u)
  11596. #define CSL_CPINTC_ENABLE_REG29_ENABLE_940_MASK (0x00001000u)
  11597. #define CSL_CPINTC_ENABLE_REG29_ENABLE_940_SHIFT (0x0000000Cu)
  11598. #define CSL_CPINTC_ENABLE_REG29_ENABLE_940_RESETVAL (0x00000000u)
  11599. #define CSL_CPINTC_ENABLE_REG29_ENABLE_941_MASK (0x00002000u)
  11600. #define CSL_CPINTC_ENABLE_REG29_ENABLE_941_SHIFT (0x0000000Du)
  11601. #define CSL_CPINTC_ENABLE_REG29_ENABLE_941_RESETVAL (0x00000000u)
  11602. #define CSL_CPINTC_ENABLE_REG29_ENABLE_942_MASK (0x00004000u)
  11603. #define CSL_CPINTC_ENABLE_REG29_ENABLE_942_SHIFT (0x0000000Eu)
  11604. #define CSL_CPINTC_ENABLE_REG29_ENABLE_942_RESETVAL (0x00000000u)
  11605. #define CSL_CPINTC_ENABLE_REG29_ENABLE_943_MASK (0x00008000u)
  11606. #define CSL_CPINTC_ENABLE_REG29_ENABLE_943_SHIFT (0x0000000Fu)
  11607. #define CSL_CPINTC_ENABLE_REG29_ENABLE_943_RESETVAL (0x00000000u)
  11608. #define CSL_CPINTC_ENABLE_REG29_ENABLE_944_MASK (0x00010000u)
  11609. #define CSL_CPINTC_ENABLE_REG29_ENABLE_944_SHIFT (0x00000010u)
  11610. #define CSL_CPINTC_ENABLE_REG29_ENABLE_944_RESETVAL (0x00000000u)
  11611. #define CSL_CPINTC_ENABLE_REG29_ENABLE_945_MASK (0x00020000u)
  11612. #define CSL_CPINTC_ENABLE_REG29_ENABLE_945_SHIFT (0x00000011u)
  11613. #define CSL_CPINTC_ENABLE_REG29_ENABLE_945_RESETVAL (0x00000000u)
  11614. #define CSL_CPINTC_ENABLE_REG29_ENABLE_946_MASK (0x00040000u)
  11615. #define CSL_CPINTC_ENABLE_REG29_ENABLE_946_SHIFT (0x00000012u)
  11616. #define CSL_CPINTC_ENABLE_REG29_ENABLE_946_RESETVAL (0x00000000u)
  11617. #define CSL_CPINTC_ENABLE_REG29_ENABLE_947_MASK (0x00080000u)
  11618. #define CSL_CPINTC_ENABLE_REG29_ENABLE_947_SHIFT (0x00000013u)
  11619. #define CSL_CPINTC_ENABLE_REG29_ENABLE_947_RESETVAL (0x00000000u)
  11620. #define CSL_CPINTC_ENABLE_REG29_ENABLE_948_MASK (0x00100000u)
  11621. #define CSL_CPINTC_ENABLE_REG29_ENABLE_948_SHIFT (0x00000014u)
  11622. #define CSL_CPINTC_ENABLE_REG29_ENABLE_948_RESETVAL (0x00000000u)
  11623. #define CSL_CPINTC_ENABLE_REG29_ENABLE_949_MASK (0x00200000u)
  11624. #define CSL_CPINTC_ENABLE_REG29_ENABLE_949_SHIFT (0x00000015u)
  11625. #define CSL_CPINTC_ENABLE_REG29_ENABLE_949_RESETVAL (0x00000000u)
  11626. #define CSL_CPINTC_ENABLE_REG29_ENABLE_950_MASK (0x00400000u)
  11627. #define CSL_CPINTC_ENABLE_REG29_ENABLE_950_SHIFT (0x00000016u)
  11628. #define CSL_CPINTC_ENABLE_REG29_ENABLE_950_RESETVAL (0x00000000u)
  11629. #define CSL_CPINTC_ENABLE_REG29_ENABLE_951_MASK (0x00800000u)
  11630. #define CSL_CPINTC_ENABLE_REG29_ENABLE_951_SHIFT (0x00000017u)
  11631. #define CSL_CPINTC_ENABLE_REG29_ENABLE_951_RESETVAL (0x00000000u)
  11632. #define CSL_CPINTC_ENABLE_REG29_ENABLE_952_MASK (0x01000000u)
  11633. #define CSL_CPINTC_ENABLE_REG29_ENABLE_952_SHIFT (0x00000018u)
  11634. #define CSL_CPINTC_ENABLE_REG29_ENABLE_952_RESETVAL (0x00000000u)
  11635. #define CSL_CPINTC_ENABLE_REG29_ENABLE_953_MASK (0x02000000u)
  11636. #define CSL_CPINTC_ENABLE_REG29_ENABLE_953_SHIFT (0x00000019u)
  11637. #define CSL_CPINTC_ENABLE_REG29_ENABLE_953_RESETVAL (0x00000000u)
  11638. #define CSL_CPINTC_ENABLE_REG29_ENABLE_954_MASK (0x04000000u)
  11639. #define CSL_CPINTC_ENABLE_REG29_ENABLE_954_SHIFT (0x0000001Au)
  11640. #define CSL_CPINTC_ENABLE_REG29_ENABLE_954_RESETVAL (0x00000000u)
  11641. #define CSL_CPINTC_ENABLE_REG29_ENABLE_955_MASK (0x08000000u)
  11642. #define CSL_CPINTC_ENABLE_REG29_ENABLE_955_SHIFT (0x0000001Bu)
  11643. #define CSL_CPINTC_ENABLE_REG29_ENABLE_955_RESETVAL (0x00000000u)
  11644. #define CSL_CPINTC_ENABLE_REG29_ENABLE_956_MASK (0x10000000u)
  11645. #define CSL_CPINTC_ENABLE_REG29_ENABLE_956_SHIFT (0x0000001Cu)
  11646. #define CSL_CPINTC_ENABLE_REG29_ENABLE_956_RESETVAL (0x00000000u)
  11647. #define CSL_CPINTC_ENABLE_REG29_ENABLE_957_MASK (0x20000000u)
  11648. #define CSL_CPINTC_ENABLE_REG29_ENABLE_957_SHIFT (0x0000001Du)
  11649. #define CSL_CPINTC_ENABLE_REG29_ENABLE_957_RESETVAL (0x00000000u)
  11650. #define CSL_CPINTC_ENABLE_REG29_ENABLE_958_MASK (0x40000000u)
  11651. #define CSL_CPINTC_ENABLE_REG29_ENABLE_958_SHIFT (0x0000001Eu)
  11652. #define CSL_CPINTC_ENABLE_REG29_ENABLE_958_RESETVAL (0x00000000u)
  11653. #define CSL_CPINTC_ENABLE_REG29_ENABLE_959_MASK (0x80000000u)
  11654. #define CSL_CPINTC_ENABLE_REG29_ENABLE_959_SHIFT (0x0000001Fu)
  11655. #define CSL_CPINTC_ENABLE_REG29_ENABLE_959_RESETVAL (0x00000000u)
  11656. #define CSL_CPINTC_ENABLE_REG29_RESETVAL (0x00000000u)
  11657. /* enable_reg30 */
  11658. #define CSL_CPINTC_ENABLE_REG30_ENABLE_960_MASK (0x00000001u)
  11659. #define CSL_CPINTC_ENABLE_REG30_ENABLE_960_SHIFT (0x00000000u)
  11660. #define CSL_CPINTC_ENABLE_REG30_ENABLE_960_RESETVAL (0x00000000u)
  11661. #define CSL_CPINTC_ENABLE_REG30_ENABLE_961_MASK (0x00000002u)
  11662. #define CSL_CPINTC_ENABLE_REG30_ENABLE_961_SHIFT (0x00000001u)
  11663. #define CSL_CPINTC_ENABLE_REG30_ENABLE_961_RESETVAL (0x00000000u)
  11664. #define CSL_CPINTC_ENABLE_REG30_ENABLE_962_MASK (0x00000004u)
  11665. #define CSL_CPINTC_ENABLE_REG30_ENABLE_962_SHIFT (0x00000002u)
  11666. #define CSL_CPINTC_ENABLE_REG30_ENABLE_962_RESETVAL (0x00000000u)
  11667. #define CSL_CPINTC_ENABLE_REG30_ENABLE_963_MASK (0x00000008u)
  11668. #define CSL_CPINTC_ENABLE_REG30_ENABLE_963_SHIFT (0x00000003u)
  11669. #define CSL_CPINTC_ENABLE_REG30_ENABLE_963_RESETVAL (0x00000000u)
  11670. #define CSL_CPINTC_ENABLE_REG30_ENABLE_964_MASK (0x00000010u)
  11671. #define CSL_CPINTC_ENABLE_REG30_ENABLE_964_SHIFT (0x00000004u)
  11672. #define CSL_CPINTC_ENABLE_REG30_ENABLE_964_RESETVAL (0x00000000u)
  11673. #define CSL_CPINTC_ENABLE_REG30_ENABLE_965_MASK (0x00000020u)
  11674. #define CSL_CPINTC_ENABLE_REG30_ENABLE_965_SHIFT (0x00000005u)
  11675. #define CSL_CPINTC_ENABLE_REG30_ENABLE_965_RESETVAL (0x00000000u)
  11676. #define CSL_CPINTC_ENABLE_REG30_ENABLE_966_MASK (0x00000040u)
  11677. #define CSL_CPINTC_ENABLE_REG30_ENABLE_966_SHIFT (0x00000006u)
  11678. #define CSL_CPINTC_ENABLE_REG30_ENABLE_966_RESETVAL (0x00000000u)
  11679. #define CSL_CPINTC_ENABLE_REG30_ENABLE_967_MASK (0x00000080u)
  11680. #define CSL_CPINTC_ENABLE_REG30_ENABLE_967_SHIFT (0x00000007u)
  11681. #define CSL_CPINTC_ENABLE_REG30_ENABLE_967_RESETVAL (0x00000000u)
  11682. #define CSL_CPINTC_ENABLE_REG30_ENABLE_968_MASK (0x00000100u)
  11683. #define CSL_CPINTC_ENABLE_REG30_ENABLE_968_SHIFT (0x00000008u)
  11684. #define CSL_CPINTC_ENABLE_REG30_ENABLE_968_RESETVAL (0x00000000u)
  11685. #define CSL_CPINTC_ENABLE_REG30_ENABLE_969_MASK (0x00000200u)
  11686. #define CSL_CPINTC_ENABLE_REG30_ENABLE_969_SHIFT (0x00000009u)
  11687. #define CSL_CPINTC_ENABLE_REG30_ENABLE_969_RESETVAL (0x00000000u)
  11688. #define CSL_CPINTC_ENABLE_REG30_ENABLE_970_MASK (0x00000400u)
  11689. #define CSL_CPINTC_ENABLE_REG30_ENABLE_970_SHIFT (0x0000000Au)
  11690. #define CSL_CPINTC_ENABLE_REG30_ENABLE_970_RESETVAL (0x00000000u)
  11691. #define CSL_CPINTC_ENABLE_REG30_ENABLE_971_MASK (0x00000800u)
  11692. #define CSL_CPINTC_ENABLE_REG30_ENABLE_971_SHIFT (0x0000000Bu)
  11693. #define CSL_CPINTC_ENABLE_REG30_ENABLE_971_RESETVAL (0x00000000u)
  11694. #define CSL_CPINTC_ENABLE_REG30_ENABLE_972_MASK (0x00001000u)
  11695. #define CSL_CPINTC_ENABLE_REG30_ENABLE_972_SHIFT (0x0000000Cu)
  11696. #define CSL_CPINTC_ENABLE_REG30_ENABLE_972_RESETVAL (0x00000000u)
  11697. #define CSL_CPINTC_ENABLE_REG30_ENABLE_973_MASK (0x00002000u)
  11698. #define CSL_CPINTC_ENABLE_REG30_ENABLE_973_SHIFT (0x0000000Du)
  11699. #define CSL_CPINTC_ENABLE_REG30_ENABLE_973_RESETVAL (0x00000000u)
  11700. #define CSL_CPINTC_ENABLE_REG30_ENABLE_974_MASK (0x00004000u)
  11701. #define CSL_CPINTC_ENABLE_REG30_ENABLE_974_SHIFT (0x0000000Eu)
  11702. #define CSL_CPINTC_ENABLE_REG30_ENABLE_974_RESETVAL (0x00000000u)
  11703. #define CSL_CPINTC_ENABLE_REG30_ENABLE_975_MASK (0x00008000u)
  11704. #define CSL_CPINTC_ENABLE_REG30_ENABLE_975_SHIFT (0x0000000Fu)
  11705. #define CSL_CPINTC_ENABLE_REG30_ENABLE_975_RESETVAL (0x00000000u)
  11706. #define CSL_CPINTC_ENABLE_REG30_ENABLE_976_MASK (0x00010000u)
  11707. #define CSL_CPINTC_ENABLE_REG30_ENABLE_976_SHIFT (0x00000010u)
  11708. #define CSL_CPINTC_ENABLE_REG30_ENABLE_976_RESETVAL (0x00000000u)
  11709. #define CSL_CPINTC_ENABLE_REG30_ENABLE_977_MASK (0x00020000u)
  11710. #define CSL_CPINTC_ENABLE_REG30_ENABLE_977_SHIFT (0x00000011u)
  11711. #define CSL_CPINTC_ENABLE_REG30_ENABLE_977_RESETVAL (0x00000000u)
  11712. #define CSL_CPINTC_ENABLE_REG30_ENABLE_978_MASK (0x00040000u)
  11713. #define CSL_CPINTC_ENABLE_REG30_ENABLE_978_SHIFT (0x00000012u)
  11714. #define CSL_CPINTC_ENABLE_REG30_ENABLE_978_RESETVAL (0x00000000u)
  11715. #define CSL_CPINTC_ENABLE_REG30_ENABLE_979_MASK (0x00080000u)
  11716. #define CSL_CPINTC_ENABLE_REG30_ENABLE_979_SHIFT (0x00000013u)
  11717. #define CSL_CPINTC_ENABLE_REG30_ENABLE_979_RESETVAL (0x00000000u)
  11718. #define CSL_CPINTC_ENABLE_REG30_ENABLE_980_MASK (0x00100000u)
  11719. #define CSL_CPINTC_ENABLE_REG30_ENABLE_980_SHIFT (0x00000014u)
  11720. #define CSL_CPINTC_ENABLE_REG30_ENABLE_980_RESETVAL (0x00000000u)
  11721. #define CSL_CPINTC_ENABLE_REG30_ENABLE_981_MASK (0x00200000u)
  11722. #define CSL_CPINTC_ENABLE_REG30_ENABLE_981_SHIFT (0x00000015u)
  11723. #define CSL_CPINTC_ENABLE_REG30_ENABLE_981_RESETVAL (0x00000000u)
  11724. #define CSL_CPINTC_ENABLE_REG30_ENABLE_982_MASK (0x00400000u)
  11725. #define CSL_CPINTC_ENABLE_REG30_ENABLE_982_SHIFT (0x00000016u)
  11726. #define CSL_CPINTC_ENABLE_REG30_ENABLE_982_RESETVAL (0x00000000u)
  11727. #define CSL_CPINTC_ENABLE_REG30_ENABLE_983_MASK (0x00800000u)
  11728. #define CSL_CPINTC_ENABLE_REG30_ENABLE_983_SHIFT (0x00000017u)
  11729. #define CSL_CPINTC_ENABLE_REG30_ENABLE_983_RESETVAL (0x00000000u)
  11730. #define CSL_CPINTC_ENABLE_REG30_ENABLE_984_MASK (0x01000000u)
  11731. #define CSL_CPINTC_ENABLE_REG30_ENABLE_984_SHIFT (0x00000018u)
  11732. #define CSL_CPINTC_ENABLE_REG30_ENABLE_984_RESETVAL (0x00000000u)
  11733. #define CSL_CPINTC_ENABLE_REG30_ENABLE_985_MASK (0x02000000u)
  11734. #define CSL_CPINTC_ENABLE_REG30_ENABLE_985_SHIFT (0x00000019u)
  11735. #define CSL_CPINTC_ENABLE_REG30_ENABLE_985_RESETVAL (0x00000000u)
  11736. #define CSL_CPINTC_ENABLE_REG30_ENABLE_986_MASK (0x04000000u)
  11737. #define CSL_CPINTC_ENABLE_REG30_ENABLE_986_SHIFT (0x0000001Au)
  11738. #define CSL_CPINTC_ENABLE_REG30_ENABLE_986_RESETVAL (0x00000000u)
  11739. #define CSL_CPINTC_ENABLE_REG30_ENABLE_987_MASK (0x08000000u)
  11740. #define CSL_CPINTC_ENABLE_REG30_ENABLE_987_SHIFT (0x0000001Bu)
  11741. #define CSL_CPINTC_ENABLE_REG30_ENABLE_987_RESETVAL (0x00000000u)
  11742. #define CSL_CPINTC_ENABLE_REG30_ENABLE_988_MASK (0x10000000u)
  11743. #define CSL_CPINTC_ENABLE_REG30_ENABLE_988_SHIFT (0x0000001Cu)
  11744. #define CSL_CPINTC_ENABLE_REG30_ENABLE_988_RESETVAL (0x00000000u)
  11745. #define CSL_CPINTC_ENABLE_REG30_ENABLE_989_MASK (0x20000000u)
  11746. #define CSL_CPINTC_ENABLE_REG30_ENABLE_989_SHIFT (0x0000001Du)
  11747. #define CSL_CPINTC_ENABLE_REG30_ENABLE_989_RESETVAL (0x00000000u)
  11748. #define CSL_CPINTC_ENABLE_REG30_ENABLE_990_MASK (0x40000000u)
  11749. #define CSL_CPINTC_ENABLE_REG30_ENABLE_990_SHIFT (0x0000001Eu)
  11750. #define CSL_CPINTC_ENABLE_REG30_ENABLE_990_RESETVAL (0x00000000u)
  11751. #define CSL_CPINTC_ENABLE_REG30_ENABLE_991_MASK (0x80000000u)
  11752. #define CSL_CPINTC_ENABLE_REG30_ENABLE_991_SHIFT (0x0000001Fu)
  11753. #define CSL_CPINTC_ENABLE_REG30_ENABLE_991_RESETVAL (0x00000000u)
  11754. #define CSL_CPINTC_ENABLE_REG30_RESETVAL (0x00000000u)
  11755. /* enable_reg31 */
  11756. #define CSL_CPINTC_ENABLE_REG31_ENABLE_992_MASK (0x00000001u)
  11757. #define CSL_CPINTC_ENABLE_REG31_ENABLE_992_SHIFT (0x00000000u)
  11758. #define CSL_CPINTC_ENABLE_REG31_ENABLE_992_RESETVAL (0x00000000u)
  11759. #define CSL_CPINTC_ENABLE_REG31_ENABLE_993_MASK (0x00000002u)
  11760. #define CSL_CPINTC_ENABLE_REG31_ENABLE_993_SHIFT (0x00000001u)
  11761. #define CSL_CPINTC_ENABLE_REG31_ENABLE_993_RESETVAL (0x00000000u)
  11762. #define CSL_CPINTC_ENABLE_REG31_ENABLE_994_MASK (0x00000004u)
  11763. #define CSL_CPINTC_ENABLE_REG31_ENABLE_994_SHIFT (0x00000002u)
  11764. #define CSL_CPINTC_ENABLE_REG31_ENABLE_994_RESETVAL (0x00000000u)
  11765. #define CSL_CPINTC_ENABLE_REG31_ENABLE_995_MASK (0x00000008u)
  11766. #define CSL_CPINTC_ENABLE_REG31_ENABLE_995_SHIFT (0x00000003u)
  11767. #define CSL_CPINTC_ENABLE_REG31_ENABLE_995_RESETVAL (0x00000000u)
  11768. #define CSL_CPINTC_ENABLE_REG31_ENABLE_996_MASK (0x00000010u)
  11769. #define CSL_CPINTC_ENABLE_REG31_ENABLE_996_SHIFT (0x00000004u)
  11770. #define CSL_CPINTC_ENABLE_REG31_ENABLE_996_RESETVAL (0x00000000u)
  11771. #define CSL_CPINTC_ENABLE_REG31_ENABLE_997_MASK (0x00000020u)
  11772. #define CSL_CPINTC_ENABLE_REG31_ENABLE_997_SHIFT (0x00000005u)
  11773. #define CSL_CPINTC_ENABLE_REG31_ENABLE_997_RESETVAL (0x00000000u)
  11774. #define CSL_CPINTC_ENABLE_REG31_ENABLE_998_MASK (0x00000040u)
  11775. #define CSL_CPINTC_ENABLE_REG31_ENABLE_998_SHIFT (0x00000006u)
  11776. #define CSL_CPINTC_ENABLE_REG31_ENABLE_998_RESETVAL (0x00000000u)
  11777. #define CSL_CPINTC_ENABLE_REG31_ENABLE_999_MASK (0x00000080u)
  11778. #define CSL_CPINTC_ENABLE_REG31_ENABLE_999_SHIFT (0x00000007u)
  11779. #define CSL_CPINTC_ENABLE_REG31_ENABLE_999_RESETVAL (0x00000000u)
  11780. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1000_MASK (0x00000100u)
  11781. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1000_SHIFT (0x00000008u)
  11782. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1000_RESETVAL (0x00000000u)
  11783. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1001_MASK (0x00000200u)
  11784. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1001_SHIFT (0x00000009u)
  11785. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1001_RESETVAL (0x00000000u)
  11786. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1002_MASK (0x00000400u)
  11787. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1002_SHIFT (0x0000000Au)
  11788. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1002_RESETVAL (0x00000000u)
  11789. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1003_MASK (0x00000800u)
  11790. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1003_SHIFT (0x0000000Bu)
  11791. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1003_RESETVAL (0x00000000u)
  11792. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1004_MASK (0x00001000u)
  11793. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1004_SHIFT (0x0000000Cu)
  11794. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1004_RESETVAL (0x00000000u)
  11795. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1005_MASK (0x00002000u)
  11796. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1005_SHIFT (0x0000000Du)
  11797. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1005_RESETVAL (0x00000000u)
  11798. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1006_MASK (0x00004000u)
  11799. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1006_SHIFT (0x0000000Eu)
  11800. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1006_RESETVAL (0x00000000u)
  11801. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1007_MASK (0x00008000u)
  11802. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1007_SHIFT (0x0000000Fu)
  11803. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1007_RESETVAL (0x00000000u)
  11804. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1008_MASK (0x00010000u)
  11805. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1008_SHIFT (0x00000010u)
  11806. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1008_RESETVAL (0x00000000u)
  11807. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1009_MASK (0x00020000u)
  11808. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1009_SHIFT (0x00000011u)
  11809. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1009_RESETVAL (0x00000000u)
  11810. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1010_MASK (0x00040000u)
  11811. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1010_SHIFT (0x00000012u)
  11812. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1010_RESETVAL (0x00000000u)
  11813. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1011_MASK (0x00080000u)
  11814. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1011_SHIFT (0x00000013u)
  11815. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1011_RESETVAL (0x00000000u)
  11816. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1012_MASK (0x00100000u)
  11817. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1012_SHIFT (0x00000014u)
  11818. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1012_RESETVAL (0x00000000u)
  11819. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1013_MASK (0x00200000u)
  11820. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1013_SHIFT (0x00000015u)
  11821. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1013_RESETVAL (0x00000000u)
  11822. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1014_MASK (0x00400000u)
  11823. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1014_SHIFT (0x00000016u)
  11824. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1014_RESETVAL (0x00000000u)
  11825. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1015_MASK (0x00800000u)
  11826. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1015_SHIFT (0x00000017u)
  11827. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1015_RESETVAL (0x00000000u)
  11828. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1016_MASK (0x01000000u)
  11829. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1016_SHIFT (0x00000018u)
  11830. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1016_RESETVAL (0x00000000u)
  11831. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1017_MASK (0x02000000u)
  11832. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1017_SHIFT (0x00000019u)
  11833. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1017_RESETVAL (0x00000000u)
  11834. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1018_MASK (0x04000000u)
  11835. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1018_SHIFT (0x0000001Au)
  11836. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1018_RESETVAL (0x00000000u)
  11837. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1019_MASK (0x08000000u)
  11838. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1019_SHIFT (0x0000001Bu)
  11839. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1019_RESETVAL (0x00000000u)
  11840. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1020_MASK (0x10000000u)
  11841. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1020_SHIFT (0x0000001Cu)
  11842. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1020_RESETVAL (0x00000000u)
  11843. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1021_MASK (0x20000000u)
  11844. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1021_SHIFT (0x0000001Du)
  11845. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1021_RESETVAL (0x00000000u)
  11846. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1022_MASK (0x40000000u)
  11847. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1022_SHIFT (0x0000001Eu)
  11848. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1022_RESETVAL (0x00000000u)
  11849. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1023_MASK (0x80000000u)
  11850. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1023_SHIFT (0x0000001Fu)
  11851. #define CSL_CPINTC_ENABLE_REG31_ENABLE_1023_RESETVAL (0x00000000u)
  11852. #define CSL_CPINTC_ENABLE_REG31_RESETVAL (0x00000000u)
  11853. /* enable_clr_reg0 */
  11854. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_0_CLR_MASK (0x00000001u)
  11855. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_0_CLR_SHIFT (0x00000000u)
  11856. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_0_CLR_RESETVAL (0x00000000u)
  11857. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_1_CLR_MASK (0x00000002u)
  11858. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_1_CLR_SHIFT (0x00000001u)
  11859. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_1_CLR_RESETVAL (0x00000000u)
  11860. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_2_CLR_MASK (0x00000004u)
  11861. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_2_CLR_SHIFT (0x00000002u)
  11862. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_2_CLR_RESETVAL (0x00000000u)
  11863. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_3_CLR_MASK (0x00000008u)
  11864. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_3_CLR_SHIFT (0x00000003u)
  11865. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_3_CLR_RESETVAL (0x00000000u)
  11866. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_4_CLR_MASK (0x00000010u)
  11867. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_4_CLR_SHIFT (0x00000004u)
  11868. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_4_CLR_RESETVAL (0x00000000u)
  11869. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_5_CLR_MASK (0x00000020u)
  11870. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_5_CLR_SHIFT (0x00000005u)
  11871. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_5_CLR_RESETVAL (0x00000000u)
  11872. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_6_CLR_MASK (0x00000040u)
  11873. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_6_CLR_SHIFT (0x00000006u)
  11874. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_6_CLR_RESETVAL (0x00000000u)
  11875. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_7_CLR_MASK (0x00000080u)
  11876. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_7_CLR_SHIFT (0x00000007u)
  11877. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_7_CLR_RESETVAL (0x00000000u)
  11878. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_8_CLR_MASK (0x00000100u)
  11879. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_8_CLR_SHIFT (0x00000008u)
  11880. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_8_CLR_RESETVAL (0x00000000u)
  11881. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_9_CLR_MASK (0x00000200u)
  11882. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_9_CLR_SHIFT (0x00000009u)
  11883. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_9_CLR_RESETVAL (0x00000000u)
  11884. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_10_CLR_MASK (0x00000400u)
  11885. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_10_CLR_SHIFT (0x0000000Au)
  11886. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_10_CLR_RESETVAL (0x00000000u)
  11887. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_11_CLR_MASK (0x00000800u)
  11888. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_11_CLR_SHIFT (0x0000000Bu)
  11889. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_11_CLR_RESETVAL (0x00000000u)
  11890. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_12_CLR_MASK (0x00001000u)
  11891. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_12_CLR_SHIFT (0x0000000Cu)
  11892. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_12_CLR_RESETVAL (0x00000000u)
  11893. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_13_CLR_MASK (0x00002000u)
  11894. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_13_CLR_SHIFT (0x0000000Du)
  11895. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_13_CLR_RESETVAL (0x00000000u)
  11896. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_14_CLR_MASK (0x00004000u)
  11897. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_14_CLR_SHIFT (0x0000000Eu)
  11898. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_14_CLR_RESETVAL (0x00000000u)
  11899. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_15_CLR_MASK (0x00008000u)
  11900. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_15_CLR_SHIFT (0x0000000Fu)
  11901. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_15_CLR_RESETVAL (0x00000000u)
  11902. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_16_CLR_MASK (0x00010000u)
  11903. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_16_CLR_SHIFT (0x00000010u)
  11904. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_16_CLR_RESETVAL (0x00000000u)
  11905. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_17_CLR_MASK (0x00020000u)
  11906. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_17_CLR_SHIFT (0x00000011u)
  11907. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_17_CLR_RESETVAL (0x00000000u)
  11908. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_18_CLR_MASK (0x00040000u)
  11909. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_18_CLR_SHIFT (0x00000012u)
  11910. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_18_CLR_RESETVAL (0x00000000u)
  11911. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_19_CLR_MASK (0x00080000u)
  11912. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_19_CLR_SHIFT (0x00000013u)
  11913. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_19_CLR_RESETVAL (0x00000000u)
  11914. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_20_CLR_MASK (0x00100000u)
  11915. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_20_CLR_SHIFT (0x00000014u)
  11916. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_20_CLR_RESETVAL (0x00000000u)
  11917. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_21_CLR_MASK (0x00200000u)
  11918. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_21_CLR_SHIFT (0x00000015u)
  11919. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_21_CLR_RESETVAL (0x00000000u)
  11920. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_22_CLR_MASK (0x00400000u)
  11921. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_22_CLR_SHIFT (0x00000016u)
  11922. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_22_CLR_RESETVAL (0x00000000u)
  11923. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_23_CLR_MASK (0x00800000u)
  11924. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_23_CLR_SHIFT (0x00000017u)
  11925. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_23_CLR_RESETVAL (0x00000000u)
  11926. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_24_CLR_MASK (0x01000000u)
  11927. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_24_CLR_SHIFT (0x00000018u)
  11928. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_24_CLR_RESETVAL (0x00000000u)
  11929. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_25_CLR_MASK (0x02000000u)
  11930. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_25_CLR_SHIFT (0x00000019u)
  11931. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_25_CLR_RESETVAL (0x00000000u)
  11932. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_26_CLR_MASK (0x04000000u)
  11933. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_26_CLR_SHIFT (0x0000001Au)
  11934. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_26_CLR_RESETVAL (0x00000000u)
  11935. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_27_CLR_MASK (0x08000000u)
  11936. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_27_CLR_SHIFT (0x0000001Bu)
  11937. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_27_CLR_RESETVAL (0x00000000u)
  11938. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_28_CLR_MASK (0x10000000u)
  11939. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_28_CLR_SHIFT (0x0000001Cu)
  11940. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_28_CLR_RESETVAL (0x00000000u)
  11941. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_29_CLR_MASK (0x20000000u)
  11942. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_29_CLR_SHIFT (0x0000001Du)
  11943. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_29_CLR_RESETVAL (0x00000000u)
  11944. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_30_CLR_MASK (0x40000000u)
  11945. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_30_CLR_SHIFT (0x0000001Eu)
  11946. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_30_CLR_RESETVAL (0x00000000u)
  11947. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_31_CLR_MASK (0x80000000u)
  11948. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_31_CLR_SHIFT (0x0000001Fu)
  11949. #define CSL_CPINTC_ENABLE_CLR_REG0_ENABLE_31_CLR_RESETVAL (0x00000000u)
  11950. #define CSL_CPINTC_ENABLE_CLR_REG0_RESETVAL (0x00000000u)
  11951. /* enable_clr_reg1 */
  11952. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_32_CLR_MASK (0x00000001u)
  11953. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_32_CLR_SHIFT (0x00000000u)
  11954. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_32_CLR_RESETVAL (0x00000000u)
  11955. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_33_CLR_MASK (0x00000002u)
  11956. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_33_CLR_SHIFT (0x00000001u)
  11957. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_33_CLR_RESETVAL (0x00000000u)
  11958. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_34_CLR_MASK (0x00000004u)
  11959. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_34_CLR_SHIFT (0x00000002u)
  11960. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_34_CLR_RESETVAL (0x00000000u)
  11961. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_35_CLR_MASK (0x00000008u)
  11962. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_35_CLR_SHIFT (0x00000003u)
  11963. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_35_CLR_RESETVAL (0x00000000u)
  11964. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_36_CLR_MASK (0x00000010u)
  11965. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_36_CLR_SHIFT (0x00000004u)
  11966. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_36_CLR_RESETVAL (0x00000000u)
  11967. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_37_CLR_MASK (0x00000020u)
  11968. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_37_CLR_SHIFT (0x00000005u)
  11969. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_37_CLR_RESETVAL (0x00000000u)
  11970. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_38_CLR_MASK (0x00000040u)
  11971. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_38_CLR_SHIFT (0x00000006u)
  11972. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_38_CLR_RESETVAL (0x00000000u)
  11973. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_39_CLR_MASK (0x00000080u)
  11974. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_39_CLR_SHIFT (0x00000007u)
  11975. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_39_CLR_RESETVAL (0x00000000u)
  11976. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_40_CLR_MASK (0x00000100u)
  11977. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_40_CLR_SHIFT (0x00000008u)
  11978. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_40_CLR_RESETVAL (0x00000000u)
  11979. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_41_CLR_MASK (0x00000200u)
  11980. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_41_CLR_SHIFT (0x00000009u)
  11981. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_41_CLR_RESETVAL (0x00000000u)
  11982. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_42_CLR_MASK (0x00000400u)
  11983. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_42_CLR_SHIFT (0x0000000Au)
  11984. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_42_CLR_RESETVAL (0x00000000u)
  11985. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_43_CLR_MASK (0x00000800u)
  11986. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_43_CLR_SHIFT (0x0000000Bu)
  11987. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_43_CLR_RESETVAL (0x00000000u)
  11988. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_44_CLR_MASK (0x00001000u)
  11989. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_44_CLR_SHIFT (0x0000000Cu)
  11990. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_44_CLR_RESETVAL (0x00000000u)
  11991. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_45_CLR_MASK (0x00002000u)
  11992. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_45_CLR_SHIFT (0x0000000Du)
  11993. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_45_CLR_RESETVAL (0x00000000u)
  11994. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_46_CLR_MASK (0x00004000u)
  11995. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_46_CLR_SHIFT (0x0000000Eu)
  11996. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_46_CLR_RESETVAL (0x00000000u)
  11997. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_47_CLR_MASK (0x00008000u)
  11998. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_47_CLR_SHIFT (0x0000000Fu)
  11999. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_47_CLR_RESETVAL (0x00000000u)
  12000. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_48_CLR_MASK (0x00010000u)
  12001. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_48_CLR_SHIFT (0x00000010u)
  12002. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_48_CLR_RESETVAL (0x00000000u)
  12003. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_49_CLR_MASK (0x00020000u)
  12004. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_49_CLR_SHIFT (0x00000011u)
  12005. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_49_CLR_RESETVAL (0x00000000u)
  12006. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_50_CLR_MASK (0x00040000u)
  12007. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_50_CLR_SHIFT (0x00000012u)
  12008. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_50_CLR_RESETVAL (0x00000000u)
  12009. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_51_CLR_MASK (0x00080000u)
  12010. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_51_CLR_SHIFT (0x00000013u)
  12011. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_51_CLR_RESETVAL (0x00000000u)
  12012. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_52_CLR_MASK (0x00100000u)
  12013. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_52_CLR_SHIFT (0x00000014u)
  12014. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_52_CLR_RESETVAL (0x00000000u)
  12015. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_53_CLR_MASK (0x00200000u)
  12016. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_53_CLR_SHIFT (0x00000015u)
  12017. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_53_CLR_RESETVAL (0x00000000u)
  12018. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_54_CLR_MASK (0x00400000u)
  12019. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_54_CLR_SHIFT (0x00000016u)
  12020. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_54_CLR_RESETVAL (0x00000000u)
  12021. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_55_CLR_MASK (0x00800000u)
  12022. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_55_CLR_SHIFT (0x00000017u)
  12023. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_55_CLR_RESETVAL (0x00000000u)
  12024. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_56_CLR_MASK (0x01000000u)
  12025. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_56_CLR_SHIFT (0x00000018u)
  12026. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_56_CLR_RESETVAL (0x00000000u)
  12027. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_57_CLR_MASK (0x02000000u)
  12028. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_57_CLR_SHIFT (0x00000019u)
  12029. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_57_CLR_RESETVAL (0x00000000u)
  12030. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_58_CLR_MASK (0x04000000u)
  12031. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_58_CLR_SHIFT (0x0000001Au)
  12032. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_58_CLR_RESETVAL (0x00000000u)
  12033. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_59_CLR_MASK (0x08000000u)
  12034. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_59_CLR_SHIFT (0x0000001Bu)
  12035. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_59_CLR_RESETVAL (0x00000000u)
  12036. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_60_CLR_MASK (0x10000000u)
  12037. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_60_CLR_SHIFT (0x0000001Cu)
  12038. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_60_CLR_RESETVAL (0x00000000u)
  12039. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_61_CLR_MASK (0x20000000u)
  12040. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_61_CLR_SHIFT (0x0000001Du)
  12041. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_61_CLR_RESETVAL (0x00000000u)
  12042. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_62_CLR_MASK (0x40000000u)
  12043. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_62_CLR_SHIFT (0x0000001Eu)
  12044. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_62_CLR_RESETVAL (0x00000000u)
  12045. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_63_CLR_MASK (0x80000000u)
  12046. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_63_CLR_SHIFT (0x0000001Fu)
  12047. #define CSL_CPINTC_ENABLE_CLR_REG1_ENABLE_63_CLR_RESETVAL (0x00000000u)
  12048. #define CSL_CPINTC_ENABLE_CLR_REG1_RESETVAL (0x00000000u)
  12049. /* enable_clr_reg2 */
  12050. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_64_CLR_MASK (0x00000001u)
  12051. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_64_CLR_SHIFT (0x00000000u)
  12052. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_64_CLR_RESETVAL (0x00000000u)
  12053. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_65_CLR_MASK (0x00000002u)
  12054. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_65_CLR_SHIFT (0x00000001u)
  12055. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_65_CLR_RESETVAL (0x00000000u)
  12056. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_66_CLR_MASK (0x00000004u)
  12057. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_66_CLR_SHIFT (0x00000002u)
  12058. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_66_CLR_RESETVAL (0x00000000u)
  12059. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_67_CLR_MASK (0x00000008u)
  12060. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_67_CLR_SHIFT (0x00000003u)
  12061. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_67_CLR_RESETVAL (0x00000000u)
  12062. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_68_CLR_MASK (0x00000010u)
  12063. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_68_CLR_SHIFT (0x00000004u)
  12064. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_68_CLR_RESETVAL (0x00000000u)
  12065. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_69_CLR_MASK (0x00000020u)
  12066. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_69_CLR_SHIFT (0x00000005u)
  12067. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_69_CLR_RESETVAL (0x00000000u)
  12068. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_70_CLR_MASK (0x00000040u)
  12069. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_70_CLR_SHIFT (0x00000006u)
  12070. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_70_CLR_RESETVAL (0x00000000u)
  12071. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_71_CLR_MASK (0x00000080u)
  12072. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_71_CLR_SHIFT (0x00000007u)
  12073. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_71_CLR_RESETVAL (0x00000000u)
  12074. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_72_CLR_MASK (0x00000100u)
  12075. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_72_CLR_SHIFT (0x00000008u)
  12076. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_72_CLR_RESETVAL (0x00000000u)
  12077. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_73_CLR_MASK (0x00000200u)
  12078. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_73_CLR_SHIFT (0x00000009u)
  12079. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_73_CLR_RESETVAL (0x00000000u)
  12080. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_74_CLR_MASK (0x00000400u)
  12081. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_74_CLR_SHIFT (0x0000000Au)
  12082. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_74_CLR_RESETVAL (0x00000000u)
  12083. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_75_CLR_MASK (0x00000800u)
  12084. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_75_CLR_SHIFT (0x0000000Bu)
  12085. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_75_CLR_RESETVAL (0x00000000u)
  12086. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_76_CLR_MASK (0x00001000u)
  12087. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_76_CLR_SHIFT (0x0000000Cu)
  12088. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_76_CLR_RESETVAL (0x00000000u)
  12089. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_77_CLR_MASK (0x00002000u)
  12090. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_77_CLR_SHIFT (0x0000000Du)
  12091. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_77_CLR_RESETVAL (0x00000000u)
  12092. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_78_CLR_MASK (0x00004000u)
  12093. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_78_CLR_SHIFT (0x0000000Eu)
  12094. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_78_CLR_RESETVAL (0x00000000u)
  12095. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_79_CLR_MASK (0x00008000u)
  12096. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_79_CLR_SHIFT (0x0000000Fu)
  12097. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_79_CLR_RESETVAL (0x00000000u)
  12098. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_80_CLR_MASK (0x00010000u)
  12099. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_80_CLR_SHIFT (0x00000010u)
  12100. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_80_CLR_RESETVAL (0x00000000u)
  12101. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_81_CLR_MASK (0x00020000u)
  12102. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_81_CLR_SHIFT (0x00000011u)
  12103. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_81_CLR_RESETVAL (0x00000000u)
  12104. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_82_CLR_MASK (0x00040000u)
  12105. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_82_CLR_SHIFT (0x00000012u)
  12106. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_82_CLR_RESETVAL (0x00000000u)
  12107. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_83_CLR_MASK (0x00080000u)
  12108. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_83_CLR_SHIFT (0x00000013u)
  12109. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_83_CLR_RESETVAL (0x00000000u)
  12110. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_84_CLR_MASK (0x00100000u)
  12111. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_84_CLR_SHIFT (0x00000014u)
  12112. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_84_CLR_RESETVAL (0x00000000u)
  12113. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_85_CLR_MASK (0x00200000u)
  12114. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_85_CLR_SHIFT (0x00000015u)
  12115. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_85_CLR_RESETVAL (0x00000000u)
  12116. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_86_CLR_MASK (0x00400000u)
  12117. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_86_CLR_SHIFT (0x00000016u)
  12118. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_86_CLR_RESETVAL (0x00000000u)
  12119. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_87_CLR_MASK (0x00800000u)
  12120. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_87_CLR_SHIFT (0x00000017u)
  12121. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_87_CLR_RESETVAL (0x00000000u)
  12122. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_88_CLR_MASK (0x01000000u)
  12123. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_88_CLR_SHIFT (0x00000018u)
  12124. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_88_CLR_RESETVAL (0x00000000u)
  12125. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_89_CLR_MASK (0x02000000u)
  12126. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_89_CLR_SHIFT (0x00000019u)
  12127. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_89_CLR_RESETVAL (0x00000000u)
  12128. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_90_CLR_MASK (0x04000000u)
  12129. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_90_CLR_SHIFT (0x0000001Au)
  12130. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_90_CLR_RESETVAL (0x00000000u)
  12131. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_91_CLR_MASK (0x08000000u)
  12132. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_91_CLR_SHIFT (0x0000001Bu)
  12133. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_91_CLR_RESETVAL (0x00000000u)
  12134. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_92_CLR_MASK (0x10000000u)
  12135. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_92_CLR_SHIFT (0x0000001Cu)
  12136. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_92_CLR_RESETVAL (0x00000000u)
  12137. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_93_CLR_MASK (0x20000000u)
  12138. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_93_CLR_SHIFT (0x0000001Du)
  12139. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_93_CLR_RESETVAL (0x00000000u)
  12140. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_94_CLR_MASK (0x40000000u)
  12141. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_94_CLR_SHIFT (0x0000001Eu)
  12142. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_94_CLR_RESETVAL (0x00000000u)
  12143. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_95_CLR_MASK (0x80000000u)
  12144. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_95_CLR_SHIFT (0x0000001Fu)
  12145. #define CSL_CPINTC_ENABLE_CLR_REG2_ENABLE_95_CLR_RESETVAL (0x00000000u)
  12146. #define CSL_CPINTC_ENABLE_CLR_REG2_RESETVAL (0x00000000u)
  12147. /* enable_clr_reg3 */
  12148. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_96_CLR_MASK (0x00000001u)
  12149. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_96_CLR_SHIFT (0x00000000u)
  12150. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_96_CLR_RESETVAL (0x00000000u)
  12151. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_97_CLR_MASK (0x00000002u)
  12152. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_97_CLR_SHIFT (0x00000001u)
  12153. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_97_CLR_RESETVAL (0x00000000u)
  12154. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_98_CLR_MASK (0x00000004u)
  12155. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_98_CLR_SHIFT (0x00000002u)
  12156. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_98_CLR_RESETVAL (0x00000000u)
  12157. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_99_CLR_MASK (0x00000008u)
  12158. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_99_CLR_SHIFT (0x00000003u)
  12159. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_99_CLR_RESETVAL (0x00000000u)
  12160. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_100_CLR_MASK (0x00000010u)
  12161. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_100_CLR_SHIFT (0x00000004u)
  12162. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_100_CLR_RESETVAL (0x00000000u)
  12163. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_101_CLR_MASK (0x00000020u)
  12164. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_101_CLR_SHIFT (0x00000005u)
  12165. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_101_CLR_RESETVAL (0x00000000u)
  12166. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_102_CLR_MASK (0x00000040u)
  12167. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_102_CLR_SHIFT (0x00000006u)
  12168. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_102_CLR_RESETVAL (0x00000000u)
  12169. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_103_CLR_MASK (0x00000080u)
  12170. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_103_CLR_SHIFT (0x00000007u)
  12171. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_103_CLR_RESETVAL (0x00000000u)
  12172. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_104_CLR_MASK (0x00000100u)
  12173. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_104_CLR_SHIFT (0x00000008u)
  12174. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_104_CLR_RESETVAL (0x00000000u)
  12175. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_105_CLR_MASK (0x00000200u)
  12176. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_105_CLR_SHIFT (0x00000009u)
  12177. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_105_CLR_RESETVAL (0x00000000u)
  12178. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_106_CLR_MASK (0x00000400u)
  12179. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_106_CLR_SHIFT (0x0000000Au)
  12180. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_106_CLR_RESETVAL (0x00000000u)
  12181. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_107_CLR_MASK (0x00000800u)
  12182. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_107_CLR_SHIFT (0x0000000Bu)
  12183. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_107_CLR_RESETVAL (0x00000000u)
  12184. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_108_CLR_MASK (0x00001000u)
  12185. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_108_CLR_SHIFT (0x0000000Cu)
  12186. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_108_CLR_RESETVAL (0x00000000u)
  12187. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_109_CLR_MASK (0x00002000u)
  12188. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_109_CLR_SHIFT (0x0000000Du)
  12189. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_109_CLR_RESETVAL (0x00000000u)
  12190. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_110_CLR_MASK (0x00004000u)
  12191. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_110_CLR_SHIFT (0x0000000Eu)
  12192. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_110_CLR_RESETVAL (0x00000000u)
  12193. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_111_CLR_MASK (0x00008000u)
  12194. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_111_CLR_SHIFT (0x0000000Fu)
  12195. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_111_CLR_RESETVAL (0x00000000u)
  12196. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_112_CLR_MASK (0x00010000u)
  12197. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_112_CLR_SHIFT (0x00000010u)
  12198. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_112_CLR_RESETVAL (0x00000000u)
  12199. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_113_CLR_MASK (0x00020000u)
  12200. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_113_CLR_SHIFT (0x00000011u)
  12201. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_113_CLR_RESETVAL (0x00000000u)
  12202. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_114_CLR_MASK (0x00040000u)
  12203. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_114_CLR_SHIFT (0x00000012u)
  12204. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_114_CLR_RESETVAL (0x00000000u)
  12205. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_115_CLR_MASK (0x00080000u)
  12206. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_115_CLR_SHIFT (0x00000013u)
  12207. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_115_CLR_RESETVAL (0x00000000u)
  12208. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_116_CLR_MASK (0x00100000u)
  12209. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_116_CLR_SHIFT (0x00000014u)
  12210. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_116_CLR_RESETVAL (0x00000000u)
  12211. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_117_CLR_MASK (0x00200000u)
  12212. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_117_CLR_SHIFT (0x00000015u)
  12213. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_117_CLR_RESETVAL (0x00000000u)
  12214. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_118_CLR_MASK (0x00400000u)
  12215. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_118_CLR_SHIFT (0x00000016u)
  12216. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_118_CLR_RESETVAL (0x00000000u)
  12217. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_119_CLR_MASK (0x00800000u)
  12218. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_119_CLR_SHIFT (0x00000017u)
  12219. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_119_CLR_RESETVAL (0x00000000u)
  12220. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_120_CLR_MASK (0x01000000u)
  12221. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_120_CLR_SHIFT (0x00000018u)
  12222. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_120_CLR_RESETVAL (0x00000000u)
  12223. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_121_CLR_MASK (0x02000000u)
  12224. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_121_CLR_SHIFT (0x00000019u)
  12225. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_121_CLR_RESETVAL (0x00000000u)
  12226. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_122_CLR_MASK (0x04000000u)
  12227. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_122_CLR_SHIFT (0x0000001Au)
  12228. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_122_CLR_RESETVAL (0x00000000u)
  12229. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_123_CLR_MASK (0x08000000u)
  12230. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_123_CLR_SHIFT (0x0000001Bu)
  12231. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_123_CLR_RESETVAL (0x00000000u)
  12232. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_124_CLR_MASK (0x10000000u)
  12233. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_124_CLR_SHIFT (0x0000001Cu)
  12234. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_124_CLR_RESETVAL (0x00000000u)
  12235. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_125_CLR_MASK (0x20000000u)
  12236. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_125_CLR_SHIFT (0x0000001Du)
  12237. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_125_CLR_RESETVAL (0x00000000u)
  12238. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_126_CLR_MASK (0x40000000u)
  12239. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_126_CLR_SHIFT (0x0000001Eu)
  12240. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_126_CLR_RESETVAL (0x00000000u)
  12241. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_127_CLR_MASK (0x80000000u)
  12242. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_127_CLR_SHIFT (0x0000001Fu)
  12243. #define CSL_CPINTC_ENABLE_CLR_REG3_ENABLE_127_CLR_RESETVAL (0x00000000u)
  12244. #define CSL_CPINTC_ENABLE_CLR_REG3_RESETVAL (0x00000000u)
  12245. /* enable_clr_reg4 */
  12246. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_128_CLR_MASK (0x00000001u)
  12247. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_128_CLR_SHIFT (0x00000000u)
  12248. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_128_CLR_RESETVAL (0x00000000u)
  12249. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_129_CLR_MASK (0x00000002u)
  12250. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_129_CLR_SHIFT (0x00000001u)
  12251. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_129_CLR_RESETVAL (0x00000000u)
  12252. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_130_CLR_MASK (0x00000004u)
  12253. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_130_CLR_SHIFT (0x00000002u)
  12254. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_130_CLR_RESETVAL (0x00000000u)
  12255. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_131_CLR_MASK (0x00000008u)
  12256. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_131_CLR_SHIFT (0x00000003u)
  12257. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_131_CLR_RESETVAL (0x00000000u)
  12258. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_132_CLR_MASK (0x00000010u)
  12259. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_132_CLR_SHIFT (0x00000004u)
  12260. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_132_CLR_RESETVAL (0x00000000u)
  12261. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_133_CLR_MASK (0x00000020u)
  12262. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_133_CLR_SHIFT (0x00000005u)
  12263. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_133_CLR_RESETVAL (0x00000000u)
  12264. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_134_CLR_MASK (0x00000040u)
  12265. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_134_CLR_SHIFT (0x00000006u)
  12266. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_134_CLR_RESETVAL (0x00000000u)
  12267. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_135_CLR_MASK (0x00000080u)
  12268. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_135_CLR_SHIFT (0x00000007u)
  12269. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_135_CLR_RESETVAL (0x00000000u)
  12270. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_136_CLR_MASK (0x00000100u)
  12271. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_136_CLR_SHIFT (0x00000008u)
  12272. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_136_CLR_RESETVAL (0x00000000u)
  12273. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_137_CLR_MASK (0x00000200u)
  12274. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_137_CLR_SHIFT (0x00000009u)
  12275. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_137_CLR_RESETVAL (0x00000000u)
  12276. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_138_CLR_MASK (0x00000400u)
  12277. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_138_CLR_SHIFT (0x0000000Au)
  12278. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_138_CLR_RESETVAL (0x00000000u)
  12279. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_139_CLR_MASK (0x00000800u)
  12280. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_139_CLR_SHIFT (0x0000000Bu)
  12281. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_139_CLR_RESETVAL (0x00000000u)
  12282. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_140_CLR_MASK (0x00001000u)
  12283. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_140_CLR_SHIFT (0x0000000Cu)
  12284. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_140_CLR_RESETVAL (0x00000000u)
  12285. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_141_CLR_MASK (0x00002000u)
  12286. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_141_CLR_SHIFT (0x0000000Du)
  12287. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_141_CLR_RESETVAL (0x00000000u)
  12288. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_142_CLR_MASK (0x00004000u)
  12289. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_142_CLR_SHIFT (0x0000000Eu)
  12290. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_142_CLR_RESETVAL (0x00000000u)
  12291. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_143_CLR_MASK (0x00008000u)
  12292. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_143_CLR_SHIFT (0x0000000Fu)
  12293. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_143_CLR_RESETVAL (0x00000000u)
  12294. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_144_CLR_MASK (0x00010000u)
  12295. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_144_CLR_SHIFT (0x00000010u)
  12296. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_144_CLR_RESETVAL (0x00000000u)
  12297. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_145_CLR_MASK (0x00020000u)
  12298. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_145_CLR_SHIFT (0x00000011u)
  12299. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_145_CLR_RESETVAL (0x00000000u)
  12300. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_146_CLR_MASK (0x00040000u)
  12301. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_146_CLR_SHIFT (0x00000012u)
  12302. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_146_CLR_RESETVAL (0x00000000u)
  12303. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_147_CLR_MASK (0x00080000u)
  12304. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_147_CLR_SHIFT (0x00000013u)
  12305. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_147_CLR_RESETVAL (0x00000000u)
  12306. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_148_CLR_MASK (0x00100000u)
  12307. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_148_CLR_SHIFT (0x00000014u)
  12308. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_148_CLR_RESETVAL (0x00000000u)
  12309. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_149_CLR_MASK (0x00200000u)
  12310. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_149_CLR_SHIFT (0x00000015u)
  12311. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_149_CLR_RESETVAL (0x00000000u)
  12312. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_150_CLR_MASK (0x00400000u)
  12313. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_150_CLR_SHIFT (0x00000016u)
  12314. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_150_CLR_RESETVAL (0x00000000u)
  12315. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_151_CLR_MASK (0x00800000u)
  12316. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_151_CLR_SHIFT (0x00000017u)
  12317. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_151_CLR_RESETVAL (0x00000000u)
  12318. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_152_CLR_MASK (0x01000000u)
  12319. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_152_CLR_SHIFT (0x00000018u)
  12320. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_152_CLR_RESETVAL (0x00000000u)
  12321. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_153_CLR_MASK (0x02000000u)
  12322. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_153_CLR_SHIFT (0x00000019u)
  12323. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_153_CLR_RESETVAL (0x00000000u)
  12324. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_154_CLR_MASK (0x04000000u)
  12325. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_154_CLR_SHIFT (0x0000001Au)
  12326. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_154_CLR_RESETVAL (0x00000000u)
  12327. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_155_CLR_MASK (0x08000000u)
  12328. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_155_CLR_SHIFT (0x0000001Bu)
  12329. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_155_CLR_RESETVAL (0x00000000u)
  12330. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_156_CLR_MASK (0x10000000u)
  12331. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_156_CLR_SHIFT (0x0000001Cu)
  12332. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_156_CLR_RESETVAL (0x00000000u)
  12333. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_157_CLR_MASK (0x20000000u)
  12334. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_157_CLR_SHIFT (0x0000001Du)
  12335. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_157_CLR_RESETVAL (0x00000000u)
  12336. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_158_CLR_MASK (0x40000000u)
  12337. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_158_CLR_SHIFT (0x0000001Eu)
  12338. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_158_CLR_RESETVAL (0x00000000u)
  12339. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_159_CLR_MASK (0x80000000u)
  12340. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_159_CLR_SHIFT (0x0000001Fu)
  12341. #define CSL_CPINTC_ENABLE_CLR_REG4_ENABLE_159_CLR_RESETVAL (0x00000000u)
  12342. #define CSL_CPINTC_ENABLE_CLR_REG4_RESETVAL (0x00000000u)
  12343. /* enable_clr_reg5 */
  12344. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_160_CLR_MASK (0x00000001u)
  12345. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_160_CLR_SHIFT (0x00000000u)
  12346. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_160_CLR_RESETVAL (0x00000000u)
  12347. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_161_CLR_MASK (0x00000002u)
  12348. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_161_CLR_SHIFT (0x00000001u)
  12349. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_161_CLR_RESETVAL (0x00000000u)
  12350. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_162_CLR_MASK (0x00000004u)
  12351. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_162_CLR_SHIFT (0x00000002u)
  12352. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_162_CLR_RESETVAL (0x00000000u)
  12353. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_163_CLR_MASK (0x00000008u)
  12354. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_163_CLR_SHIFT (0x00000003u)
  12355. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_163_CLR_RESETVAL (0x00000000u)
  12356. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_164_CLR_MASK (0x00000010u)
  12357. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_164_CLR_SHIFT (0x00000004u)
  12358. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_164_CLR_RESETVAL (0x00000000u)
  12359. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_165_CLR_MASK (0x00000020u)
  12360. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_165_CLR_SHIFT (0x00000005u)
  12361. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_165_CLR_RESETVAL (0x00000000u)
  12362. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_166_CLR_MASK (0x00000040u)
  12363. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_166_CLR_SHIFT (0x00000006u)
  12364. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_166_CLR_RESETVAL (0x00000000u)
  12365. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_167_CLR_MASK (0x00000080u)
  12366. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_167_CLR_SHIFT (0x00000007u)
  12367. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_167_CLR_RESETVAL (0x00000000u)
  12368. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_168_CLR_MASK (0x00000100u)
  12369. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_168_CLR_SHIFT (0x00000008u)
  12370. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_168_CLR_RESETVAL (0x00000000u)
  12371. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_169_CLR_MASK (0x00000200u)
  12372. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_169_CLR_SHIFT (0x00000009u)
  12373. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_169_CLR_RESETVAL (0x00000000u)
  12374. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_170_CLR_MASK (0x00000400u)
  12375. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_170_CLR_SHIFT (0x0000000Au)
  12376. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_170_CLR_RESETVAL (0x00000000u)
  12377. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_171_CLR_MASK (0x00000800u)
  12378. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_171_CLR_SHIFT (0x0000000Bu)
  12379. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_171_CLR_RESETVAL (0x00000000u)
  12380. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_172_CLR_MASK (0x00001000u)
  12381. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_172_CLR_SHIFT (0x0000000Cu)
  12382. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_172_CLR_RESETVAL (0x00000000u)
  12383. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_173_CLR_MASK (0x00002000u)
  12384. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_173_CLR_SHIFT (0x0000000Du)
  12385. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_173_CLR_RESETVAL (0x00000000u)
  12386. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_174_CLR_MASK (0x00004000u)
  12387. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_174_CLR_SHIFT (0x0000000Eu)
  12388. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_174_CLR_RESETVAL (0x00000000u)
  12389. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_175_CLR_MASK (0x00008000u)
  12390. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_175_CLR_SHIFT (0x0000000Fu)
  12391. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_175_CLR_RESETVAL (0x00000000u)
  12392. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_176_CLR_MASK (0x00010000u)
  12393. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_176_CLR_SHIFT (0x00000010u)
  12394. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_176_CLR_RESETVAL (0x00000000u)
  12395. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_177_CLR_MASK (0x00020000u)
  12396. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_177_CLR_SHIFT (0x00000011u)
  12397. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_177_CLR_RESETVAL (0x00000000u)
  12398. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_178_CLR_MASK (0x00040000u)
  12399. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_178_CLR_SHIFT (0x00000012u)
  12400. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_178_CLR_RESETVAL (0x00000000u)
  12401. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_179_CLR_MASK (0x00080000u)
  12402. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_179_CLR_SHIFT (0x00000013u)
  12403. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_179_CLR_RESETVAL (0x00000000u)
  12404. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_180_CLR_MASK (0x00100000u)
  12405. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_180_CLR_SHIFT (0x00000014u)
  12406. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_180_CLR_RESETVAL (0x00000000u)
  12407. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_181_CLR_MASK (0x00200000u)
  12408. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_181_CLR_SHIFT (0x00000015u)
  12409. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_181_CLR_RESETVAL (0x00000000u)
  12410. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_182_CLR_MASK (0x00400000u)
  12411. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_182_CLR_SHIFT (0x00000016u)
  12412. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_182_CLR_RESETVAL (0x00000000u)
  12413. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_183_CLR_MASK (0x00800000u)
  12414. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_183_CLR_SHIFT (0x00000017u)
  12415. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_183_CLR_RESETVAL (0x00000000u)
  12416. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_184_CLR_MASK (0x01000000u)
  12417. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_184_CLR_SHIFT (0x00000018u)
  12418. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_184_CLR_RESETVAL (0x00000000u)
  12419. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_185_CLR_MASK (0x02000000u)
  12420. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_185_CLR_SHIFT (0x00000019u)
  12421. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_185_CLR_RESETVAL (0x00000000u)
  12422. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_186_CLR_MASK (0x04000000u)
  12423. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_186_CLR_SHIFT (0x0000001Au)
  12424. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_186_CLR_RESETVAL (0x00000000u)
  12425. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_187_CLR_MASK (0x08000000u)
  12426. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_187_CLR_SHIFT (0x0000001Bu)
  12427. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_187_CLR_RESETVAL (0x00000000u)
  12428. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_188_CLR_MASK (0x10000000u)
  12429. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_188_CLR_SHIFT (0x0000001Cu)
  12430. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_188_CLR_RESETVAL (0x00000000u)
  12431. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_189_CLR_MASK (0x20000000u)
  12432. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_189_CLR_SHIFT (0x0000001Du)
  12433. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_189_CLR_RESETVAL (0x00000000u)
  12434. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_190_CLR_MASK (0x40000000u)
  12435. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_190_CLR_SHIFT (0x0000001Eu)
  12436. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_190_CLR_RESETVAL (0x00000000u)
  12437. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_191_CLR_MASK (0x80000000u)
  12438. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_191_CLR_SHIFT (0x0000001Fu)
  12439. #define CSL_CPINTC_ENABLE_CLR_REG5_ENABLE_191_CLR_RESETVAL (0x00000000u)
  12440. #define CSL_CPINTC_ENABLE_CLR_REG5_RESETVAL (0x00000000u)
  12441. /* enable_clr_reg6 */
  12442. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_192_CLR_MASK (0x00000001u)
  12443. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_192_CLR_SHIFT (0x00000000u)
  12444. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_192_CLR_RESETVAL (0x00000000u)
  12445. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_193_CLR_MASK (0x00000002u)
  12446. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_193_CLR_SHIFT (0x00000001u)
  12447. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_193_CLR_RESETVAL (0x00000000u)
  12448. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_194_CLR_MASK (0x00000004u)
  12449. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_194_CLR_SHIFT (0x00000002u)
  12450. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_194_CLR_RESETVAL (0x00000000u)
  12451. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_195_CLR_MASK (0x00000008u)
  12452. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_195_CLR_SHIFT (0x00000003u)
  12453. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_195_CLR_RESETVAL (0x00000000u)
  12454. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_196_CLR_MASK (0x00000010u)
  12455. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_196_CLR_SHIFT (0x00000004u)
  12456. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_196_CLR_RESETVAL (0x00000000u)
  12457. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_197_CLR_MASK (0x00000020u)
  12458. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_197_CLR_SHIFT (0x00000005u)
  12459. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_197_CLR_RESETVAL (0x00000000u)
  12460. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_198_CLR_MASK (0x00000040u)
  12461. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_198_CLR_SHIFT (0x00000006u)
  12462. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_198_CLR_RESETVAL (0x00000000u)
  12463. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_199_CLR_MASK (0x00000080u)
  12464. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_199_CLR_SHIFT (0x00000007u)
  12465. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_199_CLR_RESETVAL (0x00000000u)
  12466. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_200_CLR_MASK (0x00000100u)
  12467. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_200_CLR_SHIFT (0x00000008u)
  12468. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_200_CLR_RESETVAL (0x00000000u)
  12469. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_201_CLR_MASK (0x00000200u)
  12470. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_201_CLR_SHIFT (0x00000009u)
  12471. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_201_CLR_RESETVAL (0x00000000u)
  12472. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_202_CLR_MASK (0x00000400u)
  12473. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_202_CLR_SHIFT (0x0000000Au)
  12474. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_202_CLR_RESETVAL (0x00000000u)
  12475. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_203_CLR_MASK (0x00000800u)
  12476. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_203_CLR_SHIFT (0x0000000Bu)
  12477. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_203_CLR_RESETVAL (0x00000000u)
  12478. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_204_CLR_MASK (0x00001000u)
  12479. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_204_CLR_SHIFT (0x0000000Cu)
  12480. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_204_CLR_RESETVAL (0x00000000u)
  12481. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_205_CLR_MASK (0x00002000u)
  12482. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_205_CLR_SHIFT (0x0000000Du)
  12483. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_205_CLR_RESETVAL (0x00000000u)
  12484. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_206_CLR_MASK (0x00004000u)
  12485. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_206_CLR_SHIFT (0x0000000Eu)
  12486. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_206_CLR_RESETVAL (0x00000000u)
  12487. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_207_CLR_MASK (0x00008000u)
  12488. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_207_CLR_SHIFT (0x0000000Fu)
  12489. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_207_CLR_RESETVAL (0x00000000u)
  12490. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_208_CLR_MASK (0x00010000u)
  12491. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_208_CLR_SHIFT (0x00000010u)
  12492. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_208_CLR_RESETVAL (0x00000000u)
  12493. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_209_CLR_MASK (0x00020000u)
  12494. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_209_CLR_SHIFT (0x00000011u)
  12495. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_209_CLR_RESETVAL (0x00000000u)
  12496. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_210_CLR_MASK (0x00040000u)
  12497. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_210_CLR_SHIFT (0x00000012u)
  12498. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_210_CLR_RESETVAL (0x00000000u)
  12499. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_211_CLR_MASK (0x00080000u)
  12500. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_211_CLR_SHIFT (0x00000013u)
  12501. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_211_CLR_RESETVAL (0x00000000u)
  12502. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_212_CLR_MASK (0x00100000u)
  12503. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_212_CLR_SHIFT (0x00000014u)
  12504. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_212_CLR_RESETVAL (0x00000000u)
  12505. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_213_CLR_MASK (0x00200000u)
  12506. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_213_CLR_SHIFT (0x00000015u)
  12507. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_213_CLR_RESETVAL (0x00000000u)
  12508. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_214_CLR_MASK (0x00400000u)
  12509. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_214_CLR_SHIFT (0x00000016u)
  12510. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_214_CLR_RESETVAL (0x00000000u)
  12511. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_215_CLR_MASK (0x00800000u)
  12512. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_215_CLR_SHIFT (0x00000017u)
  12513. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_215_CLR_RESETVAL (0x00000000u)
  12514. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_216_CLR_MASK (0x01000000u)
  12515. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_216_CLR_SHIFT (0x00000018u)
  12516. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_216_CLR_RESETVAL (0x00000000u)
  12517. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_217_CLR_MASK (0x02000000u)
  12518. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_217_CLR_SHIFT (0x00000019u)
  12519. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_217_CLR_RESETVAL (0x00000000u)
  12520. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_218_CLR_MASK (0x04000000u)
  12521. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_218_CLR_SHIFT (0x0000001Au)
  12522. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_218_CLR_RESETVAL (0x00000000u)
  12523. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_219_CLR_MASK (0x08000000u)
  12524. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_219_CLR_SHIFT (0x0000001Bu)
  12525. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_219_CLR_RESETVAL (0x00000000u)
  12526. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_220_CLR_MASK (0x10000000u)
  12527. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_220_CLR_SHIFT (0x0000001Cu)
  12528. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_220_CLR_RESETVAL (0x00000000u)
  12529. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_221_CLR_MASK (0x20000000u)
  12530. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_221_CLR_SHIFT (0x0000001Du)
  12531. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_221_CLR_RESETVAL (0x00000000u)
  12532. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_222_CLR_MASK (0x40000000u)
  12533. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_222_CLR_SHIFT (0x0000001Eu)
  12534. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_222_CLR_RESETVAL (0x00000000u)
  12535. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_223_CLR_MASK (0x80000000u)
  12536. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_223_CLR_SHIFT (0x0000001Fu)
  12537. #define CSL_CPINTC_ENABLE_CLR_REG6_ENABLE_223_CLR_RESETVAL (0x00000000u)
  12538. #define CSL_CPINTC_ENABLE_CLR_REG6_RESETVAL (0x00000000u)
  12539. /* enable_clr_reg7 */
  12540. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_224_CLR_MASK (0x00000001u)
  12541. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_224_CLR_SHIFT (0x00000000u)
  12542. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_224_CLR_RESETVAL (0x00000000u)
  12543. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_225_CLR_MASK (0x00000002u)
  12544. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_225_CLR_SHIFT (0x00000001u)
  12545. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_225_CLR_RESETVAL (0x00000000u)
  12546. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_226_CLR_MASK (0x00000004u)
  12547. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_226_CLR_SHIFT (0x00000002u)
  12548. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_226_CLR_RESETVAL (0x00000000u)
  12549. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_227_CLR_MASK (0x00000008u)
  12550. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_227_CLR_SHIFT (0x00000003u)
  12551. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_227_CLR_RESETVAL (0x00000000u)
  12552. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_228_CLR_MASK (0x00000010u)
  12553. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_228_CLR_SHIFT (0x00000004u)
  12554. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_228_CLR_RESETVAL (0x00000000u)
  12555. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_229_CLR_MASK (0x00000020u)
  12556. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_229_CLR_SHIFT (0x00000005u)
  12557. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_229_CLR_RESETVAL (0x00000000u)
  12558. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_230_CLR_MASK (0x00000040u)
  12559. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_230_CLR_SHIFT (0x00000006u)
  12560. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_230_CLR_RESETVAL (0x00000000u)
  12561. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_231_CLR_MASK (0x00000080u)
  12562. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_231_CLR_SHIFT (0x00000007u)
  12563. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_231_CLR_RESETVAL (0x00000000u)
  12564. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_232_CLR_MASK (0x00000100u)
  12565. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_232_CLR_SHIFT (0x00000008u)
  12566. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_232_CLR_RESETVAL (0x00000000u)
  12567. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_233_CLR_MASK (0x00000200u)
  12568. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_233_CLR_SHIFT (0x00000009u)
  12569. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_233_CLR_RESETVAL (0x00000000u)
  12570. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_234_CLR_MASK (0x00000400u)
  12571. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_234_CLR_SHIFT (0x0000000Au)
  12572. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_234_CLR_RESETVAL (0x00000000u)
  12573. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_235_CLR_MASK (0x00000800u)
  12574. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_235_CLR_SHIFT (0x0000000Bu)
  12575. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_235_CLR_RESETVAL (0x00000000u)
  12576. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_236_CLR_MASK (0x00001000u)
  12577. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_236_CLR_SHIFT (0x0000000Cu)
  12578. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_236_CLR_RESETVAL (0x00000000u)
  12579. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_237_CLR_MASK (0x00002000u)
  12580. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_237_CLR_SHIFT (0x0000000Du)
  12581. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_237_CLR_RESETVAL (0x00000000u)
  12582. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_238_CLR_MASK (0x00004000u)
  12583. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_238_CLR_SHIFT (0x0000000Eu)
  12584. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_238_CLR_RESETVAL (0x00000000u)
  12585. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_239_CLR_MASK (0x00008000u)
  12586. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_239_CLR_SHIFT (0x0000000Fu)
  12587. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_239_CLR_RESETVAL (0x00000000u)
  12588. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_240_CLR_MASK (0x00010000u)
  12589. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_240_CLR_SHIFT (0x00000010u)
  12590. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_240_CLR_RESETVAL (0x00000000u)
  12591. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_241_CLR_MASK (0x00020000u)
  12592. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_241_CLR_SHIFT (0x00000011u)
  12593. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_241_CLR_RESETVAL (0x00000000u)
  12594. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_242_CLR_MASK (0x00040000u)
  12595. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_242_CLR_SHIFT (0x00000012u)
  12596. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_242_CLR_RESETVAL (0x00000000u)
  12597. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_243_CLR_MASK (0x00080000u)
  12598. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_243_CLR_SHIFT (0x00000013u)
  12599. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_243_CLR_RESETVAL (0x00000000u)
  12600. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_244_CLR_MASK (0x00100000u)
  12601. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_244_CLR_SHIFT (0x00000014u)
  12602. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_244_CLR_RESETVAL (0x00000000u)
  12603. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_245_CLR_MASK (0x00200000u)
  12604. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_245_CLR_SHIFT (0x00000015u)
  12605. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_245_CLR_RESETVAL (0x00000000u)
  12606. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_246_CLR_MASK (0x00400000u)
  12607. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_246_CLR_SHIFT (0x00000016u)
  12608. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_246_CLR_RESETVAL (0x00000000u)
  12609. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_247_CLR_MASK (0x00800000u)
  12610. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_247_CLR_SHIFT (0x00000017u)
  12611. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_247_CLR_RESETVAL (0x00000000u)
  12612. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_248_CLR_MASK (0x01000000u)
  12613. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_248_CLR_SHIFT (0x00000018u)
  12614. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_248_CLR_RESETVAL (0x00000000u)
  12615. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_249_CLR_MASK (0x02000000u)
  12616. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_249_CLR_SHIFT (0x00000019u)
  12617. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_249_CLR_RESETVAL (0x00000000u)
  12618. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_250_CLR_MASK (0x04000000u)
  12619. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_250_CLR_SHIFT (0x0000001Au)
  12620. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_250_CLR_RESETVAL (0x00000000u)
  12621. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_251_CLR_MASK (0x08000000u)
  12622. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_251_CLR_SHIFT (0x0000001Bu)
  12623. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_251_CLR_RESETVAL (0x00000000u)
  12624. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_252_CLR_MASK (0x10000000u)
  12625. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_252_CLR_SHIFT (0x0000001Cu)
  12626. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_252_CLR_RESETVAL (0x00000000u)
  12627. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_253_CLR_MASK (0x20000000u)
  12628. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_253_CLR_SHIFT (0x0000001Du)
  12629. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_253_CLR_RESETVAL (0x00000000u)
  12630. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_254_CLR_MASK (0x40000000u)
  12631. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_254_CLR_SHIFT (0x0000001Eu)
  12632. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_254_CLR_RESETVAL (0x00000000u)
  12633. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_255_CLR_MASK (0x80000000u)
  12634. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_255_CLR_SHIFT (0x0000001Fu)
  12635. #define CSL_CPINTC_ENABLE_CLR_REG7_ENABLE_255_CLR_RESETVAL (0x00000000u)
  12636. #define CSL_CPINTC_ENABLE_CLR_REG7_RESETVAL (0x00000000u)
  12637. /* enable_clr_reg8 */
  12638. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_256_CLR_MASK (0x00000001u)
  12639. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_256_CLR_SHIFT (0x00000000u)
  12640. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_256_CLR_RESETVAL (0x00000000u)
  12641. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_257_CLR_MASK (0x00000002u)
  12642. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_257_CLR_SHIFT (0x00000001u)
  12643. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_257_CLR_RESETVAL (0x00000000u)
  12644. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_258_CLR_MASK (0x00000004u)
  12645. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_258_CLR_SHIFT (0x00000002u)
  12646. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_258_CLR_RESETVAL (0x00000000u)
  12647. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_259_CLR_MASK (0x00000008u)
  12648. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_259_CLR_SHIFT (0x00000003u)
  12649. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_259_CLR_RESETVAL (0x00000000u)
  12650. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_260_CLR_MASK (0x00000010u)
  12651. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_260_CLR_SHIFT (0x00000004u)
  12652. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_260_CLR_RESETVAL (0x00000000u)
  12653. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_261_CLR_MASK (0x00000020u)
  12654. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_261_CLR_SHIFT (0x00000005u)
  12655. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_261_CLR_RESETVAL (0x00000000u)
  12656. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_262_CLR_MASK (0x00000040u)
  12657. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_262_CLR_SHIFT (0x00000006u)
  12658. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_262_CLR_RESETVAL (0x00000000u)
  12659. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_263_CLR_MASK (0x00000080u)
  12660. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_263_CLR_SHIFT (0x00000007u)
  12661. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_263_CLR_RESETVAL (0x00000000u)
  12662. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_264_CLR_MASK (0x00000100u)
  12663. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_264_CLR_SHIFT (0x00000008u)
  12664. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_264_CLR_RESETVAL (0x00000000u)
  12665. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_265_CLR_MASK (0x00000200u)
  12666. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_265_CLR_SHIFT (0x00000009u)
  12667. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_265_CLR_RESETVAL (0x00000000u)
  12668. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_266_CLR_MASK (0x00000400u)
  12669. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_266_CLR_SHIFT (0x0000000Au)
  12670. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_266_CLR_RESETVAL (0x00000000u)
  12671. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_267_CLR_MASK (0x00000800u)
  12672. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_267_CLR_SHIFT (0x0000000Bu)
  12673. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_267_CLR_RESETVAL (0x00000000u)
  12674. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_268_CLR_MASK (0x00001000u)
  12675. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_268_CLR_SHIFT (0x0000000Cu)
  12676. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_268_CLR_RESETVAL (0x00000000u)
  12677. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_269_CLR_MASK (0x00002000u)
  12678. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_269_CLR_SHIFT (0x0000000Du)
  12679. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_269_CLR_RESETVAL (0x00000000u)
  12680. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_270_CLR_MASK (0x00004000u)
  12681. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_270_CLR_SHIFT (0x0000000Eu)
  12682. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_270_CLR_RESETVAL (0x00000000u)
  12683. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_271_CLR_MASK (0x00008000u)
  12684. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_271_CLR_SHIFT (0x0000000Fu)
  12685. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_271_CLR_RESETVAL (0x00000000u)
  12686. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_272_CLR_MASK (0x00010000u)
  12687. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_272_CLR_SHIFT (0x00000010u)
  12688. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_272_CLR_RESETVAL (0x00000000u)
  12689. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_273_CLR_MASK (0x00020000u)
  12690. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_273_CLR_SHIFT (0x00000011u)
  12691. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_273_CLR_RESETVAL (0x00000000u)
  12692. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_274_CLR_MASK (0x00040000u)
  12693. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_274_CLR_SHIFT (0x00000012u)
  12694. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_274_CLR_RESETVAL (0x00000000u)
  12695. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_275_CLR_MASK (0x00080000u)
  12696. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_275_CLR_SHIFT (0x00000013u)
  12697. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_275_CLR_RESETVAL (0x00000000u)
  12698. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_276_CLR_MASK (0x00100000u)
  12699. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_276_CLR_SHIFT (0x00000014u)
  12700. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_276_CLR_RESETVAL (0x00000000u)
  12701. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_277_CLR_MASK (0x00200000u)
  12702. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_277_CLR_SHIFT (0x00000015u)
  12703. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_277_CLR_RESETVAL (0x00000000u)
  12704. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_278_CLR_MASK (0x00400000u)
  12705. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_278_CLR_SHIFT (0x00000016u)
  12706. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_278_CLR_RESETVAL (0x00000000u)
  12707. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_279_CLR_MASK (0x00800000u)
  12708. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_279_CLR_SHIFT (0x00000017u)
  12709. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_279_CLR_RESETVAL (0x00000000u)
  12710. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_280_CLR_MASK (0x01000000u)
  12711. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_280_CLR_SHIFT (0x00000018u)
  12712. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_280_CLR_RESETVAL (0x00000000u)
  12713. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_281_CLR_MASK (0x02000000u)
  12714. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_281_CLR_SHIFT (0x00000019u)
  12715. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_281_CLR_RESETVAL (0x00000000u)
  12716. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_282_CLR_MASK (0x04000000u)
  12717. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_282_CLR_SHIFT (0x0000001Au)
  12718. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_282_CLR_RESETVAL (0x00000000u)
  12719. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_283_CLR_MASK (0x08000000u)
  12720. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_283_CLR_SHIFT (0x0000001Bu)
  12721. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_283_CLR_RESETVAL (0x00000000u)
  12722. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_284_CLR_MASK (0x10000000u)
  12723. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_284_CLR_SHIFT (0x0000001Cu)
  12724. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_284_CLR_RESETVAL (0x00000000u)
  12725. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_285_CLR_MASK (0x20000000u)
  12726. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_285_CLR_SHIFT (0x0000001Du)
  12727. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_285_CLR_RESETVAL (0x00000000u)
  12728. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_286_CLR_MASK (0x40000000u)
  12729. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_286_CLR_SHIFT (0x0000001Eu)
  12730. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_286_CLR_RESETVAL (0x00000000u)
  12731. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_287_CLR_MASK (0x80000000u)
  12732. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_287_CLR_SHIFT (0x0000001Fu)
  12733. #define CSL_CPINTC_ENABLE_CLR_REG8_ENABLE_287_CLR_RESETVAL (0x00000000u)
  12734. #define CSL_CPINTC_ENABLE_CLR_REG8_RESETVAL (0x00000000u)
  12735. /* enable_clr_reg9 */
  12736. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_288_CLR_MASK (0x00000001u)
  12737. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_288_CLR_SHIFT (0x00000000u)
  12738. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_288_CLR_RESETVAL (0x00000000u)
  12739. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_289_CLR_MASK (0x00000002u)
  12740. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_289_CLR_SHIFT (0x00000001u)
  12741. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_289_CLR_RESETVAL (0x00000000u)
  12742. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_290_CLR_MASK (0x00000004u)
  12743. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_290_CLR_SHIFT (0x00000002u)
  12744. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_290_CLR_RESETVAL (0x00000000u)
  12745. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_291_CLR_MASK (0x00000008u)
  12746. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_291_CLR_SHIFT (0x00000003u)
  12747. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_291_CLR_RESETVAL (0x00000000u)
  12748. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_292_CLR_MASK (0x00000010u)
  12749. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_292_CLR_SHIFT (0x00000004u)
  12750. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_292_CLR_RESETVAL (0x00000000u)
  12751. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_293_CLR_MASK (0x00000020u)
  12752. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_293_CLR_SHIFT (0x00000005u)
  12753. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_293_CLR_RESETVAL (0x00000000u)
  12754. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_294_CLR_MASK (0x00000040u)
  12755. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_294_CLR_SHIFT (0x00000006u)
  12756. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_294_CLR_RESETVAL (0x00000000u)
  12757. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_295_CLR_MASK (0x00000080u)
  12758. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_295_CLR_SHIFT (0x00000007u)
  12759. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_295_CLR_RESETVAL (0x00000000u)
  12760. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_296_CLR_MASK (0x00000100u)
  12761. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_296_CLR_SHIFT (0x00000008u)
  12762. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_296_CLR_RESETVAL (0x00000000u)
  12763. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_297_CLR_MASK (0x00000200u)
  12764. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_297_CLR_SHIFT (0x00000009u)
  12765. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_297_CLR_RESETVAL (0x00000000u)
  12766. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_298_CLR_MASK (0x00000400u)
  12767. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_298_CLR_SHIFT (0x0000000Au)
  12768. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_298_CLR_RESETVAL (0x00000000u)
  12769. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_299_CLR_MASK (0x00000800u)
  12770. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_299_CLR_SHIFT (0x0000000Bu)
  12771. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_299_CLR_RESETVAL (0x00000000u)
  12772. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_300_CLR_MASK (0x00001000u)
  12773. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_300_CLR_SHIFT (0x0000000Cu)
  12774. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_300_CLR_RESETVAL (0x00000000u)
  12775. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_301_CLR_MASK (0x00002000u)
  12776. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_301_CLR_SHIFT (0x0000000Du)
  12777. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_301_CLR_RESETVAL (0x00000000u)
  12778. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_302_CLR_MASK (0x00004000u)
  12779. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_302_CLR_SHIFT (0x0000000Eu)
  12780. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_302_CLR_RESETVAL (0x00000000u)
  12781. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_303_CLR_MASK (0x00008000u)
  12782. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_303_CLR_SHIFT (0x0000000Fu)
  12783. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_303_CLR_RESETVAL (0x00000000u)
  12784. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_304_CLR_MASK (0x00010000u)
  12785. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_304_CLR_SHIFT (0x00000010u)
  12786. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_304_CLR_RESETVAL (0x00000000u)
  12787. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_305_CLR_MASK (0x00020000u)
  12788. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_305_CLR_SHIFT (0x00000011u)
  12789. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_305_CLR_RESETVAL (0x00000000u)
  12790. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_306_CLR_MASK (0x00040000u)
  12791. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_306_CLR_SHIFT (0x00000012u)
  12792. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_306_CLR_RESETVAL (0x00000000u)
  12793. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_307_CLR_MASK (0x00080000u)
  12794. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_307_CLR_SHIFT (0x00000013u)
  12795. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_307_CLR_RESETVAL (0x00000000u)
  12796. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_308_CLR_MASK (0x00100000u)
  12797. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_308_CLR_SHIFT (0x00000014u)
  12798. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_308_CLR_RESETVAL (0x00000000u)
  12799. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_309_CLR_MASK (0x00200000u)
  12800. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_309_CLR_SHIFT (0x00000015u)
  12801. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_309_CLR_RESETVAL (0x00000000u)
  12802. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_310_CLR_MASK (0x00400000u)
  12803. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_310_CLR_SHIFT (0x00000016u)
  12804. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_310_CLR_RESETVAL (0x00000000u)
  12805. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_311_CLR_MASK (0x00800000u)
  12806. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_311_CLR_SHIFT (0x00000017u)
  12807. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_311_CLR_RESETVAL (0x00000000u)
  12808. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_312_CLR_MASK (0x01000000u)
  12809. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_312_CLR_SHIFT (0x00000018u)
  12810. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_312_CLR_RESETVAL (0x00000000u)
  12811. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_313_CLR_MASK (0x02000000u)
  12812. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_313_CLR_SHIFT (0x00000019u)
  12813. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_313_CLR_RESETVAL (0x00000000u)
  12814. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_314_CLR_MASK (0x04000000u)
  12815. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_314_CLR_SHIFT (0x0000001Au)
  12816. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_314_CLR_RESETVAL (0x00000000u)
  12817. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_315_CLR_MASK (0x08000000u)
  12818. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_315_CLR_SHIFT (0x0000001Bu)
  12819. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_315_CLR_RESETVAL (0x00000000u)
  12820. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_316_CLR_MASK (0x10000000u)
  12821. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_316_CLR_SHIFT (0x0000001Cu)
  12822. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_316_CLR_RESETVAL (0x00000000u)
  12823. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_317_CLR_MASK (0x20000000u)
  12824. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_317_CLR_SHIFT (0x0000001Du)
  12825. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_317_CLR_RESETVAL (0x00000000u)
  12826. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_318_CLR_MASK (0x40000000u)
  12827. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_318_CLR_SHIFT (0x0000001Eu)
  12828. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_318_CLR_RESETVAL (0x00000000u)
  12829. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_319_CLR_MASK (0x80000000u)
  12830. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_319_CLR_SHIFT (0x0000001Fu)
  12831. #define CSL_CPINTC_ENABLE_CLR_REG9_ENABLE_319_CLR_RESETVAL (0x00000000u)
  12832. #define CSL_CPINTC_ENABLE_CLR_REG9_RESETVAL (0x00000000u)
  12833. /* enable_clr_reg10 */
  12834. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_320_CLR_MASK (0x00000001u)
  12835. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_320_CLR_SHIFT (0x00000000u)
  12836. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_320_CLR_RESETVAL (0x00000000u)
  12837. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_321_CLR_MASK (0x00000002u)
  12838. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_321_CLR_SHIFT (0x00000001u)
  12839. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_321_CLR_RESETVAL (0x00000000u)
  12840. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_322_CLR_MASK (0x00000004u)
  12841. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_322_CLR_SHIFT (0x00000002u)
  12842. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_322_CLR_RESETVAL (0x00000000u)
  12843. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_323_CLR_MASK (0x00000008u)
  12844. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_323_CLR_SHIFT (0x00000003u)
  12845. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_323_CLR_RESETVAL (0x00000000u)
  12846. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_324_CLR_MASK (0x00000010u)
  12847. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_324_CLR_SHIFT (0x00000004u)
  12848. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_324_CLR_RESETVAL (0x00000000u)
  12849. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_325_CLR_MASK (0x00000020u)
  12850. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_325_CLR_SHIFT (0x00000005u)
  12851. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_325_CLR_RESETVAL (0x00000000u)
  12852. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_326_CLR_MASK (0x00000040u)
  12853. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_326_CLR_SHIFT (0x00000006u)
  12854. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_326_CLR_RESETVAL (0x00000000u)
  12855. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_327_CLR_MASK (0x00000080u)
  12856. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_327_CLR_SHIFT (0x00000007u)
  12857. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_327_CLR_RESETVAL (0x00000000u)
  12858. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_328_CLR_MASK (0x00000100u)
  12859. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_328_CLR_SHIFT (0x00000008u)
  12860. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_328_CLR_RESETVAL (0x00000000u)
  12861. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_329_CLR_MASK (0x00000200u)
  12862. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_329_CLR_SHIFT (0x00000009u)
  12863. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_329_CLR_RESETVAL (0x00000000u)
  12864. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_330_CLR_MASK (0x00000400u)
  12865. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_330_CLR_SHIFT (0x0000000Au)
  12866. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_330_CLR_RESETVAL (0x00000000u)
  12867. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_331_CLR_MASK (0x00000800u)
  12868. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_331_CLR_SHIFT (0x0000000Bu)
  12869. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_331_CLR_RESETVAL (0x00000000u)
  12870. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_332_CLR_MASK (0x00001000u)
  12871. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_332_CLR_SHIFT (0x0000000Cu)
  12872. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_332_CLR_RESETVAL (0x00000000u)
  12873. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_333_CLR_MASK (0x00002000u)
  12874. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_333_CLR_SHIFT (0x0000000Du)
  12875. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_333_CLR_RESETVAL (0x00000000u)
  12876. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_334_CLR_MASK (0x00004000u)
  12877. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_334_CLR_SHIFT (0x0000000Eu)
  12878. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_334_CLR_RESETVAL (0x00000000u)
  12879. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_335_CLR_MASK (0x00008000u)
  12880. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_335_CLR_SHIFT (0x0000000Fu)
  12881. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_335_CLR_RESETVAL (0x00000000u)
  12882. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_336_CLR_MASK (0x00010000u)
  12883. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_336_CLR_SHIFT (0x00000010u)
  12884. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_336_CLR_RESETVAL (0x00000000u)
  12885. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_337_CLR_MASK (0x00020000u)
  12886. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_337_CLR_SHIFT (0x00000011u)
  12887. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_337_CLR_RESETVAL (0x00000000u)
  12888. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_338_CLR_MASK (0x00040000u)
  12889. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_338_CLR_SHIFT (0x00000012u)
  12890. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_338_CLR_RESETVAL (0x00000000u)
  12891. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_339_CLR_MASK (0x00080000u)
  12892. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_339_CLR_SHIFT (0x00000013u)
  12893. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_339_CLR_RESETVAL (0x00000000u)
  12894. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_340_CLR_MASK (0x00100000u)
  12895. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_340_CLR_SHIFT (0x00000014u)
  12896. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_340_CLR_RESETVAL (0x00000000u)
  12897. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_341_CLR_MASK (0x00200000u)
  12898. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_341_CLR_SHIFT (0x00000015u)
  12899. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_341_CLR_RESETVAL (0x00000000u)
  12900. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_342_CLR_MASK (0x00400000u)
  12901. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_342_CLR_SHIFT (0x00000016u)
  12902. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_342_CLR_RESETVAL (0x00000000u)
  12903. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_343_CLR_MASK (0x00800000u)
  12904. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_343_CLR_SHIFT (0x00000017u)
  12905. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_343_CLR_RESETVAL (0x00000000u)
  12906. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_344_CLR_MASK (0x01000000u)
  12907. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_344_CLR_SHIFT (0x00000018u)
  12908. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_344_CLR_RESETVAL (0x00000000u)
  12909. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_345_CLR_MASK (0x02000000u)
  12910. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_345_CLR_SHIFT (0x00000019u)
  12911. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_345_CLR_RESETVAL (0x00000000u)
  12912. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_346_CLR_MASK (0x04000000u)
  12913. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_346_CLR_SHIFT (0x0000001Au)
  12914. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_346_CLR_RESETVAL (0x00000000u)
  12915. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_347_CLR_MASK (0x08000000u)
  12916. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_347_CLR_SHIFT (0x0000001Bu)
  12917. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_347_CLR_RESETVAL (0x00000000u)
  12918. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_348_CLR_MASK (0x10000000u)
  12919. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_348_CLR_SHIFT (0x0000001Cu)
  12920. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_348_CLR_RESETVAL (0x00000000u)
  12921. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_349_CLR_MASK (0x20000000u)
  12922. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_349_CLR_SHIFT (0x0000001Du)
  12923. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_349_CLR_RESETVAL (0x00000000u)
  12924. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_350_CLR_MASK (0x40000000u)
  12925. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_350_CLR_SHIFT (0x0000001Eu)
  12926. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_350_CLR_RESETVAL (0x00000000u)
  12927. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_351_CLR_MASK (0x80000000u)
  12928. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_351_CLR_SHIFT (0x0000001Fu)
  12929. #define CSL_CPINTC_ENABLE_CLR_REG10_ENABLE_351_CLR_RESETVAL (0x00000000u)
  12930. #define CSL_CPINTC_ENABLE_CLR_REG10_RESETVAL (0x00000000u)
  12931. /* enable_clr_reg11 */
  12932. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_352_CLR_MASK (0x00000001u)
  12933. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_352_CLR_SHIFT (0x00000000u)
  12934. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_352_CLR_RESETVAL (0x00000000u)
  12935. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_353_CLR_MASK (0x00000002u)
  12936. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_353_CLR_SHIFT (0x00000001u)
  12937. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_353_CLR_RESETVAL (0x00000000u)
  12938. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_354_CLR_MASK (0x00000004u)
  12939. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_354_CLR_SHIFT (0x00000002u)
  12940. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_354_CLR_RESETVAL (0x00000000u)
  12941. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_355_CLR_MASK (0x00000008u)
  12942. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_355_CLR_SHIFT (0x00000003u)
  12943. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_355_CLR_RESETVAL (0x00000000u)
  12944. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_356_CLR_MASK (0x00000010u)
  12945. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_356_CLR_SHIFT (0x00000004u)
  12946. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_356_CLR_RESETVAL (0x00000000u)
  12947. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_357_CLR_MASK (0x00000020u)
  12948. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_357_CLR_SHIFT (0x00000005u)
  12949. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_357_CLR_RESETVAL (0x00000000u)
  12950. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_358_CLR_MASK (0x00000040u)
  12951. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_358_CLR_SHIFT (0x00000006u)
  12952. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_358_CLR_RESETVAL (0x00000000u)
  12953. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_359_CLR_MASK (0x00000080u)
  12954. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_359_CLR_SHIFT (0x00000007u)
  12955. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_359_CLR_RESETVAL (0x00000000u)
  12956. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_360_CLR_MASK (0x00000100u)
  12957. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_360_CLR_SHIFT (0x00000008u)
  12958. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_360_CLR_RESETVAL (0x00000000u)
  12959. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_361_CLR_MASK (0x00000200u)
  12960. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_361_CLR_SHIFT (0x00000009u)
  12961. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_361_CLR_RESETVAL (0x00000000u)
  12962. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_362_CLR_MASK (0x00000400u)
  12963. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_362_CLR_SHIFT (0x0000000Au)
  12964. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_362_CLR_RESETVAL (0x00000000u)
  12965. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_363_CLR_MASK (0x00000800u)
  12966. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_363_CLR_SHIFT (0x0000000Bu)
  12967. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_363_CLR_RESETVAL (0x00000000u)
  12968. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_364_CLR_MASK (0x00001000u)
  12969. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_364_CLR_SHIFT (0x0000000Cu)
  12970. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_364_CLR_RESETVAL (0x00000000u)
  12971. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_365_CLR_MASK (0x00002000u)
  12972. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_365_CLR_SHIFT (0x0000000Du)
  12973. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_365_CLR_RESETVAL (0x00000000u)
  12974. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_366_CLR_MASK (0x00004000u)
  12975. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_366_CLR_SHIFT (0x0000000Eu)
  12976. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_366_CLR_RESETVAL (0x00000000u)
  12977. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_367_CLR_MASK (0x00008000u)
  12978. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_367_CLR_SHIFT (0x0000000Fu)
  12979. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_367_CLR_RESETVAL (0x00000000u)
  12980. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_368_CLR_MASK (0x00010000u)
  12981. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_368_CLR_SHIFT (0x00000010u)
  12982. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_368_CLR_RESETVAL (0x00000000u)
  12983. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_369_CLR_MASK (0x00020000u)
  12984. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_369_CLR_SHIFT (0x00000011u)
  12985. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_369_CLR_RESETVAL (0x00000000u)
  12986. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_370_CLR_MASK (0x00040000u)
  12987. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_370_CLR_SHIFT (0x00000012u)
  12988. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_370_CLR_RESETVAL (0x00000000u)
  12989. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_371_CLR_MASK (0x00080000u)
  12990. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_371_CLR_SHIFT (0x00000013u)
  12991. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_371_CLR_RESETVAL (0x00000000u)
  12992. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_372_CLR_MASK (0x00100000u)
  12993. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_372_CLR_SHIFT (0x00000014u)
  12994. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_372_CLR_RESETVAL (0x00000000u)
  12995. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_373_CLR_MASK (0x00200000u)
  12996. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_373_CLR_SHIFT (0x00000015u)
  12997. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_373_CLR_RESETVAL (0x00000000u)
  12998. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_374_CLR_MASK (0x00400000u)
  12999. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_374_CLR_SHIFT (0x00000016u)
  13000. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_374_CLR_RESETVAL (0x00000000u)
  13001. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_375_CLR_MASK (0x00800000u)
  13002. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_375_CLR_SHIFT (0x00000017u)
  13003. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_375_CLR_RESETVAL (0x00000000u)
  13004. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_376_CLR_MASK (0x01000000u)
  13005. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_376_CLR_SHIFT (0x00000018u)
  13006. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_376_CLR_RESETVAL (0x00000000u)
  13007. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_377_CLR_MASK (0x02000000u)
  13008. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_377_CLR_SHIFT (0x00000019u)
  13009. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_377_CLR_RESETVAL (0x00000000u)
  13010. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_378_CLR_MASK (0x04000000u)
  13011. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_378_CLR_SHIFT (0x0000001Au)
  13012. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_378_CLR_RESETVAL (0x00000000u)
  13013. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_379_CLR_MASK (0x08000000u)
  13014. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_379_CLR_SHIFT (0x0000001Bu)
  13015. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_379_CLR_RESETVAL (0x00000000u)
  13016. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_380_CLR_MASK (0x10000000u)
  13017. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_380_CLR_SHIFT (0x0000001Cu)
  13018. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_380_CLR_RESETVAL (0x00000000u)
  13019. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_381_CLR_MASK (0x20000000u)
  13020. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_381_CLR_SHIFT (0x0000001Du)
  13021. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_381_CLR_RESETVAL (0x00000000u)
  13022. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_382_CLR_MASK (0x40000000u)
  13023. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_382_CLR_SHIFT (0x0000001Eu)
  13024. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_382_CLR_RESETVAL (0x00000000u)
  13025. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_383_CLR_MASK (0x80000000u)
  13026. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_383_CLR_SHIFT (0x0000001Fu)
  13027. #define CSL_CPINTC_ENABLE_CLR_REG11_ENABLE_383_CLR_RESETVAL (0x00000000u)
  13028. #define CSL_CPINTC_ENABLE_CLR_REG11_RESETVAL (0x00000000u)
  13029. /* enable_clr_reg12 */
  13030. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_384_CLR_MASK (0x00000001u)
  13031. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_384_CLR_SHIFT (0x00000000u)
  13032. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_384_CLR_RESETVAL (0x00000000u)
  13033. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_385_CLR_MASK (0x00000002u)
  13034. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_385_CLR_SHIFT (0x00000001u)
  13035. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_385_CLR_RESETVAL (0x00000000u)
  13036. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_386_CLR_MASK (0x00000004u)
  13037. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_386_CLR_SHIFT (0x00000002u)
  13038. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_386_CLR_RESETVAL (0x00000000u)
  13039. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_387_CLR_MASK (0x00000008u)
  13040. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_387_CLR_SHIFT (0x00000003u)
  13041. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_387_CLR_RESETVAL (0x00000000u)
  13042. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_388_CLR_MASK (0x00000010u)
  13043. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_388_CLR_SHIFT (0x00000004u)
  13044. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_388_CLR_RESETVAL (0x00000000u)
  13045. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_389_CLR_MASK (0x00000020u)
  13046. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_389_CLR_SHIFT (0x00000005u)
  13047. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_389_CLR_RESETVAL (0x00000000u)
  13048. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_390_CLR_MASK (0x00000040u)
  13049. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_390_CLR_SHIFT (0x00000006u)
  13050. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_390_CLR_RESETVAL (0x00000000u)
  13051. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_391_CLR_MASK (0x00000080u)
  13052. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_391_CLR_SHIFT (0x00000007u)
  13053. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_391_CLR_RESETVAL (0x00000000u)
  13054. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_392_CLR_MASK (0x00000100u)
  13055. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_392_CLR_SHIFT (0x00000008u)
  13056. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_392_CLR_RESETVAL (0x00000000u)
  13057. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_393_CLR_MASK (0x00000200u)
  13058. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_393_CLR_SHIFT (0x00000009u)
  13059. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_393_CLR_RESETVAL (0x00000000u)
  13060. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_394_CLR_MASK (0x00000400u)
  13061. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_394_CLR_SHIFT (0x0000000Au)
  13062. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_394_CLR_RESETVAL (0x00000000u)
  13063. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_395_CLR_MASK (0x00000800u)
  13064. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_395_CLR_SHIFT (0x0000000Bu)
  13065. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_395_CLR_RESETVAL (0x00000000u)
  13066. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_396_CLR_MASK (0x00001000u)
  13067. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_396_CLR_SHIFT (0x0000000Cu)
  13068. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_396_CLR_RESETVAL (0x00000000u)
  13069. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_397_CLR_MASK (0x00002000u)
  13070. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_397_CLR_SHIFT (0x0000000Du)
  13071. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_397_CLR_RESETVAL (0x00000000u)
  13072. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_398_CLR_MASK (0x00004000u)
  13073. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_398_CLR_SHIFT (0x0000000Eu)
  13074. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_398_CLR_RESETVAL (0x00000000u)
  13075. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_399_CLR_MASK (0x00008000u)
  13076. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_399_CLR_SHIFT (0x0000000Fu)
  13077. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_399_CLR_RESETVAL (0x00000000u)
  13078. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_400_CLR_MASK (0x00010000u)
  13079. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_400_CLR_SHIFT (0x00000010u)
  13080. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_400_CLR_RESETVAL (0x00000000u)
  13081. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_401_CLR_MASK (0x00020000u)
  13082. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_401_CLR_SHIFT (0x00000011u)
  13083. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_401_CLR_RESETVAL (0x00000000u)
  13084. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_402_CLR_MASK (0x00040000u)
  13085. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_402_CLR_SHIFT (0x00000012u)
  13086. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_402_CLR_RESETVAL (0x00000000u)
  13087. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_403_CLR_MASK (0x00080000u)
  13088. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_403_CLR_SHIFT (0x00000013u)
  13089. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_403_CLR_RESETVAL (0x00000000u)
  13090. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_404_CLR_MASK (0x00100000u)
  13091. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_404_CLR_SHIFT (0x00000014u)
  13092. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_404_CLR_RESETVAL (0x00000000u)
  13093. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_405_CLR_MASK (0x00200000u)
  13094. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_405_CLR_SHIFT (0x00000015u)
  13095. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_405_CLR_RESETVAL (0x00000000u)
  13096. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_406_CLR_MASK (0x00400000u)
  13097. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_406_CLR_SHIFT (0x00000016u)
  13098. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_406_CLR_RESETVAL (0x00000000u)
  13099. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_407_CLR_MASK (0x00800000u)
  13100. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_407_CLR_SHIFT (0x00000017u)
  13101. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_407_CLR_RESETVAL (0x00000000u)
  13102. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_408_CLR_MASK (0x01000000u)
  13103. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_408_CLR_SHIFT (0x00000018u)
  13104. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_408_CLR_RESETVAL (0x00000000u)
  13105. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_409_CLR_MASK (0x02000000u)
  13106. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_409_CLR_SHIFT (0x00000019u)
  13107. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_409_CLR_RESETVAL (0x00000000u)
  13108. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_410_CLR_MASK (0x04000000u)
  13109. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_410_CLR_SHIFT (0x0000001Au)
  13110. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_410_CLR_RESETVAL (0x00000000u)
  13111. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_411_CLR_MASK (0x08000000u)
  13112. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_411_CLR_SHIFT (0x0000001Bu)
  13113. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_411_CLR_RESETVAL (0x00000000u)
  13114. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_412_CLR_MASK (0x10000000u)
  13115. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_412_CLR_SHIFT (0x0000001Cu)
  13116. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_412_CLR_RESETVAL (0x00000000u)
  13117. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_413_CLR_MASK (0x20000000u)
  13118. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_413_CLR_SHIFT (0x0000001Du)
  13119. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_413_CLR_RESETVAL (0x00000000u)
  13120. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_414_CLR_MASK (0x40000000u)
  13121. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_414_CLR_SHIFT (0x0000001Eu)
  13122. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_414_CLR_RESETVAL (0x00000000u)
  13123. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_415_CLR_MASK (0x80000000u)
  13124. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_415_CLR_SHIFT (0x0000001Fu)
  13125. #define CSL_CPINTC_ENABLE_CLR_REG12_ENABLE_415_CLR_RESETVAL (0x00000000u)
  13126. #define CSL_CPINTC_ENABLE_CLR_REG12_RESETVAL (0x00000000u)
  13127. /* enable_clr_reg13 */
  13128. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_416_CLR_MASK (0x00000001u)
  13129. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_416_CLR_SHIFT (0x00000000u)
  13130. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_416_CLR_RESETVAL (0x00000000u)
  13131. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_417_CLR_MASK (0x00000002u)
  13132. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_417_CLR_SHIFT (0x00000001u)
  13133. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_417_CLR_RESETVAL (0x00000000u)
  13134. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_418_CLR_MASK (0x00000004u)
  13135. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_418_CLR_SHIFT (0x00000002u)
  13136. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_418_CLR_RESETVAL (0x00000000u)
  13137. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_419_CLR_MASK (0x00000008u)
  13138. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_419_CLR_SHIFT (0x00000003u)
  13139. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_419_CLR_RESETVAL (0x00000000u)
  13140. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_420_CLR_MASK (0x00000010u)
  13141. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_420_CLR_SHIFT (0x00000004u)
  13142. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_420_CLR_RESETVAL (0x00000000u)
  13143. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_421_CLR_MASK (0x00000020u)
  13144. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_421_CLR_SHIFT (0x00000005u)
  13145. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_421_CLR_RESETVAL (0x00000000u)
  13146. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_422_CLR_MASK (0x00000040u)
  13147. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_422_CLR_SHIFT (0x00000006u)
  13148. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_422_CLR_RESETVAL (0x00000000u)
  13149. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_423_CLR_MASK (0x00000080u)
  13150. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_423_CLR_SHIFT (0x00000007u)
  13151. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_423_CLR_RESETVAL (0x00000000u)
  13152. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_424_CLR_MASK (0x00000100u)
  13153. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_424_CLR_SHIFT (0x00000008u)
  13154. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_424_CLR_RESETVAL (0x00000000u)
  13155. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_425_CLR_MASK (0x00000200u)
  13156. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_425_CLR_SHIFT (0x00000009u)
  13157. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_425_CLR_RESETVAL (0x00000000u)
  13158. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_426_CLR_MASK (0x00000400u)
  13159. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_426_CLR_SHIFT (0x0000000Au)
  13160. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_426_CLR_RESETVAL (0x00000000u)
  13161. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_427_CLR_MASK (0x00000800u)
  13162. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_427_CLR_SHIFT (0x0000000Bu)
  13163. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_427_CLR_RESETVAL (0x00000000u)
  13164. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_428_CLR_MASK (0x00001000u)
  13165. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_428_CLR_SHIFT (0x0000000Cu)
  13166. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_428_CLR_RESETVAL (0x00000000u)
  13167. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_429_CLR_MASK (0x00002000u)
  13168. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_429_CLR_SHIFT (0x0000000Du)
  13169. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_429_CLR_RESETVAL (0x00000000u)
  13170. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_430_CLR_MASK (0x00004000u)
  13171. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_430_CLR_SHIFT (0x0000000Eu)
  13172. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_430_CLR_RESETVAL (0x00000000u)
  13173. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_431_CLR_MASK (0x00008000u)
  13174. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_431_CLR_SHIFT (0x0000000Fu)
  13175. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_431_CLR_RESETVAL (0x00000000u)
  13176. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_432_CLR_MASK (0x00010000u)
  13177. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_432_CLR_SHIFT (0x00000010u)
  13178. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_432_CLR_RESETVAL (0x00000000u)
  13179. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_433_CLR_MASK (0x00020000u)
  13180. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_433_CLR_SHIFT (0x00000011u)
  13181. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_433_CLR_RESETVAL (0x00000000u)
  13182. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_434_CLR_MASK (0x00040000u)
  13183. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_434_CLR_SHIFT (0x00000012u)
  13184. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_434_CLR_RESETVAL (0x00000000u)
  13185. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_435_CLR_MASK (0x00080000u)
  13186. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_435_CLR_SHIFT (0x00000013u)
  13187. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_435_CLR_RESETVAL (0x00000000u)
  13188. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_436_CLR_MASK (0x00100000u)
  13189. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_436_CLR_SHIFT (0x00000014u)
  13190. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_436_CLR_RESETVAL (0x00000000u)
  13191. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_437_CLR_MASK (0x00200000u)
  13192. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_437_CLR_SHIFT (0x00000015u)
  13193. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_437_CLR_RESETVAL (0x00000000u)
  13194. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_438_CLR_MASK (0x00400000u)
  13195. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_438_CLR_SHIFT (0x00000016u)
  13196. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_438_CLR_RESETVAL (0x00000000u)
  13197. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_439_CLR_MASK (0x00800000u)
  13198. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_439_CLR_SHIFT (0x00000017u)
  13199. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_439_CLR_RESETVAL (0x00000000u)
  13200. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_440_CLR_MASK (0x01000000u)
  13201. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_440_CLR_SHIFT (0x00000018u)
  13202. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_440_CLR_RESETVAL (0x00000000u)
  13203. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_441_CLR_MASK (0x02000000u)
  13204. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_441_CLR_SHIFT (0x00000019u)
  13205. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_441_CLR_RESETVAL (0x00000000u)
  13206. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_442_CLR_MASK (0x04000000u)
  13207. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_442_CLR_SHIFT (0x0000001Au)
  13208. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_442_CLR_RESETVAL (0x00000000u)
  13209. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_443_CLR_MASK (0x08000000u)
  13210. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_443_CLR_SHIFT (0x0000001Bu)
  13211. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_443_CLR_RESETVAL (0x00000000u)
  13212. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_444_CLR_MASK (0x10000000u)
  13213. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_444_CLR_SHIFT (0x0000001Cu)
  13214. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_444_CLR_RESETVAL (0x00000000u)
  13215. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_445_CLR_MASK (0x20000000u)
  13216. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_445_CLR_SHIFT (0x0000001Du)
  13217. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_445_CLR_RESETVAL (0x00000000u)
  13218. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_446_CLR_MASK (0x40000000u)
  13219. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_446_CLR_SHIFT (0x0000001Eu)
  13220. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_446_CLR_RESETVAL (0x00000000u)
  13221. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_447_CLR_MASK (0x80000000u)
  13222. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_447_CLR_SHIFT (0x0000001Fu)
  13223. #define CSL_CPINTC_ENABLE_CLR_REG13_ENABLE_447_CLR_RESETVAL (0x00000000u)
  13224. #define CSL_CPINTC_ENABLE_CLR_REG13_RESETVAL (0x00000000u)
  13225. /* enable_clr_reg14 */
  13226. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_448_CLR_MASK (0x00000001u)
  13227. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_448_CLR_SHIFT (0x00000000u)
  13228. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_448_CLR_RESETVAL (0x00000000u)
  13229. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_449_CLR_MASK (0x00000002u)
  13230. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_449_CLR_SHIFT (0x00000001u)
  13231. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_449_CLR_RESETVAL (0x00000000u)
  13232. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_450_CLR_MASK (0x00000004u)
  13233. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_450_CLR_SHIFT (0x00000002u)
  13234. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_450_CLR_RESETVAL (0x00000000u)
  13235. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_451_CLR_MASK (0x00000008u)
  13236. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_451_CLR_SHIFT (0x00000003u)
  13237. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_451_CLR_RESETVAL (0x00000000u)
  13238. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_452_CLR_MASK (0x00000010u)
  13239. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_452_CLR_SHIFT (0x00000004u)
  13240. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_452_CLR_RESETVAL (0x00000000u)
  13241. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_453_CLR_MASK (0x00000020u)
  13242. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_453_CLR_SHIFT (0x00000005u)
  13243. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_453_CLR_RESETVAL (0x00000000u)
  13244. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_454_CLR_MASK (0x00000040u)
  13245. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_454_CLR_SHIFT (0x00000006u)
  13246. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_454_CLR_RESETVAL (0x00000000u)
  13247. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_455_CLR_MASK (0x00000080u)
  13248. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_455_CLR_SHIFT (0x00000007u)
  13249. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_455_CLR_RESETVAL (0x00000000u)
  13250. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_456_CLR_MASK (0x00000100u)
  13251. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_456_CLR_SHIFT (0x00000008u)
  13252. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_456_CLR_RESETVAL (0x00000000u)
  13253. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_457_CLR_MASK (0x00000200u)
  13254. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_457_CLR_SHIFT (0x00000009u)
  13255. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_457_CLR_RESETVAL (0x00000000u)
  13256. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_458_CLR_MASK (0x00000400u)
  13257. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_458_CLR_SHIFT (0x0000000Au)
  13258. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_458_CLR_RESETVAL (0x00000000u)
  13259. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_459_CLR_MASK (0x00000800u)
  13260. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_459_CLR_SHIFT (0x0000000Bu)
  13261. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_459_CLR_RESETVAL (0x00000000u)
  13262. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_460_CLR_MASK (0x00001000u)
  13263. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_460_CLR_SHIFT (0x0000000Cu)
  13264. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_460_CLR_RESETVAL (0x00000000u)
  13265. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_461_CLR_MASK (0x00002000u)
  13266. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_461_CLR_SHIFT (0x0000000Du)
  13267. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_461_CLR_RESETVAL (0x00000000u)
  13268. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_462_CLR_MASK (0x00004000u)
  13269. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_462_CLR_SHIFT (0x0000000Eu)
  13270. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_462_CLR_RESETVAL (0x00000000u)
  13271. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_463_CLR_MASK (0x00008000u)
  13272. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_463_CLR_SHIFT (0x0000000Fu)
  13273. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_463_CLR_RESETVAL (0x00000000u)
  13274. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_464_CLR_MASK (0x00010000u)
  13275. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_464_CLR_SHIFT (0x00000010u)
  13276. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_464_CLR_RESETVAL (0x00000000u)
  13277. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_465_CLR_MASK (0x00020000u)
  13278. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_465_CLR_SHIFT (0x00000011u)
  13279. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_465_CLR_RESETVAL (0x00000000u)
  13280. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_466_CLR_MASK (0x00040000u)
  13281. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_466_CLR_SHIFT (0x00000012u)
  13282. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_466_CLR_RESETVAL (0x00000000u)
  13283. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_467_CLR_MASK (0x00080000u)
  13284. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_467_CLR_SHIFT (0x00000013u)
  13285. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_467_CLR_RESETVAL (0x00000000u)
  13286. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_468_CLR_MASK (0x00100000u)
  13287. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_468_CLR_SHIFT (0x00000014u)
  13288. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_468_CLR_RESETVAL (0x00000000u)
  13289. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_469_CLR_MASK (0x00200000u)
  13290. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_469_CLR_SHIFT (0x00000015u)
  13291. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_469_CLR_RESETVAL (0x00000000u)
  13292. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_470_CLR_MASK (0x00400000u)
  13293. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_470_CLR_SHIFT (0x00000016u)
  13294. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_470_CLR_RESETVAL (0x00000000u)
  13295. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_471_CLR_MASK (0x00800000u)
  13296. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_471_CLR_SHIFT (0x00000017u)
  13297. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_471_CLR_RESETVAL (0x00000000u)
  13298. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_472_CLR_MASK (0x01000000u)
  13299. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_472_CLR_SHIFT (0x00000018u)
  13300. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_472_CLR_RESETVAL (0x00000000u)
  13301. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_473_CLR_MASK (0x02000000u)
  13302. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_473_CLR_SHIFT (0x00000019u)
  13303. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_473_CLR_RESETVAL (0x00000000u)
  13304. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_474_CLR_MASK (0x04000000u)
  13305. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_474_CLR_SHIFT (0x0000001Au)
  13306. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_474_CLR_RESETVAL (0x00000000u)
  13307. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_475_CLR_MASK (0x08000000u)
  13308. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_475_CLR_SHIFT (0x0000001Bu)
  13309. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_475_CLR_RESETVAL (0x00000000u)
  13310. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_476_CLR_MASK (0x10000000u)
  13311. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_476_CLR_SHIFT (0x0000001Cu)
  13312. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_476_CLR_RESETVAL (0x00000000u)
  13313. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_477_CLR_MASK (0x20000000u)
  13314. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_477_CLR_SHIFT (0x0000001Du)
  13315. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_477_CLR_RESETVAL (0x00000000u)
  13316. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_478_CLR_MASK (0x40000000u)
  13317. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_478_CLR_SHIFT (0x0000001Eu)
  13318. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_478_CLR_RESETVAL (0x00000000u)
  13319. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_479_CLR_MASK (0x80000000u)
  13320. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_479_CLR_SHIFT (0x0000001Fu)
  13321. #define CSL_CPINTC_ENABLE_CLR_REG14_ENABLE_479_CLR_RESETVAL (0x00000000u)
  13322. #define CSL_CPINTC_ENABLE_CLR_REG14_RESETVAL (0x00000000u)
  13323. /* enable_clr_reg15 */
  13324. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_480_CLR_MASK (0x00000001u)
  13325. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_480_CLR_SHIFT (0x00000000u)
  13326. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_480_CLR_RESETVAL (0x00000000u)
  13327. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_481_CLR_MASK (0x00000002u)
  13328. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_481_CLR_SHIFT (0x00000001u)
  13329. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_481_CLR_RESETVAL (0x00000000u)
  13330. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_482_CLR_MASK (0x00000004u)
  13331. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_482_CLR_SHIFT (0x00000002u)
  13332. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_482_CLR_RESETVAL (0x00000000u)
  13333. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_483_CLR_MASK (0x00000008u)
  13334. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_483_CLR_SHIFT (0x00000003u)
  13335. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_483_CLR_RESETVAL (0x00000000u)
  13336. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_484_CLR_MASK (0x00000010u)
  13337. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_484_CLR_SHIFT (0x00000004u)
  13338. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_484_CLR_RESETVAL (0x00000000u)
  13339. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_485_CLR_MASK (0x00000020u)
  13340. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_485_CLR_SHIFT (0x00000005u)
  13341. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_485_CLR_RESETVAL (0x00000000u)
  13342. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_486_CLR_MASK (0x00000040u)
  13343. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_486_CLR_SHIFT (0x00000006u)
  13344. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_486_CLR_RESETVAL (0x00000000u)
  13345. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_487_CLR_MASK (0x00000080u)
  13346. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_487_CLR_SHIFT (0x00000007u)
  13347. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_487_CLR_RESETVAL (0x00000000u)
  13348. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_488_CLR_MASK (0x00000100u)
  13349. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_488_CLR_SHIFT (0x00000008u)
  13350. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_488_CLR_RESETVAL (0x00000000u)
  13351. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_489_CLR_MASK (0x00000200u)
  13352. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_489_CLR_SHIFT (0x00000009u)
  13353. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_489_CLR_RESETVAL (0x00000000u)
  13354. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_490_CLR_MASK (0x00000400u)
  13355. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_490_CLR_SHIFT (0x0000000Au)
  13356. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_490_CLR_RESETVAL (0x00000000u)
  13357. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_491_CLR_MASK (0x00000800u)
  13358. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_491_CLR_SHIFT (0x0000000Bu)
  13359. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_491_CLR_RESETVAL (0x00000000u)
  13360. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_492_CLR_MASK (0x00001000u)
  13361. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_492_CLR_SHIFT (0x0000000Cu)
  13362. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_492_CLR_RESETVAL (0x00000000u)
  13363. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_493_CLR_MASK (0x00002000u)
  13364. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_493_CLR_SHIFT (0x0000000Du)
  13365. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_493_CLR_RESETVAL (0x00000000u)
  13366. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_494_CLR_MASK (0x00004000u)
  13367. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_494_CLR_SHIFT (0x0000000Eu)
  13368. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_494_CLR_RESETVAL (0x00000000u)
  13369. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_495_CLR_MASK (0x00008000u)
  13370. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_495_CLR_SHIFT (0x0000000Fu)
  13371. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_495_CLR_RESETVAL (0x00000000u)
  13372. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_496_CLR_MASK (0x00010000u)
  13373. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_496_CLR_SHIFT (0x00000010u)
  13374. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_496_CLR_RESETVAL (0x00000000u)
  13375. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_497_CLR_MASK (0x00020000u)
  13376. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_497_CLR_SHIFT (0x00000011u)
  13377. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_497_CLR_RESETVAL (0x00000000u)
  13378. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_498_CLR_MASK (0x00040000u)
  13379. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_498_CLR_SHIFT (0x00000012u)
  13380. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_498_CLR_RESETVAL (0x00000000u)
  13381. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_499_CLR_MASK (0x00080000u)
  13382. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_499_CLR_SHIFT (0x00000013u)
  13383. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_499_CLR_RESETVAL (0x00000000u)
  13384. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_500_CLR_MASK (0x00100000u)
  13385. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_500_CLR_SHIFT (0x00000014u)
  13386. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_500_CLR_RESETVAL (0x00000000u)
  13387. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_501_CLR_MASK (0x00200000u)
  13388. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_501_CLR_SHIFT (0x00000015u)
  13389. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_501_CLR_RESETVAL (0x00000000u)
  13390. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_502_CLR_MASK (0x00400000u)
  13391. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_502_CLR_SHIFT (0x00000016u)
  13392. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_502_CLR_RESETVAL (0x00000000u)
  13393. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_503_CLR_MASK (0x00800000u)
  13394. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_503_CLR_SHIFT (0x00000017u)
  13395. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_503_CLR_RESETVAL (0x00000000u)
  13396. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_504_CLR_MASK (0x01000000u)
  13397. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_504_CLR_SHIFT (0x00000018u)
  13398. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_504_CLR_RESETVAL (0x00000000u)
  13399. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_505_CLR_MASK (0x02000000u)
  13400. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_505_CLR_SHIFT (0x00000019u)
  13401. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_505_CLR_RESETVAL (0x00000000u)
  13402. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_506_CLR_MASK (0x04000000u)
  13403. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_506_CLR_SHIFT (0x0000001Au)
  13404. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_506_CLR_RESETVAL (0x00000000u)
  13405. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_507_CLR_MASK (0x08000000u)
  13406. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_507_CLR_SHIFT (0x0000001Bu)
  13407. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_507_CLR_RESETVAL (0x00000000u)
  13408. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_508_CLR_MASK (0x10000000u)
  13409. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_508_CLR_SHIFT (0x0000001Cu)
  13410. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_508_CLR_RESETVAL (0x00000000u)
  13411. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_509_CLR_MASK (0x20000000u)
  13412. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_509_CLR_SHIFT (0x0000001Du)
  13413. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_509_CLR_RESETVAL (0x00000000u)
  13414. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_510_CLR_MASK (0x40000000u)
  13415. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_510_CLR_SHIFT (0x0000001Eu)
  13416. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_510_CLR_RESETVAL (0x00000000u)
  13417. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_511_CLR_MASK (0x80000000u)
  13418. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_511_CLR_SHIFT (0x0000001Fu)
  13419. #define CSL_CPINTC_ENABLE_CLR_REG15_ENABLE_511_CLR_RESETVAL (0x00000000u)
  13420. #define CSL_CPINTC_ENABLE_CLR_REG15_RESETVAL (0x00000000u)
  13421. /* enable_clr_reg16 */
  13422. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_512_CLR_MASK (0x00000001u)
  13423. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_512_CLR_SHIFT (0x00000000u)
  13424. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_512_CLR_RESETVAL (0x00000000u)
  13425. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_513_CLR_MASK (0x00000002u)
  13426. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_513_CLR_SHIFT (0x00000001u)
  13427. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_513_CLR_RESETVAL (0x00000000u)
  13428. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_514_CLR_MASK (0x00000004u)
  13429. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_514_CLR_SHIFT (0x00000002u)
  13430. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_514_CLR_RESETVAL (0x00000000u)
  13431. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_515_CLR_MASK (0x00000008u)
  13432. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_515_CLR_SHIFT (0x00000003u)
  13433. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_515_CLR_RESETVAL (0x00000000u)
  13434. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_516_CLR_MASK (0x00000010u)
  13435. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_516_CLR_SHIFT (0x00000004u)
  13436. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_516_CLR_RESETVAL (0x00000000u)
  13437. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_517_CLR_MASK (0x00000020u)
  13438. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_517_CLR_SHIFT (0x00000005u)
  13439. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_517_CLR_RESETVAL (0x00000000u)
  13440. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_518_CLR_MASK (0x00000040u)
  13441. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_518_CLR_SHIFT (0x00000006u)
  13442. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_518_CLR_RESETVAL (0x00000000u)
  13443. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_519_CLR_MASK (0x00000080u)
  13444. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_519_CLR_SHIFT (0x00000007u)
  13445. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_519_CLR_RESETVAL (0x00000000u)
  13446. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_520_CLR_MASK (0x00000100u)
  13447. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_520_CLR_SHIFT (0x00000008u)
  13448. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_520_CLR_RESETVAL (0x00000000u)
  13449. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_521_CLR_MASK (0x00000200u)
  13450. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_521_CLR_SHIFT (0x00000009u)
  13451. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_521_CLR_RESETVAL (0x00000000u)
  13452. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_522_CLR_MASK (0x00000400u)
  13453. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_522_CLR_SHIFT (0x0000000Au)
  13454. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_522_CLR_RESETVAL (0x00000000u)
  13455. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_523_CLR_MASK (0x00000800u)
  13456. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_523_CLR_SHIFT (0x0000000Bu)
  13457. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_523_CLR_RESETVAL (0x00000000u)
  13458. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_524_CLR_MASK (0x00001000u)
  13459. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_524_CLR_SHIFT (0x0000000Cu)
  13460. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_524_CLR_RESETVAL (0x00000000u)
  13461. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_525_CLR_MASK (0x00002000u)
  13462. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_525_CLR_SHIFT (0x0000000Du)
  13463. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_525_CLR_RESETVAL (0x00000000u)
  13464. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_526_CLR_MASK (0x00004000u)
  13465. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_526_CLR_SHIFT (0x0000000Eu)
  13466. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_526_CLR_RESETVAL (0x00000000u)
  13467. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_527_CLR_MASK (0x00008000u)
  13468. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_527_CLR_SHIFT (0x0000000Fu)
  13469. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_527_CLR_RESETVAL (0x00000000u)
  13470. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_528_CLR_MASK (0x00010000u)
  13471. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_528_CLR_SHIFT (0x00000010u)
  13472. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_528_CLR_RESETVAL (0x00000000u)
  13473. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_529_CLR_MASK (0x00020000u)
  13474. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_529_CLR_SHIFT (0x00000011u)
  13475. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_529_CLR_RESETVAL (0x00000000u)
  13476. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_530_CLR_MASK (0x00040000u)
  13477. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_530_CLR_SHIFT (0x00000012u)
  13478. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_530_CLR_RESETVAL (0x00000000u)
  13479. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_531_CLR_MASK (0x00080000u)
  13480. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_531_CLR_SHIFT (0x00000013u)
  13481. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_531_CLR_RESETVAL (0x00000000u)
  13482. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_532_CLR_MASK (0x00100000u)
  13483. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_532_CLR_SHIFT (0x00000014u)
  13484. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_532_CLR_RESETVAL (0x00000000u)
  13485. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_533_CLR_MASK (0x00200000u)
  13486. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_533_CLR_SHIFT (0x00000015u)
  13487. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_533_CLR_RESETVAL (0x00000000u)
  13488. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_534_CLR_MASK (0x00400000u)
  13489. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_534_CLR_SHIFT (0x00000016u)
  13490. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_534_CLR_RESETVAL (0x00000000u)
  13491. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_535_CLR_MASK (0x00800000u)
  13492. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_535_CLR_SHIFT (0x00000017u)
  13493. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_535_CLR_RESETVAL (0x00000000u)
  13494. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_536_CLR_MASK (0x01000000u)
  13495. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_536_CLR_SHIFT (0x00000018u)
  13496. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_536_CLR_RESETVAL (0x00000000u)
  13497. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_537_CLR_MASK (0x02000000u)
  13498. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_537_CLR_SHIFT (0x00000019u)
  13499. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_537_CLR_RESETVAL (0x00000000u)
  13500. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_538_CLR_MASK (0x04000000u)
  13501. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_538_CLR_SHIFT (0x0000001Au)
  13502. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_538_CLR_RESETVAL (0x00000000u)
  13503. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_539_CLR_MASK (0x08000000u)
  13504. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_539_CLR_SHIFT (0x0000001Bu)
  13505. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_539_CLR_RESETVAL (0x00000000u)
  13506. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_540_CLR_MASK (0x10000000u)
  13507. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_540_CLR_SHIFT (0x0000001Cu)
  13508. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_540_CLR_RESETVAL (0x00000000u)
  13509. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_541_CLR_MASK (0x20000000u)
  13510. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_541_CLR_SHIFT (0x0000001Du)
  13511. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_541_CLR_RESETVAL (0x00000000u)
  13512. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_542_CLR_MASK (0x40000000u)
  13513. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_542_CLR_SHIFT (0x0000001Eu)
  13514. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_542_CLR_RESETVAL (0x00000000u)
  13515. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_543_CLR_MASK (0x80000000u)
  13516. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_543_CLR_SHIFT (0x0000001Fu)
  13517. #define CSL_CPINTC_ENABLE_CLR_REG16_ENABLE_543_CLR_RESETVAL (0x00000000u)
  13518. #define CSL_CPINTC_ENABLE_CLR_REG16_RESETVAL (0x00000000u)
  13519. /* enable_clr_reg17 */
  13520. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_544_CLR_MASK (0x00000001u)
  13521. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_544_CLR_SHIFT (0x00000000u)
  13522. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_544_CLR_RESETVAL (0x00000000u)
  13523. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_545_CLR_MASK (0x00000002u)
  13524. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_545_CLR_SHIFT (0x00000001u)
  13525. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_545_CLR_RESETVAL (0x00000000u)
  13526. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_546_CLR_MASK (0x00000004u)
  13527. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_546_CLR_SHIFT (0x00000002u)
  13528. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_546_CLR_RESETVAL (0x00000000u)
  13529. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_547_CLR_MASK (0x00000008u)
  13530. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_547_CLR_SHIFT (0x00000003u)
  13531. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_547_CLR_RESETVAL (0x00000000u)
  13532. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_548_CLR_MASK (0x00000010u)
  13533. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_548_CLR_SHIFT (0x00000004u)
  13534. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_548_CLR_RESETVAL (0x00000000u)
  13535. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_549_CLR_MASK (0x00000020u)
  13536. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_549_CLR_SHIFT (0x00000005u)
  13537. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_549_CLR_RESETVAL (0x00000000u)
  13538. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_550_CLR_MASK (0x00000040u)
  13539. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_550_CLR_SHIFT (0x00000006u)
  13540. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_550_CLR_RESETVAL (0x00000000u)
  13541. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_551_CLR_MASK (0x00000080u)
  13542. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_551_CLR_SHIFT (0x00000007u)
  13543. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_551_CLR_RESETVAL (0x00000000u)
  13544. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_552_CLR_MASK (0x00000100u)
  13545. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_552_CLR_SHIFT (0x00000008u)
  13546. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_552_CLR_RESETVAL (0x00000000u)
  13547. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_553_CLR_MASK (0x00000200u)
  13548. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_553_CLR_SHIFT (0x00000009u)
  13549. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_553_CLR_RESETVAL (0x00000000u)
  13550. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_554_CLR_MASK (0x00000400u)
  13551. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_554_CLR_SHIFT (0x0000000Au)
  13552. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_554_CLR_RESETVAL (0x00000000u)
  13553. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_555_CLR_MASK (0x00000800u)
  13554. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_555_CLR_SHIFT (0x0000000Bu)
  13555. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_555_CLR_RESETVAL (0x00000000u)
  13556. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_556_CLR_MASK (0x00001000u)
  13557. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_556_CLR_SHIFT (0x0000000Cu)
  13558. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_556_CLR_RESETVAL (0x00000000u)
  13559. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_557_CLR_MASK (0x00002000u)
  13560. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_557_CLR_SHIFT (0x0000000Du)
  13561. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_557_CLR_RESETVAL (0x00000000u)
  13562. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_558_CLR_MASK (0x00004000u)
  13563. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_558_CLR_SHIFT (0x0000000Eu)
  13564. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_558_CLR_RESETVAL (0x00000000u)
  13565. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_559_CLR_MASK (0x00008000u)
  13566. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_559_CLR_SHIFT (0x0000000Fu)
  13567. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_559_CLR_RESETVAL (0x00000000u)
  13568. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_560_CLR_MASK (0x00010000u)
  13569. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_560_CLR_SHIFT (0x00000010u)
  13570. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_560_CLR_RESETVAL (0x00000000u)
  13571. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_561_CLR_MASK (0x00020000u)
  13572. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_561_CLR_SHIFT (0x00000011u)
  13573. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_561_CLR_RESETVAL (0x00000000u)
  13574. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_562_CLR_MASK (0x00040000u)
  13575. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_562_CLR_SHIFT (0x00000012u)
  13576. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_562_CLR_RESETVAL (0x00000000u)
  13577. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_563_CLR_MASK (0x00080000u)
  13578. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_563_CLR_SHIFT (0x00000013u)
  13579. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_563_CLR_RESETVAL (0x00000000u)
  13580. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_564_CLR_MASK (0x00100000u)
  13581. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_564_CLR_SHIFT (0x00000014u)
  13582. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_564_CLR_RESETVAL (0x00000000u)
  13583. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_565_CLR_MASK (0x00200000u)
  13584. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_565_CLR_SHIFT (0x00000015u)
  13585. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_565_CLR_RESETVAL (0x00000000u)
  13586. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_566_CLR_MASK (0x00400000u)
  13587. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_566_CLR_SHIFT (0x00000016u)
  13588. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_566_CLR_RESETVAL (0x00000000u)
  13589. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_567_CLR_MASK (0x00800000u)
  13590. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_567_CLR_SHIFT (0x00000017u)
  13591. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_567_CLR_RESETVAL (0x00000000u)
  13592. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_568_CLR_MASK (0x01000000u)
  13593. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_568_CLR_SHIFT (0x00000018u)
  13594. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_568_CLR_RESETVAL (0x00000000u)
  13595. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_569_CLR_MASK (0x02000000u)
  13596. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_569_CLR_SHIFT (0x00000019u)
  13597. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_569_CLR_RESETVAL (0x00000000u)
  13598. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_570_CLR_MASK (0x04000000u)
  13599. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_570_CLR_SHIFT (0x0000001Au)
  13600. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_570_CLR_RESETVAL (0x00000000u)
  13601. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_571_CLR_MASK (0x08000000u)
  13602. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_571_CLR_SHIFT (0x0000001Bu)
  13603. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_571_CLR_RESETVAL (0x00000000u)
  13604. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_572_CLR_MASK (0x10000000u)
  13605. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_572_CLR_SHIFT (0x0000001Cu)
  13606. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_572_CLR_RESETVAL (0x00000000u)
  13607. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_573_CLR_MASK (0x20000000u)
  13608. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_573_CLR_SHIFT (0x0000001Du)
  13609. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_573_CLR_RESETVAL (0x00000000u)
  13610. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_574_CLR_MASK (0x40000000u)
  13611. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_574_CLR_SHIFT (0x0000001Eu)
  13612. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_574_CLR_RESETVAL (0x00000000u)
  13613. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_575_CLR_MASK (0x80000000u)
  13614. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_575_CLR_SHIFT (0x0000001Fu)
  13615. #define CSL_CPINTC_ENABLE_CLR_REG17_ENABLE_575_CLR_RESETVAL (0x00000000u)
  13616. #define CSL_CPINTC_ENABLE_CLR_REG17_RESETVAL (0x00000000u)
  13617. /* enable_clr_reg18 */
  13618. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_576_CLR_MASK (0x00000001u)
  13619. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_576_CLR_SHIFT (0x00000000u)
  13620. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_576_CLR_RESETVAL (0x00000000u)
  13621. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_577_CLR_MASK (0x00000002u)
  13622. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_577_CLR_SHIFT (0x00000001u)
  13623. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_577_CLR_RESETVAL (0x00000000u)
  13624. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_578_CLR_MASK (0x00000004u)
  13625. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_578_CLR_SHIFT (0x00000002u)
  13626. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_578_CLR_RESETVAL (0x00000000u)
  13627. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_579_CLR_MASK (0x00000008u)
  13628. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_579_CLR_SHIFT (0x00000003u)
  13629. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_579_CLR_RESETVAL (0x00000000u)
  13630. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_580_CLR_MASK (0x00000010u)
  13631. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_580_CLR_SHIFT (0x00000004u)
  13632. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_580_CLR_RESETVAL (0x00000000u)
  13633. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_581_CLR_MASK (0x00000020u)
  13634. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_581_CLR_SHIFT (0x00000005u)
  13635. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_581_CLR_RESETVAL (0x00000000u)
  13636. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_582_CLR_MASK (0x00000040u)
  13637. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_582_CLR_SHIFT (0x00000006u)
  13638. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_582_CLR_RESETVAL (0x00000000u)
  13639. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_583_CLR_MASK (0x00000080u)
  13640. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_583_CLR_SHIFT (0x00000007u)
  13641. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_583_CLR_RESETVAL (0x00000000u)
  13642. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_584_CLR_MASK (0x00000100u)
  13643. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_584_CLR_SHIFT (0x00000008u)
  13644. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_584_CLR_RESETVAL (0x00000000u)
  13645. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_585_CLR_MASK (0x00000200u)
  13646. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_585_CLR_SHIFT (0x00000009u)
  13647. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_585_CLR_RESETVAL (0x00000000u)
  13648. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_586_CLR_MASK (0x00000400u)
  13649. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_586_CLR_SHIFT (0x0000000Au)
  13650. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_586_CLR_RESETVAL (0x00000000u)
  13651. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_587_CLR_MASK (0x00000800u)
  13652. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_587_CLR_SHIFT (0x0000000Bu)
  13653. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_587_CLR_RESETVAL (0x00000000u)
  13654. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_588_CLR_MASK (0x00001000u)
  13655. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_588_CLR_SHIFT (0x0000000Cu)
  13656. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_588_CLR_RESETVAL (0x00000000u)
  13657. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_589_CLR_MASK (0x00002000u)
  13658. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_589_CLR_SHIFT (0x0000000Du)
  13659. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_589_CLR_RESETVAL (0x00000000u)
  13660. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_590_CLR_MASK (0x00004000u)
  13661. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_590_CLR_SHIFT (0x0000000Eu)
  13662. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_590_CLR_RESETVAL (0x00000000u)
  13663. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_591_CLR_MASK (0x00008000u)
  13664. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_591_CLR_SHIFT (0x0000000Fu)
  13665. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_591_CLR_RESETVAL (0x00000000u)
  13666. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_592_CLR_MASK (0x00010000u)
  13667. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_592_CLR_SHIFT (0x00000010u)
  13668. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_592_CLR_RESETVAL (0x00000000u)
  13669. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_593_CLR_MASK (0x00020000u)
  13670. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_593_CLR_SHIFT (0x00000011u)
  13671. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_593_CLR_RESETVAL (0x00000000u)
  13672. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_594_CLR_MASK (0x00040000u)
  13673. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_594_CLR_SHIFT (0x00000012u)
  13674. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_594_CLR_RESETVAL (0x00000000u)
  13675. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_595_CLR_MASK (0x00080000u)
  13676. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_595_CLR_SHIFT (0x00000013u)
  13677. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_595_CLR_RESETVAL (0x00000000u)
  13678. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_596_CLR_MASK (0x00100000u)
  13679. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_596_CLR_SHIFT (0x00000014u)
  13680. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_596_CLR_RESETVAL (0x00000000u)
  13681. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_597_CLR_MASK (0x00200000u)
  13682. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_597_CLR_SHIFT (0x00000015u)
  13683. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_597_CLR_RESETVAL (0x00000000u)
  13684. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_598_CLR_MASK (0x00400000u)
  13685. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_598_CLR_SHIFT (0x00000016u)
  13686. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_598_CLR_RESETVAL (0x00000000u)
  13687. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_599_CLR_MASK (0x00800000u)
  13688. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_599_CLR_SHIFT (0x00000017u)
  13689. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_599_CLR_RESETVAL (0x00000000u)
  13690. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_600_CLR_MASK (0x01000000u)
  13691. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_600_CLR_SHIFT (0x00000018u)
  13692. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_600_CLR_RESETVAL (0x00000000u)
  13693. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_601_CLR_MASK (0x02000000u)
  13694. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_601_CLR_SHIFT (0x00000019u)
  13695. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_601_CLR_RESETVAL (0x00000000u)
  13696. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_602_CLR_MASK (0x04000000u)
  13697. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_602_CLR_SHIFT (0x0000001Au)
  13698. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_602_CLR_RESETVAL (0x00000000u)
  13699. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_603_CLR_MASK (0x08000000u)
  13700. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_603_CLR_SHIFT (0x0000001Bu)
  13701. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_603_CLR_RESETVAL (0x00000000u)
  13702. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_604_CLR_MASK (0x10000000u)
  13703. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_604_CLR_SHIFT (0x0000001Cu)
  13704. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_604_CLR_RESETVAL (0x00000000u)
  13705. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_605_CLR_MASK (0x20000000u)
  13706. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_605_CLR_SHIFT (0x0000001Du)
  13707. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_605_CLR_RESETVAL (0x00000000u)
  13708. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_606_CLR_MASK (0x40000000u)
  13709. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_606_CLR_SHIFT (0x0000001Eu)
  13710. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_606_CLR_RESETVAL (0x00000000u)
  13711. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_607_CLR_MASK (0x80000000u)
  13712. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_607_CLR_SHIFT (0x0000001Fu)
  13713. #define CSL_CPINTC_ENABLE_CLR_REG18_ENABLE_607_CLR_RESETVAL (0x00000000u)
  13714. #define CSL_CPINTC_ENABLE_CLR_REG18_RESETVAL (0x00000000u)
  13715. /* enable_clr_reg19 */
  13716. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_608_CLR_MASK (0x00000001u)
  13717. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_608_CLR_SHIFT (0x00000000u)
  13718. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_608_CLR_RESETVAL (0x00000000u)
  13719. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_609_CLR_MASK (0x00000002u)
  13720. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_609_CLR_SHIFT (0x00000001u)
  13721. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_609_CLR_RESETVAL (0x00000000u)
  13722. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_610_CLR_MASK (0x00000004u)
  13723. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_610_CLR_SHIFT (0x00000002u)
  13724. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_610_CLR_RESETVAL (0x00000000u)
  13725. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_611_CLR_MASK (0x00000008u)
  13726. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_611_CLR_SHIFT (0x00000003u)
  13727. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_611_CLR_RESETVAL (0x00000000u)
  13728. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_612_CLR_MASK (0x00000010u)
  13729. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_612_CLR_SHIFT (0x00000004u)
  13730. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_612_CLR_RESETVAL (0x00000000u)
  13731. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_613_CLR_MASK (0x00000020u)
  13732. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_613_CLR_SHIFT (0x00000005u)
  13733. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_613_CLR_RESETVAL (0x00000000u)
  13734. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_614_CLR_MASK (0x00000040u)
  13735. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_614_CLR_SHIFT (0x00000006u)
  13736. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_614_CLR_RESETVAL (0x00000000u)
  13737. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_615_CLR_MASK (0x00000080u)
  13738. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_615_CLR_SHIFT (0x00000007u)
  13739. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_615_CLR_RESETVAL (0x00000000u)
  13740. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_616_CLR_MASK (0x00000100u)
  13741. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_616_CLR_SHIFT (0x00000008u)
  13742. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_616_CLR_RESETVAL (0x00000000u)
  13743. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_617_CLR_MASK (0x00000200u)
  13744. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_617_CLR_SHIFT (0x00000009u)
  13745. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_617_CLR_RESETVAL (0x00000000u)
  13746. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_618_CLR_MASK (0x00000400u)
  13747. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_618_CLR_SHIFT (0x0000000Au)
  13748. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_618_CLR_RESETVAL (0x00000000u)
  13749. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_619_CLR_MASK (0x00000800u)
  13750. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_619_CLR_SHIFT (0x0000000Bu)
  13751. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_619_CLR_RESETVAL (0x00000000u)
  13752. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_620_CLR_MASK (0x00001000u)
  13753. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_620_CLR_SHIFT (0x0000000Cu)
  13754. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_620_CLR_RESETVAL (0x00000000u)
  13755. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_621_CLR_MASK (0x00002000u)
  13756. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_621_CLR_SHIFT (0x0000000Du)
  13757. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_621_CLR_RESETVAL (0x00000000u)
  13758. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_622_CLR_MASK (0x00004000u)
  13759. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_622_CLR_SHIFT (0x0000000Eu)
  13760. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_622_CLR_RESETVAL (0x00000000u)
  13761. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_623_CLR_MASK (0x00008000u)
  13762. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_623_CLR_SHIFT (0x0000000Fu)
  13763. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_623_CLR_RESETVAL (0x00000000u)
  13764. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_624_CLR_MASK (0x00010000u)
  13765. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_624_CLR_SHIFT (0x00000010u)
  13766. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_624_CLR_RESETVAL (0x00000000u)
  13767. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_625_CLR_MASK (0x00020000u)
  13768. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_625_CLR_SHIFT (0x00000011u)
  13769. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_625_CLR_RESETVAL (0x00000000u)
  13770. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_626_CLR_MASK (0x00040000u)
  13771. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_626_CLR_SHIFT (0x00000012u)
  13772. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_626_CLR_RESETVAL (0x00000000u)
  13773. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_627_CLR_MASK (0x00080000u)
  13774. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_627_CLR_SHIFT (0x00000013u)
  13775. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_627_CLR_RESETVAL (0x00000000u)
  13776. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_628_CLR_MASK (0x00100000u)
  13777. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_628_CLR_SHIFT (0x00000014u)
  13778. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_628_CLR_RESETVAL (0x00000000u)
  13779. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_629_CLR_MASK (0x00200000u)
  13780. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_629_CLR_SHIFT (0x00000015u)
  13781. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_629_CLR_RESETVAL (0x00000000u)
  13782. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_630_CLR_MASK (0x00400000u)
  13783. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_630_CLR_SHIFT (0x00000016u)
  13784. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_630_CLR_RESETVAL (0x00000000u)
  13785. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_631_CLR_MASK (0x00800000u)
  13786. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_631_CLR_SHIFT (0x00000017u)
  13787. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_631_CLR_RESETVAL (0x00000000u)
  13788. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_632_CLR_MASK (0x01000000u)
  13789. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_632_CLR_SHIFT (0x00000018u)
  13790. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_632_CLR_RESETVAL (0x00000000u)
  13791. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_633_CLR_MASK (0x02000000u)
  13792. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_633_CLR_SHIFT (0x00000019u)
  13793. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_633_CLR_RESETVAL (0x00000000u)
  13794. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_634_CLR_MASK (0x04000000u)
  13795. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_634_CLR_SHIFT (0x0000001Au)
  13796. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_634_CLR_RESETVAL (0x00000000u)
  13797. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_635_CLR_MASK (0x08000000u)
  13798. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_635_CLR_SHIFT (0x0000001Bu)
  13799. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_635_CLR_RESETVAL (0x00000000u)
  13800. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_636_CLR_MASK (0x10000000u)
  13801. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_636_CLR_SHIFT (0x0000001Cu)
  13802. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_636_CLR_RESETVAL (0x00000000u)
  13803. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_637_CLR_MASK (0x20000000u)
  13804. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_637_CLR_SHIFT (0x0000001Du)
  13805. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_637_CLR_RESETVAL (0x00000000u)
  13806. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_638_CLR_MASK (0x40000000u)
  13807. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_638_CLR_SHIFT (0x0000001Eu)
  13808. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_638_CLR_RESETVAL (0x00000000u)
  13809. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_639_CLR_MASK (0x80000000u)
  13810. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_639_CLR_SHIFT (0x0000001Fu)
  13811. #define CSL_CPINTC_ENABLE_CLR_REG19_ENABLE_639_CLR_RESETVAL (0x00000000u)
  13812. #define CSL_CPINTC_ENABLE_CLR_REG19_RESETVAL (0x00000000u)
  13813. /* enable_clr_reg20 */
  13814. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_640_CLR_MASK (0x00000001u)
  13815. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_640_CLR_SHIFT (0x00000000u)
  13816. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_640_CLR_RESETVAL (0x00000000u)
  13817. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_641_CLR_MASK (0x00000002u)
  13818. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_641_CLR_SHIFT (0x00000001u)
  13819. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_641_CLR_RESETVAL (0x00000000u)
  13820. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_642_CLR_MASK (0x00000004u)
  13821. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_642_CLR_SHIFT (0x00000002u)
  13822. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_642_CLR_RESETVAL (0x00000000u)
  13823. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_643_CLR_MASK (0x00000008u)
  13824. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_643_CLR_SHIFT (0x00000003u)
  13825. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_643_CLR_RESETVAL (0x00000000u)
  13826. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_644_CLR_MASK (0x00000010u)
  13827. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_644_CLR_SHIFT (0x00000004u)
  13828. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_644_CLR_RESETVAL (0x00000000u)
  13829. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_645_CLR_MASK (0x00000020u)
  13830. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_645_CLR_SHIFT (0x00000005u)
  13831. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_645_CLR_RESETVAL (0x00000000u)
  13832. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_646_CLR_MASK (0x00000040u)
  13833. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_646_CLR_SHIFT (0x00000006u)
  13834. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_646_CLR_RESETVAL (0x00000000u)
  13835. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_647_CLR_MASK (0x00000080u)
  13836. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_647_CLR_SHIFT (0x00000007u)
  13837. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_647_CLR_RESETVAL (0x00000000u)
  13838. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_648_CLR_MASK (0x00000100u)
  13839. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_648_CLR_SHIFT (0x00000008u)
  13840. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_648_CLR_RESETVAL (0x00000000u)
  13841. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_649_CLR_MASK (0x00000200u)
  13842. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_649_CLR_SHIFT (0x00000009u)
  13843. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_649_CLR_RESETVAL (0x00000000u)
  13844. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_650_CLR_MASK (0x00000400u)
  13845. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_650_CLR_SHIFT (0x0000000Au)
  13846. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_650_CLR_RESETVAL (0x00000000u)
  13847. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_651_CLR_MASK (0x00000800u)
  13848. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_651_CLR_SHIFT (0x0000000Bu)
  13849. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_651_CLR_RESETVAL (0x00000000u)
  13850. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_652_CLR_MASK (0x00001000u)
  13851. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_652_CLR_SHIFT (0x0000000Cu)
  13852. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_652_CLR_RESETVAL (0x00000000u)
  13853. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_653_CLR_MASK (0x00002000u)
  13854. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_653_CLR_SHIFT (0x0000000Du)
  13855. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_653_CLR_RESETVAL (0x00000000u)
  13856. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_654_CLR_MASK (0x00004000u)
  13857. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_654_CLR_SHIFT (0x0000000Eu)
  13858. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_654_CLR_RESETVAL (0x00000000u)
  13859. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_655_CLR_MASK (0x00008000u)
  13860. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_655_CLR_SHIFT (0x0000000Fu)
  13861. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_655_CLR_RESETVAL (0x00000000u)
  13862. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_656_CLR_MASK (0x00010000u)
  13863. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_656_CLR_SHIFT (0x00000010u)
  13864. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_656_CLR_RESETVAL (0x00000000u)
  13865. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_657_CLR_MASK (0x00020000u)
  13866. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_657_CLR_SHIFT (0x00000011u)
  13867. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_657_CLR_RESETVAL (0x00000000u)
  13868. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_658_CLR_MASK (0x00040000u)
  13869. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_658_CLR_SHIFT (0x00000012u)
  13870. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_658_CLR_RESETVAL (0x00000000u)
  13871. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_659_CLR_MASK (0x00080000u)
  13872. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_659_CLR_SHIFT (0x00000013u)
  13873. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_659_CLR_RESETVAL (0x00000000u)
  13874. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_660_CLR_MASK (0x00100000u)
  13875. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_660_CLR_SHIFT (0x00000014u)
  13876. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_660_CLR_RESETVAL (0x00000000u)
  13877. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_661_CLR_MASK (0x00200000u)
  13878. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_661_CLR_SHIFT (0x00000015u)
  13879. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_661_CLR_RESETVAL (0x00000000u)
  13880. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_662_CLR_MASK (0x00400000u)
  13881. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_662_CLR_SHIFT (0x00000016u)
  13882. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_662_CLR_RESETVAL (0x00000000u)
  13883. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_663_CLR_MASK (0x00800000u)
  13884. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_663_CLR_SHIFT (0x00000017u)
  13885. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_663_CLR_RESETVAL (0x00000000u)
  13886. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_664_CLR_MASK (0x01000000u)
  13887. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_664_CLR_SHIFT (0x00000018u)
  13888. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_664_CLR_RESETVAL (0x00000000u)
  13889. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_665_CLR_MASK (0x02000000u)
  13890. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_665_CLR_SHIFT (0x00000019u)
  13891. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_665_CLR_RESETVAL (0x00000000u)
  13892. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_666_CLR_MASK (0x04000000u)
  13893. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_666_CLR_SHIFT (0x0000001Au)
  13894. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_666_CLR_RESETVAL (0x00000000u)
  13895. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_667_CLR_MASK (0x08000000u)
  13896. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_667_CLR_SHIFT (0x0000001Bu)
  13897. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_667_CLR_RESETVAL (0x00000000u)
  13898. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_668_CLR_MASK (0x10000000u)
  13899. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_668_CLR_SHIFT (0x0000001Cu)
  13900. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_668_CLR_RESETVAL (0x00000000u)
  13901. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_669_CLR_MASK (0x20000000u)
  13902. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_669_CLR_SHIFT (0x0000001Du)
  13903. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_669_CLR_RESETVAL (0x00000000u)
  13904. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_670_CLR_MASK (0x40000000u)
  13905. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_670_CLR_SHIFT (0x0000001Eu)
  13906. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_670_CLR_RESETVAL (0x00000000u)
  13907. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_671_CLR_MASK (0x80000000u)
  13908. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_671_CLR_SHIFT (0x0000001Fu)
  13909. #define CSL_CPINTC_ENABLE_CLR_REG20_ENABLE_671_CLR_RESETVAL (0x00000000u)
  13910. #define CSL_CPINTC_ENABLE_CLR_REG20_RESETVAL (0x00000000u)
  13911. /* enable_clr_reg21 */
  13912. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_672_CLR_MASK (0x00000001u)
  13913. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_672_CLR_SHIFT (0x00000000u)
  13914. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_672_CLR_RESETVAL (0x00000000u)
  13915. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_673_CLR_MASK (0x00000002u)
  13916. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_673_CLR_SHIFT (0x00000001u)
  13917. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_673_CLR_RESETVAL (0x00000000u)
  13918. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_674_CLR_MASK (0x00000004u)
  13919. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_674_CLR_SHIFT (0x00000002u)
  13920. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_674_CLR_RESETVAL (0x00000000u)
  13921. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_675_CLR_MASK (0x00000008u)
  13922. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_675_CLR_SHIFT (0x00000003u)
  13923. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_675_CLR_RESETVAL (0x00000000u)
  13924. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_676_CLR_MASK (0x00000010u)
  13925. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_676_CLR_SHIFT (0x00000004u)
  13926. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_676_CLR_RESETVAL (0x00000000u)
  13927. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_677_CLR_MASK (0x00000020u)
  13928. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_677_CLR_SHIFT (0x00000005u)
  13929. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_677_CLR_RESETVAL (0x00000000u)
  13930. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_678_CLR_MASK (0x00000040u)
  13931. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_678_CLR_SHIFT (0x00000006u)
  13932. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_678_CLR_RESETVAL (0x00000000u)
  13933. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_679_CLR_MASK (0x00000080u)
  13934. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_679_CLR_SHIFT (0x00000007u)
  13935. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_679_CLR_RESETVAL (0x00000000u)
  13936. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_680_CLR_MASK (0x00000100u)
  13937. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_680_CLR_SHIFT (0x00000008u)
  13938. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_680_CLR_RESETVAL (0x00000000u)
  13939. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_681_CLR_MASK (0x00000200u)
  13940. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_681_CLR_SHIFT (0x00000009u)
  13941. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_681_CLR_RESETVAL (0x00000000u)
  13942. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_682_CLR_MASK (0x00000400u)
  13943. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_682_CLR_SHIFT (0x0000000Au)
  13944. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_682_CLR_RESETVAL (0x00000000u)
  13945. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_683_CLR_MASK (0x00000800u)
  13946. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_683_CLR_SHIFT (0x0000000Bu)
  13947. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_683_CLR_RESETVAL (0x00000000u)
  13948. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_684_CLR_MASK (0x00001000u)
  13949. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_684_CLR_SHIFT (0x0000000Cu)
  13950. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_684_CLR_RESETVAL (0x00000000u)
  13951. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_685_CLR_MASK (0x00002000u)
  13952. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_685_CLR_SHIFT (0x0000000Du)
  13953. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_685_CLR_RESETVAL (0x00000000u)
  13954. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_686_CLR_MASK (0x00004000u)
  13955. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_686_CLR_SHIFT (0x0000000Eu)
  13956. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_686_CLR_RESETVAL (0x00000000u)
  13957. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_687_CLR_MASK (0x00008000u)
  13958. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_687_CLR_SHIFT (0x0000000Fu)
  13959. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_687_CLR_RESETVAL (0x00000000u)
  13960. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_688_CLR_MASK (0x00010000u)
  13961. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_688_CLR_SHIFT (0x00000010u)
  13962. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_688_CLR_RESETVAL (0x00000000u)
  13963. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_689_CLR_MASK (0x00020000u)
  13964. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_689_CLR_SHIFT (0x00000011u)
  13965. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_689_CLR_RESETVAL (0x00000000u)
  13966. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_690_CLR_MASK (0x00040000u)
  13967. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_690_CLR_SHIFT (0x00000012u)
  13968. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_690_CLR_RESETVAL (0x00000000u)
  13969. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_691_CLR_MASK (0x00080000u)
  13970. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_691_CLR_SHIFT (0x00000013u)
  13971. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_691_CLR_RESETVAL (0x00000000u)
  13972. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_692_CLR_MASK (0x00100000u)
  13973. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_692_CLR_SHIFT (0x00000014u)
  13974. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_692_CLR_RESETVAL (0x00000000u)
  13975. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_693_CLR_MASK (0x00200000u)
  13976. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_693_CLR_SHIFT (0x00000015u)
  13977. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_693_CLR_RESETVAL (0x00000000u)
  13978. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_694_CLR_MASK (0x00400000u)
  13979. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_694_CLR_SHIFT (0x00000016u)
  13980. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_694_CLR_RESETVAL (0x00000000u)
  13981. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_695_CLR_MASK (0x00800000u)
  13982. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_695_CLR_SHIFT (0x00000017u)
  13983. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_695_CLR_RESETVAL (0x00000000u)
  13984. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_696_CLR_MASK (0x01000000u)
  13985. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_696_CLR_SHIFT (0x00000018u)
  13986. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_696_CLR_RESETVAL (0x00000000u)
  13987. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_697_CLR_MASK (0x02000000u)
  13988. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_697_CLR_SHIFT (0x00000019u)
  13989. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_697_CLR_RESETVAL (0x00000000u)
  13990. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_698_CLR_MASK (0x04000000u)
  13991. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_698_CLR_SHIFT (0x0000001Au)
  13992. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_698_CLR_RESETVAL (0x00000000u)
  13993. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_699_CLR_MASK (0x08000000u)
  13994. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_699_CLR_SHIFT (0x0000001Bu)
  13995. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_699_CLR_RESETVAL (0x00000000u)
  13996. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_700_CLR_MASK (0x10000000u)
  13997. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_700_CLR_SHIFT (0x0000001Cu)
  13998. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_700_CLR_RESETVAL (0x00000000u)
  13999. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_701_CLR_MASK (0x20000000u)
  14000. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_701_CLR_SHIFT (0x0000001Du)
  14001. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_701_CLR_RESETVAL (0x00000000u)
  14002. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_702_CLR_MASK (0x40000000u)
  14003. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_702_CLR_SHIFT (0x0000001Eu)
  14004. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_702_CLR_RESETVAL (0x00000000u)
  14005. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_703_CLR_MASK (0x80000000u)
  14006. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_703_CLR_SHIFT (0x0000001Fu)
  14007. #define CSL_CPINTC_ENABLE_CLR_REG21_ENABLE_703_CLR_RESETVAL (0x00000000u)
  14008. #define CSL_CPINTC_ENABLE_CLR_REG21_RESETVAL (0x00000000u)
  14009. /* enable_clr_reg22 */
  14010. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_704_CLR_MASK (0x00000001u)
  14011. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_704_CLR_SHIFT (0x00000000u)
  14012. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_704_CLR_RESETVAL (0x00000000u)
  14013. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_705_CLR_MASK (0x00000002u)
  14014. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_705_CLR_SHIFT (0x00000001u)
  14015. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_705_CLR_RESETVAL (0x00000000u)
  14016. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_706_CLR_MASK (0x00000004u)
  14017. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_706_CLR_SHIFT (0x00000002u)
  14018. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_706_CLR_RESETVAL (0x00000000u)
  14019. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_707_CLR_MASK (0x00000008u)
  14020. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_707_CLR_SHIFT (0x00000003u)
  14021. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_707_CLR_RESETVAL (0x00000000u)
  14022. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_708_CLR_MASK (0x00000010u)
  14023. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_708_CLR_SHIFT (0x00000004u)
  14024. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_708_CLR_RESETVAL (0x00000000u)
  14025. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_709_CLR_MASK (0x00000020u)
  14026. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_709_CLR_SHIFT (0x00000005u)
  14027. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_709_CLR_RESETVAL (0x00000000u)
  14028. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_710_CLR_MASK (0x00000040u)
  14029. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_710_CLR_SHIFT (0x00000006u)
  14030. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_710_CLR_RESETVAL (0x00000000u)
  14031. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_711_CLR_MASK (0x00000080u)
  14032. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_711_CLR_SHIFT (0x00000007u)
  14033. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_711_CLR_RESETVAL (0x00000000u)
  14034. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_712_CLR_MASK (0x00000100u)
  14035. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_712_CLR_SHIFT (0x00000008u)
  14036. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_712_CLR_RESETVAL (0x00000000u)
  14037. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_713_CLR_MASK (0x00000200u)
  14038. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_713_CLR_SHIFT (0x00000009u)
  14039. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_713_CLR_RESETVAL (0x00000000u)
  14040. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_714_CLR_MASK (0x00000400u)
  14041. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_714_CLR_SHIFT (0x0000000Au)
  14042. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_714_CLR_RESETVAL (0x00000000u)
  14043. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_715_CLR_MASK (0x00000800u)
  14044. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_715_CLR_SHIFT (0x0000000Bu)
  14045. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_715_CLR_RESETVAL (0x00000000u)
  14046. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_716_CLR_MASK (0x00001000u)
  14047. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_716_CLR_SHIFT (0x0000000Cu)
  14048. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_716_CLR_RESETVAL (0x00000000u)
  14049. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_717_CLR_MASK (0x00002000u)
  14050. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_717_CLR_SHIFT (0x0000000Du)
  14051. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_717_CLR_RESETVAL (0x00000000u)
  14052. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_718_CLR_MASK (0x00004000u)
  14053. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_718_CLR_SHIFT (0x0000000Eu)
  14054. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_718_CLR_RESETVAL (0x00000000u)
  14055. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_719_CLR_MASK (0x00008000u)
  14056. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_719_CLR_SHIFT (0x0000000Fu)
  14057. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_719_CLR_RESETVAL (0x00000000u)
  14058. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_720_CLR_MASK (0x00010000u)
  14059. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_720_CLR_SHIFT (0x00000010u)
  14060. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_720_CLR_RESETVAL (0x00000000u)
  14061. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_721_CLR_MASK (0x00020000u)
  14062. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_721_CLR_SHIFT (0x00000011u)
  14063. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_721_CLR_RESETVAL (0x00000000u)
  14064. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_722_CLR_MASK (0x00040000u)
  14065. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_722_CLR_SHIFT (0x00000012u)
  14066. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_722_CLR_RESETVAL (0x00000000u)
  14067. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_723_CLR_MASK (0x00080000u)
  14068. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_723_CLR_SHIFT (0x00000013u)
  14069. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_723_CLR_RESETVAL (0x00000000u)
  14070. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_724_CLR_MASK (0x00100000u)
  14071. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_724_CLR_SHIFT (0x00000014u)
  14072. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_724_CLR_RESETVAL (0x00000000u)
  14073. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_725_CLR_MASK (0x00200000u)
  14074. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_725_CLR_SHIFT (0x00000015u)
  14075. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_725_CLR_RESETVAL (0x00000000u)
  14076. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_726_CLR_MASK (0x00400000u)
  14077. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_726_CLR_SHIFT (0x00000016u)
  14078. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_726_CLR_RESETVAL (0x00000000u)
  14079. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_727_CLR_MASK (0x00800000u)
  14080. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_727_CLR_SHIFT (0x00000017u)
  14081. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_727_CLR_RESETVAL (0x00000000u)
  14082. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_728_CLR_MASK (0x01000000u)
  14083. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_728_CLR_SHIFT (0x00000018u)
  14084. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_728_CLR_RESETVAL (0x00000000u)
  14085. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_729_CLR_MASK (0x02000000u)
  14086. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_729_CLR_SHIFT (0x00000019u)
  14087. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_729_CLR_RESETVAL (0x00000000u)
  14088. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_730_CLR_MASK (0x04000000u)
  14089. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_730_CLR_SHIFT (0x0000001Au)
  14090. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_730_CLR_RESETVAL (0x00000000u)
  14091. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_731_CLR_MASK (0x08000000u)
  14092. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_731_CLR_SHIFT (0x0000001Bu)
  14093. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_731_CLR_RESETVAL (0x00000000u)
  14094. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_732_CLR_MASK (0x10000000u)
  14095. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_732_CLR_SHIFT (0x0000001Cu)
  14096. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_732_CLR_RESETVAL (0x00000000u)
  14097. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_733_CLR_MASK (0x20000000u)
  14098. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_733_CLR_SHIFT (0x0000001Du)
  14099. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_733_CLR_RESETVAL (0x00000000u)
  14100. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_734_CLR_MASK (0x40000000u)
  14101. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_734_CLR_SHIFT (0x0000001Eu)
  14102. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_734_CLR_RESETVAL (0x00000000u)
  14103. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_735_CLR_MASK (0x80000000u)
  14104. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_735_CLR_SHIFT (0x0000001Fu)
  14105. #define CSL_CPINTC_ENABLE_CLR_REG22_ENABLE_735_CLR_RESETVAL (0x00000000u)
  14106. #define CSL_CPINTC_ENABLE_CLR_REG22_RESETVAL (0x00000000u)
  14107. /* enable_clr_reg23 */
  14108. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_736_CLR_MASK (0x00000001u)
  14109. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_736_CLR_SHIFT (0x00000000u)
  14110. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_736_CLR_RESETVAL (0x00000000u)
  14111. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_737_CLR_MASK (0x00000002u)
  14112. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_737_CLR_SHIFT (0x00000001u)
  14113. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_737_CLR_RESETVAL (0x00000000u)
  14114. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_738_CLR_MASK (0x00000004u)
  14115. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_738_CLR_SHIFT (0x00000002u)
  14116. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_738_CLR_RESETVAL (0x00000000u)
  14117. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_739_CLR_MASK (0x00000008u)
  14118. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_739_CLR_SHIFT (0x00000003u)
  14119. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_739_CLR_RESETVAL (0x00000000u)
  14120. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_740_CLR_MASK (0x00000010u)
  14121. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_740_CLR_SHIFT (0x00000004u)
  14122. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_740_CLR_RESETVAL (0x00000000u)
  14123. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_741_CLR_MASK (0x00000020u)
  14124. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_741_CLR_SHIFT (0x00000005u)
  14125. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_741_CLR_RESETVAL (0x00000000u)
  14126. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_742_CLR_MASK (0x00000040u)
  14127. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_742_CLR_SHIFT (0x00000006u)
  14128. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_742_CLR_RESETVAL (0x00000000u)
  14129. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_743_CLR_MASK (0x00000080u)
  14130. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_743_CLR_SHIFT (0x00000007u)
  14131. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_743_CLR_RESETVAL (0x00000000u)
  14132. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_744_CLR_MASK (0x00000100u)
  14133. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_744_CLR_SHIFT (0x00000008u)
  14134. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_744_CLR_RESETVAL (0x00000000u)
  14135. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_745_CLR_MASK (0x00000200u)
  14136. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_745_CLR_SHIFT (0x00000009u)
  14137. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_745_CLR_RESETVAL (0x00000000u)
  14138. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_746_CLR_MASK (0x00000400u)
  14139. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_746_CLR_SHIFT (0x0000000Au)
  14140. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_746_CLR_RESETVAL (0x00000000u)
  14141. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_747_CLR_MASK (0x00000800u)
  14142. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_747_CLR_SHIFT (0x0000000Bu)
  14143. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_747_CLR_RESETVAL (0x00000000u)
  14144. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_748_CLR_MASK (0x00001000u)
  14145. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_748_CLR_SHIFT (0x0000000Cu)
  14146. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_748_CLR_RESETVAL (0x00000000u)
  14147. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_749_CLR_MASK (0x00002000u)
  14148. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_749_CLR_SHIFT (0x0000000Du)
  14149. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_749_CLR_RESETVAL (0x00000000u)
  14150. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_750_CLR_MASK (0x00004000u)
  14151. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_750_CLR_SHIFT (0x0000000Eu)
  14152. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_750_CLR_RESETVAL (0x00000000u)
  14153. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_751_CLR_MASK (0x00008000u)
  14154. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_751_CLR_SHIFT (0x0000000Fu)
  14155. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_751_CLR_RESETVAL (0x00000000u)
  14156. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_752_CLR_MASK (0x00010000u)
  14157. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_752_CLR_SHIFT (0x00000010u)
  14158. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_752_CLR_RESETVAL (0x00000000u)
  14159. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_753_CLR_MASK (0x00020000u)
  14160. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_753_CLR_SHIFT (0x00000011u)
  14161. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_753_CLR_RESETVAL (0x00000000u)
  14162. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_754_CLR_MASK (0x00040000u)
  14163. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_754_CLR_SHIFT (0x00000012u)
  14164. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_754_CLR_RESETVAL (0x00000000u)
  14165. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_755_CLR_MASK (0x00080000u)
  14166. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_755_CLR_SHIFT (0x00000013u)
  14167. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_755_CLR_RESETVAL (0x00000000u)
  14168. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_756_CLR_MASK (0x00100000u)
  14169. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_756_CLR_SHIFT (0x00000014u)
  14170. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_756_CLR_RESETVAL (0x00000000u)
  14171. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_757_CLR_MASK (0x00200000u)
  14172. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_757_CLR_SHIFT (0x00000015u)
  14173. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_757_CLR_RESETVAL (0x00000000u)
  14174. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_758_CLR_MASK (0x00400000u)
  14175. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_758_CLR_SHIFT (0x00000016u)
  14176. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_758_CLR_RESETVAL (0x00000000u)
  14177. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_759_CLR_MASK (0x00800000u)
  14178. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_759_CLR_SHIFT (0x00000017u)
  14179. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_759_CLR_RESETVAL (0x00000000u)
  14180. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_760_CLR_MASK (0x01000000u)
  14181. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_760_CLR_SHIFT (0x00000018u)
  14182. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_760_CLR_RESETVAL (0x00000000u)
  14183. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_761_CLR_MASK (0x02000000u)
  14184. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_761_CLR_SHIFT (0x00000019u)
  14185. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_761_CLR_RESETVAL (0x00000000u)
  14186. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_762_CLR_MASK (0x04000000u)
  14187. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_762_CLR_SHIFT (0x0000001Au)
  14188. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_762_CLR_RESETVAL (0x00000000u)
  14189. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_763_CLR_MASK (0x08000000u)
  14190. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_763_CLR_SHIFT (0x0000001Bu)
  14191. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_763_CLR_RESETVAL (0x00000000u)
  14192. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_764_CLR_MASK (0x10000000u)
  14193. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_764_CLR_SHIFT (0x0000001Cu)
  14194. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_764_CLR_RESETVAL (0x00000000u)
  14195. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_765_CLR_MASK (0x20000000u)
  14196. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_765_CLR_SHIFT (0x0000001Du)
  14197. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_765_CLR_RESETVAL (0x00000000u)
  14198. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_766_CLR_MASK (0x40000000u)
  14199. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_766_CLR_SHIFT (0x0000001Eu)
  14200. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_766_CLR_RESETVAL (0x00000000u)
  14201. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_767_CLR_MASK (0x80000000u)
  14202. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_767_CLR_SHIFT (0x0000001Fu)
  14203. #define CSL_CPINTC_ENABLE_CLR_REG23_ENABLE_767_CLR_RESETVAL (0x00000000u)
  14204. #define CSL_CPINTC_ENABLE_CLR_REG23_RESETVAL (0x00000000u)
  14205. /* enable_clr_reg24 */
  14206. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_768_CLR_MASK (0x00000001u)
  14207. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_768_CLR_SHIFT (0x00000000u)
  14208. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_768_CLR_RESETVAL (0x00000000u)
  14209. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_769_CLR_MASK (0x00000002u)
  14210. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_769_CLR_SHIFT (0x00000001u)
  14211. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_769_CLR_RESETVAL (0x00000000u)
  14212. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_770_CLR_MASK (0x00000004u)
  14213. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_770_CLR_SHIFT (0x00000002u)
  14214. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_770_CLR_RESETVAL (0x00000000u)
  14215. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_771_CLR_MASK (0x00000008u)
  14216. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_771_CLR_SHIFT (0x00000003u)
  14217. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_771_CLR_RESETVAL (0x00000000u)
  14218. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_772_CLR_MASK (0x00000010u)
  14219. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_772_CLR_SHIFT (0x00000004u)
  14220. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_772_CLR_RESETVAL (0x00000000u)
  14221. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_773_CLR_MASK (0x00000020u)
  14222. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_773_CLR_SHIFT (0x00000005u)
  14223. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_773_CLR_RESETVAL (0x00000000u)
  14224. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_774_CLR_MASK (0x00000040u)
  14225. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_774_CLR_SHIFT (0x00000006u)
  14226. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_774_CLR_RESETVAL (0x00000000u)
  14227. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_775_CLR_MASK (0x00000080u)
  14228. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_775_CLR_SHIFT (0x00000007u)
  14229. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_775_CLR_RESETVAL (0x00000000u)
  14230. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_776_CLR_MASK (0x00000100u)
  14231. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_776_CLR_SHIFT (0x00000008u)
  14232. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_776_CLR_RESETVAL (0x00000000u)
  14233. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_777_CLR_MASK (0x00000200u)
  14234. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_777_CLR_SHIFT (0x00000009u)
  14235. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_777_CLR_RESETVAL (0x00000000u)
  14236. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_778_CLR_MASK (0x00000400u)
  14237. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_778_CLR_SHIFT (0x0000000Au)
  14238. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_778_CLR_RESETVAL (0x00000000u)
  14239. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_779_CLR_MASK (0x00000800u)
  14240. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_779_CLR_SHIFT (0x0000000Bu)
  14241. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_779_CLR_RESETVAL (0x00000000u)
  14242. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_780_CLR_MASK (0x00001000u)
  14243. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_780_CLR_SHIFT (0x0000000Cu)
  14244. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_780_CLR_RESETVAL (0x00000000u)
  14245. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_781_CLR_MASK (0x00002000u)
  14246. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_781_CLR_SHIFT (0x0000000Du)
  14247. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_781_CLR_RESETVAL (0x00000000u)
  14248. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_782_CLR_MASK (0x00004000u)
  14249. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_782_CLR_SHIFT (0x0000000Eu)
  14250. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_782_CLR_RESETVAL (0x00000000u)
  14251. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_783_CLR_MASK (0x00008000u)
  14252. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_783_CLR_SHIFT (0x0000000Fu)
  14253. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_783_CLR_RESETVAL (0x00000000u)
  14254. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_784_CLR_MASK (0x00010000u)
  14255. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_784_CLR_SHIFT (0x00000010u)
  14256. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_784_CLR_RESETVAL (0x00000000u)
  14257. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_785_CLR_MASK (0x00020000u)
  14258. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_785_CLR_SHIFT (0x00000011u)
  14259. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_785_CLR_RESETVAL (0x00000000u)
  14260. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_786_CLR_MASK (0x00040000u)
  14261. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_786_CLR_SHIFT (0x00000012u)
  14262. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_786_CLR_RESETVAL (0x00000000u)
  14263. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_787_CLR_MASK (0x00080000u)
  14264. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_787_CLR_SHIFT (0x00000013u)
  14265. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_787_CLR_RESETVAL (0x00000000u)
  14266. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_788_CLR_MASK (0x00100000u)
  14267. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_788_CLR_SHIFT (0x00000014u)
  14268. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_788_CLR_RESETVAL (0x00000000u)
  14269. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_789_CLR_MASK (0x00200000u)
  14270. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_789_CLR_SHIFT (0x00000015u)
  14271. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_789_CLR_RESETVAL (0x00000000u)
  14272. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_790_CLR_MASK (0x00400000u)
  14273. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_790_CLR_SHIFT (0x00000016u)
  14274. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_790_CLR_RESETVAL (0x00000000u)
  14275. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_791_CLR_MASK (0x00800000u)
  14276. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_791_CLR_SHIFT (0x00000017u)
  14277. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_791_CLR_RESETVAL (0x00000000u)
  14278. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_792_CLR_MASK (0x01000000u)
  14279. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_792_CLR_SHIFT (0x00000018u)
  14280. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_792_CLR_RESETVAL (0x00000000u)
  14281. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_793_CLR_MASK (0x02000000u)
  14282. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_793_CLR_SHIFT (0x00000019u)
  14283. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_793_CLR_RESETVAL (0x00000000u)
  14284. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_794_CLR_MASK (0x04000000u)
  14285. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_794_CLR_SHIFT (0x0000001Au)
  14286. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_794_CLR_RESETVAL (0x00000000u)
  14287. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_795_CLR_MASK (0x08000000u)
  14288. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_795_CLR_SHIFT (0x0000001Bu)
  14289. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_795_CLR_RESETVAL (0x00000000u)
  14290. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_796_CLR_MASK (0x10000000u)
  14291. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_796_CLR_SHIFT (0x0000001Cu)
  14292. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_796_CLR_RESETVAL (0x00000000u)
  14293. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_797_CLR_MASK (0x20000000u)
  14294. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_797_CLR_SHIFT (0x0000001Du)
  14295. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_797_CLR_RESETVAL (0x00000000u)
  14296. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_798_CLR_MASK (0x40000000u)
  14297. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_798_CLR_SHIFT (0x0000001Eu)
  14298. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_798_CLR_RESETVAL (0x00000000u)
  14299. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_799_CLR_MASK (0x80000000u)
  14300. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_799_CLR_SHIFT (0x0000001Fu)
  14301. #define CSL_CPINTC_ENABLE_CLR_REG24_ENABLE_799_CLR_RESETVAL (0x00000000u)
  14302. #define CSL_CPINTC_ENABLE_CLR_REG24_RESETVAL (0x00000000u)
  14303. /* enable_clr_reg25 */
  14304. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_800_CLR_MASK (0x00000001u)
  14305. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_800_CLR_SHIFT (0x00000000u)
  14306. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_800_CLR_RESETVAL (0x00000000u)
  14307. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_801_CLR_MASK (0x00000002u)
  14308. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_801_CLR_SHIFT (0x00000001u)
  14309. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_801_CLR_RESETVAL (0x00000000u)
  14310. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_802_CLR_MASK (0x00000004u)
  14311. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_802_CLR_SHIFT (0x00000002u)
  14312. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_802_CLR_RESETVAL (0x00000000u)
  14313. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_803_CLR_MASK (0x00000008u)
  14314. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_803_CLR_SHIFT (0x00000003u)
  14315. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_803_CLR_RESETVAL (0x00000000u)
  14316. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_804_CLR_MASK (0x00000010u)
  14317. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_804_CLR_SHIFT (0x00000004u)
  14318. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_804_CLR_RESETVAL (0x00000000u)
  14319. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_805_CLR_MASK (0x00000020u)
  14320. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_805_CLR_SHIFT (0x00000005u)
  14321. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_805_CLR_RESETVAL (0x00000000u)
  14322. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_806_CLR_MASK (0x00000040u)
  14323. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_806_CLR_SHIFT (0x00000006u)
  14324. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_806_CLR_RESETVAL (0x00000000u)
  14325. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_807_CLR_MASK (0x00000080u)
  14326. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_807_CLR_SHIFT (0x00000007u)
  14327. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_807_CLR_RESETVAL (0x00000000u)
  14328. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_808_CLR_MASK (0x00000100u)
  14329. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_808_CLR_SHIFT (0x00000008u)
  14330. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_808_CLR_RESETVAL (0x00000000u)
  14331. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_809_CLR_MASK (0x00000200u)
  14332. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_809_CLR_SHIFT (0x00000009u)
  14333. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_809_CLR_RESETVAL (0x00000000u)
  14334. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_810_CLR_MASK (0x00000400u)
  14335. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_810_CLR_SHIFT (0x0000000Au)
  14336. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_810_CLR_RESETVAL (0x00000000u)
  14337. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_811_CLR_MASK (0x00000800u)
  14338. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_811_CLR_SHIFT (0x0000000Bu)
  14339. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_811_CLR_RESETVAL (0x00000000u)
  14340. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_812_CLR_MASK (0x00001000u)
  14341. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_812_CLR_SHIFT (0x0000000Cu)
  14342. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_812_CLR_RESETVAL (0x00000000u)
  14343. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_813_CLR_MASK (0x00002000u)
  14344. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_813_CLR_SHIFT (0x0000000Du)
  14345. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_813_CLR_RESETVAL (0x00000000u)
  14346. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_814_CLR_MASK (0x00004000u)
  14347. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_814_CLR_SHIFT (0x0000000Eu)
  14348. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_814_CLR_RESETVAL (0x00000000u)
  14349. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_815_CLR_MASK (0x00008000u)
  14350. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_815_CLR_SHIFT (0x0000000Fu)
  14351. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_815_CLR_RESETVAL (0x00000000u)
  14352. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_816_CLR_MASK (0x00010000u)
  14353. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_816_CLR_SHIFT (0x00000010u)
  14354. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_816_CLR_RESETVAL (0x00000000u)
  14355. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_817_CLR_MASK (0x00020000u)
  14356. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_817_CLR_SHIFT (0x00000011u)
  14357. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_817_CLR_RESETVAL (0x00000000u)
  14358. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_818_CLR_MASK (0x00040000u)
  14359. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_818_CLR_SHIFT (0x00000012u)
  14360. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_818_CLR_RESETVAL (0x00000000u)
  14361. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_819_CLR_MASK (0x00080000u)
  14362. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_819_CLR_SHIFT (0x00000013u)
  14363. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_819_CLR_RESETVAL (0x00000000u)
  14364. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_820_CLR_MASK (0x00100000u)
  14365. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_820_CLR_SHIFT (0x00000014u)
  14366. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_820_CLR_RESETVAL (0x00000000u)
  14367. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_821_CLR_MASK (0x00200000u)
  14368. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_821_CLR_SHIFT (0x00000015u)
  14369. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_821_CLR_RESETVAL (0x00000000u)
  14370. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_822_CLR_MASK (0x00400000u)
  14371. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_822_CLR_SHIFT (0x00000016u)
  14372. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_822_CLR_RESETVAL (0x00000000u)
  14373. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_823_CLR_MASK (0x00800000u)
  14374. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_823_CLR_SHIFT (0x00000017u)
  14375. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_823_CLR_RESETVAL (0x00000000u)
  14376. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_824_CLR_MASK (0x01000000u)
  14377. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_824_CLR_SHIFT (0x00000018u)
  14378. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_824_CLR_RESETVAL (0x00000000u)
  14379. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_825_CLR_MASK (0x02000000u)
  14380. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_825_CLR_SHIFT (0x00000019u)
  14381. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_825_CLR_RESETVAL (0x00000000u)
  14382. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_826_CLR_MASK (0x04000000u)
  14383. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_826_CLR_SHIFT (0x0000001Au)
  14384. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_826_CLR_RESETVAL (0x00000000u)
  14385. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_827_CLR_MASK (0x08000000u)
  14386. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_827_CLR_SHIFT (0x0000001Bu)
  14387. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_827_CLR_RESETVAL (0x00000000u)
  14388. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_828_CLR_MASK (0x10000000u)
  14389. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_828_CLR_SHIFT (0x0000001Cu)
  14390. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_828_CLR_RESETVAL (0x00000000u)
  14391. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_829_CLR_MASK (0x20000000u)
  14392. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_829_CLR_SHIFT (0x0000001Du)
  14393. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_829_CLR_RESETVAL (0x00000000u)
  14394. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_830_CLR_MASK (0x40000000u)
  14395. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_830_CLR_SHIFT (0x0000001Eu)
  14396. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_830_CLR_RESETVAL (0x00000000u)
  14397. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_831_CLR_MASK (0x80000000u)
  14398. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_831_CLR_SHIFT (0x0000001Fu)
  14399. #define CSL_CPINTC_ENABLE_CLR_REG25_ENABLE_831_CLR_RESETVAL (0x00000000u)
  14400. #define CSL_CPINTC_ENABLE_CLR_REG25_RESETVAL (0x00000000u)
  14401. /* enable_clr_reg26 */
  14402. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_832_CLR_MASK (0x00000001u)
  14403. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_832_CLR_SHIFT (0x00000000u)
  14404. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_832_CLR_RESETVAL (0x00000000u)
  14405. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_833_CLR_MASK (0x00000002u)
  14406. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_833_CLR_SHIFT (0x00000001u)
  14407. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_833_CLR_RESETVAL (0x00000000u)
  14408. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_834_CLR_MASK (0x00000004u)
  14409. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_834_CLR_SHIFT (0x00000002u)
  14410. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_834_CLR_RESETVAL (0x00000000u)
  14411. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_835_CLR_MASK (0x00000008u)
  14412. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_835_CLR_SHIFT (0x00000003u)
  14413. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_835_CLR_RESETVAL (0x00000000u)
  14414. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_836_CLR_MASK (0x00000010u)
  14415. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_836_CLR_SHIFT (0x00000004u)
  14416. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_836_CLR_RESETVAL (0x00000000u)
  14417. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_837_CLR_MASK (0x00000020u)
  14418. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_837_CLR_SHIFT (0x00000005u)
  14419. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_837_CLR_RESETVAL (0x00000000u)
  14420. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_838_CLR_MASK (0x00000040u)
  14421. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_838_CLR_SHIFT (0x00000006u)
  14422. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_838_CLR_RESETVAL (0x00000000u)
  14423. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_839_CLR_MASK (0x00000080u)
  14424. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_839_CLR_SHIFT (0x00000007u)
  14425. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_839_CLR_RESETVAL (0x00000000u)
  14426. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_840_CLR_MASK (0x00000100u)
  14427. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_840_CLR_SHIFT (0x00000008u)
  14428. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_840_CLR_RESETVAL (0x00000000u)
  14429. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_841_CLR_MASK (0x00000200u)
  14430. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_841_CLR_SHIFT (0x00000009u)
  14431. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_841_CLR_RESETVAL (0x00000000u)
  14432. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_842_CLR_MASK (0x00000400u)
  14433. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_842_CLR_SHIFT (0x0000000Au)
  14434. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_842_CLR_RESETVAL (0x00000000u)
  14435. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_843_CLR_MASK (0x00000800u)
  14436. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_843_CLR_SHIFT (0x0000000Bu)
  14437. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_843_CLR_RESETVAL (0x00000000u)
  14438. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_844_CLR_MASK (0x00001000u)
  14439. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_844_CLR_SHIFT (0x0000000Cu)
  14440. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_844_CLR_RESETVAL (0x00000000u)
  14441. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_845_CLR_MASK (0x00002000u)
  14442. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_845_CLR_SHIFT (0x0000000Du)
  14443. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_845_CLR_RESETVAL (0x00000000u)
  14444. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_846_CLR_MASK (0x00004000u)
  14445. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_846_CLR_SHIFT (0x0000000Eu)
  14446. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_846_CLR_RESETVAL (0x00000000u)
  14447. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_847_CLR_MASK (0x00008000u)
  14448. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_847_CLR_SHIFT (0x0000000Fu)
  14449. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_847_CLR_RESETVAL (0x00000000u)
  14450. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_848_CLR_MASK (0x00010000u)
  14451. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_848_CLR_SHIFT (0x00000010u)
  14452. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_848_CLR_RESETVAL (0x00000000u)
  14453. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_849_CLR_MASK (0x00020000u)
  14454. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_849_CLR_SHIFT (0x00000011u)
  14455. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_849_CLR_RESETVAL (0x00000000u)
  14456. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_850_CLR_MASK (0x00040000u)
  14457. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_850_CLR_SHIFT (0x00000012u)
  14458. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_850_CLR_RESETVAL (0x00000000u)
  14459. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_851_CLR_MASK (0x00080000u)
  14460. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_851_CLR_SHIFT (0x00000013u)
  14461. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_851_CLR_RESETVAL (0x00000000u)
  14462. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_852_CLR_MASK (0x00100000u)
  14463. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_852_CLR_SHIFT (0x00000014u)
  14464. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_852_CLR_RESETVAL (0x00000000u)
  14465. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_853_CLR_MASK (0x00200000u)
  14466. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_853_CLR_SHIFT (0x00000015u)
  14467. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_853_CLR_RESETVAL (0x00000000u)
  14468. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_854_CLR_MASK (0x00400000u)
  14469. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_854_CLR_SHIFT (0x00000016u)
  14470. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_854_CLR_RESETVAL (0x00000000u)
  14471. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_855_CLR_MASK (0x00800000u)
  14472. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_855_CLR_SHIFT (0x00000017u)
  14473. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_855_CLR_RESETVAL (0x00000000u)
  14474. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_856_CLR_MASK (0x01000000u)
  14475. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_856_CLR_SHIFT (0x00000018u)
  14476. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_856_CLR_RESETVAL (0x00000000u)
  14477. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_857_CLR_MASK (0x02000000u)
  14478. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_857_CLR_SHIFT (0x00000019u)
  14479. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_857_CLR_RESETVAL (0x00000000u)
  14480. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_858_CLR_MASK (0x04000000u)
  14481. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_858_CLR_SHIFT (0x0000001Au)
  14482. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_858_CLR_RESETVAL (0x00000000u)
  14483. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_859_CLR_MASK (0x08000000u)
  14484. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_859_CLR_SHIFT (0x0000001Bu)
  14485. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_859_CLR_RESETVAL (0x00000000u)
  14486. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_860_CLR_MASK (0x10000000u)
  14487. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_860_CLR_SHIFT (0x0000001Cu)
  14488. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_860_CLR_RESETVAL (0x00000000u)
  14489. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_861_CLR_MASK (0x20000000u)
  14490. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_861_CLR_SHIFT (0x0000001Du)
  14491. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_861_CLR_RESETVAL (0x00000000u)
  14492. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_862_CLR_MASK (0x40000000u)
  14493. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_862_CLR_SHIFT (0x0000001Eu)
  14494. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_862_CLR_RESETVAL (0x00000000u)
  14495. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_863_CLR_MASK (0x80000000u)
  14496. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_863_CLR_SHIFT (0x0000001Fu)
  14497. #define CSL_CPINTC_ENABLE_CLR_REG26_ENABLE_863_CLR_RESETVAL (0x00000000u)
  14498. #define CSL_CPINTC_ENABLE_CLR_REG26_RESETVAL (0x00000000u)
  14499. /* enable_clr_reg27 */
  14500. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_864_CLR_MASK (0x00000001u)
  14501. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_864_CLR_SHIFT (0x00000000u)
  14502. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_864_CLR_RESETVAL (0x00000000u)
  14503. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_865_CLR_MASK (0x00000002u)
  14504. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_865_CLR_SHIFT (0x00000001u)
  14505. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_865_CLR_RESETVAL (0x00000000u)
  14506. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_866_CLR_MASK (0x00000004u)
  14507. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_866_CLR_SHIFT (0x00000002u)
  14508. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_866_CLR_RESETVAL (0x00000000u)
  14509. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_867_CLR_MASK (0x00000008u)
  14510. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_867_CLR_SHIFT (0x00000003u)
  14511. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_867_CLR_RESETVAL (0x00000000u)
  14512. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_868_CLR_MASK (0x00000010u)
  14513. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_868_CLR_SHIFT (0x00000004u)
  14514. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_868_CLR_RESETVAL (0x00000000u)
  14515. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_869_CLR_MASK (0x00000020u)
  14516. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_869_CLR_SHIFT (0x00000005u)
  14517. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_869_CLR_RESETVAL (0x00000000u)
  14518. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_870_CLR_MASK (0x00000040u)
  14519. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_870_CLR_SHIFT (0x00000006u)
  14520. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_870_CLR_RESETVAL (0x00000000u)
  14521. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_871_CLR_MASK (0x00000080u)
  14522. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_871_CLR_SHIFT (0x00000007u)
  14523. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_871_CLR_RESETVAL (0x00000000u)
  14524. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_872_CLR_MASK (0x00000100u)
  14525. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_872_CLR_SHIFT (0x00000008u)
  14526. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_872_CLR_RESETVAL (0x00000000u)
  14527. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_873_CLR_MASK (0x00000200u)
  14528. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_873_CLR_SHIFT (0x00000009u)
  14529. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_873_CLR_RESETVAL (0x00000000u)
  14530. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_874_CLR_MASK (0x00000400u)
  14531. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_874_CLR_SHIFT (0x0000000Au)
  14532. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_874_CLR_RESETVAL (0x00000000u)
  14533. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_875_CLR_MASK (0x00000800u)
  14534. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_875_CLR_SHIFT (0x0000000Bu)
  14535. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_875_CLR_RESETVAL (0x00000000u)
  14536. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_876_CLR_MASK (0x00001000u)
  14537. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_876_CLR_SHIFT (0x0000000Cu)
  14538. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_876_CLR_RESETVAL (0x00000000u)
  14539. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_877_CLR_MASK (0x00002000u)
  14540. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_877_CLR_SHIFT (0x0000000Du)
  14541. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_877_CLR_RESETVAL (0x00000000u)
  14542. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_878_CLR_MASK (0x00004000u)
  14543. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_878_CLR_SHIFT (0x0000000Eu)
  14544. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_878_CLR_RESETVAL (0x00000000u)
  14545. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_879_CLR_MASK (0x00008000u)
  14546. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_879_CLR_SHIFT (0x0000000Fu)
  14547. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_879_CLR_RESETVAL (0x00000000u)
  14548. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_880_CLR_MASK (0x00010000u)
  14549. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_880_CLR_SHIFT (0x00000010u)
  14550. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_880_CLR_RESETVAL (0x00000000u)
  14551. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_881_CLR_MASK (0x00020000u)
  14552. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_881_CLR_SHIFT (0x00000011u)
  14553. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_881_CLR_RESETVAL (0x00000000u)
  14554. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_882_CLR_MASK (0x00040000u)
  14555. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_882_CLR_SHIFT (0x00000012u)
  14556. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_882_CLR_RESETVAL (0x00000000u)
  14557. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_883_CLR_MASK (0x00080000u)
  14558. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_883_CLR_SHIFT (0x00000013u)
  14559. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_883_CLR_RESETVAL (0x00000000u)
  14560. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_884_CLR_MASK (0x00100000u)
  14561. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_884_CLR_SHIFT (0x00000014u)
  14562. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_884_CLR_RESETVAL (0x00000000u)
  14563. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_885_CLR_MASK (0x00200000u)
  14564. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_885_CLR_SHIFT (0x00000015u)
  14565. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_885_CLR_RESETVAL (0x00000000u)
  14566. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_886_CLR_MASK (0x00400000u)
  14567. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_886_CLR_SHIFT (0x00000016u)
  14568. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_886_CLR_RESETVAL (0x00000000u)
  14569. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_887_CLR_MASK (0x00800000u)
  14570. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_887_CLR_SHIFT (0x00000017u)
  14571. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_887_CLR_RESETVAL (0x00000000u)
  14572. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_888_CLR_MASK (0x01000000u)
  14573. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_888_CLR_SHIFT (0x00000018u)
  14574. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_888_CLR_RESETVAL (0x00000000u)
  14575. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_889_CLR_MASK (0x02000000u)
  14576. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_889_CLR_SHIFT (0x00000019u)
  14577. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_889_CLR_RESETVAL (0x00000000u)
  14578. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_890_CLR_MASK (0x04000000u)
  14579. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_890_CLR_SHIFT (0x0000001Au)
  14580. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_890_CLR_RESETVAL (0x00000000u)
  14581. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_891_CLR_MASK (0x08000000u)
  14582. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_891_CLR_SHIFT (0x0000001Bu)
  14583. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_891_CLR_RESETVAL (0x00000000u)
  14584. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_892_CLR_MASK (0x10000000u)
  14585. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_892_CLR_SHIFT (0x0000001Cu)
  14586. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_892_CLR_RESETVAL (0x00000000u)
  14587. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_893_CLR_MASK (0x20000000u)
  14588. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_893_CLR_SHIFT (0x0000001Du)
  14589. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_893_CLR_RESETVAL (0x00000000u)
  14590. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_894_CLR_MASK (0x40000000u)
  14591. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_894_CLR_SHIFT (0x0000001Eu)
  14592. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_894_CLR_RESETVAL (0x00000000u)
  14593. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_895_CLR_MASK (0x80000000u)
  14594. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_895_CLR_SHIFT (0x0000001Fu)
  14595. #define CSL_CPINTC_ENABLE_CLR_REG27_ENABLE_895_CLR_RESETVAL (0x00000000u)
  14596. #define CSL_CPINTC_ENABLE_CLR_REG27_RESETVAL (0x00000000u)
  14597. /* enable_clr_reg28 */
  14598. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_896_CLR_MASK (0x00000001u)
  14599. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_896_CLR_SHIFT (0x00000000u)
  14600. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_896_CLR_RESETVAL (0x00000000u)
  14601. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_897_CLR_MASK (0x00000002u)
  14602. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_897_CLR_SHIFT (0x00000001u)
  14603. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_897_CLR_RESETVAL (0x00000000u)
  14604. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_898_CLR_MASK (0x00000004u)
  14605. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_898_CLR_SHIFT (0x00000002u)
  14606. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_898_CLR_RESETVAL (0x00000000u)
  14607. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_899_CLR_MASK (0x00000008u)
  14608. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_899_CLR_SHIFT (0x00000003u)
  14609. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_899_CLR_RESETVAL (0x00000000u)
  14610. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_900_CLR_MASK (0x00000010u)
  14611. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_900_CLR_SHIFT (0x00000004u)
  14612. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_900_CLR_RESETVAL (0x00000000u)
  14613. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_901_CLR_MASK (0x00000020u)
  14614. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_901_CLR_SHIFT (0x00000005u)
  14615. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_901_CLR_RESETVAL (0x00000000u)
  14616. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_902_CLR_MASK (0x00000040u)
  14617. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_902_CLR_SHIFT (0x00000006u)
  14618. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_902_CLR_RESETVAL (0x00000000u)
  14619. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_903_CLR_MASK (0x00000080u)
  14620. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_903_CLR_SHIFT (0x00000007u)
  14621. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_903_CLR_RESETVAL (0x00000000u)
  14622. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_904_CLR_MASK (0x00000100u)
  14623. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_904_CLR_SHIFT (0x00000008u)
  14624. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_904_CLR_RESETVAL (0x00000000u)
  14625. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_905_CLR_MASK (0x00000200u)
  14626. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_905_CLR_SHIFT (0x00000009u)
  14627. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_905_CLR_RESETVAL (0x00000000u)
  14628. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_906_CLR_MASK (0x00000400u)
  14629. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_906_CLR_SHIFT (0x0000000Au)
  14630. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_906_CLR_RESETVAL (0x00000000u)
  14631. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_907_CLR_MASK (0x00000800u)
  14632. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_907_CLR_SHIFT (0x0000000Bu)
  14633. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_907_CLR_RESETVAL (0x00000000u)
  14634. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_908_CLR_MASK (0x00001000u)
  14635. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_908_CLR_SHIFT (0x0000000Cu)
  14636. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_908_CLR_RESETVAL (0x00000000u)
  14637. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_909_CLR_MASK (0x00002000u)
  14638. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_909_CLR_SHIFT (0x0000000Du)
  14639. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_909_CLR_RESETVAL (0x00000000u)
  14640. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_910_CLR_MASK (0x00004000u)
  14641. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_910_CLR_SHIFT (0x0000000Eu)
  14642. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_910_CLR_RESETVAL (0x00000000u)
  14643. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_911_CLR_MASK (0x00008000u)
  14644. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_911_CLR_SHIFT (0x0000000Fu)
  14645. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_911_CLR_RESETVAL (0x00000000u)
  14646. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_912_CLR_MASK (0x00010000u)
  14647. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_912_CLR_SHIFT (0x00000010u)
  14648. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_912_CLR_RESETVAL (0x00000000u)
  14649. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_913_CLR_MASK (0x00020000u)
  14650. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_913_CLR_SHIFT (0x00000011u)
  14651. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_913_CLR_RESETVAL (0x00000000u)
  14652. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_914_CLR_MASK (0x00040000u)
  14653. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_914_CLR_SHIFT (0x00000012u)
  14654. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_914_CLR_RESETVAL (0x00000000u)
  14655. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_915_CLR_MASK (0x00080000u)
  14656. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_915_CLR_SHIFT (0x00000013u)
  14657. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_915_CLR_RESETVAL (0x00000000u)
  14658. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_916_CLR_MASK (0x00100000u)
  14659. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_916_CLR_SHIFT (0x00000014u)
  14660. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_916_CLR_RESETVAL (0x00000000u)
  14661. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_917_CLR_MASK (0x00200000u)
  14662. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_917_CLR_SHIFT (0x00000015u)
  14663. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_917_CLR_RESETVAL (0x00000000u)
  14664. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_918_CLR_MASK (0x00400000u)
  14665. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_918_CLR_SHIFT (0x00000016u)
  14666. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_918_CLR_RESETVAL (0x00000000u)
  14667. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_919_CLR_MASK (0x00800000u)
  14668. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_919_CLR_SHIFT (0x00000017u)
  14669. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_919_CLR_RESETVAL (0x00000000u)
  14670. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_920_CLR_MASK (0x01000000u)
  14671. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_920_CLR_SHIFT (0x00000018u)
  14672. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_920_CLR_RESETVAL (0x00000000u)
  14673. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_921_CLR_MASK (0x02000000u)
  14674. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_921_CLR_SHIFT (0x00000019u)
  14675. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_921_CLR_RESETVAL (0x00000000u)
  14676. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_922_CLR_MASK (0x04000000u)
  14677. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_922_CLR_SHIFT (0x0000001Au)
  14678. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_922_CLR_RESETVAL (0x00000000u)
  14679. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_923_CLR_MASK (0x08000000u)
  14680. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_923_CLR_SHIFT (0x0000001Bu)
  14681. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_923_CLR_RESETVAL (0x00000000u)
  14682. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_924_CLR_MASK (0x10000000u)
  14683. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_924_CLR_SHIFT (0x0000001Cu)
  14684. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_924_CLR_RESETVAL (0x00000000u)
  14685. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_925_CLR_MASK (0x20000000u)
  14686. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_925_CLR_SHIFT (0x0000001Du)
  14687. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_925_CLR_RESETVAL (0x00000000u)
  14688. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_926_CLR_MASK (0x40000000u)
  14689. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_926_CLR_SHIFT (0x0000001Eu)
  14690. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_926_CLR_RESETVAL (0x00000000u)
  14691. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_927_CLR_MASK (0x80000000u)
  14692. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_927_CLR_SHIFT (0x0000001Fu)
  14693. #define CSL_CPINTC_ENABLE_CLR_REG28_ENABLE_927_CLR_RESETVAL (0x00000000u)
  14694. #define CSL_CPINTC_ENABLE_CLR_REG28_RESETVAL (0x00000000u)
  14695. /* enable_clr_reg29 */
  14696. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_928_CLR_MASK (0x00000001u)
  14697. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_928_CLR_SHIFT (0x00000000u)
  14698. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_928_CLR_RESETVAL (0x00000000u)
  14699. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_929_CLR_MASK (0x00000002u)
  14700. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_929_CLR_SHIFT (0x00000001u)
  14701. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_929_CLR_RESETVAL (0x00000000u)
  14702. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_930_CLR_MASK (0x00000004u)
  14703. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_930_CLR_SHIFT (0x00000002u)
  14704. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_930_CLR_RESETVAL (0x00000000u)
  14705. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_931_CLR_MASK (0x00000008u)
  14706. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_931_CLR_SHIFT (0x00000003u)
  14707. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_931_CLR_RESETVAL (0x00000000u)
  14708. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_932_CLR_MASK (0x00000010u)
  14709. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_932_CLR_SHIFT (0x00000004u)
  14710. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_932_CLR_RESETVAL (0x00000000u)
  14711. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_933_CLR_MASK (0x00000020u)
  14712. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_933_CLR_SHIFT (0x00000005u)
  14713. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_933_CLR_RESETVAL (0x00000000u)
  14714. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_934_CLR_MASK (0x00000040u)
  14715. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_934_CLR_SHIFT (0x00000006u)
  14716. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_934_CLR_RESETVAL (0x00000000u)
  14717. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_935_CLR_MASK (0x00000080u)
  14718. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_935_CLR_SHIFT (0x00000007u)
  14719. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_935_CLR_RESETVAL (0x00000000u)
  14720. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_936_CLR_MASK (0x00000100u)
  14721. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_936_CLR_SHIFT (0x00000008u)
  14722. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_936_CLR_RESETVAL (0x00000000u)
  14723. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_937_CLR_MASK (0x00000200u)
  14724. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_937_CLR_SHIFT (0x00000009u)
  14725. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_937_CLR_RESETVAL (0x00000000u)
  14726. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_938_CLR_MASK (0x00000400u)
  14727. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_938_CLR_SHIFT (0x0000000Au)
  14728. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_938_CLR_RESETVAL (0x00000000u)
  14729. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_939_CLR_MASK (0x00000800u)
  14730. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_939_CLR_SHIFT (0x0000000Bu)
  14731. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_939_CLR_RESETVAL (0x00000000u)
  14732. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_940_CLR_MASK (0x00001000u)
  14733. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_940_CLR_SHIFT (0x0000000Cu)
  14734. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_940_CLR_RESETVAL (0x00000000u)
  14735. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_941_CLR_MASK (0x00002000u)
  14736. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_941_CLR_SHIFT (0x0000000Du)
  14737. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_941_CLR_RESETVAL (0x00000000u)
  14738. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_942_CLR_MASK (0x00004000u)
  14739. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_942_CLR_SHIFT (0x0000000Eu)
  14740. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_942_CLR_RESETVAL (0x00000000u)
  14741. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_943_CLR_MASK (0x00008000u)
  14742. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_943_CLR_SHIFT (0x0000000Fu)
  14743. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_943_CLR_RESETVAL (0x00000000u)
  14744. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_944_CLR_MASK (0x00010000u)
  14745. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_944_CLR_SHIFT (0x00000010u)
  14746. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_944_CLR_RESETVAL (0x00000000u)
  14747. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_945_CLR_MASK (0x00020000u)
  14748. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_945_CLR_SHIFT (0x00000011u)
  14749. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_945_CLR_RESETVAL (0x00000000u)
  14750. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_946_CLR_MASK (0x00040000u)
  14751. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_946_CLR_SHIFT (0x00000012u)
  14752. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_946_CLR_RESETVAL (0x00000000u)
  14753. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_947_CLR_MASK (0x00080000u)
  14754. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_947_CLR_SHIFT (0x00000013u)
  14755. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_947_CLR_RESETVAL (0x00000000u)
  14756. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_948_CLR_MASK (0x00100000u)
  14757. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_948_CLR_SHIFT (0x00000014u)
  14758. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_948_CLR_RESETVAL (0x00000000u)
  14759. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_949_CLR_MASK (0x00200000u)
  14760. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_949_CLR_SHIFT (0x00000015u)
  14761. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_949_CLR_RESETVAL (0x00000000u)
  14762. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_950_CLR_MASK (0x00400000u)
  14763. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_950_CLR_SHIFT (0x00000016u)
  14764. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_950_CLR_RESETVAL (0x00000000u)
  14765. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_951_CLR_MASK (0x00800000u)
  14766. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_951_CLR_SHIFT (0x00000017u)
  14767. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_951_CLR_RESETVAL (0x00000000u)
  14768. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_952_CLR_MASK (0x01000000u)
  14769. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_952_CLR_SHIFT (0x00000018u)
  14770. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_952_CLR_RESETVAL (0x00000000u)
  14771. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_953_CLR_MASK (0x02000000u)
  14772. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_953_CLR_SHIFT (0x00000019u)
  14773. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_953_CLR_RESETVAL (0x00000000u)
  14774. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_954_CLR_MASK (0x04000000u)
  14775. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_954_CLR_SHIFT (0x0000001Au)
  14776. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_954_CLR_RESETVAL (0x00000000u)
  14777. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_955_CLR_MASK (0x08000000u)
  14778. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_955_CLR_SHIFT (0x0000001Bu)
  14779. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_955_CLR_RESETVAL (0x00000000u)
  14780. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_956_CLR_MASK (0x10000000u)
  14781. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_956_CLR_SHIFT (0x0000001Cu)
  14782. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_956_CLR_RESETVAL (0x00000000u)
  14783. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_957_CLR_MASK (0x20000000u)
  14784. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_957_CLR_SHIFT (0x0000001Du)
  14785. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_957_CLR_RESETVAL (0x00000000u)
  14786. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_958_CLR_MASK (0x40000000u)
  14787. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_958_CLR_SHIFT (0x0000001Eu)
  14788. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_958_CLR_RESETVAL (0x00000000u)
  14789. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_959_CLR_MASK (0x80000000u)
  14790. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_959_CLR_SHIFT (0x0000001Fu)
  14791. #define CSL_CPINTC_ENABLE_CLR_REG29_ENABLE_959_CLR_RESETVAL (0x00000000u)
  14792. #define CSL_CPINTC_ENABLE_CLR_REG29_RESETVAL (0x00000000u)
  14793. /* enable_clr_reg30 */
  14794. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_960_CLR_MASK (0x00000001u)
  14795. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_960_CLR_SHIFT (0x00000000u)
  14796. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_960_CLR_RESETVAL (0x00000000u)
  14797. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_961_CLR_MASK (0x00000002u)
  14798. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_961_CLR_SHIFT (0x00000001u)
  14799. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_961_CLR_RESETVAL (0x00000000u)
  14800. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_962_CLR_MASK (0x00000004u)
  14801. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_962_CLR_SHIFT (0x00000002u)
  14802. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_962_CLR_RESETVAL (0x00000000u)
  14803. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_963_CLR_MASK (0x00000008u)
  14804. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_963_CLR_SHIFT (0x00000003u)
  14805. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_963_CLR_RESETVAL (0x00000000u)
  14806. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_964_CLR_MASK (0x00000010u)
  14807. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_964_CLR_SHIFT (0x00000004u)
  14808. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_964_CLR_RESETVAL (0x00000000u)
  14809. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_965_CLR_MASK (0x00000020u)
  14810. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_965_CLR_SHIFT (0x00000005u)
  14811. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_965_CLR_RESETVAL (0x00000000u)
  14812. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_966_CLR_MASK (0x00000040u)
  14813. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_966_CLR_SHIFT (0x00000006u)
  14814. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_966_CLR_RESETVAL (0x00000000u)
  14815. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_967_CLR_MASK (0x00000080u)
  14816. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_967_CLR_SHIFT (0x00000007u)
  14817. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_967_CLR_RESETVAL (0x00000000u)
  14818. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_968_CLR_MASK (0x00000100u)
  14819. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_968_CLR_SHIFT (0x00000008u)
  14820. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_968_CLR_RESETVAL (0x00000000u)
  14821. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_969_CLR_MASK (0x00000200u)
  14822. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_969_CLR_SHIFT (0x00000009u)
  14823. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_969_CLR_RESETVAL (0x00000000u)
  14824. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_970_CLR_MASK (0x00000400u)
  14825. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_970_CLR_SHIFT (0x0000000Au)
  14826. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_970_CLR_RESETVAL (0x00000000u)
  14827. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_971_CLR_MASK (0x00000800u)
  14828. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_971_CLR_SHIFT (0x0000000Bu)
  14829. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_971_CLR_RESETVAL (0x00000000u)
  14830. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_972_CLR_MASK (0x00001000u)
  14831. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_972_CLR_SHIFT (0x0000000Cu)
  14832. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_972_CLR_RESETVAL (0x00000000u)
  14833. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_973_CLR_MASK (0x00002000u)
  14834. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_973_CLR_SHIFT (0x0000000Du)
  14835. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_973_CLR_RESETVAL (0x00000000u)
  14836. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_974_CLR_MASK (0x00004000u)
  14837. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_974_CLR_SHIFT (0x0000000Eu)
  14838. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_974_CLR_RESETVAL (0x00000000u)
  14839. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_975_CLR_MASK (0x00008000u)
  14840. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_975_CLR_SHIFT (0x0000000Fu)
  14841. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_975_CLR_RESETVAL (0x00000000u)
  14842. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_976_CLR_MASK (0x00010000u)
  14843. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_976_CLR_SHIFT (0x00000010u)
  14844. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_976_CLR_RESETVAL (0x00000000u)
  14845. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_977_CLR_MASK (0x00020000u)
  14846. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_977_CLR_SHIFT (0x00000011u)
  14847. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_977_CLR_RESETVAL (0x00000000u)
  14848. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_978_CLR_MASK (0x00040000u)
  14849. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_978_CLR_SHIFT (0x00000012u)
  14850. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_978_CLR_RESETVAL (0x00000000u)
  14851. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_979_CLR_MASK (0x00080000u)
  14852. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_979_CLR_SHIFT (0x00000013u)
  14853. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_979_CLR_RESETVAL (0x00000000u)
  14854. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_980_CLR_MASK (0x00100000u)
  14855. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_980_CLR_SHIFT (0x00000014u)
  14856. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_980_CLR_RESETVAL (0x00000000u)
  14857. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_981_CLR_MASK (0x00200000u)
  14858. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_981_CLR_SHIFT (0x00000015u)
  14859. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_981_CLR_RESETVAL (0x00000000u)
  14860. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_982_CLR_MASK (0x00400000u)
  14861. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_982_CLR_SHIFT (0x00000016u)
  14862. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_982_CLR_RESETVAL (0x00000000u)
  14863. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_983_CLR_MASK (0x00800000u)
  14864. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_983_CLR_SHIFT (0x00000017u)
  14865. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_983_CLR_RESETVAL (0x00000000u)
  14866. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_984_CLR_MASK (0x01000000u)
  14867. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_984_CLR_SHIFT (0x00000018u)
  14868. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_984_CLR_RESETVAL (0x00000000u)
  14869. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_985_CLR_MASK (0x02000000u)
  14870. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_985_CLR_SHIFT (0x00000019u)
  14871. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_985_CLR_RESETVAL (0x00000000u)
  14872. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_986_CLR_MASK (0x04000000u)
  14873. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_986_CLR_SHIFT (0x0000001Au)
  14874. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_986_CLR_RESETVAL (0x00000000u)
  14875. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_987_CLR_MASK (0x08000000u)
  14876. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_987_CLR_SHIFT (0x0000001Bu)
  14877. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_987_CLR_RESETVAL (0x00000000u)
  14878. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_988_CLR_MASK (0x10000000u)
  14879. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_988_CLR_SHIFT (0x0000001Cu)
  14880. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_988_CLR_RESETVAL (0x00000000u)
  14881. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_989_CLR_MASK (0x20000000u)
  14882. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_989_CLR_SHIFT (0x0000001Du)
  14883. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_989_CLR_RESETVAL (0x00000000u)
  14884. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_990_CLR_MASK (0x40000000u)
  14885. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_990_CLR_SHIFT (0x0000001Eu)
  14886. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_990_CLR_RESETVAL (0x00000000u)
  14887. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_991_CLR_MASK (0x80000000u)
  14888. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_991_CLR_SHIFT (0x0000001Fu)
  14889. #define CSL_CPINTC_ENABLE_CLR_REG30_ENABLE_991_CLR_RESETVAL (0x00000000u)
  14890. #define CSL_CPINTC_ENABLE_CLR_REG30_RESETVAL (0x00000000u)
  14891. /* enable_clr_reg31 */
  14892. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_992_CLR_MASK (0x00000001u)
  14893. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_992_CLR_SHIFT (0x00000000u)
  14894. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_992_CLR_RESETVAL (0x00000000u)
  14895. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_993_CLR_MASK (0x00000002u)
  14896. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_993_CLR_SHIFT (0x00000001u)
  14897. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_993_CLR_RESETVAL (0x00000000u)
  14898. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_994_CLR_MASK (0x00000004u)
  14899. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_994_CLR_SHIFT (0x00000002u)
  14900. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_994_CLR_RESETVAL (0x00000000u)
  14901. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_995_CLR_MASK (0x00000008u)
  14902. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_995_CLR_SHIFT (0x00000003u)
  14903. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_995_CLR_RESETVAL (0x00000000u)
  14904. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_996_CLR_MASK (0x00000010u)
  14905. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_996_CLR_SHIFT (0x00000004u)
  14906. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_996_CLR_RESETVAL (0x00000000u)
  14907. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_997_CLR_MASK (0x00000020u)
  14908. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_997_CLR_SHIFT (0x00000005u)
  14909. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_997_CLR_RESETVAL (0x00000000u)
  14910. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_998_CLR_MASK (0x00000040u)
  14911. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_998_CLR_SHIFT (0x00000006u)
  14912. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_998_CLR_RESETVAL (0x00000000u)
  14913. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_999_CLR_MASK (0x00000080u)
  14914. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_999_CLR_SHIFT (0x00000007u)
  14915. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_999_CLR_RESETVAL (0x00000000u)
  14916. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1000_CLR_MASK (0x00000100u)
  14917. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1000_CLR_SHIFT (0x00000008u)
  14918. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1000_CLR_RESETVAL (0x00000000u)
  14919. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1001_CLR_MASK (0x00000200u)
  14920. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1001_CLR_SHIFT (0x00000009u)
  14921. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1001_CLR_RESETVAL (0x00000000u)
  14922. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1002_CLR_MASK (0x00000400u)
  14923. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1002_CLR_SHIFT (0x0000000Au)
  14924. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1002_CLR_RESETVAL (0x00000000u)
  14925. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1003_CLR_MASK (0x00000800u)
  14926. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1003_CLR_SHIFT (0x0000000Bu)
  14927. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1003_CLR_RESETVAL (0x00000000u)
  14928. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1004_CLR_MASK (0x00001000u)
  14929. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1004_CLR_SHIFT (0x0000000Cu)
  14930. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1004_CLR_RESETVAL (0x00000000u)
  14931. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1005_CLR_MASK (0x00002000u)
  14932. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1005_CLR_SHIFT (0x0000000Du)
  14933. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1005_CLR_RESETVAL (0x00000000u)
  14934. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1006_CLR_MASK (0x00004000u)
  14935. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1006_CLR_SHIFT (0x0000000Eu)
  14936. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1006_CLR_RESETVAL (0x00000000u)
  14937. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1007_CLR_MASK (0x00008000u)
  14938. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1007_CLR_SHIFT (0x0000000Fu)
  14939. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1007_CLR_RESETVAL (0x00000000u)
  14940. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1008_CLR_MASK (0x00010000u)
  14941. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1008_CLR_SHIFT (0x00000010u)
  14942. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1008_CLR_RESETVAL (0x00000000u)
  14943. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1009_CLR_MASK (0x00020000u)
  14944. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1009_CLR_SHIFT (0x00000011u)
  14945. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1009_CLR_RESETVAL (0x00000000u)
  14946. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1010_CLR_MASK (0x00040000u)
  14947. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1010_CLR_SHIFT (0x00000012u)
  14948. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1010_CLR_RESETVAL (0x00000000u)
  14949. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1011_CLR_MASK (0x00080000u)
  14950. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1011_CLR_SHIFT (0x00000013u)
  14951. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1011_CLR_RESETVAL (0x00000000u)
  14952. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1012_CLR_MASK (0x00100000u)
  14953. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1012_CLR_SHIFT (0x00000014u)
  14954. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1012_CLR_RESETVAL (0x00000000u)
  14955. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1013_CLR_MASK (0x00200000u)
  14956. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1013_CLR_SHIFT (0x00000015u)
  14957. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1013_CLR_RESETVAL (0x00000000u)
  14958. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1014_CLR_MASK (0x00400000u)
  14959. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1014_CLR_SHIFT (0x00000016u)
  14960. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1014_CLR_RESETVAL (0x00000000u)
  14961. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1015_CLR_MASK (0x00800000u)
  14962. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1015_CLR_SHIFT (0x00000017u)
  14963. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1015_CLR_RESETVAL (0x00000000u)
  14964. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1016_CLR_MASK (0x01000000u)
  14965. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1016_CLR_SHIFT (0x00000018u)
  14966. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1016_CLR_RESETVAL (0x00000000u)
  14967. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1017_CLR_MASK (0x02000000u)
  14968. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1017_CLR_SHIFT (0x00000019u)
  14969. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1017_CLR_RESETVAL (0x00000000u)
  14970. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1018_CLR_MASK (0x04000000u)
  14971. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1018_CLR_SHIFT (0x0000001Au)
  14972. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1018_CLR_RESETVAL (0x00000000u)
  14973. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1019_CLR_MASK (0x08000000u)
  14974. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1019_CLR_SHIFT (0x0000001Bu)
  14975. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1019_CLR_RESETVAL (0x00000000u)
  14976. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1020_CLR_MASK (0x10000000u)
  14977. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1020_CLR_SHIFT (0x0000001Cu)
  14978. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1020_CLR_RESETVAL (0x00000000u)
  14979. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1021_CLR_MASK (0x20000000u)
  14980. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1021_CLR_SHIFT (0x0000001Du)
  14981. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1021_CLR_RESETVAL (0x00000000u)
  14982. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1022_CLR_MASK (0x40000000u)
  14983. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1022_CLR_SHIFT (0x0000001Eu)
  14984. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1022_CLR_RESETVAL (0x00000000u)
  14985. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1023_CLR_MASK (0x80000000u)
  14986. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1023_CLR_SHIFT (0x0000001Fu)
  14987. #define CSL_CPINTC_ENABLE_CLR_REG31_ENABLE_1023_CLR_RESETVAL (0x00000000u)
  14988. #define CSL_CPINTC_ENABLE_CLR_REG31_RESETVAL (0x00000000u)
  14989. /* ch_map_reg0 */
  14990. #define CSL_CPINTC_CH_MAP_REG0_CH_MAP_0_MASK (0x000000FFu)
  14991. #define CSL_CPINTC_CH_MAP_REG0_CH_MAP_0_SHIFT (0x00000000u)
  14992. #define CSL_CPINTC_CH_MAP_REG0_CH_MAP_0_RESETVAL (0x00000000u)
  14993. #define CSL_CPINTC_CH_MAP_REG0_CH_MAP_1_MASK (0x0000FF00u)
  14994. #define CSL_CPINTC_CH_MAP_REG0_CH_MAP_1_SHIFT (0x00000008u)
  14995. #define CSL_CPINTC_CH_MAP_REG0_CH_MAP_1_RESETVAL (0x00000000u)
  14996. #define CSL_CPINTC_CH_MAP_REG0_CH_MAP_2_MASK (0x00FF0000u)
  14997. #define CSL_CPINTC_CH_MAP_REG0_CH_MAP_2_SHIFT (0x00000010u)
  14998. #define CSL_CPINTC_CH_MAP_REG0_CH_MAP_2_RESETVAL (0x00000000u)
  14999. #define CSL_CPINTC_CH_MAP_REG0_CH_MAP_3_MASK (0xFF000000u)
  15000. #define CSL_CPINTC_CH_MAP_REG0_CH_MAP_3_SHIFT (0x00000018u)
  15001. #define CSL_CPINTC_CH_MAP_REG0_CH_MAP_3_RESETVAL (0x00000000u)
  15002. #define CSL_CPINTC_CH_MAP_REG0_RESETVAL (0x00000000u)
  15003. /* ch_map_reg1 */
  15004. #define CSL_CPINTC_CH_MAP_REG1_CH_MAP_4_MASK (0x000000FFu)
  15005. #define CSL_CPINTC_CH_MAP_REG1_CH_MAP_4_SHIFT (0x00000000u)
  15006. #define CSL_CPINTC_CH_MAP_REG1_CH_MAP_4_RESETVAL (0x00000000u)
  15007. #define CSL_CPINTC_CH_MAP_REG1_CH_MAP_5_MASK (0x0000FF00u)
  15008. #define CSL_CPINTC_CH_MAP_REG1_CH_MAP_5_SHIFT (0x00000008u)
  15009. #define CSL_CPINTC_CH_MAP_REG1_CH_MAP_5_RESETVAL (0x00000000u)
  15010. #define CSL_CPINTC_CH_MAP_REG1_CH_MAP_6_MASK (0x00FF0000u)
  15011. #define CSL_CPINTC_CH_MAP_REG1_CH_MAP_6_SHIFT (0x00000010u)
  15012. #define CSL_CPINTC_CH_MAP_REG1_CH_MAP_6_RESETVAL (0x00000000u)
  15013. #define CSL_CPINTC_CH_MAP_REG1_CH_MAP_7_MASK (0xFF000000u)
  15014. #define CSL_CPINTC_CH_MAP_REG1_CH_MAP_7_SHIFT (0x00000018u)
  15015. #define CSL_CPINTC_CH_MAP_REG1_CH_MAP_7_RESETVAL (0x00000000u)
  15016. #define CSL_CPINTC_CH_MAP_REG1_RESETVAL (0x00000000u)
  15017. /* ch_map_reg2 */
  15018. #define CSL_CPINTC_CH_MAP_REG2_CH_MAP_8_MASK (0x000000FFu)
  15019. #define CSL_CPINTC_CH_MAP_REG2_CH_MAP_8_SHIFT (0x00000000u)
  15020. #define CSL_CPINTC_CH_MAP_REG2_CH_MAP_8_RESETVAL (0x00000000u)
  15021. #define CSL_CPINTC_CH_MAP_REG2_CH_MAP_9_MASK (0x0000FF00u)
  15022. #define CSL_CPINTC_CH_MAP_REG2_CH_MAP_9_SHIFT (0x00000008u)
  15023. #define CSL_CPINTC_CH_MAP_REG2_CH_MAP_9_RESETVAL (0x00000000u)
  15024. #define CSL_CPINTC_CH_MAP_REG2_CH_MAP_10_MASK (0x00FF0000u)
  15025. #define CSL_CPINTC_CH_MAP_REG2_CH_MAP_10_SHIFT (0x00000010u)
  15026. #define CSL_CPINTC_CH_MAP_REG2_CH_MAP_10_RESETVAL (0x00000000u)
  15027. #define CSL_CPINTC_CH_MAP_REG2_CH_MAP_11_MASK (0xFF000000u)
  15028. #define CSL_CPINTC_CH_MAP_REG2_CH_MAP_11_SHIFT (0x00000018u)
  15029. #define CSL_CPINTC_CH_MAP_REG2_CH_MAP_11_RESETVAL (0x00000000u)
  15030. #define CSL_CPINTC_CH_MAP_REG2_RESETVAL (0x00000000u)
  15031. /* ch_map_reg3 */
  15032. #define CSL_CPINTC_CH_MAP_REG3_CH_MAP_12_MASK (0x000000FFu)
  15033. #define CSL_CPINTC_CH_MAP_REG3_CH_MAP_12_SHIFT (0x00000000u)
  15034. #define CSL_CPINTC_CH_MAP_REG3_CH_MAP_12_RESETVAL (0x00000000u)
  15035. #define CSL_CPINTC_CH_MAP_REG3_CH_MAP_13_MASK (0x0000FF00u)
  15036. #define CSL_CPINTC_CH_MAP_REG3_CH_MAP_13_SHIFT (0x00000008u)
  15037. #define CSL_CPINTC_CH_MAP_REG3_CH_MAP_13_RESETVAL (0x00000000u)
  15038. #define CSL_CPINTC_CH_MAP_REG3_CH_MAP_14_MASK (0x00FF0000u)
  15039. #define CSL_CPINTC_CH_MAP_REG3_CH_MAP_14_SHIFT (0x00000010u)
  15040. #define CSL_CPINTC_CH_MAP_REG3_CH_MAP_14_RESETVAL (0x00000000u)
  15041. #define CSL_CPINTC_CH_MAP_REG3_CH_MAP_15_MASK (0xFF000000u)
  15042. #define CSL_CPINTC_CH_MAP_REG3_CH_MAP_15_SHIFT (0x00000018u)
  15043. #define CSL_CPINTC_CH_MAP_REG3_CH_MAP_15_RESETVAL (0x00000000u)
  15044. #define CSL_CPINTC_CH_MAP_REG3_RESETVAL (0x00000000u)
  15045. /* ch_map_reg4 */
  15046. #define CSL_CPINTC_CH_MAP_REG4_CH_MAP_16_MASK (0x000000FFu)
  15047. #define CSL_CPINTC_CH_MAP_REG4_CH_MAP_16_SHIFT (0x00000000u)
  15048. #define CSL_CPINTC_CH_MAP_REG4_CH_MAP_16_RESETVAL (0x00000000u)
  15049. #define CSL_CPINTC_CH_MAP_REG4_CH_MAP_17_MASK (0x0000FF00u)
  15050. #define CSL_CPINTC_CH_MAP_REG4_CH_MAP_17_SHIFT (0x00000008u)
  15051. #define CSL_CPINTC_CH_MAP_REG4_CH_MAP_17_RESETVAL (0x00000000u)
  15052. #define CSL_CPINTC_CH_MAP_REG4_CH_MAP_18_MASK (0x00FF0000u)
  15053. #define CSL_CPINTC_CH_MAP_REG4_CH_MAP_18_SHIFT (0x00000010u)
  15054. #define CSL_CPINTC_CH_MAP_REG4_CH_MAP_18_RESETVAL (0x00000000u)
  15055. #define CSL_CPINTC_CH_MAP_REG4_CH_MAP_19_MASK (0xFF000000u)
  15056. #define CSL_CPINTC_CH_MAP_REG4_CH_MAP_19_SHIFT (0x00000018u)
  15057. #define CSL_CPINTC_CH_MAP_REG4_CH_MAP_19_RESETVAL (0x00000000u)
  15058. #define CSL_CPINTC_CH_MAP_REG4_RESETVAL (0x00000000u)
  15059. /* ch_map_reg5 */
  15060. #define CSL_CPINTC_CH_MAP_REG5_CH_MAP_20_MASK (0x000000FFu)
  15061. #define CSL_CPINTC_CH_MAP_REG5_CH_MAP_20_SHIFT (0x00000000u)
  15062. #define CSL_CPINTC_CH_MAP_REG5_CH_MAP_20_RESETVAL (0x00000000u)
  15063. #define CSL_CPINTC_CH_MAP_REG5_CH_MAP_21_MASK (0x0000FF00u)
  15064. #define CSL_CPINTC_CH_MAP_REG5_CH_MAP_21_SHIFT (0x00000008u)
  15065. #define CSL_CPINTC_CH_MAP_REG5_CH_MAP_21_RESETVAL (0x00000000u)
  15066. #define CSL_CPINTC_CH_MAP_REG5_CH_MAP_22_MASK (0x00FF0000u)
  15067. #define CSL_CPINTC_CH_MAP_REG5_CH_MAP_22_SHIFT (0x00000010u)
  15068. #define CSL_CPINTC_CH_MAP_REG5_CH_MAP_22_RESETVAL (0x00000000u)
  15069. #define CSL_CPINTC_CH_MAP_REG5_CH_MAP_23_MASK (0xFF000000u)
  15070. #define CSL_CPINTC_CH_MAP_REG5_CH_MAP_23_SHIFT (0x00000018u)
  15071. #define CSL_CPINTC_CH_MAP_REG5_CH_MAP_23_RESETVAL (0x00000000u)
  15072. #define CSL_CPINTC_CH_MAP_REG5_RESETVAL (0x00000000u)
  15073. /* ch_map_reg6 */
  15074. #define CSL_CPINTC_CH_MAP_REG6_CH_MAP_24_MASK (0x000000FFu)
  15075. #define CSL_CPINTC_CH_MAP_REG6_CH_MAP_24_SHIFT (0x00000000u)
  15076. #define CSL_CPINTC_CH_MAP_REG6_CH_MAP_24_RESETVAL (0x00000000u)
  15077. #define CSL_CPINTC_CH_MAP_REG6_CH_MAP_25_MASK (0x0000FF00u)
  15078. #define CSL_CPINTC_CH_MAP_REG6_CH_MAP_25_SHIFT (0x00000008u)
  15079. #define CSL_CPINTC_CH_MAP_REG6_CH_MAP_25_RESETVAL (0x00000000u)
  15080. #define CSL_CPINTC_CH_MAP_REG6_CH_MAP_26_MASK (0x00FF0000u)
  15081. #define CSL_CPINTC_CH_MAP_REG6_CH_MAP_26_SHIFT (0x00000010u)
  15082. #define CSL_CPINTC_CH_MAP_REG6_CH_MAP_26_RESETVAL (0x00000000u)
  15083. #define CSL_CPINTC_CH_MAP_REG6_CH_MAP_27_MASK (0xFF000000u)
  15084. #define CSL_CPINTC_CH_MAP_REG6_CH_MAP_27_SHIFT (0x00000018u)
  15085. #define CSL_CPINTC_CH_MAP_REG6_CH_MAP_27_RESETVAL (0x00000000u)
  15086. #define CSL_CPINTC_CH_MAP_REG6_RESETVAL (0x00000000u)
  15087. /* ch_map_reg7 */
  15088. #define CSL_CPINTC_CH_MAP_REG7_CH_MAP_28_MASK (0x000000FFu)
  15089. #define CSL_CPINTC_CH_MAP_REG7_CH_MAP_28_SHIFT (0x00000000u)
  15090. #define CSL_CPINTC_CH_MAP_REG7_CH_MAP_28_RESETVAL (0x00000000u)
  15091. #define CSL_CPINTC_CH_MAP_REG7_CH_MAP_29_MASK (0x0000FF00u)
  15092. #define CSL_CPINTC_CH_MAP_REG7_CH_MAP_29_SHIFT (0x00000008u)
  15093. #define CSL_CPINTC_CH_MAP_REG7_CH_MAP_29_RESETVAL (0x00000000u)
  15094. #define CSL_CPINTC_CH_MAP_REG7_CH_MAP_30_MASK (0x00FF0000u)
  15095. #define CSL_CPINTC_CH_MAP_REG7_CH_MAP_30_SHIFT (0x00000010u)
  15096. #define CSL_CPINTC_CH_MAP_REG7_CH_MAP_30_RESETVAL (0x00000000u)
  15097. #define CSL_CPINTC_CH_MAP_REG7_CH_MAP_31_MASK (0xFF000000u)
  15098. #define CSL_CPINTC_CH_MAP_REG7_CH_MAP_31_SHIFT (0x00000018u)
  15099. #define CSL_CPINTC_CH_MAP_REG7_CH_MAP_31_RESETVAL (0x00000000u)
  15100. #define CSL_CPINTC_CH_MAP_REG7_RESETVAL (0x00000000u)
  15101. /* ch_map_reg8 */
  15102. #define CSL_CPINTC_CH_MAP_REG8_CH_MAP_32_MASK (0x000000FFu)
  15103. #define CSL_CPINTC_CH_MAP_REG8_CH_MAP_32_SHIFT (0x00000000u)
  15104. #define CSL_CPINTC_CH_MAP_REG8_CH_MAP_32_RESETVAL (0x00000000u)
  15105. #define CSL_CPINTC_CH_MAP_REG8_CH_MAP_33_MASK (0x0000FF00u)
  15106. #define CSL_CPINTC_CH_MAP_REG8_CH_MAP_33_SHIFT (0x00000008u)
  15107. #define CSL_CPINTC_CH_MAP_REG8_CH_MAP_33_RESETVAL (0x00000000u)
  15108. #define CSL_CPINTC_CH_MAP_REG8_CH_MAP_34_MASK (0x00FF0000u)
  15109. #define CSL_CPINTC_CH_MAP_REG8_CH_MAP_34_SHIFT (0x00000010u)
  15110. #define CSL_CPINTC_CH_MAP_REG8_CH_MAP_34_RESETVAL (0x00000000u)
  15111. #define CSL_CPINTC_CH_MAP_REG8_CH_MAP_35_MASK (0xFF000000u)
  15112. #define CSL_CPINTC_CH_MAP_REG8_CH_MAP_35_SHIFT (0x00000018u)
  15113. #define CSL_CPINTC_CH_MAP_REG8_CH_MAP_35_RESETVAL (0x00000000u)
  15114. #define CSL_CPINTC_CH_MAP_REG8_RESETVAL (0x00000000u)
  15115. /* ch_map_reg9 */
  15116. #define CSL_CPINTC_CH_MAP_REG9_CH_MAP_36_MASK (0x000000FFu)
  15117. #define CSL_CPINTC_CH_MAP_REG9_CH_MAP_36_SHIFT (0x00000000u)
  15118. #define CSL_CPINTC_CH_MAP_REG9_CH_MAP_36_RESETVAL (0x00000000u)
  15119. #define CSL_CPINTC_CH_MAP_REG9_CH_MAP_37_MASK (0x0000FF00u)
  15120. #define CSL_CPINTC_CH_MAP_REG9_CH_MAP_37_SHIFT (0x00000008u)
  15121. #define CSL_CPINTC_CH_MAP_REG9_CH_MAP_37_RESETVAL (0x00000000u)
  15122. #define CSL_CPINTC_CH_MAP_REG9_CH_MAP_38_MASK (0x00FF0000u)
  15123. #define CSL_CPINTC_CH_MAP_REG9_CH_MAP_38_SHIFT (0x00000010u)
  15124. #define CSL_CPINTC_CH_MAP_REG9_CH_MAP_38_RESETVAL (0x00000000u)
  15125. #define CSL_CPINTC_CH_MAP_REG9_CH_MAP_39_MASK (0xFF000000u)
  15126. #define CSL_CPINTC_CH_MAP_REG9_CH_MAP_39_SHIFT (0x00000018u)
  15127. #define CSL_CPINTC_CH_MAP_REG9_CH_MAP_39_RESETVAL (0x00000000u)
  15128. #define CSL_CPINTC_CH_MAP_REG9_RESETVAL (0x00000000u)
  15129. /* ch_map_reg10 */
  15130. #define CSL_CPINTC_CH_MAP_REG10_CH_MAP_40_MASK (0x000000FFu)
  15131. #define CSL_CPINTC_CH_MAP_REG10_CH_MAP_40_SHIFT (0x00000000u)
  15132. #define CSL_CPINTC_CH_MAP_REG10_CH_MAP_40_RESETVAL (0x00000000u)
  15133. #define CSL_CPINTC_CH_MAP_REG10_CH_MAP_41_MASK (0x0000FF00u)
  15134. #define CSL_CPINTC_CH_MAP_REG10_CH_MAP_41_SHIFT (0x00000008u)
  15135. #define CSL_CPINTC_CH_MAP_REG10_CH_MAP_41_RESETVAL (0x00000000u)
  15136. #define CSL_CPINTC_CH_MAP_REG10_CH_MAP_42_MASK (0x00FF0000u)
  15137. #define CSL_CPINTC_CH_MAP_REG10_CH_MAP_42_SHIFT (0x00000010u)
  15138. #define CSL_CPINTC_CH_MAP_REG10_CH_MAP_42_RESETVAL (0x00000000u)
  15139. #define CSL_CPINTC_CH_MAP_REG10_CH_MAP_43_MASK (0xFF000000u)
  15140. #define CSL_CPINTC_CH_MAP_REG10_CH_MAP_43_SHIFT (0x00000018u)
  15141. #define CSL_CPINTC_CH_MAP_REG10_CH_MAP_43_RESETVAL (0x00000000u)
  15142. #define CSL_CPINTC_CH_MAP_REG10_RESETVAL (0x00000000u)
  15143. /* ch_map_reg11 */
  15144. #define CSL_CPINTC_CH_MAP_REG11_CH_MAP_44_MASK (0x000000FFu)
  15145. #define CSL_CPINTC_CH_MAP_REG11_CH_MAP_44_SHIFT (0x00000000u)
  15146. #define CSL_CPINTC_CH_MAP_REG11_CH_MAP_44_RESETVAL (0x00000000u)
  15147. #define CSL_CPINTC_CH_MAP_REG11_CH_MAP_45_MASK (0x0000FF00u)
  15148. #define CSL_CPINTC_CH_MAP_REG11_CH_MAP_45_SHIFT (0x00000008u)
  15149. #define CSL_CPINTC_CH_MAP_REG11_CH_MAP_45_RESETVAL (0x00000000u)
  15150. #define CSL_CPINTC_CH_MAP_REG11_CH_MAP_46_MASK (0x00FF0000u)
  15151. #define CSL_CPINTC_CH_MAP_REG11_CH_MAP_46_SHIFT (0x00000010u)
  15152. #define CSL_CPINTC_CH_MAP_REG11_CH_MAP_46_RESETVAL (0x00000000u)
  15153. #define CSL_CPINTC_CH_MAP_REG11_CH_MAP_47_MASK (0xFF000000u)
  15154. #define CSL_CPINTC_CH_MAP_REG11_CH_MAP_47_SHIFT (0x00000018u)
  15155. #define CSL_CPINTC_CH_MAP_REG11_CH_MAP_47_RESETVAL (0x00000000u)
  15156. #define CSL_CPINTC_CH_MAP_REG11_RESETVAL (0x00000000u)
  15157. /* ch_map_reg12 */
  15158. #define CSL_CPINTC_CH_MAP_REG12_CH_MAP_48_MASK (0x000000FFu)
  15159. #define CSL_CPINTC_CH_MAP_REG12_CH_MAP_48_SHIFT (0x00000000u)
  15160. #define CSL_CPINTC_CH_MAP_REG12_CH_MAP_48_RESETVAL (0x00000000u)
  15161. #define CSL_CPINTC_CH_MAP_REG12_CH_MAP_49_MASK (0x0000FF00u)
  15162. #define CSL_CPINTC_CH_MAP_REG12_CH_MAP_49_SHIFT (0x00000008u)
  15163. #define CSL_CPINTC_CH_MAP_REG12_CH_MAP_49_RESETVAL (0x00000000u)
  15164. #define CSL_CPINTC_CH_MAP_REG12_CH_MAP_50_MASK (0x00FF0000u)
  15165. #define CSL_CPINTC_CH_MAP_REG12_CH_MAP_50_SHIFT (0x00000010u)
  15166. #define CSL_CPINTC_CH_MAP_REG12_CH_MAP_50_RESETVAL (0x00000000u)
  15167. #define CSL_CPINTC_CH_MAP_REG12_CH_MAP_51_MASK (0xFF000000u)
  15168. #define CSL_CPINTC_CH_MAP_REG12_CH_MAP_51_SHIFT (0x00000018u)
  15169. #define CSL_CPINTC_CH_MAP_REG12_CH_MAP_51_RESETVAL (0x00000000u)
  15170. #define CSL_CPINTC_CH_MAP_REG12_RESETVAL (0x00000000u)
  15171. /* ch_map_reg13 */
  15172. #define CSL_CPINTC_CH_MAP_REG13_CH_MAP_52_MASK (0x000000FFu)
  15173. #define CSL_CPINTC_CH_MAP_REG13_CH_MAP_52_SHIFT (0x00000000u)
  15174. #define CSL_CPINTC_CH_MAP_REG13_CH_MAP_52_RESETVAL (0x00000000u)
  15175. #define CSL_CPINTC_CH_MAP_REG13_CH_MAP_53_MASK (0x0000FF00u)
  15176. #define CSL_CPINTC_CH_MAP_REG13_CH_MAP_53_SHIFT (0x00000008u)
  15177. #define CSL_CPINTC_CH_MAP_REG13_CH_MAP_53_RESETVAL (0x00000000u)
  15178. #define CSL_CPINTC_CH_MAP_REG13_CH_MAP_54_MASK (0x00FF0000u)
  15179. #define CSL_CPINTC_CH_MAP_REG13_CH_MAP_54_SHIFT (0x00000010u)
  15180. #define CSL_CPINTC_CH_MAP_REG13_CH_MAP_54_RESETVAL (0x00000000u)
  15181. #define CSL_CPINTC_CH_MAP_REG13_CH_MAP_55_MASK (0xFF000000u)
  15182. #define CSL_CPINTC_CH_MAP_REG13_CH_MAP_55_SHIFT (0x00000018u)
  15183. #define CSL_CPINTC_CH_MAP_REG13_CH_MAP_55_RESETVAL (0x00000000u)
  15184. #define CSL_CPINTC_CH_MAP_REG13_RESETVAL (0x00000000u)
  15185. /* ch_map_reg14 */
  15186. #define CSL_CPINTC_CH_MAP_REG14_CH_MAP_56_MASK (0x000000FFu)
  15187. #define CSL_CPINTC_CH_MAP_REG14_CH_MAP_56_SHIFT (0x00000000u)
  15188. #define CSL_CPINTC_CH_MAP_REG14_CH_MAP_56_RESETVAL (0x00000000u)
  15189. #define CSL_CPINTC_CH_MAP_REG14_CH_MAP_57_MASK (0x0000FF00u)
  15190. #define CSL_CPINTC_CH_MAP_REG14_CH_MAP_57_SHIFT (0x00000008u)
  15191. #define CSL_CPINTC_CH_MAP_REG14_CH_MAP_57_RESETVAL (0x00000000u)
  15192. #define CSL_CPINTC_CH_MAP_REG14_CH_MAP_58_MASK (0x00FF0000u)
  15193. #define CSL_CPINTC_CH_MAP_REG14_CH_MAP_58_SHIFT (0x00000010u)
  15194. #define CSL_CPINTC_CH_MAP_REG14_CH_MAP_58_RESETVAL (0x00000000u)
  15195. #define CSL_CPINTC_CH_MAP_REG14_CH_MAP_59_MASK (0xFF000000u)
  15196. #define CSL_CPINTC_CH_MAP_REG14_CH_MAP_59_SHIFT (0x00000018u)
  15197. #define CSL_CPINTC_CH_MAP_REG14_CH_MAP_59_RESETVAL (0x00000000u)
  15198. #define CSL_CPINTC_CH_MAP_REG14_RESETVAL (0x00000000u)
  15199. /* ch_map_reg15 */
  15200. #define CSL_CPINTC_CH_MAP_REG15_CH_MAP_60_MASK (0x000000FFu)
  15201. #define CSL_CPINTC_CH_MAP_REG15_CH_MAP_60_SHIFT (0x00000000u)
  15202. #define CSL_CPINTC_CH_MAP_REG15_CH_MAP_60_RESETVAL (0x00000000u)
  15203. #define CSL_CPINTC_CH_MAP_REG15_CH_MAP_61_MASK (0x0000FF00u)
  15204. #define CSL_CPINTC_CH_MAP_REG15_CH_MAP_61_SHIFT (0x00000008u)
  15205. #define CSL_CPINTC_CH_MAP_REG15_CH_MAP_61_RESETVAL (0x00000000u)
  15206. #define CSL_CPINTC_CH_MAP_REG15_CH_MAP_62_MASK (0x00FF0000u)
  15207. #define CSL_CPINTC_CH_MAP_REG15_CH_MAP_62_SHIFT (0x00000010u)
  15208. #define CSL_CPINTC_CH_MAP_REG15_CH_MAP_62_RESETVAL (0x00000000u)
  15209. #define CSL_CPINTC_CH_MAP_REG15_CH_MAP_63_MASK (0xFF000000u)
  15210. #define CSL_CPINTC_CH_MAP_REG15_CH_MAP_63_SHIFT (0x00000018u)
  15211. #define CSL_CPINTC_CH_MAP_REG15_CH_MAP_63_RESETVAL (0x00000000u)
  15212. #define CSL_CPINTC_CH_MAP_REG15_RESETVAL (0x00000000u)
  15213. /* ch_map_reg16 */
  15214. #define CSL_CPINTC_CH_MAP_REG16_CH_MAP_64_MASK (0x000000FFu)
  15215. #define CSL_CPINTC_CH_MAP_REG16_CH_MAP_64_SHIFT (0x00000000u)
  15216. #define CSL_CPINTC_CH_MAP_REG16_CH_MAP_64_RESETVAL (0x00000000u)
  15217. #define CSL_CPINTC_CH_MAP_REG16_CH_MAP_65_MASK (0x0000FF00u)
  15218. #define CSL_CPINTC_CH_MAP_REG16_CH_MAP_65_SHIFT (0x00000008u)
  15219. #define CSL_CPINTC_CH_MAP_REG16_CH_MAP_65_RESETVAL (0x00000000u)
  15220. #define CSL_CPINTC_CH_MAP_REG16_CH_MAP_66_MASK (0x00FF0000u)
  15221. #define CSL_CPINTC_CH_MAP_REG16_CH_MAP_66_SHIFT (0x00000010u)
  15222. #define CSL_CPINTC_CH_MAP_REG16_CH_MAP_66_RESETVAL (0x00000000u)
  15223. #define CSL_CPINTC_CH_MAP_REG16_CH_MAP_67_MASK (0xFF000000u)
  15224. #define CSL_CPINTC_CH_MAP_REG16_CH_MAP_67_SHIFT (0x00000018u)
  15225. #define CSL_CPINTC_CH_MAP_REG16_CH_MAP_67_RESETVAL (0x00000000u)
  15226. #define CSL_CPINTC_CH_MAP_REG16_RESETVAL (0x00000000u)
  15227. /* ch_map_reg17 */
  15228. #define CSL_CPINTC_CH_MAP_REG17_CH_MAP_68_MASK (0x000000FFu)
  15229. #define CSL_CPINTC_CH_MAP_REG17_CH_MAP_68_SHIFT (0x00000000u)
  15230. #define CSL_CPINTC_CH_MAP_REG17_CH_MAP_68_RESETVAL (0x00000000u)
  15231. #define CSL_CPINTC_CH_MAP_REG17_CH_MAP_69_MASK (0x0000FF00u)
  15232. #define CSL_CPINTC_CH_MAP_REG17_CH_MAP_69_SHIFT (0x00000008u)
  15233. #define CSL_CPINTC_CH_MAP_REG17_CH_MAP_69_RESETVAL (0x00000000u)
  15234. #define CSL_CPINTC_CH_MAP_REG17_CH_MAP_70_MASK (0x00FF0000u)
  15235. #define CSL_CPINTC_CH_MAP_REG17_CH_MAP_70_SHIFT (0x00000010u)
  15236. #define CSL_CPINTC_CH_MAP_REG17_CH_MAP_70_RESETVAL (0x00000000u)
  15237. #define CSL_CPINTC_CH_MAP_REG17_CH_MAP_71_MASK (0xFF000000u)
  15238. #define CSL_CPINTC_CH_MAP_REG17_CH_MAP_71_SHIFT (0x00000018u)
  15239. #define CSL_CPINTC_CH_MAP_REG17_CH_MAP_71_RESETVAL (0x00000000u)
  15240. #define CSL_CPINTC_CH_MAP_REG17_RESETVAL (0x00000000u)
  15241. /* ch_map_reg18 */
  15242. #define CSL_CPINTC_CH_MAP_REG18_CH_MAP_72_MASK (0x000000FFu)
  15243. #define CSL_CPINTC_CH_MAP_REG18_CH_MAP_72_SHIFT (0x00000000u)
  15244. #define CSL_CPINTC_CH_MAP_REG18_CH_MAP_72_RESETVAL (0x00000000u)
  15245. #define CSL_CPINTC_CH_MAP_REG18_CH_MAP_73_MASK (0x0000FF00u)
  15246. #define CSL_CPINTC_CH_MAP_REG18_CH_MAP_73_SHIFT (0x00000008u)
  15247. #define CSL_CPINTC_CH_MAP_REG18_CH_MAP_73_RESETVAL (0x00000000u)
  15248. #define CSL_CPINTC_CH_MAP_REG18_CH_MAP_74_MASK (0x00FF0000u)
  15249. #define CSL_CPINTC_CH_MAP_REG18_CH_MAP_74_SHIFT (0x00000010u)
  15250. #define CSL_CPINTC_CH_MAP_REG18_CH_MAP_74_RESETVAL (0x00000000u)
  15251. #define CSL_CPINTC_CH_MAP_REG18_CH_MAP_75_MASK (0xFF000000u)
  15252. #define CSL_CPINTC_CH_MAP_REG18_CH_MAP_75_SHIFT (0x00000018u)
  15253. #define CSL_CPINTC_CH_MAP_REG18_CH_MAP_75_RESETVAL (0x00000000u)
  15254. #define CSL_CPINTC_CH_MAP_REG18_RESETVAL (0x00000000u)
  15255. /* ch_map_reg19 */
  15256. #define CSL_CPINTC_CH_MAP_REG19_CH_MAP_76_MASK (0x000000FFu)
  15257. #define CSL_CPINTC_CH_MAP_REG19_CH_MAP_76_SHIFT (0x00000000u)
  15258. #define CSL_CPINTC_CH_MAP_REG19_CH_MAP_76_RESETVAL (0x00000000u)
  15259. #define CSL_CPINTC_CH_MAP_REG19_CH_MAP_77_MASK (0x0000FF00u)
  15260. #define CSL_CPINTC_CH_MAP_REG19_CH_MAP_77_SHIFT (0x00000008u)
  15261. #define CSL_CPINTC_CH_MAP_REG19_CH_MAP_77_RESETVAL (0x00000000u)
  15262. #define CSL_CPINTC_CH_MAP_REG19_CH_MAP_78_MASK (0x00FF0000u)
  15263. #define CSL_CPINTC_CH_MAP_REG19_CH_MAP_78_SHIFT (0x00000010u)
  15264. #define CSL_CPINTC_CH_MAP_REG19_CH_MAP_78_RESETVAL (0x00000000u)
  15265. #define CSL_CPINTC_CH_MAP_REG19_CH_MAP_79_MASK (0xFF000000u)
  15266. #define CSL_CPINTC_CH_MAP_REG19_CH_MAP_79_SHIFT (0x00000018u)
  15267. #define CSL_CPINTC_CH_MAP_REG19_CH_MAP_79_RESETVAL (0x00000000u)
  15268. #define CSL_CPINTC_CH_MAP_REG19_RESETVAL (0x00000000u)
  15269. /* ch_map_reg20 */
  15270. #define CSL_CPINTC_CH_MAP_REG20_CH_MAP_80_MASK (0x000000FFu)
  15271. #define CSL_CPINTC_CH_MAP_REG20_CH_MAP_80_SHIFT (0x00000000u)
  15272. #define CSL_CPINTC_CH_MAP_REG20_CH_MAP_80_RESETVAL (0x00000000u)
  15273. #define CSL_CPINTC_CH_MAP_REG20_CH_MAP_81_MASK (0x0000FF00u)
  15274. #define CSL_CPINTC_CH_MAP_REG20_CH_MAP_81_SHIFT (0x00000008u)
  15275. #define CSL_CPINTC_CH_MAP_REG20_CH_MAP_81_RESETVAL (0x00000000u)
  15276. #define CSL_CPINTC_CH_MAP_REG20_CH_MAP_82_MASK (0x00FF0000u)
  15277. #define CSL_CPINTC_CH_MAP_REG20_CH_MAP_82_SHIFT (0x00000010u)
  15278. #define CSL_CPINTC_CH_MAP_REG20_CH_MAP_82_RESETVAL (0x00000000u)
  15279. #define CSL_CPINTC_CH_MAP_REG20_CH_MAP_83_MASK (0xFF000000u)
  15280. #define CSL_CPINTC_CH_MAP_REG20_CH_MAP_83_SHIFT (0x00000018u)
  15281. #define CSL_CPINTC_CH_MAP_REG20_CH_MAP_83_RESETVAL (0x00000000u)
  15282. #define CSL_CPINTC_CH_MAP_REG20_RESETVAL (0x00000000u)
  15283. /* ch_map_reg21 */
  15284. #define CSL_CPINTC_CH_MAP_REG21_CH_MAP_84_MASK (0x000000FFu)
  15285. #define CSL_CPINTC_CH_MAP_REG21_CH_MAP_84_SHIFT (0x00000000u)
  15286. #define CSL_CPINTC_CH_MAP_REG21_CH_MAP_84_RESETVAL (0x00000000u)
  15287. #define CSL_CPINTC_CH_MAP_REG21_CH_MAP_85_MASK (0x0000FF00u)
  15288. #define CSL_CPINTC_CH_MAP_REG21_CH_MAP_85_SHIFT (0x00000008u)
  15289. #define CSL_CPINTC_CH_MAP_REG21_CH_MAP_85_RESETVAL (0x00000000u)
  15290. #define CSL_CPINTC_CH_MAP_REG21_CH_MAP_86_MASK (0x00FF0000u)
  15291. #define CSL_CPINTC_CH_MAP_REG21_CH_MAP_86_SHIFT (0x00000010u)
  15292. #define CSL_CPINTC_CH_MAP_REG21_CH_MAP_86_RESETVAL (0x00000000u)
  15293. #define CSL_CPINTC_CH_MAP_REG21_CH_MAP_87_MASK (0xFF000000u)
  15294. #define CSL_CPINTC_CH_MAP_REG21_CH_MAP_87_SHIFT (0x00000018u)
  15295. #define CSL_CPINTC_CH_MAP_REG21_CH_MAP_87_RESETVAL (0x00000000u)
  15296. #define CSL_CPINTC_CH_MAP_REG21_RESETVAL (0x00000000u)
  15297. /* ch_map_reg22 */
  15298. #define CSL_CPINTC_CH_MAP_REG22_CH_MAP_88_MASK (0x000000FFu)
  15299. #define CSL_CPINTC_CH_MAP_REG22_CH_MAP_88_SHIFT (0x00000000u)
  15300. #define CSL_CPINTC_CH_MAP_REG22_CH_MAP_88_RESETVAL (0x00000000u)
  15301. #define CSL_CPINTC_CH_MAP_REG22_CH_MAP_89_MASK (0x0000FF00u)
  15302. #define CSL_CPINTC_CH_MAP_REG22_CH_MAP_89_SHIFT (0x00000008u)
  15303. #define CSL_CPINTC_CH_MAP_REG22_CH_MAP_89_RESETVAL (0x00000000u)
  15304. #define CSL_CPINTC_CH_MAP_REG22_CH_MAP_90_MASK (0x00FF0000u)
  15305. #define CSL_CPINTC_CH_MAP_REG22_CH_MAP_90_SHIFT (0x00000010u)
  15306. #define CSL_CPINTC_CH_MAP_REG22_CH_MAP_90_RESETVAL (0x00000000u)
  15307. #define CSL_CPINTC_CH_MAP_REG22_CH_MAP_91_MASK (0xFF000000u)
  15308. #define CSL_CPINTC_CH_MAP_REG22_CH_MAP_91_SHIFT (0x00000018u)
  15309. #define CSL_CPINTC_CH_MAP_REG22_CH_MAP_91_RESETVAL (0x00000000u)
  15310. #define CSL_CPINTC_CH_MAP_REG22_RESETVAL (0x00000000u)
  15311. /* ch_map_reg23 */
  15312. #define CSL_CPINTC_CH_MAP_REG23_CH_MAP_92_MASK (0x000000FFu)
  15313. #define CSL_CPINTC_CH_MAP_REG23_CH_MAP_92_SHIFT (0x00000000u)
  15314. #define CSL_CPINTC_CH_MAP_REG23_CH_MAP_92_RESETVAL (0x00000000u)
  15315. #define CSL_CPINTC_CH_MAP_REG23_CH_MAP_93_MASK (0x0000FF00u)
  15316. #define CSL_CPINTC_CH_MAP_REG23_CH_MAP_93_SHIFT (0x00000008u)
  15317. #define CSL_CPINTC_CH_MAP_REG23_CH_MAP_93_RESETVAL (0x00000000u)
  15318. #define CSL_CPINTC_CH_MAP_REG23_CH_MAP_94_MASK (0x00FF0000u)
  15319. #define CSL_CPINTC_CH_MAP_REG23_CH_MAP_94_SHIFT (0x00000010u)
  15320. #define CSL_CPINTC_CH_MAP_REG23_CH_MAP_94_RESETVAL (0x00000000u)
  15321. #define CSL_CPINTC_CH_MAP_REG23_CH_MAP_95_MASK (0xFF000000u)
  15322. #define CSL_CPINTC_CH_MAP_REG23_CH_MAP_95_SHIFT (0x00000018u)
  15323. #define CSL_CPINTC_CH_MAP_REG23_CH_MAP_95_RESETVAL (0x00000000u)
  15324. #define CSL_CPINTC_CH_MAP_REG23_RESETVAL (0x00000000u)
  15325. /* ch_map_reg24 */
  15326. #define CSL_CPINTC_CH_MAP_REG24_CH_MAP_96_MASK (0x000000FFu)
  15327. #define CSL_CPINTC_CH_MAP_REG24_CH_MAP_96_SHIFT (0x00000000u)
  15328. #define CSL_CPINTC_CH_MAP_REG24_CH_MAP_96_RESETVAL (0x00000000u)
  15329. #define CSL_CPINTC_CH_MAP_REG24_CH_MAP_97_MASK (0x0000FF00u)
  15330. #define CSL_CPINTC_CH_MAP_REG24_CH_MAP_97_SHIFT (0x00000008u)
  15331. #define CSL_CPINTC_CH_MAP_REG24_CH_MAP_97_RESETVAL (0x00000000u)
  15332. #define CSL_CPINTC_CH_MAP_REG24_CH_MAP_98_MASK (0x00FF0000u)
  15333. #define CSL_CPINTC_CH_MAP_REG24_CH_MAP_98_SHIFT (0x00000010u)
  15334. #define CSL_CPINTC_CH_MAP_REG24_CH_MAP_98_RESETVAL (0x00000000u)
  15335. #define CSL_CPINTC_CH_MAP_REG24_CH_MAP_99_MASK (0xFF000000u)
  15336. #define CSL_CPINTC_CH_MAP_REG24_CH_MAP_99_SHIFT (0x00000018u)
  15337. #define CSL_CPINTC_CH_MAP_REG24_CH_MAP_99_RESETVAL (0x00000000u)
  15338. #define CSL_CPINTC_CH_MAP_REG24_RESETVAL (0x00000000u)
  15339. /* ch_map_reg25 */
  15340. #define CSL_CPINTC_CH_MAP_REG25_CH_MAP_100_MASK (0x000000FFu)
  15341. #define CSL_CPINTC_CH_MAP_REG25_CH_MAP_100_SHIFT (0x00000000u)
  15342. #define CSL_CPINTC_CH_MAP_REG25_CH_MAP_100_RESETVAL (0x00000000u)
  15343. #define CSL_CPINTC_CH_MAP_REG25_CH_MAP_101_MASK (0x0000FF00u)
  15344. #define CSL_CPINTC_CH_MAP_REG25_CH_MAP_101_SHIFT (0x00000008u)
  15345. #define CSL_CPINTC_CH_MAP_REG25_CH_MAP_101_RESETVAL (0x00000000u)
  15346. #define CSL_CPINTC_CH_MAP_REG25_CH_MAP_102_MASK (0x00FF0000u)
  15347. #define CSL_CPINTC_CH_MAP_REG25_CH_MAP_102_SHIFT (0x00000010u)
  15348. #define CSL_CPINTC_CH_MAP_REG25_CH_MAP_102_RESETVAL (0x00000000u)
  15349. #define CSL_CPINTC_CH_MAP_REG25_CH_MAP_103_MASK (0xFF000000u)
  15350. #define CSL_CPINTC_CH_MAP_REG25_CH_MAP_103_SHIFT (0x00000018u)
  15351. #define CSL_CPINTC_CH_MAP_REG25_CH_MAP_103_RESETVAL (0x00000000u)
  15352. #define CSL_CPINTC_CH_MAP_REG25_RESETVAL (0x00000000u)
  15353. /* ch_map_reg26 */
  15354. #define CSL_CPINTC_CH_MAP_REG26_CH_MAP_104_MASK (0x000000FFu)
  15355. #define CSL_CPINTC_CH_MAP_REG26_CH_MAP_104_SHIFT (0x00000000u)
  15356. #define CSL_CPINTC_CH_MAP_REG26_CH_MAP_104_RESETVAL (0x00000000u)
  15357. #define CSL_CPINTC_CH_MAP_REG26_CH_MAP_105_MASK (0x0000FF00u)
  15358. #define CSL_CPINTC_CH_MAP_REG26_CH_MAP_105_SHIFT (0x00000008u)
  15359. #define CSL_CPINTC_CH_MAP_REG26_CH_MAP_105_RESETVAL (0x00000000u)
  15360. #define CSL_CPINTC_CH_MAP_REG26_CH_MAP_106_MASK (0x00FF0000u)
  15361. #define CSL_CPINTC_CH_MAP_REG26_CH_MAP_106_SHIFT (0x00000010u)
  15362. #define CSL_CPINTC_CH_MAP_REG26_CH_MAP_106_RESETVAL (0x00000000u)
  15363. #define CSL_CPINTC_CH_MAP_REG26_CH_MAP_107_MASK (0xFF000000u)
  15364. #define CSL_CPINTC_CH_MAP_REG26_CH_MAP_107_SHIFT (0x00000018u)
  15365. #define CSL_CPINTC_CH_MAP_REG26_CH_MAP_107_RESETVAL (0x00000000u)
  15366. #define CSL_CPINTC_CH_MAP_REG26_RESETVAL (0x00000000u)
  15367. /* ch_map_reg27 */
  15368. #define CSL_CPINTC_CH_MAP_REG27_CH_MAP_108_MASK (0x000000FFu)
  15369. #define CSL_CPINTC_CH_MAP_REG27_CH_MAP_108_SHIFT (0x00000000u)
  15370. #define CSL_CPINTC_CH_MAP_REG27_CH_MAP_108_RESETVAL (0x00000000u)
  15371. #define CSL_CPINTC_CH_MAP_REG27_CH_MAP_109_MASK (0x0000FF00u)
  15372. #define CSL_CPINTC_CH_MAP_REG27_CH_MAP_109_SHIFT (0x00000008u)
  15373. #define CSL_CPINTC_CH_MAP_REG27_CH_MAP_109_RESETVAL (0x00000000u)
  15374. #define CSL_CPINTC_CH_MAP_REG27_CH_MAP_110_MASK (0x00FF0000u)
  15375. #define CSL_CPINTC_CH_MAP_REG27_CH_MAP_110_SHIFT (0x00000010u)
  15376. #define CSL_CPINTC_CH_MAP_REG27_CH_MAP_110_RESETVAL (0x00000000u)
  15377. #define CSL_CPINTC_CH_MAP_REG27_CH_MAP_111_MASK (0xFF000000u)
  15378. #define CSL_CPINTC_CH_MAP_REG27_CH_MAP_111_SHIFT (0x00000018u)
  15379. #define CSL_CPINTC_CH_MAP_REG27_CH_MAP_111_RESETVAL (0x00000000u)
  15380. #define CSL_CPINTC_CH_MAP_REG27_RESETVAL (0x00000000u)
  15381. /* ch_map_reg28 */
  15382. #define CSL_CPINTC_CH_MAP_REG28_CH_MAP_112_MASK (0x000000FFu)
  15383. #define CSL_CPINTC_CH_MAP_REG28_CH_MAP_112_SHIFT (0x00000000u)
  15384. #define CSL_CPINTC_CH_MAP_REG28_CH_MAP_112_RESETVAL (0x00000000u)
  15385. #define CSL_CPINTC_CH_MAP_REG28_CH_MAP_113_MASK (0x0000FF00u)
  15386. #define CSL_CPINTC_CH_MAP_REG28_CH_MAP_113_SHIFT (0x00000008u)
  15387. #define CSL_CPINTC_CH_MAP_REG28_CH_MAP_113_RESETVAL (0x00000000u)
  15388. #define CSL_CPINTC_CH_MAP_REG28_CH_MAP_114_MASK (0x00FF0000u)
  15389. #define CSL_CPINTC_CH_MAP_REG28_CH_MAP_114_SHIFT (0x00000010u)
  15390. #define CSL_CPINTC_CH_MAP_REG28_CH_MAP_114_RESETVAL (0x00000000u)
  15391. #define CSL_CPINTC_CH_MAP_REG28_CH_MAP_115_MASK (0xFF000000u)
  15392. #define CSL_CPINTC_CH_MAP_REG28_CH_MAP_115_SHIFT (0x00000018u)
  15393. #define CSL_CPINTC_CH_MAP_REG28_CH_MAP_115_RESETVAL (0x00000000u)
  15394. #define CSL_CPINTC_CH_MAP_REG28_RESETVAL (0x00000000u)
  15395. /* ch_map_reg29 */
  15396. #define CSL_CPINTC_CH_MAP_REG29_CH_MAP_116_MASK (0x000000FFu)
  15397. #define CSL_CPINTC_CH_MAP_REG29_CH_MAP_116_SHIFT (0x00000000u)
  15398. #define CSL_CPINTC_CH_MAP_REG29_CH_MAP_116_RESETVAL (0x00000000u)
  15399. #define CSL_CPINTC_CH_MAP_REG29_CH_MAP_117_MASK (0x0000FF00u)
  15400. #define CSL_CPINTC_CH_MAP_REG29_CH_MAP_117_SHIFT (0x00000008u)
  15401. #define CSL_CPINTC_CH_MAP_REG29_CH_MAP_117_RESETVAL (0x00000000u)
  15402. #define CSL_CPINTC_CH_MAP_REG29_CH_MAP_118_MASK (0x00FF0000u)
  15403. #define CSL_CPINTC_CH_MAP_REG29_CH_MAP_118_SHIFT (0x00000010u)
  15404. #define CSL_CPINTC_CH_MAP_REG29_CH_MAP_118_RESETVAL (0x00000000u)
  15405. #define CSL_CPINTC_CH_MAP_REG29_CH_MAP_119_MASK (0xFF000000u)
  15406. #define CSL_CPINTC_CH_MAP_REG29_CH_MAP_119_SHIFT (0x00000018u)
  15407. #define CSL_CPINTC_CH_MAP_REG29_CH_MAP_119_RESETVAL (0x00000000u)
  15408. #define CSL_CPINTC_CH_MAP_REG29_RESETVAL (0x00000000u)
  15409. /* ch_map_reg30 */
  15410. #define CSL_CPINTC_CH_MAP_REG30_CH_MAP_120_MASK (0x000000FFu)
  15411. #define CSL_CPINTC_CH_MAP_REG30_CH_MAP_120_SHIFT (0x00000000u)
  15412. #define CSL_CPINTC_CH_MAP_REG30_CH_MAP_120_RESETVAL (0x00000000u)
  15413. #define CSL_CPINTC_CH_MAP_REG30_CH_MAP_121_MASK (0x0000FF00u)
  15414. #define CSL_CPINTC_CH_MAP_REG30_CH_MAP_121_SHIFT (0x00000008u)
  15415. #define CSL_CPINTC_CH_MAP_REG30_CH_MAP_121_RESETVAL (0x00000000u)
  15416. #define CSL_CPINTC_CH_MAP_REG30_CH_MAP_122_MASK (0x00FF0000u)
  15417. #define CSL_CPINTC_CH_MAP_REG30_CH_MAP_122_SHIFT (0x00000010u)
  15418. #define CSL_CPINTC_CH_MAP_REG30_CH_MAP_122_RESETVAL (0x00000000u)
  15419. #define CSL_CPINTC_CH_MAP_REG30_CH_MAP_123_MASK (0xFF000000u)
  15420. #define CSL_CPINTC_CH_MAP_REG30_CH_MAP_123_SHIFT (0x00000018u)
  15421. #define CSL_CPINTC_CH_MAP_REG30_CH_MAP_123_RESETVAL (0x00000000u)
  15422. #define CSL_CPINTC_CH_MAP_REG30_RESETVAL (0x00000000u)
  15423. /* ch_map_reg31 */
  15424. #define CSL_CPINTC_CH_MAP_REG31_CH_MAP_124_MASK (0x000000FFu)
  15425. #define CSL_CPINTC_CH_MAP_REG31_CH_MAP_124_SHIFT (0x00000000u)
  15426. #define CSL_CPINTC_CH_MAP_REG31_CH_MAP_124_RESETVAL (0x00000000u)
  15427. #define CSL_CPINTC_CH_MAP_REG31_CH_MAP_125_MASK (0x0000FF00u)
  15428. #define CSL_CPINTC_CH_MAP_REG31_CH_MAP_125_SHIFT (0x00000008u)
  15429. #define CSL_CPINTC_CH_MAP_REG31_CH_MAP_125_RESETVAL (0x00000000u)
  15430. #define CSL_CPINTC_CH_MAP_REG31_CH_MAP_126_MASK (0x00FF0000u)
  15431. #define CSL_CPINTC_CH_MAP_REG31_CH_MAP_126_SHIFT (0x00000010u)
  15432. #define CSL_CPINTC_CH_MAP_REG31_CH_MAP_126_RESETVAL (0x00000000u)
  15433. #define CSL_CPINTC_CH_MAP_REG31_CH_MAP_127_MASK (0xFF000000u)
  15434. #define CSL_CPINTC_CH_MAP_REG31_CH_MAP_127_SHIFT (0x00000018u)
  15435. #define CSL_CPINTC_CH_MAP_REG31_CH_MAP_127_RESETVAL (0x00000000u)
  15436. #define CSL_CPINTC_CH_MAP_REG31_RESETVAL (0x00000000u)
  15437. /* ch_map_reg32 */
  15438. #define CSL_CPINTC_CH_MAP_REG32_CH_MAP_128_MASK (0x000000FFu)
  15439. #define CSL_CPINTC_CH_MAP_REG32_CH_MAP_128_SHIFT (0x00000000u)
  15440. #define CSL_CPINTC_CH_MAP_REG32_CH_MAP_128_RESETVAL (0x00000000u)
  15441. #define CSL_CPINTC_CH_MAP_REG32_CH_MAP_129_MASK (0x0000FF00u)
  15442. #define CSL_CPINTC_CH_MAP_REG32_CH_MAP_129_SHIFT (0x00000008u)
  15443. #define CSL_CPINTC_CH_MAP_REG32_CH_MAP_129_RESETVAL (0x00000000u)
  15444. #define CSL_CPINTC_CH_MAP_REG32_CH_MAP_130_MASK (0x00FF0000u)
  15445. #define CSL_CPINTC_CH_MAP_REG32_CH_MAP_130_SHIFT (0x00000010u)
  15446. #define CSL_CPINTC_CH_MAP_REG32_CH_MAP_130_RESETVAL (0x00000000u)
  15447. #define CSL_CPINTC_CH_MAP_REG32_CH_MAP_131_MASK (0xFF000000u)
  15448. #define CSL_CPINTC_CH_MAP_REG32_CH_MAP_131_SHIFT (0x00000018u)
  15449. #define CSL_CPINTC_CH_MAP_REG32_CH_MAP_131_RESETVAL (0x00000000u)
  15450. #define CSL_CPINTC_CH_MAP_REG32_RESETVAL (0x00000000u)
  15451. /* ch_map_reg33 */
  15452. #define CSL_CPINTC_CH_MAP_REG33_CH_MAP_132_MASK (0x000000FFu)
  15453. #define CSL_CPINTC_CH_MAP_REG33_CH_MAP_132_SHIFT (0x00000000u)
  15454. #define CSL_CPINTC_CH_MAP_REG33_CH_MAP_132_RESETVAL (0x00000000u)
  15455. #define CSL_CPINTC_CH_MAP_REG33_CH_MAP_133_MASK (0x0000FF00u)
  15456. #define CSL_CPINTC_CH_MAP_REG33_CH_MAP_133_SHIFT (0x00000008u)
  15457. #define CSL_CPINTC_CH_MAP_REG33_CH_MAP_133_RESETVAL (0x00000000u)
  15458. #define CSL_CPINTC_CH_MAP_REG33_CH_MAP_134_MASK (0x00FF0000u)
  15459. #define CSL_CPINTC_CH_MAP_REG33_CH_MAP_134_SHIFT (0x00000010u)
  15460. #define CSL_CPINTC_CH_MAP_REG33_CH_MAP_134_RESETVAL (0x00000000u)
  15461. #define CSL_CPINTC_CH_MAP_REG33_CH_MAP_135_MASK (0xFF000000u)
  15462. #define CSL_CPINTC_CH_MAP_REG33_CH_MAP_135_SHIFT (0x00000018u)
  15463. #define CSL_CPINTC_CH_MAP_REG33_CH_MAP_135_RESETVAL (0x00000000u)
  15464. #define CSL_CPINTC_CH_MAP_REG33_RESETVAL (0x00000000u)
  15465. /* ch_map_reg34 */
  15466. #define CSL_CPINTC_CH_MAP_REG34_CH_MAP_136_MASK (0x000000FFu)
  15467. #define CSL_CPINTC_CH_MAP_REG34_CH_MAP_136_SHIFT (0x00000000u)
  15468. #define CSL_CPINTC_CH_MAP_REG34_CH_MAP_136_RESETVAL (0x00000000u)
  15469. #define CSL_CPINTC_CH_MAP_REG34_CH_MAP_137_MASK (0x0000FF00u)
  15470. #define CSL_CPINTC_CH_MAP_REG34_CH_MAP_137_SHIFT (0x00000008u)
  15471. #define CSL_CPINTC_CH_MAP_REG34_CH_MAP_137_RESETVAL (0x00000000u)
  15472. #define CSL_CPINTC_CH_MAP_REG34_CH_MAP_138_MASK (0x00FF0000u)
  15473. #define CSL_CPINTC_CH_MAP_REG34_CH_MAP_138_SHIFT (0x00000010u)
  15474. #define CSL_CPINTC_CH_MAP_REG34_CH_MAP_138_RESETVAL (0x00000000u)
  15475. #define CSL_CPINTC_CH_MAP_REG34_CH_MAP_139_MASK (0xFF000000u)
  15476. #define CSL_CPINTC_CH_MAP_REG34_CH_MAP_139_SHIFT (0x00000018u)
  15477. #define CSL_CPINTC_CH_MAP_REG34_CH_MAP_139_RESETVAL (0x00000000u)
  15478. #define CSL_CPINTC_CH_MAP_REG34_RESETVAL (0x00000000u)
  15479. /* ch_map_reg35 */
  15480. #define CSL_CPINTC_CH_MAP_REG35_CH_MAP_140_MASK (0x000000FFu)
  15481. #define CSL_CPINTC_CH_MAP_REG35_CH_MAP_140_SHIFT (0x00000000u)
  15482. #define CSL_CPINTC_CH_MAP_REG35_CH_MAP_140_RESETVAL (0x00000000u)
  15483. #define CSL_CPINTC_CH_MAP_REG35_CH_MAP_141_MASK (0x0000FF00u)
  15484. #define CSL_CPINTC_CH_MAP_REG35_CH_MAP_141_SHIFT (0x00000008u)
  15485. #define CSL_CPINTC_CH_MAP_REG35_CH_MAP_141_RESETVAL (0x00000000u)
  15486. #define CSL_CPINTC_CH_MAP_REG35_CH_MAP_142_MASK (0x00FF0000u)
  15487. #define CSL_CPINTC_CH_MAP_REG35_CH_MAP_142_SHIFT (0x00000010u)
  15488. #define CSL_CPINTC_CH_MAP_REG35_CH_MAP_142_RESETVAL (0x00000000u)
  15489. #define CSL_CPINTC_CH_MAP_REG35_CH_MAP_143_MASK (0xFF000000u)
  15490. #define CSL_CPINTC_CH_MAP_REG35_CH_MAP_143_SHIFT (0x00000018u)
  15491. #define CSL_CPINTC_CH_MAP_REG35_CH_MAP_143_RESETVAL (0x00000000u)
  15492. #define CSL_CPINTC_CH_MAP_REG35_RESETVAL (0x00000000u)
  15493. /* ch_map_reg36 */
  15494. #define CSL_CPINTC_CH_MAP_REG36_CH_MAP_144_MASK (0x000000FFu)
  15495. #define CSL_CPINTC_CH_MAP_REG36_CH_MAP_144_SHIFT (0x00000000u)
  15496. #define CSL_CPINTC_CH_MAP_REG36_CH_MAP_144_RESETVAL (0x00000000u)
  15497. #define CSL_CPINTC_CH_MAP_REG36_CH_MAP_145_MASK (0x0000FF00u)
  15498. #define CSL_CPINTC_CH_MAP_REG36_CH_MAP_145_SHIFT (0x00000008u)
  15499. #define CSL_CPINTC_CH_MAP_REG36_CH_MAP_145_RESETVAL (0x00000000u)
  15500. #define CSL_CPINTC_CH_MAP_REG36_CH_MAP_146_MASK (0x00FF0000u)
  15501. #define CSL_CPINTC_CH_MAP_REG36_CH_MAP_146_SHIFT (0x00000010u)
  15502. #define CSL_CPINTC_CH_MAP_REG36_CH_MAP_146_RESETVAL (0x00000000u)
  15503. #define CSL_CPINTC_CH_MAP_REG36_CH_MAP_147_MASK (0xFF000000u)
  15504. #define CSL_CPINTC_CH_MAP_REG36_CH_MAP_147_SHIFT (0x00000018u)
  15505. #define CSL_CPINTC_CH_MAP_REG36_CH_MAP_147_RESETVAL (0x00000000u)
  15506. #define CSL_CPINTC_CH_MAP_REG36_RESETVAL (0x00000000u)
  15507. /* ch_map_reg37 */
  15508. #define CSL_CPINTC_CH_MAP_REG37_CH_MAP_148_MASK (0x000000FFu)
  15509. #define CSL_CPINTC_CH_MAP_REG37_CH_MAP_148_SHIFT (0x00000000u)
  15510. #define CSL_CPINTC_CH_MAP_REG37_CH_MAP_148_RESETVAL (0x00000000u)
  15511. #define CSL_CPINTC_CH_MAP_REG37_CH_MAP_149_MASK (0x0000FF00u)
  15512. #define CSL_CPINTC_CH_MAP_REG37_CH_MAP_149_SHIFT (0x00000008u)
  15513. #define CSL_CPINTC_CH_MAP_REG37_CH_MAP_149_RESETVAL (0x00000000u)
  15514. #define CSL_CPINTC_CH_MAP_REG37_CH_MAP_150_MASK (0x00FF0000u)
  15515. #define CSL_CPINTC_CH_MAP_REG37_CH_MAP_150_SHIFT (0x00000010u)
  15516. #define CSL_CPINTC_CH_MAP_REG37_CH_MAP_150_RESETVAL (0x00000000u)
  15517. #define CSL_CPINTC_CH_MAP_REG37_CH_MAP_151_MASK (0xFF000000u)
  15518. #define CSL_CPINTC_CH_MAP_REG37_CH_MAP_151_SHIFT (0x00000018u)
  15519. #define CSL_CPINTC_CH_MAP_REG37_CH_MAP_151_RESETVAL (0x00000000u)
  15520. #define CSL_CPINTC_CH_MAP_REG37_RESETVAL (0x00000000u)
  15521. /* ch_map_reg38 */
  15522. #define CSL_CPINTC_CH_MAP_REG38_CH_MAP_152_MASK (0x000000FFu)
  15523. #define CSL_CPINTC_CH_MAP_REG38_CH_MAP_152_SHIFT (0x00000000u)
  15524. #define CSL_CPINTC_CH_MAP_REG38_CH_MAP_152_RESETVAL (0x00000000u)
  15525. #define CSL_CPINTC_CH_MAP_REG38_CH_MAP_153_MASK (0x0000FF00u)
  15526. #define CSL_CPINTC_CH_MAP_REG38_CH_MAP_153_SHIFT (0x00000008u)
  15527. #define CSL_CPINTC_CH_MAP_REG38_CH_MAP_153_RESETVAL (0x00000000u)
  15528. #define CSL_CPINTC_CH_MAP_REG38_CH_MAP_154_MASK (0x00FF0000u)
  15529. #define CSL_CPINTC_CH_MAP_REG38_CH_MAP_154_SHIFT (0x00000010u)
  15530. #define CSL_CPINTC_CH_MAP_REG38_CH_MAP_154_RESETVAL (0x00000000u)
  15531. #define CSL_CPINTC_CH_MAP_REG38_CH_MAP_155_MASK (0xFF000000u)
  15532. #define CSL_CPINTC_CH_MAP_REG38_CH_MAP_155_SHIFT (0x00000018u)
  15533. #define CSL_CPINTC_CH_MAP_REG38_CH_MAP_155_RESETVAL (0x00000000u)
  15534. #define CSL_CPINTC_CH_MAP_REG38_RESETVAL (0x00000000u)
  15535. /* ch_map_reg39 */
  15536. #define CSL_CPINTC_CH_MAP_REG39_CH_MAP_156_MASK (0x000000FFu)
  15537. #define CSL_CPINTC_CH_MAP_REG39_CH_MAP_156_SHIFT (0x00000000u)
  15538. #define CSL_CPINTC_CH_MAP_REG39_CH_MAP_156_RESETVAL (0x00000000u)
  15539. #define CSL_CPINTC_CH_MAP_REG39_CH_MAP_157_MASK (0x0000FF00u)
  15540. #define CSL_CPINTC_CH_MAP_REG39_CH_MAP_157_SHIFT (0x00000008u)
  15541. #define CSL_CPINTC_CH_MAP_REG39_CH_MAP_157_RESETVAL (0x00000000u)
  15542. #define CSL_CPINTC_CH_MAP_REG39_CH_MAP_158_MASK (0x00FF0000u)
  15543. #define CSL_CPINTC_CH_MAP_REG39_CH_MAP_158_SHIFT (0x00000010u)
  15544. #define CSL_CPINTC_CH_MAP_REG39_CH_MAP_158_RESETVAL (0x00000000u)
  15545. #define CSL_CPINTC_CH_MAP_REG39_CH_MAP_159_MASK (0xFF000000u)
  15546. #define CSL_CPINTC_CH_MAP_REG39_CH_MAP_159_SHIFT (0x00000018u)
  15547. #define CSL_CPINTC_CH_MAP_REG39_CH_MAP_159_RESETVAL (0x00000000u)
  15548. #define CSL_CPINTC_CH_MAP_REG39_RESETVAL (0x00000000u)
  15549. /* ch_map_reg40 */
  15550. #define CSL_CPINTC_CH_MAP_REG40_CH_MAP_160_MASK (0x000000FFu)
  15551. #define CSL_CPINTC_CH_MAP_REG40_CH_MAP_160_SHIFT (0x00000000u)
  15552. #define CSL_CPINTC_CH_MAP_REG40_CH_MAP_160_RESETVAL (0x00000000u)
  15553. #define CSL_CPINTC_CH_MAP_REG40_CH_MAP_161_MASK (0x0000FF00u)
  15554. #define CSL_CPINTC_CH_MAP_REG40_CH_MAP_161_SHIFT (0x00000008u)
  15555. #define CSL_CPINTC_CH_MAP_REG40_CH_MAP_161_RESETVAL (0x00000000u)
  15556. #define CSL_CPINTC_CH_MAP_REG40_CH_MAP_162_MASK (0x00FF0000u)
  15557. #define CSL_CPINTC_CH_MAP_REG40_CH_MAP_162_SHIFT (0x00000010u)
  15558. #define CSL_CPINTC_CH_MAP_REG40_CH_MAP_162_RESETVAL (0x00000000u)
  15559. #define CSL_CPINTC_CH_MAP_REG40_CH_MAP_163_MASK (0xFF000000u)
  15560. #define CSL_CPINTC_CH_MAP_REG40_CH_MAP_163_SHIFT (0x00000018u)
  15561. #define CSL_CPINTC_CH_MAP_REG40_CH_MAP_163_RESETVAL (0x00000000u)
  15562. #define CSL_CPINTC_CH_MAP_REG40_RESETVAL (0x00000000u)
  15563. /* ch_map_reg41 */
  15564. #define CSL_CPINTC_CH_MAP_REG41_CH_MAP_164_MASK (0x000000FFu)
  15565. #define CSL_CPINTC_CH_MAP_REG41_CH_MAP_164_SHIFT (0x00000000u)
  15566. #define CSL_CPINTC_CH_MAP_REG41_CH_MAP_164_RESETVAL (0x00000000u)
  15567. #define CSL_CPINTC_CH_MAP_REG41_CH_MAP_165_MASK (0x0000FF00u)
  15568. #define CSL_CPINTC_CH_MAP_REG41_CH_MAP_165_SHIFT (0x00000008u)
  15569. #define CSL_CPINTC_CH_MAP_REG41_CH_MAP_165_RESETVAL (0x00000000u)
  15570. #define CSL_CPINTC_CH_MAP_REG41_CH_MAP_166_MASK (0x00FF0000u)
  15571. #define CSL_CPINTC_CH_MAP_REG41_CH_MAP_166_SHIFT (0x00000010u)
  15572. #define CSL_CPINTC_CH_MAP_REG41_CH_MAP_166_RESETVAL (0x00000000u)
  15573. #define CSL_CPINTC_CH_MAP_REG41_CH_MAP_167_MASK (0xFF000000u)
  15574. #define CSL_CPINTC_CH_MAP_REG41_CH_MAP_167_SHIFT (0x00000018u)
  15575. #define CSL_CPINTC_CH_MAP_REG41_CH_MAP_167_RESETVAL (0x00000000u)
  15576. #define CSL_CPINTC_CH_MAP_REG41_RESETVAL (0x00000000u)
  15577. /* ch_map_reg42 */
  15578. #define CSL_CPINTC_CH_MAP_REG42_CH_MAP_168_MASK (0x000000FFu)
  15579. #define CSL_CPINTC_CH_MAP_REG42_CH_MAP_168_SHIFT (0x00000000u)
  15580. #define CSL_CPINTC_CH_MAP_REG42_CH_MAP_168_RESETVAL (0x00000000u)
  15581. #define CSL_CPINTC_CH_MAP_REG42_CH_MAP_169_MASK (0x0000FF00u)
  15582. #define CSL_CPINTC_CH_MAP_REG42_CH_MAP_169_SHIFT (0x00000008u)
  15583. #define CSL_CPINTC_CH_MAP_REG42_CH_MAP_169_RESETVAL (0x00000000u)
  15584. #define CSL_CPINTC_CH_MAP_REG42_CH_MAP_170_MASK (0x00FF0000u)
  15585. #define CSL_CPINTC_CH_MAP_REG42_CH_MAP_170_SHIFT (0x00000010u)
  15586. #define CSL_CPINTC_CH_MAP_REG42_CH_MAP_170_RESETVAL (0x00000000u)
  15587. #define CSL_CPINTC_CH_MAP_REG42_CH_MAP_171_MASK (0xFF000000u)
  15588. #define CSL_CPINTC_CH_MAP_REG42_CH_MAP_171_SHIFT (0x00000018u)
  15589. #define CSL_CPINTC_CH_MAP_REG42_CH_MAP_171_RESETVAL (0x00000000u)
  15590. #define CSL_CPINTC_CH_MAP_REG42_RESETVAL (0x00000000u)
  15591. /* ch_map_reg43 */
  15592. #define CSL_CPINTC_CH_MAP_REG43_CH_MAP_172_MASK (0x000000FFu)
  15593. #define CSL_CPINTC_CH_MAP_REG43_CH_MAP_172_SHIFT (0x00000000u)
  15594. #define CSL_CPINTC_CH_MAP_REG43_CH_MAP_172_RESETVAL (0x00000000u)
  15595. #define CSL_CPINTC_CH_MAP_REG43_CH_MAP_173_MASK (0x0000FF00u)
  15596. #define CSL_CPINTC_CH_MAP_REG43_CH_MAP_173_SHIFT (0x00000008u)
  15597. #define CSL_CPINTC_CH_MAP_REG43_CH_MAP_173_RESETVAL (0x00000000u)
  15598. #define CSL_CPINTC_CH_MAP_REG43_CH_MAP_174_MASK (0x00FF0000u)
  15599. #define CSL_CPINTC_CH_MAP_REG43_CH_MAP_174_SHIFT (0x00000010u)
  15600. #define CSL_CPINTC_CH_MAP_REG43_CH_MAP_174_RESETVAL (0x00000000u)
  15601. #define CSL_CPINTC_CH_MAP_REG43_CH_MAP_175_MASK (0xFF000000u)
  15602. #define CSL_CPINTC_CH_MAP_REG43_CH_MAP_175_SHIFT (0x00000018u)
  15603. #define CSL_CPINTC_CH_MAP_REG43_CH_MAP_175_RESETVAL (0x00000000u)
  15604. #define CSL_CPINTC_CH_MAP_REG43_RESETVAL (0x00000000u)
  15605. /* ch_map_reg44 */
  15606. #define CSL_CPINTC_CH_MAP_REG44_CH_MAP_176_MASK (0x000000FFu)
  15607. #define CSL_CPINTC_CH_MAP_REG44_CH_MAP_176_SHIFT (0x00000000u)
  15608. #define CSL_CPINTC_CH_MAP_REG44_CH_MAP_176_RESETVAL (0x00000000u)
  15609. #define CSL_CPINTC_CH_MAP_REG44_CH_MAP_177_MASK (0x0000FF00u)
  15610. #define CSL_CPINTC_CH_MAP_REG44_CH_MAP_177_SHIFT (0x00000008u)
  15611. #define CSL_CPINTC_CH_MAP_REG44_CH_MAP_177_RESETVAL (0x00000000u)
  15612. #define CSL_CPINTC_CH_MAP_REG44_CH_MAP_178_MASK (0x00FF0000u)
  15613. #define CSL_CPINTC_CH_MAP_REG44_CH_MAP_178_SHIFT (0x00000010u)
  15614. #define CSL_CPINTC_CH_MAP_REG44_CH_MAP_178_RESETVAL (0x00000000u)
  15615. #define CSL_CPINTC_CH_MAP_REG44_CH_MAP_179_MASK (0xFF000000u)
  15616. #define CSL_CPINTC_CH_MAP_REG44_CH_MAP_179_SHIFT (0x00000018u)
  15617. #define CSL_CPINTC_CH_MAP_REG44_CH_MAP_179_RESETVAL (0x00000000u)
  15618. #define CSL_CPINTC_CH_MAP_REG44_RESETVAL (0x00000000u)
  15619. /* ch_map_reg45 */
  15620. #define CSL_CPINTC_CH_MAP_REG45_CH_MAP_180_MASK (0x000000FFu)
  15621. #define CSL_CPINTC_CH_MAP_REG45_CH_MAP_180_SHIFT (0x00000000u)
  15622. #define CSL_CPINTC_CH_MAP_REG45_CH_MAP_180_RESETVAL (0x00000000u)
  15623. #define CSL_CPINTC_CH_MAP_REG45_CH_MAP_181_MASK (0x0000FF00u)
  15624. #define CSL_CPINTC_CH_MAP_REG45_CH_MAP_181_SHIFT (0x00000008u)
  15625. #define CSL_CPINTC_CH_MAP_REG45_CH_MAP_181_RESETVAL (0x00000000u)
  15626. #define CSL_CPINTC_CH_MAP_REG45_CH_MAP_182_MASK (0x00FF0000u)
  15627. #define CSL_CPINTC_CH_MAP_REG45_CH_MAP_182_SHIFT (0x00000010u)
  15628. #define CSL_CPINTC_CH_MAP_REG45_CH_MAP_182_RESETVAL (0x00000000u)
  15629. #define CSL_CPINTC_CH_MAP_REG45_CH_MAP_183_MASK (0xFF000000u)
  15630. #define CSL_CPINTC_CH_MAP_REG45_CH_MAP_183_SHIFT (0x00000018u)
  15631. #define CSL_CPINTC_CH_MAP_REG45_CH_MAP_183_RESETVAL (0x00000000u)
  15632. #define CSL_CPINTC_CH_MAP_REG45_RESETVAL (0x00000000u)
  15633. /* ch_map_reg46 */
  15634. #define CSL_CPINTC_CH_MAP_REG46_CH_MAP_184_MASK (0x000000FFu)
  15635. #define CSL_CPINTC_CH_MAP_REG46_CH_MAP_184_SHIFT (0x00000000u)
  15636. #define CSL_CPINTC_CH_MAP_REG46_CH_MAP_184_RESETVAL (0x00000000u)
  15637. #define CSL_CPINTC_CH_MAP_REG46_CH_MAP_185_MASK (0x0000FF00u)
  15638. #define CSL_CPINTC_CH_MAP_REG46_CH_MAP_185_SHIFT (0x00000008u)
  15639. #define CSL_CPINTC_CH_MAP_REG46_CH_MAP_185_RESETVAL (0x00000000u)
  15640. #define CSL_CPINTC_CH_MAP_REG46_CH_MAP_186_MASK (0x00FF0000u)
  15641. #define CSL_CPINTC_CH_MAP_REG46_CH_MAP_186_SHIFT (0x00000010u)
  15642. #define CSL_CPINTC_CH_MAP_REG46_CH_MAP_186_RESETVAL (0x00000000u)
  15643. #define CSL_CPINTC_CH_MAP_REG46_CH_MAP_187_MASK (0xFF000000u)
  15644. #define CSL_CPINTC_CH_MAP_REG46_CH_MAP_187_SHIFT (0x00000018u)
  15645. #define CSL_CPINTC_CH_MAP_REG46_CH_MAP_187_RESETVAL (0x00000000u)
  15646. #define CSL_CPINTC_CH_MAP_REG46_RESETVAL (0x00000000u)
  15647. /* ch_map_reg47 */
  15648. #define CSL_CPINTC_CH_MAP_REG47_CH_MAP_188_MASK (0x000000FFu)
  15649. #define CSL_CPINTC_CH_MAP_REG47_CH_MAP_188_SHIFT (0x00000000u)
  15650. #define CSL_CPINTC_CH_MAP_REG47_CH_MAP_188_RESETVAL (0x00000000u)
  15651. #define CSL_CPINTC_CH_MAP_REG47_CH_MAP_189_MASK (0x0000FF00u)
  15652. #define CSL_CPINTC_CH_MAP_REG47_CH_MAP_189_SHIFT (0x00000008u)
  15653. #define CSL_CPINTC_CH_MAP_REG47_CH_MAP_189_RESETVAL (0x00000000u)
  15654. #define CSL_CPINTC_CH_MAP_REG47_CH_MAP_190_MASK (0x00FF0000u)
  15655. #define CSL_CPINTC_CH_MAP_REG47_CH_MAP_190_SHIFT (0x00000010u)
  15656. #define CSL_CPINTC_CH_MAP_REG47_CH_MAP_190_RESETVAL (0x00000000u)
  15657. #define CSL_CPINTC_CH_MAP_REG47_CH_MAP_191_MASK (0xFF000000u)
  15658. #define CSL_CPINTC_CH_MAP_REG47_CH_MAP_191_SHIFT (0x00000018u)
  15659. #define CSL_CPINTC_CH_MAP_REG47_CH_MAP_191_RESETVAL (0x00000000u)
  15660. #define CSL_CPINTC_CH_MAP_REG47_RESETVAL (0x00000000u)
  15661. /* ch_map_reg48 */
  15662. #define CSL_CPINTC_CH_MAP_REG48_CH_MAP_192_MASK (0x000000FFu)
  15663. #define CSL_CPINTC_CH_MAP_REG48_CH_MAP_192_SHIFT (0x00000000u)
  15664. #define CSL_CPINTC_CH_MAP_REG48_CH_MAP_192_RESETVAL (0x00000000u)
  15665. #define CSL_CPINTC_CH_MAP_REG48_CH_MAP_193_MASK (0x0000FF00u)
  15666. #define CSL_CPINTC_CH_MAP_REG48_CH_MAP_193_SHIFT (0x00000008u)
  15667. #define CSL_CPINTC_CH_MAP_REG48_CH_MAP_193_RESETVAL (0x00000000u)
  15668. #define CSL_CPINTC_CH_MAP_REG48_CH_MAP_194_MASK (0x00FF0000u)
  15669. #define CSL_CPINTC_CH_MAP_REG48_CH_MAP_194_SHIFT (0x00000010u)
  15670. #define CSL_CPINTC_CH_MAP_REG48_CH_MAP_194_RESETVAL (0x00000000u)
  15671. #define CSL_CPINTC_CH_MAP_REG48_CH_MAP_195_MASK (0xFF000000u)
  15672. #define CSL_CPINTC_CH_MAP_REG48_CH_MAP_195_SHIFT (0x00000018u)
  15673. #define CSL_CPINTC_CH_MAP_REG48_CH_MAP_195_RESETVAL (0x00000000u)
  15674. #define CSL_CPINTC_CH_MAP_REG48_RESETVAL (0x00000000u)
  15675. /* ch_map_reg49 */
  15676. #define CSL_CPINTC_CH_MAP_REG49_CH_MAP_196_MASK (0x000000FFu)
  15677. #define CSL_CPINTC_CH_MAP_REG49_CH_MAP_196_SHIFT (0x00000000u)
  15678. #define CSL_CPINTC_CH_MAP_REG49_CH_MAP_196_RESETVAL (0x00000000u)
  15679. #define CSL_CPINTC_CH_MAP_REG49_CH_MAP_197_MASK (0x0000FF00u)
  15680. #define CSL_CPINTC_CH_MAP_REG49_CH_MAP_197_SHIFT (0x00000008u)
  15681. #define CSL_CPINTC_CH_MAP_REG49_CH_MAP_197_RESETVAL (0x00000000u)
  15682. #define CSL_CPINTC_CH_MAP_REG49_CH_MAP_198_MASK (0x00FF0000u)
  15683. #define CSL_CPINTC_CH_MAP_REG49_CH_MAP_198_SHIFT (0x00000010u)
  15684. #define CSL_CPINTC_CH_MAP_REG49_CH_MAP_198_RESETVAL (0x00000000u)
  15685. #define CSL_CPINTC_CH_MAP_REG49_CH_MAP_199_MASK (0xFF000000u)
  15686. #define CSL_CPINTC_CH_MAP_REG49_CH_MAP_199_SHIFT (0x00000018u)
  15687. #define CSL_CPINTC_CH_MAP_REG49_CH_MAP_199_RESETVAL (0x00000000u)
  15688. #define CSL_CPINTC_CH_MAP_REG49_RESETVAL (0x00000000u)
  15689. /* ch_map_reg50 */
  15690. #define CSL_CPINTC_CH_MAP_REG50_CH_MAP_200_MASK (0x000000FFu)
  15691. #define CSL_CPINTC_CH_MAP_REG50_CH_MAP_200_SHIFT (0x00000000u)
  15692. #define CSL_CPINTC_CH_MAP_REG50_CH_MAP_200_RESETVAL (0x00000000u)
  15693. #define CSL_CPINTC_CH_MAP_REG50_CH_MAP_201_MASK (0x0000FF00u)
  15694. #define CSL_CPINTC_CH_MAP_REG50_CH_MAP_201_SHIFT (0x00000008u)
  15695. #define CSL_CPINTC_CH_MAP_REG50_CH_MAP_201_RESETVAL (0x00000000u)
  15696. #define CSL_CPINTC_CH_MAP_REG50_CH_MAP_202_MASK (0x00FF0000u)
  15697. #define CSL_CPINTC_CH_MAP_REG50_CH_MAP_202_SHIFT (0x00000010u)
  15698. #define CSL_CPINTC_CH_MAP_REG50_CH_MAP_202_RESETVAL (0x00000000u)
  15699. #define CSL_CPINTC_CH_MAP_REG50_CH_MAP_203_MASK (0xFF000000u)
  15700. #define CSL_CPINTC_CH_MAP_REG50_CH_MAP_203_SHIFT (0x00000018u)
  15701. #define CSL_CPINTC_CH_MAP_REG50_CH_MAP_203_RESETVAL (0x00000000u)
  15702. #define CSL_CPINTC_CH_MAP_REG50_RESETVAL (0x00000000u)
  15703. /* ch_map_reg51 */
  15704. #define CSL_CPINTC_CH_MAP_REG51_CH_MAP_204_MASK (0x000000FFu)
  15705. #define CSL_CPINTC_CH_MAP_REG51_CH_MAP_204_SHIFT (0x00000000u)
  15706. #define CSL_CPINTC_CH_MAP_REG51_CH_MAP_204_RESETVAL (0x00000000u)
  15707. #define CSL_CPINTC_CH_MAP_REG51_CH_MAP_205_MASK (0x0000FF00u)
  15708. #define CSL_CPINTC_CH_MAP_REG51_CH_MAP_205_SHIFT (0x00000008u)
  15709. #define CSL_CPINTC_CH_MAP_REG51_CH_MAP_205_RESETVAL (0x00000000u)
  15710. #define CSL_CPINTC_CH_MAP_REG51_CH_MAP_206_MASK (0x00FF0000u)
  15711. #define CSL_CPINTC_CH_MAP_REG51_CH_MAP_206_SHIFT (0x00000010u)
  15712. #define CSL_CPINTC_CH_MAP_REG51_CH_MAP_206_RESETVAL (0x00000000u)
  15713. #define CSL_CPINTC_CH_MAP_REG51_CH_MAP_207_MASK (0xFF000000u)
  15714. #define CSL_CPINTC_CH_MAP_REG51_CH_MAP_207_SHIFT (0x00000018u)
  15715. #define CSL_CPINTC_CH_MAP_REG51_CH_MAP_207_RESETVAL (0x00000000u)
  15716. #define CSL_CPINTC_CH_MAP_REG51_RESETVAL (0x00000000u)
  15717. /* ch_map_reg52 */
  15718. #define CSL_CPINTC_CH_MAP_REG52_CH_MAP_208_MASK (0x000000FFu)
  15719. #define CSL_CPINTC_CH_MAP_REG52_CH_MAP_208_SHIFT (0x00000000u)
  15720. #define CSL_CPINTC_CH_MAP_REG52_CH_MAP_208_RESETVAL (0x00000000u)
  15721. #define CSL_CPINTC_CH_MAP_REG52_CH_MAP_209_MASK (0x0000FF00u)
  15722. #define CSL_CPINTC_CH_MAP_REG52_CH_MAP_209_SHIFT (0x00000008u)
  15723. #define CSL_CPINTC_CH_MAP_REG52_CH_MAP_209_RESETVAL (0x00000000u)
  15724. #define CSL_CPINTC_CH_MAP_REG52_CH_MAP_210_MASK (0x00FF0000u)
  15725. #define CSL_CPINTC_CH_MAP_REG52_CH_MAP_210_SHIFT (0x00000010u)
  15726. #define CSL_CPINTC_CH_MAP_REG52_CH_MAP_210_RESETVAL (0x00000000u)
  15727. #define CSL_CPINTC_CH_MAP_REG52_CH_MAP_211_MASK (0xFF000000u)
  15728. #define CSL_CPINTC_CH_MAP_REG52_CH_MAP_211_SHIFT (0x00000018u)
  15729. #define CSL_CPINTC_CH_MAP_REG52_CH_MAP_211_RESETVAL (0x00000000u)
  15730. #define CSL_CPINTC_CH_MAP_REG52_RESETVAL (0x00000000u)
  15731. /* ch_map_reg53 */
  15732. #define CSL_CPINTC_CH_MAP_REG53_CH_MAP_212_MASK (0x000000FFu)
  15733. #define CSL_CPINTC_CH_MAP_REG53_CH_MAP_212_SHIFT (0x00000000u)
  15734. #define CSL_CPINTC_CH_MAP_REG53_CH_MAP_212_RESETVAL (0x00000000u)
  15735. #define CSL_CPINTC_CH_MAP_REG53_CH_MAP_213_MASK (0x0000FF00u)
  15736. #define CSL_CPINTC_CH_MAP_REG53_CH_MAP_213_SHIFT (0x00000008u)
  15737. #define CSL_CPINTC_CH_MAP_REG53_CH_MAP_213_RESETVAL (0x00000000u)
  15738. #define CSL_CPINTC_CH_MAP_REG53_CH_MAP_214_MASK (0x00FF0000u)
  15739. #define CSL_CPINTC_CH_MAP_REG53_CH_MAP_214_SHIFT (0x00000010u)
  15740. #define CSL_CPINTC_CH_MAP_REG53_CH_MAP_214_RESETVAL (0x00000000u)
  15741. #define CSL_CPINTC_CH_MAP_REG53_CH_MAP_215_MASK (0xFF000000u)
  15742. #define CSL_CPINTC_CH_MAP_REG53_CH_MAP_215_SHIFT (0x00000018u)
  15743. #define CSL_CPINTC_CH_MAP_REG53_CH_MAP_215_RESETVAL (0x00000000u)
  15744. #define CSL_CPINTC_CH_MAP_REG53_RESETVAL (0x00000000u)
  15745. /* ch_map_reg54 */
  15746. #define CSL_CPINTC_CH_MAP_REG54_CH_MAP_216_MASK (0x000000FFu)
  15747. #define CSL_CPINTC_CH_MAP_REG54_CH_MAP_216_SHIFT (0x00000000u)
  15748. #define CSL_CPINTC_CH_MAP_REG54_CH_MAP_216_RESETVAL (0x00000000u)
  15749. #define CSL_CPINTC_CH_MAP_REG54_CH_MAP_217_MASK (0x0000FF00u)
  15750. #define CSL_CPINTC_CH_MAP_REG54_CH_MAP_217_SHIFT (0x00000008u)
  15751. #define CSL_CPINTC_CH_MAP_REG54_CH_MAP_217_RESETVAL (0x00000000u)
  15752. #define CSL_CPINTC_CH_MAP_REG54_CH_MAP_218_MASK (0x00FF0000u)
  15753. #define CSL_CPINTC_CH_MAP_REG54_CH_MAP_218_SHIFT (0x00000010u)
  15754. #define CSL_CPINTC_CH_MAP_REG54_CH_MAP_218_RESETVAL (0x00000000u)
  15755. #define CSL_CPINTC_CH_MAP_REG54_CH_MAP_219_MASK (0xFF000000u)
  15756. #define CSL_CPINTC_CH_MAP_REG54_CH_MAP_219_SHIFT (0x00000018u)
  15757. #define CSL_CPINTC_CH_MAP_REG54_CH_MAP_219_RESETVAL (0x00000000u)
  15758. #define CSL_CPINTC_CH_MAP_REG54_RESETVAL (0x00000000u)
  15759. /* ch_map_reg55 */
  15760. #define CSL_CPINTC_CH_MAP_REG55_CH_MAP_220_MASK (0x000000FFu)
  15761. #define CSL_CPINTC_CH_MAP_REG55_CH_MAP_220_SHIFT (0x00000000u)
  15762. #define CSL_CPINTC_CH_MAP_REG55_CH_MAP_220_RESETVAL (0x00000000u)
  15763. #define CSL_CPINTC_CH_MAP_REG55_CH_MAP_221_MASK (0x0000FF00u)
  15764. #define CSL_CPINTC_CH_MAP_REG55_CH_MAP_221_SHIFT (0x00000008u)
  15765. #define CSL_CPINTC_CH_MAP_REG55_CH_MAP_221_RESETVAL (0x00000000u)
  15766. #define CSL_CPINTC_CH_MAP_REG55_CH_MAP_222_MASK (0x00FF0000u)
  15767. #define CSL_CPINTC_CH_MAP_REG55_CH_MAP_222_SHIFT (0x00000010u)
  15768. #define CSL_CPINTC_CH_MAP_REG55_CH_MAP_222_RESETVAL (0x00000000u)
  15769. #define CSL_CPINTC_CH_MAP_REG55_CH_MAP_223_MASK (0xFF000000u)
  15770. #define CSL_CPINTC_CH_MAP_REG55_CH_MAP_223_SHIFT (0x00000018u)
  15771. #define CSL_CPINTC_CH_MAP_REG55_CH_MAP_223_RESETVAL (0x00000000u)
  15772. #define CSL_CPINTC_CH_MAP_REG55_RESETVAL (0x00000000u)
  15773. /* ch_map_reg56 */
  15774. #define CSL_CPINTC_CH_MAP_REG56_CH_MAP_224_MASK (0x000000FFu)
  15775. #define CSL_CPINTC_CH_MAP_REG56_CH_MAP_224_SHIFT (0x00000000u)
  15776. #define CSL_CPINTC_CH_MAP_REG56_CH_MAP_224_RESETVAL (0x00000000u)
  15777. #define CSL_CPINTC_CH_MAP_REG56_CH_MAP_225_MASK (0x0000FF00u)
  15778. #define CSL_CPINTC_CH_MAP_REG56_CH_MAP_225_SHIFT (0x00000008u)
  15779. #define CSL_CPINTC_CH_MAP_REG56_CH_MAP_225_RESETVAL (0x00000000u)
  15780. #define CSL_CPINTC_CH_MAP_REG56_CH_MAP_226_MASK (0x00FF0000u)
  15781. #define CSL_CPINTC_CH_MAP_REG56_CH_MAP_226_SHIFT (0x00000010u)
  15782. #define CSL_CPINTC_CH_MAP_REG56_CH_MAP_226_RESETVAL (0x00000000u)
  15783. #define CSL_CPINTC_CH_MAP_REG56_CH_MAP_227_MASK (0xFF000000u)
  15784. #define CSL_CPINTC_CH_MAP_REG56_CH_MAP_227_SHIFT (0x00000018u)
  15785. #define CSL_CPINTC_CH_MAP_REG56_CH_MAP_227_RESETVAL (0x00000000u)
  15786. #define CSL_CPINTC_CH_MAP_REG56_RESETVAL (0x00000000u)
  15787. /* ch_map_reg57 */
  15788. #define CSL_CPINTC_CH_MAP_REG57_CH_MAP_228_MASK (0x000000FFu)
  15789. #define CSL_CPINTC_CH_MAP_REG57_CH_MAP_228_SHIFT (0x00000000u)
  15790. #define CSL_CPINTC_CH_MAP_REG57_CH_MAP_228_RESETVAL (0x00000000u)
  15791. #define CSL_CPINTC_CH_MAP_REG57_CH_MAP_229_MASK (0x0000FF00u)
  15792. #define CSL_CPINTC_CH_MAP_REG57_CH_MAP_229_SHIFT (0x00000008u)
  15793. #define CSL_CPINTC_CH_MAP_REG57_CH_MAP_229_RESETVAL (0x00000000u)
  15794. #define CSL_CPINTC_CH_MAP_REG57_CH_MAP_230_MASK (0x00FF0000u)
  15795. #define CSL_CPINTC_CH_MAP_REG57_CH_MAP_230_SHIFT (0x00000010u)
  15796. #define CSL_CPINTC_CH_MAP_REG57_CH_MAP_230_RESETVAL (0x00000000u)
  15797. #define CSL_CPINTC_CH_MAP_REG57_CH_MAP_231_MASK (0xFF000000u)
  15798. #define CSL_CPINTC_CH_MAP_REG57_CH_MAP_231_SHIFT (0x00000018u)
  15799. #define CSL_CPINTC_CH_MAP_REG57_CH_MAP_231_RESETVAL (0x00000000u)
  15800. #define CSL_CPINTC_CH_MAP_REG57_RESETVAL (0x00000000u)
  15801. /* ch_map_reg58 */
  15802. #define CSL_CPINTC_CH_MAP_REG58_CH_MAP_232_MASK (0x000000FFu)
  15803. #define CSL_CPINTC_CH_MAP_REG58_CH_MAP_232_SHIFT (0x00000000u)
  15804. #define CSL_CPINTC_CH_MAP_REG58_CH_MAP_232_RESETVAL (0x00000000u)
  15805. #define CSL_CPINTC_CH_MAP_REG58_CH_MAP_233_MASK (0x0000FF00u)
  15806. #define CSL_CPINTC_CH_MAP_REG58_CH_MAP_233_SHIFT (0x00000008u)
  15807. #define CSL_CPINTC_CH_MAP_REG58_CH_MAP_233_RESETVAL (0x00000000u)
  15808. #define CSL_CPINTC_CH_MAP_REG58_CH_MAP_234_MASK (0x00FF0000u)
  15809. #define CSL_CPINTC_CH_MAP_REG58_CH_MAP_234_SHIFT (0x00000010u)
  15810. #define CSL_CPINTC_CH_MAP_REG58_CH_MAP_234_RESETVAL (0x00000000u)
  15811. #define CSL_CPINTC_CH_MAP_REG58_CH_MAP_235_MASK (0xFF000000u)
  15812. #define CSL_CPINTC_CH_MAP_REG58_CH_MAP_235_SHIFT (0x00000018u)
  15813. #define CSL_CPINTC_CH_MAP_REG58_CH_MAP_235_RESETVAL (0x00000000u)
  15814. #define CSL_CPINTC_CH_MAP_REG58_RESETVAL (0x00000000u)
  15815. /* ch_map_reg59 */
  15816. #define CSL_CPINTC_CH_MAP_REG59_CH_MAP_236_MASK (0x000000FFu)
  15817. #define CSL_CPINTC_CH_MAP_REG59_CH_MAP_236_SHIFT (0x00000000u)
  15818. #define CSL_CPINTC_CH_MAP_REG59_CH_MAP_236_RESETVAL (0x00000000u)
  15819. #define CSL_CPINTC_CH_MAP_REG59_CH_MAP_237_MASK (0x0000FF00u)
  15820. #define CSL_CPINTC_CH_MAP_REG59_CH_MAP_237_SHIFT (0x00000008u)
  15821. #define CSL_CPINTC_CH_MAP_REG59_CH_MAP_237_RESETVAL (0x00000000u)
  15822. #define CSL_CPINTC_CH_MAP_REG59_CH_MAP_238_MASK (0x00FF0000u)
  15823. #define CSL_CPINTC_CH_MAP_REG59_CH_MAP_238_SHIFT (0x00000010u)
  15824. #define CSL_CPINTC_CH_MAP_REG59_CH_MAP_238_RESETVAL (0x00000000u)
  15825. #define CSL_CPINTC_CH_MAP_REG59_CH_MAP_239_MASK (0xFF000000u)
  15826. #define CSL_CPINTC_CH_MAP_REG59_CH_MAP_239_SHIFT (0x00000018u)
  15827. #define CSL_CPINTC_CH_MAP_REG59_CH_MAP_239_RESETVAL (0x00000000u)
  15828. #define CSL_CPINTC_CH_MAP_REG59_RESETVAL (0x00000000u)
  15829. /* ch_map_reg60 */
  15830. #define CSL_CPINTC_CH_MAP_REG60_CH_MAP_240_MASK (0x000000FFu)
  15831. #define CSL_CPINTC_CH_MAP_REG60_CH_MAP_240_SHIFT (0x00000000u)
  15832. #define CSL_CPINTC_CH_MAP_REG60_CH_MAP_240_RESETVAL (0x00000000u)
  15833. #define CSL_CPINTC_CH_MAP_REG60_CH_MAP_241_MASK (0x0000FF00u)
  15834. #define CSL_CPINTC_CH_MAP_REG60_CH_MAP_241_SHIFT (0x00000008u)
  15835. #define CSL_CPINTC_CH_MAP_REG60_CH_MAP_241_RESETVAL (0x00000000u)
  15836. #define CSL_CPINTC_CH_MAP_REG60_CH_MAP_242_MASK (0x00FF0000u)
  15837. #define CSL_CPINTC_CH_MAP_REG60_CH_MAP_242_SHIFT (0x00000010u)
  15838. #define CSL_CPINTC_CH_MAP_REG60_CH_MAP_242_RESETVAL (0x00000000u)
  15839. #define CSL_CPINTC_CH_MAP_REG60_CH_MAP_243_MASK (0xFF000000u)
  15840. #define CSL_CPINTC_CH_MAP_REG60_CH_MAP_243_SHIFT (0x00000018u)
  15841. #define CSL_CPINTC_CH_MAP_REG60_CH_MAP_243_RESETVAL (0x00000000u)
  15842. #define CSL_CPINTC_CH_MAP_REG60_RESETVAL (0x00000000u)
  15843. /* ch_map_reg61 */
  15844. #define CSL_CPINTC_CH_MAP_REG61_CH_MAP_244_MASK (0x000000FFu)
  15845. #define CSL_CPINTC_CH_MAP_REG61_CH_MAP_244_SHIFT (0x00000000u)
  15846. #define CSL_CPINTC_CH_MAP_REG61_CH_MAP_244_RESETVAL (0x00000000u)
  15847. #define CSL_CPINTC_CH_MAP_REG61_CH_MAP_245_MASK (0x0000FF00u)
  15848. #define CSL_CPINTC_CH_MAP_REG61_CH_MAP_245_SHIFT (0x00000008u)
  15849. #define CSL_CPINTC_CH_MAP_REG61_CH_MAP_245_RESETVAL (0x00000000u)
  15850. #define CSL_CPINTC_CH_MAP_REG61_CH_MAP_246_MASK (0x00FF0000u)
  15851. #define CSL_CPINTC_CH_MAP_REG61_CH_MAP_246_SHIFT (0x00000010u)
  15852. #define CSL_CPINTC_CH_MAP_REG61_CH_MAP_246_RESETVAL (0x00000000u)
  15853. #define CSL_CPINTC_CH_MAP_REG61_CH_MAP_247_MASK (0xFF000000u)
  15854. #define CSL_CPINTC_CH_MAP_REG61_CH_MAP_247_SHIFT (0x00000018u)
  15855. #define CSL_CPINTC_CH_MAP_REG61_CH_MAP_247_RESETVAL (0x00000000u)
  15856. #define CSL_CPINTC_CH_MAP_REG61_RESETVAL (0x00000000u)
  15857. /* ch_map_reg62 */
  15858. #define CSL_CPINTC_CH_MAP_REG62_CH_MAP_248_MASK (0x000000FFu)
  15859. #define CSL_CPINTC_CH_MAP_REG62_CH_MAP_248_SHIFT (0x00000000u)
  15860. #define CSL_CPINTC_CH_MAP_REG62_CH_MAP_248_RESETVAL (0x00000000u)
  15861. #define CSL_CPINTC_CH_MAP_REG62_CH_MAP_249_MASK (0x0000FF00u)
  15862. #define CSL_CPINTC_CH_MAP_REG62_CH_MAP_249_SHIFT (0x00000008u)
  15863. #define CSL_CPINTC_CH_MAP_REG62_CH_MAP_249_RESETVAL (0x00000000u)
  15864. #define CSL_CPINTC_CH_MAP_REG62_CH_MAP_250_MASK (0x00FF0000u)
  15865. #define CSL_CPINTC_CH_MAP_REG62_CH_MAP_250_SHIFT (0x00000010u)
  15866. #define CSL_CPINTC_CH_MAP_REG62_CH_MAP_250_RESETVAL (0x00000000u)
  15867. #define CSL_CPINTC_CH_MAP_REG62_CH_MAP_251_MASK (0xFF000000u)
  15868. #define CSL_CPINTC_CH_MAP_REG62_CH_MAP_251_SHIFT (0x00000018u)
  15869. #define CSL_CPINTC_CH_MAP_REG62_CH_MAP_251_RESETVAL (0x00000000u)
  15870. #define CSL_CPINTC_CH_MAP_REG62_RESETVAL (0x00000000u)
  15871. /* ch_map_reg63 */
  15872. #define CSL_CPINTC_CH_MAP_REG63_CH_MAP_252_MASK (0x000000FFu)
  15873. #define CSL_CPINTC_CH_MAP_REG63_CH_MAP_252_SHIFT (0x00000000u)
  15874. #define CSL_CPINTC_CH_MAP_REG63_CH_MAP_252_RESETVAL (0x00000000u)
  15875. #define CSL_CPINTC_CH_MAP_REG63_CH_MAP_253_MASK (0x0000FF00u)
  15876. #define CSL_CPINTC_CH_MAP_REG63_CH_MAP_253_SHIFT (0x00000008u)
  15877. #define CSL_CPINTC_CH_MAP_REG63_CH_MAP_253_RESETVAL (0x00000000u)
  15878. #define CSL_CPINTC_CH_MAP_REG63_CH_MAP_254_MASK (0x00FF0000u)
  15879. #define CSL_CPINTC_CH_MAP_REG63_CH_MAP_254_SHIFT (0x00000010u)
  15880. #define CSL_CPINTC_CH_MAP_REG63_CH_MAP_254_RESETVAL (0x00000000u)
  15881. #define CSL_CPINTC_CH_MAP_REG63_CH_MAP_255_MASK (0xFF000000u)
  15882. #define CSL_CPINTC_CH_MAP_REG63_CH_MAP_255_SHIFT (0x00000018u)
  15883. #define CSL_CPINTC_CH_MAP_REG63_CH_MAP_255_RESETVAL (0x00000000u)
  15884. #define CSL_CPINTC_CH_MAP_REG63_RESETVAL (0x00000000u)
  15885. /* ch_map_reg64 */
  15886. #define CSL_CPINTC_CH_MAP_REG64_CH_MAP_256_MASK (0x000000FFu)
  15887. #define CSL_CPINTC_CH_MAP_REG64_CH_MAP_256_SHIFT (0x00000000u)
  15888. #define CSL_CPINTC_CH_MAP_REG64_CH_MAP_256_RESETVAL (0x00000000u)
  15889. #define CSL_CPINTC_CH_MAP_REG64_CH_MAP_257_MASK (0x0000FF00u)
  15890. #define CSL_CPINTC_CH_MAP_REG64_CH_MAP_257_SHIFT (0x00000008u)
  15891. #define CSL_CPINTC_CH_MAP_REG64_CH_MAP_257_RESETVAL (0x00000000u)
  15892. #define CSL_CPINTC_CH_MAP_REG64_CH_MAP_258_MASK (0x00FF0000u)
  15893. #define CSL_CPINTC_CH_MAP_REG64_CH_MAP_258_SHIFT (0x00000010u)
  15894. #define CSL_CPINTC_CH_MAP_REG64_CH_MAP_258_RESETVAL (0x00000000u)
  15895. #define CSL_CPINTC_CH_MAP_REG64_CH_MAP_259_MASK (0xFF000000u)
  15896. #define CSL_CPINTC_CH_MAP_REG64_CH_MAP_259_SHIFT (0x00000018u)
  15897. #define CSL_CPINTC_CH_MAP_REG64_CH_MAP_259_RESETVAL (0x00000000u)
  15898. #define CSL_CPINTC_CH_MAP_REG64_RESETVAL (0x00000000u)
  15899. /* ch_map_reg65 */
  15900. #define CSL_CPINTC_CH_MAP_REG65_CH_MAP_260_MASK (0x000000FFu)
  15901. #define CSL_CPINTC_CH_MAP_REG65_CH_MAP_260_SHIFT (0x00000000u)
  15902. #define CSL_CPINTC_CH_MAP_REG65_CH_MAP_260_RESETVAL (0x00000000u)
  15903. #define CSL_CPINTC_CH_MAP_REG65_CH_MAP_261_MASK (0x0000FF00u)
  15904. #define CSL_CPINTC_CH_MAP_REG65_CH_MAP_261_SHIFT (0x00000008u)
  15905. #define CSL_CPINTC_CH_MAP_REG65_CH_MAP_261_RESETVAL (0x00000000u)
  15906. #define CSL_CPINTC_CH_MAP_REG65_CH_MAP_262_MASK (0x00FF0000u)
  15907. #define CSL_CPINTC_CH_MAP_REG65_CH_MAP_262_SHIFT (0x00000010u)
  15908. #define CSL_CPINTC_CH_MAP_REG65_CH_MAP_262_RESETVAL (0x00000000u)
  15909. #define CSL_CPINTC_CH_MAP_REG65_CH_MAP_263_MASK (0xFF000000u)
  15910. #define CSL_CPINTC_CH_MAP_REG65_CH_MAP_263_SHIFT (0x00000018u)
  15911. #define CSL_CPINTC_CH_MAP_REG65_CH_MAP_263_RESETVAL (0x00000000u)
  15912. #define CSL_CPINTC_CH_MAP_REG65_RESETVAL (0x00000000u)
  15913. /* ch_map_reg66 */
  15914. #define CSL_CPINTC_CH_MAP_REG66_CH_MAP_264_MASK (0x000000FFu)
  15915. #define CSL_CPINTC_CH_MAP_REG66_CH_MAP_264_SHIFT (0x00000000u)
  15916. #define CSL_CPINTC_CH_MAP_REG66_CH_MAP_264_RESETVAL (0x00000000u)
  15917. #define CSL_CPINTC_CH_MAP_REG66_CH_MAP_265_MASK (0x0000FF00u)
  15918. #define CSL_CPINTC_CH_MAP_REG66_CH_MAP_265_SHIFT (0x00000008u)
  15919. #define CSL_CPINTC_CH_MAP_REG66_CH_MAP_265_RESETVAL (0x00000000u)
  15920. #define CSL_CPINTC_CH_MAP_REG66_CH_MAP_266_MASK (0x00FF0000u)
  15921. #define CSL_CPINTC_CH_MAP_REG66_CH_MAP_266_SHIFT (0x00000010u)
  15922. #define CSL_CPINTC_CH_MAP_REG66_CH_MAP_266_RESETVAL (0x00000000u)
  15923. #define CSL_CPINTC_CH_MAP_REG66_CH_MAP_267_MASK (0xFF000000u)
  15924. #define CSL_CPINTC_CH_MAP_REG66_CH_MAP_267_SHIFT (0x00000018u)
  15925. #define CSL_CPINTC_CH_MAP_REG66_CH_MAP_267_RESETVAL (0x00000000u)
  15926. #define CSL_CPINTC_CH_MAP_REG66_RESETVAL (0x00000000u)
  15927. /* ch_map_reg67 */
  15928. #define CSL_CPINTC_CH_MAP_REG67_CH_MAP_268_MASK (0x000000FFu)
  15929. #define CSL_CPINTC_CH_MAP_REG67_CH_MAP_268_SHIFT (0x00000000u)
  15930. #define CSL_CPINTC_CH_MAP_REG67_CH_MAP_268_RESETVAL (0x00000000u)
  15931. #define CSL_CPINTC_CH_MAP_REG67_CH_MAP_269_MASK (0x0000FF00u)
  15932. #define CSL_CPINTC_CH_MAP_REG67_CH_MAP_269_SHIFT (0x00000008u)
  15933. #define CSL_CPINTC_CH_MAP_REG67_CH_MAP_269_RESETVAL (0x00000000u)
  15934. #define CSL_CPINTC_CH_MAP_REG67_CH_MAP_270_MASK (0x00FF0000u)
  15935. #define CSL_CPINTC_CH_MAP_REG67_CH_MAP_270_SHIFT (0x00000010u)
  15936. #define CSL_CPINTC_CH_MAP_REG67_CH_MAP_270_RESETVAL (0x00000000u)
  15937. #define CSL_CPINTC_CH_MAP_REG67_CH_MAP_271_MASK (0xFF000000u)
  15938. #define CSL_CPINTC_CH_MAP_REG67_CH_MAP_271_SHIFT (0x00000018u)
  15939. #define CSL_CPINTC_CH_MAP_REG67_CH_MAP_271_RESETVAL (0x00000000u)
  15940. #define CSL_CPINTC_CH_MAP_REG67_RESETVAL (0x00000000u)
  15941. /* ch_map_reg68 */
  15942. #define CSL_CPINTC_CH_MAP_REG68_CH_MAP_272_MASK (0x000000FFu)
  15943. #define CSL_CPINTC_CH_MAP_REG68_CH_MAP_272_SHIFT (0x00000000u)
  15944. #define CSL_CPINTC_CH_MAP_REG68_CH_MAP_272_RESETVAL (0x00000000u)
  15945. #define CSL_CPINTC_CH_MAP_REG68_CH_MAP_273_MASK (0x0000FF00u)
  15946. #define CSL_CPINTC_CH_MAP_REG68_CH_MAP_273_SHIFT (0x00000008u)
  15947. #define CSL_CPINTC_CH_MAP_REG68_CH_MAP_273_RESETVAL (0x00000000u)
  15948. #define CSL_CPINTC_CH_MAP_REG68_CH_MAP_274_MASK (0x00FF0000u)
  15949. #define CSL_CPINTC_CH_MAP_REG68_CH_MAP_274_SHIFT (0x00000010u)
  15950. #define CSL_CPINTC_CH_MAP_REG68_CH_MAP_274_RESETVAL (0x00000000u)
  15951. #define CSL_CPINTC_CH_MAP_REG68_CH_MAP_275_MASK (0xFF000000u)
  15952. #define CSL_CPINTC_CH_MAP_REG68_CH_MAP_275_SHIFT (0x00000018u)
  15953. #define CSL_CPINTC_CH_MAP_REG68_CH_MAP_275_RESETVAL (0x00000000u)
  15954. #define CSL_CPINTC_CH_MAP_REG68_RESETVAL (0x00000000u)
  15955. /* ch_map_reg69 */
  15956. #define CSL_CPINTC_CH_MAP_REG69_CH_MAP_276_MASK (0x000000FFu)
  15957. #define CSL_CPINTC_CH_MAP_REG69_CH_MAP_276_SHIFT (0x00000000u)
  15958. #define CSL_CPINTC_CH_MAP_REG69_CH_MAP_276_RESETVAL (0x00000000u)
  15959. #define CSL_CPINTC_CH_MAP_REG69_CH_MAP_277_MASK (0x0000FF00u)
  15960. #define CSL_CPINTC_CH_MAP_REG69_CH_MAP_277_SHIFT (0x00000008u)
  15961. #define CSL_CPINTC_CH_MAP_REG69_CH_MAP_277_RESETVAL (0x00000000u)
  15962. #define CSL_CPINTC_CH_MAP_REG69_CH_MAP_278_MASK (0x00FF0000u)
  15963. #define CSL_CPINTC_CH_MAP_REG69_CH_MAP_278_SHIFT (0x00000010u)
  15964. #define CSL_CPINTC_CH_MAP_REG69_CH_MAP_278_RESETVAL (0x00000000u)
  15965. #define CSL_CPINTC_CH_MAP_REG69_CH_MAP_279_MASK (0xFF000000u)
  15966. #define CSL_CPINTC_CH_MAP_REG69_CH_MAP_279_SHIFT (0x00000018u)
  15967. #define CSL_CPINTC_CH_MAP_REG69_CH_MAP_279_RESETVAL (0x00000000u)
  15968. #define CSL_CPINTC_CH_MAP_REG69_RESETVAL (0x00000000u)
  15969. /* ch_map_reg70 */
  15970. #define CSL_CPINTC_CH_MAP_REG70_CH_MAP_280_MASK (0x000000FFu)
  15971. #define CSL_CPINTC_CH_MAP_REG70_CH_MAP_280_SHIFT (0x00000000u)
  15972. #define CSL_CPINTC_CH_MAP_REG70_CH_MAP_280_RESETVAL (0x00000000u)
  15973. #define CSL_CPINTC_CH_MAP_REG70_CH_MAP_281_MASK (0x0000FF00u)
  15974. #define CSL_CPINTC_CH_MAP_REG70_CH_MAP_281_SHIFT (0x00000008u)
  15975. #define CSL_CPINTC_CH_MAP_REG70_CH_MAP_281_RESETVAL (0x00000000u)
  15976. #define CSL_CPINTC_CH_MAP_REG70_CH_MAP_282_MASK (0x00FF0000u)
  15977. #define CSL_CPINTC_CH_MAP_REG70_CH_MAP_282_SHIFT (0x00000010u)
  15978. #define CSL_CPINTC_CH_MAP_REG70_CH_MAP_282_RESETVAL (0x00000000u)
  15979. #define CSL_CPINTC_CH_MAP_REG70_CH_MAP_283_MASK (0xFF000000u)
  15980. #define CSL_CPINTC_CH_MAP_REG70_CH_MAP_283_SHIFT (0x00000018u)
  15981. #define CSL_CPINTC_CH_MAP_REG70_CH_MAP_283_RESETVAL (0x00000000u)
  15982. #define CSL_CPINTC_CH_MAP_REG70_RESETVAL (0x00000000u)
  15983. /* ch_map_reg71 */
  15984. #define CSL_CPINTC_CH_MAP_REG71_CH_MAP_284_MASK (0x000000FFu)
  15985. #define CSL_CPINTC_CH_MAP_REG71_CH_MAP_284_SHIFT (0x00000000u)
  15986. #define CSL_CPINTC_CH_MAP_REG71_CH_MAP_284_RESETVAL (0x00000000u)
  15987. #define CSL_CPINTC_CH_MAP_REG71_CH_MAP_285_MASK (0x0000FF00u)
  15988. #define CSL_CPINTC_CH_MAP_REG71_CH_MAP_285_SHIFT (0x00000008u)
  15989. #define CSL_CPINTC_CH_MAP_REG71_CH_MAP_285_RESETVAL (0x00000000u)
  15990. #define CSL_CPINTC_CH_MAP_REG71_CH_MAP_286_MASK (0x00FF0000u)
  15991. #define CSL_CPINTC_CH_MAP_REG71_CH_MAP_286_SHIFT (0x00000010u)
  15992. #define CSL_CPINTC_CH_MAP_REG71_CH_MAP_286_RESETVAL (0x00000000u)
  15993. #define CSL_CPINTC_CH_MAP_REG71_CH_MAP_287_MASK (0xFF000000u)
  15994. #define CSL_CPINTC_CH_MAP_REG71_CH_MAP_287_SHIFT (0x00000018u)
  15995. #define CSL_CPINTC_CH_MAP_REG71_CH_MAP_287_RESETVAL (0x00000000u)
  15996. #define CSL_CPINTC_CH_MAP_REG71_RESETVAL (0x00000000u)
  15997. /* ch_map_reg72 */
  15998. #define CSL_CPINTC_CH_MAP_REG72_CH_MAP_288_MASK (0x000000FFu)
  15999. #define CSL_CPINTC_CH_MAP_REG72_CH_MAP_288_SHIFT (0x00000000u)
  16000. #define CSL_CPINTC_CH_MAP_REG72_CH_MAP_288_RESETVAL (0x00000000u)
  16001. #define CSL_CPINTC_CH_MAP_REG72_CH_MAP_289_MASK (0x0000FF00u)
  16002. #define CSL_CPINTC_CH_MAP_REG72_CH_MAP_289_SHIFT (0x00000008u)
  16003. #define CSL_CPINTC_CH_MAP_REG72_CH_MAP_289_RESETVAL (0x00000000u)
  16004. #define CSL_CPINTC_CH_MAP_REG72_CH_MAP_290_MASK (0x00FF0000u)
  16005. #define CSL_CPINTC_CH_MAP_REG72_CH_MAP_290_SHIFT (0x00000010u)
  16006. #define CSL_CPINTC_CH_MAP_REG72_CH_MAP_290_RESETVAL (0x00000000u)
  16007. #define CSL_CPINTC_CH_MAP_REG72_CH_MAP_291_MASK (0xFF000000u)
  16008. #define CSL_CPINTC_CH_MAP_REG72_CH_MAP_291_SHIFT (0x00000018u)
  16009. #define CSL_CPINTC_CH_MAP_REG72_CH_MAP_291_RESETVAL (0x00000000u)
  16010. #define CSL_CPINTC_CH_MAP_REG72_RESETVAL (0x00000000u)
  16011. /* ch_map_reg73 */
  16012. #define CSL_CPINTC_CH_MAP_REG73_CH_MAP_292_MASK (0x000000FFu)
  16013. #define CSL_CPINTC_CH_MAP_REG73_CH_MAP_292_SHIFT (0x00000000u)
  16014. #define CSL_CPINTC_CH_MAP_REG73_CH_MAP_292_RESETVAL (0x00000000u)
  16015. #define CSL_CPINTC_CH_MAP_REG73_CH_MAP_293_MASK (0x0000FF00u)
  16016. #define CSL_CPINTC_CH_MAP_REG73_CH_MAP_293_SHIFT (0x00000008u)
  16017. #define CSL_CPINTC_CH_MAP_REG73_CH_MAP_293_RESETVAL (0x00000000u)
  16018. #define CSL_CPINTC_CH_MAP_REG73_CH_MAP_294_MASK (0x00FF0000u)
  16019. #define CSL_CPINTC_CH_MAP_REG73_CH_MAP_294_SHIFT (0x00000010u)
  16020. #define CSL_CPINTC_CH_MAP_REG73_CH_MAP_294_RESETVAL (0x00000000u)
  16021. #define CSL_CPINTC_CH_MAP_REG73_CH_MAP_295_MASK (0xFF000000u)
  16022. #define CSL_CPINTC_CH_MAP_REG73_CH_MAP_295_SHIFT (0x00000018u)
  16023. #define CSL_CPINTC_CH_MAP_REG73_CH_MAP_295_RESETVAL (0x00000000u)
  16024. #define CSL_CPINTC_CH_MAP_REG73_RESETVAL (0x00000000u)
  16025. /* ch_map_reg74 */
  16026. #define CSL_CPINTC_CH_MAP_REG74_CH_MAP_296_MASK (0x000000FFu)
  16027. #define CSL_CPINTC_CH_MAP_REG74_CH_MAP_296_SHIFT (0x00000000u)
  16028. #define CSL_CPINTC_CH_MAP_REG74_CH_MAP_296_RESETVAL (0x00000000u)
  16029. #define CSL_CPINTC_CH_MAP_REG74_CH_MAP_297_MASK (0x0000FF00u)
  16030. #define CSL_CPINTC_CH_MAP_REG74_CH_MAP_297_SHIFT (0x00000008u)
  16031. #define CSL_CPINTC_CH_MAP_REG74_CH_MAP_297_RESETVAL (0x00000000u)
  16032. #define CSL_CPINTC_CH_MAP_REG74_CH_MAP_298_MASK (0x00FF0000u)
  16033. #define CSL_CPINTC_CH_MAP_REG74_CH_MAP_298_SHIFT (0x00000010u)
  16034. #define CSL_CPINTC_CH_MAP_REG74_CH_MAP_298_RESETVAL (0x00000000u)
  16035. #define CSL_CPINTC_CH_MAP_REG74_CH_MAP_299_MASK (0xFF000000u)
  16036. #define CSL_CPINTC_CH_MAP_REG74_CH_MAP_299_SHIFT (0x00000018u)
  16037. #define CSL_CPINTC_CH_MAP_REG74_CH_MAP_299_RESETVAL (0x00000000u)
  16038. #define CSL_CPINTC_CH_MAP_REG74_RESETVAL (0x00000000u)
  16039. /* ch_map_reg75 */
  16040. #define CSL_CPINTC_CH_MAP_REG75_CH_MAP_300_MASK (0x000000FFu)
  16041. #define CSL_CPINTC_CH_MAP_REG75_CH_MAP_300_SHIFT (0x00000000u)
  16042. #define CSL_CPINTC_CH_MAP_REG75_CH_MAP_300_RESETVAL (0x00000000u)
  16043. #define CSL_CPINTC_CH_MAP_REG75_CH_MAP_301_MASK (0x0000FF00u)
  16044. #define CSL_CPINTC_CH_MAP_REG75_CH_MAP_301_SHIFT (0x00000008u)
  16045. #define CSL_CPINTC_CH_MAP_REG75_CH_MAP_301_RESETVAL (0x00000000u)
  16046. #define CSL_CPINTC_CH_MAP_REG75_CH_MAP_302_MASK (0x00FF0000u)
  16047. #define CSL_CPINTC_CH_MAP_REG75_CH_MAP_302_SHIFT (0x00000010u)
  16048. #define CSL_CPINTC_CH_MAP_REG75_CH_MAP_302_RESETVAL (0x00000000u)
  16049. #define CSL_CPINTC_CH_MAP_REG75_CH_MAP_303_MASK (0xFF000000u)
  16050. #define CSL_CPINTC_CH_MAP_REG75_CH_MAP_303_SHIFT (0x00000018u)
  16051. #define CSL_CPINTC_CH_MAP_REG75_CH_MAP_303_RESETVAL (0x00000000u)
  16052. #define CSL_CPINTC_CH_MAP_REG75_RESETVAL (0x00000000u)
  16053. /* ch_map_reg76 */
  16054. #define CSL_CPINTC_CH_MAP_REG76_CH_MAP_304_MASK (0x000000FFu)
  16055. #define CSL_CPINTC_CH_MAP_REG76_CH_MAP_304_SHIFT (0x00000000u)
  16056. #define CSL_CPINTC_CH_MAP_REG76_CH_MAP_304_RESETVAL (0x00000000u)
  16057. #define CSL_CPINTC_CH_MAP_REG76_CH_MAP_305_MASK (0x0000FF00u)
  16058. #define CSL_CPINTC_CH_MAP_REG76_CH_MAP_305_SHIFT (0x00000008u)
  16059. #define CSL_CPINTC_CH_MAP_REG76_CH_MAP_305_RESETVAL (0x00000000u)
  16060. #define CSL_CPINTC_CH_MAP_REG76_CH_MAP_306_MASK (0x00FF0000u)
  16061. #define CSL_CPINTC_CH_MAP_REG76_CH_MAP_306_SHIFT (0x00000010u)
  16062. #define CSL_CPINTC_CH_MAP_REG76_CH_MAP_306_RESETVAL (0x00000000u)
  16063. #define CSL_CPINTC_CH_MAP_REG76_CH_MAP_307_MASK (0xFF000000u)
  16064. #define CSL_CPINTC_CH_MAP_REG76_CH_MAP_307_SHIFT (0x00000018u)
  16065. #define CSL_CPINTC_CH_MAP_REG76_CH_MAP_307_RESETVAL (0x00000000u)
  16066. #define CSL_CPINTC_CH_MAP_REG76_RESETVAL (0x00000000u)
  16067. /* ch_map_reg77 */
  16068. #define CSL_CPINTC_CH_MAP_REG77_CH_MAP_308_MASK (0x000000FFu)
  16069. #define CSL_CPINTC_CH_MAP_REG77_CH_MAP_308_SHIFT (0x00000000u)
  16070. #define CSL_CPINTC_CH_MAP_REG77_CH_MAP_308_RESETVAL (0x00000000u)
  16071. #define CSL_CPINTC_CH_MAP_REG77_CH_MAP_309_MASK (0x0000FF00u)
  16072. #define CSL_CPINTC_CH_MAP_REG77_CH_MAP_309_SHIFT (0x00000008u)
  16073. #define CSL_CPINTC_CH_MAP_REG77_CH_MAP_309_RESETVAL (0x00000000u)
  16074. #define CSL_CPINTC_CH_MAP_REG77_CH_MAP_310_MASK (0x00FF0000u)
  16075. #define CSL_CPINTC_CH_MAP_REG77_CH_MAP_310_SHIFT (0x00000010u)
  16076. #define CSL_CPINTC_CH_MAP_REG77_CH_MAP_310_RESETVAL (0x00000000u)
  16077. #define CSL_CPINTC_CH_MAP_REG77_CH_MAP_311_MASK (0xFF000000u)
  16078. #define CSL_CPINTC_CH_MAP_REG77_CH_MAP_311_SHIFT (0x00000018u)
  16079. #define CSL_CPINTC_CH_MAP_REG77_CH_MAP_311_RESETVAL (0x00000000u)
  16080. #define CSL_CPINTC_CH_MAP_REG77_RESETVAL (0x00000000u)
  16081. /* ch_map_reg78 */
  16082. #define CSL_CPINTC_CH_MAP_REG78_CH_MAP_312_MASK (0x000000FFu)
  16083. #define CSL_CPINTC_CH_MAP_REG78_CH_MAP_312_SHIFT (0x00000000u)
  16084. #define CSL_CPINTC_CH_MAP_REG78_CH_MAP_312_RESETVAL (0x00000000u)
  16085. #define CSL_CPINTC_CH_MAP_REG78_CH_MAP_313_MASK (0x0000FF00u)
  16086. #define CSL_CPINTC_CH_MAP_REG78_CH_MAP_313_SHIFT (0x00000008u)
  16087. #define CSL_CPINTC_CH_MAP_REG78_CH_MAP_313_RESETVAL (0x00000000u)
  16088. #define CSL_CPINTC_CH_MAP_REG78_CH_MAP_314_MASK (0x00FF0000u)
  16089. #define CSL_CPINTC_CH_MAP_REG78_CH_MAP_314_SHIFT (0x00000010u)
  16090. #define CSL_CPINTC_CH_MAP_REG78_CH_MAP_314_RESETVAL (0x00000000u)
  16091. #define CSL_CPINTC_CH_MAP_REG78_CH_MAP_315_MASK (0xFF000000u)
  16092. #define CSL_CPINTC_CH_MAP_REG78_CH_MAP_315_SHIFT (0x00000018u)
  16093. #define CSL_CPINTC_CH_MAP_REG78_CH_MAP_315_RESETVAL (0x00000000u)
  16094. #define CSL_CPINTC_CH_MAP_REG78_RESETVAL (0x00000000u)
  16095. /* ch_map_reg79 */
  16096. #define CSL_CPINTC_CH_MAP_REG79_CH_MAP_316_MASK (0x000000FFu)
  16097. #define CSL_CPINTC_CH_MAP_REG79_CH_MAP_316_SHIFT (0x00000000u)
  16098. #define CSL_CPINTC_CH_MAP_REG79_CH_MAP_316_RESETVAL (0x00000000u)
  16099. #define CSL_CPINTC_CH_MAP_REG79_CH_MAP_317_MASK (0x0000FF00u)
  16100. #define CSL_CPINTC_CH_MAP_REG79_CH_MAP_317_SHIFT (0x00000008u)
  16101. #define CSL_CPINTC_CH_MAP_REG79_CH_MAP_317_RESETVAL (0x00000000u)
  16102. #define CSL_CPINTC_CH_MAP_REG79_CH_MAP_318_MASK (0x00FF0000u)
  16103. #define CSL_CPINTC_CH_MAP_REG79_CH_MAP_318_SHIFT (0x00000010u)
  16104. #define CSL_CPINTC_CH_MAP_REG79_CH_MAP_318_RESETVAL (0x00000000u)
  16105. #define CSL_CPINTC_CH_MAP_REG79_CH_MAP_319_MASK (0xFF000000u)
  16106. #define CSL_CPINTC_CH_MAP_REG79_CH_MAP_319_SHIFT (0x00000018u)
  16107. #define CSL_CPINTC_CH_MAP_REG79_CH_MAP_319_RESETVAL (0x00000000u)
  16108. #define CSL_CPINTC_CH_MAP_REG79_RESETVAL (0x00000000u)
  16109. /* ch_map_reg80 */
  16110. #define CSL_CPINTC_CH_MAP_REG80_CH_MAP_320_MASK (0x000000FFu)
  16111. #define CSL_CPINTC_CH_MAP_REG80_CH_MAP_320_SHIFT (0x00000000u)
  16112. #define CSL_CPINTC_CH_MAP_REG80_CH_MAP_320_RESETVAL (0x00000000u)
  16113. #define CSL_CPINTC_CH_MAP_REG80_CH_MAP_321_MASK (0x0000FF00u)
  16114. #define CSL_CPINTC_CH_MAP_REG80_CH_MAP_321_SHIFT (0x00000008u)
  16115. #define CSL_CPINTC_CH_MAP_REG80_CH_MAP_321_RESETVAL (0x00000000u)
  16116. #define CSL_CPINTC_CH_MAP_REG80_CH_MAP_322_MASK (0x00FF0000u)
  16117. #define CSL_CPINTC_CH_MAP_REG80_CH_MAP_322_SHIFT (0x00000010u)
  16118. #define CSL_CPINTC_CH_MAP_REG80_CH_MAP_322_RESETVAL (0x00000000u)
  16119. #define CSL_CPINTC_CH_MAP_REG80_CH_MAP_323_MASK (0xFF000000u)
  16120. #define CSL_CPINTC_CH_MAP_REG80_CH_MAP_323_SHIFT (0x00000018u)
  16121. #define CSL_CPINTC_CH_MAP_REG80_CH_MAP_323_RESETVAL (0x00000000u)
  16122. #define CSL_CPINTC_CH_MAP_REG80_RESETVAL (0x00000000u)
  16123. /* ch_map_reg81 */
  16124. #define CSL_CPINTC_CH_MAP_REG81_CH_MAP_324_MASK (0x000000FFu)
  16125. #define CSL_CPINTC_CH_MAP_REG81_CH_MAP_324_SHIFT (0x00000000u)
  16126. #define CSL_CPINTC_CH_MAP_REG81_CH_MAP_324_RESETVAL (0x00000000u)
  16127. #define CSL_CPINTC_CH_MAP_REG81_CH_MAP_325_MASK (0x0000FF00u)
  16128. #define CSL_CPINTC_CH_MAP_REG81_CH_MAP_325_SHIFT (0x00000008u)
  16129. #define CSL_CPINTC_CH_MAP_REG81_CH_MAP_325_RESETVAL (0x00000000u)
  16130. #define CSL_CPINTC_CH_MAP_REG81_CH_MAP_326_MASK (0x00FF0000u)
  16131. #define CSL_CPINTC_CH_MAP_REG81_CH_MAP_326_SHIFT (0x00000010u)
  16132. #define CSL_CPINTC_CH_MAP_REG81_CH_MAP_326_RESETVAL (0x00000000u)
  16133. #define CSL_CPINTC_CH_MAP_REG81_CH_MAP_327_MASK (0xFF000000u)
  16134. #define CSL_CPINTC_CH_MAP_REG81_CH_MAP_327_SHIFT (0x00000018u)
  16135. #define CSL_CPINTC_CH_MAP_REG81_CH_MAP_327_RESETVAL (0x00000000u)
  16136. #define CSL_CPINTC_CH_MAP_REG81_RESETVAL (0x00000000u)
  16137. /* ch_map_reg82 */
  16138. #define CSL_CPINTC_CH_MAP_REG82_CH_MAP_328_MASK (0x000000FFu)
  16139. #define CSL_CPINTC_CH_MAP_REG82_CH_MAP_328_SHIFT (0x00000000u)
  16140. #define CSL_CPINTC_CH_MAP_REG82_CH_MAP_328_RESETVAL (0x00000000u)
  16141. #define CSL_CPINTC_CH_MAP_REG82_CH_MAP_329_MASK (0x0000FF00u)
  16142. #define CSL_CPINTC_CH_MAP_REG82_CH_MAP_329_SHIFT (0x00000008u)
  16143. #define CSL_CPINTC_CH_MAP_REG82_CH_MAP_329_RESETVAL (0x00000000u)
  16144. #define CSL_CPINTC_CH_MAP_REG82_CH_MAP_330_MASK (0x00FF0000u)
  16145. #define CSL_CPINTC_CH_MAP_REG82_CH_MAP_330_SHIFT (0x00000010u)
  16146. #define CSL_CPINTC_CH_MAP_REG82_CH_MAP_330_RESETVAL (0x00000000u)
  16147. #define CSL_CPINTC_CH_MAP_REG82_CH_MAP_331_MASK (0xFF000000u)
  16148. #define CSL_CPINTC_CH_MAP_REG82_CH_MAP_331_SHIFT (0x00000018u)
  16149. #define CSL_CPINTC_CH_MAP_REG82_CH_MAP_331_RESETVAL (0x00000000u)
  16150. #define CSL_CPINTC_CH_MAP_REG82_RESETVAL (0x00000000u)
  16151. /* ch_map_reg83 */
  16152. #define CSL_CPINTC_CH_MAP_REG83_CH_MAP_332_MASK (0x000000FFu)
  16153. #define CSL_CPINTC_CH_MAP_REG83_CH_MAP_332_SHIFT (0x00000000u)
  16154. #define CSL_CPINTC_CH_MAP_REG83_CH_MAP_332_RESETVAL (0x00000000u)
  16155. #define CSL_CPINTC_CH_MAP_REG83_CH_MAP_333_MASK (0x0000FF00u)
  16156. #define CSL_CPINTC_CH_MAP_REG83_CH_MAP_333_SHIFT (0x00000008u)
  16157. #define CSL_CPINTC_CH_MAP_REG83_CH_MAP_333_RESETVAL (0x00000000u)
  16158. #define CSL_CPINTC_CH_MAP_REG83_CH_MAP_334_MASK (0x00FF0000u)
  16159. #define CSL_CPINTC_CH_MAP_REG83_CH_MAP_334_SHIFT (0x00000010u)
  16160. #define CSL_CPINTC_CH_MAP_REG83_CH_MAP_334_RESETVAL (0x00000000u)
  16161. #define CSL_CPINTC_CH_MAP_REG83_CH_MAP_335_MASK (0xFF000000u)
  16162. #define CSL_CPINTC_CH_MAP_REG83_CH_MAP_335_SHIFT (0x00000018u)
  16163. #define CSL_CPINTC_CH_MAP_REG83_CH_MAP_335_RESETVAL (0x00000000u)
  16164. #define CSL_CPINTC_CH_MAP_REG83_RESETVAL (0x00000000u)
  16165. /* ch_map_reg84 */
  16166. #define CSL_CPINTC_CH_MAP_REG84_CH_MAP_336_MASK (0x000000FFu)
  16167. #define CSL_CPINTC_CH_MAP_REG84_CH_MAP_336_SHIFT (0x00000000u)
  16168. #define CSL_CPINTC_CH_MAP_REG84_CH_MAP_336_RESETVAL (0x00000000u)
  16169. #define CSL_CPINTC_CH_MAP_REG84_CH_MAP_337_MASK (0x0000FF00u)
  16170. #define CSL_CPINTC_CH_MAP_REG84_CH_MAP_337_SHIFT (0x00000008u)
  16171. #define CSL_CPINTC_CH_MAP_REG84_CH_MAP_337_RESETVAL (0x00000000u)
  16172. #define CSL_CPINTC_CH_MAP_REG84_CH_MAP_338_MASK (0x00FF0000u)
  16173. #define CSL_CPINTC_CH_MAP_REG84_CH_MAP_338_SHIFT (0x00000010u)
  16174. #define CSL_CPINTC_CH_MAP_REG84_CH_MAP_338_RESETVAL (0x00000000u)
  16175. #define CSL_CPINTC_CH_MAP_REG84_CH_MAP_339_MASK (0xFF000000u)
  16176. #define CSL_CPINTC_CH_MAP_REG84_CH_MAP_339_SHIFT (0x00000018u)
  16177. #define CSL_CPINTC_CH_MAP_REG84_CH_MAP_339_RESETVAL (0x00000000u)
  16178. #define CSL_CPINTC_CH_MAP_REG84_RESETVAL (0x00000000u)
  16179. /* ch_map_reg85 */
  16180. #define CSL_CPINTC_CH_MAP_REG85_CH_MAP_340_MASK (0x000000FFu)
  16181. #define CSL_CPINTC_CH_MAP_REG85_CH_MAP_340_SHIFT (0x00000000u)
  16182. #define CSL_CPINTC_CH_MAP_REG85_CH_MAP_340_RESETVAL (0x00000000u)
  16183. #define CSL_CPINTC_CH_MAP_REG85_CH_MAP_341_MASK (0x0000FF00u)
  16184. #define CSL_CPINTC_CH_MAP_REG85_CH_MAP_341_SHIFT (0x00000008u)
  16185. #define CSL_CPINTC_CH_MAP_REG85_CH_MAP_341_RESETVAL (0x00000000u)
  16186. #define CSL_CPINTC_CH_MAP_REG85_CH_MAP_342_MASK (0x00FF0000u)
  16187. #define CSL_CPINTC_CH_MAP_REG85_CH_MAP_342_SHIFT (0x00000010u)
  16188. #define CSL_CPINTC_CH_MAP_REG85_CH_MAP_342_RESETVAL (0x00000000u)
  16189. #define CSL_CPINTC_CH_MAP_REG85_CH_MAP_343_MASK (0xFF000000u)
  16190. #define CSL_CPINTC_CH_MAP_REG85_CH_MAP_343_SHIFT (0x00000018u)
  16191. #define CSL_CPINTC_CH_MAP_REG85_CH_MAP_343_RESETVAL (0x00000000u)
  16192. #define CSL_CPINTC_CH_MAP_REG85_RESETVAL (0x00000000u)
  16193. /* ch_map_reg86 */
  16194. #define CSL_CPINTC_CH_MAP_REG86_CH_MAP_344_MASK (0x000000FFu)
  16195. #define CSL_CPINTC_CH_MAP_REG86_CH_MAP_344_SHIFT (0x00000000u)
  16196. #define CSL_CPINTC_CH_MAP_REG86_CH_MAP_344_RESETVAL (0x00000000u)
  16197. #define CSL_CPINTC_CH_MAP_REG86_CH_MAP_345_MASK (0x0000FF00u)
  16198. #define CSL_CPINTC_CH_MAP_REG86_CH_MAP_345_SHIFT (0x00000008u)
  16199. #define CSL_CPINTC_CH_MAP_REG86_CH_MAP_345_RESETVAL (0x00000000u)
  16200. #define CSL_CPINTC_CH_MAP_REG86_CH_MAP_346_MASK (0x00FF0000u)
  16201. #define CSL_CPINTC_CH_MAP_REG86_CH_MAP_346_SHIFT (0x00000010u)
  16202. #define CSL_CPINTC_CH_MAP_REG86_CH_MAP_346_RESETVAL (0x00000000u)
  16203. #define CSL_CPINTC_CH_MAP_REG86_CH_MAP_347_MASK (0xFF000000u)
  16204. #define CSL_CPINTC_CH_MAP_REG86_CH_MAP_347_SHIFT (0x00000018u)
  16205. #define CSL_CPINTC_CH_MAP_REG86_CH_MAP_347_RESETVAL (0x00000000u)
  16206. #define CSL_CPINTC_CH_MAP_REG86_RESETVAL (0x00000000u)
  16207. /* ch_map_reg87 */
  16208. #define CSL_CPINTC_CH_MAP_REG87_CH_MAP_348_MASK (0x000000FFu)
  16209. #define CSL_CPINTC_CH_MAP_REG87_CH_MAP_348_SHIFT (0x00000000u)
  16210. #define CSL_CPINTC_CH_MAP_REG87_CH_MAP_348_RESETVAL (0x00000000u)
  16211. #define CSL_CPINTC_CH_MAP_REG87_CH_MAP_349_MASK (0x0000FF00u)
  16212. #define CSL_CPINTC_CH_MAP_REG87_CH_MAP_349_SHIFT (0x00000008u)
  16213. #define CSL_CPINTC_CH_MAP_REG87_CH_MAP_349_RESETVAL (0x00000000u)
  16214. #define CSL_CPINTC_CH_MAP_REG87_CH_MAP_350_MASK (0x00FF0000u)
  16215. #define CSL_CPINTC_CH_MAP_REG87_CH_MAP_350_SHIFT (0x00000010u)
  16216. #define CSL_CPINTC_CH_MAP_REG87_CH_MAP_350_RESETVAL (0x00000000u)
  16217. #define CSL_CPINTC_CH_MAP_REG87_CH_MAP_351_MASK (0xFF000000u)
  16218. #define CSL_CPINTC_CH_MAP_REG87_CH_MAP_351_SHIFT (0x00000018u)
  16219. #define CSL_CPINTC_CH_MAP_REG87_CH_MAP_351_RESETVAL (0x00000000u)
  16220. #define CSL_CPINTC_CH_MAP_REG87_RESETVAL (0x00000000u)
  16221. /* ch_map_reg88 */
  16222. #define CSL_CPINTC_CH_MAP_REG88_CH_MAP_352_MASK (0x000000FFu)
  16223. #define CSL_CPINTC_CH_MAP_REG88_CH_MAP_352_SHIFT (0x00000000u)
  16224. #define CSL_CPINTC_CH_MAP_REG88_CH_MAP_352_RESETVAL (0x00000000u)
  16225. #define CSL_CPINTC_CH_MAP_REG88_CH_MAP_353_MASK (0x0000FF00u)
  16226. #define CSL_CPINTC_CH_MAP_REG88_CH_MAP_353_SHIFT (0x00000008u)
  16227. #define CSL_CPINTC_CH_MAP_REG88_CH_MAP_353_RESETVAL (0x00000000u)
  16228. #define CSL_CPINTC_CH_MAP_REG88_CH_MAP_354_MASK (0x00FF0000u)
  16229. #define CSL_CPINTC_CH_MAP_REG88_CH_MAP_354_SHIFT (0x00000010u)
  16230. #define CSL_CPINTC_CH_MAP_REG88_CH_MAP_354_RESETVAL (0x00000000u)
  16231. #define CSL_CPINTC_CH_MAP_REG88_CH_MAP_355_MASK (0xFF000000u)
  16232. #define CSL_CPINTC_CH_MAP_REG88_CH_MAP_355_SHIFT (0x00000018u)
  16233. #define CSL_CPINTC_CH_MAP_REG88_CH_MAP_355_RESETVAL (0x00000000u)
  16234. #define CSL_CPINTC_CH_MAP_REG88_RESETVAL (0x00000000u)
  16235. /* ch_map_reg89 */
  16236. #define CSL_CPINTC_CH_MAP_REG89_CH_MAP_356_MASK (0x000000FFu)
  16237. #define CSL_CPINTC_CH_MAP_REG89_CH_MAP_356_SHIFT (0x00000000u)
  16238. #define CSL_CPINTC_CH_MAP_REG89_CH_MAP_356_RESETVAL (0x00000000u)
  16239. #define CSL_CPINTC_CH_MAP_REG89_CH_MAP_357_MASK (0x0000FF00u)
  16240. #define CSL_CPINTC_CH_MAP_REG89_CH_MAP_357_SHIFT (0x00000008u)
  16241. #define CSL_CPINTC_CH_MAP_REG89_CH_MAP_357_RESETVAL (0x00000000u)
  16242. #define CSL_CPINTC_CH_MAP_REG89_CH_MAP_358_MASK (0x00FF0000u)
  16243. #define CSL_CPINTC_CH_MAP_REG89_CH_MAP_358_SHIFT (0x00000010u)
  16244. #define CSL_CPINTC_CH_MAP_REG89_CH_MAP_358_RESETVAL (0x00000000u)
  16245. #define CSL_CPINTC_CH_MAP_REG89_CH_MAP_359_MASK (0xFF000000u)
  16246. #define CSL_CPINTC_CH_MAP_REG89_CH_MAP_359_SHIFT (0x00000018u)
  16247. #define CSL_CPINTC_CH_MAP_REG89_CH_MAP_359_RESETVAL (0x00000000u)
  16248. #define CSL_CPINTC_CH_MAP_REG89_RESETVAL (0x00000000u)
  16249. /* ch_map_reg90 */
  16250. #define CSL_CPINTC_CH_MAP_REG90_CH_MAP_360_MASK (0x000000FFu)
  16251. #define CSL_CPINTC_CH_MAP_REG90_CH_MAP_360_SHIFT (0x00000000u)
  16252. #define CSL_CPINTC_CH_MAP_REG90_CH_MAP_360_RESETVAL (0x00000000u)
  16253. #define CSL_CPINTC_CH_MAP_REG90_CH_MAP_361_MASK (0x0000FF00u)
  16254. #define CSL_CPINTC_CH_MAP_REG90_CH_MAP_361_SHIFT (0x00000008u)
  16255. #define CSL_CPINTC_CH_MAP_REG90_CH_MAP_361_RESETVAL (0x00000000u)
  16256. #define CSL_CPINTC_CH_MAP_REG90_CH_MAP_362_MASK (0x00FF0000u)
  16257. #define CSL_CPINTC_CH_MAP_REG90_CH_MAP_362_SHIFT (0x00000010u)
  16258. #define CSL_CPINTC_CH_MAP_REG90_CH_MAP_362_RESETVAL (0x00000000u)
  16259. #define CSL_CPINTC_CH_MAP_REG90_CH_MAP_363_MASK (0xFF000000u)
  16260. #define CSL_CPINTC_CH_MAP_REG90_CH_MAP_363_SHIFT (0x00000018u)
  16261. #define CSL_CPINTC_CH_MAP_REG90_CH_MAP_363_RESETVAL (0x00000000u)
  16262. #define CSL_CPINTC_CH_MAP_REG90_RESETVAL (0x00000000u)
  16263. /* ch_map_reg91 */
  16264. #define CSL_CPINTC_CH_MAP_REG91_CH_MAP_364_MASK (0x000000FFu)
  16265. #define CSL_CPINTC_CH_MAP_REG91_CH_MAP_364_SHIFT (0x00000000u)
  16266. #define CSL_CPINTC_CH_MAP_REG91_CH_MAP_364_RESETVAL (0x00000000u)
  16267. #define CSL_CPINTC_CH_MAP_REG91_CH_MAP_365_MASK (0x0000FF00u)
  16268. #define CSL_CPINTC_CH_MAP_REG91_CH_MAP_365_SHIFT (0x00000008u)
  16269. #define CSL_CPINTC_CH_MAP_REG91_CH_MAP_365_RESETVAL (0x00000000u)
  16270. #define CSL_CPINTC_CH_MAP_REG91_CH_MAP_366_MASK (0x00FF0000u)
  16271. #define CSL_CPINTC_CH_MAP_REG91_CH_MAP_366_SHIFT (0x00000010u)
  16272. #define CSL_CPINTC_CH_MAP_REG91_CH_MAP_366_RESETVAL (0x00000000u)
  16273. #define CSL_CPINTC_CH_MAP_REG91_CH_MAP_367_MASK (0xFF000000u)
  16274. #define CSL_CPINTC_CH_MAP_REG91_CH_MAP_367_SHIFT (0x00000018u)
  16275. #define CSL_CPINTC_CH_MAP_REG91_CH_MAP_367_RESETVAL (0x00000000u)
  16276. #define CSL_CPINTC_CH_MAP_REG91_RESETVAL (0x00000000u)
  16277. /* ch_map_reg92 */
  16278. #define CSL_CPINTC_CH_MAP_REG92_CH_MAP_368_MASK (0x000000FFu)
  16279. #define CSL_CPINTC_CH_MAP_REG92_CH_MAP_368_SHIFT (0x00000000u)
  16280. #define CSL_CPINTC_CH_MAP_REG92_CH_MAP_368_RESETVAL (0x00000000u)
  16281. #define CSL_CPINTC_CH_MAP_REG92_CH_MAP_369_MASK (0x0000FF00u)
  16282. #define CSL_CPINTC_CH_MAP_REG92_CH_MAP_369_SHIFT (0x00000008u)
  16283. #define CSL_CPINTC_CH_MAP_REG92_CH_MAP_369_RESETVAL (0x00000000u)
  16284. #define CSL_CPINTC_CH_MAP_REG92_CH_MAP_370_MASK (0x00FF0000u)
  16285. #define CSL_CPINTC_CH_MAP_REG92_CH_MAP_370_SHIFT (0x00000010u)
  16286. #define CSL_CPINTC_CH_MAP_REG92_CH_MAP_370_RESETVAL (0x00000000u)
  16287. #define CSL_CPINTC_CH_MAP_REG92_CH_MAP_371_MASK (0xFF000000u)
  16288. #define CSL_CPINTC_CH_MAP_REG92_CH_MAP_371_SHIFT (0x00000018u)
  16289. #define CSL_CPINTC_CH_MAP_REG92_CH_MAP_371_RESETVAL (0x00000000u)
  16290. #define CSL_CPINTC_CH_MAP_REG92_RESETVAL (0x00000000u)
  16291. /* ch_map_reg93 */
  16292. #define CSL_CPINTC_CH_MAP_REG93_CH_MAP_372_MASK (0x000000FFu)
  16293. #define CSL_CPINTC_CH_MAP_REG93_CH_MAP_372_SHIFT (0x00000000u)
  16294. #define CSL_CPINTC_CH_MAP_REG93_CH_MAP_372_RESETVAL (0x00000000u)
  16295. #define CSL_CPINTC_CH_MAP_REG93_CH_MAP_373_MASK (0x0000FF00u)
  16296. #define CSL_CPINTC_CH_MAP_REG93_CH_MAP_373_SHIFT (0x00000008u)
  16297. #define CSL_CPINTC_CH_MAP_REG93_CH_MAP_373_RESETVAL (0x00000000u)
  16298. #define CSL_CPINTC_CH_MAP_REG93_CH_MAP_374_MASK (0x00FF0000u)
  16299. #define CSL_CPINTC_CH_MAP_REG93_CH_MAP_374_SHIFT (0x00000010u)
  16300. #define CSL_CPINTC_CH_MAP_REG93_CH_MAP_374_RESETVAL (0x00000000u)
  16301. #define CSL_CPINTC_CH_MAP_REG93_CH_MAP_375_MASK (0xFF000000u)
  16302. #define CSL_CPINTC_CH_MAP_REG93_CH_MAP_375_SHIFT (0x00000018u)
  16303. #define CSL_CPINTC_CH_MAP_REG93_CH_MAP_375_RESETVAL (0x00000000u)
  16304. #define CSL_CPINTC_CH_MAP_REG93_RESETVAL (0x00000000u)
  16305. /* ch_map_reg94 */
  16306. #define CSL_CPINTC_CH_MAP_REG94_CH_MAP_376_MASK (0x000000FFu)
  16307. #define CSL_CPINTC_CH_MAP_REG94_CH_MAP_376_SHIFT (0x00000000u)
  16308. #define CSL_CPINTC_CH_MAP_REG94_CH_MAP_376_RESETVAL (0x00000000u)
  16309. #define CSL_CPINTC_CH_MAP_REG94_CH_MAP_377_MASK (0x0000FF00u)
  16310. #define CSL_CPINTC_CH_MAP_REG94_CH_MAP_377_SHIFT (0x00000008u)
  16311. #define CSL_CPINTC_CH_MAP_REG94_CH_MAP_377_RESETVAL (0x00000000u)
  16312. #define CSL_CPINTC_CH_MAP_REG94_CH_MAP_378_MASK (0x00FF0000u)
  16313. #define CSL_CPINTC_CH_MAP_REG94_CH_MAP_378_SHIFT (0x00000010u)
  16314. #define CSL_CPINTC_CH_MAP_REG94_CH_MAP_378_RESETVAL (0x00000000u)
  16315. #define CSL_CPINTC_CH_MAP_REG94_CH_MAP_379_MASK (0xFF000000u)
  16316. #define CSL_CPINTC_CH_MAP_REG94_CH_MAP_379_SHIFT (0x00000018u)
  16317. #define CSL_CPINTC_CH_MAP_REG94_CH_MAP_379_RESETVAL (0x00000000u)
  16318. #define CSL_CPINTC_CH_MAP_REG94_RESETVAL (0x00000000u)
  16319. /* ch_map_reg95 */
  16320. #define CSL_CPINTC_CH_MAP_REG95_CH_MAP_380_MASK (0x000000FFu)
  16321. #define CSL_CPINTC_CH_MAP_REG95_CH_MAP_380_SHIFT (0x00000000u)
  16322. #define CSL_CPINTC_CH_MAP_REG95_CH_MAP_380_RESETVAL (0x00000000u)
  16323. #define CSL_CPINTC_CH_MAP_REG95_CH_MAP_381_MASK (0x0000FF00u)
  16324. #define CSL_CPINTC_CH_MAP_REG95_CH_MAP_381_SHIFT (0x00000008u)
  16325. #define CSL_CPINTC_CH_MAP_REG95_CH_MAP_381_RESETVAL (0x00000000u)
  16326. #define CSL_CPINTC_CH_MAP_REG95_CH_MAP_382_MASK (0x00FF0000u)
  16327. #define CSL_CPINTC_CH_MAP_REG95_CH_MAP_382_SHIFT (0x00000010u)
  16328. #define CSL_CPINTC_CH_MAP_REG95_CH_MAP_382_RESETVAL (0x00000000u)
  16329. #define CSL_CPINTC_CH_MAP_REG95_CH_MAP_383_MASK (0xFF000000u)
  16330. #define CSL_CPINTC_CH_MAP_REG95_CH_MAP_383_SHIFT (0x00000018u)
  16331. #define CSL_CPINTC_CH_MAP_REG95_CH_MAP_383_RESETVAL (0x00000000u)
  16332. #define CSL_CPINTC_CH_MAP_REG95_RESETVAL (0x00000000u)
  16333. /* ch_map_reg96 */
  16334. #define CSL_CPINTC_CH_MAP_REG96_CH_MAP_384_MASK (0x000000FFu)
  16335. #define CSL_CPINTC_CH_MAP_REG96_CH_MAP_384_SHIFT (0x00000000u)
  16336. #define CSL_CPINTC_CH_MAP_REG96_CH_MAP_384_RESETVAL (0x00000000u)
  16337. #define CSL_CPINTC_CH_MAP_REG96_CH_MAP_385_MASK (0x0000FF00u)
  16338. #define CSL_CPINTC_CH_MAP_REG96_CH_MAP_385_SHIFT (0x00000008u)
  16339. #define CSL_CPINTC_CH_MAP_REG96_CH_MAP_385_RESETVAL (0x00000000u)
  16340. #define CSL_CPINTC_CH_MAP_REG96_CH_MAP_386_MASK (0x00FF0000u)
  16341. #define CSL_CPINTC_CH_MAP_REG96_CH_MAP_386_SHIFT (0x00000010u)
  16342. #define CSL_CPINTC_CH_MAP_REG96_CH_MAP_386_RESETVAL (0x00000000u)
  16343. #define CSL_CPINTC_CH_MAP_REG96_CH_MAP_387_MASK (0xFF000000u)
  16344. #define CSL_CPINTC_CH_MAP_REG96_CH_MAP_387_SHIFT (0x00000018u)
  16345. #define CSL_CPINTC_CH_MAP_REG96_CH_MAP_387_RESETVAL (0x00000000u)
  16346. #define CSL_CPINTC_CH_MAP_REG96_RESETVAL (0x00000000u)
  16347. /* ch_map_reg97 */
  16348. #define CSL_CPINTC_CH_MAP_REG97_CH_MAP_388_MASK (0x000000FFu)
  16349. #define CSL_CPINTC_CH_MAP_REG97_CH_MAP_388_SHIFT (0x00000000u)
  16350. #define CSL_CPINTC_CH_MAP_REG97_CH_MAP_388_RESETVAL (0x00000000u)
  16351. #define CSL_CPINTC_CH_MAP_REG97_CH_MAP_389_MASK (0x0000FF00u)
  16352. #define CSL_CPINTC_CH_MAP_REG97_CH_MAP_389_SHIFT (0x00000008u)
  16353. #define CSL_CPINTC_CH_MAP_REG97_CH_MAP_389_RESETVAL (0x00000000u)
  16354. #define CSL_CPINTC_CH_MAP_REG97_CH_MAP_390_MASK (0x00FF0000u)
  16355. #define CSL_CPINTC_CH_MAP_REG97_CH_MAP_390_SHIFT (0x00000010u)
  16356. #define CSL_CPINTC_CH_MAP_REG97_CH_MAP_390_RESETVAL (0x00000000u)
  16357. #define CSL_CPINTC_CH_MAP_REG97_CH_MAP_391_MASK (0xFF000000u)
  16358. #define CSL_CPINTC_CH_MAP_REG97_CH_MAP_391_SHIFT (0x00000018u)
  16359. #define CSL_CPINTC_CH_MAP_REG97_CH_MAP_391_RESETVAL (0x00000000u)
  16360. #define CSL_CPINTC_CH_MAP_REG97_RESETVAL (0x00000000u)
  16361. /* ch_map_reg98 */
  16362. #define CSL_CPINTC_CH_MAP_REG98_CH_MAP_392_MASK (0x000000FFu)
  16363. #define CSL_CPINTC_CH_MAP_REG98_CH_MAP_392_SHIFT (0x00000000u)
  16364. #define CSL_CPINTC_CH_MAP_REG98_CH_MAP_392_RESETVAL (0x00000000u)
  16365. #define CSL_CPINTC_CH_MAP_REG98_CH_MAP_393_MASK (0x0000FF00u)
  16366. #define CSL_CPINTC_CH_MAP_REG98_CH_MAP_393_SHIFT (0x00000008u)
  16367. #define CSL_CPINTC_CH_MAP_REG98_CH_MAP_393_RESETVAL (0x00000000u)
  16368. #define CSL_CPINTC_CH_MAP_REG98_CH_MAP_394_MASK (0x00FF0000u)
  16369. #define CSL_CPINTC_CH_MAP_REG98_CH_MAP_394_SHIFT (0x00000010u)
  16370. #define CSL_CPINTC_CH_MAP_REG98_CH_MAP_394_RESETVAL (0x00000000u)
  16371. #define CSL_CPINTC_CH_MAP_REG98_CH_MAP_395_MASK (0xFF000000u)
  16372. #define CSL_CPINTC_CH_MAP_REG98_CH_MAP_395_SHIFT (0x00000018u)
  16373. #define CSL_CPINTC_CH_MAP_REG98_CH_MAP_395_RESETVAL (0x00000000u)
  16374. #define CSL_CPINTC_CH_MAP_REG98_RESETVAL (0x00000000u)
  16375. /* ch_map_reg99 */
  16376. #define CSL_CPINTC_CH_MAP_REG99_CH_MAP_396_MASK (0x000000FFu)
  16377. #define CSL_CPINTC_CH_MAP_REG99_CH_MAP_396_SHIFT (0x00000000u)
  16378. #define CSL_CPINTC_CH_MAP_REG99_CH_MAP_396_RESETVAL (0x00000000u)
  16379. #define CSL_CPINTC_CH_MAP_REG99_CH_MAP_397_MASK (0x0000FF00u)
  16380. #define CSL_CPINTC_CH_MAP_REG99_CH_MAP_397_SHIFT (0x00000008u)
  16381. #define CSL_CPINTC_CH_MAP_REG99_CH_MAP_397_RESETVAL (0x00000000u)
  16382. #define CSL_CPINTC_CH_MAP_REG99_CH_MAP_398_MASK (0x00FF0000u)
  16383. #define CSL_CPINTC_CH_MAP_REG99_CH_MAP_398_SHIFT (0x00000010u)
  16384. #define CSL_CPINTC_CH_MAP_REG99_CH_MAP_398_RESETVAL (0x00000000u)
  16385. #define CSL_CPINTC_CH_MAP_REG99_CH_MAP_399_MASK (0xFF000000u)
  16386. #define CSL_CPINTC_CH_MAP_REG99_CH_MAP_399_SHIFT (0x00000018u)
  16387. #define CSL_CPINTC_CH_MAP_REG99_CH_MAP_399_RESETVAL (0x00000000u)
  16388. #define CSL_CPINTC_CH_MAP_REG99_RESETVAL (0x00000000u)
  16389. /* ch_map_reg100 */
  16390. #define CSL_CPINTC_CH_MAP_REG100_CH_MAP_400_MASK (0x000000FFu)
  16391. #define CSL_CPINTC_CH_MAP_REG100_CH_MAP_400_SHIFT (0x00000000u)
  16392. #define CSL_CPINTC_CH_MAP_REG100_CH_MAP_400_RESETVAL (0x00000000u)
  16393. #define CSL_CPINTC_CH_MAP_REG100_CH_MAP_401_MASK (0x0000FF00u)
  16394. #define CSL_CPINTC_CH_MAP_REG100_CH_MAP_401_SHIFT (0x00000008u)
  16395. #define CSL_CPINTC_CH_MAP_REG100_CH_MAP_401_RESETVAL (0x00000000u)
  16396. #define CSL_CPINTC_CH_MAP_REG100_CH_MAP_402_MASK (0x00FF0000u)
  16397. #define CSL_CPINTC_CH_MAP_REG100_CH_MAP_402_SHIFT (0x00000010u)
  16398. #define CSL_CPINTC_CH_MAP_REG100_CH_MAP_402_RESETVAL (0x00000000u)
  16399. #define CSL_CPINTC_CH_MAP_REG100_CH_MAP_403_MASK (0xFF000000u)
  16400. #define CSL_CPINTC_CH_MAP_REG100_CH_MAP_403_SHIFT (0x00000018u)
  16401. #define CSL_CPINTC_CH_MAP_REG100_CH_MAP_403_RESETVAL (0x00000000u)
  16402. #define CSL_CPINTC_CH_MAP_REG100_RESETVAL (0x00000000u)
  16403. /* ch_map_reg101 */
  16404. #define CSL_CPINTC_CH_MAP_REG101_CH_MAP_404_MASK (0x000000FFu)
  16405. #define CSL_CPINTC_CH_MAP_REG101_CH_MAP_404_SHIFT (0x00000000u)
  16406. #define CSL_CPINTC_CH_MAP_REG101_CH_MAP_404_RESETVAL (0x00000000u)
  16407. #define CSL_CPINTC_CH_MAP_REG101_CH_MAP_405_MASK (0x0000FF00u)
  16408. #define CSL_CPINTC_CH_MAP_REG101_CH_MAP_405_SHIFT (0x00000008u)
  16409. #define CSL_CPINTC_CH_MAP_REG101_CH_MAP_405_RESETVAL (0x00000000u)
  16410. #define CSL_CPINTC_CH_MAP_REG101_CH_MAP_406_MASK (0x00FF0000u)
  16411. #define CSL_CPINTC_CH_MAP_REG101_CH_MAP_406_SHIFT (0x00000010u)
  16412. #define CSL_CPINTC_CH_MAP_REG101_CH_MAP_406_RESETVAL (0x00000000u)
  16413. #define CSL_CPINTC_CH_MAP_REG101_CH_MAP_407_MASK (0xFF000000u)
  16414. #define CSL_CPINTC_CH_MAP_REG101_CH_MAP_407_SHIFT (0x00000018u)
  16415. #define CSL_CPINTC_CH_MAP_REG101_CH_MAP_407_RESETVAL (0x00000000u)
  16416. #define CSL_CPINTC_CH_MAP_REG101_RESETVAL (0x00000000u)
  16417. /* ch_map_reg102 */
  16418. #define CSL_CPINTC_CH_MAP_REG102_CH_MAP_408_MASK (0x000000FFu)
  16419. #define CSL_CPINTC_CH_MAP_REG102_CH_MAP_408_SHIFT (0x00000000u)
  16420. #define CSL_CPINTC_CH_MAP_REG102_CH_MAP_408_RESETVAL (0x00000000u)
  16421. #define CSL_CPINTC_CH_MAP_REG102_CH_MAP_409_MASK (0x0000FF00u)
  16422. #define CSL_CPINTC_CH_MAP_REG102_CH_MAP_409_SHIFT (0x00000008u)
  16423. #define CSL_CPINTC_CH_MAP_REG102_CH_MAP_409_RESETVAL (0x00000000u)
  16424. #define CSL_CPINTC_CH_MAP_REG102_CH_MAP_410_MASK (0x00FF0000u)
  16425. #define CSL_CPINTC_CH_MAP_REG102_CH_MAP_410_SHIFT (0x00000010u)
  16426. #define CSL_CPINTC_CH_MAP_REG102_CH_MAP_410_RESETVAL (0x00000000u)
  16427. #define CSL_CPINTC_CH_MAP_REG102_CH_MAP_411_MASK (0xFF000000u)
  16428. #define CSL_CPINTC_CH_MAP_REG102_CH_MAP_411_SHIFT (0x00000018u)
  16429. #define CSL_CPINTC_CH_MAP_REG102_CH_MAP_411_RESETVAL (0x00000000u)
  16430. #define CSL_CPINTC_CH_MAP_REG102_RESETVAL (0x00000000u)
  16431. /* ch_map_reg103 */
  16432. #define CSL_CPINTC_CH_MAP_REG103_CH_MAP_412_MASK (0x000000FFu)
  16433. #define CSL_CPINTC_CH_MAP_REG103_CH_MAP_412_SHIFT (0x00000000u)
  16434. #define CSL_CPINTC_CH_MAP_REG103_CH_MAP_412_RESETVAL (0x00000000u)
  16435. #define CSL_CPINTC_CH_MAP_REG103_CH_MAP_413_MASK (0x0000FF00u)
  16436. #define CSL_CPINTC_CH_MAP_REG103_CH_MAP_413_SHIFT (0x00000008u)
  16437. #define CSL_CPINTC_CH_MAP_REG103_CH_MAP_413_RESETVAL (0x00000000u)
  16438. #define CSL_CPINTC_CH_MAP_REG103_CH_MAP_414_MASK (0x00FF0000u)
  16439. #define CSL_CPINTC_CH_MAP_REG103_CH_MAP_414_SHIFT (0x00000010u)
  16440. #define CSL_CPINTC_CH_MAP_REG103_CH_MAP_414_RESETVAL (0x00000000u)
  16441. #define CSL_CPINTC_CH_MAP_REG103_CH_MAP_415_MASK (0xFF000000u)
  16442. #define CSL_CPINTC_CH_MAP_REG103_CH_MAP_415_SHIFT (0x00000018u)
  16443. #define CSL_CPINTC_CH_MAP_REG103_CH_MAP_415_RESETVAL (0x00000000u)
  16444. #define CSL_CPINTC_CH_MAP_REG103_RESETVAL (0x00000000u)
  16445. /* ch_map_reg104 */
  16446. #define CSL_CPINTC_CH_MAP_REG104_CH_MAP_416_MASK (0x000000FFu)
  16447. #define CSL_CPINTC_CH_MAP_REG104_CH_MAP_416_SHIFT (0x00000000u)
  16448. #define CSL_CPINTC_CH_MAP_REG104_CH_MAP_416_RESETVAL (0x00000000u)
  16449. #define CSL_CPINTC_CH_MAP_REG104_CH_MAP_417_MASK (0x0000FF00u)
  16450. #define CSL_CPINTC_CH_MAP_REG104_CH_MAP_417_SHIFT (0x00000008u)
  16451. #define CSL_CPINTC_CH_MAP_REG104_CH_MAP_417_RESETVAL (0x00000000u)
  16452. #define CSL_CPINTC_CH_MAP_REG104_CH_MAP_418_MASK (0x00FF0000u)
  16453. #define CSL_CPINTC_CH_MAP_REG104_CH_MAP_418_SHIFT (0x00000010u)
  16454. #define CSL_CPINTC_CH_MAP_REG104_CH_MAP_418_RESETVAL (0x00000000u)
  16455. #define CSL_CPINTC_CH_MAP_REG104_CH_MAP_419_MASK (0xFF000000u)
  16456. #define CSL_CPINTC_CH_MAP_REG104_CH_MAP_419_SHIFT (0x00000018u)
  16457. #define CSL_CPINTC_CH_MAP_REG104_CH_MAP_419_RESETVAL (0x00000000u)
  16458. #define CSL_CPINTC_CH_MAP_REG104_RESETVAL (0x00000000u)
  16459. /* ch_map_reg105 */
  16460. #define CSL_CPINTC_CH_MAP_REG105_CH_MAP_420_MASK (0x000000FFu)
  16461. #define CSL_CPINTC_CH_MAP_REG105_CH_MAP_420_SHIFT (0x00000000u)
  16462. #define CSL_CPINTC_CH_MAP_REG105_CH_MAP_420_RESETVAL (0x00000000u)
  16463. #define CSL_CPINTC_CH_MAP_REG105_CH_MAP_421_MASK (0x0000FF00u)
  16464. #define CSL_CPINTC_CH_MAP_REG105_CH_MAP_421_SHIFT (0x00000008u)
  16465. #define CSL_CPINTC_CH_MAP_REG105_CH_MAP_421_RESETVAL (0x00000000u)
  16466. #define CSL_CPINTC_CH_MAP_REG105_CH_MAP_422_MASK (0x00FF0000u)
  16467. #define CSL_CPINTC_CH_MAP_REG105_CH_MAP_422_SHIFT (0x00000010u)
  16468. #define CSL_CPINTC_CH_MAP_REG105_CH_MAP_422_RESETVAL (0x00000000u)
  16469. #define CSL_CPINTC_CH_MAP_REG105_CH_MAP_423_MASK (0xFF000000u)
  16470. #define CSL_CPINTC_CH_MAP_REG105_CH_MAP_423_SHIFT (0x00000018u)
  16471. #define CSL_CPINTC_CH_MAP_REG105_CH_MAP_423_RESETVAL (0x00000000u)
  16472. #define CSL_CPINTC_CH_MAP_REG105_RESETVAL (0x00000000u)
  16473. /* ch_map_reg106 */
  16474. #define CSL_CPINTC_CH_MAP_REG106_CH_MAP_424_MASK (0x000000FFu)
  16475. #define CSL_CPINTC_CH_MAP_REG106_CH_MAP_424_SHIFT (0x00000000u)
  16476. #define CSL_CPINTC_CH_MAP_REG106_CH_MAP_424_RESETVAL (0x00000000u)
  16477. #define CSL_CPINTC_CH_MAP_REG106_CH_MAP_425_MASK (0x0000FF00u)
  16478. #define CSL_CPINTC_CH_MAP_REG106_CH_MAP_425_SHIFT (0x00000008u)
  16479. #define CSL_CPINTC_CH_MAP_REG106_CH_MAP_425_RESETVAL (0x00000000u)
  16480. #define CSL_CPINTC_CH_MAP_REG106_CH_MAP_426_MASK (0x00FF0000u)
  16481. #define CSL_CPINTC_CH_MAP_REG106_CH_MAP_426_SHIFT (0x00000010u)
  16482. #define CSL_CPINTC_CH_MAP_REG106_CH_MAP_426_RESETVAL (0x00000000u)
  16483. #define CSL_CPINTC_CH_MAP_REG106_CH_MAP_427_MASK (0xFF000000u)
  16484. #define CSL_CPINTC_CH_MAP_REG106_CH_MAP_427_SHIFT (0x00000018u)
  16485. #define CSL_CPINTC_CH_MAP_REG106_CH_MAP_427_RESETVAL (0x00000000u)
  16486. #define CSL_CPINTC_CH_MAP_REG106_RESETVAL (0x00000000u)
  16487. /* ch_map_reg107 */
  16488. #define CSL_CPINTC_CH_MAP_REG107_CH_MAP_428_MASK (0x000000FFu)
  16489. #define CSL_CPINTC_CH_MAP_REG107_CH_MAP_428_SHIFT (0x00000000u)
  16490. #define CSL_CPINTC_CH_MAP_REG107_CH_MAP_428_RESETVAL (0x00000000u)
  16491. #define CSL_CPINTC_CH_MAP_REG107_CH_MAP_429_MASK (0x0000FF00u)
  16492. #define CSL_CPINTC_CH_MAP_REG107_CH_MAP_429_SHIFT (0x00000008u)
  16493. #define CSL_CPINTC_CH_MAP_REG107_CH_MAP_429_RESETVAL (0x00000000u)
  16494. #define CSL_CPINTC_CH_MAP_REG107_CH_MAP_430_MASK (0x00FF0000u)
  16495. #define CSL_CPINTC_CH_MAP_REG107_CH_MAP_430_SHIFT (0x00000010u)
  16496. #define CSL_CPINTC_CH_MAP_REG107_CH_MAP_430_RESETVAL (0x00000000u)
  16497. #define CSL_CPINTC_CH_MAP_REG107_CH_MAP_431_MASK (0xFF000000u)
  16498. #define CSL_CPINTC_CH_MAP_REG107_CH_MAP_431_SHIFT (0x00000018u)
  16499. #define CSL_CPINTC_CH_MAP_REG107_CH_MAP_431_RESETVAL (0x00000000u)
  16500. #define CSL_CPINTC_CH_MAP_REG107_RESETVAL (0x00000000u)
  16501. /* ch_map_reg108 */
  16502. #define CSL_CPINTC_CH_MAP_REG108_CH_MAP_432_MASK (0x000000FFu)
  16503. #define CSL_CPINTC_CH_MAP_REG108_CH_MAP_432_SHIFT (0x00000000u)
  16504. #define CSL_CPINTC_CH_MAP_REG108_CH_MAP_432_RESETVAL (0x00000000u)
  16505. #define CSL_CPINTC_CH_MAP_REG108_CH_MAP_433_MASK (0x0000FF00u)
  16506. #define CSL_CPINTC_CH_MAP_REG108_CH_MAP_433_SHIFT (0x00000008u)
  16507. #define CSL_CPINTC_CH_MAP_REG108_CH_MAP_433_RESETVAL (0x00000000u)
  16508. #define CSL_CPINTC_CH_MAP_REG108_CH_MAP_434_MASK (0x00FF0000u)
  16509. #define CSL_CPINTC_CH_MAP_REG108_CH_MAP_434_SHIFT (0x00000010u)
  16510. #define CSL_CPINTC_CH_MAP_REG108_CH_MAP_434_RESETVAL (0x00000000u)
  16511. #define CSL_CPINTC_CH_MAP_REG108_CH_MAP_435_MASK (0xFF000000u)
  16512. #define CSL_CPINTC_CH_MAP_REG108_CH_MAP_435_SHIFT (0x00000018u)
  16513. #define CSL_CPINTC_CH_MAP_REG108_CH_MAP_435_RESETVAL (0x00000000u)
  16514. #define CSL_CPINTC_CH_MAP_REG108_RESETVAL (0x00000000u)
  16515. /* ch_map_reg109 */
  16516. #define CSL_CPINTC_CH_MAP_REG109_CH_MAP_436_MASK (0x000000FFu)
  16517. #define CSL_CPINTC_CH_MAP_REG109_CH_MAP_436_SHIFT (0x00000000u)
  16518. #define CSL_CPINTC_CH_MAP_REG109_CH_MAP_436_RESETVAL (0x00000000u)
  16519. #define CSL_CPINTC_CH_MAP_REG109_CH_MAP_437_MASK (0x0000FF00u)
  16520. #define CSL_CPINTC_CH_MAP_REG109_CH_MAP_437_SHIFT (0x00000008u)
  16521. #define CSL_CPINTC_CH_MAP_REG109_CH_MAP_437_RESETVAL (0x00000000u)
  16522. #define CSL_CPINTC_CH_MAP_REG109_CH_MAP_438_MASK (0x00FF0000u)
  16523. #define CSL_CPINTC_CH_MAP_REG109_CH_MAP_438_SHIFT (0x00000010u)
  16524. #define CSL_CPINTC_CH_MAP_REG109_CH_MAP_438_RESETVAL (0x00000000u)
  16525. #define CSL_CPINTC_CH_MAP_REG109_CH_MAP_439_MASK (0xFF000000u)
  16526. #define CSL_CPINTC_CH_MAP_REG109_CH_MAP_439_SHIFT (0x00000018u)
  16527. #define CSL_CPINTC_CH_MAP_REG109_CH_MAP_439_RESETVAL (0x00000000u)
  16528. #define CSL_CPINTC_CH_MAP_REG109_RESETVAL (0x00000000u)
  16529. /* ch_map_reg110 */
  16530. #define CSL_CPINTC_CH_MAP_REG110_CH_MAP_440_MASK (0x000000FFu)
  16531. #define CSL_CPINTC_CH_MAP_REG110_CH_MAP_440_SHIFT (0x00000000u)
  16532. #define CSL_CPINTC_CH_MAP_REG110_CH_MAP_440_RESETVAL (0x00000000u)
  16533. #define CSL_CPINTC_CH_MAP_REG110_CH_MAP_441_MASK (0x0000FF00u)
  16534. #define CSL_CPINTC_CH_MAP_REG110_CH_MAP_441_SHIFT (0x00000008u)
  16535. #define CSL_CPINTC_CH_MAP_REG110_CH_MAP_441_RESETVAL (0x00000000u)
  16536. #define CSL_CPINTC_CH_MAP_REG110_CH_MAP_442_MASK (0x00FF0000u)
  16537. #define CSL_CPINTC_CH_MAP_REG110_CH_MAP_442_SHIFT (0x00000010u)
  16538. #define CSL_CPINTC_CH_MAP_REG110_CH_MAP_442_RESETVAL (0x00000000u)
  16539. #define CSL_CPINTC_CH_MAP_REG110_CH_MAP_443_MASK (0xFF000000u)
  16540. #define CSL_CPINTC_CH_MAP_REG110_CH_MAP_443_SHIFT (0x00000018u)
  16541. #define CSL_CPINTC_CH_MAP_REG110_CH_MAP_443_RESETVAL (0x00000000u)
  16542. #define CSL_CPINTC_CH_MAP_REG110_RESETVAL (0x00000000u)
  16543. /* ch_map_reg111 */
  16544. #define CSL_CPINTC_CH_MAP_REG111_CH_MAP_444_MASK (0x000000FFu)
  16545. #define CSL_CPINTC_CH_MAP_REG111_CH_MAP_444_SHIFT (0x00000000u)
  16546. #define CSL_CPINTC_CH_MAP_REG111_CH_MAP_444_RESETVAL (0x00000000u)
  16547. #define CSL_CPINTC_CH_MAP_REG111_CH_MAP_445_MASK (0x0000FF00u)
  16548. #define CSL_CPINTC_CH_MAP_REG111_CH_MAP_445_SHIFT (0x00000008u)
  16549. #define CSL_CPINTC_CH_MAP_REG111_CH_MAP_445_RESETVAL (0x00000000u)
  16550. #define CSL_CPINTC_CH_MAP_REG111_CH_MAP_446_MASK (0x00FF0000u)
  16551. #define CSL_CPINTC_CH_MAP_REG111_CH_MAP_446_SHIFT (0x00000010u)
  16552. #define CSL_CPINTC_CH_MAP_REG111_CH_MAP_446_RESETVAL (0x00000000u)
  16553. #define CSL_CPINTC_CH_MAP_REG111_CH_MAP_447_MASK (0xFF000000u)
  16554. #define CSL_CPINTC_CH_MAP_REG111_CH_MAP_447_SHIFT (0x00000018u)
  16555. #define CSL_CPINTC_CH_MAP_REG111_CH_MAP_447_RESETVAL (0x00000000u)
  16556. #define CSL_CPINTC_CH_MAP_REG111_RESETVAL (0x00000000u)
  16557. /* ch_map_reg112 */
  16558. #define CSL_CPINTC_CH_MAP_REG112_CH_MAP_448_MASK (0x000000FFu)
  16559. #define CSL_CPINTC_CH_MAP_REG112_CH_MAP_448_SHIFT (0x00000000u)
  16560. #define CSL_CPINTC_CH_MAP_REG112_CH_MAP_448_RESETVAL (0x00000000u)
  16561. #define CSL_CPINTC_CH_MAP_REG112_CH_MAP_449_MASK (0x0000FF00u)
  16562. #define CSL_CPINTC_CH_MAP_REG112_CH_MAP_449_SHIFT (0x00000008u)
  16563. #define CSL_CPINTC_CH_MAP_REG112_CH_MAP_449_RESETVAL (0x00000000u)
  16564. #define CSL_CPINTC_CH_MAP_REG112_CH_MAP_450_MASK (0x00FF0000u)
  16565. #define CSL_CPINTC_CH_MAP_REG112_CH_MAP_450_SHIFT (0x00000010u)
  16566. #define CSL_CPINTC_CH_MAP_REG112_CH_MAP_450_RESETVAL (0x00000000u)
  16567. #define CSL_CPINTC_CH_MAP_REG112_CH_MAP_451_MASK (0xFF000000u)
  16568. #define CSL_CPINTC_CH_MAP_REG112_CH_MAP_451_SHIFT (0x00000018u)
  16569. #define CSL_CPINTC_CH_MAP_REG112_CH_MAP_451_RESETVAL (0x00000000u)
  16570. #define CSL_CPINTC_CH_MAP_REG112_RESETVAL (0x00000000u)
  16571. /* ch_map_reg113 */
  16572. #define CSL_CPINTC_CH_MAP_REG113_CH_MAP_452_MASK (0x000000FFu)
  16573. #define CSL_CPINTC_CH_MAP_REG113_CH_MAP_452_SHIFT (0x00000000u)
  16574. #define CSL_CPINTC_CH_MAP_REG113_CH_MAP_452_RESETVAL (0x00000000u)
  16575. #define CSL_CPINTC_CH_MAP_REG113_CH_MAP_453_MASK (0x0000FF00u)
  16576. #define CSL_CPINTC_CH_MAP_REG113_CH_MAP_453_SHIFT (0x00000008u)
  16577. #define CSL_CPINTC_CH_MAP_REG113_CH_MAP_453_RESETVAL (0x00000000u)
  16578. #define CSL_CPINTC_CH_MAP_REG113_CH_MAP_454_MASK (0x00FF0000u)
  16579. #define CSL_CPINTC_CH_MAP_REG113_CH_MAP_454_SHIFT (0x00000010u)
  16580. #define CSL_CPINTC_CH_MAP_REG113_CH_MAP_454_RESETVAL (0x00000000u)
  16581. #define CSL_CPINTC_CH_MAP_REG113_CH_MAP_455_MASK (0xFF000000u)
  16582. #define CSL_CPINTC_CH_MAP_REG113_CH_MAP_455_SHIFT (0x00000018u)
  16583. #define CSL_CPINTC_CH_MAP_REG113_CH_MAP_455_RESETVAL (0x00000000u)
  16584. #define CSL_CPINTC_CH_MAP_REG113_RESETVAL (0x00000000u)
  16585. /* ch_map_reg114 */
  16586. #define CSL_CPINTC_CH_MAP_REG114_CH_MAP_456_MASK (0x000000FFu)
  16587. #define CSL_CPINTC_CH_MAP_REG114_CH_MAP_456_SHIFT (0x00000000u)
  16588. #define CSL_CPINTC_CH_MAP_REG114_CH_MAP_456_RESETVAL (0x00000000u)
  16589. #define CSL_CPINTC_CH_MAP_REG114_CH_MAP_457_MASK (0x0000FF00u)
  16590. #define CSL_CPINTC_CH_MAP_REG114_CH_MAP_457_SHIFT (0x00000008u)
  16591. #define CSL_CPINTC_CH_MAP_REG114_CH_MAP_457_RESETVAL (0x00000000u)
  16592. #define CSL_CPINTC_CH_MAP_REG114_CH_MAP_458_MASK (0x00FF0000u)
  16593. #define CSL_CPINTC_CH_MAP_REG114_CH_MAP_458_SHIFT (0x00000010u)
  16594. #define CSL_CPINTC_CH_MAP_REG114_CH_MAP_458_RESETVAL (0x00000000u)
  16595. #define CSL_CPINTC_CH_MAP_REG114_CH_MAP_459_MASK (0xFF000000u)
  16596. #define CSL_CPINTC_CH_MAP_REG114_CH_MAP_459_SHIFT (0x00000018u)
  16597. #define CSL_CPINTC_CH_MAP_REG114_CH_MAP_459_RESETVAL (0x00000000u)
  16598. #define CSL_CPINTC_CH_MAP_REG114_RESETVAL (0x00000000u)
  16599. /* ch_map_reg115 */
  16600. #define CSL_CPINTC_CH_MAP_REG115_CH_MAP_460_MASK (0x000000FFu)
  16601. #define CSL_CPINTC_CH_MAP_REG115_CH_MAP_460_SHIFT (0x00000000u)
  16602. #define CSL_CPINTC_CH_MAP_REG115_CH_MAP_460_RESETVAL (0x00000000u)
  16603. #define CSL_CPINTC_CH_MAP_REG115_CH_MAP_461_MASK (0x0000FF00u)
  16604. #define CSL_CPINTC_CH_MAP_REG115_CH_MAP_461_SHIFT (0x00000008u)
  16605. #define CSL_CPINTC_CH_MAP_REG115_CH_MAP_461_RESETVAL (0x00000000u)
  16606. #define CSL_CPINTC_CH_MAP_REG115_CH_MAP_462_MASK (0x00FF0000u)
  16607. #define CSL_CPINTC_CH_MAP_REG115_CH_MAP_462_SHIFT (0x00000010u)
  16608. #define CSL_CPINTC_CH_MAP_REG115_CH_MAP_462_RESETVAL (0x00000000u)
  16609. #define CSL_CPINTC_CH_MAP_REG115_CH_MAP_463_MASK (0xFF000000u)
  16610. #define CSL_CPINTC_CH_MAP_REG115_CH_MAP_463_SHIFT (0x00000018u)
  16611. #define CSL_CPINTC_CH_MAP_REG115_CH_MAP_463_RESETVAL (0x00000000u)
  16612. #define CSL_CPINTC_CH_MAP_REG115_RESETVAL (0x00000000u)
  16613. /* ch_map_reg116 */
  16614. #define CSL_CPINTC_CH_MAP_REG116_CH_MAP_464_MASK (0x000000FFu)
  16615. #define CSL_CPINTC_CH_MAP_REG116_CH_MAP_464_SHIFT (0x00000000u)
  16616. #define CSL_CPINTC_CH_MAP_REG116_CH_MAP_464_RESETVAL (0x00000000u)
  16617. #define CSL_CPINTC_CH_MAP_REG116_CH_MAP_465_MASK (0x0000FF00u)
  16618. #define CSL_CPINTC_CH_MAP_REG116_CH_MAP_465_SHIFT (0x00000008u)
  16619. #define CSL_CPINTC_CH_MAP_REG116_CH_MAP_465_RESETVAL (0x00000000u)
  16620. #define CSL_CPINTC_CH_MAP_REG116_CH_MAP_466_MASK (0x00FF0000u)
  16621. #define CSL_CPINTC_CH_MAP_REG116_CH_MAP_466_SHIFT (0x00000010u)
  16622. #define CSL_CPINTC_CH_MAP_REG116_CH_MAP_466_RESETVAL (0x00000000u)
  16623. #define CSL_CPINTC_CH_MAP_REG116_CH_MAP_467_MASK (0xFF000000u)
  16624. #define CSL_CPINTC_CH_MAP_REG116_CH_MAP_467_SHIFT (0x00000018u)
  16625. #define CSL_CPINTC_CH_MAP_REG116_CH_MAP_467_RESETVAL (0x00000000u)
  16626. #define CSL_CPINTC_CH_MAP_REG116_RESETVAL (0x00000000u)
  16627. /* ch_map_reg117 */
  16628. #define CSL_CPINTC_CH_MAP_REG117_CH_MAP_468_MASK (0x000000FFu)
  16629. #define CSL_CPINTC_CH_MAP_REG117_CH_MAP_468_SHIFT (0x00000000u)
  16630. #define CSL_CPINTC_CH_MAP_REG117_CH_MAP_468_RESETVAL (0x00000000u)
  16631. #define CSL_CPINTC_CH_MAP_REG117_CH_MAP_469_MASK (0x0000FF00u)
  16632. #define CSL_CPINTC_CH_MAP_REG117_CH_MAP_469_SHIFT (0x00000008u)
  16633. #define CSL_CPINTC_CH_MAP_REG117_CH_MAP_469_RESETVAL (0x00000000u)
  16634. #define CSL_CPINTC_CH_MAP_REG117_CH_MAP_470_MASK (0x00FF0000u)
  16635. #define CSL_CPINTC_CH_MAP_REG117_CH_MAP_470_SHIFT (0x00000010u)
  16636. #define CSL_CPINTC_CH_MAP_REG117_CH_MAP_470_RESETVAL (0x00000000u)
  16637. #define CSL_CPINTC_CH_MAP_REG117_CH_MAP_471_MASK (0xFF000000u)
  16638. #define CSL_CPINTC_CH_MAP_REG117_CH_MAP_471_SHIFT (0x00000018u)
  16639. #define CSL_CPINTC_CH_MAP_REG117_CH_MAP_471_RESETVAL (0x00000000u)
  16640. #define CSL_CPINTC_CH_MAP_REG117_RESETVAL (0x00000000u)
  16641. /* ch_map_reg118 */
  16642. #define CSL_CPINTC_CH_MAP_REG118_CH_MAP_472_MASK (0x000000FFu)
  16643. #define CSL_CPINTC_CH_MAP_REG118_CH_MAP_472_SHIFT (0x00000000u)
  16644. #define CSL_CPINTC_CH_MAP_REG118_CH_MAP_472_RESETVAL (0x00000000u)
  16645. #define CSL_CPINTC_CH_MAP_REG118_CH_MAP_473_MASK (0x0000FF00u)
  16646. #define CSL_CPINTC_CH_MAP_REG118_CH_MAP_473_SHIFT (0x00000008u)
  16647. #define CSL_CPINTC_CH_MAP_REG118_CH_MAP_473_RESETVAL (0x00000000u)
  16648. #define CSL_CPINTC_CH_MAP_REG118_CH_MAP_474_MASK (0x00FF0000u)
  16649. #define CSL_CPINTC_CH_MAP_REG118_CH_MAP_474_SHIFT (0x00000010u)
  16650. #define CSL_CPINTC_CH_MAP_REG118_CH_MAP_474_RESETVAL (0x00000000u)
  16651. #define CSL_CPINTC_CH_MAP_REG118_CH_MAP_475_MASK (0xFF000000u)
  16652. #define CSL_CPINTC_CH_MAP_REG118_CH_MAP_475_SHIFT (0x00000018u)
  16653. #define CSL_CPINTC_CH_MAP_REG118_CH_MAP_475_RESETVAL (0x00000000u)
  16654. #define CSL_CPINTC_CH_MAP_REG118_RESETVAL (0x00000000u)
  16655. /* ch_map_reg119 */
  16656. #define CSL_CPINTC_CH_MAP_REG119_CH_MAP_476_MASK (0x000000FFu)
  16657. #define CSL_CPINTC_CH_MAP_REG119_CH_MAP_476_SHIFT (0x00000000u)
  16658. #define CSL_CPINTC_CH_MAP_REG119_CH_MAP_476_RESETVAL (0x00000000u)
  16659. #define CSL_CPINTC_CH_MAP_REG119_CH_MAP_477_MASK (0x0000FF00u)
  16660. #define CSL_CPINTC_CH_MAP_REG119_CH_MAP_477_SHIFT (0x00000008u)
  16661. #define CSL_CPINTC_CH_MAP_REG119_CH_MAP_477_RESETVAL (0x00000000u)
  16662. #define CSL_CPINTC_CH_MAP_REG119_CH_MAP_478_MASK (0x00FF0000u)
  16663. #define CSL_CPINTC_CH_MAP_REG119_CH_MAP_478_SHIFT (0x00000010u)
  16664. #define CSL_CPINTC_CH_MAP_REG119_CH_MAP_478_RESETVAL (0x00000000u)
  16665. #define CSL_CPINTC_CH_MAP_REG119_CH_MAP_479_MASK (0xFF000000u)
  16666. #define CSL_CPINTC_CH_MAP_REG119_CH_MAP_479_SHIFT (0x00000018u)
  16667. #define CSL_CPINTC_CH_MAP_REG119_CH_MAP_479_RESETVAL (0x00000000u)
  16668. #define CSL_CPINTC_CH_MAP_REG119_RESETVAL (0x00000000u)
  16669. /* ch_map_reg120 */
  16670. #define CSL_CPINTC_CH_MAP_REG120_CH_MAP_480_MASK (0x000000FFu)
  16671. #define CSL_CPINTC_CH_MAP_REG120_CH_MAP_480_SHIFT (0x00000000u)
  16672. #define CSL_CPINTC_CH_MAP_REG120_CH_MAP_480_RESETVAL (0x00000000u)
  16673. #define CSL_CPINTC_CH_MAP_REG120_CH_MAP_481_MASK (0x0000FF00u)
  16674. #define CSL_CPINTC_CH_MAP_REG120_CH_MAP_481_SHIFT (0x00000008u)
  16675. #define CSL_CPINTC_CH_MAP_REG120_CH_MAP_481_RESETVAL (0x00000000u)
  16676. #define CSL_CPINTC_CH_MAP_REG120_CH_MAP_482_MASK (0x00FF0000u)
  16677. #define CSL_CPINTC_CH_MAP_REG120_CH_MAP_482_SHIFT (0x00000010u)
  16678. #define CSL_CPINTC_CH_MAP_REG120_CH_MAP_482_RESETVAL (0x00000000u)
  16679. #define CSL_CPINTC_CH_MAP_REG120_CH_MAP_483_MASK (0xFF000000u)
  16680. #define CSL_CPINTC_CH_MAP_REG120_CH_MAP_483_SHIFT (0x00000018u)
  16681. #define CSL_CPINTC_CH_MAP_REG120_CH_MAP_483_RESETVAL (0x00000000u)
  16682. #define CSL_CPINTC_CH_MAP_REG120_RESETVAL (0x00000000u)
  16683. /* ch_map_reg121 */
  16684. #define CSL_CPINTC_CH_MAP_REG121_CH_MAP_484_MASK (0x000000FFu)
  16685. #define CSL_CPINTC_CH_MAP_REG121_CH_MAP_484_SHIFT (0x00000000u)
  16686. #define CSL_CPINTC_CH_MAP_REG121_CH_MAP_484_RESETVAL (0x00000000u)
  16687. #define CSL_CPINTC_CH_MAP_REG121_CH_MAP_485_MASK (0x0000FF00u)
  16688. #define CSL_CPINTC_CH_MAP_REG121_CH_MAP_485_SHIFT (0x00000008u)
  16689. #define CSL_CPINTC_CH_MAP_REG121_CH_MAP_485_RESETVAL (0x00000000u)
  16690. #define CSL_CPINTC_CH_MAP_REG121_CH_MAP_486_MASK (0x00FF0000u)
  16691. #define CSL_CPINTC_CH_MAP_REG121_CH_MAP_486_SHIFT (0x00000010u)
  16692. #define CSL_CPINTC_CH_MAP_REG121_CH_MAP_486_RESETVAL (0x00000000u)
  16693. #define CSL_CPINTC_CH_MAP_REG121_CH_MAP_487_MASK (0xFF000000u)
  16694. #define CSL_CPINTC_CH_MAP_REG121_CH_MAP_487_SHIFT (0x00000018u)
  16695. #define CSL_CPINTC_CH_MAP_REG121_CH_MAP_487_RESETVAL (0x00000000u)
  16696. #define CSL_CPINTC_CH_MAP_REG121_RESETVAL (0x00000000u)
  16697. /* ch_map_reg122 */
  16698. #define CSL_CPINTC_CH_MAP_REG122_CH_MAP_488_MASK (0x000000FFu)
  16699. #define CSL_CPINTC_CH_MAP_REG122_CH_MAP_488_SHIFT (0x00000000u)
  16700. #define CSL_CPINTC_CH_MAP_REG122_CH_MAP_488_RESETVAL (0x00000000u)
  16701. #define CSL_CPINTC_CH_MAP_REG122_CH_MAP_489_MASK (0x0000FF00u)
  16702. #define CSL_CPINTC_CH_MAP_REG122_CH_MAP_489_SHIFT (0x00000008u)
  16703. #define CSL_CPINTC_CH_MAP_REG122_CH_MAP_489_RESETVAL (0x00000000u)
  16704. #define CSL_CPINTC_CH_MAP_REG122_CH_MAP_490_MASK (0x00FF0000u)
  16705. #define CSL_CPINTC_CH_MAP_REG122_CH_MAP_490_SHIFT (0x00000010u)
  16706. #define CSL_CPINTC_CH_MAP_REG122_CH_MAP_490_RESETVAL (0x00000000u)
  16707. #define CSL_CPINTC_CH_MAP_REG122_CH_MAP_491_MASK (0xFF000000u)
  16708. #define CSL_CPINTC_CH_MAP_REG122_CH_MAP_491_SHIFT (0x00000018u)
  16709. #define CSL_CPINTC_CH_MAP_REG122_CH_MAP_491_RESETVAL (0x00000000u)
  16710. #define CSL_CPINTC_CH_MAP_REG122_RESETVAL (0x00000000u)
  16711. /* ch_map_reg123 */
  16712. #define CSL_CPINTC_CH_MAP_REG123_CH_MAP_492_MASK (0x000000FFu)
  16713. #define CSL_CPINTC_CH_MAP_REG123_CH_MAP_492_SHIFT (0x00000000u)
  16714. #define CSL_CPINTC_CH_MAP_REG123_CH_MAP_492_RESETVAL (0x00000000u)
  16715. #define CSL_CPINTC_CH_MAP_REG123_CH_MAP_493_MASK (0x0000FF00u)
  16716. #define CSL_CPINTC_CH_MAP_REG123_CH_MAP_493_SHIFT (0x00000008u)
  16717. #define CSL_CPINTC_CH_MAP_REG123_CH_MAP_493_RESETVAL (0x00000000u)
  16718. #define CSL_CPINTC_CH_MAP_REG123_CH_MAP_494_MASK (0x00FF0000u)
  16719. #define CSL_CPINTC_CH_MAP_REG123_CH_MAP_494_SHIFT (0x00000010u)
  16720. #define CSL_CPINTC_CH_MAP_REG123_CH_MAP_494_RESETVAL (0x00000000u)
  16721. #define CSL_CPINTC_CH_MAP_REG123_CH_MAP_495_MASK (0xFF000000u)
  16722. #define CSL_CPINTC_CH_MAP_REG123_CH_MAP_495_SHIFT (0x00000018u)
  16723. #define CSL_CPINTC_CH_MAP_REG123_CH_MAP_495_RESETVAL (0x00000000u)
  16724. #define CSL_CPINTC_CH_MAP_REG123_RESETVAL (0x00000000u)
  16725. /* ch_map_reg124 */
  16726. #define CSL_CPINTC_CH_MAP_REG124_CH_MAP_496_MASK (0x000000FFu)
  16727. #define CSL_CPINTC_CH_MAP_REG124_CH_MAP_496_SHIFT (0x00000000u)
  16728. #define CSL_CPINTC_CH_MAP_REG124_CH_MAP_496_RESETVAL (0x00000000u)
  16729. #define CSL_CPINTC_CH_MAP_REG124_CH_MAP_497_MASK (0x0000FF00u)
  16730. #define CSL_CPINTC_CH_MAP_REG124_CH_MAP_497_SHIFT (0x00000008u)
  16731. #define CSL_CPINTC_CH_MAP_REG124_CH_MAP_497_RESETVAL (0x00000000u)
  16732. #define CSL_CPINTC_CH_MAP_REG124_CH_MAP_498_MASK (0x00FF0000u)
  16733. #define CSL_CPINTC_CH_MAP_REG124_CH_MAP_498_SHIFT (0x00000010u)
  16734. #define CSL_CPINTC_CH_MAP_REG124_CH_MAP_498_RESETVAL (0x00000000u)
  16735. #define CSL_CPINTC_CH_MAP_REG124_CH_MAP_499_MASK (0xFF000000u)
  16736. #define CSL_CPINTC_CH_MAP_REG124_CH_MAP_499_SHIFT (0x00000018u)
  16737. #define CSL_CPINTC_CH_MAP_REG124_CH_MAP_499_RESETVAL (0x00000000u)
  16738. #define CSL_CPINTC_CH_MAP_REG124_RESETVAL (0x00000000u)
  16739. /* ch_map_reg125 */
  16740. #define CSL_CPINTC_CH_MAP_REG125_CH_MAP_500_MASK (0x000000FFu)
  16741. #define CSL_CPINTC_CH_MAP_REG125_CH_MAP_500_SHIFT (0x00000000u)
  16742. #define CSL_CPINTC_CH_MAP_REG125_CH_MAP_500_RESETVAL (0x00000000u)
  16743. #define CSL_CPINTC_CH_MAP_REG125_CH_MAP_501_MASK (0x0000FF00u)
  16744. #define CSL_CPINTC_CH_MAP_REG125_CH_MAP_501_SHIFT (0x00000008u)
  16745. #define CSL_CPINTC_CH_MAP_REG125_CH_MAP_501_RESETVAL (0x00000000u)
  16746. #define CSL_CPINTC_CH_MAP_REG125_CH_MAP_502_MASK (0x00FF0000u)
  16747. #define CSL_CPINTC_CH_MAP_REG125_CH_MAP_502_SHIFT (0x00000010u)
  16748. #define CSL_CPINTC_CH_MAP_REG125_CH_MAP_502_RESETVAL (0x00000000u)
  16749. #define CSL_CPINTC_CH_MAP_REG125_CH_MAP_503_MASK (0xFF000000u)
  16750. #define CSL_CPINTC_CH_MAP_REG125_CH_MAP_503_SHIFT (0x00000018u)
  16751. #define CSL_CPINTC_CH_MAP_REG125_CH_MAP_503_RESETVAL (0x00000000u)
  16752. #define CSL_CPINTC_CH_MAP_REG125_RESETVAL (0x00000000u)
  16753. /* ch_map_reg126 */
  16754. #define CSL_CPINTC_CH_MAP_REG126_CH_MAP_504_MASK (0x000000FFu)
  16755. #define CSL_CPINTC_CH_MAP_REG126_CH_MAP_504_SHIFT (0x00000000u)
  16756. #define CSL_CPINTC_CH_MAP_REG126_CH_MAP_504_RESETVAL (0x00000000u)
  16757. #define CSL_CPINTC_CH_MAP_REG126_CH_MAP_505_MASK (0x0000FF00u)
  16758. #define CSL_CPINTC_CH_MAP_REG126_CH_MAP_505_SHIFT (0x00000008u)
  16759. #define CSL_CPINTC_CH_MAP_REG126_CH_MAP_505_RESETVAL (0x00000000u)
  16760. #define CSL_CPINTC_CH_MAP_REG126_CH_MAP_506_MASK (0x00FF0000u)
  16761. #define CSL_CPINTC_CH_MAP_REG126_CH_MAP_506_SHIFT (0x00000010u)
  16762. #define CSL_CPINTC_CH_MAP_REG126_CH_MAP_506_RESETVAL (0x00000000u)
  16763. #define CSL_CPINTC_CH_MAP_REG126_CH_MAP_507_MASK (0xFF000000u)
  16764. #define CSL_CPINTC_CH_MAP_REG126_CH_MAP_507_SHIFT (0x00000018u)
  16765. #define CSL_CPINTC_CH_MAP_REG126_CH_MAP_507_RESETVAL (0x00000000u)
  16766. #define CSL_CPINTC_CH_MAP_REG126_RESETVAL (0x00000000u)
  16767. /* ch_map_reg127 */
  16768. #define CSL_CPINTC_CH_MAP_REG127_CH_MAP_508_MASK (0x000000FFu)
  16769. #define CSL_CPINTC_CH_MAP_REG127_CH_MAP_508_SHIFT (0x00000000u)
  16770. #define CSL_CPINTC_CH_MAP_REG127_CH_MAP_508_RESETVAL (0x00000000u)
  16771. #define CSL_CPINTC_CH_MAP_REG127_CH_MAP_509_MASK (0x0000FF00u)
  16772. #define CSL_CPINTC_CH_MAP_REG127_CH_MAP_509_SHIFT (0x00000008u)
  16773. #define CSL_CPINTC_CH_MAP_REG127_CH_MAP_509_RESETVAL (0x00000000u)
  16774. #define CSL_CPINTC_CH_MAP_REG127_CH_MAP_510_MASK (0x00FF0000u)
  16775. #define CSL_CPINTC_CH_MAP_REG127_CH_MAP_510_SHIFT (0x00000010u)
  16776. #define CSL_CPINTC_CH_MAP_REG127_CH_MAP_510_RESETVAL (0x00000000u)
  16777. #define CSL_CPINTC_CH_MAP_REG127_CH_MAP_511_MASK (0xFF000000u)
  16778. #define CSL_CPINTC_CH_MAP_REG127_CH_MAP_511_SHIFT (0x00000018u)
  16779. #define CSL_CPINTC_CH_MAP_REG127_CH_MAP_511_RESETVAL (0x00000000u)
  16780. #define CSL_CPINTC_CH_MAP_REG127_RESETVAL (0x00000000u)
  16781. /* ch_map_reg128 */
  16782. #define CSL_CPINTC_CH_MAP_REG128_CH_MAP_512_MASK (0x000000FFu)
  16783. #define CSL_CPINTC_CH_MAP_REG128_CH_MAP_512_SHIFT (0x00000000u)
  16784. #define CSL_CPINTC_CH_MAP_REG128_CH_MAP_512_RESETVAL (0x00000000u)
  16785. #define CSL_CPINTC_CH_MAP_REG128_CH_MAP_513_MASK (0x0000FF00u)
  16786. #define CSL_CPINTC_CH_MAP_REG128_CH_MAP_513_SHIFT (0x00000008u)
  16787. #define CSL_CPINTC_CH_MAP_REG128_CH_MAP_513_RESETVAL (0x00000000u)
  16788. #define CSL_CPINTC_CH_MAP_REG128_CH_MAP_514_MASK (0x00FF0000u)
  16789. #define CSL_CPINTC_CH_MAP_REG128_CH_MAP_514_SHIFT (0x00000010u)
  16790. #define CSL_CPINTC_CH_MAP_REG128_CH_MAP_514_RESETVAL (0x00000000u)
  16791. #define CSL_CPINTC_CH_MAP_REG128_CH_MAP_515_MASK (0xFF000000u)
  16792. #define CSL_CPINTC_CH_MAP_REG128_CH_MAP_515_SHIFT (0x00000018u)
  16793. #define CSL_CPINTC_CH_MAP_REG128_CH_MAP_515_RESETVAL (0x00000000u)
  16794. #define CSL_CPINTC_CH_MAP_REG128_RESETVAL (0x00000000u)
  16795. /* ch_map_reg129 */
  16796. #define CSL_CPINTC_CH_MAP_REG129_CH_MAP_516_MASK (0x000000FFu)
  16797. #define CSL_CPINTC_CH_MAP_REG129_CH_MAP_516_SHIFT (0x00000000u)
  16798. #define CSL_CPINTC_CH_MAP_REG129_CH_MAP_516_RESETVAL (0x00000000u)
  16799. #define CSL_CPINTC_CH_MAP_REG129_CH_MAP_517_MASK (0x0000FF00u)
  16800. #define CSL_CPINTC_CH_MAP_REG129_CH_MAP_517_SHIFT (0x00000008u)
  16801. #define CSL_CPINTC_CH_MAP_REG129_CH_MAP_517_RESETVAL (0x00000000u)
  16802. #define CSL_CPINTC_CH_MAP_REG129_CH_MAP_518_MASK (0x00FF0000u)
  16803. #define CSL_CPINTC_CH_MAP_REG129_CH_MAP_518_SHIFT (0x00000010u)
  16804. #define CSL_CPINTC_CH_MAP_REG129_CH_MAP_518_RESETVAL (0x00000000u)
  16805. #define CSL_CPINTC_CH_MAP_REG129_CH_MAP_519_MASK (0xFF000000u)
  16806. #define CSL_CPINTC_CH_MAP_REG129_CH_MAP_519_SHIFT (0x00000018u)
  16807. #define CSL_CPINTC_CH_MAP_REG129_CH_MAP_519_RESETVAL (0x00000000u)
  16808. #define CSL_CPINTC_CH_MAP_REG129_RESETVAL (0x00000000u)
  16809. /* ch_map_reg130 */
  16810. #define CSL_CPINTC_CH_MAP_REG130_CH_MAP_520_MASK (0x000000FFu)
  16811. #define CSL_CPINTC_CH_MAP_REG130_CH_MAP_520_SHIFT (0x00000000u)
  16812. #define CSL_CPINTC_CH_MAP_REG130_CH_MAP_520_RESETVAL (0x00000000u)
  16813. #define CSL_CPINTC_CH_MAP_REG130_CH_MAP_521_MASK (0x0000FF00u)
  16814. #define CSL_CPINTC_CH_MAP_REG130_CH_MAP_521_SHIFT (0x00000008u)
  16815. #define CSL_CPINTC_CH_MAP_REG130_CH_MAP_521_RESETVAL (0x00000000u)
  16816. #define CSL_CPINTC_CH_MAP_REG130_CH_MAP_522_MASK (0x00FF0000u)
  16817. #define CSL_CPINTC_CH_MAP_REG130_CH_MAP_522_SHIFT (0x00000010u)
  16818. #define CSL_CPINTC_CH_MAP_REG130_CH_MAP_522_RESETVAL (0x00000000u)
  16819. #define CSL_CPINTC_CH_MAP_REG130_CH_MAP_523_MASK (0xFF000000u)
  16820. #define CSL_CPINTC_CH_MAP_REG130_CH_MAP_523_SHIFT (0x00000018u)
  16821. #define CSL_CPINTC_CH_MAP_REG130_CH_MAP_523_RESETVAL (0x00000000u)
  16822. #define CSL_CPINTC_CH_MAP_REG130_RESETVAL (0x00000000u)
  16823. /* ch_map_reg131 */
  16824. #define CSL_CPINTC_CH_MAP_REG131_CH_MAP_524_MASK (0x000000FFu)
  16825. #define CSL_CPINTC_CH_MAP_REG131_CH_MAP_524_SHIFT (0x00000000u)
  16826. #define CSL_CPINTC_CH_MAP_REG131_CH_MAP_524_RESETVAL (0x00000000u)
  16827. #define CSL_CPINTC_CH_MAP_REG131_CH_MAP_525_MASK (0x0000FF00u)
  16828. #define CSL_CPINTC_CH_MAP_REG131_CH_MAP_525_SHIFT (0x00000008u)
  16829. #define CSL_CPINTC_CH_MAP_REG131_CH_MAP_525_RESETVAL (0x00000000u)
  16830. #define CSL_CPINTC_CH_MAP_REG131_CH_MAP_526_MASK (0x00FF0000u)
  16831. #define CSL_CPINTC_CH_MAP_REG131_CH_MAP_526_SHIFT (0x00000010u)
  16832. #define CSL_CPINTC_CH_MAP_REG131_CH_MAP_526_RESETVAL (0x00000000u)
  16833. #define CSL_CPINTC_CH_MAP_REG131_CH_MAP_527_MASK (0xFF000000u)
  16834. #define CSL_CPINTC_CH_MAP_REG131_CH_MAP_527_SHIFT (0x00000018u)
  16835. #define CSL_CPINTC_CH_MAP_REG131_CH_MAP_527_RESETVAL (0x00000000u)
  16836. #define CSL_CPINTC_CH_MAP_REG131_RESETVAL (0x00000000u)
  16837. /* ch_map_reg132 */
  16838. #define CSL_CPINTC_CH_MAP_REG132_CH_MAP_528_MASK (0x000000FFu)
  16839. #define CSL_CPINTC_CH_MAP_REG132_CH_MAP_528_SHIFT (0x00000000u)
  16840. #define CSL_CPINTC_CH_MAP_REG132_CH_MAP_528_RESETVAL (0x00000000u)
  16841. #define CSL_CPINTC_CH_MAP_REG132_CH_MAP_529_MASK (0x0000FF00u)
  16842. #define CSL_CPINTC_CH_MAP_REG132_CH_MAP_529_SHIFT (0x00000008u)
  16843. #define CSL_CPINTC_CH_MAP_REG132_CH_MAP_529_RESETVAL (0x00000000u)
  16844. #define CSL_CPINTC_CH_MAP_REG132_CH_MAP_530_MASK (0x00FF0000u)
  16845. #define CSL_CPINTC_CH_MAP_REG132_CH_MAP_530_SHIFT (0x00000010u)
  16846. #define CSL_CPINTC_CH_MAP_REG132_CH_MAP_530_RESETVAL (0x00000000u)
  16847. #define CSL_CPINTC_CH_MAP_REG132_CH_MAP_531_MASK (0xFF000000u)
  16848. #define CSL_CPINTC_CH_MAP_REG132_CH_MAP_531_SHIFT (0x00000018u)
  16849. #define CSL_CPINTC_CH_MAP_REG132_CH_MAP_531_RESETVAL (0x00000000u)
  16850. #define CSL_CPINTC_CH_MAP_REG132_RESETVAL (0x00000000u)
  16851. /* ch_map_reg133 */
  16852. #define CSL_CPINTC_CH_MAP_REG133_CH_MAP_532_MASK (0x000000FFu)
  16853. #define CSL_CPINTC_CH_MAP_REG133_CH_MAP_532_SHIFT (0x00000000u)
  16854. #define CSL_CPINTC_CH_MAP_REG133_CH_MAP_532_RESETVAL (0x00000000u)
  16855. #define CSL_CPINTC_CH_MAP_REG133_CH_MAP_533_MASK (0x0000FF00u)
  16856. #define CSL_CPINTC_CH_MAP_REG133_CH_MAP_533_SHIFT (0x00000008u)
  16857. #define CSL_CPINTC_CH_MAP_REG133_CH_MAP_533_RESETVAL (0x00000000u)
  16858. #define CSL_CPINTC_CH_MAP_REG133_CH_MAP_534_MASK (0x00FF0000u)
  16859. #define CSL_CPINTC_CH_MAP_REG133_CH_MAP_534_SHIFT (0x00000010u)
  16860. #define CSL_CPINTC_CH_MAP_REG133_CH_MAP_534_RESETVAL (0x00000000u)
  16861. #define CSL_CPINTC_CH_MAP_REG133_CH_MAP_535_MASK (0xFF000000u)
  16862. #define CSL_CPINTC_CH_MAP_REG133_CH_MAP_535_SHIFT (0x00000018u)
  16863. #define CSL_CPINTC_CH_MAP_REG133_CH_MAP_535_RESETVAL (0x00000000u)
  16864. #define CSL_CPINTC_CH_MAP_REG133_RESETVAL (0x00000000u)
  16865. /* ch_map_reg134 */
  16866. #define CSL_CPINTC_CH_MAP_REG134_CH_MAP_536_MASK (0x000000FFu)
  16867. #define CSL_CPINTC_CH_MAP_REG134_CH_MAP_536_SHIFT (0x00000000u)
  16868. #define CSL_CPINTC_CH_MAP_REG134_CH_MAP_536_RESETVAL (0x00000000u)
  16869. #define CSL_CPINTC_CH_MAP_REG134_CH_MAP_537_MASK (0x0000FF00u)
  16870. #define CSL_CPINTC_CH_MAP_REG134_CH_MAP_537_SHIFT (0x00000008u)
  16871. #define CSL_CPINTC_CH_MAP_REG134_CH_MAP_537_RESETVAL (0x00000000u)
  16872. #define CSL_CPINTC_CH_MAP_REG134_CH_MAP_538_MASK (0x00FF0000u)
  16873. #define CSL_CPINTC_CH_MAP_REG134_CH_MAP_538_SHIFT (0x00000010u)
  16874. #define CSL_CPINTC_CH_MAP_REG134_CH_MAP_538_RESETVAL (0x00000000u)
  16875. #define CSL_CPINTC_CH_MAP_REG134_CH_MAP_539_MASK (0xFF000000u)
  16876. #define CSL_CPINTC_CH_MAP_REG134_CH_MAP_539_SHIFT (0x00000018u)
  16877. #define CSL_CPINTC_CH_MAP_REG134_CH_MAP_539_RESETVAL (0x00000000u)
  16878. #define CSL_CPINTC_CH_MAP_REG134_RESETVAL (0x00000000u)
  16879. /* ch_map_reg135 */
  16880. #define CSL_CPINTC_CH_MAP_REG135_CH_MAP_540_MASK (0x000000FFu)
  16881. #define CSL_CPINTC_CH_MAP_REG135_CH_MAP_540_SHIFT (0x00000000u)
  16882. #define CSL_CPINTC_CH_MAP_REG135_CH_MAP_540_RESETVAL (0x00000000u)
  16883. #define CSL_CPINTC_CH_MAP_REG135_CH_MAP_541_MASK (0x0000FF00u)
  16884. #define CSL_CPINTC_CH_MAP_REG135_CH_MAP_541_SHIFT (0x00000008u)
  16885. #define CSL_CPINTC_CH_MAP_REG135_CH_MAP_541_RESETVAL (0x00000000u)
  16886. #define CSL_CPINTC_CH_MAP_REG135_CH_MAP_542_MASK (0x00FF0000u)
  16887. #define CSL_CPINTC_CH_MAP_REG135_CH_MAP_542_SHIFT (0x00000010u)
  16888. #define CSL_CPINTC_CH_MAP_REG135_CH_MAP_542_RESETVAL (0x00000000u)
  16889. #define CSL_CPINTC_CH_MAP_REG135_CH_MAP_543_MASK (0xFF000000u)
  16890. #define CSL_CPINTC_CH_MAP_REG135_CH_MAP_543_SHIFT (0x00000018u)
  16891. #define CSL_CPINTC_CH_MAP_REG135_CH_MAP_543_RESETVAL (0x00000000u)
  16892. #define CSL_CPINTC_CH_MAP_REG135_RESETVAL (0x00000000u)
  16893. /* ch_map_reg136 */
  16894. #define CSL_CPINTC_CH_MAP_REG136_CH_MAP_544_MASK (0x000000FFu)
  16895. #define CSL_CPINTC_CH_MAP_REG136_CH_MAP_544_SHIFT (0x00000000u)
  16896. #define CSL_CPINTC_CH_MAP_REG136_CH_MAP_544_RESETVAL (0x00000000u)
  16897. #define CSL_CPINTC_CH_MAP_REG136_CH_MAP_545_MASK (0x0000FF00u)
  16898. #define CSL_CPINTC_CH_MAP_REG136_CH_MAP_545_SHIFT (0x00000008u)
  16899. #define CSL_CPINTC_CH_MAP_REG136_CH_MAP_545_RESETVAL (0x00000000u)
  16900. #define CSL_CPINTC_CH_MAP_REG136_CH_MAP_546_MASK (0x00FF0000u)
  16901. #define CSL_CPINTC_CH_MAP_REG136_CH_MAP_546_SHIFT (0x00000010u)
  16902. #define CSL_CPINTC_CH_MAP_REG136_CH_MAP_546_RESETVAL (0x00000000u)
  16903. #define CSL_CPINTC_CH_MAP_REG136_CH_MAP_547_MASK (0xFF000000u)
  16904. #define CSL_CPINTC_CH_MAP_REG136_CH_MAP_547_SHIFT (0x00000018u)
  16905. #define CSL_CPINTC_CH_MAP_REG136_CH_MAP_547_RESETVAL (0x00000000u)
  16906. #define CSL_CPINTC_CH_MAP_REG136_RESETVAL (0x00000000u)
  16907. /* ch_map_reg137 */
  16908. #define CSL_CPINTC_CH_MAP_REG137_CH_MAP_548_MASK (0x000000FFu)
  16909. #define CSL_CPINTC_CH_MAP_REG137_CH_MAP_548_SHIFT (0x00000000u)
  16910. #define CSL_CPINTC_CH_MAP_REG137_CH_MAP_548_RESETVAL (0x00000000u)
  16911. #define CSL_CPINTC_CH_MAP_REG137_CH_MAP_549_MASK (0x0000FF00u)
  16912. #define CSL_CPINTC_CH_MAP_REG137_CH_MAP_549_SHIFT (0x00000008u)
  16913. #define CSL_CPINTC_CH_MAP_REG137_CH_MAP_549_RESETVAL (0x00000000u)
  16914. #define CSL_CPINTC_CH_MAP_REG137_CH_MAP_550_MASK (0x00FF0000u)
  16915. #define CSL_CPINTC_CH_MAP_REG137_CH_MAP_550_SHIFT (0x00000010u)
  16916. #define CSL_CPINTC_CH_MAP_REG137_CH_MAP_550_RESETVAL (0x00000000u)
  16917. #define CSL_CPINTC_CH_MAP_REG137_CH_MAP_551_MASK (0xFF000000u)
  16918. #define CSL_CPINTC_CH_MAP_REG137_CH_MAP_551_SHIFT (0x00000018u)
  16919. #define CSL_CPINTC_CH_MAP_REG137_CH_MAP_551_RESETVAL (0x00000000u)
  16920. #define CSL_CPINTC_CH_MAP_REG137_RESETVAL (0x00000000u)
  16921. /* ch_map_reg138 */
  16922. #define CSL_CPINTC_CH_MAP_REG138_CH_MAP_552_MASK (0x000000FFu)
  16923. #define CSL_CPINTC_CH_MAP_REG138_CH_MAP_552_SHIFT (0x00000000u)
  16924. #define CSL_CPINTC_CH_MAP_REG138_CH_MAP_552_RESETVAL (0x00000000u)
  16925. #define CSL_CPINTC_CH_MAP_REG138_CH_MAP_553_MASK (0x0000FF00u)
  16926. #define CSL_CPINTC_CH_MAP_REG138_CH_MAP_553_SHIFT (0x00000008u)
  16927. #define CSL_CPINTC_CH_MAP_REG138_CH_MAP_553_RESETVAL (0x00000000u)
  16928. #define CSL_CPINTC_CH_MAP_REG138_CH_MAP_554_MASK (0x00FF0000u)
  16929. #define CSL_CPINTC_CH_MAP_REG138_CH_MAP_554_SHIFT (0x00000010u)
  16930. #define CSL_CPINTC_CH_MAP_REG138_CH_MAP_554_RESETVAL (0x00000000u)
  16931. #define CSL_CPINTC_CH_MAP_REG138_CH_MAP_555_MASK (0xFF000000u)
  16932. #define CSL_CPINTC_CH_MAP_REG138_CH_MAP_555_SHIFT (0x00000018u)
  16933. #define CSL_CPINTC_CH_MAP_REG138_CH_MAP_555_RESETVAL (0x00000000u)
  16934. #define CSL_CPINTC_CH_MAP_REG138_RESETVAL (0x00000000u)
  16935. /* ch_map_reg139 */
  16936. #define CSL_CPINTC_CH_MAP_REG139_CH_MAP_556_MASK (0x000000FFu)
  16937. #define CSL_CPINTC_CH_MAP_REG139_CH_MAP_556_SHIFT (0x00000000u)
  16938. #define CSL_CPINTC_CH_MAP_REG139_CH_MAP_556_RESETVAL (0x00000000u)
  16939. #define CSL_CPINTC_CH_MAP_REG139_CH_MAP_557_MASK (0x0000FF00u)
  16940. #define CSL_CPINTC_CH_MAP_REG139_CH_MAP_557_SHIFT (0x00000008u)
  16941. #define CSL_CPINTC_CH_MAP_REG139_CH_MAP_557_RESETVAL (0x00000000u)
  16942. #define CSL_CPINTC_CH_MAP_REG139_CH_MAP_558_MASK (0x00FF0000u)
  16943. #define CSL_CPINTC_CH_MAP_REG139_CH_MAP_558_SHIFT (0x00000010u)
  16944. #define CSL_CPINTC_CH_MAP_REG139_CH_MAP_558_RESETVAL (0x00000000u)
  16945. #define CSL_CPINTC_CH_MAP_REG139_CH_MAP_559_MASK (0xFF000000u)
  16946. #define CSL_CPINTC_CH_MAP_REG139_CH_MAP_559_SHIFT (0x00000018u)
  16947. #define CSL_CPINTC_CH_MAP_REG139_CH_MAP_559_RESETVAL (0x00000000u)
  16948. #define CSL_CPINTC_CH_MAP_REG139_RESETVAL (0x00000000u)
  16949. /* ch_map_reg140 */
  16950. #define CSL_CPINTC_CH_MAP_REG140_CH_MAP_560_MASK (0x000000FFu)
  16951. #define CSL_CPINTC_CH_MAP_REG140_CH_MAP_560_SHIFT (0x00000000u)
  16952. #define CSL_CPINTC_CH_MAP_REG140_CH_MAP_560_RESETVAL (0x00000000u)
  16953. #define CSL_CPINTC_CH_MAP_REG140_CH_MAP_561_MASK (0x0000FF00u)
  16954. #define CSL_CPINTC_CH_MAP_REG140_CH_MAP_561_SHIFT (0x00000008u)
  16955. #define CSL_CPINTC_CH_MAP_REG140_CH_MAP_561_RESETVAL (0x00000000u)
  16956. #define CSL_CPINTC_CH_MAP_REG140_CH_MAP_562_MASK (0x00FF0000u)
  16957. #define CSL_CPINTC_CH_MAP_REG140_CH_MAP_562_SHIFT (0x00000010u)
  16958. #define CSL_CPINTC_CH_MAP_REG140_CH_MAP_562_RESETVAL (0x00000000u)
  16959. #define CSL_CPINTC_CH_MAP_REG140_CH_MAP_563_MASK (0xFF000000u)
  16960. #define CSL_CPINTC_CH_MAP_REG140_CH_MAP_563_SHIFT (0x00000018u)
  16961. #define CSL_CPINTC_CH_MAP_REG140_CH_MAP_563_RESETVAL (0x00000000u)
  16962. #define CSL_CPINTC_CH_MAP_REG140_RESETVAL (0x00000000u)
  16963. /* ch_map_reg141 */
  16964. #define CSL_CPINTC_CH_MAP_REG141_CH_MAP_564_MASK (0x000000FFu)
  16965. #define CSL_CPINTC_CH_MAP_REG141_CH_MAP_564_SHIFT (0x00000000u)
  16966. #define CSL_CPINTC_CH_MAP_REG141_CH_MAP_564_RESETVAL (0x00000000u)
  16967. #define CSL_CPINTC_CH_MAP_REG141_CH_MAP_565_MASK (0x0000FF00u)
  16968. #define CSL_CPINTC_CH_MAP_REG141_CH_MAP_565_SHIFT (0x00000008u)
  16969. #define CSL_CPINTC_CH_MAP_REG141_CH_MAP_565_RESETVAL (0x00000000u)
  16970. #define CSL_CPINTC_CH_MAP_REG141_CH_MAP_566_MASK (0x00FF0000u)
  16971. #define CSL_CPINTC_CH_MAP_REG141_CH_MAP_566_SHIFT (0x00000010u)
  16972. #define CSL_CPINTC_CH_MAP_REG141_CH_MAP_566_RESETVAL (0x00000000u)
  16973. #define CSL_CPINTC_CH_MAP_REG141_CH_MAP_567_MASK (0xFF000000u)
  16974. #define CSL_CPINTC_CH_MAP_REG141_CH_MAP_567_SHIFT (0x00000018u)
  16975. #define CSL_CPINTC_CH_MAP_REG141_CH_MAP_567_RESETVAL (0x00000000u)
  16976. #define CSL_CPINTC_CH_MAP_REG141_RESETVAL (0x00000000u)
  16977. /* ch_map_reg142 */
  16978. #define CSL_CPINTC_CH_MAP_REG142_CH_MAP_568_MASK (0x000000FFu)
  16979. #define CSL_CPINTC_CH_MAP_REG142_CH_MAP_568_SHIFT (0x00000000u)
  16980. #define CSL_CPINTC_CH_MAP_REG142_CH_MAP_568_RESETVAL (0x00000000u)
  16981. #define CSL_CPINTC_CH_MAP_REG142_CH_MAP_569_MASK (0x0000FF00u)
  16982. #define CSL_CPINTC_CH_MAP_REG142_CH_MAP_569_SHIFT (0x00000008u)
  16983. #define CSL_CPINTC_CH_MAP_REG142_CH_MAP_569_RESETVAL (0x00000000u)
  16984. #define CSL_CPINTC_CH_MAP_REG142_CH_MAP_570_MASK (0x00FF0000u)
  16985. #define CSL_CPINTC_CH_MAP_REG142_CH_MAP_570_SHIFT (0x00000010u)
  16986. #define CSL_CPINTC_CH_MAP_REG142_CH_MAP_570_RESETVAL (0x00000000u)
  16987. #define CSL_CPINTC_CH_MAP_REG142_CH_MAP_571_MASK (0xFF000000u)
  16988. #define CSL_CPINTC_CH_MAP_REG142_CH_MAP_571_SHIFT (0x00000018u)
  16989. #define CSL_CPINTC_CH_MAP_REG142_CH_MAP_571_RESETVAL (0x00000000u)
  16990. #define CSL_CPINTC_CH_MAP_REG142_RESETVAL (0x00000000u)
  16991. /* ch_map_reg143 */
  16992. #define CSL_CPINTC_CH_MAP_REG143_CH_MAP_572_MASK (0x000000FFu)
  16993. #define CSL_CPINTC_CH_MAP_REG143_CH_MAP_572_SHIFT (0x00000000u)
  16994. #define CSL_CPINTC_CH_MAP_REG143_CH_MAP_572_RESETVAL (0x00000000u)
  16995. #define CSL_CPINTC_CH_MAP_REG143_CH_MAP_573_MASK (0x0000FF00u)
  16996. #define CSL_CPINTC_CH_MAP_REG143_CH_MAP_573_SHIFT (0x00000008u)
  16997. #define CSL_CPINTC_CH_MAP_REG143_CH_MAP_573_RESETVAL (0x00000000u)
  16998. #define CSL_CPINTC_CH_MAP_REG143_CH_MAP_574_MASK (0x00FF0000u)
  16999. #define CSL_CPINTC_CH_MAP_REG143_CH_MAP_574_SHIFT (0x00000010u)
  17000. #define CSL_CPINTC_CH_MAP_REG143_CH_MAP_574_RESETVAL (0x00000000u)
  17001. #define CSL_CPINTC_CH_MAP_REG143_CH_MAP_575_MASK (0xFF000000u)
  17002. #define CSL_CPINTC_CH_MAP_REG143_CH_MAP_575_SHIFT (0x00000018u)
  17003. #define CSL_CPINTC_CH_MAP_REG143_CH_MAP_575_RESETVAL (0x00000000u)
  17004. #define CSL_CPINTC_CH_MAP_REG143_RESETVAL (0x00000000u)
  17005. /* ch_map_reg144 */
  17006. #define CSL_CPINTC_CH_MAP_REG144_CH_MAP_576_MASK (0x000000FFu)
  17007. #define CSL_CPINTC_CH_MAP_REG144_CH_MAP_576_SHIFT (0x00000000u)
  17008. #define CSL_CPINTC_CH_MAP_REG144_CH_MAP_576_RESETVAL (0x00000000u)
  17009. #define CSL_CPINTC_CH_MAP_REG144_CH_MAP_577_MASK (0x0000FF00u)
  17010. #define CSL_CPINTC_CH_MAP_REG144_CH_MAP_577_SHIFT (0x00000008u)
  17011. #define CSL_CPINTC_CH_MAP_REG144_CH_MAP_577_RESETVAL (0x00000000u)
  17012. #define CSL_CPINTC_CH_MAP_REG144_CH_MAP_578_MASK (0x00FF0000u)
  17013. #define CSL_CPINTC_CH_MAP_REG144_CH_MAP_578_SHIFT (0x00000010u)
  17014. #define CSL_CPINTC_CH_MAP_REG144_CH_MAP_578_RESETVAL (0x00000000u)
  17015. #define CSL_CPINTC_CH_MAP_REG144_CH_MAP_579_MASK (0xFF000000u)
  17016. #define CSL_CPINTC_CH_MAP_REG144_CH_MAP_579_SHIFT (0x00000018u)
  17017. #define CSL_CPINTC_CH_MAP_REG144_CH_MAP_579_RESETVAL (0x00000000u)
  17018. #define CSL_CPINTC_CH_MAP_REG144_RESETVAL (0x00000000u)
  17019. /* ch_map_reg145 */
  17020. #define CSL_CPINTC_CH_MAP_REG145_CH_MAP_580_MASK (0x000000FFu)
  17021. #define CSL_CPINTC_CH_MAP_REG145_CH_MAP_580_SHIFT (0x00000000u)
  17022. #define CSL_CPINTC_CH_MAP_REG145_CH_MAP_580_RESETVAL (0x00000000u)
  17023. #define CSL_CPINTC_CH_MAP_REG145_CH_MAP_581_MASK (0x0000FF00u)
  17024. #define CSL_CPINTC_CH_MAP_REG145_CH_MAP_581_SHIFT (0x00000008u)
  17025. #define CSL_CPINTC_CH_MAP_REG145_CH_MAP_581_RESETVAL (0x00000000u)
  17026. #define CSL_CPINTC_CH_MAP_REG145_CH_MAP_582_MASK (0x00FF0000u)
  17027. #define CSL_CPINTC_CH_MAP_REG145_CH_MAP_582_SHIFT (0x00000010u)
  17028. #define CSL_CPINTC_CH_MAP_REG145_CH_MAP_582_RESETVAL (0x00000000u)
  17029. #define CSL_CPINTC_CH_MAP_REG145_CH_MAP_583_MASK (0xFF000000u)
  17030. #define CSL_CPINTC_CH_MAP_REG145_CH_MAP_583_SHIFT (0x00000018u)
  17031. #define CSL_CPINTC_CH_MAP_REG145_CH_MAP_583_RESETVAL (0x00000000u)
  17032. #define CSL_CPINTC_CH_MAP_REG145_RESETVAL (0x00000000u)
  17033. /* ch_map_reg146 */
  17034. #define CSL_CPINTC_CH_MAP_REG146_CH_MAP_584_MASK (0x000000FFu)
  17035. #define CSL_CPINTC_CH_MAP_REG146_CH_MAP_584_SHIFT (0x00000000u)
  17036. #define CSL_CPINTC_CH_MAP_REG146_CH_MAP_584_RESETVAL (0x00000000u)
  17037. #define CSL_CPINTC_CH_MAP_REG146_CH_MAP_585_MASK (0x0000FF00u)
  17038. #define CSL_CPINTC_CH_MAP_REG146_CH_MAP_585_SHIFT (0x00000008u)
  17039. #define CSL_CPINTC_CH_MAP_REG146_CH_MAP_585_RESETVAL (0x00000000u)
  17040. #define CSL_CPINTC_CH_MAP_REG146_CH_MAP_586_MASK (0x00FF0000u)
  17041. #define CSL_CPINTC_CH_MAP_REG146_CH_MAP_586_SHIFT (0x00000010u)
  17042. #define CSL_CPINTC_CH_MAP_REG146_CH_MAP_586_RESETVAL (0x00000000u)
  17043. #define CSL_CPINTC_CH_MAP_REG146_CH_MAP_587_MASK (0xFF000000u)
  17044. #define CSL_CPINTC_CH_MAP_REG146_CH_MAP_587_SHIFT (0x00000018u)
  17045. #define CSL_CPINTC_CH_MAP_REG146_CH_MAP_587_RESETVAL (0x00000000u)
  17046. #define CSL_CPINTC_CH_MAP_REG146_RESETVAL (0x00000000u)
  17047. /* ch_map_reg147 */
  17048. #define CSL_CPINTC_CH_MAP_REG147_CH_MAP_588_MASK (0x000000FFu)
  17049. #define CSL_CPINTC_CH_MAP_REG147_CH_MAP_588_SHIFT (0x00000000u)
  17050. #define CSL_CPINTC_CH_MAP_REG147_CH_MAP_588_RESETVAL (0x00000000u)
  17051. #define CSL_CPINTC_CH_MAP_REG147_CH_MAP_589_MASK (0x0000FF00u)
  17052. #define CSL_CPINTC_CH_MAP_REG147_CH_MAP_589_SHIFT (0x00000008u)
  17053. #define CSL_CPINTC_CH_MAP_REG147_CH_MAP_589_RESETVAL (0x00000000u)
  17054. #define CSL_CPINTC_CH_MAP_REG147_CH_MAP_590_MASK (0x00FF0000u)
  17055. #define CSL_CPINTC_CH_MAP_REG147_CH_MAP_590_SHIFT (0x00000010u)
  17056. #define CSL_CPINTC_CH_MAP_REG147_CH_MAP_590_RESETVAL (0x00000000u)
  17057. #define CSL_CPINTC_CH_MAP_REG147_CH_MAP_591_MASK (0xFF000000u)
  17058. #define CSL_CPINTC_CH_MAP_REG147_CH_MAP_591_SHIFT (0x00000018u)
  17059. #define CSL_CPINTC_CH_MAP_REG147_CH_MAP_591_RESETVAL (0x00000000u)
  17060. #define CSL_CPINTC_CH_MAP_REG147_RESETVAL (0x00000000u)
  17061. /* ch_map_reg148 */
  17062. #define CSL_CPINTC_CH_MAP_REG148_CH_MAP_592_MASK (0x000000FFu)
  17063. #define CSL_CPINTC_CH_MAP_REG148_CH_MAP_592_SHIFT (0x00000000u)
  17064. #define CSL_CPINTC_CH_MAP_REG148_CH_MAP_592_RESETVAL (0x00000000u)
  17065. #define CSL_CPINTC_CH_MAP_REG148_CH_MAP_593_MASK (0x0000FF00u)
  17066. #define CSL_CPINTC_CH_MAP_REG148_CH_MAP_593_SHIFT (0x00000008u)
  17067. #define CSL_CPINTC_CH_MAP_REG148_CH_MAP_593_RESETVAL (0x00000000u)
  17068. #define CSL_CPINTC_CH_MAP_REG148_CH_MAP_594_MASK (0x00FF0000u)
  17069. #define CSL_CPINTC_CH_MAP_REG148_CH_MAP_594_SHIFT (0x00000010u)
  17070. #define CSL_CPINTC_CH_MAP_REG148_CH_MAP_594_RESETVAL (0x00000000u)
  17071. #define CSL_CPINTC_CH_MAP_REG148_CH_MAP_595_MASK (0xFF000000u)
  17072. #define CSL_CPINTC_CH_MAP_REG148_CH_MAP_595_SHIFT (0x00000018u)
  17073. #define CSL_CPINTC_CH_MAP_REG148_CH_MAP_595_RESETVAL (0x00000000u)
  17074. #define CSL_CPINTC_CH_MAP_REG148_RESETVAL (0x00000000u)
  17075. /* ch_map_reg149 */
  17076. #define CSL_CPINTC_CH_MAP_REG149_CH_MAP_596_MASK (0x000000FFu)
  17077. #define CSL_CPINTC_CH_MAP_REG149_CH_MAP_596_SHIFT (0x00000000u)
  17078. #define CSL_CPINTC_CH_MAP_REG149_CH_MAP_596_RESETVAL (0x00000000u)
  17079. #define CSL_CPINTC_CH_MAP_REG149_CH_MAP_597_MASK (0x0000FF00u)
  17080. #define CSL_CPINTC_CH_MAP_REG149_CH_MAP_597_SHIFT (0x00000008u)
  17081. #define CSL_CPINTC_CH_MAP_REG149_CH_MAP_597_RESETVAL (0x00000000u)
  17082. #define CSL_CPINTC_CH_MAP_REG149_CH_MAP_598_MASK (0x00FF0000u)
  17083. #define CSL_CPINTC_CH_MAP_REG149_CH_MAP_598_SHIFT (0x00000010u)
  17084. #define CSL_CPINTC_CH_MAP_REG149_CH_MAP_598_RESETVAL (0x00000000u)
  17085. #define CSL_CPINTC_CH_MAP_REG149_CH_MAP_599_MASK (0xFF000000u)
  17086. #define CSL_CPINTC_CH_MAP_REG149_CH_MAP_599_SHIFT (0x00000018u)
  17087. #define CSL_CPINTC_CH_MAP_REG149_CH_MAP_599_RESETVAL (0x00000000u)
  17088. #define CSL_CPINTC_CH_MAP_REG149_RESETVAL (0x00000000u)
  17089. /* ch_map_reg150 */
  17090. #define CSL_CPINTC_CH_MAP_REG150_CH_MAP_600_MASK (0x000000FFu)
  17091. #define CSL_CPINTC_CH_MAP_REG150_CH_MAP_600_SHIFT (0x00000000u)
  17092. #define CSL_CPINTC_CH_MAP_REG150_CH_MAP_600_RESETVAL (0x00000000u)
  17093. #define CSL_CPINTC_CH_MAP_REG150_CH_MAP_601_MASK (0x0000FF00u)
  17094. #define CSL_CPINTC_CH_MAP_REG150_CH_MAP_601_SHIFT (0x00000008u)
  17095. #define CSL_CPINTC_CH_MAP_REG150_CH_MAP_601_RESETVAL (0x00000000u)
  17096. #define CSL_CPINTC_CH_MAP_REG150_CH_MAP_602_MASK (0x00FF0000u)
  17097. #define CSL_CPINTC_CH_MAP_REG150_CH_MAP_602_SHIFT (0x00000010u)
  17098. #define CSL_CPINTC_CH_MAP_REG150_CH_MAP_602_RESETVAL (0x00000000u)
  17099. #define CSL_CPINTC_CH_MAP_REG150_CH_MAP_603_MASK (0xFF000000u)
  17100. #define CSL_CPINTC_CH_MAP_REG150_CH_MAP_603_SHIFT (0x00000018u)
  17101. #define CSL_CPINTC_CH_MAP_REG150_CH_MAP_603_RESETVAL (0x00000000u)
  17102. #define CSL_CPINTC_CH_MAP_REG150_RESETVAL (0x00000000u)
  17103. /* ch_map_reg151 */
  17104. #define CSL_CPINTC_CH_MAP_REG151_CH_MAP_604_MASK (0x000000FFu)
  17105. #define CSL_CPINTC_CH_MAP_REG151_CH_MAP_604_SHIFT (0x00000000u)
  17106. #define CSL_CPINTC_CH_MAP_REG151_CH_MAP_604_RESETVAL (0x00000000u)
  17107. #define CSL_CPINTC_CH_MAP_REG151_CH_MAP_605_MASK (0x0000FF00u)
  17108. #define CSL_CPINTC_CH_MAP_REG151_CH_MAP_605_SHIFT (0x00000008u)
  17109. #define CSL_CPINTC_CH_MAP_REG151_CH_MAP_605_RESETVAL (0x00000000u)
  17110. #define CSL_CPINTC_CH_MAP_REG151_CH_MAP_606_MASK (0x00FF0000u)
  17111. #define CSL_CPINTC_CH_MAP_REG151_CH_MAP_606_SHIFT (0x00000010u)
  17112. #define CSL_CPINTC_CH_MAP_REG151_CH_MAP_606_RESETVAL (0x00000000u)
  17113. #define CSL_CPINTC_CH_MAP_REG151_CH_MAP_607_MASK (0xFF000000u)
  17114. #define CSL_CPINTC_CH_MAP_REG151_CH_MAP_607_SHIFT (0x00000018u)
  17115. #define CSL_CPINTC_CH_MAP_REG151_CH_MAP_607_RESETVAL (0x00000000u)
  17116. #define CSL_CPINTC_CH_MAP_REG151_RESETVAL (0x00000000u)
  17117. /* ch_map_reg152 */
  17118. #define CSL_CPINTC_CH_MAP_REG152_CH_MAP_608_MASK (0x000000FFu)
  17119. #define CSL_CPINTC_CH_MAP_REG152_CH_MAP_608_SHIFT (0x00000000u)
  17120. #define CSL_CPINTC_CH_MAP_REG152_CH_MAP_608_RESETVAL (0x00000000u)
  17121. #define CSL_CPINTC_CH_MAP_REG152_CH_MAP_609_MASK (0x0000FF00u)
  17122. #define CSL_CPINTC_CH_MAP_REG152_CH_MAP_609_SHIFT (0x00000008u)
  17123. #define CSL_CPINTC_CH_MAP_REG152_CH_MAP_609_RESETVAL (0x00000000u)
  17124. #define CSL_CPINTC_CH_MAP_REG152_CH_MAP_610_MASK (0x00FF0000u)
  17125. #define CSL_CPINTC_CH_MAP_REG152_CH_MAP_610_SHIFT (0x00000010u)
  17126. #define CSL_CPINTC_CH_MAP_REG152_CH_MAP_610_RESETVAL (0x00000000u)
  17127. #define CSL_CPINTC_CH_MAP_REG152_CH_MAP_611_MASK (0xFF000000u)
  17128. #define CSL_CPINTC_CH_MAP_REG152_CH_MAP_611_SHIFT (0x00000018u)
  17129. #define CSL_CPINTC_CH_MAP_REG152_CH_MAP_611_RESETVAL (0x00000000u)
  17130. #define CSL_CPINTC_CH_MAP_REG152_RESETVAL (0x00000000u)
  17131. /* ch_map_reg153 */
  17132. #define CSL_CPINTC_CH_MAP_REG153_CH_MAP_612_MASK (0x000000FFu)
  17133. #define CSL_CPINTC_CH_MAP_REG153_CH_MAP_612_SHIFT (0x00000000u)
  17134. #define CSL_CPINTC_CH_MAP_REG153_CH_MAP_612_RESETVAL (0x00000000u)
  17135. #define CSL_CPINTC_CH_MAP_REG153_CH_MAP_613_MASK (0x0000FF00u)
  17136. #define CSL_CPINTC_CH_MAP_REG153_CH_MAP_613_SHIFT (0x00000008u)
  17137. #define CSL_CPINTC_CH_MAP_REG153_CH_MAP_613_RESETVAL (0x00000000u)
  17138. #define CSL_CPINTC_CH_MAP_REG153_CH_MAP_614_MASK (0x00FF0000u)
  17139. #define CSL_CPINTC_CH_MAP_REG153_CH_MAP_614_SHIFT (0x00000010u)
  17140. #define CSL_CPINTC_CH_MAP_REG153_CH_MAP_614_RESETVAL (0x00000000u)
  17141. #define CSL_CPINTC_CH_MAP_REG153_CH_MAP_615_MASK (0xFF000000u)
  17142. #define CSL_CPINTC_CH_MAP_REG153_CH_MAP_615_SHIFT (0x00000018u)
  17143. #define CSL_CPINTC_CH_MAP_REG153_CH_MAP_615_RESETVAL (0x00000000u)
  17144. #define CSL_CPINTC_CH_MAP_REG153_RESETVAL (0x00000000u)
  17145. /* ch_map_reg154 */
  17146. #define CSL_CPINTC_CH_MAP_REG154_CH_MAP_616_MASK (0x000000FFu)
  17147. #define CSL_CPINTC_CH_MAP_REG154_CH_MAP_616_SHIFT (0x00000000u)
  17148. #define CSL_CPINTC_CH_MAP_REG154_CH_MAP_616_RESETVAL (0x00000000u)
  17149. #define CSL_CPINTC_CH_MAP_REG154_CH_MAP_617_MASK (0x0000FF00u)
  17150. #define CSL_CPINTC_CH_MAP_REG154_CH_MAP_617_SHIFT (0x00000008u)
  17151. #define CSL_CPINTC_CH_MAP_REG154_CH_MAP_617_RESETVAL (0x00000000u)
  17152. #define CSL_CPINTC_CH_MAP_REG154_CH_MAP_618_MASK (0x00FF0000u)
  17153. #define CSL_CPINTC_CH_MAP_REG154_CH_MAP_618_SHIFT (0x00000010u)
  17154. #define CSL_CPINTC_CH_MAP_REG154_CH_MAP_618_RESETVAL (0x00000000u)
  17155. #define CSL_CPINTC_CH_MAP_REG154_CH_MAP_619_MASK (0xFF000000u)
  17156. #define CSL_CPINTC_CH_MAP_REG154_CH_MAP_619_SHIFT (0x00000018u)
  17157. #define CSL_CPINTC_CH_MAP_REG154_CH_MAP_619_RESETVAL (0x00000000u)
  17158. #define CSL_CPINTC_CH_MAP_REG154_RESETVAL (0x00000000u)
  17159. /* ch_map_reg155 */
  17160. #define CSL_CPINTC_CH_MAP_REG155_CH_MAP_620_MASK (0x000000FFu)
  17161. #define CSL_CPINTC_CH_MAP_REG155_CH_MAP_620_SHIFT (0x00000000u)
  17162. #define CSL_CPINTC_CH_MAP_REG155_CH_MAP_620_RESETVAL (0x00000000u)
  17163. #define CSL_CPINTC_CH_MAP_REG155_CH_MAP_621_MASK (0x0000FF00u)
  17164. #define CSL_CPINTC_CH_MAP_REG155_CH_MAP_621_SHIFT (0x00000008u)
  17165. #define CSL_CPINTC_CH_MAP_REG155_CH_MAP_621_RESETVAL (0x00000000u)
  17166. #define CSL_CPINTC_CH_MAP_REG155_CH_MAP_622_MASK (0x00FF0000u)
  17167. #define CSL_CPINTC_CH_MAP_REG155_CH_MAP_622_SHIFT (0x00000010u)
  17168. #define CSL_CPINTC_CH_MAP_REG155_CH_MAP_622_RESETVAL (0x00000000u)
  17169. #define CSL_CPINTC_CH_MAP_REG155_CH_MAP_623_MASK (0xFF000000u)
  17170. #define CSL_CPINTC_CH_MAP_REG155_CH_MAP_623_SHIFT (0x00000018u)
  17171. #define CSL_CPINTC_CH_MAP_REG155_CH_MAP_623_RESETVAL (0x00000000u)
  17172. #define CSL_CPINTC_CH_MAP_REG155_RESETVAL (0x00000000u)
  17173. /* ch_map_reg156 */
  17174. #define CSL_CPINTC_CH_MAP_REG156_CH_MAP_624_MASK (0x000000FFu)
  17175. #define CSL_CPINTC_CH_MAP_REG156_CH_MAP_624_SHIFT (0x00000000u)
  17176. #define CSL_CPINTC_CH_MAP_REG156_CH_MAP_624_RESETVAL (0x00000000u)
  17177. #define CSL_CPINTC_CH_MAP_REG156_CH_MAP_625_MASK (0x0000FF00u)
  17178. #define CSL_CPINTC_CH_MAP_REG156_CH_MAP_625_SHIFT (0x00000008u)
  17179. #define CSL_CPINTC_CH_MAP_REG156_CH_MAP_625_RESETVAL (0x00000000u)
  17180. #define CSL_CPINTC_CH_MAP_REG156_CH_MAP_626_MASK (0x00FF0000u)
  17181. #define CSL_CPINTC_CH_MAP_REG156_CH_MAP_626_SHIFT (0x00000010u)
  17182. #define CSL_CPINTC_CH_MAP_REG156_CH_MAP_626_RESETVAL (0x00000000u)
  17183. #define CSL_CPINTC_CH_MAP_REG156_CH_MAP_627_MASK (0xFF000000u)
  17184. #define CSL_CPINTC_CH_MAP_REG156_CH_MAP_627_SHIFT (0x00000018u)
  17185. #define CSL_CPINTC_CH_MAP_REG156_CH_MAP_627_RESETVAL (0x00000000u)
  17186. #define CSL_CPINTC_CH_MAP_REG156_RESETVAL (0x00000000u)
  17187. /* ch_map_reg157 */
  17188. #define CSL_CPINTC_CH_MAP_REG157_CH_MAP_628_MASK (0x000000FFu)
  17189. #define CSL_CPINTC_CH_MAP_REG157_CH_MAP_628_SHIFT (0x00000000u)
  17190. #define CSL_CPINTC_CH_MAP_REG157_CH_MAP_628_RESETVAL (0x00000000u)
  17191. #define CSL_CPINTC_CH_MAP_REG157_CH_MAP_629_MASK (0x0000FF00u)
  17192. #define CSL_CPINTC_CH_MAP_REG157_CH_MAP_629_SHIFT (0x00000008u)
  17193. #define CSL_CPINTC_CH_MAP_REG157_CH_MAP_629_RESETVAL (0x00000000u)
  17194. #define CSL_CPINTC_CH_MAP_REG157_CH_MAP_630_MASK (0x00FF0000u)
  17195. #define CSL_CPINTC_CH_MAP_REG157_CH_MAP_630_SHIFT (0x00000010u)
  17196. #define CSL_CPINTC_CH_MAP_REG157_CH_MAP_630_RESETVAL (0x00000000u)
  17197. #define CSL_CPINTC_CH_MAP_REG157_CH_MAP_631_MASK (0xFF000000u)
  17198. #define CSL_CPINTC_CH_MAP_REG157_CH_MAP_631_SHIFT (0x00000018u)
  17199. #define CSL_CPINTC_CH_MAP_REG157_CH_MAP_631_RESETVAL (0x00000000u)
  17200. #define CSL_CPINTC_CH_MAP_REG157_RESETVAL (0x00000000u)
  17201. /* ch_map_reg158 */
  17202. #define CSL_CPINTC_CH_MAP_REG158_CH_MAP_632_MASK (0x000000FFu)
  17203. #define CSL_CPINTC_CH_MAP_REG158_CH_MAP_632_SHIFT (0x00000000u)
  17204. #define CSL_CPINTC_CH_MAP_REG158_CH_MAP_632_RESETVAL (0x00000000u)
  17205. #define CSL_CPINTC_CH_MAP_REG158_CH_MAP_633_MASK (0x0000FF00u)
  17206. #define CSL_CPINTC_CH_MAP_REG158_CH_MAP_633_SHIFT (0x00000008u)
  17207. #define CSL_CPINTC_CH_MAP_REG158_CH_MAP_633_RESETVAL (0x00000000u)
  17208. #define CSL_CPINTC_CH_MAP_REG158_CH_MAP_634_MASK (0x00FF0000u)
  17209. #define CSL_CPINTC_CH_MAP_REG158_CH_MAP_634_SHIFT (0x00000010u)
  17210. #define CSL_CPINTC_CH_MAP_REG158_CH_MAP_634_RESETVAL (0x00000000u)
  17211. #define CSL_CPINTC_CH_MAP_REG158_CH_MAP_635_MASK (0xFF000000u)
  17212. #define CSL_CPINTC_CH_MAP_REG158_CH_MAP_635_SHIFT (0x00000018u)
  17213. #define CSL_CPINTC_CH_MAP_REG158_CH_MAP_635_RESETVAL (0x00000000u)
  17214. #define CSL_CPINTC_CH_MAP_REG158_RESETVAL (0x00000000u)
  17215. /* ch_map_reg159 */
  17216. #define CSL_CPINTC_CH_MAP_REG159_CH_MAP_636_MASK (0x000000FFu)
  17217. #define CSL_CPINTC_CH_MAP_REG159_CH_MAP_636_SHIFT (0x00000000u)
  17218. #define CSL_CPINTC_CH_MAP_REG159_CH_MAP_636_RESETVAL (0x00000000u)
  17219. #define CSL_CPINTC_CH_MAP_REG159_CH_MAP_637_MASK (0x0000FF00u)
  17220. #define CSL_CPINTC_CH_MAP_REG159_CH_MAP_637_SHIFT (0x00000008u)
  17221. #define CSL_CPINTC_CH_MAP_REG159_CH_MAP_637_RESETVAL (0x00000000u)
  17222. #define CSL_CPINTC_CH_MAP_REG159_CH_MAP_638_MASK (0x00FF0000u)
  17223. #define CSL_CPINTC_CH_MAP_REG159_CH_MAP_638_SHIFT (0x00000010u)
  17224. #define CSL_CPINTC_CH_MAP_REG159_CH_MAP_638_RESETVAL (0x00000000u)
  17225. #define CSL_CPINTC_CH_MAP_REG159_CH_MAP_639_MASK (0xFF000000u)
  17226. #define CSL_CPINTC_CH_MAP_REG159_CH_MAP_639_SHIFT (0x00000018u)
  17227. #define CSL_CPINTC_CH_MAP_REG159_CH_MAP_639_RESETVAL (0x00000000u)
  17228. #define CSL_CPINTC_CH_MAP_REG159_RESETVAL (0x00000000u)
  17229. /* ch_map_reg160 */
  17230. #define CSL_CPINTC_CH_MAP_REG160_CH_MAP_640_MASK (0x000000FFu)
  17231. #define CSL_CPINTC_CH_MAP_REG160_CH_MAP_640_SHIFT (0x00000000u)
  17232. #define CSL_CPINTC_CH_MAP_REG160_CH_MAP_640_RESETVAL (0x00000000u)
  17233. #define CSL_CPINTC_CH_MAP_REG160_CH_MAP_641_MASK (0x0000FF00u)
  17234. #define CSL_CPINTC_CH_MAP_REG160_CH_MAP_641_SHIFT (0x00000008u)
  17235. #define CSL_CPINTC_CH_MAP_REG160_CH_MAP_641_RESETVAL (0x00000000u)
  17236. #define CSL_CPINTC_CH_MAP_REG160_CH_MAP_642_MASK (0x00FF0000u)
  17237. #define CSL_CPINTC_CH_MAP_REG160_CH_MAP_642_SHIFT (0x00000010u)
  17238. #define CSL_CPINTC_CH_MAP_REG160_CH_MAP_642_RESETVAL (0x00000000u)
  17239. #define CSL_CPINTC_CH_MAP_REG160_CH_MAP_643_MASK (0xFF000000u)
  17240. #define CSL_CPINTC_CH_MAP_REG160_CH_MAP_643_SHIFT (0x00000018u)
  17241. #define CSL_CPINTC_CH_MAP_REG160_CH_MAP_643_RESETVAL (0x00000000u)
  17242. #define CSL_CPINTC_CH_MAP_REG160_RESETVAL (0x00000000u)
  17243. /* ch_map_reg161 */
  17244. #define CSL_CPINTC_CH_MAP_REG161_CH_MAP_644_MASK (0x000000FFu)
  17245. #define CSL_CPINTC_CH_MAP_REG161_CH_MAP_644_SHIFT (0x00000000u)
  17246. #define CSL_CPINTC_CH_MAP_REG161_CH_MAP_644_RESETVAL (0x00000000u)
  17247. #define CSL_CPINTC_CH_MAP_REG161_CH_MAP_645_MASK (0x0000FF00u)
  17248. #define CSL_CPINTC_CH_MAP_REG161_CH_MAP_645_SHIFT (0x00000008u)
  17249. #define CSL_CPINTC_CH_MAP_REG161_CH_MAP_645_RESETVAL (0x00000000u)
  17250. #define CSL_CPINTC_CH_MAP_REG161_CH_MAP_646_MASK (0x00FF0000u)
  17251. #define CSL_CPINTC_CH_MAP_REG161_CH_MAP_646_SHIFT (0x00000010u)
  17252. #define CSL_CPINTC_CH_MAP_REG161_CH_MAP_646_RESETVAL (0x00000000u)
  17253. #define CSL_CPINTC_CH_MAP_REG161_CH_MAP_647_MASK (0xFF000000u)
  17254. #define CSL_CPINTC_CH_MAP_REG161_CH_MAP_647_SHIFT (0x00000018u)
  17255. #define CSL_CPINTC_CH_MAP_REG161_CH_MAP_647_RESETVAL (0x00000000u)
  17256. #define CSL_CPINTC_CH_MAP_REG161_RESETVAL (0x00000000u)
  17257. /* ch_map_reg162 */
  17258. #define CSL_CPINTC_CH_MAP_REG162_CH_MAP_648_MASK (0x000000FFu)
  17259. #define CSL_CPINTC_CH_MAP_REG162_CH_MAP_648_SHIFT (0x00000000u)
  17260. #define CSL_CPINTC_CH_MAP_REG162_CH_MAP_648_RESETVAL (0x00000000u)
  17261. #define CSL_CPINTC_CH_MAP_REG162_CH_MAP_649_MASK (0x0000FF00u)
  17262. #define CSL_CPINTC_CH_MAP_REG162_CH_MAP_649_SHIFT (0x00000008u)
  17263. #define CSL_CPINTC_CH_MAP_REG162_CH_MAP_649_RESETVAL (0x00000000u)
  17264. #define CSL_CPINTC_CH_MAP_REG162_CH_MAP_650_MASK (0x00FF0000u)
  17265. #define CSL_CPINTC_CH_MAP_REG162_CH_MAP_650_SHIFT (0x00000010u)
  17266. #define CSL_CPINTC_CH_MAP_REG162_CH_MAP_650_RESETVAL (0x00000000u)
  17267. #define CSL_CPINTC_CH_MAP_REG162_CH_MAP_651_MASK (0xFF000000u)
  17268. #define CSL_CPINTC_CH_MAP_REG162_CH_MAP_651_SHIFT (0x00000018u)
  17269. #define CSL_CPINTC_CH_MAP_REG162_CH_MAP_651_RESETVAL (0x00000000u)
  17270. #define CSL_CPINTC_CH_MAP_REG162_RESETVAL (0x00000000u)
  17271. /* ch_map_reg163 */
  17272. #define CSL_CPINTC_CH_MAP_REG163_CH_MAP_652_MASK (0x000000FFu)
  17273. #define CSL_CPINTC_CH_MAP_REG163_CH_MAP_652_SHIFT (0x00000000u)
  17274. #define CSL_CPINTC_CH_MAP_REG163_CH_MAP_652_RESETVAL (0x00000000u)
  17275. #define CSL_CPINTC_CH_MAP_REG163_CH_MAP_653_MASK (0x0000FF00u)
  17276. #define CSL_CPINTC_CH_MAP_REG163_CH_MAP_653_SHIFT (0x00000008u)
  17277. #define CSL_CPINTC_CH_MAP_REG163_CH_MAP_653_RESETVAL (0x00000000u)
  17278. #define CSL_CPINTC_CH_MAP_REG163_CH_MAP_654_MASK (0x00FF0000u)
  17279. #define CSL_CPINTC_CH_MAP_REG163_CH_MAP_654_SHIFT (0x00000010u)
  17280. #define CSL_CPINTC_CH_MAP_REG163_CH_MAP_654_RESETVAL (0x00000000u)
  17281. #define CSL_CPINTC_CH_MAP_REG163_CH_MAP_655_MASK (0xFF000000u)
  17282. #define CSL_CPINTC_CH_MAP_REG163_CH_MAP_655_SHIFT (0x00000018u)
  17283. #define CSL_CPINTC_CH_MAP_REG163_CH_MAP_655_RESETVAL (0x00000000u)
  17284. #define CSL_CPINTC_CH_MAP_REG163_RESETVAL (0x00000000u)
  17285. /* ch_map_reg164 */
  17286. #define CSL_CPINTC_CH_MAP_REG164_CH_MAP_656_MASK (0x000000FFu)
  17287. #define CSL_CPINTC_CH_MAP_REG164_CH_MAP_656_SHIFT (0x00000000u)
  17288. #define CSL_CPINTC_CH_MAP_REG164_CH_MAP_656_RESETVAL (0x00000000u)
  17289. #define CSL_CPINTC_CH_MAP_REG164_CH_MAP_657_MASK (0x0000FF00u)
  17290. #define CSL_CPINTC_CH_MAP_REG164_CH_MAP_657_SHIFT (0x00000008u)
  17291. #define CSL_CPINTC_CH_MAP_REG164_CH_MAP_657_RESETVAL (0x00000000u)
  17292. #define CSL_CPINTC_CH_MAP_REG164_CH_MAP_658_MASK (0x00FF0000u)
  17293. #define CSL_CPINTC_CH_MAP_REG164_CH_MAP_658_SHIFT (0x00000010u)
  17294. #define CSL_CPINTC_CH_MAP_REG164_CH_MAP_658_RESETVAL (0x00000000u)
  17295. #define CSL_CPINTC_CH_MAP_REG164_CH_MAP_659_MASK (0xFF000000u)
  17296. #define CSL_CPINTC_CH_MAP_REG164_CH_MAP_659_SHIFT (0x00000018u)
  17297. #define CSL_CPINTC_CH_MAP_REG164_CH_MAP_659_RESETVAL (0x00000000u)
  17298. #define CSL_CPINTC_CH_MAP_REG164_RESETVAL (0x00000000u)
  17299. /* ch_map_reg165 */
  17300. #define CSL_CPINTC_CH_MAP_REG165_CH_MAP_660_MASK (0x000000FFu)
  17301. #define CSL_CPINTC_CH_MAP_REG165_CH_MAP_660_SHIFT (0x00000000u)
  17302. #define CSL_CPINTC_CH_MAP_REG165_CH_MAP_660_RESETVAL (0x00000000u)
  17303. #define CSL_CPINTC_CH_MAP_REG165_CH_MAP_661_MASK (0x0000FF00u)
  17304. #define CSL_CPINTC_CH_MAP_REG165_CH_MAP_661_SHIFT (0x00000008u)
  17305. #define CSL_CPINTC_CH_MAP_REG165_CH_MAP_661_RESETVAL (0x00000000u)
  17306. #define CSL_CPINTC_CH_MAP_REG165_CH_MAP_662_MASK (0x00FF0000u)
  17307. #define CSL_CPINTC_CH_MAP_REG165_CH_MAP_662_SHIFT (0x00000010u)
  17308. #define CSL_CPINTC_CH_MAP_REG165_CH_MAP_662_RESETVAL (0x00000000u)
  17309. #define CSL_CPINTC_CH_MAP_REG165_CH_MAP_663_MASK (0xFF000000u)
  17310. #define CSL_CPINTC_CH_MAP_REG165_CH_MAP_663_SHIFT (0x00000018u)
  17311. #define CSL_CPINTC_CH_MAP_REG165_CH_MAP_663_RESETVAL (0x00000000u)
  17312. #define CSL_CPINTC_CH_MAP_REG165_RESETVAL (0x00000000u)
  17313. /* ch_map_reg166 */
  17314. #define CSL_CPINTC_CH_MAP_REG166_CH_MAP_664_MASK (0x000000FFu)
  17315. #define CSL_CPINTC_CH_MAP_REG166_CH_MAP_664_SHIFT (0x00000000u)
  17316. #define CSL_CPINTC_CH_MAP_REG166_CH_MAP_664_RESETVAL (0x00000000u)
  17317. #define CSL_CPINTC_CH_MAP_REG166_CH_MAP_665_MASK (0x0000FF00u)
  17318. #define CSL_CPINTC_CH_MAP_REG166_CH_MAP_665_SHIFT (0x00000008u)
  17319. #define CSL_CPINTC_CH_MAP_REG166_CH_MAP_665_RESETVAL (0x00000000u)
  17320. #define CSL_CPINTC_CH_MAP_REG166_CH_MAP_666_MASK (0x00FF0000u)
  17321. #define CSL_CPINTC_CH_MAP_REG166_CH_MAP_666_SHIFT (0x00000010u)
  17322. #define CSL_CPINTC_CH_MAP_REG166_CH_MAP_666_RESETVAL (0x00000000u)
  17323. #define CSL_CPINTC_CH_MAP_REG166_CH_MAP_667_MASK (0xFF000000u)
  17324. #define CSL_CPINTC_CH_MAP_REG166_CH_MAP_667_SHIFT (0x00000018u)
  17325. #define CSL_CPINTC_CH_MAP_REG166_CH_MAP_667_RESETVAL (0x00000000u)
  17326. #define CSL_CPINTC_CH_MAP_REG166_RESETVAL (0x00000000u)
  17327. /* ch_map_reg167 */
  17328. #define CSL_CPINTC_CH_MAP_REG167_CH_MAP_668_MASK (0x000000FFu)
  17329. #define CSL_CPINTC_CH_MAP_REG167_CH_MAP_668_SHIFT (0x00000000u)
  17330. #define CSL_CPINTC_CH_MAP_REG167_CH_MAP_668_RESETVAL (0x00000000u)
  17331. #define CSL_CPINTC_CH_MAP_REG167_CH_MAP_669_MASK (0x0000FF00u)
  17332. #define CSL_CPINTC_CH_MAP_REG167_CH_MAP_669_SHIFT (0x00000008u)
  17333. #define CSL_CPINTC_CH_MAP_REG167_CH_MAP_669_RESETVAL (0x00000000u)
  17334. #define CSL_CPINTC_CH_MAP_REG167_CH_MAP_670_MASK (0x00FF0000u)
  17335. #define CSL_CPINTC_CH_MAP_REG167_CH_MAP_670_SHIFT (0x00000010u)
  17336. #define CSL_CPINTC_CH_MAP_REG167_CH_MAP_670_RESETVAL (0x00000000u)
  17337. #define CSL_CPINTC_CH_MAP_REG167_CH_MAP_671_MASK (0xFF000000u)
  17338. #define CSL_CPINTC_CH_MAP_REG167_CH_MAP_671_SHIFT (0x00000018u)
  17339. #define CSL_CPINTC_CH_MAP_REG167_CH_MAP_671_RESETVAL (0x00000000u)
  17340. #define CSL_CPINTC_CH_MAP_REG167_RESETVAL (0x00000000u)
  17341. /* ch_map_reg168 */
  17342. #define CSL_CPINTC_CH_MAP_REG168_CH_MAP_672_MASK (0x000000FFu)
  17343. #define CSL_CPINTC_CH_MAP_REG168_CH_MAP_672_SHIFT (0x00000000u)
  17344. #define CSL_CPINTC_CH_MAP_REG168_CH_MAP_672_RESETVAL (0x00000000u)
  17345. #define CSL_CPINTC_CH_MAP_REG168_CH_MAP_673_MASK (0x0000FF00u)
  17346. #define CSL_CPINTC_CH_MAP_REG168_CH_MAP_673_SHIFT (0x00000008u)
  17347. #define CSL_CPINTC_CH_MAP_REG168_CH_MAP_673_RESETVAL (0x00000000u)
  17348. #define CSL_CPINTC_CH_MAP_REG168_CH_MAP_674_MASK (0x00FF0000u)
  17349. #define CSL_CPINTC_CH_MAP_REG168_CH_MAP_674_SHIFT (0x00000010u)
  17350. #define CSL_CPINTC_CH_MAP_REG168_CH_MAP_674_RESETVAL (0x00000000u)
  17351. #define CSL_CPINTC_CH_MAP_REG168_CH_MAP_675_MASK (0xFF000000u)
  17352. #define CSL_CPINTC_CH_MAP_REG168_CH_MAP_675_SHIFT (0x00000018u)
  17353. #define CSL_CPINTC_CH_MAP_REG168_CH_MAP_675_RESETVAL (0x00000000u)
  17354. #define CSL_CPINTC_CH_MAP_REG168_RESETVAL (0x00000000u)
  17355. /* ch_map_reg169 */
  17356. #define CSL_CPINTC_CH_MAP_REG169_CH_MAP_676_MASK (0x000000FFu)
  17357. #define CSL_CPINTC_CH_MAP_REG169_CH_MAP_676_SHIFT (0x00000000u)
  17358. #define CSL_CPINTC_CH_MAP_REG169_CH_MAP_676_RESETVAL (0x00000000u)
  17359. #define CSL_CPINTC_CH_MAP_REG169_CH_MAP_677_MASK (0x0000FF00u)
  17360. #define CSL_CPINTC_CH_MAP_REG169_CH_MAP_677_SHIFT (0x00000008u)
  17361. #define CSL_CPINTC_CH_MAP_REG169_CH_MAP_677_RESETVAL (0x00000000u)
  17362. #define CSL_CPINTC_CH_MAP_REG169_CH_MAP_678_MASK (0x00FF0000u)
  17363. #define CSL_CPINTC_CH_MAP_REG169_CH_MAP_678_SHIFT (0x00000010u)
  17364. #define CSL_CPINTC_CH_MAP_REG169_CH_MAP_678_RESETVAL (0x00000000u)
  17365. #define CSL_CPINTC_CH_MAP_REG169_CH_MAP_679_MASK (0xFF000000u)
  17366. #define CSL_CPINTC_CH_MAP_REG169_CH_MAP_679_SHIFT (0x00000018u)
  17367. #define CSL_CPINTC_CH_MAP_REG169_CH_MAP_679_RESETVAL (0x00000000u)
  17368. #define CSL_CPINTC_CH_MAP_REG169_RESETVAL (0x00000000u)
  17369. /* ch_map_reg170 */
  17370. #define CSL_CPINTC_CH_MAP_REG170_CH_MAP_680_MASK (0x000000FFu)
  17371. #define CSL_CPINTC_CH_MAP_REG170_CH_MAP_680_SHIFT (0x00000000u)
  17372. #define CSL_CPINTC_CH_MAP_REG170_CH_MAP_680_RESETVAL (0x00000000u)
  17373. #define CSL_CPINTC_CH_MAP_REG170_CH_MAP_681_MASK (0x0000FF00u)
  17374. #define CSL_CPINTC_CH_MAP_REG170_CH_MAP_681_SHIFT (0x00000008u)
  17375. #define CSL_CPINTC_CH_MAP_REG170_CH_MAP_681_RESETVAL (0x00000000u)
  17376. #define CSL_CPINTC_CH_MAP_REG170_CH_MAP_682_MASK (0x00FF0000u)
  17377. #define CSL_CPINTC_CH_MAP_REG170_CH_MAP_682_SHIFT (0x00000010u)
  17378. #define CSL_CPINTC_CH_MAP_REG170_CH_MAP_682_RESETVAL (0x00000000u)
  17379. #define CSL_CPINTC_CH_MAP_REG170_CH_MAP_683_MASK (0xFF000000u)
  17380. #define CSL_CPINTC_CH_MAP_REG170_CH_MAP_683_SHIFT (0x00000018u)
  17381. #define CSL_CPINTC_CH_MAP_REG170_CH_MAP_683_RESETVAL (0x00000000u)
  17382. #define CSL_CPINTC_CH_MAP_REG170_RESETVAL (0x00000000u)
  17383. /* ch_map_reg171 */
  17384. #define CSL_CPINTC_CH_MAP_REG171_CH_MAP_684_MASK (0x000000FFu)
  17385. #define CSL_CPINTC_CH_MAP_REG171_CH_MAP_684_SHIFT (0x00000000u)
  17386. #define CSL_CPINTC_CH_MAP_REG171_CH_MAP_684_RESETVAL (0x00000000u)
  17387. #define CSL_CPINTC_CH_MAP_REG171_CH_MAP_685_MASK (0x0000FF00u)
  17388. #define CSL_CPINTC_CH_MAP_REG171_CH_MAP_685_SHIFT (0x00000008u)
  17389. #define CSL_CPINTC_CH_MAP_REG171_CH_MAP_685_RESETVAL (0x00000000u)
  17390. #define CSL_CPINTC_CH_MAP_REG171_CH_MAP_686_MASK (0x00FF0000u)
  17391. #define CSL_CPINTC_CH_MAP_REG171_CH_MAP_686_SHIFT (0x00000010u)
  17392. #define CSL_CPINTC_CH_MAP_REG171_CH_MAP_686_RESETVAL (0x00000000u)
  17393. #define CSL_CPINTC_CH_MAP_REG171_CH_MAP_687_MASK (0xFF000000u)
  17394. #define CSL_CPINTC_CH_MAP_REG171_CH_MAP_687_SHIFT (0x00000018u)
  17395. #define CSL_CPINTC_CH_MAP_REG171_CH_MAP_687_RESETVAL (0x00000000u)
  17396. #define CSL_CPINTC_CH_MAP_REG171_RESETVAL (0x00000000u)
  17397. /* ch_map_reg172 */
  17398. #define CSL_CPINTC_CH_MAP_REG172_CH_MAP_688_MASK (0x000000FFu)
  17399. #define CSL_CPINTC_CH_MAP_REG172_CH_MAP_688_SHIFT (0x00000000u)
  17400. #define CSL_CPINTC_CH_MAP_REG172_CH_MAP_688_RESETVAL (0x00000000u)
  17401. #define CSL_CPINTC_CH_MAP_REG172_CH_MAP_689_MASK (0x0000FF00u)
  17402. #define CSL_CPINTC_CH_MAP_REG172_CH_MAP_689_SHIFT (0x00000008u)
  17403. #define CSL_CPINTC_CH_MAP_REG172_CH_MAP_689_RESETVAL (0x00000000u)
  17404. #define CSL_CPINTC_CH_MAP_REG172_CH_MAP_690_MASK (0x00FF0000u)
  17405. #define CSL_CPINTC_CH_MAP_REG172_CH_MAP_690_SHIFT (0x00000010u)
  17406. #define CSL_CPINTC_CH_MAP_REG172_CH_MAP_690_RESETVAL (0x00000000u)
  17407. #define CSL_CPINTC_CH_MAP_REG172_CH_MAP_691_MASK (0xFF000000u)
  17408. #define CSL_CPINTC_CH_MAP_REG172_CH_MAP_691_SHIFT (0x00000018u)
  17409. #define CSL_CPINTC_CH_MAP_REG172_CH_MAP_691_RESETVAL (0x00000000u)
  17410. #define CSL_CPINTC_CH_MAP_REG172_RESETVAL (0x00000000u)
  17411. /* ch_map_reg173 */
  17412. #define CSL_CPINTC_CH_MAP_REG173_CH_MAP_692_MASK (0x000000FFu)
  17413. #define CSL_CPINTC_CH_MAP_REG173_CH_MAP_692_SHIFT (0x00000000u)
  17414. #define CSL_CPINTC_CH_MAP_REG173_CH_MAP_692_RESETVAL (0x00000000u)
  17415. #define CSL_CPINTC_CH_MAP_REG173_CH_MAP_693_MASK (0x0000FF00u)
  17416. #define CSL_CPINTC_CH_MAP_REG173_CH_MAP_693_SHIFT (0x00000008u)
  17417. #define CSL_CPINTC_CH_MAP_REG173_CH_MAP_693_RESETVAL (0x00000000u)
  17418. #define CSL_CPINTC_CH_MAP_REG173_CH_MAP_694_MASK (0x00FF0000u)
  17419. #define CSL_CPINTC_CH_MAP_REG173_CH_MAP_694_SHIFT (0x00000010u)
  17420. #define CSL_CPINTC_CH_MAP_REG173_CH_MAP_694_RESETVAL (0x00000000u)
  17421. #define CSL_CPINTC_CH_MAP_REG173_CH_MAP_695_MASK (0xFF000000u)
  17422. #define CSL_CPINTC_CH_MAP_REG173_CH_MAP_695_SHIFT (0x00000018u)
  17423. #define CSL_CPINTC_CH_MAP_REG173_CH_MAP_695_RESETVAL (0x00000000u)
  17424. #define CSL_CPINTC_CH_MAP_REG173_RESETVAL (0x00000000u)
  17425. /* ch_map_reg174 */
  17426. #define CSL_CPINTC_CH_MAP_REG174_CH_MAP_696_MASK (0x000000FFu)
  17427. #define CSL_CPINTC_CH_MAP_REG174_CH_MAP_696_SHIFT (0x00000000u)
  17428. #define CSL_CPINTC_CH_MAP_REG174_CH_MAP_696_RESETVAL (0x00000000u)
  17429. #define CSL_CPINTC_CH_MAP_REG174_CH_MAP_697_MASK (0x0000FF00u)
  17430. #define CSL_CPINTC_CH_MAP_REG174_CH_MAP_697_SHIFT (0x00000008u)
  17431. #define CSL_CPINTC_CH_MAP_REG174_CH_MAP_697_RESETVAL (0x00000000u)
  17432. #define CSL_CPINTC_CH_MAP_REG174_CH_MAP_698_MASK (0x00FF0000u)
  17433. #define CSL_CPINTC_CH_MAP_REG174_CH_MAP_698_SHIFT (0x00000010u)
  17434. #define CSL_CPINTC_CH_MAP_REG174_CH_MAP_698_RESETVAL (0x00000000u)
  17435. #define CSL_CPINTC_CH_MAP_REG174_CH_MAP_699_MASK (0xFF000000u)
  17436. #define CSL_CPINTC_CH_MAP_REG174_CH_MAP_699_SHIFT (0x00000018u)
  17437. #define CSL_CPINTC_CH_MAP_REG174_CH_MAP_699_RESETVAL (0x00000000u)
  17438. #define CSL_CPINTC_CH_MAP_REG174_RESETVAL (0x00000000u)
  17439. /* ch_map_reg175 */
  17440. #define CSL_CPINTC_CH_MAP_REG175_CH_MAP_700_MASK (0x000000FFu)
  17441. #define CSL_CPINTC_CH_MAP_REG175_CH_MAP_700_SHIFT (0x00000000u)
  17442. #define CSL_CPINTC_CH_MAP_REG175_CH_MAP_700_RESETVAL (0x00000000u)
  17443. #define CSL_CPINTC_CH_MAP_REG175_CH_MAP_701_MASK (0x0000FF00u)
  17444. #define CSL_CPINTC_CH_MAP_REG175_CH_MAP_701_SHIFT (0x00000008u)
  17445. #define CSL_CPINTC_CH_MAP_REG175_CH_MAP_701_RESETVAL (0x00000000u)
  17446. #define CSL_CPINTC_CH_MAP_REG175_CH_MAP_702_MASK (0x00FF0000u)
  17447. #define CSL_CPINTC_CH_MAP_REG175_CH_MAP_702_SHIFT (0x00000010u)
  17448. #define CSL_CPINTC_CH_MAP_REG175_CH_MAP_702_RESETVAL (0x00000000u)
  17449. #define CSL_CPINTC_CH_MAP_REG175_CH_MAP_703_MASK (0xFF000000u)
  17450. #define CSL_CPINTC_CH_MAP_REG175_CH_MAP_703_SHIFT (0x00000018u)
  17451. #define CSL_CPINTC_CH_MAP_REG175_CH_MAP_703_RESETVAL (0x00000000u)
  17452. #define CSL_CPINTC_CH_MAP_REG175_RESETVAL (0x00000000u)
  17453. /* ch_map_reg176 */
  17454. #define CSL_CPINTC_CH_MAP_REG176_CH_MAP_704_MASK (0x000000FFu)
  17455. #define CSL_CPINTC_CH_MAP_REG176_CH_MAP_704_SHIFT (0x00000000u)
  17456. #define CSL_CPINTC_CH_MAP_REG176_CH_MAP_704_RESETVAL (0x00000000u)
  17457. #define CSL_CPINTC_CH_MAP_REG176_CH_MAP_705_MASK (0x0000FF00u)
  17458. #define CSL_CPINTC_CH_MAP_REG176_CH_MAP_705_SHIFT (0x00000008u)
  17459. #define CSL_CPINTC_CH_MAP_REG176_CH_MAP_705_RESETVAL (0x00000000u)
  17460. #define CSL_CPINTC_CH_MAP_REG176_CH_MAP_706_MASK (0x00FF0000u)
  17461. #define CSL_CPINTC_CH_MAP_REG176_CH_MAP_706_SHIFT (0x00000010u)
  17462. #define CSL_CPINTC_CH_MAP_REG176_CH_MAP_706_RESETVAL (0x00000000u)
  17463. #define CSL_CPINTC_CH_MAP_REG176_CH_MAP_707_MASK (0xFF000000u)
  17464. #define CSL_CPINTC_CH_MAP_REG176_CH_MAP_707_SHIFT (0x00000018u)
  17465. #define CSL_CPINTC_CH_MAP_REG176_CH_MAP_707_RESETVAL (0x00000000u)
  17466. #define CSL_CPINTC_CH_MAP_REG176_RESETVAL (0x00000000u)
  17467. /* ch_map_reg177 */
  17468. #define CSL_CPINTC_CH_MAP_REG177_CH_MAP_708_MASK (0x000000FFu)
  17469. #define CSL_CPINTC_CH_MAP_REG177_CH_MAP_708_SHIFT (0x00000000u)
  17470. #define CSL_CPINTC_CH_MAP_REG177_CH_MAP_708_RESETVAL (0x00000000u)
  17471. #define CSL_CPINTC_CH_MAP_REG177_CH_MAP_709_MASK (0x0000FF00u)
  17472. #define CSL_CPINTC_CH_MAP_REG177_CH_MAP_709_SHIFT (0x00000008u)
  17473. #define CSL_CPINTC_CH_MAP_REG177_CH_MAP_709_RESETVAL (0x00000000u)
  17474. #define CSL_CPINTC_CH_MAP_REG177_CH_MAP_710_MASK (0x00FF0000u)
  17475. #define CSL_CPINTC_CH_MAP_REG177_CH_MAP_710_SHIFT (0x00000010u)
  17476. #define CSL_CPINTC_CH_MAP_REG177_CH_MAP_710_RESETVAL (0x00000000u)
  17477. #define CSL_CPINTC_CH_MAP_REG177_CH_MAP_711_MASK (0xFF000000u)
  17478. #define CSL_CPINTC_CH_MAP_REG177_CH_MAP_711_SHIFT (0x00000018u)
  17479. #define CSL_CPINTC_CH_MAP_REG177_CH_MAP_711_RESETVAL (0x00000000u)
  17480. #define CSL_CPINTC_CH_MAP_REG177_RESETVAL (0x00000000u)
  17481. /* ch_map_reg178 */
  17482. #define CSL_CPINTC_CH_MAP_REG178_CH_MAP_712_MASK (0x000000FFu)
  17483. #define CSL_CPINTC_CH_MAP_REG178_CH_MAP_712_SHIFT (0x00000000u)
  17484. #define CSL_CPINTC_CH_MAP_REG178_CH_MAP_712_RESETVAL (0x00000000u)
  17485. #define CSL_CPINTC_CH_MAP_REG178_CH_MAP_713_MASK (0x0000FF00u)
  17486. #define CSL_CPINTC_CH_MAP_REG178_CH_MAP_713_SHIFT (0x00000008u)
  17487. #define CSL_CPINTC_CH_MAP_REG178_CH_MAP_713_RESETVAL (0x00000000u)
  17488. #define CSL_CPINTC_CH_MAP_REG178_CH_MAP_714_MASK (0x00FF0000u)
  17489. #define CSL_CPINTC_CH_MAP_REG178_CH_MAP_714_SHIFT (0x00000010u)
  17490. #define CSL_CPINTC_CH_MAP_REG178_CH_MAP_714_RESETVAL (0x00000000u)
  17491. #define CSL_CPINTC_CH_MAP_REG178_CH_MAP_715_MASK (0xFF000000u)
  17492. #define CSL_CPINTC_CH_MAP_REG178_CH_MAP_715_SHIFT (0x00000018u)
  17493. #define CSL_CPINTC_CH_MAP_REG178_CH_MAP_715_RESETVAL (0x00000000u)
  17494. #define CSL_CPINTC_CH_MAP_REG178_RESETVAL (0x00000000u)
  17495. /* ch_map_reg179 */
  17496. #define CSL_CPINTC_CH_MAP_REG179_CH_MAP_716_MASK (0x000000FFu)
  17497. #define CSL_CPINTC_CH_MAP_REG179_CH_MAP_716_SHIFT (0x00000000u)
  17498. #define CSL_CPINTC_CH_MAP_REG179_CH_MAP_716_RESETVAL (0x00000000u)
  17499. #define CSL_CPINTC_CH_MAP_REG179_CH_MAP_717_MASK (0x0000FF00u)
  17500. #define CSL_CPINTC_CH_MAP_REG179_CH_MAP_717_SHIFT (0x00000008u)
  17501. #define CSL_CPINTC_CH_MAP_REG179_CH_MAP_717_RESETVAL (0x00000000u)
  17502. #define CSL_CPINTC_CH_MAP_REG179_CH_MAP_718_MASK (0x00FF0000u)
  17503. #define CSL_CPINTC_CH_MAP_REG179_CH_MAP_718_SHIFT (0x00000010u)
  17504. #define CSL_CPINTC_CH_MAP_REG179_CH_MAP_718_RESETVAL (0x00000000u)
  17505. #define CSL_CPINTC_CH_MAP_REG179_CH_MAP_719_MASK (0xFF000000u)
  17506. #define CSL_CPINTC_CH_MAP_REG179_CH_MAP_719_SHIFT (0x00000018u)
  17507. #define CSL_CPINTC_CH_MAP_REG179_CH_MAP_719_RESETVAL (0x00000000u)
  17508. #define CSL_CPINTC_CH_MAP_REG179_RESETVAL (0x00000000u)
  17509. /* ch_map_reg180 */
  17510. #define CSL_CPINTC_CH_MAP_REG180_CH_MAP_720_MASK (0x000000FFu)
  17511. #define CSL_CPINTC_CH_MAP_REG180_CH_MAP_720_SHIFT (0x00000000u)
  17512. #define CSL_CPINTC_CH_MAP_REG180_CH_MAP_720_RESETVAL (0x00000000u)
  17513. #define CSL_CPINTC_CH_MAP_REG180_CH_MAP_721_MASK (0x0000FF00u)
  17514. #define CSL_CPINTC_CH_MAP_REG180_CH_MAP_721_SHIFT (0x00000008u)
  17515. #define CSL_CPINTC_CH_MAP_REG180_CH_MAP_721_RESETVAL (0x00000000u)
  17516. #define CSL_CPINTC_CH_MAP_REG180_CH_MAP_722_MASK (0x00FF0000u)
  17517. #define CSL_CPINTC_CH_MAP_REG180_CH_MAP_722_SHIFT (0x00000010u)
  17518. #define CSL_CPINTC_CH_MAP_REG180_CH_MAP_722_RESETVAL (0x00000000u)
  17519. #define CSL_CPINTC_CH_MAP_REG180_CH_MAP_723_MASK (0xFF000000u)
  17520. #define CSL_CPINTC_CH_MAP_REG180_CH_MAP_723_SHIFT (0x00000018u)
  17521. #define CSL_CPINTC_CH_MAP_REG180_CH_MAP_723_RESETVAL (0x00000000u)
  17522. #define CSL_CPINTC_CH_MAP_REG180_RESETVAL (0x00000000u)
  17523. /* ch_map_reg181 */
  17524. #define CSL_CPINTC_CH_MAP_REG181_CH_MAP_724_MASK (0x000000FFu)
  17525. #define CSL_CPINTC_CH_MAP_REG181_CH_MAP_724_SHIFT (0x00000000u)
  17526. #define CSL_CPINTC_CH_MAP_REG181_CH_MAP_724_RESETVAL (0x00000000u)
  17527. #define CSL_CPINTC_CH_MAP_REG181_CH_MAP_725_MASK (0x0000FF00u)
  17528. #define CSL_CPINTC_CH_MAP_REG181_CH_MAP_725_SHIFT (0x00000008u)
  17529. #define CSL_CPINTC_CH_MAP_REG181_CH_MAP_725_RESETVAL (0x00000000u)
  17530. #define CSL_CPINTC_CH_MAP_REG181_CH_MAP_726_MASK (0x00FF0000u)
  17531. #define CSL_CPINTC_CH_MAP_REG181_CH_MAP_726_SHIFT (0x00000010u)
  17532. #define CSL_CPINTC_CH_MAP_REG181_CH_MAP_726_RESETVAL (0x00000000u)
  17533. #define CSL_CPINTC_CH_MAP_REG181_CH_MAP_727_MASK (0xFF000000u)
  17534. #define CSL_CPINTC_CH_MAP_REG181_CH_MAP_727_SHIFT (0x00000018u)
  17535. #define CSL_CPINTC_CH_MAP_REG181_CH_MAP_727_RESETVAL (0x00000000u)
  17536. #define CSL_CPINTC_CH_MAP_REG181_RESETVAL (0x00000000u)
  17537. /* ch_map_reg182 */
  17538. #define CSL_CPINTC_CH_MAP_REG182_CH_MAP_728_MASK (0x000000FFu)
  17539. #define CSL_CPINTC_CH_MAP_REG182_CH_MAP_728_SHIFT (0x00000000u)
  17540. #define CSL_CPINTC_CH_MAP_REG182_CH_MAP_728_RESETVAL (0x00000000u)
  17541. #define CSL_CPINTC_CH_MAP_REG182_CH_MAP_729_MASK (0x0000FF00u)
  17542. #define CSL_CPINTC_CH_MAP_REG182_CH_MAP_729_SHIFT (0x00000008u)
  17543. #define CSL_CPINTC_CH_MAP_REG182_CH_MAP_729_RESETVAL (0x00000000u)
  17544. #define CSL_CPINTC_CH_MAP_REG182_CH_MAP_730_MASK (0x00FF0000u)
  17545. #define CSL_CPINTC_CH_MAP_REG182_CH_MAP_730_SHIFT (0x00000010u)
  17546. #define CSL_CPINTC_CH_MAP_REG182_CH_MAP_730_RESETVAL (0x00000000u)
  17547. #define CSL_CPINTC_CH_MAP_REG182_CH_MAP_731_MASK (0xFF000000u)
  17548. #define CSL_CPINTC_CH_MAP_REG182_CH_MAP_731_SHIFT (0x00000018u)
  17549. #define CSL_CPINTC_CH_MAP_REG182_CH_MAP_731_RESETVAL (0x00000000u)
  17550. #define CSL_CPINTC_CH_MAP_REG182_RESETVAL (0x00000000u)
  17551. /* ch_map_reg183 */
  17552. #define CSL_CPINTC_CH_MAP_REG183_CH_MAP_732_MASK (0x000000FFu)
  17553. #define CSL_CPINTC_CH_MAP_REG183_CH_MAP_732_SHIFT (0x00000000u)
  17554. #define CSL_CPINTC_CH_MAP_REG183_CH_MAP_732_RESETVAL (0x00000000u)
  17555. #define CSL_CPINTC_CH_MAP_REG183_CH_MAP_733_MASK (0x0000FF00u)
  17556. #define CSL_CPINTC_CH_MAP_REG183_CH_MAP_733_SHIFT (0x00000008u)
  17557. #define CSL_CPINTC_CH_MAP_REG183_CH_MAP_733_RESETVAL (0x00000000u)
  17558. #define CSL_CPINTC_CH_MAP_REG183_CH_MAP_734_MASK (0x00FF0000u)
  17559. #define CSL_CPINTC_CH_MAP_REG183_CH_MAP_734_SHIFT (0x00000010u)
  17560. #define CSL_CPINTC_CH_MAP_REG183_CH_MAP_734_RESETVAL (0x00000000u)
  17561. #define CSL_CPINTC_CH_MAP_REG183_CH_MAP_735_MASK (0xFF000000u)
  17562. #define CSL_CPINTC_CH_MAP_REG183_CH_MAP_735_SHIFT (0x00000018u)
  17563. #define CSL_CPINTC_CH_MAP_REG183_CH_MAP_735_RESETVAL (0x00000000u)
  17564. #define CSL_CPINTC_CH_MAP_REG183_RESETVAL (0x00000000u)
  17565. /* ch_map_reg184 */
  17566. #define CSL_CPINTC_CH_MAP_REG184_CH_MAP_736_MASK (0x000000FFu)
  17567. #define CSL_CPINTC_CH_MAP_REG184_CH_MAP_736_SHIFT (0x00000000u)
  17568. #define CSL_CPINTC_CH_MAP_REG184_CH_MAP_736_RESETVAL (0x00000000u)
  17569. #define CSL_CPINTC_CH_MAP_REG184_CH_MAP_737_MASK (0x0000FF00u)
  17570. #define CSL_CPINTC_CH_MAP_REG184_CH_MAP_737_SHIFT (0x00000008u)
  17571. #define CSL_CPINTC_CH_MAP_REG184_CH_MAP_737_RESETVAL (0x00000000u)
  17572. #define CSL_CPINTC_CH_MAP_REG184_CH_MAP_738_MASK (0x00FF0000u)
  17573. #define CSL_CPINTC_CH_MAP_REG184_CH_MAP_738_SHIFT (0x00000010u)
  17574. #define CSL_CPINTC_CH_MAP_REG184_CH_MAP_738_RESETVAL (0x00000000u)
  17575. #define CSL_CPINTC_CH_MAP_REG184_CH_MAP_739_MASK (0xFF000000u)
  17576. #define CSL_CPINTC_CH_MAP_REG184_CH_MAP_739_SHIFT (0x00000018u)
  17577. #define CSL_CPINTC_CH_MAP_REG184_CH_MAP_739_RESETVAL (0x00000000u)
  17578. #define CSL_CPINTC_CH_MAP_REG184_RESETVAL (0x00000000u)
  17579. /* ch_map_reg185 */
  17580. #define CSL_CPINTC_CH_MAP_REG185_CH_MAP_740_MASK (0x000000FFu)
  17581. #define CSL_CPINTC_CH_MAP_REG185_CH_MAP_740_SHIFT (0x00000000u)
  17582. #define CSL_CPINTC_CH_MAP_REG185_CH_MAP_740_RESETVAL (0x00000000u)
  17583. #define CSL_CPINTC_CH_MAP_REG185_CH_MAP_741_MASK (0x0000FF00u)
  17584. #define CSL_CPINTC_CH_MAP_REG185_CH_MAP_741_SHIFT (0x00000008u)
  17585. #define CSL_CPINTC_CH_MAP_REG185_CH_MAP_741_RESETVAL (0x00000000u)
  17586. #define CSL_CPINTC_CH_MAP_REG185_CH_MAP_742_MASK (0x00FF0000u)
  17587. #define CSL_CPINTC_CH_MAP_REG185_CH_MAP_742_SHIFT (0x00000010u)
  17588. #define CSL_CPINTC_CH_MAP_REG185_CH_MAP_742_RESETVAL (0x00000000u)
  17589. #define CSL_CPINTC_CH_MAP_REG185_CH_MAP_743_MASK (0xFF000000u)
  17590. #define CSL_CPINTC_CH_MAP_REG185_CH_MAP_743_SHIFT (0x00000018u)
  17591. #define CSL_CPINTC_CH_MAP_REG185_CH_MAP_743_RESETVAL (0x00000000u)
  17592. #define CSL_CPINTC_CH_MAP_REG185_RESETVAL (0x00000000u)
  17593. /* ch_map_reg186 */
  17594. #define CSL_CPINTC_CH_MAP_REG186_CH_MAP_744_MASK (0x000000FFu)
  17595. #define CSL_CPINTC_CH_MAP_REG186_CH_MAP_744_SHIFT (0x00000000u)
  17596. #define CSL_CPINTC_CH_MAP_REG186_CH_MAP_744_RESETVAL (0x00000000u)
  17597. #define CSL_CPINTC_CH_MAP_REG186_CH_MAP_745_MASK (0x0000FF00u)
  17598. #define CSL_CPINTC_CH_MAP_REG186_CH_MAP_745_SHIFT (0x00000008u)
  17599. #define CSL_CPINTC_CH_MAP_REG186_CH_MAP_745_RESETVAL (0x00000000u)
  17600. #define CSL_CPINTC_CH_MAP_REG186_CH_MAP_746_MASK (0x00FF0000u)
  17601. #define CSL_CPINTC_CH_MAP_REG186_CH_MAP_746_SHIFT (0x00000010u)
  17602. #define CSL_CPINTC_CH_MAP_REG186_CH_MAP_746_RESETVAL (0x00000000u)
  17603. #define CSL_CPINTC_CH_MAP_REG186_CH_MAP_747_MASK (0xFF000000u)
  17604. #define CSL_CPINTC_CH_MAP_REG186_CH_MAP_747_SHIFT (0x00000018u)
  17605. #define CSL_CPINTC_CH_MAP_REG186_CH_MAP_747_RESETVAL (0x00000000u)
  17606. #define CSL_CPINTC_CH_MAP_REG186_RESETVAL (0x00000000u)
  17607. /* ch_map_reg187 */
  17608. #define CSL_CPINTC_CH_MAP_REG187_CH_MAP_748_MASK (0x000000FFu)
  17609. #define CSL_CPINTC_CH_MAP_REG187_CH_MAP_748_SHIFT (0x00000000u)
  17610. #define CSL_CPINTC_CH_MAP_REG187_CH_MAP_748_RESETVAL (0x00000000u)
  17611. #define CSL_CPINTC_CH_MAP_REG187_CH_MAP_749_MASK (0x0000FF00u)
  17612. #define CSL_CPINTC_CH_MAP_REG187_CH_MAP_749_SHIFT (0x00000008u)
  17613. #define CSL_CPINTC_CH_MAP_REG187_CH_MAP_749_RESETVAL (0x00000000u)
  17614. #define CSL_CPINTC_CH_MAP_REG187_CH_MAP_750_MASK (0x00FF0000u)
  17615. #define CSL_CPINTC_CH_MAP_REG187_CH_MAP_750_SHIFT (0x00000010u)
  17616. #define CSL_CPINTC_CH_MAP_REG187_CH_MAP_750_RESETVAL (0x00000000u)
  17617. #define CSL_CPINTC_CH_MAP_REG187_CH_MAP_751_MASK (0xFF000000u)
  17618. #define CSL_CPINTC_CH_MAP_REG187_CH_MAP_751_SHIFT (0x00000018u)
  17619. #define CSL_CPINTC_CH_MAP_REG187_CH_MAP_751_RESETVAL (0x00000000u)
  17620. #define CSL_CPINTC_CH_MAP_REG187_RESETVAL (0x00000000u)
  17621. /* ch_map_reg188 */
  17622. #define CSL_CPINTC_CH_MAP_REG188_CH_MAP_752_MASK (0x000000FFu)
  17623. #define CSL_CPINTC_CH_MAP_REG188_CH_MAP_752_SHIFT (0x00000000u)
  17624. #define CSL_CPINTC_CH_MAP_REG188_CH_MAP_752_RESETVAL (0x00000000u)
  17625. #define CSL_CPINTC_CH_MAP_REG188_CH_MAP_753_MASK (0x0000FF00u)
  17626. #define CSL_CPINTC_CH_MAP_REG188_CH_MAP_753_SHIFT (0x00000008u)
  17627. #define CSL_CPINTC_CH_MAP_REG188_CH_MAP_753_RESETVAL (0x00000000u)
  17628. #define CSL_CPINTC_CH_MAP_REG188_CH_MAP_754_MASK (0x00FF0000u)
  17629. #define CSL_CPINTC_CH_MAP_REG188_CH_MAP_754_SHIFT (0x00000010u)
  17630. #define CSL_CPINTC_CH_MAP_REG188_CH_MAP_754_RESETVAL (0x00000000u)
  17631. #define CSL_CPINTC_CH_MAP_REG188_CH_MAP_755_MASK (0xFF000000u)
  17632. #define CSL_CPINTC_CH_MAP_REG188_CH_MAP_755_SHIFT (0x00000018u)
  17633. #define CSL_CPINTC_CH_MAP_REG188_CH_MAP_755_RESETVAL (0x00000000u)
  17634. #define CSL_CPINTC_CH_MAP_REG188_RESETVAL (0x00000000u)
  17635. /* ch_map_reg189 */
  17636. #define CSL_CPINTC_CH_MAP_REG189_CH_MAP_756_MASK (0x000000FFu)
  17637. #define CSL_CPINTC_CH_MAP_REG189_CH_MAP_756_SHIFT (0x00000000u)
  17638. #define CSL_CPINTC_CH_MAP_REG189_CH_MAP_756_RESETVAL (0x00000000u)
  17639. #define CSL_CPINTC_CH_MAP_REG189_CH_MAP_757_MASK (0x0000FF00u)
  17640. #define CSL_CPINTC_CH_MAP_REG189_CH_MAP_757_SHIFT (0x00000008u)
  17641. #define CSL_CPINTC_CH_MAP_REG189_CH_MAP_757_RESETVAL (0x00000000u)
  17642. #define CSL_CPINTC_CH_MAP_REG189_CH_MAP_758_MASK (0x00FF0000u)
  17643. #define CSL_CPINTC_CH_MAP_REG189_CH_MAP_758_SHIFT (0x00000010u)
  17644. #define CSL_CPINTC_CH_MAP_REG189_CH_MAP_758_RESETVAL (0x00000000u)
  17645. #define CSL_CPINTC_CH_MAP_REG189_CH_MAP_759_MASK (0xFF000000u)
  17646. #define CSL_CPINTC_CH_MAP_REG189_CH_MAP_759_SHIFT (0x00000018u)
  17647. #define CSL_CPINTC_CH_MAP_REG189_CH_MAP_759_RESETVAL (0x00000000u)
  17648. #define CSL_CPINTC_CH_MAP_REG189_RESETVAL (0x00000000u)
  17649. /* ch_map_reg190 */
  17650. #define CSL_CPINTC_CH_MAP_REG190_CH_MAP_760_MASK (0x000000FFu)
  17651. #define CSL_CPINTC_CH_MAP_REG190_CH_MAP_760_SHIFT (0x00000000u)
  17652. #define CSL_CPINTC_CH_MAP_REG190_CH_MAP_760_RESETVAL (0x00000000u)
  17653. #define CSL_CPINTC_CH_MAP_REG190_CH_MAP_761_MASK (0x0000FF00u)
  17654. #define CSL_CPINTC_CH_MAP_REG190_CH_MAP_761_SHIFT (0x00000008u)
  17655. #define CSL_CPINTC_CH_MAP_REG190_CH_MAP_761_RESETVAL (0x00000000u)
  17656. #define CSL_CPINTC_CH_MAP_REG190_CH_MAP_762_MASK (0x00FF0000u)
  17657. #define CSL_CPINTC_CH_MAP_REG190_CH_MAP_762_SHIFT (0x00000010u)
  17658. #define CSL_CPINTC_CH_MAP_REG190_CH_MAP_762_RESETVAL (0x00000000u)
  17659. #define CSL_CPINTC_CH_MAP_REG190_CH_MAP_763_MASK (0xFF000000u)
  17660. #define CSL_CPINTC_CH_MAP_REG190_CH_MAP_763_SHIFT (0x00000018u)
  17661. #define CSL_CPINTC_CH_MAP_REG190_CH_MAP_763_RESETVAL (0x00000000u)
  17662. #define CSL_CPINTC_CH_MAP_REG190_RESETVAL (0x00000000u)
  17663. /* ch_map_reg191 */
  17664. #define CSL_CPINTC_CH_MAP_REG191_CH_MAP_764_MASK (0x000000FFu)
  17665. #define CSL_CPINTC_CH_MAP_REG191_CH_MAP_764_SHIFT (0x00000000u)
  17666. #define CSL_CPINTC_CH_MAP_REG191_CH_MAP_764_RESETVAL (0x00000000u)
  17667. #define CSL_CPINTC_CH_MAP_REG191_CH_MAP_765_MASK (0x0000FF00u)
  17668. #define CSL_CPINTC_CH_MAP_REG191_CH_MAP_765_SHIFT (0x00000008u)
  17669. #define CSL_CPINTC_CH_MAP_REG191_CH_MAP_765_RESETVAL (0x00000000u)
  17670. #define CSL_CPINTC_CH_MAP_REG191_CH_MAP_766_MASK (0x00FF0000u)
  17671. #define CSL_CPINTC_CH_MAP_REG191_CH_MAP_766_SHIFT (0x00000010u)
  17672. #define CSL_CPINTC_CH_MAP_REG191_CH_MAP_766_RESETVAL (0x00000000u)
  17673. #define CSL_CPINTC_CH_MAP_REG191_CH_MAP_767_MASK (0xFF000000u)
  17674. #define CSL_CPINTC_CH_MAP_REG191_CH_MAP_767_SHIFT (0x00000018u)
  17675. #define CSL_CPINTC_CH_MAP_REG191_CH_MAP_767_RESETVAL (0x00000000u)
  17676. #define CSL_CPINTC_CH_MAP_REG191_RESETVAL (0x00000000u)
  17677. /* ch_map_reg192 */
  17678. #define CSL_CPINTC_CH_MAP_REG192_CH_MAP_768_MASK (0x000000FFu)
  17679. #define CSL_CPINTC_CH_MAP_REG192_CH_MAP_768_SHIFT (0x00000000u)
  17680. #define CSL_CPINTC_CH_MAP_REG192_CH_MAP_768_RESETVAL (0x00000000u)
  17681. #define CSL_CPINTC_CH_MAP_REG192_CH_MAP_769_MASK (0x0000FF00u)
  17682. #define CSL_CPINTC_CH_MAP_REG192_CH_MAP_769_SHIFT (0x00000008u)
  17683. #define CSL_CPINTC_CH_MAP_REG192_CH_MAP_769_RESETVAL (0x00000000u)
  17684. #define CSL_CPINTC_CH_MAP_REG192_CH_MAP_770_MASK (0x00FF0000u)
  17685. #define CSL_CPINTC_CH_MAP_REG192_CH_MAP_770_SHIFT (0x00000010u)
  17686. #define CSL_CPINTC_CH_MAP_REG192_CH_MAP_770_RESETVAL (0x00000000u)
  17687. #define CSL_CPINTC_CH_MAP_REG192_CH_MAP_771_MASK (0xFF000000u)
  17688. #define CSL_CPINTC_CH_MAP_REG192_CH_MAP_771_SHIFT (0x00000018u)
  17689. #define CSL_CPINTC_CH_MAP_REG192_CH_MAP_771_RESETVAL (0x00000000u)
  17690. #define CSL_CPINTC_CH_MAP_REG192_RESETVAL (0x00000000u)
  17691. /* ch_map_reg193 */
  17692. #define CSL_CPINTC_CH_MAP_REG193_CH_MAP_772_MASK (0x000000FFu)
  17693. #define CSL_CPINTC_CH_MAP_REG193_CH_MAP_772_SHIFT (0x00000000u)
  17694. #define CSL_CPINTC_CH_MAP_REG193_CH_MAP_772_RESETVAL (0x00000000u)
  17695. #define CSL_CPINTC_CH_MAP_REG193_CH_MAP_773_MASK (0x0000FF00u)
  17696. #define CSL_CPINTC_CH_MAP_REG193_CH_MAP_773_SHIFT (0x00000008u)
  17697. #define CSL_CPINTC_CH_MAP_REG193_CH_MAP_773_RESETVAL (0x00000000u)
  17698. #define CSL_CPINTC_CH_MAP_REG193_CH_MAP_774_MASK (0x00FF0000u)
  17699. #define CSL_CPINTC_CH_MAP_REG193_CH_MAP_774_SHIFT (0x00000010u)
  17700. #define CSL_CPINTC_CH_MAP_REG193_CH_MAP_774_RESETVAL (0x00000000u)
  17701. #define CSL_CPINTC_CH_MAP_REG193_CH_MAP_775_MASK (0xFF000000u)
  17702. #define CSL_CPINTC_CH_MAP_REG193_CH_MAP_775_SHIFT (0x00000018u)
  17703. #define CSL_CPINTC_CH_MAP_REG193_CH_MAP_775_RESETVAL (0x00000000u)
  17704. #define CSL_CPINTC_CH_MAP_REG193_RESETVAL (0x00000000u)
  17705. /* ch_map_reg194 */
  17706. #define CSL_CPINTC_CH_MAP_REG194_CH_MAP_776_MASK (0x000000FFu)
  17707. #define CSL_CPINTC_CH_MAP_REG194_CH_MAP_776_SHIFT (0x00000000u)
  17708. #define CSL_CPINTC_CH_MAP_REG194_CH_MAP_776_RESETVAL (0x00000000u)
  17709. #define CSL_CPINTC_CH_MAP_REG194_CH_MAP_777_MASK (0x0000FF00u)
  17710. #define CSL_CPINTC_CH_MAP_REG194_CH_MAP_777_SHIFT (0x00000008u)
  17711. #define CSL_CPINTC_CH_MAP_REG194_CH_MAP_777_RESETVAL (0x00000000u)
  17712. #define CSL_CPINTC_CH_MAP_REG194_CH_MAP_778_MASK (0x00FF0000u)
  17713. #define CSL_CPINTC_CH_MAP_REG194_CH_MAP_778_SHIFT (0x00000010u)
  17714. #define CSL_CPINTC_CH_MAP_REG194_CH_MAP_778_RESETVAL (0x00000000u)
  17715. #define CSL_CPINTC_CH_MAP_REG194_CH_MAP_779_MASK (0xFF000000u)
  17716. #define CSL_CPINTC_CH_MAP_REG194_CH_MAP_779_SHIFT (0x00000018u)
  17717. #define CSL_CPINTC_CH_MAP_REG194_CH_MAP_779_RESETVAL (0x00000000u)
  17718. #define CSL_CPINTC_CH_MAP_REG194_RESETVAL (0x00000000u)
  17719. /* ch_map_reg195 */
  17720. #define CSL_CPINTC_CH_MAP_REG195_CH_MAP_780_MASK (0x000000FFu)
  17721. #define CSL_CPINTC_CH_MAP_REG195_CH_MAP_780_SHIFT (0x00000000u)
  17722. #define CSL_CPINTC_CH_MAP_REG195_CH_MAP_780_RESETVAL (0x00000000u)
  17723. #define CSL_CPINTC_CH_MAP_REG195_CH_MAP_781_MASK (0x0000FF00u)
  17724. #define CSL_CPINTC_CH_MAP_REG195_CH_MAP_781_SHIFT (0x00000008u)
  17725. #define CSL_CPINTC_CH_MAP_REG195_CH_MAP_781_RESETVAL (0x00000000u)
  17726. #define CSL_CPINTC_CH_MAP_REG195_CH_MAP_782_MASK (0x00FF0000u)
  17727. #define CSL_CPINTC_CH_MAP_REG195_CH_MAP_782_SHIFT (0x00000010u)
  17728. #define CSL_CPINTC_CH_MAP_REG195_CH_MAP_782_RESETVAL (0x00000000u)
  17729. #define CSL_CPINTC_CH_MAP_REG195_CH_MAP_783_MASK (0xFF000000u)
  17730. #define CSL_CPINTC_CH_MAP_REG195_CH_MAP_783_SHIFT (0x00000018u)
  17731. #define CSL_CPINTC_CH_MAP_REG195_CH_MAP_783_RESETVAL (0x00000000u)
  17732. #define CSL_CPINTC_CH_MAP_REG195_RESETVAL (0x00000000u)
  17733. /* ch_map_reg196 */
  17734. #define CSL_CPINTC_CH_MAP_REG196_CH_MAP_784_MASK (0x000000FFu)
  17735. #define CSL_CPINTC_CH_MAP_REG196_CH_MAP_784_SHIFT (0x00000000u)
  17736. #define CSL_CPINTC_CH_MAP_REG196_CH_MAP_784_RESETVAL (0x00000000u)
  17737. #define CSL_CPINTC_CH_MAP_REG196_CH_MAP_785_MASK (0x0000FF00u)
  17738. #define CSL_CPINTC_CH_MAP_REG196_CH_MAP_785_SHIFT (0x00000008u)
  17739. #define CSL_CPINTC_CH_MAP_REG196_CH_MAP_785_RESETVAL (0x00000000u)
  17740. #define CSL_CPINTC_CH_MAP_REG196_CH_MAP_786_MASK (0x00FF0000u)
  17741. #define CSL_CPINTC_CH_MAP_REG196_CH_MAP_786_SHIFT (0x00000010u)
  17742. #define CSL_CPINTC_CH_MAP_REG196_CH_MAP_786_RESETVAL (0x00000000u)
  17743. #define CSL_CPINTC_CH_MAP_REG196_CH_MAP_787_MASK (0xFF000000u)
  17744. #define CSL_CPINTC_CH_MAP_REG196_CH_MAP_787_SHIFT (0x00000018u)
  17745. #define CSL_CPINTC_CH_MAP_REG196_CH_MAP_787_RESETVAL (0x00000000u)
  17746. #define CSL_CPINTC_CH_MAP_REG196_RESETVAL (0x00000000u)
  17747. /* ch_map_reg197 */
  17748. #define CSL_CPINTC_CH_MAP_REG197_CH_MAP_788_MASK (0x000000FFu)
  17749. #define CSL_CPINTC_CH_MAP_REG197_CH_MAP_788_SHIFT (0x00000000u)
  17750. #define CSL_CPINTC_CH_MAP_REG197_CH_MAP_788_RESETVAL (0x00000000u)
  17751. #define CSL_CPINTC_CH_MAP_REG197_CH_MAP_789_MASK (0x0000FF00u)
  17752. #define CSL_CPINTC_CH_MAP_REG197_CH_MAP_789_SHIFT (0x00000008u)
  17753. #define CSL_CPINTC_CH_MAP_REG197_CH_MAP_789_RESETVAL (0x00000000u)
  17754. #define CSL_CPINTC_CH_MAP_REG197_CH_MAP_790_MASK (0x00FF0000u)
  17755. #define CSL_CPINTC_CH_MAP_REG197_CH_MAP_790_SHIFT (0x00000010u)
  17756. #define CSL_CPINTC_CH_MAP_REG197_CH_MAP_790_RESETVAL (0x00000000u)
  17757. #define CSL_CPINTC_CH_MAP_REG197_CH_MAP_791_MASK (0xFF000000u)
  17758. #define CSL_CPINTC_CH_MAP_REG197_CH_MAP_791_SHIFT (0x00000018u)
  17759. #define CSL_CPINTC_CH_MAP_REG197_CH_MAP_791_RESETVAL (0x00000000u)
  17760. #define CSL_CPINTC_CH_MAP_REG197_RESETVAL (0x00000000u)
  17761. /* ch_map_reg198 */
  17762. #define CSL_CPINTC_CH_MAP_REG198_CH_MAP_792_MASK (0x000000FFu)
  17763. #define CSL_CPINTC_CH_MAP_REG198_CH_MAP_792_SHIFT (0x00000000u)
  17764. #define CSL_CPINTC_CH_MAP_REG198_CH_MAP_792_RESETVAL (0x00000000u)
  17765. #define CSL_CPINTC_CH_MAP_REG198_CH_MAP_793_MASK (0x0000FF00u)
  17766. #define CSL_CPINTC_CH_MAP_REG198_CH_MAP_793_SHIFT (0x00000008u)
  17767. #define CSL_CPINTC_CH_MAP_REG198_CH_MAP_793_RESETVAL (0x00000000u)
  17768. #define CSL_CPINTC_CH_MAP_REG198_CH_MAP_794_MASK (0x00FF0000u)
  17769. #define CSL_CPINTC_CH_MAP_REG198_CH_MAP_794_SHIFT (0x00000010u)
  17770. #define CSL_CPINTC_CH_MAP_REG198_CH_MAP_794_RESETVAL (0x00000000u)
  17771. #define CSL_CPINTC_CH_MAP_REG198_CH_MAP_795_MASK (0xFF000000u)
  17772. #define CSL_CPINTC_CH_MAP_REG198_CH_MAP_795_SHIFT (0x00000018u)
  17773. #define CSL_CPINTC_CH_MAP_REG198_CH_MAP_795_RESETVAL (0x00000000u)
  17774. #define CSL_CPINTC_CH_MAP_REG198_RESETVAL (0x00000000u)
  17775. /* ch_map_reg199 */
  17776. #define CSL_CPINTC_CH_MAP_REG199_CH_MAP_796_MASK (0x000000FFu)
  17777. #define CSL_CPINTC_CH_MAP_REG199_CH_MAP_796_SHIFT (0x00000000u)
  17778. #define CSL_CPINTC_CH_MAP_REG199_CH_MAP_796_RESETVAL (0x00000000u)
  17779. #define CSL_CPINTC_CH_MAP_REG199_CH_MAP_797_MASK (0x0000FF00u)
  17780. #define CSL_CPINTC_CH_MAP_REG199_CH_MAP_797_SHIFT (0x00000008u)
  17781. #define CSL_CPINTC_CH_MAP_REG199_CH_MAP_797_RESETVAL (0x00000000u)
  17782. #define CSL_CPINTC_CH_MAP_REG199_CH_MAP_798_MASK (0x00FF0000u)
  17783. #define CSL_CPINTC_CH_MAP_REG199_CH_MAP_798_SHIFT (0x00000010u)
  17784. #define CSL_CPINTC_CH_MAP_REG199_CH_MAP_798_RESETVAL (0x00000000u)
  17785. #define CSL_CPINTC_CH_MAP_REG199_CH_MAP_799_MASK (0xFF000000u)
  17786. #define CSL_CPINTC_CH_MAP_REG199_CH_MAP_799_SHIFT (0x00000018u)
  17787. #define CSL_CPINTC_CH_MAP_REG199_CH_MAP_799_RESETVAL (0x00000000u)
  17788. #define CSL_CPINTC_CH_MAP_REG199_RESETVAL (0x00000000u)
  17789. /* ch_map_reg200 */
  17790. #define CSL_CPINTC_CH_MAP_REG200_CH_MAP_800_MASK (0x000000FFu)
  17791. #define CSL_CPINTC_CH_MAP_REG200_CH_MAP_800_SHIFT (0x00000000u)
  17792. #define CSL_CPINTC_CH_MAP_REG200_CH_MAP_800_RESETVAL (0x00000000u)
  17793. #define CSL_CPINTC_CH_MAP_REG200_CH_MAP_801_MASK (0x0000FF00u)
  17794. #define CSL_CPINTC_CH_MAP_REG200_CH_MAP_801_SHIFT (0x00000008u)
  17795. #define CSL_CPINTC_CH_MAP_REG200_CH_MAP_801_RESETVAL (0x00000000u)
  17796. #define CSL_CPINTC_CH_MAP_REG200_CH_MAP_802_MASK (0x00FF0000u)
  17797. #define CSL_CPINTC_CH_MAP_REG200_CH_MAP_802_SHIFT (0x00000010u)
  17798. #define CSL_CPINTC_CH_MAP_REG200_CH_MAP_802_RESETVAL (0x00000000u)
  17799. #define CSL_CPINTC_CH_MAP_REG200_CH_MAP_803_MASK (0xFF000000u)
  17800. #define CSL_CPINTC_CH_MAP_REG200_CH_MAP_803_SHIFT (0x00000018u)
  17801. #define CSL_CPINTC_CH_MAP_REG200_CH_MAP_803_RESETVAL (0x00000000u)
  17802. #define CSL_CPINTC_CH_MAP_REG200_RESETVAL (0x00000000u)
  17803. /* ch_map_reg201 */
  17804. #define CSL_CPINTC_CH_MAP_REG201_CH_MAP_804_MASK (0x000000FFu)
  17805. #define CSL_CPINTC_CH_MAP_REG201_CH_MAP_804_SHIFT (0x00000000u)
  17806. #define CSL_CPINTC_CH_MAP_REG201_CH_MAP_804_RESETVAL (0x00000000u)
  17807. #define CSL_CPINTC_CH_MAP_REG201_CH_MAP_805_MASK (0x0000FF00u)
  17808. #define CSL_CPINTC_CH_MAP_REG201_CH_MAP_805_SHIFT (0x00000008u)
  17809. #define CSL_CPINTC_CH_MAP_REG201_CH_MAP_805_RESETVAL (0x00000000u)
  17810. #define CSL_CPINTC_CH_MAP_REG201_CH_MAP_806_MASK (0x00FF0000u)
  17811. #define CSL_CPINTC_CH_MAP_REG201_CH_MAP_806_SHIFT (0x00000010u)
  17812. #define CSL_CPINTC_CH_MAP_REG201_CH_MAP_806_RESETVAL (0x00000000u)
  17813. #define CSL_CPINTC_CH_MAP_REG201_CH_MAP_807_MASK (0xFF000000u)
  17814. #define CSL_CPINTC_CH_MAP_REG201_CH_MAP_807_SHIFT (0x00000018u)
  17815. #define CSL_CPINTC_CH_MAP_REG201_CH_MAP_807_RESETVAL (0x00000000u)
  17816. #define CSL_CPINTC_CH_MAP_REG201_RESETVAL (0x00000000u)
  17817. /* ch_map_reg202 */
  17818. #define CSL_CPINTC_CH_MAP_REG202_CH_MAP_808_MASK (0x000000FFu)
  17819. #define CSL_CPINTC_CH_MAP_REG202_CH_MAP_808_SHIFT (0x00000000u)
  17820. #define CSL_CPINTC_CH_MAP_REG202_CH_MAP_808_RESETVAL (0x00000000u)
  17821. #define CSL_CPINTC_CH_MAP_REG202_CH_MAP_809_MASK (0x0000FF00u)
  17822. #define CSL_CPINTC_CH_MAP_REG202_CH_MAP_809_SHIFT (0x00000008u)
  17823. #define CSL_CPINTC_CH_MAP_REG202_CH_MAP_809_RESETVAL (0x00000000u)
  17824. #define CSL_CPINTC_CH_MAP_REG202_CH_MAP_810_MASK (0x00FF0000u)
  17825. #define CSL_CPINTC_CH_MAP_REG202_CH_MAP_810_SHIFT (0x00000010u)
  17826. #define CSL_CPINTC_CH_MAP_REG202_CH_MAP_810_RESETVAL (0x00000000u)
  17827. #define CSL_CPINTC_CH_MAP_REG202_CH_MAP_811_MASK (0xFF000000u)
  17828. #define CSL_CPINTC_CH_MAP_REG202_CH_MAP_811_SHIFT (0x00000018u)
  17829. #define CSL_CPINTC_CH_MAP_REG202_CH_MAP_811_RESETVAL (0x00000000u)
  17830. #define CSL_CPINTC_CH_MAP_REG202_RESETVAL (0x00000000u)
  17831. /* ch_map_reg203 */
  17832. #define CSL_CPINTC_CH_MAP_REG203_CH_MAP_812_MASK (0x000000FFu)
  17833. #define CSL_CPINTC_CH_MAP_REG203_CH_MAP_812_SHIFT (0x00000000u)
  17834. #define CSL_CPINTC_CH_MAP_REG203_CH_MAP_812_RESETVAL (0x00000000u)
  17835. #define CSL_CPINTC_CH_MAP_REG203_CH_MAP_813_MASK (0x0000FF00u)
  17836. #define CSL_CPINTC_CH_MAP_REG203_CH_MAP_813_SHIFT (0x00000008u)
  17837. #define CSL_CPINTC_CH_MAP_REG203_CH_MAP_813_RESETVAL (0x00000000u)
  17838. #define CSL_CPINTC_CH_MAP_REG203_CH_MAP_814_MASK (0x00FF0000u)
  17839. #define CSL_CPINTC_CH_MAP_REG203_CH_MAP_814_SHIFT (0x00000010u)
  17840. #define CSL_CPINTC_CH_MAP_REG203_CH_MAP_814_RESETVAL (0x00000000u)
  17841. #define CSL_CPINTC_CH_MAP_REG203_CH_MAP_815_MASK (0xFF000000u)
  17842. #define CSL_CPINTC_CH_MAP_REG203_CH_MAP_815_SHIFT (0x00000018u)
  17843. #define CSL_CPINTC_CH_MAP_REG203_CH_MAP_815_RESETVAL (0x00000000u)
  17844. #define CSL_CPINTC_CH_MAP_REG203_RESETVAL (0x00000000u)
  17845. /* ch_map_reg204 */
  17846. #define CSL_CPINTC_CH_MAP_REG204_CH_MAP_816_MASK (0x000000FFu)
  17847. #define CSL_CPINTC_CH_MAP_REG204_CH_MAP_816_SHIFT (0x00000000u)
  17848. #define CSL_CPINTC_CH_MAP_REG204_CH_MAP_816_RESETVAL (0x00000000u)
  17849. #define CSL_CPINTC_CH_MAP_REG204_CH_MAP_817_MASK (0x0000FF00u)
  17850. #define CSL_CPINTC_CH_MAP_REG204_CH_MAP_817_SHIFT (0x00000008u)
  17851. #define CSL_CPINTC_CH_MAP_REG204_CH_MAP_817_RESETVAL (0x00000000u)
  17852. #define CSL_CPINTC_CH_MAP_REG204_CH_MAP_818_MASK (0x00FF0000u)
  17853. #define CSL_CPINTC_CH_MAP_REG204_CH_MAP_818_SHIFT (0x00000010u)
  17854. #define CSL_CPINTC_CH_MAP_REG204_CH_MAP_818_RESETVAL (0x00000000u)
  17855. #define CSL_CPINTC_CH_MAP_REG204_CH_MAP_819_MASK (0xFF000000u)
  17856. #define CSL_CPINTC_CH_MAP_REG204_CH_MAP_819_SHIFT (0x00000018u)
  17857. #define CSL_CPINTC_CH_MAP_REG204_CH_MAP_819_RESETVAL (0x00000000u)
  17858. #define CSL_CPINTC_CH_MAP_REG204_RESETVAL (0x00000000u)
  17859. /* ch_map_reg205 */
  17860. #define CSL_CPINTC_CH_MAP_REG205_CH_MAP_820_MASK (0x000000FFu)
  17861. #define CSL_CPINTC_CH_MAP_REG205_CH_MAP_820_SHIFT (0x00000000u)
  17862. #define CSL_CPINTC_CH_MAP_REG205_CH_MAP_820_RESETVAL (0x00000000u)
  17863. #define CSL_CPINTC_CH_MAP_REG205_CH_MAP_821_MASK (0x0000FF00u)
  17864. #define CSL_CPINTC_CH_MAP_REG205_CH_MAP_821_SHIFT (0x00000008u)
  17865. #define CSL_CPINTC_CH_MAP_REG205_CH_MAP_821_RESETVAL (0x00000000u)
  17866. #define CSL_CPINTC_CH_MAP_REG205_CH_MAP_822_MASK (0x00FF0000u)
  17867. #define CSL_CPINTC_CH_MAP_REG205_CH_MAP_822_SHIFT (0x00000010u)
  17868. #define CSL_CPINTC_CH_MAP_REG205_CH_MAP_822_RESETVAL (0x00000000u)
  17869. #define CSL_CPINTC_CH_MAP_REG205_CH_MAP_823_MASK (0xFF000000u)
  17870. #define CSL_CPINTC_CH_MAP_REG205_CH_MAP_823_SHIFT (0x00000018u)
  17871. #define CSL_CPINTC_CH_MAP_REG205_CH_MAP_823_RESETVAL (0x00000000u)
  17872. #define CSL_CPINTC_CH_MAP_REG205_RESETVAL (0x00000000u)
  17873. /* ch_map_reg206 */
  17874. #define CSL_CPINTC_CH_MAP_REG206_CH_MAP_824_MASK (0x000000FFu)
  17875. #define CSL_CPINTC_CH_MAP_REG206_CH_MAP_824_SHIFT (0x00000000u)
  17876. #define CSL_CPINTC_CH_MAP_REG206_CH_MAP_824_RESETVAL (0x00000000u)
  17877. #define CSL_CPINTC_CH_MAP_REG206_CH_MAP_825_MASK (0x0000FF00u)
  17878. #define CSL_CPINTC_CH_MAP_REG206_CH_MAP_825_SHIFT (0x00000008u)
  17879. #define CSL_CPINTC_CH_MAP_REG206_CH_MAP_825_RESETVAL (0x00000000u)
  17880. #define CSL_CPINTC_CH_MAP_REG206_CH_MAP_826_MASK (0x00FF0000u)
  17881. #define CSL_CPINTC_CH_MAP_REG206_CH_MAP_826_SHIFT (0x00000010u)
  17882. #define CSL_CPINTC_CH_MAP_REG206_CH_MAP_826_RESETVAL (0x00000000u)
  17883. #define CSL_CPINTC_CH_MAP_REG206_CH_MAP_827_MASK (0xFF000000u)
  17884. #define CSL_CPINTC_CH_MAP_REG206_CH_MAP_827_SHIFT (0x00000018u)
  17885. #define CSL_CPINTC_CH_MAP_REG206_CH_MAP_827_RESETVAL (0x00000000u)
  17886. #define CSL_CPINTC_CH_MAP_REG206_RESETVAL (0x00000000u)
  17887. /* ch_map_reg207 */
  17888. #define CSL_CPINTC_CH_MAP_REG207_CH_MAP_828_MASK (0x000000FFu)
  17889. #define CSL_CPINTC_CH_MAP_REG207_CH_MAP_828_SHIFT (0x00000000u)
  17890. #define CSL_CPINTC_CH_MAP_REG207_CH_MAP_828_RESETVAL (0x00000000u)
  17891. #define CSL_CPINTC_CH_MAP_REG207_CH_MAP_829_MASK (0x0000FF00u)
  17892. #define CSL_CPINTC_CH_MAP_REG207_CH_MAP_829_SHIFT (0x00000008u)
  17893. #define CSL_CPINTC_CH_MAP_REG207_CH_MAP_829_RESETVAL (0x00000000u)
  17894. #define CSL_CPINTC_CH_MAP_REG207_CH_MAP_830_MASK (0x00FF0000u)
  17895. #define CSL_CPINTC_CH_MAP_REG207_CH_MAP_830_SHIFT (0x00000010u)
  17896. #define CSL_CPINTC_CH_MAP_REG207_CH_MAP_830_RESETVAL (0x00000000u)
  17897. #define CSL_CPINTC_CH_MAP_REG207_CH_MAP_831_MASK (0xFF000000u)
  17898. #define CSL_CPINTC_CH_MAP_REG207_CH_MAP_831_SHIFT (0x00000018u)
  17899. #define CSL_CPINTC_CH_MAP_REG207_CH_MAP_831_RESETVAL (0x00000000u)
  17900. #define CSL_CPINTC_CH_MAP_REG207_RESETVAL (0x00000000u)
  17901. /* ch_map_reg208 */
  17902. #define CSL_CPINTC_CH_MAP_REG208_CH_MAP_832_MASK (0x000000FFu)
  17903. #define CSL_CPINTC_CH_MAP_REG208_CH_MAP_832_SHIFT (0x00000000u)
  17904. #define CSL_CPINTC_CH_MAP_REG208_CH_MAP_832_RESETVAL (0x00000000u)
  17905. #define CSL_CPINTC_CH_MAP_REG208_CH_MAP_833_MASK (0x0000FF00u)
  17906. #define CSL_CPINTC_CH_MAP_REG208_CH_MAP_833_SHIFT (0x00000008u)
  17907. #define CSL_CPINTC_CH_MAP_REG208_CH_MAP_833_RESETVAL (0x00000000u)
  17908. #define CSL_CPINTC_CH_MAP_REG208_CH_MAP_834_MASK (0x00FF0000u)
  17909. #define CSL_CPINTC_CH_MAP_REG208_CH_MAP_834_SHIFT (0x00000010u)
  17910. #define CSL_CPINTC_CH_MAP_REG208_CH_MAP_834_RESETVAL (0x00000000u)
  17911. #define CSL_CPINTC_CH_MAP_REG208_CH_MAP_835_MASK (0xFF000000u)
  17912. #define CSL_CPINTC_CH_MAP_REG208_CH_MAP_835_SHIFT (0x00000018u)
  17913. #define CSL_CPINTC_CH_MAP_REG208_CH_MAP_835_RESETVAL (0x00000000u)
  17914. #define CSL_CPINTC_CH_MAP_REG208_RESETVAL (0x00000000u)
  17915. /* ch_map_reg209 */
  17916. #define CSL_CPINTC_CH_MAP_REG209_CH_MAP_836_MASK (0x000000FFu)
  17917. #define CSL_CPINTC_CH_MAP_REG209_CH_MAP_836_SHIFT (0x00000000u)
  17918. #define CSL_CPINTC_CH_MAP_REG209_CH_MAP_836_RESETVAL (0x00000000u)
  17919. #define CSL_CPINTC_CH_MAP_REG209_CH_MAP_837_MASK (0x0000FF00u)
  17920. #define CSL_CPINTC_CH_MAP_REG209_CH_MAP_837_SHIFT (0x00000008u)
  17921. #define CSL_CPINTC_CH_MAP_REG209_CH_MAP_837_RESETVAL (0x00000000u)
  17922. #define CSL_CPINTC_CH_MAP_REG209_CH_MAP_838_MASK (0x00FF0000u)
  17923. #define CSL_CPINTC_CH_MAP_REG209_CH_MAP_838_SHIFT (0x00000010u)
  17924. #define CSL_CPINTC_CH_MAP_REG209_CH_MAP_838_RESETVAL (0x00000000u)
  17925. #define CSL_CPINTC_CH_MAP_REG209_CH_MAP_839_MASK (0xFF000000u)
  17926. #define CSL_CPINTC_CH_MAP_REG209_CH_MAP_839_SHIFT (0x00000018u)
  17927. #define CSL_CPINTC_CH_MAP_REG209_CH_MAP_839_RESETVAL (0x00000000u)
  17928. #define CSL_CPINTC_CH_MAP_REG209_RESETVAL (0x00000000u)
  17929. /* ch_map_reg210 */
  17930. #define CSL_CPINTC_CH_MAP_REG210_CH_MAP_840_MASK (0x000000FFu)
  17931. #define CSL_CPINTC_CH_MAP_REG210_CH_MAP_840_SHIFT (0x00000000u)
  17932. #define CSL_CPINTC_CH_MAP_REG210_CH_MAP_840_RESETVAL (0x00000000u)
  17933. #define CSL_CPINTC_CH_MAP_REG210_CH_MAP_841_MASK (0x0000FF00u)
  17934. #define CSL_CPINTC_CH_MAP_REG210_CH_MAP_841_SHIFT (0x00000008u)
  17935. #define CSL_CPINTC_CH_MAP_REG210_CH_MAP_841_RESETVAL (0x00000000u)
  17936. #define CSL_CPINTC_CH_MAP_REG210_CH_MAP_842_MASK (0x00FF0000u)
  17937. #define CSL_CPINTC_CH_MAP_REG210_CH_MAP_842_SHIFT (0x00000010u)
  17938. #define CSL_CPINTC_CH_MAP_REG210_CH_MAP_842_RESETVAL (0x00000000u)
  17939. #define CSL_CPINTC_CH_MAP_REG210_CH_MAP_843_MASK (0xFF000000u)
  17940. #define CSL_CPINTC_CH_MAP_REG210_CH_MAP_843_SHIFT (0x00000018u)
  17941. #define CSL_CPINTC_CH_MAP_REG210_CH_MAP_843_RESETVAL (0x00000000u)
  17942. #define CSL_CPINTC_CH_MAP_REG210_RESETVAL (0x00000000u)
  17943. /* ch_map_reg211 */
  17944. #define CSL_CPINTC_CH_MAP_REG211_CH_MAP_844_MASK (0x000000FFu)
  17945. #define CSL_CPINTC_CH_MAP_REG211_CH_MAP_844_SHIFT (0x00000000u)
  17946. #define CSL_CPINTC_CH_MAP_REG211_CH_MAP_844_RESETVAL (0x00000000u)
  17947. #define CSL_CPINTC_CH_MAP_REG211_CH_MAP_845_MASK (0x0000FF00u)
  17948. #define CSL_CPINTC_CH_MAP_REG211_CH_MAP_845_SHIFT (0x00000008u)
  17949. #define CSL_CPINTC_CH_MAP_REG211_CH_MAP_845_RESETVAL (0x00000000u)
  17950. #define CSL_CPINTC_CH_MAP_REG211_CH_MAP_846_MASK (0x00FF0000u)
  17951. #define CSL_CPINTC_CH_MAP_REG211_CH_MAP_846_SHIFT (0x00000010u)
  17952. #define CSL_CPINTC_CH_MAP_REG211_CH_MAP_846_RESETVAL (0x00000000u)
  17953. #define CSL_CPINTC_CH_MAP_REG211_CH_MAP_847_MASK (0xFF000000u)
  17954. #define CSL_CPINTC_CH_MAP_REG211_CH_MAP_847_SHIFT (0x00000018u)
  17955. #define CSL_CPINTC_CH_MAP_REG211_CH_MAP_847_RESETVAL (0x00000000u)
  17956. #define CSL_CPINTC_CH_MAP_REG211_RESETVAL (0x00000000u)
  17957. /* ch_map_reg212 */
  17958. #define CSL_CPINTC_CH_MAP_REG212_CH_MAP_848_MASK (0x000000FFu)
  17959. #define CSL_CPINTC_CH_MAP_REG212_CH_MAP_848_SHIFT (0x00000000u)
  17960. #define CSL_CPINTC_CH_MAP_REG212_CH_MAP_848_RESETVAL (0x00000000u)
  17961. #define CSL_CPINTC_CH_MAP_REG212_CH_MAP_849_MASK (0x0000FF00u)
  17962. #define CSL_CPINTC_CH_MAP_REG212_CH_MAP_849_SHIFT (0x00000008u)
  17963. #define CSL_CPINTC_CH_MAP_REG212_CH_MAP_849_RESETVAL (0x00000000u)
  17964. #define CSL_CPINTC_CH_MAP_REG212_CH_MAP_850_MASK (0x00FF0000u)
  17965. #define CSL_CPINTC_CH_MAP_REG212_CH_MAP_850_SHIFT (0x00000010u)
  17966. #define CSL_CPINTC_CH_MAP_REG212_CH_MAP_850_RESETVAL (0x00000000u)
  17967. #define CSL_CPINTC_CH_MAP_REG212_CH_MAP_851_MASK (0xFF000000u)
  17968. #define CSL_CPINTC_CH_MAP_REG212_CH_MAP_851_SHIFT (0x00000018u)
  17969. #define CSL_CPINTC_CH_MAP_REG212_CH_MAP_851_RESETVAL (0x00000000u)
  17970. #define CSL_CPINTC_CH_MAP_REG212_RESETVAL (0x00000000u)
  17971. /* ch_map_reg213 */
  17972. #define CSL_CPINTC_CH_MAP_REG213_CH_MAP_852_MASK (0x000000FFu)
  17973. #define CSL_CPINTC_CH_MAP_REG213_CH_MAP_852_SHIFT (0x00000000u)
  17974. #define CSL_CPINTC_CH_MAP_REG213_CH_MAP_852_RESETVAL (0x00000000u)
  17975. #define CSL_CPINTC_CH_MAP_REG213_CH_MAP_853_MASK (0x0000FF00u)
  17976. #define CSL_CPINTC_CH_MAP_REG213_CH_MAP_853_SHIFT (0x00000008u)
  17977. #define CSL_CPINTC_CH_MAP_REG213_CH_MAP_853_RESETVAL (0x00000000u)
  17978. #define CSL_CPINTC_CH_MAP_REG213_CH_MAP_854_MASK (0x00FF0000u)
  17979. #define CSL_CPINTC_CH_MAP_REG213_CH_MAP_854_SHIFT (0x00000010u)
  17980. #define CSL_CPINTC_CH_MAP_REG213_CH_MAP_854_RESETVAL (0x00000000u)
  17981. #define CSL_CPINTC_CH_MAP_REG213_CH_MAP_855_MASK (0xFF000000u)
  17982. #define CSL_CPINTC_CH_MAP_REG213_CH_MAP_855_SHIFT (0x00000018u)
  17983. #define CSL_CPINTC_CH_MAP_REG213_CH_MAP_855_RESETVAL (0x00000000u)
  17984. #define CSL_CPINTC_CH_MAP_REG213_RESETVAL (0x00000000u)
  17985. /* ch_map_reg214 */
  17986. #define CSL_CPINTC_CH_MAP_REG214_CH_MAP_856_MASK (0x000000FFu)
  17987. #define CSL_CPINTC_CH_MAP_REG214_CH_MAP_856_SHIFT (0x00000000u)
  17988. #define CSL_CPINTC_CH_MAP_REG214_CH_MAP_856_RESETVAL (0x00000000u)
  17989. #define CSL_CPINTC_CH_MAP_REG214_CH_MAP_857_MASK (0x0000FF00u)
  17990. #define CSL_CPINTC_CH_MAP_REG214_CH_MAP_857_SHIFT (0x00000008u)
  17991. #define CSL_CPINTC_CH_MAP_REG214_CH_MAP_857_RESETVAL (0x00000000u)
  17992. #define CSL_CPINTC_CH_MAP_REG214_CH_MAP_858_MASK (0x00FF0000u)
  17993. #define CSL_CPINTC_CH_MAP_REG214_CH_MAP_858_SHIFT (0x00000010u)
  17994. #define CSL_CPINTC_CH_MAP_REG214_CH_MAP_858_RESETVAL (0x00000000u)
  17995. #define CSL_CPINTC_CH_MAP_REG214_CH_MAP_859_MASK (0xFF000000u)
  17996. #define CSL_CPINTC_CH_MAP_REG214_CH_MAP_859_SHIFT (0x00000018u)
  17997. #define CSL_CPINTC_CH_MAP_REG214_CH_MAP_859_RESETVAL (0x00000000u)
  17998. #define CSL_CPINTC_CH_MAP_REG214_RESETVAL (0x00000000u)
  17999. /* ch_map_reg215 */
  18000. #define CSL_CPINTC_CH_MAP_REG215_CH_MAP_860_MASK (0x000000FFu)
  18001. #define CSL_CPINTC_CH_MAP_REG215_CH_MAP_860_SHIFT (0x00000000u)
  18002. #define CSL_CPINTC_CH_MAP_REG215_CH_MAP_860_RESETVAL (0x00000000u)
  18003. #define CSL_CPINTC_CH_MAP_REG215_CH_MAP_861_MASK (0x0000FF00u)
  18004. #define CSL_CPINTC_CH_MAP_REG215_CH_MAP_861_SHIFT (0x00000008u)
  18005. #define CSL_CPINTC_CH_MAP_REG215_CH_MAP_861_RESETVAL (0x00000000u)
  18006. #define CSL_CPINTC_CH_MAP_REG215_CH_MAP_862_MASK (0x00FF0000u)
  18007. #define CSL_CPINTC_CH_MAP_REG215_CH_MAP_862_SHIFT (0x00000010u)
  18008. #define CSL_CPINTC_CH_MAP_REG215_CH_MAP_862_RESETVAL (0x00000000u)
  18009. #define CSL_CPINTC_CH_MAP_REG215_CH_MAP_863_MASK (0xFF000000u)
  18010. #define CSL_CPINTC_CH_MAP_REG215_CH_MAP_863_SHIFT (0x00000018u)
  18011. #define CSL_CPINTC_CH_MAP_REG215_CH_MAP_863_RESETVAL (0x00000000u)
  18012. #define CSL_CPINTC_CH_MAP_REG215_RESETVAL (0x00000000u)
  18013. /* ch_map_reg216 */
  18014. #define CSL_CPINTC_CH_MAP_REG216_CH_MAP_864_MASK (0x000000FFu)
  18015. #define CSL_CPINTC_CH_MAP_REG216_CH_MAP_864_SHIFT (0x00000000u)
  18016. #define CSL_CPINTC_CH_MAP_REG216_CH_MAP_864_RESETVAL (0x00000000u)
  18017. #define CSL_CPINTC_CH_MAP_REG216_CH_MAP_865_MASK (0x0000FF00u)
  18018. #define CSL_CPINTC_CH_MAP_REG216_CH_MAP_865_SHIFT (0x00000008u)
  18019. #define CSL_CPINTC_CH_MAP_REG216_CH_MAP_865_RESETVAL (0x00000000u)
  18020. #define CSL_CPINTC_CH_MAP_REG216_CH_MAP_866_MASK (0x00FF0000u)
  18021. #define CSL_CPINTC_CH_MAP_REG216_CH_MAP_866_SHIFT (0x00000010u)
  18022. #define CSL_CPINTC_CH_MAP_REG216_CH_MAP_866_RESETVAL (0x00000000u)
  18023. #define CSL_CPINTC_CH_MAP_REG216_CH_MAP_867_MASK (0xFF000000u)
  18024. #define CSL_CPINTC_CH_MAP_REG216_CH_MAP_867_SHIFT (0x00000018u)
  18025. #define CSL_CPINTC_CH_MAP_REG216_CH_MAP_867_RESETVAL (0x00000000u)
  18026. #define CSL_CPINTC_CH_MAP_REG216_RESETVAL (0x00000000u)
  18027. /* ch_map_reg217 */
  18028. #define CSL_CPINTC_CH_MAP_REG217_CH_MAP_868_MASK (0x000000FFu)
  18029. #define CSL_CPINTC_CH_MAP_REG217_CH_MAP_868_SHIFT (0x00000000u)
  18030. #define CSL_CPINTC_CH_MAP_REG217_CH_MAP_868_RESETVAL (0x00000000u)
  18031. #define CSL_CPINTC_CH_MAP_REG217_CH_MAP_869_MASK (0x0000FF00u)
  18032. #define CSL_CPINTC_CH_MAP_REG217_CH_MAP_869_SHIFT (0x00000008u)
  18033. #define CSL_CPINTC_CH_MAP_REG217_CH_MAP_869_RESETVAL (0x00000000u)
  18034. #define CSL_CPINTC_CH_MAP_REG217_CH_MAP_870_MASK (0x00FF0000u)
  18035. #define CSL_CPINTC_CH_MAP_REG217_CH_MAP_870_SHIFT (0x00000010u)
  18036. #define CSL_CPINTC_CH_MAP_REG217_CH_MAP_870_RESETVAL (0x00000000u)
  18037. #define CSL_CPINTC_CH_MAP_REG217_CH_MAP_871_MASK (0xFF000000u)
  18038. #define CSL_CPINTC_CH_MAP_REG217_CH_MAP_871_SHIFT (0x00000018u)
  18039. #define CSL_CPINTC_CH_MAP_REG217_CH_MAP_871_RESETVAL (0x00000000u)
  18040. #define CSL_CPINTC_CH_MAP_REG217_RESETVAL (0x00000000u)
  18041. /* ch_map_reg218 */
  18042. #define CSL_CPINTC_CH_MAP_REG218_CH_MAP_872_MASK (0x000000FFu)
  18043. #define CSL_CPINTC_CH_MAP_REG218_CH_MAP_872_SHIFT (0x00000000u)
  18044. #define CSL_CPINTC_CH_MAP_REG218_CH_MAP_872_RESETVAL (0x00000000u)
  18045. #define CSL_CPINTC_CH_MAP_REG218_CH_MAP_873_MASK (0x0000FF00u)
  18046. #define CSL_CPINTC_CH_MAP_REG218_CH_MAP_873_SHIFT (0x00000008u)
  18047. #define CSL_CPINTC_CH_MAP_REG218_CH_MAP_873_RESETVAL (0x00000000u)
  18048. #define CSL_CPINTC_CH_MAP_REG218_CH_MAP_874_MASK (0x00FF0000u)
  18049. #define CSL_CPINTC_CH_MAP_REG218_CH_MAP_874_SHIFT (0x00000010u)
  18050. #define CSL_CPINTC_CH_MAP_REG218_CH_MAP_874_RESETVAL (0x00000000u)
  18051. #define CSL_CPINTC_CH_MAP_REG218_CH_MAP_875_MASK (0xFF000000u)
  18052. #define CSL_CPINTC_CH_MAP_REG218_CH_MAP_875_SHIFT (0x00000018u)
  18053. #define CSL_CPINTC_CH_MAP_REG218_CH_MAP_875_RESETVAL (0x00000000u)
  18054. #define CSL_CPINTC_CH_MAP_REG218_RESETVAL (0x00000000u)
  18055. /* ch_map_reg219 */
  18056. #define CSL_CPINTC_CH_MAP_REG219_CH_MAP_876_MASK (0x000000FFu)
  18057. #define CSL_CPINTC_CH_MAP_REG219_CH_MAP_876_SHIFT (0x00000000u)
  18058. #define CSL_CPINTC_CH_MAP_REG219_CH_MAP_876_RESETVAL (0x00000000u)
  18059. #define CSL_CPINTC_CH_MAP_REG219_CH_MAP_877_MASK (0x0000FF00u)
  18060. #define CSL_CPINTC_CH_MAP_REG219_CH_MAP_877_SHIFT (0x00000008u)
  18061. #define CSL_CPINTC_CH_MAP_REG219_CH_MAP_877_RESETVAL (0x00000000u)
  18062. #define CSL_CPINTC_CH_MAP_REG219_CH_MAP_878_MASK (0x00FF0000u)
  18063. #define CSL_CPINTC_CH_MAP_REG219_CH_MAP_878_SHIFT (0x00000010u)
  18064. #define CSL_CPINTC_CH_MAP_REG219_CH_MAP_878_RESETVAL (0x00000000u)
  18065. #define CSL_CPINTC_CH_MAP_REG219_CH_MAP_879_MASK (0xFF000000u)
  18066. #define CSL_CPINTC_CH_MAP_REG219_CH_MAP_879_SHIFT (0x00000018u)
  18067. #define CSL_CPINTC_CH_MAP_REG219_CH_MAP_879_RESETVAL (0x00000000u)
  18068. #define CSL_CPINTC_CH_MAP_REG219_RESETVAL (0x00000000u)
  18069. /* ch_map_reg220 */
  18070. #define CSL_CPINTC_CH_MAP_REG220_CH_MAP_880_MASK (0x000000FFu)
  18071. #define CSL_CPINTC_CH_MAP_REG220_CH_MAP_880_SHIFT (0x00000000u)
  18072. #define CSL_CPINTC_CH_MAP_REG220_CH_MAP_880_RESETVAL (0x00000000u)
  18073. #define CSL_CPINTC_CH_MAP_REG220_CH_MAP_881_MASK (0x0000FF00u)
  18074. #define CSL_CPINTC_CH_MAP_REG220_CH_MAP_881_SHIFT (0x00000008u)
  18075. #define CSL_CPINTC_CH_MAP_REG220_CH_MAP_881_RESETVAL (0x00000000u)
  18076. #define CSL_CPINTC_CH_MAP_REG220_CH_MAP_882_MASK (0x00FF0000u)
  18077. #define CSL_CPINTC_CH_MAP_REG220_CH_MAP_882_SHIFT (0x00000010u)
  18078. #define CSL_CPINTC_CH_MAP_REG220_CH_MAP_882_RESETVAL (0x00000000u)
  18079. #define CSL_CPINTC_CH_MAP_REG220_CH_MAP_883_MASK (0xFF000000u)
  18080. #define CSL_CPINTC_CH_MAP_REG220_CH_MAP_883_SHIFT (0x00000018u)
  18081. #define CSL_CPINTC_CH_MAP_REG220_CH_MAP_883_RESETVAL (0x00000000u)
  18082. #define CSL_CPINTC_CH_MAP_REG220_RESETVAL (0x00000000u)
  18083. /* ch_map_reg221 */
  18084. #define CSL_CPINTC_CH_MAP_REG221_CH_MAP_884_MASK (0x000000FFu)
  18085. #define CSL_CPINTC_CH_MAP_REG221_CH_MAP_884_SHIFT (0x00000000u)
  18086. #define CSL_CPINTC_CH_MAP_REG221_CH_MAP_884_RESETVAL (0x00000000u)
  18087. #define CSL_CPINTC_CH_MAP_REG221_CH_MAP_885_MASK (0x0000FF00u)
  18088. #define CSL_CPINTC_CH_MAP_REG221_CH_MAP_885_SHIFT (0x00000008u)
  18089. #define CSL_CPINTC_CH_MAP_REG221_CH_MAP_885_RESETVAL (0x00000000u)
  18090. #define CSL_CPINTC_CH_MAP_REG221_CH_MAP_886_MASK (0x00FF0000u)
  18091. #define CSL_CPINTC_CH_MAP_REG221_CH_MAP_886_SHIFT (0x00000010u)
  18092. #define CSL_CPINTC_CH_MAP_REG221_CH_MAP_886_RESETVAL (0x00000000u)
  18093. #define CSL_CPINTC_CH_MAP_REG221_CH_MAP_887_MASK (0xFF000000u)
  18094. #define CSL_CPINTC_CH_MAP_REG221_CH_MAP_887_SHIFT (0x00000018u)
  18095. #define CSL_CPINTC_CH_MAP_REG221_CH_MAP_887_RESETVAL (0x00000000u)
  18096. #define CSL_CPINTC_CH_MAP_REG221_RESETVAL (0x00000000u)
  18097. /* ch_map_reg222 */
  18098. #define CSL_CPINTC_CH_MAP_REG222_CH_MAP_888_MASK (0x000000FFu)
  18099. #define CSL_CPINTC_CH_MAP_REG222_CH_MAP_888_SHIFT (0x00000000u)
  18100. #define CSL_CPINTC_CH_MAP_REG222_CH_MAP_888_RESETVAL (0x00000000u)
  18101. #define CSL_CPINTC_CH_MAP_REG222_CH_MAP_889_MASK (0x0000FF00u)
  18102. #define CSL_CPINTC_CH_MAP_REG222_CH_MAP_889_SHIFT (0x00000008u)
  18103. #define CSL_CPINTC_CH_MAP_REG222_CH_MAP_889_RESETVAL (0x00000000u)
  18104. #define CSL_CPINTC_CH_MAP_REG222_CH_MAP_890_MASK (0x00FF0000u)
  18105. #define CSL_CPINTC_CH_MAP_REG222_CH_MAP_890_SHIFT (0x00000010u)
  18106. #define CSL_CPINTC_CH_MAP_REG222_CH_MAP_890_RESETVAL (0x00000000u)
  18107. #define CSL_CPINTC_CH_MAP_REG222_CH_MAP_891_MASK (0xFF000000u)
  18108. #define CSL_CPINTC_CH_MAP_REG222_CH_MAP_891_SHIFT (0x00000018u)
  18109. #define CSL_CPINTC_CH_MAP_REG222_CH_MAP_891_RESETVAL (0x00000000u)
  18110. #define CSL_CPINTC_CH_MAP_REG222_RESETVAL (0x00000000u)
  18111. /* ch_map_reg223 */
  18112. #define CSL_CPINTC_CH_MAP_REG223_CH_MAP_892_MASK (0x000000FFu)
  18113. #define CSL_CPINTC_CH_MAP_REG223_CH_MAP_892_SHIFT (0x00000000u)
  18114. #define CSL_CPINTC_CH_MAP_REG223_CH_MAP_892_RESETVAL (0x00000000u)
  18115. #define CSL_CPINTC_CH_MAP_REG223_CH_MAP_893_MASK (0x0000FF00u)
  18116. #define CSL_CPINTC_CH_MAP_REG223_CH_MAP_893_SHIFT (0x00000008u)
  18117. #define CSL_CPINTC_CH_MAP_REG223_CH_MAP_893_RESETVAL (0x00000000u)
  18118. #define CSL_CPINTC_CH_MAP_REG223_CH_MAP_894_MASK (0x00FF0000u)
  18119. #define CSL_CPINTC_CH_MAP_REG223_CH_MAP_894_SHIFT (0x00000010u)
  18120. #define CSL_CPINTC_CH_MAP_REG223_CH_MAP_894_RESETVAL (0x00000000u)
  18121. #define CSL_CPINTC_CH_MAP_REG223_CH_MAP_895_MASK (0xFF000000u)
  18122. #define CSL_CPINTC_CH_MAP_REG223_CH_MAP_895_SHIFT (0x00000018u)
  18123. #define CSL_CPINTC_CH_MAP_REG223_CH_MAP_895_RESETVAL (0x00000000u)
  18124. #define CSL_CPINTC_CH_MAP_REG223_RESETVAL (0x00000000u)
  18125. /* ch_map_reg224 */
  18126. #define CSL_CPINTC_CH_MAP_REG224_CH_MAP_896_MASK (0x000000FFu)
  18127. #define CSL_CPINTC_CH_MAP_REG224_CH_MAP_896_SHIFT (0x00000000u)
  18128. #define CSL_CPINTC_CH_MAP_REG224_CH_MAP_896_RESETVAL (0x00000000u)
  18129. #define CSL_CPINTC_CH_MAP_REG224_CH_MAP_897_MASK (0x0000FF00u)
  18130. #define CSL_CPINTC_CH_MAP_REG224_CH_MAP_897_SHIFT (0x00000008u)
  18131. #define CSL_CPINTC_CH_MAP_REG224_CH_MAP_897_RESETVAL (0x00000000u)
  18132. #define CSL_CPINTC_CH_MAP_REG224_CH_MAP_898_MASK (0x00FF0000u)
  18133. #define CSL_CPINTC_CH_MAP_REG224_CH_MAP_898_SHIFT (0x00000010u)
  18134. #define CSL_CPINTC_CH_MAP_REG224_CH_MAP_898_RESETVAL (0x00000000u)
  18135. #define CSL_CPINTC_CH_MAP_REG224_CH_MAP_899_MASK (0xFF000000u)
  18136. #define CSL_CPINTC_CH_MAP_REG224_CH_MAP_899_SHIFT (0x00000018u)
  18137. #define CSL_CPINTC_CH_MAP_REG224_CH_MAP_899_RESETVAL (0x00000000u)
  18138. #define CSL_CPINTC_CH_MAP_REG224_RESETVAL (0x00000000u)
  18139. /* ch_map_reg225 */
  18140. #define CSL_CPINTC_CH_MAP_REG225_CH_MAP_900_MASK (0x000000FFu)
  18141. #define CSL_CPINTC_CH_MAP_REG225_CH_MAP_900_SHIFT (0x00000000u)
  18142. #define CSL_CPINTC_CH_MAP_REG225_CH_MAP_900_RESETVAL (0x00000000u)
  18143. #define CSL_CPINTC_CH_MAP_REG225_CH_MAP_901_MASK (0x0000FF00u)
  18144. #define CSL_CPINTC_CH_MAP_REG225_CH_MAP_901_SHIFT (0x00000008u)
  18145. #define CSL_CPINTC_CH_MAP_REG225_CH_MAP_901_RESETVAL (0x00000000u)
  18146. #define CSL_CPINTC_CH_MAP_REG225_CH_MAP_902_MASK (0x00FF0000u)
  18147. #define CSL_CPINTC_CH_MAP_REG225_CH_MAP_902_SHIFT (0x00000010u)
  18148. #define CSL_CPINTC_CH_MAP_REG225_CH_MAP_902_RESETVAL (0x00000000u)
  18149. #define CSL_CPINTC_CH_MAP_REG225_CH_MAP_903_MASK (0xFF000000u)
  18150. #define CSL_CPINTC_CH_MAP_REG225_CH_MAP_903_SHIFT (0x00000018u)
  18151. #define CSL_CPINTC_CH_MAP_REG225_CH_MAP_903_RESETVAL (0x00000000u)
  18152. #define CSL_CPINTC_CH_MAP_REG225_RESETVAL (0x00000000u)
  18153. /* ch_map_reg226 */
  18154. #define CSL_CPINTC_CH_MAP_REG226_CH_MAP_904_MASK (0x000000FFu)
  18155. #define CSL_CPINTC_CH_MAP_REG226_CH_MAP_904_SHIFT (0x00000000u)
  18156. #define CSL_CPINTC_CH_MAP_REG226_CH_MAP_904_RESETVAL (0x00000000u)
  18157. #define CSL_CPINTC_CH_MAP_REG226_CH_MAP_905_MASK (0x0000FF00u)
  18158. #define CSL_CPINTC_CH_MAP_REG226_CH_MAP_905_SHIFT (0x00000008u)
  18159. #define CSL_CPINTC_CH_MAP_REG226_CH_MAP_905_RESETVAL (0x00000000u)
  18160. #define CSL_CPINTC_CH_MAP_REG226_CH_MAP_906_MASK (0x00FF0000u)
  18161. #define CSL_CPINTC_CH_MAP_REG226_CH_MAP_906_SHIFT (0x00000010u)
  18162. #define CSL_CPINTC_CH_MAP_REG226_CH_MAP_906_RESETVAL (0x00000000u)
  18163. #define CSL_CPINTC_CH_MAP_REG226_CH_MAP_907_MASK (0xFF000000u)
  18164. #define CSL_CPINTC_CH_MAP_REG226_CH_MAP_907_SHIFT (0x00000018u)
  18165. #define CSL_CPINTC_CH_MAP_REG226_CH_MAP_907_RESETVAL (0x00000000u)
  18166. #define CSL_CPINTC_CH_MAP_REG226_RESETVAL (0x00000000u)
  18167. /* ch_map_reg227 */
  18168. #define CSL_CPINTC_CH_MAP_REG227_CH_MAP_908_MASK (0x000000FFu)
  18169. #define CSL_CPINTC_CH_MAP_REG227_CH_MAP_908_SHIFT (0x00000000u)
  18170. #define CSL_CPINTC_CH_MAP_REG227_CH_MAP_908_RESETVAL (0x00000000u)
  18171. #define CSL_CPINTC_CH_MAP_REG227_CH_MAP_909_MASK (0x0000FF00u)
  18172. #define CSL_CPINTC_CH_MAP_REG227_CH_MAP_909_SHIFT (0x00000008u)
  18173. #define CSL_CPINTC_CH_MAP_REG227_CH_MAP_909_RESETVAL (0x00000000u)
  18174. #define CSL_CPINTC_CH_MAP_REG227_CH_MAP_910_MASK (0x00FF0000u)
  18175. #define CSL_CPINTC_CH_MAP_REG227_CH_MAP_910_SHIFT (0x00000010u)
  18176. #define CSL_CPINTC_CH_MAP_REG227_CH_MAP_910_RESETVAL (0x00000000u)
  18177. #define CSL_CPINTC_CH_MAP_REG227_CH_MAP_911_MASK (0xFF000000u)
  18178. #define CSL_CPINTC_CH_MAP_REG227_CH_MAP_911_SHIFT (0x00000018u)
  18179. #define CSL_CPINTC_CH_MAP_REG227_CH_MAP_911_RESETVAL (0x00000000u)
  18180. #define CSL_CPINTC_CH_MAP_REG227_RESETVAL (0x00000000u)
  18181. /* ch_map_reg228 */
  18182. #define CSL_CPINTC_CH_MAP_REG228_CH_MAP_912_MASK (0x000000FFu)
  18183. #define CSL_CPINTC_CH_MAP_REG228_CH_MAP_912_SHIFT (0x00000000u)
  18184. #define CSL_CPINTC_CH_MAP_REG228_CH_MAP_912_RESETVAL (0x00000000u)
  18185. #define CSL_CPINTC_CH_MAP_REG228_CH_MAP_913_MASK (0x0000FF00u)
  18186. #define CSL_CPINTC_CH_MAP_REG228_CH_MAP_913_SHIFT (0x00000008u)
  18187. #define CSL_CPINTC_CH_MAP_REG228_CH_MAP_913_RESETVAL (0x00000000u)
  18188. #define CSL_CPINTC_CH_MAP_REG228_CH_MAP_914_MASK (0x00FF0000u)
  18189. #define CSL_CPINTC_CH_MAP_REG228_CH_MAP_914_SHIFT (0x00000010u)
  18190. #define CSL_CPINTC_CH_MAP_REG228_CH_MAP_914_RESETVAL (0x00000000u)
  18191. #define CSL_CPINTC_CH_MAP_REG228_CH_MAP_915_MASK (0xFF000000u)
  18192. #define CSL_CPINTC_CH_MAP_REG228_CH_MAP_915_SHIFT (0x00000018u)
  18193. #define CSL_CPINTC_CH_MAP_REG228_CH_MAP_915_RESETVAL (0x00000000u)
  18194. #define CSL_CPINTC_CH_MAP_REG228_RESETVAL (0x00000000u)
  18195. /* ch_map_reg229 */
  18196. #define CSL_CPINTC_CH_MAP_REG229_CH_MAP_916_MASK (0x000000FFu)
  18197. #define CSL_CPINTC_CH_MAP_REG229_CH_MAP_916_SHIFT (0x00000000u)
  18198. #define CSL_CPINTC_CH_MAP_REG229_CH_MAP_916_RESETVAL (0x00000000u)
  18199. #define CSL_CPINTC_CH_MAP_REG229_CH_MAP_917_MASK (0x0000FF00u)
  18200. #define CSL_CPINTC_CH_MAP_REG229_CH_MAP_917_SHIFT (0x00000008u)
  18201. #define CSL_CPINTC_CH_MAP_REG229_CH_MAP_917_RESETVAL (0x00000000u)
  18202. #define CSL_CPINTC_CH_MAP_REG229_CH_MAP_918_MASK (0x00FF0000u)
  18203. #define CSL_CPINTC_CH_MAP_REG229_CH_MAP_918_SHIFT (0x00000010u)
  18204. #define CSL_CPINTC_CH_MAP_REG229_CH_MAP_918_RESETVAL (0x00000000u)
  18205. #define CSL_CPINTC_CH_MAP_REG229_CH_MAP_919_MASK (0xFF000000u)
  18206. #define CSL_CPINTC_CH_MAP_REG229_CH_MAP_919_SHIFT (0x00000018u)
  18207. #define CSL_CPINTC_CH_MAP_REG229_CH_MAP_919_RESETVAL (0x00000000u)
  18208. #define CSL_CPINTC_CH_MAP_REG229_RESETVAL (0x00000000u)
  18209. /* ch_map_reg230 */
  18210. #define CSL_CPINTC_CH_MAP_REG230_CH_MAP_920_MASK (0x000000FFu)
  18211. #define CSL_CPINTC_CH_MAP_REG230_CH_MAP_920_SHIFT (0x00000000u)
  18212. #define CSL_CPINTC_CH_MAP_REG230_CH_MAP_920_RESETVAL (0x00000000u)
  18213. #define CSL_CPINTC_CH_MAP_REG230_CH_MAP_921_MASK (0x0000FF00u)
  18214. #define CSL_CPINTC_CH_MAP_REG230_CH_MAP_921_SHIFT (0x00000008u)
  18215. #define CSL_CPINTC_CH_MAP_REG230_CH_MAP_921_RESETVAL (0x00000000u)
  18216. #define CSL_CPINTC_CH_MAP_REG230_CH_MAP_922_MASK (0x00FF0000u)
  18217. #define CSL_CPINTC_CH_MAP_REG230_CH_MAP_922_SHIFT (0x00000010u)
  18218. #define CSL_CPINTC_CH_MAP_REG230_CH_MAP_922_RESETVAL (0x00000000u)
  18219. #define CSL_CPINTC_CH_MAP_REG230_CH_MAP_923_MASK (0xFF000000u)
  18220. #define CSL_CPINTC_CH_MAP_REG230_CH_MAP_923_SHIFT (0x00000018u)
  18221. #define CSL_CPINTC_CH_MAP_REG230_CH_MAP_923_RESETVAL (0x00000000u)
  18222. #define CSL_CPINTC_CH_MAP_REG230_RESETVAL (0x00000000u)
  18223. /* ch_map_reg231 */
  18224. #define CSL_CPINTC_CH_MAP_REG231_CH_MAP_924_MASK (0x000000FFu)
  18225. #define CSL_CPINTC_CH_MAP_REG231_CH_MAP_924_SHIFT (0x00000000u)
  18226. #define CSL_CPINTC_CH_MAP_REG231_CH_MAP_924_RESETVAL (0x00000000u)
  18227. #define CSL_CPINTC_CH_MAP_REG231_CH_MAP_925_MASK (0x0000FF00u)
  18228. #define CSL_CPINTC_CH_MAP_REG231_CH_MAP_925_SHIFT (0x00000008u)
  18229. #define CSL_CPINTC_CH_MAP_REG231_CH_MAP_925_RESETVAL (0x00000000u)
  18230. #define CSL_CPINTC_CH_MAP_REG231_CH_MAP_926_MASK (0x00FF0000u)
  18231. #define CSL_CPINTC_CH_MAP_REG231_CH_MAP_926_SHIFT (0x00000010u)
  18232. #define CSL_CPINTC_CH_MAP_REG231_CH_MAP_926_RESETVAL (0x00000000u)
  18233. #define CSL_CPINTC_CH_MAP_REG231_CH_MAP_927_MASK (0xFF000000u)
  18234. #define CSL_CPINTC_CH_MAP_REG231_CH_MAP_927_SHIFT (0x00000018u)
  18235. #define CSL_CPINTC_CH_MAP_REG231_CH_MAP_927_RESETVAL (0x00000000u)
  18236. #define CSL_CPINTC_CH_MAP_REG231_RESETVAL (0x00000000u)
  18237. /* ch_map_reg232 */
  18238. #define CSL_CPINTC_CH_MAP_REG232_CH_MAP_928_MASK (0x000000FFu)
  18239. #define CSL_CPINTC_CH_MAP_REG232_CH_MAP_928_SHIFT (0x00000000u)
  18240. #define CSL_CPINTC_CH_MAP_REG232_CH_MAP_928_RESETVAL (0x00000000u)
  18241. #define CSL_CPINTC_CH_MAP_REG232_CH_MAP_929_MASK (0x0000FF00u)
  18242. #define CSL_CPINTC_CH_MAP_REG232_CH_MAP_929_SHIFT (0x00000008u)
  18243. #define CSL_CPINTC_CH_MAP_REG232_CH_MAP_929_RESETVAL (0x00000000u)
  18244. #define CSL_CPINTC_CH_MAP_REG232_CH_MAP_930_MASK (0x00FF0000u)
  18245. #define CSL_CPINTC_CH_MAP_REG232_CH_MAP_930_SHIFT (0x00000010u)
  18246. #define CSL_CPINTC_CH_MAP_REG232_CH_MAP_930_RESETVAL (0x00000000u)
  18247. #define CSL_CPINTC_CH_MAP_REG232_CH_MAP_931_MASK (0xFF000000u)
  18248. #define CSL_CPINTC_CH_MAP_REG232_CH_MAP_931_SHIFT (0x00000018u)
  18249. #define CSL_CPINTC_CH_MAP_REG232_CH_MAP_931_RESETVAL (0x00000000u)
  18250. #define CSL_CPINTC_CH_MAP_REG232_RESETVAL (0x00000000u)
  18251. /* ch_map_reg233 */
  18252. #define CSL_CPINTC_CH_MAP_REG233_CH_MAP_932_MASK (0x000000FFu)
  18253. #define CSL_CPINTC_CH_MAP_REG233_CH_MAP_932_SHIFT (0x00000000u)
  18254. #define CSL_CPINTC_CH_MAP_REG233_CH_MAP_932_RESETVAL (0x00000000u)
  18255. #define CSL_CPINTC_CH_MAP_REG233_CH_MAP_933_MASK (0x0000FF00u)
  18256. #define CSL_CPINTC_CH_MAP_REG233_CH_MAP_933_SHIFT (0x00000008u)
  18257. #define CSL_CPINTC_CH_MAP_REG233_CH_MAP_933_RESETVAL (0x00000000u)
  18258. #define CSL_CPINTC_CH_MAP_REG233_CH_MAP_934_MASK (0x00FF0000u)
  18259. #define CSL_CPINTC_CH_MAP_REG233_CH_MAP_934_SHIFT (0x00000010u)
  18260. #define CSL_CPINTC_CH_MAP_REG233_CH_MAP_934_RESETVAL (0x00000000u)
  18261. #define CSL_CPINTC_CH_MAP_REG233_CH_MAP_935_MASK (0xFF000000u)
  18262. #define CSL_CPINTC_CH_MAP_REG233_CH_MAP_935_SHIFT (0x00000018u)
  18263. #define CSL_CPINTC_CH_MAP_REG233_CH_MAP_935_RESETVAL (0x00000000u)
  18264. #define CSL_CPINTC_CH_MAP_REG233_RESETVAL (0x00000000u)
  18265. /* ch_map_reg234 */
  18266. #define CSL_CPINTC_CH_MAP_REG234_CH_MAP_936_MASK (0x000000FFu)
  18267. #define CSL_CPINTC_CH_MAP_REG234_CH_MAP_936_SHIFT (0x00000000u)
  18268. #define CSL_CPINTC_CH_MAP_REG234_CH_MAP_936_RESETVAL (0x00000000u)
  18269. #define CSL_CPINTC_CH_MAP_REG234_CH_MAP_937_MASK (0x0000FF00u)
  18270. #define CSL_CPINTC_CH_MAP_REG234_CH_MAP_937_SHIFT (0x00000008u)
  18271. #define CSL_CPINTC_CH_MAP_REG234_CH_MAP_937_RESETVAL (0x00000000u)
  18272. #define CSL_CPINTC_CH_MAP_REG234_CH_MAP_938_MASK (0x00FF0000u)
  18273. #define CSL_CPINTC_CH_MAP_REG234_CH_MAP_938_SHIFT (0x00000010u)
  18274. #define CSL_CPINTC_CH_MAP_REG234_CH_MAP_938_RESETVAL (0x00000000u)
  18275. #define CSL_CPINTC_CH_MAP_REG234_CH_MAP_939_MASK (0xFF000000u)
  18276. #define CSL_CPINTC_CH_MAP_REG234_CH_MAP_939_SHIFT (0x00000018u)
  18277. #define CSL_CPINTC_CH_MAP_REG234_CH_MAP_939_RESETVAL (0x00000000u)
  18278. #define CSL_CPINTC_CH_MAP_REG234_RESETVAL (0x00000000u)
  18279. /* ch_map_reg235 */
  18280. #define CSL_CPINTC_CH_MAP_REG235_CH_MAP_940_MASK (0x000000FFu)
  18281. #define CSL_CPINTC_CH_MAP_REG235_CH_MAP_940_SHIFT (0x00000000u)
  18282. #define CSL_CPINTC_CH_MAP_REG235_CH_MAP_940_RESETVAL (0x00000000u)
  18283. #define CSL_CPINTC_CH_MAP_REG235_CH_MAP_941_MASK (0x0000FF00u)
  18284. #define CSL_CPINTC_CH_MAP_REG235_CH_MAP_941_SHIFT (0x00000008u)
  18285. #define CSL_CPINTC_CH_MAP_REG235_CH_MAP_941_RESETVAL (0x00000000u)
  18286. #define CSL_CPINTC_CH_MAP_REG235_CH_MAP_942_MASK (0x00FF0000u)
  18287. #define CSL_CPINTC_CH_MAP_REG235_CH_MAP_942_SHIFT (0x00000010u)
  18288. #define CSL_CPINTC_CH_MAP_REG235_CH_MAP_942_RESETVAL (0x00000000u)
  18289. #define CSL_CPINTC_CH_MAP_REG235_CH_MAP_943_MASK (0xFF000000u)
  18290. #define CSL_CPINTC_CH_MAP_REG235_CH_MAP_943_SHIFT (0x00000018u)
  18291. #define CSL_CPINTC_CH_MAP_REG235_CH_MAP_943_RESETVAL (0x00000000u)
  18292. #define CSL_CPINTC_CH_MAP_REG235_RESETVAL (0x00000000u)
  18293. /* ch_map_reg236 */
  18294. #define CSL_CPINTC_CH_MAP_REG236_CH_MAP_944_MASK (0x000000FFu)
  18295. #define CSL_CPINTC_CH_MAP_REG236_CH_MAP_944_SHIFT (0x00000000u)
  18296. #define CSL_CPINTC_CH_MAP_REG236_CH_MAP_944_RESETVAL (0x00000000u)
  18297. #define CSL_CPINTC_CH_MAP_REG236_CH_MAP_945_MASK (0x0000FF00u)
  18298. #define CSL_CPINTC_CH_MAP_REG236_CH_MAP_945_SHIFT (0x00000008u)
  18299. #define CSL_CPINTC_CH_MAP_REG236_CH_MAP_945_RESETVAL (0x00000000u)
  18300. #define CSL_CPINTC_CH_MAP_REG236_CH_MAP_946_MASK (0x00FF0000u)
  18301. #define CSL_CPINTC_CH_MAP_REG236_CH_MAP_946_SHIFT (0x00000010u)
  18302. #define CSL_CPINTC_CH_MAP_REG236_CH_MAP_946_RESETVAL (0x00000000u)
  18303. #define CSL_CPINTC_CH_MAP_REG236_CH_MAP_947_MASK (0xFF000000u)
  18304. #define CSL_CPINTC_CH_MAP_REG236_CH_MAP_947_SHIFT (0x00000018u)
  18305. #define CSL_CPINTC_CH_MAP_REG236_CH_MAP_947_RESETVAL (0x00000000u)
  18306. #define CSL_CPINTC_CH_MAP_REG236_RESETVAL (0x00000000u)
  18307. /* ch_map_reg237 */
  18308. #define CSL_CPINTC_CH_MAP_REG237_CH_MAP_948_MASK (0x000000FFu)
  18309. #define CSL_CPINTC_CH_MAP_REG237_CH_MAP_948_SHIFT (0x00000000u)
  18310. #define CSL_CPINTC_CH_MAP_REG237_CH_MAP_948_RESETVAL (0x00000000u)
  18311. #define CSL_CPINTC_CH_MAP_REG237_CH_MAP_949_MASK (0x0000FF00u)
  18312. #define CSL_CPINTC_CH_MAP_REG237_CH_MAP_949_SHIFT (0x00000008u)
  18313. #define CSL_CPINTC_CH_MAP_REG237_CH_MAP_949_RESETVAL (0x00000000u)
  18314. #define CSL_CPINTC_CH_MAP_REG237_CH_MAP_950_MASK (0x00FF0000u)
  18315. #define CSL_CPINTC_CH_MAP_REG237_CH_MAP_950_SHIFT (0x00000010u)
  18316. #define CSL_CPINTC_CH_MAP_REG237_CH_MAP_950_RESETVAL (0x00000000u)
  18317. #define CSL_CPINTC_CH_MAP_REG237_CH_MAP_951_MASK (0xFF000000u)
  18318. #define CSL_CPINTC_CH_MAP_REG237_CH_MAP_951_SHIFT (0x00000018u)
  18319. #define CSL_CPINTC_CH_MAP_REG237_CH_MAP_951_RESETVAL (0x00000000u)
  18320. #define CSL_CPINTC_CH_MAP_REG237_RESETVAL (0x00000000u)
  18321. /* ch_map_reg238 */
  18322. #define CSL_CPINTC_CH_MAP_REG238_CH_MAP_952_MASK (0x000000FFu)
  18323. #define CSL_CPINTC_CH_MAP_REG238_CH_MAP_952_SHIFT (0x00000000u)
  18324. #define CSL_CPINTC_CH_MAP_REG238_CH_MAP_952_RESETVAL (0x00000000u)
  18325. #define CSL_CPINTC_CH_MAP_REG238_CH_MAP_953_MASK (0x0000FF00u)
  18326. #define CSL_CPINTC_CH_MAP_REG238_CH_MAP_953_SHIFT (0x00000008u)
  18327. #define CSL_CPINTC_CH_MAP_REG238_CH_MAP_953_RESETVAL (0x00000000u)
  18328. #define CSL_CPINTC_CH_MAP_REG238_CH_MAP_954_MASK (0x00FF0000u)
  18329. #define CSL_CPINTC_CH_MAP_REG238_CH_MAP_954_SHIFT (0x00000010u)
  18330. #define CSL_CPINTC_CH_MAP_REG238_CH_MAP_954_RESETVAL (0x00000000u)
  18331. #define CSL_CPINTC_CH_MAP_REG238_CH_MAP_955_MASK (0xFF000000u)
  18332. #define CSL_CPINTC_CH_MAP_REG238_CH_MAP_955_SHIFT (0x00000018u)
  18333. #define CSL_CPINTC_CH_MAP_REG238_CH_MAP_955_RESETVAL (0x00000000u)
  18334. #define CSL_CPINTC_CH_MAP_REG238_RESETVAL (0x00000000u)
  18335. /* ch_map_reg239 */
  18336. #define CSL_CPINTC_CH_MAP_REG239_CH_MAP_956_MASK (0x000000FFu)
  18337. #define CSL_CPINTC_CH_MAP_REG239_CH_MAP_956_SHIFT (0x00000000u)
  18338. #define CSL_CPINTC_CH_MAP_REG239_CH_MAP_956_RESETVAL (0x00000000u)
  18339. #define CSL_CPINTC_CH_MAP_REG239_CH_MAP_957_MASK (0x0000FF00u)
  18340. #define CSL_CPINTC_CH_MAP_REG239_CH_MAP_957_SHIFT (0x00000008u)
  18341. #define CSL_CPINTC_CH_MAP_REG239_CH_MAP_957_RESETVAL (0x00000000u)
  18342. #define CSL_CPINTC_CH_MAP_REG239_CH_MAP_958_MASK (0x00FF0000u)
  18343. #define CSL_CPINTC_CH_MAP_REG239_CH_MAP_958_SHIFT (0x00000010u)
  18344. #define CSL_CPINTC_CH_MAP_REG239_CH_MAP_958_RESETVAL (0x00000000u)
  18345. #define CSL_CPINTC_CH_MAP_REG239_CH_MAP_959_MASK (0xFF000000u)
  18346. #define CSL_CPINTC_CH_MAP_REG239_CH_MAP_959_SHIFT (0x00000018u)
  18347. #define CSL_CPINTC_CH_MAP_REG239_CH_MAP_959_RESETVAL (0x00000000u)
  18348. #define CSL_CPINTC_CH_MAP_REG239_RESETVAL (0x00000000u)
  18349. /* ch_map_reg240 */
  18350. #define CSL_CPINTC_CH_MAP_REG240_CH_MAP_960_MASK (0x000000FFu)
  18351. #define CSL_CPINTC_CH_MAP_REG240_CH_MAP_960_SHIFT (0x00000000u)
  18352. #define CSL_CPINTC_CH_MAP_REG240_CH_MAP_960_RESETVAL (0x00000000u)
  18353. #define CSL_CPINTC_CH_MAP_REG240_CH_MAP_961_MASK (0x0000FF00u)
  18354. #define CSL_CPINTC_CH_MAP_REG240_CH_MAP_961_SHIFT (0x00000008u)
  18355. #define CSL_CPINTC_CH_MAP_REG240_CH_MAP_961_RESETVAL (0x00000000u)
  18356. #define CSL_CPINTC_CH_MAP_REG240_CH_MAP_962_MASK (0x00FF0000u)
  18357. #define CSL_CPINTC_CH_MAP_REG240_CH_MAP_962_SHIFT (0x00000010u)
  18358. #define CSL_CPINTC_CH_MAP_REG240_CH_MAP_962_RESETVAL (0x00000000u)
  18359. #define CSL_CPINTC_CH_MAP_REG240_CH_MAP_963_MASK (0xFF000000u)
  18360. #define CSL_CPINTC_CH_MAP_REG240_CH_MAP_963_SHIFT (0x00000018u)
  18361. #define CSL_CPINTC_CH_MAP_REG240_CH_MAP_963_RESETVAL (0x00000000u)
  18362. #define CSL_CPINTC_CH_MAP_REG240_RESETVAL (0x00000000u)
  18363. /* ch_map_reg241 */
  18364. #define CSL_CPINTC_CH_MAP_REG241_CH_MAP_964_MASK (0x000000FFu)
  18365. #define CSL_CPINTC_CH_MAP_REG241_CH_MAP_964_SHIFT (0x00000000u)
  18366. #define CSL_CPINTC_CH_MAP_REG241_CH_MAP_964_RESETVAL (0x00000000u)
  18367. #define CSL_CPINTC_CH_MAP_REG241_CH_MAP_965_MASK (0x0000FF00u)
  18368. #define CSL_CPINTC_CH_MAP_REG241_CH_MAP_965_SHIFT (0x00000008u)
  18369. #define CSL_CPINTC_CH_MAP_REG241_CH_MAP_965_RESETVAL (0x00000000u)
  18370. #define CSL_CPINTC_CH_MAP_REG241_CH_MAP_966_MASK (0x00FF0000u)
  18371. #define CSL_CPINTC_CH_MAP_REG241_CH_MAP_966_SHIFT (0x00000010u)
  18372. #define CSL_CPINTC_CH_MAP_REG241_CH_MAP_966_RESETVAL (0x00000000u)
  18373. #define CSL_CPINTC_CH_MAP_REG241_CH_MAP_967_MASK (0xFF000000u)
  18374. #define CSL_CPINTC_CH_MAP_REG241_CH_MAP_967_SHIFT (0x00000018u)
  18375. #define CSL_CPINTC_CH_MAP_REG241_CH_MAP_967_RESETVAL (0x00000000u)
  18376. #define CSL_CPINTC_CH_MAP_REG241_RESETVAL (0x00000000u)
  18377. /* ch_map_reg242 */
  18378. #define CSL_CPINTC_CH_MAP_REG242_CH_MAP_968_MASK (0x000000FFu)
  18379. #define CSL_CPINTC_CH_MAP_REG242_CH_MAP_968_SHIFT (0x00000000u)
  18380. #define CSL_CPINTC_CH_MAP_REG242_CH_MAP_968_RESETVAL (0x00000000u)
  18381. #define CSL_CPINTC_CH_MAP_REG242_CH_MAP_969_MASK (0x0000FF00u)
  18382. #define CSL_CPINTC_CH_MAP_REG242_CH_MAP_969_SHIFT (0x00000008u)
  18383. #define CSL_CPINTC_CH_MAP_REG242_CH_MAP_969_RESETVAL (0x00000000u)
  18384. #define CSL_CPINTC_CH_MAP_REG242_CH_MAP_970_MASK (0x00FF0000u)
  18385. #define CSL_CPINTC_CH_MAP_REG242_CH_MAP_970_SHIFT (0x00000010u)
  18386. #define CSL_CPINTC_CH_MAP_REG242_CH_MAP_970_RESETVAL (0x00000000u)
  18387. #define CSL_CPINTC_CH_MAP_REG242_CH_MAP_971_MASK (0xFF000000u)
  18388. #define CSL_CPINTC_CH_MAP_REG242_CH_MAP_971_SHIFT (0x00000018u)
  18389. #define CSL_CPINTC_CH_MAP_REG242_CH_MAP_971_RESETVAL (0x00000000u)
  18390. #define CSL_CPINTC_CH_MAP_REG242_RESETVAL (0x00000000u)
  18391. /* ch_map_reg243 */
  18392. #define CSL_CPINTC_CH_MAP_REG243_CH_MAP_972_MASK (0x000000FFu)
  18393. #define CSL_CPINTC_CH_MAP_REG243_CH_MAP_972_SHIFT (0x00000000u)
  18394. #define CSL_CPINTC_CH_MAP_REG243_CH_MAP_972_RESETVAL (0x00000000u)
  18395. #define CSL_CPINTC_CH_MAP_REG243_CH_MAP_973_MASK (0x0000FF00u)
  18396. #define CSL_CPINTC_CH_MAP_REG243_CH_MAP_973_SHIFT (0x00000008u)
  18397. #define CSL_CPINTC_CH_MAP_REG243_CH_MAP_973_RESETVAL (0x00000000u)
  18398. #define CSL_CPINTC_CH_MAP_REG243_CH_MAP_974_MASK (0x00FF0000u)
  18399. #define CSL_CPINTC_CH_MAP_REG243_CH_MAP_974_SHIFT (0x00000010u)
  18400. #define CSL_CPINTC_CH_MAP_REG243_CH_MAP_974_RESETVAL (0x00000000u)
  18401. #define CSL_CPINTC_CH_MAP_REG243_CH_MAP_975_MASK (0xFF000000u)
  18402. #define CSL_CPINTC_CH_MAP_REG243_CH_MAP_975_SHIFT (0x00000018u)
  18403. #define CSL_CPINTC_CH_MAP_REG243_CH_MAP_975_RESETVAL (0x00000000u)
  18404. #define CSL_CPINTC_CH_MAP_REG243_RESETVAL (0x00000000u)
  18405. /* ch_map_reg244 */
  18406. #define CSL_CPINTC_CH_MAP_REG244_CH_MAP_976_MASK (0x000000FFu)
  18407. #define CSL_CPINTC_CH_MAP_REG244_CH_MAP_976_SHIFT (0x00000000u)
  18408. #define CSL_CPINTC_CH_MAP_REG244_CH_MAP_976_RESETVAL (0x00000000u)
  18409. #define CSL_CPINTC_CH_MAP_REG244_CH_MAP_977_MASK (0x0000FF00u)
  18410. #define CSL_CPINTC_CH_MAP_REG244_CH_MAP_977_SHIFT (0x00000008u)
  18411. #define CSL_CPINTC_CH_MAP_REG244_CH_MAP_977_RESETVAL (0x00000000u)
  18412. #define CSL_CPINTC_CH_MAP_REG244_CH_MAP_978_MASK (0x00FF0000u)
  18413. #define CSL_CPINTC_CH_MAP_REG244_CH_MAP_978_SHIFT (0x00000010u)
  18414. #define CSL_CPINTC_CH_MAP_REG244_CH_MAP_978_RESETVAL (0x00000000u)
  18415. #define CSL_CPINTC_CH_MAP_REG244_CH_MAP_979_MASK (0xFF000000u)
  18416. #define CSL_CPINTC_CH_MAP_REG244_CH_MAP_979_SHIFT (0x00000018u)
  18417. #define CSL_CPINTC_CH_MAP_REG244_CH_MAP_979_RESETVAL (0x00000000u)
  18418. #define CSL_CPINTC_CH_MAP_REG244_RESETVAL (0x00000000u)
  18419. /* ch_map_reg245 */
  18420. #define CSL_CPINTC_CH_MAP_REG245_CH_MAP_980_MASK (0x000000FFu)
  18421. #define CSL_CPINTC_CH_MAP_REG245_CH_MAP_980_SHIFT (0x00000000u)
  18422. #define CSL_CPINTC_CH_MAP_REG245_CH_MAP_980_RESETVAL (0x00000000u)
  18423. #define CSL_CPINTC_CH_MAP_REG245_CH_MAP_981_MASK (0x0000FF00u)
  18424. #define CSL_CPINTC_CH_MAP_REG245_CH_MAP_981_SHIFT (0x00000008u)
  18425. #define CSL_CPINTC_CH_MAP_REG245_CH_MAP_981_RESETVAL (0x00000000u)
  18426. #define CSL_CPINTC_CH_MAP_REG245_CH_MAP_982_MASK (0x00FF0000u)
  18427. #define CSL_CPINTC_CH_MAP_REG245_CH_MAP_982_SHIFT (0x00000010u)
  18428. #define CSL_CPINTC_CH_MAP_REG245_CH_MAP_982_RESETVAL (0x00000000u)
  18429. #define CSL_CPINTC_CH_MAP_REG245_CH_MAP_983_MASK (0xFF000000u)
  18430. #define CSL_CPINTC_CH_MAP_REG245_CH_MAP_983_SHIFT (0x00000018u)
  18431. #define CSL_CPINTC_CH_MAP_REG245_CH_MAP_983_RESETVAL (0x00000000u)
  18432. #define CSL_CPINTC_CH_MAP_REG245_RESETVAL (0x00000000u)
  18433. /* ch_map_reg246 */
  18434. #define CSL_CPINTC_CH_MAP_REG246_CH_MAP_984_MASK (0x000000FFu)
  18435. #define CSL_CPINTC_CH_MAP_REG246_CH_MAP_984_SHIFT (0x00000000u)
  18436. #define CSL_CPINTC_CH_MAP_REG246_CH_MAP_984_RESETVAL (0x00000000u)
  18437. #define CSL_CPINTC_CH_MAP_REG246_CH_MAP_985_MASK (0x0000FF00u)
  18438. #define CSL_CPINTC_CH_MAP_REG246_CH_MAP_985_SHIFT (0x00000008u)
  18439. #define CSL_CPINTC_CH_MAP_REG246_CH_MAP_985_RESETVAL (0x00000000u)
  18440. #define CSL_CPINTC_CH_MAP_REG246_CH_MAP_986_MASK (0x00FF0000u)
  18441. #define CSL_CPINTC_CH_MAP_REG246_CH_MAP_986_SHIFT (0x00000010u)
  18442. #define CSL_CPINTC_CH_MAP_REG246_CH_MAP_986_RESETVAL (0x00000000u)
  18443. #define CSL_CPINTC_CH_MAP_REG246_CH_MAP_987_MASK (0xFF000000u)
  18444. #define CSL_CPINTC_CH_MAP_REG246_CH_MAP_987_SHIFT (0x00000018u)
  18445. #define CSL_CPINTC_CH_MAP_REG246_CH_MAP_987_RESETVAL (0x00000000u)
  18446. #define CSL_CPINTC_CH_MAP_REG246_RESETVAL (0x00000000u)
  18447. /* ch_map_reg247 */
  18448. #define CSL_CPINTC_CH_MAP_REG247_CH_MAP_988_MASK (0x000000FFu)
  18449. #define CSL_CPINTC_CH_MAP_REG247_CH_MAP_988_SHIFT (0x00000000u)
  18450. #define CSL_CPINTC_CH_MAP_REG247_CH_MAP_988_RESETVAL (0x00000000u)
  18451. #define CSL_CPINTC_CH_MAP_REG247_CH_MAP_989_MASK (0x0000FF00u)
  18452. #define CSL_CPINTC_CH_MAP_REG247_CH_MAP_989_SHIFT (0x00000008u)
  18453. #define CSL_CPINTC_CH_MAP_REG247_CH_MAP_989_RESETVAL (0x00000000u)
  18454. #define CSL_CPINTC_CH_MAP_REG247_CH_MAP_990_MASK (0x00FF0000u)
  18455. #define CSL_CPINTC_CH_MAP_REG247_CH_MAP_990_SHIFT (0x00000010u)
  18456. #define CSL_CPINTC_CH_MAP_REG247_CH_MAP_990_RESETVAL (0x00000000u)
  18457. #define CSL_CPINTC_CH_MAP_REG247_CH_MAP_991_MASK (0xFF000000u)
  18458. #define CSL_CPINTC_CH_MAP_REG247_CH_MAP_991_SHIFT (0x00000018u)
  18459. #define CSL_CPINTC_CH_MAP_REG247_CH_MAP_991_RESETVAL (0x00000000u)
  18460. #define CSL_CPINTC_CH_MAP_REG247_RESETVAL (0x00000000u)
  18461. /* ch_map_reg248 */
  18462. #define CSL_CPINTC_CH_MAP_REG248_CH_MAP_992_MASK (0x000000FFu)
  18463. #define CSL_CPINTC_CH_MAP_REG248_CH_MAP_992_SHIFT (0x00000000u)
  18464. #define CSL_CPINTC_CH_MAP_REG248_CH_MAP_992_RESETVAL (0x00000000u)
  18465. #define CSL_CPINTC_CH_MAP_REG248_CH_MAP_993_MASK (0x0000FF00u)
  18466. #define CSL_CPINTC_CH_MAP_REG248_CH_MAP_993_SHIFT (0x00000008u)
  18467. #define CSL_CPINTC_CH_MAP_REG248_CH_MAP_993_RESETVAL (0x00000000u)
  18468. #define CSL_CPINTC_CH_MAP_REG248_CH_MAP_994_MASK (0x00FF0000u)
  18469. #define CSL_CPINTC_CH_MAP_REG248_CH_MAP_994_SHIFT (0x00000010u)
  18470. #define CSL_CPINTC_CH_MAP_REG248_CH_MAP_994_RESETVAL (0x00000000u)
  18471. #define CSL_CPINTC_CH_MAP_REG248_CH_MAP_995_MASK (0xFF000000u)
  18472. #define CSL_CPINTC_CH_MAP_REG248_CH_MAP_995_SHIFT (0x00000018u)
  18473. #define CSL_CPINTC_CH_MAP_REG248_CH_MAP_995_RESETVAL (0x00000000u)
  18474. #define CSL_CPINTC_CH_MAP_REG248_RESETVAL (0x00000000u)
  18475. /* ch_map_reg249 */
  18476. #define CSL_CPINTC_CH_MAP_REG249_CH_MAP_996_MASK (0x000000FFu)
  18477. #define CSL_CPINTC_CH_MAP_REG249_CH_MAP_996_SHIFT (0x00000000u)
  18478. #define CSL_CPINTC_CH_MAP_REG249_CH_MAP_996_RESETVAL (0x00000000u)
  18479. #define CSL_CPINTC_CH_MAP_REG249_CH_MAP_997_MASK (0x0000FF00u)
  18480. #define CSL_CPINTC_CH_MAP_REG249_CH_MAP_997_SHIFT (0x00000008u)
  18481. #define CSL_CPINTC_CH_MAP_REG249_CH_MAP_997_RESETVAL (0x00000000u)
  18482. #define CSL_CPINTC_CH_MAP_REG249_CH_MAP_998_MASK (0x00FF0000u)
  18483. #define CSL_CPINTC_CH_MAP_REG249_CH_MAP_998_SHIFT (0x00000010u)
  18484. #define CSL_CPINTC_CH_MAP_REG249_CH_MAP_998_RESETVAL (0x00000000u)
  18485. #define CSL_CPINTC_CH_MAP_REG249_CH_MAP_999_MASK (0xFF000000u)
  18486. #define CSL_CPINTC_CH_MAP_REG249_CH_MAP_999_SHIFT (0x00000018u)
  18487. #define CSL_CPINTC_CH_MAP_REG249_CH_MAP_999_RESETVAL (0x00000000u)
  18488. #define CSL_CPINTC_CH_MAP_REG249_RESETVAL (0x00000000u)
  18489. /* ch_map_reg250 */
  18490. #define CSL_CPINTC_CH_MAP_REG250_CH_MAP_1000_MASK (0x000000FFu)
  18491. #define CSL_CPINTC_CH_MAP_REG250_CH_MAP_1000_SHIFT (0x00000000u)
  18492. #define CSL_CPINTC_CH_MAP_REG250_CH_MAP_1000_RESETVAL (0x00000000u)
  18493. #define CSL_CPINTC_CH_MAP_REG250_CH_MAP_1001_MASK (0x0000FF00u)
  18494. #define CSL_CPINTC_CH_MAP_REG250_CH_MAP_1001_SHIFT (0x00000008u)
  18495. #define CSL_CPINTC_CH_MAP_REG250_CH_MAP_1001_RESETVAL (0x00000000u)
  18496. #define CSL_CPINTC_CH_MAP_REG250_CH_MAP_1002_MASK (0x00FF0000u)
  18497. #define CSL_CPINTC_CH_MAP_REG250_CH_MAP_1002_SHIFT (0x00000010u)
  18498. #define CSL_CPINTC_CH_MAP_REG250_CH_MAP_1002_RESETVAL (0x00000000u)
  18499. #define CSL_CPINTC_CH_MAP_REG250_CH_MAP_1003_MASK (0xFF000000u)
  18500. #define CSL_CPINTC_CH_MAP_REG250_CH_MAP_1003_SHIFT (0x00000018u)
  18501. #define CSL_CPINTC_CH_MAP_REG250_CH_MAP_1003_RESETVAL (0x00000000u)
  18502. #define CSL_CPINTC_CH_MAP_REG250_RESETVAL (0x00000000u)
  18503. /* ch_map_reg251 */
  18504. #define CSL_CPINTC_CH_MAP_REG251_CH_MAP_1004_MASK (0x000000FFu)
  18505. #define CSL_CPINTC_CH_MAP_REG251_CH_MAP_1004_SHIFT (0x00000000u)
  18506. #define CSL_CPINTC_CH_MAP_REG251_CH_MAP_1004_RESETVAL (0x00000000u)
  18507. #define CSL_CPINTC_CH_MAP_REG251_CH_MAP_1005_MASK (0x0000FF00u)
  18508. #define CSL_CPINTC_CH_MAP_REG251_CH_MAP_1005_SHIFT (0x00000008u)
  18509. #define CSL_CPINTC_CH_MAP_REG251_CH_MAP_1005_RESETVAL (0x00000000u)
  18510. #define CSL_CPINTC_CH_MAP_REG251_CH_MAP_1006_MASK (0x00FF0000u)
  18511. #define CSL_CPINTC_CH_MAP_REG251_CH_MAP_1006_SHIFT (0x00000010u)
  18512. #define CSL_CPINTC_CH_MAP_REG251_CH_MAP_1006_RESETVAL (0x00000000u)
  18513. #define CSL_CPINTC_CH_MAP_REG251_CH_MAP_1007_MASK (0xFF000000u)
  18514. #define CSL_CPINTC_CH_MAP_REG251_CH_MAP_1007_SHIFT (0x00000018u)
  18515. #define CSL_CPINTC_CH_MAP_REG251_CH_MAP_1007_RESETVAL (0x00000000u)
  18516. #define CSL_CPINTC_CH_MAP_REG251_RESETVAL (0x00000000u)
  18517. /* ch_map_reg252 */
  18518. #define CSL_CPINTC_CH_MAP_REG252_CH_MAP_1008_MASK (0x000000FFu)
  18519. #define CSL_CPINTC_CH_MAP_REG252_CH_MAP_1008_SHIFT (0x00000000u)
  18520. #define CSL_CPINTC_CH_MAP_REG252_CH_MAP_1008_RESETVAL (0x00000000u)
  18521. #define CSL_CPINTC_CH_MAP_REG252_CH_MAP_1009_MASK (0x0000FF00u)
  18522. #define CSL_CPINTC_CH_MAP_REG252_CH_MAP_1009_SHIFT (0x00000008u)
  18523. #define CSL_CPINTC_CH_MAP_REG252_CH_MAP_1009_RESETVAL (0x00000000u)
  18524. #define CSL_CPINTC_CH_MAP_REG252_CH_MAP_1010_MASK (0x00FF0000u)
  18525. #define CSL_CPINTC_CH_MAP_REG252_CH_MAP_1010_SHIFT (0x00000010u)
  18526. #define CSL_CPINTC_CH_MAP_REG252_CH_MAP_1010_RESETVAL (0x00000000u)
  18527. #define CSL_CPINTC_CH_MAP_REG252_CH_MAP_1011_MASK (0xFF000000u)
  18528. #define CSL_CPINTC_CH_MAP_REG252_CH_MAP_1011_SHIFT (0x00000018u)
  18529. #define CSL_CPINTC_CH_MAP_REG252_CH_MAP_1011_RESETVAL (0x00000000u)
  18530. #define CSL_CPINTC_CH_MAP_REG252_RESETVAL (0x00000000u)
  18531. /* ch_map_reg253 */
  18532. #define CSL_CPINTC_CH_MAP_REG253_CH_MAP_1012_MASK (0x000000FFu)
  18533. #define CSL_CPINTC_CH_MAP_REG253_CH_MAP_1012_SHIFT (0x00000000u)
  18534. #define CSL_CPINTC_CH_MAP_REG253_CH_MAP_1012_RESETVAL (0x00000000u)
  18535. #define CSL_CPINTC_CH_MAP_REG253_CH_MAP_1013_MASK (0x0000FF00u)
  18536. #define CSL_CPINTC_CH_MAP_REG253_CH_MAP_1013_SHIFT (0x00000008u)
  18537. #define CSL_CPINTC_CH_MAP_REG253_CH_MAP_1013_RESETVAL (0x00000000u)
  18538. #define CSL_CPINTC_CH_MAP_REG253_CH_MAP_1014_MASK (0x00FF0000u)
  18539. #define CSL_CPINTC_CH_MAP_REG253_CH_MAP_1014_SHIFT (0x00000010u)
  18540. #define CSL_CPINTC_CH_MAP_REG253_CH_MAP_1014_RESETVAL (0x00000000u)
  18541. #define CSL_CPINTC_CH_MAP_REG253_CH_MAP_1015_MASK (0xFF000000u)
  18542. #define CSL_CPINTC_CH_MAP_REG253_CH_MAP_1015_SHIFT (0x00000018u)
  18543. #define CSL_CPINTC_CH_MAP_REG253_CH_MAP_1015_RESETVAL (0x00000000u)
  18544. #define CSL_CPINTC_CH_MAP_REG253_RESETVAL (0x00000000u)
  18545. /* ch_map_reg254 */
  18546. #define CSL_CPINTC_CH_MAP_REG254_CH_MAP_1016_MASK (0x000000FFu)
  18547. #define CSL_CPINTC_CH_MAP_REG254_CH_MAP_1016_SHIFT (0x00000000u)
  18548. #define CSL_CPINTC_CH_MAP_REG254_CH_MAP_1016_RESETVAL (0x00000000u)
  18549. #define CSL_CPINTC_CH_MAP_REG254_CH_MAP_1017_MASK (0x0000FF00u)
  18550. #define CSL_CPINTC_CH_MAP_REG254_CH_MAP_1017_SHIFT (0x00000008u)
  18551. #define CSL_CPINTC_CH_MAP_REG254_CH_MAP_1017_RESETVAL (0x00000000u)
  18552. #define CSL_CPINTC_CH_MAP_REG254_CH_MAP_1018_MASK (0x00FF0000u)
  18553. #define CSL_CPINTC_CH_MAP_REG254_CH_MAP_1018_SHIFT (0x00000010u)
  18554. #define CSL_CPINTC_CH_MAP_REG254_CH_MAP_1018_RESETVAL (0x00000000u)
  18555. #define CSL_CPINTC_CH_MAP_REG254_CH_MAP_1019_MASK (0xFF000000u)
  18556. #define CSL_CPINTC_CH_MAP_REG254_CH_MAP_1019_SHIFT (0x00000018u)
  18557. #define CSL_CPINTC_CH_MAP_REG254_CH_MAP_1019_RESETVAL (0x00000000u)
  18558. #define CSL_CPINTC_CH_MAP_REG254_RESETVAL (0x00000000u)
  18559. /* ch_map_reg255 */
  18560. #define CSL_CPINTC_CH_MAP_REG255_CH_MAP_1020_MASK (0x000000FFu)
  18561. #define CSL_CPINTC_CH_MAP_REG255_CH_MAP_1020_SHIFT (0x00000000u)
  18562. #define CSL_CPINTC_CH_MAP_REG255_CH_MAP_1020_RESETVAL (0x00000000u)
  18563. #define CSL_CPINTC_CH_MAP_REG255_CH_MAP_1021_MASK (0x0000FF00u)
  18564. #define CSL_CPINTC_CH_MAP_REG255_CH_MAP_1021_SHIFT (0x00000008u)
  18565. #define CSL_CPINTC_CH_MAP_REG255_CH_MAP_1021_RESETVAL (0x00000000u)
  18566. #define CSL_CPINTC_CH_MAP_REG255_CH_MAP_1022_MASK (0x00FF0000u)
  18567. #define CSL_CPINTC_CH_MAP_REG255_CH_MAP_1022_SHIFT (0x00000010u)
  18568. #define CSL_CPINTC_CH_MAP_REG255_CH_MAP_1022_RESETVAL (0x00000000u)
  18569. #define CSL_CPINTC_CH_MAP_REG255_CH_MAP_1023_MASK (0xFF000000u)
  18570. #define CSL_CPINTC_CH_MAP_REG255_CH_MAP_1023_SHIFT (0x00000018u)
  18571. #define CSL_CPINTC_CH_MAP_REG255_CH_MAP_1023_RESETVAL (0x00000000u)
  18572. #define CSL_CPINTC_CH_MAP_REG255_RESETVAL (0x00000000u)
  18573. /* hint_map_reg0 */
  18574. #define CSL_CPINTC_HINT_MAP_REG0_HINT_MAP_0_MASK (0x000000FFu)
  18575. #define CSL_CPINTC_HINT_MAP_REG0_HINT_MAP_0_SHIFT (0x00000000u)
  18576. #define CSL_CPINTC_HINT_MAP_REG0_HINT_MAP_0_RESETVAL (0x00000000u)
  18577. #define CSL_CPINTC_HINT_MAP_REG0_HINT_MAP_1_MASK (0x0000FF00u)
  18578. #define CSL_CPINTC_HINT_MAP_REG0_HINT_MAP_1_SHIFT (0x00000008u)
  18579. #define CSL_CPINTC_HINT_MAP_REG0_HINT_MAP_1_RESETVAL (0x00000000u)
  18580. #define CSL_CPINTC_HINT_MAP_REG0_HINT_MAP_2_MASK (0x00FF0000u)
  18581. #define CSL_CPINTC_HINT_MAP_REG0_HINT_MAP_2_SHIFT (0x00000010u)
  18582. #define CSL_CPINTC_HINT_MAP_REG0_HINT_MAP_2_RESETVAL (0x00000000u)
  18583. #define CSL_CPINTC_HINT_MAP_REG0_HINT_MAP_3_MASK (0xFF000000u)
  18584. #define CSL_CPINTC_HINT_MAP_REG0_HINT_MAP_3_SHIFT (0x00000018u)
  18585. #define CSL_CPINTC_HINT_MAP_REG0_HINT_MAP_3_RESETVAL (0x00000000u)
  18586. #define CSL_CPINTC_HINT_MAP_REG0_RESETVAL (0x00000000u)
  18587. /* hint_map_reg1 */
  18588. #define CSL_CPINTC_HINT_MAP_REG1_HINT_MAP_4_MASK (0x000000FFu)
  18589. #define CSL_CPINTC_HINT_MAP_REG1_HINT_MAP_4_SHIFT (0x00000000u)
  18590. #define CSL_CPINTC_HINT_MAP_REG1_HINT_MAP_4_RESETVAL (0x00000000u)
  18591. #define CSL_CPINTC_HINT_MAP_REG1_HINT_MAP_5_MASK (0x0000FF00u)
  18592. #define CSL_CPINTC_HINT_MAP_REG1_HINT_MAP_5_SHIFT (0x00000008u)
  18593. #define CSL_CPINTC_HINT_MAP_REG1_HINT_MAP_5_RESETVAL (0x00000000u)
  18594. #define CSL_CPINTC_HINT_MAP_REG1_HINT_MAP_6_MASK (0x00FF0000u)
  18595. #define CSL_CPINTC_HINT_MAP_REG1_HINT_MAP_6_SHIFT (0x00000010u)
  18596. #define CSL_CPINTC_HINT_MAP_REG1_HINT_MAP_6_RESETVAL (0x00000000u)
  18597. #define CSL_CPINTC_HINT_MAP_REG1_HINT_MAP_7_MASK (0xFF000000u)
  18598. #define CSL_CPINTC_HINT_MAP_REG1_HINT_MAP_7_SHIFT (0x00000018u)
  18599. #define CSL_CPINTC_HINT_MAP_REG1_HINT_MAP_7_RESETVAL (0x00000000u)
  18600. #define CSL_CPINTC_HINT_MAP_REG1_RESETVAL (0x00000000u)
  18601. /* hint_map_reg2 */
  18602. #define CSL_CPINTC_HINT_MAP_REG2_HINT_MAP_8_MASK (0x000000FFu)
  18603. #define CSL_CPINTC_HINT_MAP_REG2_HINT_MAP_8_SHIFT (0x00000000u)
  18604. #define CSL_CPINTC_HINT_MAP_REG2_HINT_MAP_8_RESETVAL (0x00000000u)
  18605. #define CSL_CPINTC_HINT_MAP_REG2_HINT_MAP_9_MASK (0x0000FF00u)
  18606. #define CSL_CPINTC_HINT_MAP_REG2_HINT_MAP_9_SHIFT (0x00000008u)
  18607. #define CSL_CPINTC_HINT_MAP_REG2_HINT_MAP_9_RESETVAL (0x00000000u)
  18608. #define CSL_CPINTC_HINT_MAP_REG2_HINT_MAP_10_MASK (0x00FF0000u)
  18609. #define CSL_CPINTC_HINT_MAP_REG2_HINT_MAP_10_SHIFT (0x00000010u)
  18610. #define CSL_CPINTC_HINT_MAP_REG2_HINT_MAP_10_RESETVAL (0x00000000u)
  18611. #define CSL_CPINTC_HINT_MAP_REG2_HINT_MAP_11_MASK (0xFF000000u)
  18612. #define CSL_CPINTC_HINT_MAP_REG2_HINT_MAP_11_SHIFT (0x00000018u)
  18613. #define CSL_CPINTC_HINT_MAP_REG2_HINT_MAP_11_RESETVAL (0x00000000u)
  18614. #define CSL_CPINTC_HINT_MAP_REG2_RESETVAL (0x00000000u)
  18615. /* hint_map_reg3 */
  18616. #define CSL_CPINTC_HINT_MAP_REG3_HINT_MAP_12_MASK (0x000000FFu)
  18617. #define CSL_CPINTC_HINT_MAP_REG3_HINT_MAP_12_SHIFT (0x00000000u)
  18618. #define CSL_CPINTC_HINT_MAP_REG3_HINT_MAP_12_RESETVAL (0x00000000u)
  18619. #define CSL_CPINTC_HINT_MAP_REG3_HINT_MAP_13_MASK (0x0000FF00u)
  18620. #define CSL_CPINTC_HINT_MAP_REG3_HINT_MAP_13_SHIFT (0x00000008u)
  18621. #define CSL_CPINTC_HINT_MAP_REG3_HINT_MAP_13_RESETVAL (0x00000000u)
  18622. #define CSL_CPINTC_HINT_MAP_REG3_HINT_MAP_14_MASK (0x00FF0000u)
  18623. #define CSL_CPINTC_HINT_MAP_REG3_HINT_MAP_14_SHIFT (0x00000010u)
  18624. #define CSL_CPINTC_HINT_MAP_REG3_HINT_MAP_14_RESETVAL (0x00000000u)
  18625. #define CSL_CPINTC_HINT_MAP_REG3_HINT_MAP_15_MASK (0xFF000000u)
  18626. #define CSL_CPINTC_HINT_MAP_REG3_HINT_MAP_15_SHIFT (0x00000018u)
  18627. #define CSL_CPINTC_HINT_MAP_REG3_HINT_MAP_15_RESETVAL (0x00000000u)
  18628. #define CSL_CPINTC_HINT_MAP_REG3_RESETVAL (0x00000000u)
  18629. /* hint_map_reg4 */
  18630. #define CSL_CPINTC_HINT_MAP_REG4_HINT_MAP_16_MASK (0x000000FFu)
  18631. #define CSL_CPINTC_HINT_MAP_REG4_HINT_MAP_16_SHIFT (0x00000000u)
  18632. #define CSL_CPINTC_HINT_MAP_REG4_HINT_MAP_16_RESETVAL (0x00000000u)
  18633. #define CSL_CPINTC_HINT_MAP_REG4_HINT_MAP_17_MASK (0x0000FF00u)
  18634. #define CSL_CPINTC_HINT_MAP_REG4_HINT_MAP_17_SHIFT (0x00000008u)
  18635. #define CSL_CPINTC_HINT_MAP_REG4_HINT_MAP_17_RESETVAL (0x00000000u)
  18636. #define CSL_CPINTC_HINT_MAP_REG4_HINT_MAP_18_MASK (0x00FF0000u)
  18637. #define CSL_CPINTC_HINT_MAP_REG4_HINT_MAP_18_SHIFT (0x00000010u)
  18638. #define CSL_CPINTC_HINT_MAP_REG4_HINT_MAP_18_RESETVAL (0x00000000u)
  18639. #define CSL_CPINTC_HINT_MAP_REG4_HINT_MAP_19_MASK (0xFF000000u)
  18640. #define CSL_CPINTC_HINT_MAP_REG4_HINT_MAP_19_SHIFT (0x00000018u)
  18641. #define CSL_CPINTC_HINT_MAP_REG4_HINT_MAP_19_RESETVAL (0x00000000u)
  18642. #define CSL_CPINTC_HINT_MAP_REG4_RESETVAL (0x00000000u)
  18643. /* hint_map_reg5 */
  18644. #define CSL_CPINTC_HINT_MAP_REG5_HINT_MAP_20_MASK (0x000000FFu)
  18645. #define CSL_CPINTC_HINT_MAP_REG5_HINT_MAP_20_SHIFT (0x00000000u)
  18646. #define CSL_CPINTC_HINT_MAP_REG5_HINT_MAP_20_RESETVAL (0x00000000u)
  18647. #define CSL_CPINTC_HINT_MAP_REG5_HINT_MAP_21_MASK (0x0000FF00u)
  18648. #define CSL_CPINTC_HINT_MAP_REG5_HINT_MAP_21_SHIFT (0x00000008u)
  18649. #define CSL_CPINTC_HINT_MAP_REG5_HINT_MAP_21_RESETVAL (0x00000000u)
  18650. #define CSL_CPINTC_HINT_MAP_REG5_HINT_MAP_22_MASK (0x00FF0000u)
  18651. #define CSL_CPINTC_HINT_MAP_REG5_HINT_MAP_22_SHIFT (0x00000010u)
  18652. #define CSL_CPINTC_HINT_MAP_REG5_HINT_MAP_22_RESETVAL (0x00000000u)
  18653. #define CSL_CPINTC_HINT_MAP_REG5_HINT_MAP_23_MASK (0xFF000000u)
  18654. #define CSL_CPINTC_HINT_MAP_REG5_HINT_MAP_23_SHIFT (0x00000018u)
  18655. #define CSL_CPINTC_HINT_MAP_REG5_HINT_MAP_23_RESETVAL (0x00000000u)
  18656. #define CSL_CPINTC_HINT_MAP_REG5_RESETVAL (0x00000000u)
  18657. /* hint_map_reg6 */
  18658. #define CSL_CPINTC_HINT_MAP_REG6_HINT_MAP_24_MASK (0x000000FFu)
  18659. #define CSL_CPINTC_HINT_MAP_REG6_HINT_MAP_24_SHIFT (0x00000000u)
  18660. #define CSL_CPINTC_HINT_MAP_REG6_HINT_MAP_24_RESETVAL (0x00000000u)
  18661. #define CSL_CPINTC_HINT_MAP_REG6_HINT_MAP_25_MASK (0x0000FF00u)
  18662. #define CSL_CPINTC_HINT_MAP_REG6_HINT_MAP_25_SHIFT (0x00000008u)
  18663. #define CSL_CPINTC_HINT_MAP_REG6_HINT_MAP_25_RESETVAL (0x00000000u)
  18664. #define CSL_CPINTC_HINT_MAP_REG6_HINT_MAP_26_MASK (0x00FF0000u)
  18665. #define CSL_CPINTC_HINT_MAP_REG6_HINT_MAP_26_SHIFT (0x00000010u)
  18666. #define CSL_CPINTC_HINT_MAP_REG6_HINT_MAP_26_RESETVAL (0x00000000u)
  18667. #define CSL_CPINTC_HINT_MAP_REG6_HINT_MAP_27_MASK (0xFF000000u)
  18668. #define CSL_CPINTC_HINT_MAP_REG6_HINT_MAP_27_SHIFT (0x00000018u)
  18669. #define CSL_CPINTC_HINT_MAP_REG6_HINT_MAP_27_RESETVAL (0x00000000u)
  18670. #define CSL_CPINTC_HINT_MAP_REG6_RESETVAL (0x00000000u)
  18671. /* hint_map_reg7 */
  18672. #define CSL_CPINTC_HINT_MAP_REG7_HINT_MAP_28_MASK (0x000000FFu)
  18673. #define CSL_CPINTC_HINT_MAP_REG7_HINT_MAP_28_SHIFT (0x00000000u)
  18674. #define CSL_CPINTC_HINT_MAP_REG7_HINT_MAP_28_RESETVAL (0x00000000u)
  18675. #define CSL_CPINTC_HINT_MAP_REG7_HINT_MAP_29_MASK (0x0000FF00u)
  18676. #define CSL_CPINTC_HINT_MAP_REG7_HINT_MAP_29_SHIFT (0x00000008u)
  18677. #define CSL_CPINTC_HINT_MAP_REG7_HINT_MAP_29_RESETVAL (0x00000000u)
  18678. #define CSL_CPINTC_HINT_MAP_REG7_HINT_MAP_30_MASK (0x00FF0000u)
  18679. #define CSL_CPINTC_HINT_MAP_REG7_HINT_MAP_30_SHIFT (0x00000010u)
  18680. #define CSL_CPINTC_HINT_MAP_REG7_HINT_MAP_30_RESETVAL (0x00000000u)
  18681. #define CSL_CPINTC_HINT_MAP_REG7_HINT_MAP_31_MASK (0xFF000000u)
  18682. #define CSL_CPINTC_HINT_MAP_REG7_HINT_MAP_31_SHIFT (0x00000018u)
  18683. #define CSL_CPINTC_HINT_MAP_REG7_HINT_MAP_31_RESETVAL (0x00000000u)
  18684. #define CSL_CPINTC_HINT_MAP_REG7_RESETVAL (0x00000000u)
  18685. /* hint_map_reg8 */
  18686. #define CSL_CPINTC_HINT_MAP_REG8_HINT_MAP_32_MASK (0x000000FFu)
  18687. #define CSL_CPINTC_HINT_MAP_REG8_HINT_MAP_32_SHIFT (0x00000000u)
  18688. #define CSL_CPINTC_HINT_MAP_REG8_HINT_MAP_32_RESETVAL (0x00000000u)
  18689. #define CSL_CPINTC_HINT_MAP_REG8_HINT_MAP_33_MASK (0x0000FF00u)
  18690. #define CSL_CPINTC_HINT_MAP_REG8_HINT_MAP_33_SHIFT (0x00000008u)
  18691. #define CSL_CPINTC_HINT_MAP_REG8_HINT_MAP_33_RESETVAL (0x00000000u)
  18692. #define CSL_CPINTC_HINT_MAP_REG8_HINT_MAP_34_MASK (0x00FF0000u)
  18693. #define CSL_CPINTC_HINT_MAP_REG8_HINT_MAP_34_SHIFT (0x00000010u)
  18694. #define CSL_CPINTC_HINT_MAP_REG8_HINT_MAP_34_RESETVAL (0x00000000u)
  18695. #define CSL_CPINTC_HINT_MAP_REG8_HINT_MAP_35_MASK (0xFF000000u)
  18696. #define CSL_CPINTC_HINT_MAP_REG8_HINT_MAP_35_SHIFT (0x00000018u)
  18697. #define CSL_CPINTC_HINT_MAP_REG8_HINT_MAP_35_RESETVAL (0x00000000u)
  18698. #define CSL_CPINTC_HINT_MAP_REG8_RESETVAL (0x00000000u)
  18699. /* hint_map_reg9 */
  18700. #define CSL_CPINTC_HINT_MAP_REG9_HINT_MAP_36_MASK (0x000000FFu)
  18701. #define CSL_CPINTC_HINT_MAP_REG9_HINT_MAP_36_SHIFT (0x00000000u)
  18702. #define CSL_CPINTC_HINT_MAP_REG9_HINT_MAP_36_RESETVAL (0x00000000u)
  18703. #define CSL_CPINTC_HINT_MAP_REG9_HINT_MAP_37_MASK (0x0000FF00u)
  18704. #define CSL_CPINTC_HINT_MAP_REG9_HINT_MAP_37_SHIFT (0x00000008u)
  18705. #define CSL_CPINTC_HINT_MAP_REG9_HINT_MAP_37_RESETVAL (0x00000000u)
  18706. #define CSL_CPINTC_HINT_MAP_REG9_HINT_MAP_38_MASK (0x00FF0000u)
  18707. #define CSL_CPINTC_HINT_MAP_REG9_HINT_MAP_38_SHIFT (0x00000010u)
  18708. #define CSL_CPINTC_HINT_MAP_REG9_HINT_MAP_38_RESETVAL (0x00000000u)
  18709. #define CSL_CPINTC_HINT_MAP_REG9_HINT_MAP_39_MASK (0xFF000000u)
  18710. #define CSL_CPINTC_HINT_MAP_REG9_HINT_MAP_39_SHIFT (0x00000018u)
  18711. #define CSL_CPINTC_HINT_MAP_REG9_HINT_MAP_39_RESETVAL (0x00000000u)
  18712. #define CSL_CPINTC_HINT_MAP_REG9_RESETVAL (0x00000000u)
  18713. /* hint_map_reg10 */
  18714. #define CSL_CPINTC_HINT_MAP_REG10_HINT_MAP_40_MASK (0x000000FFu)
  18715. #define CSL_CPINTC_HINT_MAP_REG10_HINT_MAP_40_SHIFT (0x00000000u)
  18716. #define CSL_CPINTC_HINT_MAP_REG10_HINT_MAP_40_RESETVAL (0x00000000u)
  18717. #define CSL_CPINTC_HINT_MAP_REG10_HINT_MAP_41_MASK (0x0000FF00u)
  18718. #define CSL_CPINTC_HINT_MAP_REG10_HINT_MAP_41_SHIFT (0x00000008u)
  18719. #define CSL_CPINTC_HINT_MAP_REG10_HINT_MAP_41_RESETVAL (0x00000000u)
  18720. #define CSL_CPINTC_HINT_MAP_REG10_HINT_MAP_42_MASK (0x00FF0000u)
  18721. #define CSL_CPINTC_HINT_MAP_REG10_HINT_MAP_42_SHIFT (0x00000010u)
  18722. #define CSL_CPINTC_HINT_MAP_REG10_HINT_MAP_42_RESETVAL (0x00000000u)
  18723. #define CSL_CPINTC_HINT_MAP_REG10_HINT_MAP_43_MASK (0xFF000000u)
  18724. #define CSL_CPINTC_HINT_MAP_REG10_HINT_MAP_43_SHIFT (0x00000018u)
  18725. #define CSL_CPINTC_HINT_MAP_REG10_HINT_MAP_43_RESETVAL (0x00000000u)
  18726. #define CSL_CPINTC_HINT_MAP_REG10_RESETVAL (0x00000000u)
  18727. /* hint_map_reg11 */
  18728. #define CSL_CPINTC_HINT_MAP_REG11_HINT_MAP_44_MASK (0x000000FFu)
  18729. #define CSL_CPINTC_HINT_MAP_REG11_HINT_MAP_44_SHIFT (0x00000000u)
  18730. #define CSL_CPINTC_HINT_MAP_REG11_HINT_MAP_44_RESETVAL (0x00000000u)
  18731. #define CSL_CPINTC_HINT_MAP_REG11_HINT_MAP_45_MASK (0x0000FF00u)
  18732. #define CSL_CPINTC_HINT_MAP_REG11_HINT_MAP_45_SHIFT (0x00000008u)
  18733. #define CSL_CPINTC_HINT_MAP_REG11_HINT_MAP_45_RESETVAL (0x00000000u)
  18734. #define CSL_CPINTC_HINT_MAP_REG11_HINT_MAP_46_MASK (0x00FF0000u)
  18735. #define CSL_CPINTC_HINT_MAP_REG11_HINT_MAP_46_SHIFT (0x00000010u)
  18736. #define CSL_CPINTC_HINT_MAP_REG11_HINT_MAP_46_RESETVAL (0x00000000u)
  18737. #define CSL_CPINTC_HINT_MAP_REG11_HINT_MAP_47_MASK (0xFF000000u)
  18738. #define CSL_CPINTC_HINT_MAP_REG11_HINT_MAP_47_SHIFT (0x00000018u)
  18739. #define CSL_CPINTC_HINT_MAP_REG11_HINT_MAP_47_RESETVAL (0x00000000u)
  18740. #define CSL_CPINTC_HINT_MAP_REG11_RESETVAL (0x00000000u)
  18741. /* hint_map_reg12 */
  18742. #define CSL_CPINTC_HINT_MAP_REG12_HINT_MAP_48_MASK (0x000000FFu)
  18743. #define CSL_CPINTC_HINT_MAP_REG12_HINT_MAP_48_SHIFT (0x00000000u)
  18744. #define CSL_CPINTC_HINT_MAP_REG12_HINT_MAP_48_RESETVAL (0x00000000u)
  18745. #define CSL_CPINTC_HINT_MAP_REG12_HINT_MAP_49_MASK (0x0000FF00u)
  18746. #define CSL_CPINTC_HINT_MAP_REG12_HINT_MAP_49_SHIFT (0x00000008u)
  18747. #define CSL_CPINTC_HINT_MAP_REG12_HINT_MAP_49_RESETVAL (0x00000000u)
  18748. #define CSL_CPINTC_HINT_MAP_REG12_HINT_MAP_50_MASK (0x00FF0000u)
  18749. #define CSL_CPINTC_HINT_MAP_REG12_HINT_MAP_50_SHIFT (0x00000010u)
  18750. #define CSL_CPINTC_HINT_MAP_REG12_HINT_MAP_50_RESETVAL (0x00000000u)
  18751. #define CSL_CPINTC_HINT_MAP_REG12_HINT_MAP_51_MASK (0xFF000000u)
  18752. #define CSL_CPINTC_HINT_MAP_REG12_HINT_MAP_51_SHIFT (0x00000018u)
  18753. #define CSL_CPINTC_HINT_MAP_REG12_HINT_MAP_51_RESETVAL (0x00000000u)
  18754. #define CSL_CPINTC_HINT_MAP_REG12_RESETVAL (0x00000000u)
  18755. /* hint_map_reg13 */
  18756. #define CSL_CPINTC_HINT_MAP_REG13_HINT_MAP_52_MASK (0x000000FFu)
  18757. #define CSL_CPINTC_HINT_MAP_REG13_HINT_MAP_52_SHIFT (0x00000000u)
  18758. #define CSL_CPINTC_HINT_MAP_REG13_HINT_MAP_52_RESETVAL (0x00000000u)
  18759. #define CSL_CPINTC_HINT_MAP_REG13_HINT_MAP_53_MASK (0x0000FF00u)
  18760. #define CSL_CPINTC_HINT_MAP_REG13_HINT_MAP_53_SHIFT (0x00000008u)
  18761. #define CSL_CPINTC_HINT_MAP_REG13_HINT_MAP_53_RESETVAL (0x00000000u)
  18762. #define CSL_CPINTC_HINT_MAP_REG13_HINT_MAP_54_MASK (0x00FF0000u)
  18763. #define CSL_CPINTC_HINT_MAP_REG13_HINT_MAP_54_SHIFT (0x00000010u)
  18764. #define CSL_CPINTC_HINT_MAP_REG13_HINT_MAP_54_RESETVAL (0x00000000u)
  18765. #define CSL_CPINTC_HINT_MAP_REG13_HINT_MAP_55_MASK (0xFF000000u)
  18766. #define CSL_CPINTC_HINT_MAP_REG13_HINT_MAP_55_SHIFT (0x00000018u)
  18767. #define CSL_CPINTC_HINT_MAP_REG13_HINT_MAP_55_RESETVAL (0x00000000u)
  18768. #define CSL_CPINTC_HINT_MAP_REG13_RESETVAL (0x00000000u)
  18769. /* hint_map_reg14 */
  18770. #define CSL_CPINTC_HINT_MAP_REG14_HINT_MAP_56_MASK (0x000000FFu)
  18771. #define CSL_CPINTC_HINT_MAP_REG14_HINT_MAP_56_SHIFT (0x00000000u)
  18772. #define CSL_CPINTC_HINT_MAP_REG14_HINT_MAP_56_RESETVAL (0x00000000u)
  18773. #define CSL_CPINTC_HINT_MAP_REG14_HINT_MAP_57_MASK (0x0000FF00u)
  18774. #define CSL_CPINTC_HINT_MAP_REG14_HINT_MAP_57_SHIFT (0x00000008u)
  18775. #define CSL_CPINTC_HINT_MAP_REG14_HINT_MAP_57_RESETVAL (0x00000000u)
  18776. #define CSL_CPINTC_HINT_MAP_REG14_HINT_MAP_58_MASK (0x00FF0000u)
  18777. #define CSL_CPINTC_HINT_MAP_REG14_HINT_MAP_58_SHIFT (0x00000010u)
  18778. #define CSL_CPINTC_HINT_MAP_REG14_HINT_MAP_58_RESETVAL (0x00000000u)
  18779. #define CSL_CPINTC_HINT_MAP_REG14_HINT_MAP_59_MASK (0xFF000000u)
  18780. #define CSL_CPINTC_HINT_MAP_REG14_HINT_MAP_59_SHIFT (0x00000018u)
  18781. #define CSL_CPINTC_HINT_MAP_REG14_HINT_MAP_59_RESETVAL (0x00000000u)
  18782. #define CSL_CPINTC_HINT_MAP_REG14_RESETVAL (0x00000000u)
  18783. /* hint_map_reg15 */
  18784. #define CSL_CPINTC_HINT_MAP_REG15_HINT_MAP_60_MASK (0x000000FFu)
  18785. #define CSL_CPINTC_HINT_MAP_REG15_HINT_MAP_60_SHIFT (0x00000000u)
  18786. #define CSL_CPINTC_HINT_MAP_REG15_HINT_MAP_60_RESETVAL (0x00000000u)
  18787. #define CSL_CPINTC_HINT_MAP_REG15_HINT_MAP_61_MASK (0x0000FF00u)
  18788. #define CSL_CPINTC_HINT_MAP_REG15_HINT_MAP_61_SHIFT (0x00000008u)
  18789. #define CSL_CPINTC_HINT_MAP_REG15_HINT_MAP_61_RESETVAL (0x00000000u)
  18790. #define CSL_CPINTC_HINT_MAP_REG15_HINT_MAP_62_MASK (0x00FF0000u)
  18791. #define CSL_CPINTC_HINT_MAP_REG15_HINT_MAP_62_SHIFT (0x00000010u)
  18792. #define CSL_CPINTC_HINT_MAP_REG15_HINT_MAP_62_RESETVAL (0x00000000u)
  18793. #define CSL_CPINTC_HINT_MAP_REG15_HINT_MAP_63_MASK (0xFF000000u)
  18794. #define CSL_CPINTC_HINT_MAP_REG15_HINT_MAP_63_SHIFT (0x00000018u)
  18795. #define CSL_CPINTC_HINT_MAP_REG15_HINT_MAP_63_RESETVAL (0x00000000u)
  18796. #define CSL_CPINTC_HINT_MAP_REG15_RESETVAL (0x00000000u)
  18797. /* hint_map_reg16 */
  18798. #define CSL_CPINTC_HINT_MAP_REG16_HINT_MAP_64_MASK (0x000000FFu)
  18799. #define CSL_CPINTC_HINT_MAP_REG16_HINT_MAP_64_SHIFT (0x00000000u)
  18800. #define CSL_CPINTC_HINT_MAP_REG16_HINT_MAP_64_RESETVAL (0x00000000u)
  18801. #define CSL_CPINTC_HINT_MAP_REG16_HINT_MAP_65_MASK (0x0000FF00u)
  18802. #define CSL_CPINTC_HINT_MAP_REG16_HINT_MAP_65_SHIFT (0x00000008u)
  18803. #define CSL_CPINTC_HINT_MAP_REG16_HINT_MAP_65_RESETVAL (0x00000000u)
  18804. #define CSL_CPINTC_HINT_MAP_REG16_HINT_MAP_66_MASK (0x00FF0000u)
  18805. #define CSL_CPINTC_HINT_MAP_REG16_HINT_MAP_66_SHIFT (0x00000010u)
  18806. #define CSL_CPINTC_HINT_MAP_REG16_HINT_MAP_66_RESETVAL (0x00000000u)
  18807. #define CSL_CPINTC_HINT_MAP_REG16_HINT_MAP_67_MASK (0xFF000000u)
  18808. #define CSL_CPINTC_HINT_MAP_REG16_HINT_MAP_67_SHIFT (0x00000018u)
  18809. #define CSL_CPINTC_HINT_MAP_REG16_HINT_MAP_67_RESETVAL (0x00000000u)
  18810. #define CSL_CPINTC_HINT_MAP_REG16_RESETVAL (0x00000000u)
  18811. /* hint_map_reg17 */
  18812. #define CSL_CPINTC_HINT_MAP_REG17_HINT_MAP_68_MASK (0x000000FFu)
  18813. #define CSL_CPINTC_HINT_MAP_REG17_HINT_MAP_68_SHIFT (0x00000000u)
  18814. #define CSL_CPINTC_HINT_MAP_REG17_HINT_MAP_68_RESETVAL (0x00000000u)
  18815. #define CSL_CPINTC_HINT_MAP_REG17_HINT_MAP_69_MASK (0x0000FF00u)
  18816. #define CSL_CPINTC_HINT_MAP_REG17_HINT_MAP_69_SHIFT (0x00000008u)
  18817. #define CSL_CPINTC_HINT_MAP_REG17_HINT_MAP_69_RESETVAL (0x00000000u)
  18818. #define CSL_CPINTC_HINT_MAP_REG17_HINT_MAP_70_MASK (0x00FF0000u)
  18819. #define CSL_CPINTC_HINT_MAP_REG17_HINT_MAP_70_SHIFT (0x00000010u)
  18820. #define CSL_CPINTC_HINT_MAP_REG17_HINT_MAP_70_RESETVAL (0x00000000u)
  18821. #define CSL_CPINTC_HINT_MAP_REG17_HINT_MAP_71_MASK (0xFF000000u)
  18822. #define CSL_CPINTC_HINT_MAP_REG17_HINT_MAP_71_SHIFT (0x00000018u)
  18823. #define CSL_CPINTC_HINT_MAP_REG17_HINT_MAP_71_RESETVAL (0x00000000u)
  18824. #define CSL_CPINTC_HINT_MAP_REG17_RESETVAL (0x00000000u)
  18825. /* hint_map_reg18 */
  18826. #define CSL_CPINTC_HINT_MAP_REG18_HINT_MAP_72_MASK (0x000000FFu)
  18827. #define CSL_CPINTC_HINT_MAP_REG18_HINT_MAP_72_SHIFT (0x00000000u)
  18828. #define CSL_CPINTC_HINT_MAP_REG18_HINT_MAP_72_RESETVAL (0x00000000u)
  18829. #define CSL_CPINTC_HINT_MAP_REG18_HINT_MAP_73_MASK (0x0000FF00u)
  18830. #define CSL_CPINTC_HINT_MAP_REG18_HINT_MAP_73_SHIFT (0x00000008u)
  18831. #define CSL_CPINTC_HINT_MAP_REG18_HINT_MAP_73_RESETVAL (0x00000000u)
  18832. #define CSL_CPINTC_HINT_MAP_REG18_HINT_MAP_74_MASK (0x00FF0000u)
  18833. #define CSL_CPINTC_HINT_MAP_REG18_HINT_MAP_74_SHIFT (0x00000010u)
  18834. #define CSL_CPINTC_HINT_MAP_REG18_HINT_MAP_74_RESETVAL (0x00000000u)
  18835. #define CSL_CPINTC_HINT_MAP_REG18_HINT_MAP_75_MASK (0xFF000000u)
  18836. #define CSL_CPINTC_HINT_MAP_REG18_HINT_MAP_75_SHIFT (0x00000018u)
  18837. #define CSL_CPINTC_HINT_MAP_REG18_HINT_MAP_75_RESETVAL (0x00000000u)
  18838. #define CSL_CPINTC_HINT_MAP_REG18_RESETVAL (0x00000000u)
  18839. /* hint_map_reg19 */
  18840. #define CSL_CPINTC_HINT_MAP_REG19_HINT_MAP_76_MASK (0x000000FFu)
  18841. #define CSL_CPINTC_HINT_MAP_REG19_HINT_MAP_76_SHIFT (0x00000000u)
  18842. #define CSL_CPINTC_HINT_MAP_REG19_HINT_MAP_76_RESETVAL (0x00000000u)
  18843. #define CSL_CPINTC_HINT_MAP_REG19_HINT_MAP_77_MASK (0x0000FF00u)
  18844. #define CSL_CPINTC_HINT_MAP_REG19_HINT_MAP_77_SHIFT (0x00000008u)
  18845. #define CSL_CPINTC_HINT_MAP_REG19_HINT_MAP_77_RESETVAL (0x00000000u)
  18846. #define CSL_CPINTC_HINT_MAP_REG19_HINT_MAP_78_MASK (0x00FF0000u)
  18847. #define CSL_CPINTC_HINT_MAP_REG19_HINT_MAP_78_SHIFT (0x00000010u)
  18848. #define CSL_CPINTC_HINT_MAP_REG19_HINT_MAP_78_RESETVAL (0x00000000u)
  18849. #define CSL_CPINTC_HINT_MAP_REG19_HINT_MAP_79_MASK (0xFF000000u)
  18850. #define CSL_CPINTC_HINT_MAP_REG19_HINT_MAP_79_SHIFT (0x00000018u)
  18851. #define CSL_CPINTC_HINT_MAP_REG19_HINT_MAP_79_RESETVAL (0x00000000u)
  18852. #define CSL_CPINTC_HINT_MAP_REG19_RESETVAL (0x00000000u)
  18853. /* hint_map_reg20 */
  18854. #define CSL_CPINTC_HINT_MAP_REG20_HINT_MAP_80_MASK (0x000000FFu)
  18855. #define CSL_CPINTC_HINT_MAP_REG20_HINT_MAP_80_SHIFT (0x00000000u)
  18856. #define CSL_CPINTC_HINT_MAP_REG20_HINT_MAP_80_RESETVAL (0x00000000u)
  18857. #define CSL_CPINTC_HINT_MAP_REG20_HINT_MAP_81_MASK (0x0000FF00u)
  18858. #define CSL_CPINTC_HINT_MAP_REG20_HINT_MAP_81_SHIFT (0x00000008u)
  18859. #define CSL_CPINTC_HINT_MAP_REG20_HINT_MAP_81_RESETVAL (0x00000000u)
  18860. #define CSL_CPINTC_HINT_MAP_REG20_HINT_MAP_82_MASK (0x00FF0000u)
  18861. #define CSL_CPINTC_HINT_MAP_REG20_HINT_MAP_82_SHIFT (0x00000010u)
  18862. #define CSL_CPINTC_HINT_MAP_REG20_HINT_MAP_82_RESETVAL (0x00000000u)
  18863. #define CSL_CPINTC_HINT_MAP_REG20_HINT_MAP_83_MASK (0xFF000000u)
  18864. #define CSL_CPINTC_HINT_MAP_REG20_HINT_MAP_83_SHIFT (0x00000018u)
  18865. #define CSL_CPINTC_HINT_MAP_REG20_HINT_MAP_83_RESETVAL (0x00000000u)
  18866. #define CSL_CPINTC_HINT_MAP_REG20_RESETVAL (0x00000000u)
  18867. /* hint_map_reg21 */
  18868. #define CSL_CPINTC_HINT_MAP_REG21_HINT_MAP_84_MASK (0x000000FFu)
  18869. #define CSL_CPINTC_HINT_MAP_REG21_HINT_MAP_84_SHIFT (0x00000000u)
  18870. #define CSL_CPINTC_HINT_MAP_REG21_HINT_MAP_84_RESETVAL (0x00000000u)
  18871. #define CSL_CPINTC_HINT_MAP_REG21_HINT_MAP_85_MASK (0x0000FF00u)
  18872. #define CSL_CPINTC_HINT_MAP_REG21_HINT_MAP_85_SHIFT (0x00000008u)
  18873. #define CSL_CPINTC_HINT_MAP_REG21_HINT_MAP_85_RESETVAL (0x00000000u)
  18874. #define CSL_CPINTC_HINT_MAP_REG21_HINT_MAP_86_MASK (0x00FF0000u)
  18875. #define CSL_CPINTC_HINT_MAP_REG21_HINT_MAP_86_SHIFT (0x00000010u)
  18876. #define CSL_CPINTC_HINT_MAP_REG21_HINT_MAP_86_RESETVAL (0x00000000u)
  18877. #define CSL_CPINTC_HINT_MAP_REG21_HINT_MAP_87_MASK (0xFF000000u)
  18878. #define CSL_CPINTC_HINT_MAP_REG21_HINT_MAP_87_SHIFT (0x00000018u)
  18879. #define CSL_CPINTC_HINT_MAP_REG21_HINT_MAP_87_RESETVAL (0x00000000u)
  18880. #define CSL_CPINTC_HINT_MAP_REG21_RESETVAL (0x00000000u)
  18881. /* hint_map_reg22 */
  18882. #define CSL_CPINTC_HINT_MAP_REG22_HINT_MAP_88_MASK (0x000000FFu)
  18883. #define CSL_CPINTC_HINT_MAP_REG22_HINT_MAP_88_SHIFT (0x00000000u)
  18884. #define CSL_CPINTC_HINT_MAP_REG22_HINT_MAP_88_RESETVAL (0x00000000u)
  18885. #define CSL_CPINTC_HINT_MAP_REG22_HINT_MAP_89_MASK (0x0000FF00u)
  18886. #define CSL_CPINTC_HINT_MAP_REG22_HINT_MAP_89_SHIFT (0x00000008u)
  18887. #define CSL_CPINTC_HINT_MAP_REG22_HINT_MAP_89_RESETVAL (0x00000000u)
  18888. #define CSL_CPINTC_HINT_MAP_REG22_HINT_MAP_90_MASK (0x00FF0000u)
  18889. #define CSL_CPINTC_HINT_MAP_REG22_HINT_MAP_90_SHIFT (0x00000010u)
  18890. #define CSL_CPINTC_HINT_MAP_REG22_HINT_MAP_90_RESETVAL (0x00000000u)
  18891. #define CSL_CPINTC_HINT_MAP_REG22_HINT_MAP_91_MASK (0xFF000000u)
  18892. #define CSL_CPINTC_HINT_MAP_REG22_HINT_MAP_91_SHIFT (0x00000018u)
  18893. #define CSL_CPINTC_HINT_MAP_REG22_HINT_MAP_91_RESETVAL (0x00000000u)
  18894. #define CSL_CPINTC_HINT_MAP_REG22_RESETVAL (0x00000000u)
  18895. /* hint_map_reg23 */
  18896. #define CSL_CPINTC_HINT_MAP_REG23_HINT_MAP_92_MASK (0x000000FFu)
  18897. #define CSL_CPINTC_HINT_MAP_REG23_HINT_MAP_92_SHIFT (0x00000000u)
  18898. #define CSL_CPINTC_HINT_MAP_REG23_HINT_MAP_92_RESETVAL (0x00000000u)
  18899. #define CSL_CPINTC_HINT_MAP_REG23_HINT_MAP_93_MASK (0x0000FF00u)
  18900. #define CSL_CPINTC_HINT_MAP_REG23_HINT_MAP_93_SHIFT (0x00000008u)
  18901. #define CSL_CPINTC_HINT_MAP_REG23_HINT_MAP_93_RESETVAL (0x00000000u)
  18902. #define CSL_CPINTC_HINT_MAP_REG23_HINT_MAP_94_MASK (0x00FF0000u)
  18903. #define CSL_CPINTC_HINT_MAP_REG23_HINT_MAP_94_SHIFT (0x00000010u)
  18904. #define CSL_CPINTC_HINT_MAP_REG23_HINT_MAP_94_RESETVAL (0x00000000u)
  18905. #define CSL_CPINTC_HINT_MAP_REG23_HINT_MAP_95_MASK (0xFF000000u)
  18906. #define CSL_CPINTC_HINT_MAP_REG23_HINT_MAP_95_SHIFT (0x00000018u)
  18907. #define CSL_CPINTC_HINT_MAP_REG23_HINT_MAP_95_RESETVAL (0x00000000u)
  18908. #define CSL_CPINTC_HINT_MAP_REG23_RESETVAL (0x00000000u)
  18909. /* hint_map_reg24 */
  18910. #define CSL_CPINTC_HINT_MAP_REG24_HINT_MAP_96_MASK (0x000000FFu)
  18911. #define CSL_CPINTC_HINT_MAP_REG24_HINT_MAP_96_SHIFT (0x00000000u)
  18912. #define CSL_CPINTC_HINT_MAP_REG24_HINT_MAP_96_RESETVAL (0x00000000u)
  18913. #define CSL_CPINTC_HINT_MAP_REG24_HINT_MAP_97_MASK (0x0000FF00u)
  18914. #define CSL_CPINTC_HINT_MAP_REG24_HINT_MAP_97_SHIFT (0x00000008u)
  18915. #define CSL_CPINTC_HINT_MAP_REG24_HINT_MAP_97_RESETVAL (0x00000000u)
  18916. #define CSL_CPINTC_HINT_MAP_REG24_HINT_MAP_98_MASK (0x00FF0000u)
  18917. #define CSL_CPINTC_HINT_MAP_REG24_HINT_MAP_98_SHIFT (0x00000010u)
  18918. #define CSL_CPINTC_HINT_MAP_REG24_HINT_MAP_98_RESETVAL (0x00000000u)
  18919. #define CSL_CPINTC_HINT_MAP_REG24_HINT_MAP_99_MASK (0xFF000000u)
  18920. #define CSL_CPINTC_HINT_MAP_REG24_HINT_MAP_99_SHIFT (0x00000018u)
  18921. #define CSL_CPINTC_HINT_MAP_REG24_HINT_MAP_99_RESETVAL (0x00000000u)
  18922. #define CSL_CPINTC_HINT_MAP_REG24_RESETVAL (0x00000000u)
  18923. /* hint_map_reg25 */
  18924. #define CSL_CPINTC_HINT_MAP_REG25_HINT_MAP_100_MASK (0x000000FFu)
  18925. #define CSL_CPINTC_HINT_MAP_REG25_HINT_MAP_100_SHIFT (0x00000000u)
  18926. #define CSL_CPINTC_HINT_MAP_REG25_HINT_MAP_100_RESETVAL (0x00000000u)
  18927. #define CSL_CPINTC_HINT_MAP_REG25_HINT_MAP_101_MASK (0x0000FF00u)
  18928. #define CSL_CPINTC_HINT_MAP_REG25_HINT_MAP_101_SHIFT (0x00000008u)
  18929. #define CSL_CPINTC_HINT_MAP_REG25_HINT_MAP_101_RESETVAL (0x00000000u)
  18930. #define CSL_CPINTC_HINT_MAP_REG25_HINT_MAP_102_MASK (0x00FF0000u)
  18931. #define CSL_CPINTC_HINT_MAP_REG25_HINT_MAP_102_SHIFT (0x00000010u)
  18932. #define CSL_CPINTC_HINT_MAP_REG25_HINT_MAP_102_RESETVAL (0x00000000u)
  18933. #define CSL_CPINTC_HINT_MAP_REG25_HINT_MAP_103_MASK (0xFF000000u)
  18934. #define CSL_CPINTC_HINT_MAP_REG25_HINT_MAP_103_SHIFT (0x00000018u)
  18935. #define CSL_CPINTC_HINT_MAP_REG25_HINT_MAP_103_RESETVAL (0x00000000u)
  18936. #define CSL_CPINTC_HINT_MAP_REG25_RESETVAL (0x00000000u)
  18937. /* hint_map_reg26 */
  18938. #define CSL_CPINTC_HINT_MAP_REG26_HINT_MAP_104_MASK (0x000000FFu)
  18939. #define CSL_CPINTC_HINT_MAP_REG26_HINT_MAP_104_SHIFT (0x00000000u)
  18940. #define CSL_CPINTC_HINT_MAP_REG26_HINT_MAP_104_RESETVAL (0x00000000u)
  18941. #define CSL_CPINTC_HINT_MAP_REG26_HINT_MAP_105_MASK (0x0000FF00u)
  18942. #define CSL_CPINTC_HINT_MAP_REG26_HINT_MAP_105_SHIFT (0x00000008u)
  18943. #define CSL_CPINTC_HINT_MAP_REG26_HINT_MAP_105_RESETVAL (0x00000000u)
  18944. #define CSL_CPINTC_HINT_MAP_REG26_HINT_MAP_106_MASK (0x00FF0000u)
  18945. #define CSL_CPINTC_HINT_MAP_REG26_HINT_MAP_106_SHIFT (0x00000010u)
  18946. #define CSL_CPINTC_HINT_MAP_REG26_HINT_MAP_106_RESETVAL (0x00000000u)
  18947. #define CSL_CPINTC_HINT_MAP_REG26_HINT_MAP_107_MASK (0xFF000000u)
  18948. #define CSL_CPINTC_HINT_MAP_REG26_HINT_MAP_107_SHIFT (0x00000018u)
  18949. #define CSL_CPINTC_HINT_MAP_REG26_HINT_MAP_107_RESETVAL (0x00000000u)
  18950. #define CSL_CPINTC_HINT_MAP_REG26_RESETVAL (0x00000000u)
  18951. /* hint_map_reg27 */
  18952. #define CSL_CPINTC_HINT_MAP_REG27_HINT_MAP_108_MASK (0x000000FFu)
  18953. #define CSL_CPINTC_HINT_MAP_REG27_HINT_MAP_108_SHIFT (0x00000000u)
  18954. #define CSL_CPINTC_HINT_MAP_REG27_HINT_MAP_108_RESETVAL (0x00000000u)
  18955. #define CSL_CPINTC_HINT_MAP_REG27_HINT_MAP_109_MASK (0x0000FF00u)
  18956. #define CSL_CPINTC_HINT_MAP_REG27_HINT_MAP_109_SHIFT (0x00000008u)
  18957. #define CSL_CPINTC_HINT_MAP_REG27_HINT_MAP_109_RESETVAL (0x00000000u)
  18958. #define CSL_CPINTC_HINT_MAP_REG27_HINT_MAP_110_MASK (0x00FF0000u)
  18959. #define CSL_CPINTC_HINT_MAP_REG27_HINT_MAP_110_SHIFT (0x00000010u)
  18960. #define CSL_CPINTC_HINT_MAP_REG27_HINT_MAP_110_RESETVAL (0x00000000u)
  18961. #define CSL_CPINTC_HINT_MAP_REG27_HINT_MAP_111_MASK (0xFF000000u)
  18962. #define CSL_CPINTC_HINT_MAP_REG27_HINT_MAP_111_SHIFT (0x00000018u)
  18963. #define CSL_CPINTC_HINT_MAP_REG27_HINT_MAP_111_RESETVAL (0x00000000u)
  18964. #define CSL_CPINTC_HINT_MAP_REG27_RESETVAL (0x00000000u)
  18965. /* hint_map_reg28 */
  18966. #define CSL_CPINTC_HINT_MAP_REG28_HINT_MAP_112_MASK (0x000000FFu)
  18967. #define CSL_CPINTC_HINT_MAP_REG28_HINT_MAP_112_SHIFT (0x00000000u)
  18968. #define CSL_CPINTC_HINT_MAP_REG28_HINT_MAP_112_RESETVAL (0x00000000u)
  18969. #define CSL_CPINTC_HINT_MAP_REG28_HINT_MAP_113_MASK (0x0000FF00u)
  18970. #define CSL_CPINTC_HINT_MAP_REG28_HINT_MAP_113_SHIFT (0x00000008u)
  18971. #define CSL_CPINTC_HINT_MAP_REG28_HINT_MAP_113_RESETVAL (0x00000000u)
  18972. #define CSL_CPINTC_HINT_MAP_REG28_HINT_MAP_114_MASK (0x00FF0000u)
  18973. #define CSL_CPINTC_HINT_MAP_REG28_HINT_MAP_114_SHIFT (0x00000010u)
  18974. #define CSL_CPINTC_HINT_MAP_REG28_HINT_MAP_114_RESETVAL (0x00000000u)
  18975. #define CSL_CPINTC_HINT_MAP_REG28_HINT_MAP_115_MASK (0xFF000000u)
  18976. #define CSL_CPINTC_HINT_MAP_REG28_HINT_MAP_115_SHIFT (0x00000018u)
  18977. #define CSL_CPINTC_HINT_MAP_REG28_HINT_MAP_115_RESETVAL (0x00000000u)
  18978. #define CSL_CPINTC_HINT_MAP_REG28_RESETVAL (0x00000000u)
  18979. /* hint_map_reg29 */
  18980. #define CSL_CPINTC_HINT_MAP_REG29_HINT_MAP_116_MASK (0x000000FFu)
  18981. #define CSL_CPINTC_HINT_MAP_REG29_HINT_MAP_116_SHIFT (0x00000000u)
  18982. #define CSL_CPINTC_HINT_MAP_REG29_HINT_MAP_116_RESETVAL (0x00000000u)
  18983. #define CSL_CPINTC_HINT_MAP_REG29_HINT_MAP_117_MASK (0x0000FF00u)
  18984. #define CSL_CPINTC_HINT_MAP_REG29_HINT_MAP_117_SHIFT (0x00000008u)
  18985. #define CSL_CPINTC_HINT_MAP_REG29_HINT_MAP_117_RESETVAL (0x00000000u)
  18986. #define CSL_CPINTC_HINT_MAP_REG29_HINT_MAP_118_MASK (0x00FF0000u)
  18987. #define CSL_CPINTC_HINT_MAP_REG29_HINT_MAP_118_SHIFT (0x00000010u)
  18988. #define CSL_CPINTC_HINT_MAP_REG29_HINT_MAP_118_RESETVAL (0x00000000u)
  18989. #define CSL_CPINTC_HINT_MAP_REG29_HINT_MAP_119_MASK (0xFF000000u)
  18990. #define CSL_CPINTC_HINT_MAP_REG29_HINT_MAP_119_SHIFT (0x00000018u)
  18991. #define CSL_CPINTC_HINT_MAP_REG29_HINT_MAP_119_RESETVAL (0x00000000u)
  18992. #define CSL_CPINTC_HINT_MAP_REG29_RESETVAL (0x00000000u)
  18993. /* hint_map_reg30 */
  18994. #define CSL_CPINTC_HINT_MAP_REG30_HINT_MAP_120_MASK (0x000000FFu)
  18995. #define CSL_CPINTC_HINT_MAP_REG30_HINT_MAP_120_SHIFT (0x00000000u)
  18996. #define CSL_CPINTC_HINT_MAP_REG30_HINT_MAP_120_RESETVAL (0x00000000u)
  18997. #define CSL_CPINTC_HINT_MAP_REG30_HINT_MAP_121_MASK (0x0000FF00u)
  18998. #define CSL_CPINTC_HINT_MAP_REG30_HINT_MAP_121_SHIFT (0x00000008u)
  18999. #define CSL_CPINTC_HINT_MAP_REG30_HINT_MAP_121_RESETVAL (0x00000000u)
  19000. #define CSL_CPINTC_HINT_MAP_REG30_HINT_MAP_122_MASK (0x00FF0000u)
  19001. #define CSL_CPINTC_HINT_MAP_REG30_HINT_MAP_122_SHIFT (0x00000010u)
  19002. #define CSL_CPINTC_HINT_MAP_REG30_HINT_MAP_122_RESETVAL (0x00000000u)
  19003. #define CSL_CPINTC_HINT_MAP_REG30_HINT_MAP_123_MASK (0xFF000000u)
  19004. #define CSL_CPINTC_HINT_MAP_REG30_HINT_MAP_123_SHIFT (0x00000018u)
  19005. #define CSL_CPINTC_HINT_MAP_REG30_HINT_MAP_123_RESETVAL (0x00000000u)
  19006. #define CSL_CPINTC_HINT_MAP_REG30_RESETVAL (0x00000000u)
  19007. /* hint_map_reg31 */
  19008. #define CSL_CPINTC_HINT_MAP_REG31_HINT_MAP_124_MASK (0x000000FFu)
  19009. #define CSL_CPINTC_HINT_MAP_REG31_HINT_MAP_124_SHIFT (0x00000000u)
  19010. #define CSL_CPINTC_HINT_MAP_REG31_HINT_MAP_124_RESETVAL (0x00000000u)
  19011. #define CSL_CPINTC_HINT_MAP_REG31_HINT_MAP_125_MASK (0x0000FF00u)
  19012. #define CSL_CPINTC_HINT_MAP_REG31_HINT_MAP_125_SHIFT (0x00000008u)
  19013. #define CSL_CPINTC_HINT_MAP_REG31_HINT_MAP_125_RESETVAL (0x00000000u)
  19014. #define CSL_CPINTC_HINT_MAP_REG31_HINT_MAP_126_MASK (0x00FF0000u)
  19015. #define CSL_CPINTC_HINT_MAP_REG31_HINT_MAP_126_SHIFT (0x00000010u)
  19016. #define CSL_CPINTC_HINT_MAP_REG31_HINT_MAP_126_RESETVAL (0x00000000u)
  19017. #define CSL_CPINTC_HINT_MAP_REG31_HINT_MAP_127_MASK (0xFF000000u)
  19018. #define CSL_CPINTC_HINT_MAP_REG31_HINT_MAP_127_SHIFT (0x00000018u)
  19019. #define CSL_CPINTC_HINT_MAP_REG31_HINT_MAP_127_RESETVAL (0x00000000u)
  19020. #define CSL_CPINTC_HINT_MAP_REG31_RESETVAL (0x00000000u)
  19021. /* hint_map_reg32 */
  19022. #define CSL_CPINTC_HINT_MAP_REG32_HINT_MAP_128_MASK (0x000000FFu)
  19023. #define CSL_CPINTC_HINT_MAP_REG32_HINT_MAP_128_SHIFT (0x00000000u)
  19024. #define CSL_CPINTC_HINT_MAP_REG32_HINT_MAP_128_RESETVAL (0x00000000u)
  19025. #define CSL_CPINTC_HINT_MAP_REG32_HINT_MAP_129_MASK (0x0000FF00u)
  19026. #define CSL_CPINTC_HINT_MAP_REG32_HINT_MAP_129_SHIFT (0x00000008u)
  19027. #define CSL_CPINTC_HINT_MAP_REG32_HINT_MAP_129_RESETVAL (0x00000000u)
  19028. #define CSL_CPINTC_HINT_MAP_REG32_HINT_MAP_130_MASK (0x00FF0000u)
  19029. #define CSL_CPINTC_HINT_MAP_REG32_HINT_MAP_130_SHIFT (0x00000010u)
  19030. #define CSL_CPINTC_HINT_MAP_REG32_HINT_MAP_130_RESETVAL (0x00000000u)
  19031. #define CSL_CPINTC_HINT_MAP_REG32_HINT_MAP_131_MASK (0xFF000000u)
  19032. #define CSL_CPINTC_HINT_MAP_REG32_HINT_MAP_131_SHIFT (0x00000018u)
  19033. #define CSL_CPINTC_HINT_MAP_REG32_HINT_MAP_131_RESETVAL (0x00000000u)
  19034. #define CSL_CPINTC_HINT_MAP_REG32_RESETVAL (0x00000000u)
  19035. /* hint_map_reg33 */
  19036. #define CSL_CPINTC_HINT_MAP_REG33_HINT_MAP_132_MASK (0x000000FFu)
  19037. #define CSL_CPINTC_HINT_MAP_REG33_HINT_MAP_132_SHIFT (0x00000000u)
  19038. #define CSL_CPINTC_HINT_MAP_REG33_HINT_MAP_132_RESETVAL (0x00000000u)
  19039. #define CSL_CPINTC_HINT_MAP_REG33_HINT_MAP_133_MASK (0x0000FF00u)
  19040. #define CSL_CPINTC_HINT_MAP_REG33_HINT_MAP_133_SHIFT (0x00000008u)
  19041. #define CSL_CPINTC_HINT_MAP_REG33_HINT_MAP_133_RESETVAL (0x00000000u)
  19042. #define CSL_CPINTC_HINT_MAP_REG33_HINT_MAP_134_MASK (0x00FF0000u)
  19043. #define CSL_CPINTC_HINT_MAP_REG33_HINT_MAP_134_SHIFT (0x00000010u)
  19044. #define CSL_CPINTC_HINT_MAP_REG33_HINT_MAP_134_RESETVAL (0x00000000u)
  19045. #define CSL_CPINTC_HINT_MAP_REG33_HINT_MAP_135_MASK (0xFF000000u)
  19046. #define CSL_CPINTC_HINT_MAP_REG33_HINT_MAP_135_SHIFT (0x00000018u)
  19047. #define CSL_CPINTC_HINT_MAP_REG33_HINT_MAP_135_RESETVAL (0x00000000u)
  19048. #define CSL_CPINTC_HINT_MAP_REG33_RESETVAL (0x00000000u)
  19049. /* hint_map_reg34 */
  19050. #define CSL_CPINTC_HINT_MAP_REG34_HINT_MAP_136_MASK (0x000000FFu)
  19051. #define CSL_CPINTC_HINT_MAP_REG34_HINT_MAP_136_SHIFT (0x00000000u)
  19052. #define CSL_CPINTC_HINT_MAP_REG34_HINT_MAP_136_RESETVAL (0x00000000u)
  19053. #define CSL_CPINTC_HINT_MAP_REG34_HINT_MAP_137_MASK (0x0000FF00u)
  19054. #define CSL_CPINTC_HINT_MAP_REG34_HINT_MAP_137_SHIFT (0x00000008u)
  19055. #define CSL_CPINTC_HINT_MAP_REG34_HINT_MAP_137_RESETVAL (0x00000000u)
  19056. #define CSL_CPINTC_HINT_MAP_REG34_HINT_MAP_138_MASK (0x00FF0000u)
  19057. #define CSL_CPINTC_HINT_MAP_REG34_HINT_MAP_138_SHIFT (0x00000010u)
  19058. #define CSL_CPINTC_HINT_MAP_REG34_HINT_MAP_138_RESETVAL (0x00000000u)
  19059. #define CSL_CPINTC_HINT_MAP_REG34_HINT_MAP_139_MASK (0xFF000000u)
  19060. #define CSL_CPINTC_HINT_MAP_REG34_HINT_MAP_139_SHIFT (0x00000018u)
  19061. #define CSL_CPINTC_HINT_MAP_REG34_HINT_MAP_139_RESETVAL (0x00000000u)
  19062. #define CSL_CPINTC_HINT_MAP_REG34_RESETVAL (0x00000000u)
  19063. /* hint_map_reg35 */
  19064. #define CSL_CPINTC_HINT_MAP_REG35_HINT_MAP_140_MASK (0x000000FFu)
  19065. #define CSL_CPINTC_HINT_MAP_REG35_HINT_MAP_140_SHIFT (0x00000000u)
  19066. #define CSL_CPINTC_HINT_MAP_REG35_HINT_MAP_140_RESETVAL (0x00000000u)
  19067. #define CSL_CPINTC_HINT_MAP_REG35_HINT_MAP_141_MASK (0x0000FF00u)
  19068. #define CSL_CPINTC_HINT_MAP_REG35_HINT_MAP_141_SHIFT (0x00000008u)
  19069. #define CSL_CPINTC_HINT_MAP_REG35_HINT_MAP_141_RESETVAL (0x00000000u)
  19070. #define CSL_CPINTC_HINT_MAP_REG35_HINT_MAP_142_MASK (0x00FF0000u)
  19071. #define CSL_CPINTC_HINT_MAP_REG35_HINT_MAP_142_SHIFT (0x00000010u)
  19072. #define CSL_CPINTC_HINT_MAP_REG35_HINT_MAP_142_RESETVAL (0x00000000u)
  19073. #define CSL_CPINTC_HINT_MAP_REG35_HINT_MAP_143_MASK (0xFF000000u)
  19074. #define CSL_CPINTC_HINT_MAP_REG35_HINT_MAP_143_SHIFT (0x00000018u)
  19075. #define CSL_CPINTC_HINT_MAP_REG35_HINT_MAP_143_RESETVAL (0x00000000u)
  19076. #define CSL_CPINTC_HINT_MAP_REG35_RESETVAL (0x00000000u)
  19077. /* hint_map_reg36 */
  19078. #define CSL_CPINTC_HINT_MAP_REG36_HINT_MAP_144_MASK (0x000000FFu)
  19079. #define CSL_CPINTC_HINT_MAP_REG36_HINT_MAP_144_SHIFT (0x00000000u)
  19080. #define CSL_CPINTC_HINT_MAP_REG36_HINT_MAP_144_RESETVAL (0x00000000u)
  19081. #define CSL_CPINTC_HINT_MAP_REG36_HINT_MAP_145_MASK (0x0000FF00u)
  19082. #define CSL_CPINTC_HINT_MAP_REG36_HINT_MAP_145_SHIFT (0x00000008u)
  19083. #define CSL_CPINTC_HINT_MAP_REG36_HINT_MAP_145_RESETVAL (0x00000000u)
  19084. #define CSL_CPINTC_HINT_MAP_REG36_HINT_MAP_146_MASK (0x00FF0000u)
  19085. #define CSL_CPINTC_HINT_MAP_REG36_HINT_MAP_146_SHIFT (0x00000010u)
  19086. #define CSL_CPINTC_HINT_MAP_REG36_HINT_MAP_146_RESETVAL (0x00000000u)
  19087. #define CSL_CPINTC_HINT_MAP_REG36_HINT_MAP_147_MASK (0xFF000000u)
  19088. #define CSL_CPINTC_HINT_MAP_REG36_HINT_MAP_147_SHIFT (0x00000018u)
  19089. #define CSL_CPINTC_HINT_MAP_REG36_HINT_MAP_147_RESETVAL (0x00000000u)
  19090. #define CSL_CPINTC_HINT_MAP_REG36_RESETVAL (0x00000000u)
  19091. /* hint_map_reg37 */
  19092. #define CSL_CPINTC_HINT_MAP_REG37_HINT_MAP_148_MASK (0x000000FFu)
  19093. #define CSL_CPINTC_HINT_MAP_REG37_HINT_MAP_148_SHIFT (0x00000000u)
  19094. #define CSL_CPINTC_HINT_MAP_REG37_HINT_MAP_148_RESETVAL (0x00000000u)
  19095. #define CSL_CPINTC_HINT_MAP_REG37_HINT_MAP_149_MASK (0x0000FF00u)
  19096. #define CSL_CPINTC_HINT_MAP_REG37_HINT_MAP_149_SHIFT (0x00000008u)
  19097. #define CSL_CPINTC_HINT_MAP_REG37_HINT_MAP_149_RESETVAL (0x00000000u)
  19098. #define CSL_CPINTC_HINT_MAP_REG37_HINT_MAP_150_MASK (0x00FF0000u)
  19099. #define CSL_CPINTC_HINT_MAP_REG37_HINT_MAP_150_SHIFT (0x00000010u)
  19100. #define CSL_CPINTC_HINT_MAP_REG37_HINT_MAP_150_RESETVAL (0x00000000u)
  19101. #define CSL_CPINTC_HINT_MAP_REG37_HINT_MAP_151_MASK (0xFF000000u)
  19102. #define CSL_CPINTC_HINT_MAP_REG37_HINT_MAP_151_SHIFT (0x00000018u)
  19103. #define CSL_CPINTC_HINT_MAP_REG37_HINT_MAP_151_RESETVAL (0x00000000u)
  19104. #define CSL_CPINTC_HINT_MAP_REG37_RESETVAL (0x00000000u)
  19105. /* hint_map_reg38 */
  19106. #define CSL_CPINTC_HINT_MAP_REG38_HINT_MAP_152_MASK (0x000000FFu)
  19107. #define CSL_CPINTC_HINT_MAP_REG38_HINT_MAP_152_SHIFT (0x00000000u)
  19108. #define CSL_CPINTC_HINT_MAP_REG38_HINT_MAP_152_RESETVAL (0x00000000u)
  19109. #define CSL_CPINTC_HINT_MAP_REG38_HINT_MAP_153_MASK (0x0000FF00u)
  19110. #define CSL_CPINTC_HINT_MAP_REG38_HINT_MAP_153_SHIFT (0x00000008u)
  19111. #define CSL_CPINTC_HINT_MAP_REG38_HINT_MAP_153_RESETVAL (0x00000000u)
  19112. #define CSL_CPINTC_HINT_MAP_REG38_HINT_MAP_154_MASK (0x00FF0000u)
  19113. #define CSL_CPINTC_HINT_MAP_REG38_HINT_MAP_154_SHIFT (0x00000010u)
  19114. #define CSL_CPINTC_HINT_MAP_REG38_HINT_MAP_154_RESETVAL (0x00000000u)
  19115. #define CSL_CPINTC_HINT_MAP_REG38_HINT_MAP_155_MASK (0xFF000000u)
  19116. #define CSL_CPINTC_HINT_MAP_REG38_HINT_MAP_155_SHIFT (0x00000018u)
  19117. #define CSL_CPINTC_HINT_MAP_REG38_HINT_MAP_155_RESETVAL (0x00000000u)
  19118. #define CSL_CPINTC_HINT_MAP_REG38_RESETVAL (0x00000000u)
  19119. /* hint_map_reg39 */
  19120. #define CSL_CPINTC_HINT_MAP_REG39_HINT_MAP_156_MASK (0x000000FFu)
  19121. #define CSL_CPINTC_HINT_MAP_REG39_HINT_MAP_156_SHIFT (0x00000000u)
  19122. #define CSL_CPINTC_HINT_MAP_REG39_HINT_MAP_156_RESETVAL (0x00000000u)
  19123. #define CSL_CPINTC_HINT_MAP_REG39_HINT_MAP_157_MASK (0x0000FF00u)
  19124. #define CSL_CPINTC_HINT_MAP_REG39_HINT_MAP_157_SHIFT (0x00000008u)
  19125. #define CSL_CPINTC_HINT_MAP_REG39_HINT_MAP_157_RESETVAL (0x00000000u)
  19126. #define CSL_CPINTC_HINT_MAP_REG39_HINT_MAP_158_MASK (0x00FF0000u)
  19127. #define CSL_CPINTC_HINT_MAP_REG39_HINT_MAP_158_SHIFT (0x00000010u)
  19128. #define CSL_CPINTC_HINT_MAP_REG39_HINT_MAP_158_RESETVAL (0x00000000u)
  19129. #define CSL_CPINTC_HINT_MAP_REG39_HINT_MAP_159_MASK (0xFF000000u)
  19130. #define CSL_CPINTC_HINT_MAP_REG39_HINT_MAP_159_SHIFT (0x00000018u)
  19131. #define CSL_CPINTC_HINT_MAP_REG39_HINT_MAP_159_RESETVAL (0x00000000u)
  19132. #define CSL_CPINTC_HINT_MAP_REG39_RESETVAL (0x00000000u)
  19133. /* hint_map_reg40 */
  19134. #define CSL_CPINTC_HINT_MAP_REG40_HINT_MAP_160_MASK (0x000000FFu)
  19135. #define CSL_CPINTC_HINT_MAP_REG40_HINT_MAP_160_SHIFT (0x00000000u)
  19136. #define CSL_CPINTC_HINT_MAP_REG40_HINT_MAP_160_RESETVAL (0x00000000u)
  19137. #define CSL_CPINTC_HINT_MAP_REG40_HINT_MAP_161_MASK (0x0000FF00u)
  19138. #define CSL_CPINTC_HINT_MAP_REG40_HINT_MAP_161_SHIFT (0x00000008u)
  19139. #define CSL_CPINTC_HINT_MAP_REG40_HINT_MAP_161_RESETVAL (0x00000000u)
  19140. #define CSL_CPINTC_HINT_MAP_REG40_HINT_MAP_162_MASK (0x00FF0000u)
  19141. #define CSL_CPINTC_HINT_MAP_REG40_HINT_MAP_162_SHIFT (0x00000010u)
  19142. #define CSL_CPINTC_HINT_MAP_REG40_HINT_MAP_162_RESETVAL (0x00000000u)
  19143. #define CSL_CPINTC_HINT_MAP_REG40_HINT_MAP_163_MASK (0xFF000000u)
  19144. #define CSL_CPINTC_HINT_MAP_REG40_HINT_MAP_163_SHIFT (0x00000018u)
  19145. #define CSL_CPINTC_HINT_MAP_REG40_HINT_MAP_163_RESETVAL (0x00000000u)
  19146. #define CSL_CPINTC_HINT_MAP_REG40_RESETVAL (0x00000000u)
  19147. /* hint_map_reg41 */
  19148. #define CSL_CPINTC_HINT_MAP_REG41_HINT_MAP_164_MASK (0x000000FFu)
  19149. #define CSL_CPINTC_HINT_MAP_REG41_HINT_MAP_164_SHIFT (0x00000000u)
  19150. #define CSL_CPINTC_HINT_MAP_REG41_HINT_MAP_164_RESETVAL (0x00000000u)
  19151. #define CSL_CPINTC_HINT_MAP_REG41_HINT_MAP_165_MASK (0x0000FF00u)
  19152. #define CSL_CPINTC_HINT_MAP_REG41_HINT_MAP_165_SHIFT (0x00000008u)
  19153. #define CSL_CPINTC_HINT_MAP_REG41_HINT_MAP_165_RESETVAL (0x00000000u)
  19154. #define CSL_CPINTC_HINT_MAP_REG41_HINT_MAP_166_MASK (0x00FF0000u)
  19155. #define CSL_CPINTC_HINT_MAP_REG41_HINT_MAP_166_SHIFT (0x00000010u)
  19156. #define CSL_CPINTC_HINT_MAP_REG41_HINT_MAP_166_RESETVAL (0x00000000u)
  19157. #define CSL_CPINTC_HINT_MAP_REG41_HINT_MAP_167_MASK (0xFF000000u)
  19158. #define CSL_CPINTC_HINT_MAP_REG41_HINT_MAP_167_SHIFT (0x00000018u)
  19159. #define CSL_CPINTC_HINT_MAP_REG41_HINT_MAP_167_RESETVAL (0x00000000u)
  19160. #define CSL_CPINTC_HINT_MAP_REG41_RESETVAL (0x00000000u)
  19161. /* hint_map_reg42 */
  19162. #define CSL_CPINTC_HINT_MAP_REG42_HINT_MAP_168_MASK (0x000000FFu)
  19163. #define CSL_CPINTC_HINT_MAP_REG42_HINT_MAP_168_SHIFT (0x00000000u)
  19164. #define CSL_CPINTC_HINT_MAP_REG42_HINT_MAP_168_RESETVAL (0x00000000u)
  19165. #define CSL_CPINTC_HINT_MAP_REG42_HINT_MAP_169_MASK (0x0000FF00u)
  19166. #define CSL_CPINTC_HINT_MAP_REG42_HINT_MAP_169_SHIFT (0x00000008u)
  19167. #define CSL_CPINTC_HINT_MAP_REG42_HINT_MAP_169_RESETVAL (0x00000000u)
  19168. #define CSL_CPINTC_HINT_MAP_REG42_HINT_MAP_170_MASK (0x00FF0000u)
  19169. #define CSL_CPINTC_HINT_MAP_REG42_HINT_MAP_170_SHIFT (0x00000010u)
  19170. #define CSL_CPINTC_HINT_MAP_REG42_HINT_MAP_170_RESETVAL (0x00000000u)
  19171. #define CSL_CPINTC_HINT_MAP_REG42_HINT_MAP_171_MASK (0xFF000000u)
  19172. #define CSL_CPINTC_HINT_MAP_REG42_HINT_MAP_171_SHIFT (0x00000018u)
  19173. #define CSL_CPINTC_HINT_MAP_REG42_HINT_MAP_171_RESETVAL (0x00000000u)
  19174. #define CSL_CPINTC_HINT_MAP_REG42_RESETVAL (0x00000000u)
  19175. /* hint_map_reg43 */
  19176. #define CSL_CPINTC_HINT_MAP_REG43_HINT_MAP_172_MASK (0x000000FFu)
  19177. #define CSL_CPINTC_HINT_MAP_REG43_HINT_MAP_172_SHIFT (0x00000000u)
  19178. #define CSL_CPINTC_HINT_MAP_REG43_HINT_MAP_172_RESETVAL (0x00000000u)
  19179. #define CSL_CPINTC_HINT_MAP_REG43_HINT_MAP_173_MASK (0x0000FF00u)
  19180. #define CSL_CPINTC_HINT_MAP_REG43_HINT_MAP_173_SHIFT (0x00000008u)
  19181. #define CSL_CPINTC_HINT_MAP_REG43_HINT_MAP_173_RESETVAL (0x00000000u)
  19182. #define CSL_CPINTC_HINT_MAP_REG43_HINT_MAP_174_MASK (0x00FF0000u)
  19183. #define CSL_CPINTC_HINT_MAP_REG43_HINT_MAP_174_SHIFT (0x00000010u)
  19184. #define CSL_CPINTC_HINT_MAP_REG43_HINT_MAP_174_RESETVAL (0x00000000u)
  19185. #define CSL_CPINTC_HINT_MAP_REG43_HINT_MAP_175_MASK (0xFF000000u)
  19186. #define CSL_CPINTC_HINT_MAP_REG43_HINT_MAP_175_SHIFT (0x00000018u)
  19187. #define CSL_CPINTC_HINT_MAP_REG43_HINT_MAP_175_RESETVAL (0x00000000u)
  19188. #define CSL_CPINTC_HINT_MAP_REG43_RESETVAL (0x00000000u)
  19189. /* hint_map_reg44 */
  19190. #define CSL_CPINTC_HINT_MAP_REG44_HINT_MAP_176_MASK (0x000000FFu)
  19191. #define CSL_CPINTC_HINT_MAP_REG44_HINT_MAP_176_SHIFT (0x00000000u)
  19192. #define CSL_CPINTC_HINT_MAP_REG44_HINT_MAP_176_RESETVAL (0x00000000u)
  19193. #define CSL_CPINTC_HINT_MAP_REG44_HINT_MAP_177_MASK (0x0000FF00u)
  19194. #define CSL_CPINTC_HINT_MAP_REG44_HINT_MAP_177_SHIFT (0x00000008u)
  19195. #define CSL_CPINTC_HINT_MAP_REG44_HINT_MAP_177_RESETVAL (0x00000000u)
  19196. #define CSL_CPINTC_HINT_MAP_REG44_HINT_MAP_178_MASK (0x00FF0000u)
  19197. #define CSL_CPINTC_HINT_MAP_REG44_HINT_MAP_178_SHIFT (0x00000010u)
  19198. #define CSL_CPINTC_HINT_MAP_REG44_HINT_MAP_178_RESETVAL (0x00000000u)
  19199. #define CSL_CPINTC_HINT_MAP_REG44_HINT_MAP_179_MASK (0xFF000000u)
  19200. #define CSL_CPINTC_HINT_MAP_REG44_HINT_MAP_179_SHIFT (0x00000018u)
  19201. #define CSL_CPINTC_HINT_MAP_REG44_HINT_MAP_179_RESETVAL (0x00000000u)
  19202. #define CSL_CPINTC_HINT_MAP_REG44_RESETVAL (0x00000000u)
  19203. /* hint_map_reg45 */
  19204. #define CSL_CPINTC_HINT_MAP_REG45_HINT_MAP_180_MASK (0x000000FFu)
  19205. #define CSL_CPINTC_HINT_MAP_REG45_HINT_MAP_180_SHIFT (0x00000000u)
  19206. #define CSL_CPINTC_HINT_MAP_REG45_HINT_MAP_180_RESETVAL (0x00000000u)
  19207. #define CSL_CPINTC_HINT_MAP_REG45_HINT_MAP_181_MASK (0x0000FF00u)
  19208. #define CSL_CPINTC_HINT_MAP_REG45_HINT_MAP_181_SHIFT (0x00000008u)
  19209. #define CSL_CPINTC_HINT_MAP_REG45_HINT_MAP_181_RESETVAL (0x00000000u)
  19210. #define CSL_CPINTC_HINT_MAP_REG45_HINT_MAP_182_MASK (0x00FF0000u)
  19211. #define CSL_CPINTC_HINT_MAP_REG45_HINT_MAP_182_SHIFT (0x00000010u)
  19212. #define CSL_CPINTC_HINT_MAP_REG45_HINT_MAP_182_RESETVAL (0x00000000u)
  19213. #define CSL_CPINTC_HINT_MAP_REG45_HINT_MAP_183_MASK (0xFF000000u)
  19214. #define CSL_CPINTC_HINT_MAP_REG45_HINT_MAP_183_SHIFT (0x00000018u)
  19215. #define CSL_CPINTC_HINT_MAP_REG45_HINT_MAP_183_RESETVAL (0x00000000u)
  19216. #define CSL_CPINTC_HINT_MAP_REG45_RESETVAL (0x00000000u)
  19217. /* hint_map_reg46 */
  19218. #define CSL_CPINTC_HINT_MAP_REG46_HINT_MAP_184_MASK (0x000000FFu)
  19219. #define CSL_CPINTC_HINT_MAP_REG46_HINT_MAP_184_SHIFT (0x00000000u)
  19220. #define CSL_CPINTC_HINT_MAP_REG46_HINT_MAP_184_RESETVAL (0x00000000u)
  19221. #define CSL_CPINTC_HINT_MAP_REG46_HINT_MAP_185_MASK (0x0000FF00u)
  19222. #define CSL_CPINTC_HINT_MAP_REG46_HINT_MAP_185_SHIFT (0x00000008u)
  19223. #define CSL_CPINTC_HINT_MAP_REG46_HINT_MAP_185_RESETVAL (0x00000000u)
  19224. #define CSL_CPINTC_HINT_MAP_REG46_HINT_MAP_186_MASK (0x00FF0000u)
  19225. #define CSL_CPINTC_HINT_MAP_REG46_HINT_MAP_186_SHIFT (0x00000010u)
  19226. #define CSL_CPINTC_HINT_MAP_REG46_HINT_MAP_186_RESETVAL (0x00000000u)
  19227. #define CSL_CPINTC_HINT_MAP_REG46_HINT_MAP_187_MASK (0xFF000000u)
  19228. #define CSL_CPINTC_HINT_MAP_REG46_HINT_MAP_187_SHIFT (0x00000018u)
  19229. #define CSL_CPINTC_HINT_MAP_REG46_HINT_MAP_187_RESETVAL (0x00000000u)
  19230. #define CSL_CPINTC_HINT_MAP_REG46_RESETVAL (0x00000000u)
  19231. /* hint_map_reg47 */
  19232. #define CSL_CPINTC_HINT_MAP_REG47_HINT_MAP_188_MASK (0x000000FFu)
  19233. #define CSL_CPINTC_HINT_MAP_REG47_HINT_MAP_188_SHIFT (0x00000000u)
  19234. #define CSL_CPINTC_HINT_MAP_REG47_HINT_MAP_188_RESETVAL (0x00000000u)
  19235. #define CSL_CPINTC_HINT_MAP_REG47_HINT_MAP_189_MASK (0x0000FF00u)
  19236. #define CSL_CPINTC_HINT_MAP_REG47_HINT_MAP_189_SHIFT (0x00000008u)
  19237. #define CSL_CPINTC_HINT_MAP_REG47_HINT_MAP_189_RESETVAL (0x00000000u)
  19238. #define CSL_CPINTC_HINT_MAP_REG47_HINT_MAP_190_MASK (0x00FF0000u)
  19239. #define CSL_CPINTC_HINT_MAP_REG47_HINT_MAP_190_SHIFT (0x00000010u)
  19240. #define CSL_CPINTC_HINT_MAP_REG47_HINT_MAP_190_RESETVAL (0x00000000u)
  19241. #define CSL_CPINTC_HINT_MAP_REG47_HINT_MAP_191_MASK (0xFF000000u)
  19242. #define CSL_CPINTC_HINT_MAP_REG47_HINT_MAP_191_SHIFT (0x00000018u)
  19243. #define CSL_CPINTC_HINT_MAP_REG47_HINT_MAP_191_RESETVAL (0x00000000u)
  19244. #define CSL_CPINTC_HINT_MAP_REG47_RESETVAL (0x00000000u)
  19245. /* hint_map_reg48 */
  19246. #define CSL_CPINTC_HINT_MAP_REG48_HINT_MAP_192_MASK (0x000000FFu)
  19247. #define CSL_CPINTC_HINT_MAP_REG48_HINT_MAP_192_SHIFT (0x00000000u)
  19248. #define CSL_CPINTC_HINT_MAP_REG48_HINT_MAP_192_RESETVAL (0x00000000u)
  19249. #define CSL_CPINTC_HINT_MAP_REG48_HINT_MAP_193_MASK (0x0000FF00u)
  19250. #define CSL_CPINTC_HINT_MAP_REG48_HINT_MAP_193_SHIFT (0x00000008u)
  19251. #define CSL_CPINTC_HINT_MAP_REG48_HINT_MAP_193_RESETVAL (0x00000000u)
  19252. #define CSL_CPINTC_HINT_MAP_REG48_HINT_MAP_194_MASK (0x00FF0000u)
  19253. #define CSL_CPINTC_HINT_MAP_REG48_HINT_MAP_194_SHIFT (0x00000010u)
  19254. #define CSL_CPINTC_HINT_MAP_REG48_HINT_MAP_194_RESETVAL (0x00000000u)
  19255. #define CSL_CPINTC_HINT_MAP_REG48_HINT_MAP_195_MASK (0xFF000000u)
  19256. #define CSL_CPINTC_HINT_MAP_REG48_HINT_MAP_195_SHIFT (0x00000018u)
  19257. #define CSL_CPINTC_HINT_MAP_REG48_HINT_MAP_195_RESETVAL (0x00000000u)
  19258. #define CSL_CPINTC_HINT_MAP_REG48_RESETVAL (0x00000000u)
  19259. /* hint_map_reg49 */
  19260. #define CSL_CPINTC_HINT_MAP_REG49_HINT_MAP_196_MASK (0x000000FFu)
  19261. #define CSL_CPINTC_HINT_MAP_REG49_HINT_MAP_196_SHIFT (0x00000000u)
  19262. #define CSL_CPINTC_HINT_MAP_REG49_HINT_MAP_196_RESETVAL (0x00000000u)
  19263. #define CSL_CPINTC_HINT_MAP_REG49_HINT_MAP_197_MASK (0x0000FF00u)
  19264. #define CSL_CPINTC_HINT_MAP_REG49_HINT_MAP_197_SHIFT (0x00000008u)
  19265. #define CSL_CPINTC_HINT_MAP_REG49_HINT_MAP_197_RESETVAL (0x00000000u)
  19266. #define CSL_CPINTC_HINT_MAP_REG49_HINT_MAP_198_MASK (0x00FF0000u)
  19267. #define CSL_CPINTC_HINT_MAP_REG49_HINT_MAP_198_SHIFT (0x00000010u)
  19268. #define CSL_CPINTC_HINT_MAP_REG49_HINT_MAP_198_RESETVAL (0x00000000u)
  19269. #define CSL_CPINTC_HINT_MAP_REG49_HINT_MAP_199_MASK (0xFF000000u)
  19270. #define CSL_CPINTC_HINT_MAP_REG49_HINT_MAP_199_SHIFT (0x00000018u)
  19271. #define CSL_CPINTC_HINT_MAP_REG49_HINT_MAP_199_RESETVAL (0x00000000u)
  19272. #define CSL_CPINTC_HINT_MAP_REG49_RESETVAL (0x00000000u)
  19273. /* hint_map_reg50 */
  19274. #define CSL_CPINTC_HINT_MAP_REG50_HINT_MAP_200_MASK (0x000000FFu)
  19275. #define CSL_CPINTC_HINT_MAP_REG50_HINT_MAP_200_SHIFT (0x00000000u)
  19276. #define CSL_CPINTC_HINT_MAP_REG50_HINT_MAP_200_RESETVAL (0x00000000u)
  19277. #define CSL_CPINTC_HINT_MAP_REG50_HINT_MAP_201_MASK (0x0000FF00u)
  19278. #define CSL_CPINTC_HINT_MAP_REG50_HINT_MAP_201_SHIFT (0x00000008u)
  19279. #define CSL_CPINTC_HINT_MAP_REG50_HINT_MAP_201_RESETVAL (0x00000000u)
  19280. #define CSL_CPINTC_HINT_MAP_REG50_HINT_MAP_202_MASK (0x00FF0000u)
  19281. #define CSL_CPINTC_HINT_MAP_REG50_HINT_MAP_202_SHIFT (0x00000010u)
  19282. #define CSL_CPINTC_HINT_MAP_REG50_HINT_MAP_202_RESETVAL (0x00000000u)
  19283. #define CSL_CPINTC_HINT_MAP_REG50_HINT_MAP_203_MASK (0xFF000000u)
  19284. #define CSL_CPINTC_HINT_MAP_REG50_HINT_MAP_203_SHIFT (0x00000018u)
  19285. #define CSL_CPINTC_HINT_MAP_REG50_HINT_MAP_203_RESETVAL (0x00000000u)
  19286. #define CSL_CPINTC_HINT_MAP_REG50_RESETVAL (0x00000000u)
  19287. /* hint_map_reg51 */
  19288. #define CSL_CPINTC_HINT_MAP_REG51_HINT_MAP_204_MASK (0x000000FFu)
  19289. #define CSL_CPINTC_HINT_MAP_REG51_HINT_MAP_204_SHIFT (0x00000000u)
  19290. #define CSL_CPINTC_HINT_MAP_REG51_HINT_MAP_204_RESETVAL (0x00000000u)
  19291. #define CSL_CPINTC_HINT_MAP_REG51_HINT_MAP_205_MASK (0x0000FF00u)
  19292. #define CSL_CPINTC_HINT_MAP_REG51_HINT_MAP_205_SHIFT (0x00000008u)
  19293. #define CSL_CPINTC_HINT_MAP_REG51_HINT_MAP_205_RESETVAL (0x00000000u)
  19294. #define CSL_CPINTC_HINT_MAP_REG51_HINT_MAP_206_MASK (0x00FF0000u)
  19295. #define CSL_CPINTC_HINT_MAP_REG51_HINT_MAP_206_SHIFT (0x00000010u)
  19296. #define CSL_CPINTC_HINT_MAP_REG51_HINT_MAP_206_RESETVAL (0x00000000u)
  19297. #define CSL_CPINTC_HINT_MAP_REG51_HINT_MAP_207_MASK (0xFF000000u)
  19298. #define CSL_CPINTC_HINT_MAP_REG51_HINT_MAP_207_SHIFT (0x00000018u)
  19299. #define CSL_CPINTC_HINT_MAP_REG51_HINT_MAP_207_RESETVAL (0x00000000u)
  19300. #define CSL_CPINTC_HINT_MAP_REG51_RESETVAL (0x00000000u)
  19301. /* hint_map_reg52 */
  19302. #define CSL_CPINTC_HINT_MAP_REG52_HINT_MAP_208_MASK (0x000000FFu)
  19303. #define CSL_CPINTC_HINT_MAP_REG52_HINT_MAP_208_SHIFT (0x00000000u)
  19304. #define CSL_CPINTC_HINT_MAP_REG52_HINT_MAP_208_RESETVAL (0x00000000u)
  19305. #define CSL_CPINTC_HINT_MAP_REG52_HINT_MAP_209_MASK (0x0000FF00u)
  19306. #define CSL_CPINTC_HINT_MAP_REG52_HINT_MAP_209_SHIFT (0x00000008u)
  19307. #define CSL_CPINTC_HINT_MAP_REG52_HINT_MAP_209_RESETVAL (0x00000000u)
  19308. #define CSL_CPINTC_HINT_MAP_REG52_HINT_MAP_210_MASK (0x00FF0000u)
  19309. #define CSL_CPINTC_HINT_MAP_REG52_HINT_MAP_210_SHIFT (0x00000010u)
  19310. #define CSL_CPINTC_HINT_MAP_REG52_HINT_MAP_210_RESETVAL (0x00000000u)
  19311. #define CSL_CPINTC_HINT_MAP_REG52_HINT_MAP_211_MASK (0xFF000000u)
  19312. #define CSL_CPINTC_HINT_MAP_REG52_HINT_MAP_211_SHIFT (0x00000018u)
  19313. #define CSL_CPINTC_HINT_MAP_REG52_HINT_MAP_211_RESETVAL (0x00000000u)
  19314. #define CSL_CPINTC_HINT_MAP_REG52_RESETVAL (0x00000000u)
  19315. /* hint_map_reg53 */
  19316. #define CSL_CPINTC_HINT_MAP_REG53_HINT_MAP_212_MASK (0x000000FFu)
  19317. #define CSL_CPINTC_HINT_MAP_REG53_HINT_MAP_212_SHIFT (0x00000000u)
  19318. #define CSL_CPINTC_HINT_MAP_REG53_HINT_MAP_212_RESETVAL (0x00000000u)
  19319. #define CSL_CPINTC_HINT_MAP_REG53_HINT_MAP_213_MASK (0x0000FF00u)
  19320. #define CSL_CPINTC_HINT_MAP_REG53_HINT_MAP_213_SHIFT (0x00000008u)
  19321. #define CSL_CPINTC_HINT_MAP_REG53_HINT_MAP_213_RESETVAL (0x00000000u)
  19322. #define CSL_CPINTC_HINT_MAP_REG53_HINT_MAP_214_MASK (0x00FF0000u)
  19323. #define CSL_CPINTC_HINT_MAP_REG53_HINT_MAP_214_SHIFT (0x00000010u)
  19324. #define CSL_CPINTC_HINT_MAP_REG53_HINT_MAP_214_RESETVAL (0x00000000u)
  19325. #define CSL_CPINTC_HINT_MAP_REG53_HINT_MAP_215_MASK (0xFF000000u)
  19326. #define CSL_CPINTC_HINT_MAP_REG53_HINT_MAP_215_SHIFT (0x00000018u)
  19327. #define CSL_CPINTC_HINT_MAP_REG53_HINT_MAP_215_RESETVAL (0x00000000u)
  19328. #define CSL_CPINTC_HINT_MAP_REG53_RESETVAL (0x00000000u)
  19329. /* hint_map_reg54 */
  19330. #define CSL_CPINTC_HINT_MAP_REG54_HINT_MAP_216_MASK (0x000000FFu)
  19331. #define CSL_CPINTC_HINT_MAP_REG54_HINT_MAP_216_SHIFT (0x00000000u)
  19332. #define CSL_CPINTC_HINT_MAP_REG54_HINT_MAP_216_RESETVAL (0x00000000u)
  19333. #define CSL_CPINTC_HINT_MAP_REG54_HINT_MAP_217_MASK (0x0000FF00u)
  19334. #define CSL_CPINTC_HINT_MAP_REG54_HINT_MAP_217_SHIFT (0x00000008u)
  19335. #define CSL_CPINTC_HINT_MAP_REG54_HINT_MAP_217_RESETVAL (0x00000000u)
  19336. #define CSL_CPINTC_HINT_MAP_REG54_HINT_MAP_218_MASK (0x00FF0000u)
  19337. #define CSL_CPINTC_HINT_MAP_REG54_HINT_MAP_218_SHIFT (0x00000010u)
  19338. #define CSL_CPINTC_HINT_MAP_REG54_HINT_MAP_218_RESETVAL (0x00000000u)
  19339. #define CSL_CPINTC_HINT_MAP_REG54_HINT_MAP_219_MASK (0xFF000000u)
  19340. #define CSL_CPINTC_HINT_MAP_REG54_HINT_MAP_219_SHIFT (0x00000018u)
  19341. #define CSL_CPINTC_HINT_MAP_REG54_HINT_MAP_219_RESETVAL (0x00000000u)
  19342. #define CSL_CPINTC_HINT_MAP_REG54_RESETVAL (0x00000000u)
  19343. /* hint_map_reg55 */
  19344. #define CSL_CPINTC_HINT_MAP_REG55_HINT_MAP_220_MASK (0x000000FFu)
  19345. #define CSL_CPINTC_HINT_MAP_REG55_HINT_MAP_220_SHIFT (0x00000000u)
  19346. #define CSL_CPINTC_HINT_MAP_REG55_HINT_MAP_220_RESETVAL (0x00000000u)
  19347. #define CSL_CPINTC_HINT_MAP_REG55_HINT_MAP_221_MASK (0x0000FF00u)
  19348. #define CSL_CPINTC_HINT_MAP_REG55_HINT_MAP_221_SHIFT (0x00000008u)
  19349. #define CSL_CPINTC_HINT_MAP_REG55_HINT_MAP_221_RESETVAL (0x00000000u)
  19350. #define CSL_CPINTC_HINT_MAP_REG55_HINT_MAP_222_MASK (0x00FF0000u)
  19351. #define CSL_CPINTC_HINT_MAP_REG55_HINT_MAP_222_SHIFT (0x00000010u)
  19352. #define CSL_CPINTC_HINT_MAP_REG55_HINT_MAP_222_RESETVAL (0x00000000u)
  19353. #define CSL_CPINTC_HINT_MAP_REG55_HINT_MAP_223_MASK (0xFF000000u)
  19354. #define CSL_CPINTC_HINT_MAP_REG55_HINT_MAP_223_SHIFT (0x00000018u)
  19355. #define CSL_CPINTC_HINT_MAP_REG55_HINT_MAP_223_RESETVAL (0x00000000u)
  19356. #define CSL_CPINTC_HINT_MAP_REG55_RESETVAL (0x00000000u)
  19357. /* hint_map_reg56 */
  19358. #define CSL_CPINTC_HINT_MAP_REG56_HINT_MAP_224_MASK (0x000000FFu)
  19359. #define CSL_CPINTC_HINT_MAP_REG56_HINT_MAP_224_SHIFT (0x00000000u)
  19360. #define CSL_CPINTC_HINT_MAP_REG56_HINT_MAP_224_RESETVAL (0x00000000u)
  19361. #define CSL_CPINTC_HINT_MAP_REG56_HINT_MAP_225_MASK (0x0000FF00u)
  19362. #define CSL_CPINTC_HINT_MAP_REG56_HINT_MAP_225_SHIFT (0x00000008u)
  19363. #define CSL_CPINTC_HINT_MAP_REG56_HINT_MAP_225_RESETVAL (0x00000000u)
  19364. #define CSL_CPINTC_HINT_MAP_REG56_HINT_MAP_226_MASK (0x00FF0000u)
  19365. #define CSL_CPINTC_HINT_MAP_REG56_HINT_MAP_226_SHIFT (0x00000010u)
  19366. #define CSL_CPINTC_HINT_MAP_REG56_HINT_MAP_226_RESETVAL (0x00000000u)
  19367. #define CSL_CPINTC_HINT_MAP_REG56_HINT_MAP_227_MASK (0xFF000000u)
  19368. #define CSL_CPINTC_HINT_MAP_REG56_HINT_MAP_227_SHIFT (0x00000018u)
  19369. #define CSL_CPINTC_HINT_MAP_REG56_HINT_MAP_227_RESETVAL (0x00000000u)
  19370. #define CSL_CPINTC_HINT_MAP_REG56_RESETVAL (0x00000000u)
  19371. /* hint_map_reg57 */
  19372. #define CSL_CPINTC_HINT_MAP_REG57_HINT_MAP_228_MASK (0x000000FFu)
  19373. #define CSL_CPINTC_HINT_MAP_REG57_HINT_MAP_228_SHIFT (0x00000000u)
  19374. #define CSL_CPINTC_HINT_MAP_REG57_HINT_MAP_228_RESETVAL (0x00000000u)
  19375. #define CSL_CPINTC_HINT_MAP_REG57_HINT_MAP_229_MASK (0x0000FF00u)
  19376. #define CSL_CPINTC_HINT_MAP_REG57_HINT_MAP_229_SHIFT (0x00000008u)
  19377. #define CSL_CPINTC_HINT_MAP_REG57_HINT_MAP_229_RESETVAL (0x00000000u)
  19378. #define CSL_CPINTC_HINT_MAP_REG57_HINT_MAP_230_MASK (0x00FF0000u)
  19379. #define CSL_CPINTC_HINT_MAP_REG57_HINT_MAP_230_SHIFT (0x00000010u)
  19380. #define CSL_CPINTC_HINT_MAP_REG57_HINT_MAP_230_RESETVAL (0x00000000u)
  19381. #define CSL_CPINTC_HINT_MAP_REG57_HINT_MAP_231_MASK (0xFF000000u)
  19382. #define CSL_CPINTC_HINT_MAP_REG57_HINT_MAP_231_SHIFT (0x00000018u)
  19383. #define CSL_CPINTC_HINT_MAP_REG57_HINT_MAP_231_RESETVAL (0x00000000u)
  19384. #define CSL_CPINTC_HINT_MAP_REG57_RESETVAL (0x00000000u)
  19385. /* hint_map_reg58 */
  19386. #define CSL_CPINTC_HINT_MAP_REG58_HINT_MAP_232_MASK (0x000000FFu)
  19387. #define CSL_CPINTC_HINT_MAP_REG58_HINT_MAP_232_SHIFT (0x00000000u)
  19388. #define CSL_CPINTC_HINT_MAP_REG58_HINT_MAP_232_RESETVAL (0x00000000u)
  19389. #define CSL_CPINTC_HINT_MAP_REG58_HINT_MAP_233_MASK (0x0000FF00u)
  19390. #define CSL_CPINTC_HINT_MAP_REG58_HINT_MAP_233_SHIFT (0x00000008u)
  19391. #define CSL_CPINTC_HINT_MAP_REG58_HINT_MAP_233_RESETVAL (0x00000000u)
  19392. #define CSL_CPINTC_HINT_MAP_REG58_HINT_MAP_234_MASK (0x00FF0000u)
  19393. #define CSL_CPINTC_HINT_MAP_REG58_HINT_MAP_234_SHIFT (0x00000010u)
  19394. #define CSL_CPINTC_HINT_MAP_REG58_HINT_MAP_234_RESETVAL (0x00000000u)
  19395. #define CSL_CPINTC_HINT_MAP_REG58_HINT_MAP_235_MASK (0xFF000000u)
  19396. #define CSL_CPINTC_HINT_MAP_REG58_HINT_MAP_235_SHIFT (0x00000018u)
  19397. #define CSL_CPINTC_HINT_MAP_REG58_HINT_MAP_235_RESETVAL (0x00000000u)
  19398. #define CSL_CPINTC_HINT_MAP_REG58_RESETVAL (0x00000000u)
  19399. /* hint_map_reg59 */
  19400. #define CSL_CPINTC_HINT_MAP_REG59_HINT_MAP_236_MASK (0x000000FFu)
  19401. #define CSL_CPINTC_HINT_MAP_REG59_HINT_MAP_236_SHIFT (0x00000000u)
  19402. #define CSL_CPINTC_HINT_MAP_REG59_HINT_MAP_236_RESETVAL (0x00000000u)
  19403. #define CSL_CPINTC_HINT_MAP_REG59_HINT_MAP_237_MASK (0x0000FF00u)
  19404. #define CSL_CPINTC_HINT_MAP_REG59_HINT_MAP_237_SHIFT (0x00000008u)
  19405. #define CSL_CPINTC_HINT_MAP_REG59_HINT_MAP_237_RESETVAL (0x00000000u)
  19406. #define CSL_CPINTC_HINT_MAP_REG59_HINT_MAP_238_MASK (0x00FF0000u)
  19407. #define CSL_CPINTC_HINT_MAP_REG59_HINT_MAP_238_SHIFT (0x00000010u)
  19408. #define CSL_CPINTC_HINT_MAP_REG59_HINT_MAP_238_RESETVAL (0x00000000u)
  19409. #define CSL_CPINTC_HINT_MAP_REG59_HINT_MAP_239_MASK (0xFF000000u)
  19410. #define CSL_CPINTC_HINT_MAP_REG59_HINT_MAP_239_SHIFT (0x00000018u)
  19411. #define CSL_CPINTC_HINT_MAP_REG59_HINT_MAP_239_RESETVAL (0x00000000u)
  19412. #define CSL_CPINTC_HINT_MAP_REG59_RESETVAL (0x00000000u)
  19413. /* hint_map_reg60 */
  19414. #define CSL_CPINTC_HINT_MAP_REG60_HINT_MAP_240_MASK (0x000000FFu)
  19415. #define CSL_CPINTC_HINT_MAP_REG60_HINT_MAP_240_SHIFT (0x00000000u)
  19416. #define CSL_CPINTC_HINT_MAP_REG60_HINT_MAP_240_RESETVAL (0x00000000u)
  19417. #define CSL_CPINTC_HINT_MAP_REG60_HINT_MAP_241_MASK (0x0000FF00u)
  19418. #define CSL_CPINTC_HINT_MAP_REG60_HINT_MAP_241_SHIFT (0x00000008u)
  19419. #define CSL_CPINTC_HINT_MAP_REG60_HINT_MAP_241_RESETVAL (0x00000000u)
  19420. #define CSL_CPINTC_HINT_MAP_REG60_HINT_MAP_242_MASK (0x00FF0000u)
  19421. #define CSL_CPINTC_HINT_MAP_REG60_HINT_MAP_242_SHIFT (0x00000010u)
  19422. #define CSL_CPINTC_HINT_MAP_REG60_HINT_MAP_242_RESETVAL (0x00000000u)
  19423. #define CSL_CPINTC_HINT_MAP_REG60_HINT_MAP_243_MASK (0xFF000000u)
  19424. #define CSL_CPINTC_HINT_MAP_REG60_HINT_MAP_243_SHIFT (0x00000018u)
  19425. #define CSL_CPINTC_HINT_MAP_REG60_HINT_MAP_243_RESETVAL (0x00000000u)
  19426. #define CSL_CPINTC_HINT_MAP_REG60_RESETVAL (0x00000000u)
  19427. /* hint_map_reg61 */
  19428. #define CSL_CPINTC_HINT_MAP_REG61_HINT_MAP_244_MASK (0x000000FFu)
  19429. #define CSL_CPINTC_HINT_MAP_REG61_HINT_MAP_244_SHIFT (0x00000000u)
  19430. #define CSL_CPINTC_HINT_MAP_REG61_HINT_MAP_244_RESETVAL (0x00000000u)
  19431. #define CSL_CPINTC_HINT_MAP_REG61_HINT_MAP_245_MASK (0x0000FF00u)
  19432. #define CSL_CPINTC_HINT_MAP_REG61_HINT_MAP_245_SHIFT (0x00000008u)
  19433. #define CSL_CPINTC_HINT_MAP_REG61_HINT_MAP_245_RESETVAL (0x00000000u)
  19434. #define CSL_CPINTC_HINT_MAP_REG61_HINT_MAP_246_MASK (0x00FF0000u)
  19435. #define CSL_CPINTC_HINT_MAP_REG61_HINT_MAP_246_SHIFT (0x00000010u)
  19436. #define CSL_CPINTC_HINT_MAP_REG61_HINT_MAP_246_RESETVAL (0x00000000u)
  19437. #define CSL_CPINTC_HINT_MAP_REG61_HINT_MAP_247_MASK (0xFF000000u)
  19438. #define CSL_CPINTC_HINT_MAP_REG61_HINT_MAP_247_SHIFT (0x00000018u)
  19439. #define CSL_CPINTC_HINT_MAP_REG61_HINT_MAP_247_RESETVAL (0x00000000u)
  19440. #define CSL_CPINTC_HINT_MAP_REG61_RESETVAL (0x00000000u)
  19441. /* hint_map_reg62 */
  19442. #define CSL_CPINTC_HINT_MAP_REG62_HINT_MAP_248_MASK (0x000000FFu)
  19443. #define CSL_CPINTC_HINT_MAP_REG62_HINT_MAP_248_SHIFT (0x00000000u)
  19444. #define CSL_CPINTC_HINT_MAP_REG62_HINT_MAP_248_RESETVAL (0x00000000u)
  19445. #define CSL_CPINTC_HINT_MAP_REG62_HINT_MAP_249_MASK (0x0000FF00u)
  19446. #define CSL_CPINTC_HINT_MAP_REG62_HINT_MAP_249_SHIFT (0x00000008u)
  19447. #define CSL_CPINTC_HINT_MAP_REG62_HINT_MAP_249_RESETVAL (0x00000000u)
  19448. #define CSL_CPINTC_HINT_MAP_REG62_HINT_MAP_250_MASK (0x00FF0000u)
  19449. #define CSL_CPINTC_HINT_MAP_REG62_HINT_MAP_250_SHIFT (0x00000010u)
  19450. #define CSL_CPINTC_HINT_MAP_REG62_HINT_MAP_250_RESETVAL (0x00000000u)
  19451. #define CSL_CPINTC_HINT_MAP_REG62_HINT_MAP_251_MASK (0xFF000000u)
  19452. #define CSL_CPINTC_HINT_MAP_REG62_HINT_MAP_251_SHIFT (0x00000018u)
  19453. #define CSL_CPINTC_HINT_MAP_REG62_HINT_MAP_251_RESETVAL (0x00000000u)
  19454. #define CSL_CPINTC_HINT_MAP_REG62_RESETVAL (0x00000000u)
  19455. /* hint_map_reg63 */
  19456. #define CSL_CPINTC_HINT_MAP_REG63_HINT_MAP_252_MASK (0x000000FFu)
  19457. #define CSL_CPINTC_HINT_MAP_REG63_HINT_MAP_252_SHIFT (0x00000000u)
  19458. #define CSL_CPINTC_HINT_MAP_REG63_HINT_MAP_252_RESETVAL (0x00000000u)
  19459. #define CSL_CPINTC_HINT_MAP_REG63_HINT_MAP_253_MASK (0x0000FF00u)
  19460. #define CSL_CPINTC_HINT_MAP_REG63_HINT_MAP_253_SHIFT (0x00000008u)
  19461. #define CSL_CPINTC_HINT_MAP_REG63_HINT_MAP_253_RESETVAL (0x00000000u)
  19462. #define CSL_CPINTC_HINT_MAP_REG63_HINT_MAP_254_MASK (0x00FF0000u)
  19463. #define CSL_CPINTC_HINT_MAP_REG63_HINT_MAP_254_SHIFT (0x00000010u)
  19464. #define CSL_CPINTC_HINT_MAP_REG63_HINT_MAP_254_RESETVAL (0x00000000u)
  19465. #define CSL_CPINTC_HINT_MAP_REG63_HINT_MAP_255_MASK (0xFF000000u)
  19466. #define CSL_CPINTC_HINT_MAP_REG63_HINT_MAP_255_SHIFT (0x00000018u)
  19467. #define CSL_CPINTC_HINT_MAP_REG63_HINT_MAP_255_RESETVAL (0x00000000u)
  19468. #define CSL_CPINTC_HINT_MAP_REG63_RESETVAL (0x00000000u)
  19469. /* pri_hint_reg0 */
  19470. #define CSL_CPINTC_PRI_HINT_REG0_PRI_HINT_0_MASK (0x000003FFu)
  19471. #define CSL_CPINTC_PRI_HINT_REG0_PRI_HINT_0_SHIFT (0x00000000u)
  19472. #define CSL_CPINTC_PRI_HINT_REG0_PRI_HINT_0_RESETVAL (0x00000000u)
  19473. #define CSL_CPINTC_PRI_HINT_REG0_NONE_HINT_0_MASK (0x80000000u)
  19474. #define CSL_CPINTC_PRI_HINT_REG0_NONE_HINT_0_SHIFT (0x0000001Fu)
  19475. #define CSL_CPINTC_PRI_HINT_REG0_NONE_HINT_0_RESETVAL (0x00000001u)
  19476. #define CSL_CPINTC_PRI_HINT_REG0_RESETVAL (0x80000000u)
  19477. /* pri_hint_reg1 */
  19478. #define CSL_CPINTC_PRI_HINT_REG1_PRI_HINT_1_MASK (0x000003FFu)
  19479. #define CSL_CPINTC_PRI_HINT_REG1_PRI_HINT_1_SHIFT (0x00000000u)
  19480. #define CSL_CPINTC_PRI_HINT_REG1_PRI_HINT_1_RESETVAL (0x00000000u)
  19481. #define CSL_CPINTC_PRI_HINT_REG1_NONE_HINT_1_MASK (0x80000000u)
  19482. #define CSL_CPINTC_PRI_HINT_REG1_NONE_HINT_1_SHIFT (0x0000001Fu)
  19483. #define CSL_CPINTC_PRI_HINT_REG1_NONE_HINT_1_RESETVAL (0x00000001u)
  19484. #define CSL_CPINTC_PRI_HINT_REG1_RESETVAL (0x80000000u)
  19485. /* pri_hint_reg2 */
  19486. #define CSL_CPINTC_PRI_HINT_REG2_PRI_HINT_2_MASK (0x000003FFu)
  19487. #define CSL_CPINTC_PRI_HINT_REG2_PRI_HINT_2_SHIFT (0x00000000u)
  19488. #define CSL_CPINTC_PRI_HINT_REG2_PRI_HINT_2_RESETVAL (0x00000000u)
  19489. #define CSL_CPINTC_PRI_HINT_REG2_NONE_HINT_2_MASK (0x80000000u)
  19490. #define CSL_CPINTC_PRI_HINT_REG2_NONE_HINT_2_SHIFT (0x0000001Fu)
  19491. #define CSL_CPINTC_PRI_HINT_REG2_NONE_HINT_2_RESETVAL (0x00000001u)
  19492. #define CSL_CPINTC_PRI_HINT_REG2_RESETVAL (0x80000000u)
  19493. /* pri_hint_reg3 */
  19494. #define CSL_CPINTC_PRI_HINT_REG3_PRI_HINT_3_MASK (0x000003FFu)
  19495. #define CSL_CPINTC_PRI_HINT_REG3_PRI_HINT_3_SHIFT (0x00000000u)
  19496. #define CSL_CPINTC_PRI_HINT_REG3_PRI_HINT_3_RESETVAL (0x00000000u)
  19497. #define CSL_CPINTC_PRI_HINT_REG3_NONE_HINT_3_MASK (0x80000000u)
  19498. #define CSL_CPINTC_PRI_HINT_REG3_NONE_HINT_3_SHIFT (0x0000001Fu)
  19499. #define CSL_CPINTC_PRI_HINT_REG3_NONE_HINT_3_RESETVAL (0x00000001u)
  19500. #define CSL_CPINTC_PRI_HINT_REG3_RESETVAL (0x80000000u)
  19501. /* pri_hint_reg4 */
  19502. #define CSL_CPINTC_PRI_HINT_REG4_PRI_HINT_4_MASK (0x000003FFu)
  19503. #define CSL_CPINTC_PRI_HINT_REG4_PRI_HINT_4_SHIFT (0x00000000u)
  19504. #define CSL_CPINTC_PRI_HINT_REG4_PRI_HINT_4_RESETVAL (0x00000000u)
  19505. #define CSL_CPINTC_PRI_HINT_REG4_NONE_HINT_4_MASK (0x80000000u)
  19506. #define CSL_CPINTC_PRI_HINT_REG4_NONE_HINT_4_SHIFT (0x0000001Fu)
  19507. #define CSL_CPINTC_PRI_HINT_REG4_NONE_HINT_4_RESETVAL (0x00000001u)
  19508. #define CSL_CPINTC_PRI_HINT_REG4_RESETVAL (0x80000000u)
  19509. /* pri_hint_reg5 */
  19510. #define CSL_CPINTC_PRI_HINT_REG5_PRI_HINT_5_MASK (0x000003FFu)
  19511. #define CSL_CPINTC_PRI_HINT_REG5_PRI_HINT_5_SHIFT (0x00000000u)
  19512. #define CSL_CPINTC_PRI_HINT_REG5_PRI_HINT_5_RESETVAL (0x00000000u)
  19513. #define CSL_CPINTC_PRI_HINT_REG5_NONE_HINT_5_MASK (0x80000000u)
  19514. #define CSL_CPINTC_PRI_HINT_REG5_NONE_HINT_5_SHIFT (0x0000001Fu)
  19515. #define CSL_CPINTC_PRI_HINT_REG5_NONE_HINT_5_RESETVAL (0x00000001u)
  19516. #define CSL_CPINTC_PRI_HINT_REG5_RESETVAL (0x80000000u)
  19517. /* pri_hint_reg6 */
  19518. #define CSL_CPINTC_PRI_HINT_REG6_PRI_HINT_6_MASK (0x000003FFu)
  19519. #define CSL_CPINTC_PRI_HINT_REG6_PRI_HINT_6_SHIFT (0x00000000u)
  19520. #define CSL_CPINTC_PRI_HINT_REG6_PRI_HINT_6_RESETVAL (0x00000000u)
  19521. #define CSL_CPINTC_PRI_HINT_REG6_NONE_HINT_6_MASK (0x80000000u)
  19522. #define CSL_CPINTC_PRI_HINT_REG6_NONE_HINT_6_SHIFT (0x0000001Fu)
  19523. #define CSL_CPINTC_PRI_HINT_REG6_NONE_HINT_6_RESETVAL (0x00000001u)
  19524. #define CSL_CPINTC_PRI_HINT_REG6_RESETVAL (0x80000000u)
  19525. /* pri_hint_reg7 */
  19526. #define CSL_CPINTC_PRI_HINT_REG7_PRI_HINT_7_MASK (0x000003FFu)
  19527. #define CSL_CPINTC_PRI_HINT_REG7_PRI_HINT_7_SHIFT (0x00000000u)
  19528. #define CSL_CPINTC_PRI_HINT_REG7_PRI_HINT_7_RESETVAL (0x00000000u)
  19529. #define CSL_CPINTC_PRI_HINT_REG7_NONE_HINT_7_MASK (0x80000000u)
  19530. #define CSL_CPINTC_PRI_HINT_REG7_NONE_HINT_7_SHIFT (0x0000001Fu)
  19531. #define CSL_CPINTC_PRI_HINT_REG7_NONE_HINT_7_RESETVAL (0x00000001u)
  19532. #define CSL_CPINTC_PRI_HINT_REG7_RESETVAL (0x80000000u)
  19533. /* pri_hint_reg8 */
  19534. #define CSL_CPINTC_PRI_HINT_REG8_PRI_HINT_8_MASK (0x000003FFu)
  19535. #define CSL_CPINTC_PRI_HINT_REG8_PRI_HINT_8_SHIFT (0x00000000u)
  19536. #define CSL_CPINTC_PRI_HINT_REG8_PRI_HINT_8_RESETVAL (0x00000000u)
  19537. #define CSL_CPINTC_PRI_HINT_REG8_NONE_HINT_8_MASK (0x80000000u)
  19538. #define CSL_CPINTC_PRI_HINT_REG8_NONE_HINT_8_SHIFT (0x0000001Fu)
  19539. #define CSL_CPINTC_PRI_HINT_REG8_NONE_HINT_8_RESETVAL (0x00000001u)
  19540. #define CSL_CPINTC_PRI_HINT_REG8_RESETVAL (0x80000000u)
  19541. /* pri_hint_reg9 */
  19542. #define CSL_CPINTC_PRI_HINT_REG9_PRI_HINT_9_MASK (0x000003FFu)
  19543. #define CSL_CPINTC_PRI_HINT_REG9_PRI_HINT_9_SHIFT (0x00000000u)
  19544. #define CSL_CPINTC_PRI_HINT_REG9_PRI_HINT_9_RESETVAL (0x00000000u)
  19545. #define CSL_CPINTC_PRI_HINT_REG9_NONE_HINT_9_MASK (0x80000000u)
  19546. #define CSL_CPINTC_PRI_HINT_REG9_NONE_HINT_9_SHIFT (0x0000001Fu)
  19547. #define CSL_CPINTC_PRI_HINT_REG9_NONE_HINT_9_RESETVAL (0x00000001u)
  19548. #define CSL_CPINTC_PRI_HINT_REG9_RESETVAL (0x80000000u)
  19549. /* pri_hint_reg10 */
  19550. #define CSL_CPINTC_PRI_HINT_REG10_PRI_HINT_10_MASK (0x000003FFu)
  19551. #define CSL_CPINTC_PRI_HINT_REG10_PRI_HINT_10_SHIFT (0x00000000u)
  19552. #define CSL_CPINTC_PRI_HINT_REG10_PRI_HINT_10_RESETVAL (0x00000000u)
  19553. #define CSL_CPINTC_PRI_HINT_REG10_NONE_HINT_10_MASK (0x80000000u)
  19554. #define CSL_CPINTC_PRI_HINT_REG10_NONE_HINT_10_SHIFT (0x0000001Fu)
  19555. #define CSL_CPINTC_PRI_HINT_REG10_NONE_HINT_10_RESETVAL (0x00000001u)
  19556. #define CSL_CPINTC_PRI_HINT_REG10_RESETVAL (0x80000000u)
  19557. /* pri_hint_reg11 */
  19558. #define CSL_CPINTC_PRI_HINT_REG11_PRI_HINT_11_MASK (0x000003FFu)
  19559. #define CSL_CPINTC_PRI_HINT_REG11_PRI_HINT_11_SHIFT (0x00000000u)
  19560. #define CSL_CPINTC_PRI_HINT_REG11_PRI_HINT_11_RESETVAL (0x00000000u)
  19561. #define CSL_CPINTC_PRI_HINT_REG11_NONE_HINT_11_MASK (0x80000000u)
  19562. #define CSL_CPINTC_PRI_HINT_REG11_NONE_HINT_11_SHIFT (0x0000001Fu)
  19563. #define CSL_CPINTC_PRI_HINT_REG11_NONE_HINT_11_RESETVAL (0x00000001u)
  19564. #define CSL_CPINTC_PRI_HINT_REG11_RESETVAL (0x80000000u)
  19565. /* pri_hint_reg12 */
  19566. #define CSL_CPINTC_PRI_HINT_REG12_PRI_HINT_12_MASK (0x000003FFu)
  19567. #define CSL_CPINTC_PRI_HINT_REG12_PRI_HINT_12_SHIFT (0x00000000u)
  19568. #define CSL_CPINTC_PRI_HINT_REG12_PRI_HINT_12_RESETVAL (0x00000000u)
  19569. #define CSL_CPINTC_PRI_HINT_REG12_NONE_HINT_12_MASK (0x80000000u)
  19570. #define CSL_CPINTC_PRI_HINT_REG12_NONE_HINT_12_SHIFT (0x0000001Fu)
  19571. #define CSL_CPINTC_PRI_HINT_REG12_NONE_HINT_12_RESETVAL (0x00000001u)
  19572. #define CSL_CPINTC_PRI_HINT_REG12_RESETVAL (0x80000000u)
  19573. /* pri_hint_reg13 */
  19574. #define CSL_CPINTC_PRI_HINT_REG13_PRI_HINT_13_MASK (0x000003FFu)
  19575. #define CSL_CPINTC_PRI_HINT_REG13_PRI_HINT_13_SHIFT (0x00000000u)
  19576. #define CSL_CPINTC_PRI_HINT_REG13_PRI_HINT_13_RESETVAL (0x00000000u)
  19577. #define CSL_CPINTC_PRI_HINT_REG13_NONE_HINT_13_MASK (0x80000000u)
  19578. #define CSL_CPINTC_PRI_HINT_REG13_NONE_HINT_13_SHIFT (0x0000001Fu)
  19579. #define CSL_CPINTC_PRI_HINT_REG13_NONE_HINT_13_RESETVAL (0x00000001u)
  19580. #define CSL_CPINTC_PRI_HINT_REG13_RESETVAL (0x80000000u)
  19581. /* pri_hint_reg14 */
  19582. #define CSL_CPINTC_PRI_HINT_REG14_PRI_HINT_14_MASK (0x000003FFu)
  19583. #define CSL_CPINTC_PRI_HINT_REG14_PRI_HINT_14_SHIFT (0x00000000u)
  19584. #define CSL_CPINTC_PRI_HINT_REG14_PRI_HINT_14_RESETVAL (0x00000000u)
  19585. #define CSL_CPINTC_PRI_HINT_REG14_NONE_HINT_14_MASK (0x80000000u)
  19586. #define CSL_CPINTC_PRI_HINT_REG14_NONE_HINT_14_SHIFT (0x0000001Fu)
  19587. #define CSL_CPINTC_PRI_HINT_REG14_NONE_HINT_14_RESETVAL (0x00000001u)
  19588. #define CSL_CPINTC_PRI_HINT_REG14_RESETVAL (0x80000000u)
  19589. /* pri_hint_reg15 */
  19590. #define CSL_CPINTC_PRI_HINT_REG15_PRI_HINT_15_MASK (0x000003FFu)
  19591. #define CSL_CPINTC_PRI_HINT_REG15_PRI_HINT_15_SHIFT (0x00000000u)
  19592. #define CSL_CPINTC_PRI_HINT_REG15_PRI_HINT_15_RESETVAL (0x00000000u)
  19593. #define CSL_CPINTC_PRI_HINT_REG15_NONE_HINT_15_MASK (0x80000000u)
  19594. #define CSL_CPINTC_PRI_HINT_REG15_NONE_HINT_15_SHIFT (0x0000001Fu)
  19595. #define CSL_CPINTC_PRI_HINT_REG15_NONE_HINT_15_RESETVAL (0x00000001u)
  19596. #define CSL_CPINTC_PRI_HINT_REG15_RESETVAL (0x80000000u)
  19597. /* pri_hint_reg16 */
  19598. #define CSL_CPINTC_PRI_HINT_REG16_PRI_HINT_16_MASK (0x000003FFu)
  19599. #define CSL_CPINTC_PRI_HINT_REG16_PRI_HINT_16_SHIFT (0x00000000u)
  19600. #define CSL_CPINTC_PRI_HINT_REG16_PRI_HINT_16_RESETVAL (0x00000000u)
  19601. #define CSL_CPINTC_PRI_HINT_REG16_NONE_HINT_16_MASK (0x80000000u)
  19602. #define CSL_CPINTC_PRI_HINT_REG16_NONE_HINT_16_SHIFT (0x0000001Fu)
  19603. #define CSL_CPINTC_PRI_HINT_REG16_NONE_HINT_16_RESETVAL (0x00000001u)
  19604. #define CSL_CPINTC_PRI_HINT_REG16_RESETVAL (0x80000000u)
  19605. /* pri_hint_reg17 */
  19606. #define CSL_CPINTC_PRI_HINT_REG17_PRI_HINT_17_MASK (0x000003FFu)
  19607. #define CSL_CPINTC_PRI_HINT_REG17_PRI_HINT_17_SHIFT (0x00000000u)
  19608. #define CSL_CPINTC_PRI_HINT_REG17_PRI_HINT_17_RESETVAL (0x00000000u)
  19609. #define CSL_CPINTC_PRI_HINT_REG17_NONE_HINT_17_MASK (0x80000000u)
  19610. #define CSL_CPINTC_PRI_HINT_REG17_NONE_HINT_17_SHIFT (0x0000001Fu)
  19611. #define CSL_CPINTC_PRI_HINT_REG17_NONE_HINT_17_RESETVAL (0x00000001u)
  19612. #define CSL_CPINTC_PRI_HINT_REG17_RESETVAL (0x80000000u)
  19613. /* pri_hint_reg18 */
  19614. #define CSL_CPINTC_PRI_HINT_REG18_PRI_HINT_18_MASK (0x000003FFu)
  19615. #define CSL_CPINTC_PRI_HINT_REG18_PRI_HINT_18_SHIFT (0x00000000u)
  19616. #define CSL_CPINTC_PRI_HINT_REG18_PRI_HINT_18_RESETVAL (0x00000000u)
  19617. #define CSL_CPINTC_PRI_HINT_REG18_NONE_HINT_18_MASK (0x80000000u)
  19618. #define CSL_CPINTC_PRI_HINT_REG18_NONE_HINT_18_SHIFT (0x0000001Fu)
  19619. #define CSL_CPINTC_PRI_HINT_REG18_NONE_HINT_18_RESETVAL (0x00000001u)
  19620. #define CSL_CPINTC_PRI_HINT_REG18_RESETVAL (0x80000000u)
  19621. /* pri_hint_reg19 */
  19622. #define CSL_CPINTC_PRI_HINT_REG19_PRI_HINT_19_MASK (0x000003FFu)
  19623. #define CSL_CPINTC_PRI_HINT_REG19_PRI_HINT_19_SHIFT (0x00000000u)
  19624. #define CSL_CPINTC_PRI_HINT_REG19_PRI_HINT_19_RESETVAL (0x00000000u)
  19625. #define CSL_CPINTC_PRI_HINT_REG19_NONE_HINT_19_MASK (0x80000000u)
  19626. #define CSL_CPINTC_PRI_HINT_REG19_NONE_HINT_19_SHIFT (0x0000001Fu)
  19627. #define CSL_CPINTC_PRI_HINT_REG19_NONE_HINT_19_RESETVAL (0x00000001u)
  19628. #define CSL_CPINTC_PRI_HINT_REG19_RESETVAL (0x80000000u)
  19629. /* pri_hint_reg20 */
  19630. #define CSL_CPINTC_PRI_HINT_REG20_PRI_HINT_20_MASK (0x000003FFu)
  19631. #define CSL_CPINTC_PRI_HINT_REG20_PRI_HINT_20_SHIFT (0x00000000u)
  19632. #define CSL_CPINTC_PRI_HINT_REG20_PRI_HINT_20_RESETVAL (0x00000000u)
  19633. #define CSL_CPINTC_PRI_HINT_REG20_NONE_HINT_20_MASK (0x80000000u)
  19634. #define CSL_CPINTC_PRI_HINT_REG20_NONE_HINT_20_SHIFT (0x0000001Fu)
  19635. #define CSL_CPINTC_PRI_HINT_REG20_NONE_HINT_20_RESETVAL (0x00000001u)
  19636. #define CSL_CPINTC_PRI_HINT_REG20_RESETVAL (0x80000000u)
  19637. /* pri_hint_reg21 */
  19638. #define CSL_CPINTC_PRI_HINT_REG21_PRI_HINT_21_MASK (0x000003FFu)
  19639. #define CSL_CPINTC_PRI_HINT_REG21_PRI_HINT_21_SHIFT (0x00000000u)
  19640. #define CSL_CPINTC_PRI_HINT_REG21_PRI_HINT_21_RESETVAL (0x00000000u)
  19641. #define CSL_CPINTC_PRI_HINT_REG21_NONE_HINT_21_MASK (0x80000000u)
  19642. #define CSL_CPINTC_PRI_HINT_REG21_NONE_HINT_21_SHIFT (0x0000001Fu)
  19643. #define CSL_CPINTC_PRI_HINT_REG21_NONE_HINT_21_RESETVAL (0x00000001u)
  19644. #define CSL_CPINTC_PRI_HINT_REG21_RESETVAL (0x80000000u)
  19645. /* pri_hint_reg22 */
  19646. #define CSL_CPINTC_PRI_HINT_REG22_PRI_HINT_22_MASK (0x000003FFu)
  19647. #define CSL_CPINTC_PRI_HINT_REG22_PRI_HINT_22_SHIFT (0x00000000u)
  19648. #define CSL_CPINTC_PRI_HINT_REG22_PRI_HINT_22_RESETVAL (0x00000000u)
  19649. #define CSL_CPINTC_PRI_HINT_REG22_NONE_HINT_22_MASK (0x80000000u)
  19650. #define CSL_CPINTC_PRI_HINT_REG22_NONE_HINT_22_SHIFT (0x0000001Fu)
  19651. #define CSL_CPINTC_PRI_HINT_REG22_NONE_HINT_22_RESETVAL (0x00000001u)
  19652. #define CSL_CPINTC_PRI_HINT_REG22_RESETVAL (0x80000000u)
  19653. /* pri_hint_reg23 */
  19654. #define CSL_CPINTC_PRI_HINT_REG23_PRI_HINT_23_MASK (0x000003FFu)
  19655. #define CSL_CPINTC_PRI_HINT_REG23_PRI_HINT_23_SHIFT (0x00000000u)
  19656. #define CSL_CPINTC_PRI_HINT_REG23_PRI_HINT_23_RESETVAL (0x00000000u)
  19657. #define CSL_CPINTC_PRI_HINT_REG23_NONE_HINT_23_MASK (0x80000000u)
  19658. #define CSL_CPINTC_PRI_HINT_REG23_NONE_HINT_23_SHIFT (0x0000001Fu)
  19659. #define CSL_CPINTC_PRI_HINT_REG23_NONE_HINT_23_RESETVAL (0x00000001u)
  19660. #define CSL_CPINTC_PRI_HINT_REG23_RESETVAL (0x80000000u)
  19661. /* pri_hint_reg24 */
  19662. #define CSL_CPINTC_PRI_HINT_REG24_PRI_HINT_24_MASK (0x000003FFu)
  19663. #define CSL_CPINTC_PRI_HINT_REG24_PRI_HINT_24_SHIFT (0x00000000u)
  19664. #define CSL_CPINTC_PRI_HINT_REG24_PRI_HINT_24_RESETVAL (0x00000000u)
  19665. #define CSL_CPINTC_PRI_HINT_REG24_NONE_HINT_24_MASK (0x80000000u)
  19666. #define CSL_CPINTC_PRI_HINT_REG24_NONE_HINT_24_SHIFT (0x0000001Fu)
  19667. #define CSL_CPINTC_PRI_HINT_REG24_NONE_HINT_24_RESETVAL (0x00000001u)
  19668. #define CSL_CPINTC_PRI_HINT_REG24_RESETVAL (0x80000000u)
  19669. /* pri_hint_reg25 */
  19670. #define CSL_CPINTC_PRI_HINT_REG25_PRI_HINT_25_MASK (0x000003FFu)
  19671. #define CSL_CPINTC_PRI_HINT_REG25_PRI_HINT_25_SHIFT (0x00000000u)
  19672. #define CSL_CPINTC_PRI_HINT_REG25_PRI_HINT_25_RESETVAL (0x00000000u)
  19673. #define CSL_CPINTC_PRI_HINT_REG25_NONE_HINT_25_MASK (0x80000000u)
  19674. #define CSL_CPINTC_PRI_HINT_REG25_NONE_HINT_25_SHIFT (0x0000001Fu)
  19675. #define CSL_CPINTC_PRI_HINT_REG25_NONE_HINT_25_RESETVAL (0x00000001u)
  19676. #define CSL_CPINTC_PRI_HINT_REG25_RESETVAL (0x80000000u)
  19677. /* pri_hint_reg26 */
  19678. #define CSL_CPINTC_PRI_HINT_REG26_PRI_HINT_26_MASK (0x000003FFu)
  19679. #define CSL_CPINTC_PRI_HINT_REG26_PRI_HINT_26_SHIFT (0x00000000u)
  19680. #define CSL_CPINTC_PRI_HINT_REG26_PRI_HINT_26_RESETVAL (0x00000000u)
  19681. #define CSL_CPINTC_PRI_HINT_REG26_NONE_HINT_26_MASK (0x80000000u)
  19682. #define CSL_CPINTC_PRI_HINT_REG26_NONE_HINT_26_SHIFT (0x0000001Fu)
  19683. #define CSL_CPINTC_PRI_HINT_REG26_NONE_HINT_26_RESETVAL (0x00000001u)
  19684. #define CSL_CPINTC_PRI_HINT_REG26_RESETVAL (0x80000000u)
  19685. /* pri_hint_reg27 */
  19686. #define CSL_CPINTC_PRI_HINT_REG27_PRI_HINT_27_MASK (0x000003FFu)
  19687. #define CSL_CPINTC_PRI_HINT_REG27_PRI_HINT_27_SHIFT (0x00000000u)
  19688. #define CSL_CPINTC_PRI_HINT_REG27_PRI_HINT_27_RESETVAL (0x00000000u)
  19689. #define CSL_CPINTC_PRI_HINT_REG27_NONE_HINT_27_MASK (0x80000000u)
  19690. #define CSL_CPINTC_PRI_HINT_REG27_NONE_HINT_27_SHIFT (0x0000001Fu)
  19691. #define CSL_CPINTC_PRI_HINT_REG27_NONE_HINT_27_RESETVAL (0x00000001u)
  19692. #define CSL_CPINTC_PRI_HINT_REG27_RESETVAL (0x80000000u)
  19693. /* pri_hint_reg28 */
  19694. #define CSL_CPINTC_PRI_HINT_REG28_PRI_HINT_28_MASK (0x000003FFu)
  19695. #define CSL_CPINTC_PRI_HINT_REG28_PRI_HINT_28_SHIFT (0x00000000u)
  19696. #define CSL_CPINTC_PRI_HINT_REG28_PRI_HINT_28_RESETVAL (0x00000000u)
  19697. #define CSL_CPINTC_PRI_HINT_REG28_NONE_HINT_28_MASK (0x80000000u)
  19698. #define CSL_CPINTC_PRI_HINT_REG28_NONE_HINT_28_SHIFT (0x0000001Fu)
  19699. #define CSL_CPINTC_PRI_HINT_REG28_NONE_HINT_28_RESETVAL (0x00000001u)
  19700. #define CSL_CPINTC_PRI_HINT_REG28_RESETVAL (0x80000000u)
  19701. /* pri_hint_reg29 */
  19702. #define CSL_CPINTC_PRI_HINT_REG29_PRI_HINT_29_MASK (0x000003FFu)
  19703. #define CSL_CPINTC_PRI_HINT_REG29_PRI_HINT_29_SHIFT (0x00000000u)
  19704. #define CSL_CPINTC_PRI_HINT_REG29_PRI_HINT_29_RESETVAL (0x00000000u)
  19705. #define CSL_CPINTC_PRI_HINT_REG29_NONE_HINT_29_MASK (0x80000000u)
  19706. #define CSL_CPINTC_PRI_HINT_REG29_NONE_HINT_29_SHIFT (0x0000001Fu)
  19707. #define CSL_CPINTC_PRI_HINT_REG29_NONE_HINT_29_RESETVAL (0x00000001u)
  19708. #define CSL_CPINTC_PRI_HINT_REG29_RESETVAL (0x80000000u)
  19709. /* pri_hint_reg30 */
  19710. #define CSL_CPINTC_PRI_HINT_REG30_PRI_HINT_30_MASK (0x000003FFu)
  19711. #define CSL_CPINTC_PRI_HINT_REG30_PRI_HINT_30_SHIFT (0x00000000u)
  19712. #define CSL_CPINTC_PRI_HINT_REG30_PRI_HINT_30_RESETVAL (0x00000000u)
  19713. #define CSL_CPINTC_PRI_HINT_REG30_NONE_HINT_30_MASK (0x80000000u)
  19714. #define CSL_CPINTC_PRI_HINT_REG30_NONE_HINT_30_SHIFT (0x0000001Fu)
  19715. #define CSL_CPINTC_PRI_HINT_REG30_NONE_HINT_30_RESETVAL (0x00000001u)
  19716. #define CSL_CPINTC_PRI_HINT_REG30_RESETVAL (0x80000000u)
  19717. /* pri_hint_reg31 */
  19718. #define CSL_CPINTC_PRI_HINT_REG31_PRI_HINT_31_MASK (0x000003FFu)
  19719. #define CSL_CPINTC_PRI_HINT_REG31_PRI_HINT_31_SHIFT (0x00000000u)
  19720. #define CSL_CPINTC_PRI_HINT_REG31_PRI_HINT_31_RESETVAL (0x00000000u)
  19721. #define CSL_CPINTC_PRI_HINT_REG31_NONE_HINT_31_MASK (0x80000000u)
  19722. #define CSL_CPINTC_PRI_HINT_REG31_NONE_HINT_31_SHIFT (0x0000001Fu)
  19723. #define CSL_CPINTC_PRI_HINT_REG31_NONE_HINT_31_RESETVAL (0x00000001u)
  19724. #define CSL_CPINTC_PRI_HINT_REG31_RESETVAL (0x80000000u)
  19725. /* pri_hint_reg32 */
  19726. #define CSL_CPINTC_PRI_HINT_REG32_PRI_HINT_32_MASK (0x000003FFu)
  19727. #define CSL_CPINTC_PRI_HINT_REG32_PRI_HINT_32_SHIFT (0x00000000u)
  19728. #define CSL_CPINTC_PRI_HINT_REG32_PRI_HINT_32_RESETVAL (0x00000000u)
  19729. #define CSL_CPINTC_PRI_HINT_REG32_NONE_HINT_32_MASK (0x80000000u)
  19730. #define CSL_CPINTC_PRI_HINT_REG32_NONE_HINT_32_SHIFT (0x0000001Fu)
  19731. #define CSL_CPINTC_PRI_HINT_REG32_NONE_HINT_32_RESETVAL (0x00000001u)
  19732. #define CSL_CPINTC_PRI_HINT_REG32_RESETVAL (0x80000000u)
  19733. /* pri_hint_reg33 */
  19734. #define CSL_CPINTC_PRI_HINT_REG33_PRI_HINT_33_MASK (0x000003FFu)
  19735. #define CSL_CPINTC_PRI_HINT_REG33_PRI_HINT_33_SHIFT (0x00000000u)
  19736. #define CSL_CPINTC_PRI_HINT_REG33_PRI_HINT_33_RESETVAL (0x00000000u)
  19737. #define CSL_CPINTC_PRI_HINT_REG33_NONE_HINT_33_MASK (0x80000000u)
  19738. #define CSL_CPINTC_PRI_HINT_REG33_NONE_HINT_33_SHIFT (0x0000001Fu)
  19739. #define CSL_CPINTC_PRI_HINT_REG33_NONE_HINT_33_RESETVAL (0x00000001u)
  19740. #define CSL_CPINTC_PRI_HINT_REG33_RESETVAL (0x80000000u)
  19741. /* pri_hint_reg34 */
  19742. #define CSL_CPINTC_PRI_HINT_REG34_PRI_HINT_34_MASK (0x000003FFu)
  19743. #define CSL_CPINTC_PRI_HINT_REG34_PRI_HINT_34_SHIFT (0x00000000u)
  19744. #define CSL_CPINTC_PRI_HINT_REG34_PRI_HINT_34_RESETVAL (0x00000000u)
  19745. #define CSL_CPINTC_PRI_HINT_REG34_NONE_HINT_34_MASK (0x80000000u)
  19746. #define CSL_CPINTC_PRI_HINT_REG34_NONE_HINT_34_SHIFT (0x0000001Fu)
  19747. #define CSL_CPINTC_PRI_HINT_REG34_NONE_HINT_34_RESETVAL (0x00000001u)
  19748. #define CSL_CPINTC_PRI_HINT_REG34_RESETVAL (0x80000000u)
  19749. /* pri_hint_reg35 */
  19750. #define CSL_CPINTC_PRI_HINT_REG35_PRI_HINT_35_MASK (0x000003FFu)
  19751. #define CSL_CPINTC_PRI_HINT_REG35_PRI_HINT_35_SHIFT (0x00000000u)
  19752. #define CSL_CPINTC_PRI_HINT_REG35_PRI_HINT_35_RESETVAL (0x00000000u)
  19753. #define CSL_CPINTC_PRI_HINT_REG35_NONE_HINT_35_MASK (0x80000000u)
  19754. #define CSL_CPINTC_PRI_HINT_REG35_NONE_HINT_35_SHIFT (0x0000001Fu)
  19755. #define CSL_CPINTC_PRI_HINT_REG35_NONE_HINT_35_RESETVAL (0x00000001u)
  19756. #define CSL_CPINTC_PRI_HINT_REG35_RESETVAL (0x80000000u)
  19757. /* pri_hint_reg36 */
  19758. #define CSL_CPINTC_PRI_HINT_REG36_PRI_HINT_36_MASK (0x000003FFu)
  19759. #define CSL_CPINTC_PRI_HINT_REG36_PRI_HINT_36_SHIFT (0x00000000u)
  19760. #define CSL_CPINTC_PRI_HINT_REG36_PRI_HINT_36_RESETVAL (0x00000000u)
  19761. #define CSL_CPINTC_PRI_HINT_REG36_NONE_HINT_36_MASK (0x80000000u)
  19762. #define CSL_CPINTC_PRI_HINT_REG36_NONE_HINT_36_SHIFT (0x0000001Fu)
  19763. #define CSL_CPINTC_PRI_HINT_REG36_NONE_HINT_36_RESETVAL (0x00000001u)
  19764. #define CSL_CPINTC_PRI_HINT_REG36_RESETVAL (0x80000000u)
  19765. /* pri_hint_reg37 */
  19766. #define CSL_CPINTC_PRI_HINT_REG37_PRI_HINT_37_MASK (0x000003FFu)
  19767. #define CSL_CPINTC_PRI_HINT_REG37_PRI_HINT_37_SHIFT (0x00000000u)
  19768. #define CSL_CPINTC_PRI_HINT_REG37_PRI_HINT_37_RESETVAL (0x00000000u)
  19769. #define CSL_CPINTC_PRI_HINT_REG37_NONE_HINT_37_MASK (0x80000000u)
  19770. #define CSL_CPINTC_PRI_HINT_REG37_NONE_HINT_37_SHIFT (0x0000001Fu)
  19771. #define CSL_CPINTC_PRI_HINT_REG37_NONE_HINT_37_RESETVAL (0x00000001u)
  19772. #define CSL_CPINTC_PRI_HINT_REG37_RESETVAL (0x80000000u)
  19773. /* pri_hint_reg38 */
  19774. #define CSL_CPINTC_PRI_HINT_REG38_PRI_HINT_38_MASK (0x000003FFu)
  19775. #define CSL_CPINTC_PRI_HINT_REG38_PRI_HINT_38_SHIFT (0x00000000u)
  19776. #define CSL_CPINTC_PRI_HINT_REG38_PRI_HINT_38_RESETVAL (0x00000000u)
  19777. #define CSL_CPINTC_PRI_HINT_REG38_NONE_HINT_38_MASK (0x80000000u)
  19778. #define CSL_CPINTC_PRI_HINT_REG38_NONE_HINT_38_SHIFT (0x0000001Fu)
  19779. #define CSL_CPINTC_PRI_HINT_REG38_NONE_HINT_38_RESETVAL (0x00000001u)
  19780. #define CSL_CPINTC_PRI_HINT_REG38_RESETVAL (0x80000000u)
  19781. /* pri_hint_reg39 */
  19782. #define CSL_CPINTC_PRI_HINT_REG39_PRI_HINT_39_MASK (0x000003FFu)
  19783. #define CSL_CPINTC_PRI_HINT_REG39_PRI_HINT_39_SHIFT (0x00000000u)
  19784. #define CSL_CPINTC_PRI_HINT_REG39_PRI_HINT_39_RESETVAL (0x00000000u)
  19785. #define CSL_CPINTC_PRI_HINT_REG39_NONE_HINT_39_MASK (0x80000000u)
  19786. #define CSL_CPINTC_PRI_HINT_REG39_NONE_HINT_39_SHIFT (0x0000001Fu)
  19787. #define CSL_CPINTC_PRI_HINT_REG39_NONE_HINT_39_RESETVAL (0x00000001u)
  19788. #define CSL_CPINTC_PRI_HINT_REG39_RESETVAL (0x80000000u)
  19789. /* pri_hint_reg40 */
  19790. #define CSL_CPINTC_PRI_HINT_REG40_PRI_HINT_40_MASK (0x000003FFu)
  19791. #define CSL_CPINTC_PRI_HINT_REG40_PRI_HINT_40_SHIFT (0x00000000u)
  19792. #define CSL_CPINTC_PRI_HINT_REG40_PRI_HINT_40_RESETVAL (0x00000000u)
  19793. #define CSL_CPINTC_PRI_HINT_REG40_NONE_HINT_40_MASK (0x80000000u)
  19794. #define CSL_CPINTC_PRI_HINT_REG40_NONE_HINT_40_SHIFT (0x0000001Fu)
  19795. #define CSL_CPINTC_PRI_HINT_REG40_NONE_HINT_40_RESETVAL (0x00000001u)
  19796. #define CSL_CPINTC_PRI_HINT_REG40_RESETVAL (0x80000000u)
  19797. /* pri_hint_reg41 */
  19798. #define CSL_CPINTC_PRI_HINT_REG41_PRI_HINT_41_MASK (0x000003FFu)
  19799. #define CSL_CPINTC_PRI_HINT_REG41_PRI_HINT_41_SHIFT (0x00000000u)
  19800. #define CSL_CPINTC_PRI_HINT_REG41_PRI_HINT_41_RESETVAL (0x00000000u)
  19801. #define CSL_CPINTC_PRI_HINT_REG41_NONE_HINT_41_MASK (0x80000000u)
  19802. #define CSL_CPINTC_PRI_HINT_REG41_NONE_HINT_41_SHIFT (0x0000001Fu)
  19803. #define CSL_CPINTC_PRI_HINT_REG41_NONE_HINT_41_RESETVAL (0x00000001u)
  19804. #define CSL_CPINTC_PRI_HINT_REG41_RESETVAL (0x80000000u)
  19805. /* pri_hint_reg42 */
  19806. #define CSL_CPINTC_PRI_HINT_REG42_PRI_HINT_42_MASK (0x000003FFu)
  19807. #define CSL_CPINTC_PRI_HINT_REG42_PRI_HINT_42_SHIFT (0x00000000u)
  19808. #define CSL_CPINTC_PRI_HINT_REG42_PRI_HINT_42_RESETVAL (0x00000000u)
  19809. #define CSL_CPINTC_PRI_HINT_REG42_NONE_HINT_42_MASK (0x80000000u)
  19810. #define CSL_CPINTC_PRI_HINT_REG42_NONE_HINT_42_SHIFT (0x0000001Fu)
  19811. #define CSL_CPINTC_PRI_HINT_REG42_NONE_HINT_42_RESETVAL (0x00000001u)
  19812. #define CSL_CPINTC_PRI_HINT_REG42_RESETVAL (0x80000000u)
  19813. /* pri_hint_reg43 */
  19814. #define CSL_CPINTC_PRI_HINT_REG43_PRI_HINT_43_MASK (0x000003FFu)
  19815. #define CSL_CPINTC_PRI_HINT_REG43_PRI_HINT_43_SHIFT (0x00000000u)
  19816. #define CSL_CPINTC_PRI_HINT_REG43_PRI_HINT_43_RESETVAL (0x00000000u)
  19817. #define CSL_CPINTC_PRI_HINT_REG43_NONE_HINT_43_MASK (0x80000000u)
  19818. #define CSL_CPINTC_PRI_HINT_REG43_NONE_HINT_43_SHIFT (0x0000001Fu)
  19819. #define CSL_CPINTC_PRI_HINT_REG43_NONE_HINT_43_RESETVAL (0x00000001u)
  19820. #define CSL_CPINTC_PRI_HINT_REG43_RESETVAL (0x80000000u)
  19821. /* pri_hint_reg44 */
  19822. #define CSL_CPINTC_PRI_HINT_REG44_PRI_HINT_44_MASK (0x000003FFu)
  19823. #define CSL_CPINTC_PRI_HINT_REG44_PRI_HINT_44_SHIFT (0x00000000u)
  19824. #define CSL_CPINTC_PRI_HINT_REG44_PRI_HINT_44_RESETVAL (0x00000000u)
  19825. #define CSL_CPINTC_PRI_HINT_REG44_NONE_HINT_44_MASK (0x80000000u)
  19826. #define CSL_CPINTC_PRI_HINT_REG44_NONE_HINT_44_SHIFT (0x0000001Fu)
  19827. #define CSL_CPINTC_PRI_HINT_REG44_NONE_HINT_44_RESETVAL (0x00000001u)
  19828. #define CSL_CPINTC_PRI_HINT_REG44_RESETVAL (0x80000000u)
  19829. /* pri_hint_reg45 */
  19830. #define CSL_CPINTC_PRI_HINT_REG45_PRI_HINT_45_MASK (0x000003FFu)
  19831. #define CSL_CPINTC_PRI_HINT_REG45_PRI_HINT_45_SHIFT (0x00000000u)
  19832. #define CSL_CPINTC_PRI_HINT_REG45_PRI_HINT_45_RESETVAL (0x00000000u)
  19833. #define CSL_CPINTC_PRI_HINT_REG45_NONE_HINT_45_MASK (0x80000000u)
  19834. #define CSL_CPINTC_PRI_HINT_REG45_NONE_HINT_45_SHIFT (0x0000001Fu)
  19835. #define CSL_CPINTC_PRI_HINT_REG45_NONE_HINT_45_RESETVAL (0x00000001u)
  19836. #define CSL_CPINTC_PRI_HINT_REG45_RESETVAL (0x80000000u)
  19837. /* pri_hint_reg46 */
  19838. #define CSL_CPINTC_PRI_HINT_REG46_PRI_HINT_46_MASK (0x000003FFu)
  19839. #define CSL_CPINTC_PRI_HINT_REG46_PRI_HINT_46_SHIFT (0x00000000u)
  19840. #define CSL_CPINTC_PRI_HINT_REG46_PRI_HINT_46_RESETVAL (0x00000000u)
  19841. #define CSL_CPINTC_PRI_HINT_REG46_NONE_HINT_46_MASK (0x80000000u)
  19842. #define CSL_CPINTC_PRI_HINT_REG46_NONE_HINT_46_SHIFT (0x0000001Fu)
  19843. #define CSL_CPINTC_PRI_HINT_REG46_NONE_HINT_46_RESETVAL (0x00000001u)
  19844. #define CSL_CPINTC_PRI_HINT_REG46_RESETVAL (0x80000000u)
  19845. /* pri_hint_reg47 */
  19846. #define CSL_CPINTC_PRI_HINT_REG47_PRI_HINT_47_MASK (0x000003FFu)
  19847. #define CSL_CPINTC_PRI_HINT_REG47_PRI_HINT_47_SHIFT (0x00000000u)
  19848. #define CSL_CPINTC_PRI_HINT_REG47_PRI_HINT_47_RESETVAL (0x00000000u)
  19849. #define CSL_CPINTC_PRI_HINT_REG47_NONE_HINT_47_MASK (0x80000000u)
  19850. #define CSL_CPINTC_PRI_HINT_REG47_NONE_HINT_47_SHIFT (0x0000001Fu)
  19851. #define CSL_CPINTC_PRI_HINT_REG47_NONE_HINT_47_RESETVAL (0x00000001u)
  19852. #define CSL_CPINTC_PRI_HINT_REG47_RESETVAL (0x80000000u)
  19853. /* pri_hint_reg48 */
  19854. #define CSL_CPINTC_PRI_HINT_REG48_PRI_HINT_48_MASK (0x000003FFu)
  19855. #define CSL_CPINTC_PRI_HINT_REG48_PRI_HINT_48_SHIFT (0x00000000u)
  19856. #define CSL_CPINTC_PRI_HINT_REG48_PRI_HINT_48_RESETVAL (0x00000000u)
  19857. #define CSL_CPINTC_PRI_HINT_REG48_NONE_HINT_48_MASK (0x80000000u)
  19858. #define CSL_CPINTC_PRI_HINT_REG48_NONE_HINT_48_SHIFT (0x0000001Fu)
  19859. #define CSL_CPINTC_PRI_HINT_REG48_NONE_HINT_48_RESETVAL (0x00000001u)
  19860. #define CSL_CPINTC_PRI_HINT_REG48_RESETVAL (0x80000000u)
  19861. /* pri_hint_reg49 */
  19862. #define CSL_CPINTC_PRI_HINT_REG49_PRI_HINT_49_MASK (0x000003FFu)
  19863. #define CSL_CPINTC_PRI_HINT_REG49_PRI_HINT_49_SHIFT (0x00000000u)
  19864. #define CSL_CPINTC_PRI_HINT_REG49_PRI_HINT_49_RESETVAL (0x00000000u)
  19865. #define CSL_CPINTC_PRI_HINT_REG49_NONE_HINT_49_MASK (0x80000000u)
  19866. #define CSL_CPINTC_PRI_HINT_REG49_NONE_HINT_49_SHIFT (0x0000001Fu)
  19867. #define CSL_CPINTC_PRI_HINT_REG49_NONE_HINT_49_RESETVAL (0x00000001u)
  19868. #define CSL_CPINTC_PRI_HINT_REG49_RESETVAL (0x80000000u)
  19869. /* pri_hint_reg50 */
  19870. #define CSL_CPINTC_PRI_HINT_REG50_PRI_HINT_50_MASK (0x000003FFu)
  19871. #define CSL_CPINTC_PRI_HINT_REG50_PRI_HINT_50_SHIFT (0x00000000u)
  19872. #define CSL_CPINTC_PRI_HINT_REG50_PRI_HINT_50_RESETVAL (0x00000000u)
  19873. #define CSL_CPINTC_PRI_HINT_REG50_NONE_HINT_50_MASK (0x80000000u)
  19874. #define CSL_CPINTC_PRI_HINT_REG50_NONE_HINT_50_SHIFT (0x0000001Fu)
  19875. #define CSL_CPINTC_PRI_HINT_REG50_NONE_HINT_50_RESETVAL (0x00000001u)
  19876. #define CSL_CPINTC_PRI_HINT_REG50_RESETVAL (0x80000000u)
  19877. /* pri_hint_reg51 */
  19878. #define CSL_CPINTC_PRI_HINT_REG51_PRI_HINT_51_MASK (0x000003FFu)
  19879. #define CSL_CPINTC_PRI_HINT_REG51_PRI_HINT_51_SHIFT (0x00000000u)
  19880. #define CSL_CPINTC_PRI_HINT_REG51_PRI_HINT_51_RESETVAL (0x00000000u)
  19881. #define CSL_CPINTC_PRI_HINT_REG51_NONE_HINT_51_MASK (0x80000000u)
  19882. #define CSL_CPINTC_PRI_HINT_REG51_NONE_HINT_51_SHIFT (0x0000001Fu)
  19883. #define CSL_CPINTC_PRI_HINT_REG51_NONE_HINT_51_RESETVAL (0x00000001u)
  19884. #define CSL_CPINTC_PRI_HINT_REG51_RESETVAL (0x80000000u)
  19885. /* pri_hint_reg52 */
  19886. #define CSL_CPINTC_PRI_HINT_REG52_PRI_HINT_52_MASK (0x000003FFu)
  19887. #define CSL_CPINTC_PRI_HINT_REG52_PRI_HINT_52_SHIFT (0x00000000u)
  19888. #define CSL_CPINTC_PRI_HINT_REG52_PRI_HINT_52_RESETVAL (0x00000000u)
  19889. #define CSL_CPINTC_PRI_HINT_REG52_NONE_HINT_52_MASK (0x80000000u)
  19890. #define CSL_CPINTC_PRI_HINT_REG52_NONE_HINT_52_SHIFT (0x0000001Fu)
  19891. #define CSL_CPINTC_PRI_HINT_REG52_NONE_HINT_52_RESETVAL (0x00000001u)
  19892. #define CSL_CPINTC_PRI_HINT_REG52_RESETVAL (0x80000000u)
  19893. /* pri_hint_reg53 */
  19894. #define CSL_CPINTC_PRI_HINT_REG53_PRI_HINT_53_MASK (0x000003FFu)
  19895. #define CSL_CPINTC_PRI_HINT_REG53_PRI_HINT_53_SHIFT (0x00000000u)
  19896. #define CSL_CPINTC_PRI_HINT_REG53_PRI_HINT_53_RESETVAL (0x00000000u)
  19897. #define CSL_CPINTC_PRI_HINT_REG53_NONE_HINT_53_MASK (0x80000000u)
  19898. #define CSL_CPINTC_PRI_HINT_REG53_NONE_HINT_53_SHIFT (0x0000001Fu)
  19899. #define CSL_CPINTC_PRI_HINT_REG53_NONE_HINT_53_RESETVAL (0x00000001u)
  19900. #define CSL_CPINTC_PRI_HINT_REG53_RESETVAL (0x80000000u)
  19901. /* pri_hint_reg54 */
  19902. #define CSL_CPINTC_PRI_HINT_REG54_PRI_HINT_54_MASK (0x000003FFu)
  19903. #define CSL_CPINTC_PRI_HINT_REG54_PRI_HINT_54_SHIFT (0x00000000u)
  19904. #define CSL_CPINTC_PRI_HINT_REG54_PRI_HINT_54_RESETVAL (0x00000000u)
  19905. #define CSL_CPINTC_PRI_HINT_REG54_NONE_HINT_54_MASK (0x80000000u)
  19906. #define CSL_CPINTC_PRI_HINT_REG54_NONE_HINT_54_SHIFT (0x0000001Fu)
  19907. #define CSL_CPINTC_PRI_HINT_REG54_NONE_HINT_54_RESETVAL (0x00000001u)
  19908. #define CSL_CPINTC_PRI_HINT_REG54_RESETVAL (0x80000000u)
  19909. /* pri_hint_reg55 */
  19910. #define CSL_CPINTC_PRI_HINT_REG55_PRI_HINT_55_MASK (0x000003FFu)
  19911. #define CSL_CPINTC_PRI_HINT_REG55_PRI_HINT_55_SHIFT (0x00000000u)
  19912. #define CSL_CPINTC_PRI_HINT_REG55_PRI_HINT_55_RESETVAL (0x00000000u)
  19913. #define CSL_CPINTC_PRI_HINT_REG55_NONE_HINT_55_MASK (0x80000000u)
  19914. #define CSL_CPINTC_PRI_HINT_REG55_NONE_HINT_55_SHIFT (0x0000001Fu)
  19915. #define CSL_CPINTC_PRI_HINT_REG55_NONE_HINT_55_RESETVAL (0x00000001u)
  19916. #define CSL_CPINTC_PRI_HINT_REG55_RESETVAL (0x80000000u)
  19917. /* pri_hint_reg56 */
  19918. #define CSL_CPINTC_PRI_HINT_REG56_PRI_HINT_56_MASK (0x000003FFu)
  19919. #define CSL_CPINTC_PRI_HINT_REG56_PRI_HINT_56_SHIFT (0x00000000u)
  19920. #define CSL_CPINTC_PRI_HINT_REG56_PRI_HINT_56_RESETVAL (0x00000000u)
  19921. #define CSL_CPINTC_PRI_HINT_REG56_NONE_HINT_56_MASK (0x80000000u)
  19922. #define CSL_CPINTC_PRI_HINT_REG56_NONE_HINT_56_SHIFT (0x0000001Fu)
  19923. #define CSL_CPINTC_PRI_HINT_REG56_NONE_HINT_56_RESETVAL (0x00000001u)
  19924. #define CSL_CPINTC_PRI_HINT_REG56_RESETVAL (0x80000000u)
  19925. /* pri_hint_reg57 */
  19926. #define CSL_CPINTC_PRI_HINT_REG57_PRI_HINT_57_MASK (0x000003FFu)
  19927. #define CSL_CPINTC_PRI_HINT_REG57_PRI_HINT_57_SHIFT (0x00000000u)
  19928. #define CSL_CPINTC_PRI_HINT_REG57_PRI_HINT_57_RESETVAL (0x00000000u)
  19929. #define CSL_CPINTC_PRI_HINT_REG57_NONE_HINT_57_MASK (0x80000000u)
  19930. #define CSL_CPINTC_PRI_HINT_REG57_NONE_HINT_57_SHIFT (0x0000001Fu)
  19931. #define CSL_CPINTC_PRI_HINT_REG57_NONE_HINT_57_RESETVAL (0x00000001u)
  19932. #define CSL_CPINTC_PRI_HINT_REG57_RESETVAL (0x80000000u)
  19933. /* pri_hint_reg58 */
  19934. #define CSL_CPINTC_PRI_HINT_REG58_PRI_HINT_58_MASK (0x000003FFu)
  19935. #define CSL_CPINTC_PRI_HINT_REG58_PRI_HINT_58_SHIFT (0x00000000u)
  19936. #define CSL_CPINTC_PRI_HINT_REG58_PRI_HINT_58_RESETVAL (0x00000000u)
  19937. #define CSL_CPINTC_PRI_HINT_REG58_NONE_HINT_58_MASK (0x80000000u)
  19938. #define CSL_CPINTC_PRI_HINT_REG58_NONE_HINT_58_SHIFT (0x0000001Fu)
  19939. #define CSL_CPINTC_PRI_HINT_REG58_NONE_HINT_58_RESETVAL (0x00000001u)
  19940. #define CSL_CPINTC_PRI_HINT_REG58_RESETVAL (0x80000000u)
  19941. /* pri_hint_reg59 */
  19942. #define CSL_CPINTC_PRI_HINT_REG59_PRI_HINT_59_MASK (0x000003FFu)
  19943. #define CSL_CPINTC_PRI_HINT_REG59_PRI_HINT_59_SHIFT (0x00000000u)
  19944. #define CSL_CPINTC_PRI_HINT_REG59_PRI_HINT_59_RESETVAL (0x00000000u)
  19945. #define CSL_CPINTC_PRI_HINT_REG59_NONE_HINT_59_MASK (0x80000000u)
  19946. #define CSL_CPINTC_PRI_HINT_REG59_NONE_HINT_59_SHIFT (0x0000001Fu)
  19947. #define CSL_CPINTC_PRI_HINT_REG59_NONE_HINT_59_RESETVAL (0x00000001u)
  19948. #define CSL_CPINTC_PRI_HINT_REG59_RESETVAL (0x80000000u)
  19949. /* pri_hint_reg60 */
  19950. #define CSL_CPINTC_PRI_HINT_REG60_PRI_HINT_60_MASK (0x000003FFu)
  19951. #define CSL_CPINTC_PRI_HINT_REG60_PRI_HINT_60_SHIFT (0x00000000u)
  19952. #define CSL_CPINTC_PRI_HINT_REG60_PRI_HINT_60_RESETVAL (0x00000000u)
  19953. #define CSL_CPINTC_PRI_HINT_REG60_NONE_HINT_60_MASK (0x80000000u)
  19954. #define CSL_CPINTC_PRI_HINT_REG60_NONE_HINT_60_SHIFT (0x0000001Fu)
  19955. #define CSL_CPINTC_PRI_HINT_REG60_NONE_HINT_60_RESETVAL (0x00000001u)
  19956. #define CSL_CPINTC_PRI_HINT_REG60_RESETVAL (0x80000000u)
  19957. /* pri_hint_reg61 */
  19958. #define CSL_CPINTC_PRI_HINT_REG61_PRI_HINT_61_MASK (0x000003FFu)
  19959. #define CSL_CPINTC_PRI_HINT_REG61_PRI_HINT_61_SHIFT (0x00000000u)
  19960. #define CSL_CPINTC_PRI_HINT_REG61_PRI_HINT_61_RESETVAL (0x00000000u)
  19961. #define CSL_CPINTC_PRI_HINT_REG61_NONE_HINT_61_MASK (0x80000000u)
  19962. #define CSL_CPINTC_PRI_HINT_REG61_NONE_HINT_61_SHIFT (0x0000001Fu)
  19963. #define CSL_CPINTC_PRI_HINT_REG61_NONE_HINT_61_RESETVAL (0x00000001u)
  19964. #define CSL_CPINTC_PRI_HINT_REG61_RESETVAL (0x80000000u)
  19965. /* pri_hint_reg62 */
  19966. #define CSL_CPINTC_PRI_HINT_REG62_PRI_HINT_62_MASK (0x000003FFu)
  19967. #define CSL_CPINTC_PRI_HINT_REG62_PRI_HINT_62_SHIFT (0x00000000u)
  19968. #define CSL_CPINTC_PRI_HINT_REG62_PRI_HINT_62_RESETVAL (0x00000000u)
  19969. #define CSL_CPINTC_PRI_HINT_REG62_NONE_HINT_62_MASK (0x80000000u)
  19970. #define CSL_CPINTC_PRI_HINT_REG62_NONE_HINT_62_SHIFT (0x0000001Fu)
  19971. #define CSL_CPINTC_PRI_HINT_REG62_NONE_HINT_62_RESETVAL (0x00000001u)
  19972. #define CSL_CPINTC_PRI_HINT_REG62_RESETVAL (0x80000000u)
  19973. /* pri_hint_reg63 */
  19974. #define CSL_CPINTC_PRI_HINT_REG63_PRI_HINT_63_MASK (0x000003FFu)
  19975. #define CSL_CPINTC_PRI_HINT_REG63_PRI_HINT_63_SHIFT (0x00000000u)
  19976. #define CSL_CPINTC_PRI_HINT_REG63_PRI_HINT_63_RESETVAL (0x00000000u)
  19977. #define CSL_CPINTC_PRI_HINT_REG63_NONE_HINT_63_MASK (0x80000000u)
  19978. #define CSL_CPINTC_PRI_HINT_REG63_NONE_HINT_63_SHIFT (0x0000001Fu)
  19979. #define CSL_CPINTC_PRI_HINT_REG63_NONE_HINT_63_RESETVAL (0x00000001u)
  19980. #define CSL_CPINTC_PRI_HINT_REG63_RESETVAL (0x80000000u)
  19981. /* pri_hint_reg64 */
  19982. #define CSL_CPINTC_PRI_HINT_REG64_PRI_HINT_64_MASK (0x000003FFu)
  19983. #define CSL_CPINTC_PRI_HINT_REG64_PRI_HINT_64_SHIFT (0x00000000u)
  19984. #define CSL_CPINTC_PRI_HINT_REG64_PRI_HINT_64_RESETVAL (0x00000000u)
  19985. #define CSL_CPINTC_PRI_HINT_REG64_NONE_HINT_64_MASK (0x80000000u)
  19986. #define CSL_CPINTC_PRI_HINT_REG64_NONE_HINT_64_SHIFT (0x0000001Fu)
  19987. #define CSL_CPINTC_PRI_HINT_REG64_NONE_HINT_64_RESETVAL (0x00000001u)
  19988. #define CSL_CPINTC_PRI_HINT_REG64_RESETVAL (0x80000000u)
  19989. /* pri_hint_reg65 */
  19990. #define CSL_CPINTC_PRI_HINT_REG65_PRI_HINT_65_MASK (0x000003FFu)
  19991. #define CSL_CPINTC_PRI_HINT_REG65_PRI_HINT_65_SHIFT (0x00000000u)
  19992. #define CSL_CPINTC_PRI_HINT_REG65_PRI_HINT_65_RESETVAL (0x00000000u)
  19993. #define CSL_CPINTC_PRI_HINT_REG65_NONE_HINT_65_MASK (0x80000000u)
  19994. #define CSL_CPINTC_PRI_HINT_REG65_NONE_HINT_65_SHIFT (0x0000001Fu)
  19995. #define CSL_CPINTC_PRI_HINT_REG65_NONE_HINT_65_RESETVAL (0x00000001u)
  19996. #define CSL_CPINTC_PRI_HINT_REG65_RESETVAL (0x80000000u)
  19997. /* pri_hint_reg66 */
  19998. #define CSL_CPINTC_PRI_HINT_REG66_PRI_HINT_66_MASK (0x000003FFu)
  19999. #define CSL_CPINTC_PRI_HINT_REG66_PRI_HINT_66_SHIFT (0x00000000u)
  20000. #define CSL_CPINTC_PRI_HINT_REG66_PRI_HINT_66_RESETVAL (0x00000000u)
  20001. #define CSL_CPINTC_PRI_HINT_REG66_NONE_HINT_66_MASK (0x80000000u)
  20002. #define CSL_CPINTC_PRI_HINT_REG66_NONE_HINT_66_SHIFT (0x0000001Fu)
  20003. #define CSL_CPINTC_PRI_HINT_REG66_NONE_HINT_66_RESETVAL (0x00000001u)
  20004. #define CSL_CPINTC_PRI_HINT_REG66_RESETVAL (0x80000000u)
  20005. /* pri_hint_reg67 */
  20006. #define CSL_CPINTC_PRI_HINT_REG67_PRI_HINT_67_MASK (0x000003FFu)
  20007. #define CSL_CPINTC_PRI_HINT_REG67_PRI_HINT_67_SHIFT (0x00000000u)
  20008. #define CSL_CPINTC_PRI_HINT_REG67_PRI_HINT_67_RESETVAL (0x00000000u)
  20009. #define CSL_CPINTC_PRI_HINT_REG67_NONE_HINT_67_MASK (0x80000000u)
  20010. #define CSL_CPINTC_PRI_HINT_REG67_NONE_HINT_67_SHIFT (0x0000001Fu)
  20011. #define CSL_CPINTC_PRI_HINT_REG67_NONE_HINT_67_RESETVAL (0x00000001u)
  20012. #define CSL_CPINTC_PRI_HINT_REG67_RESETVAL (0x80000000u)
  20013. /* pri_hint_reg68 */
  20014. #define CSL_CPINTC_PRI_HINT_REG68_PRI_HINT_68_MASK (0x000003FFu)
  20015. #define CSL_CPINTC_PRI_HINT_REG68_PRI_HINT_68_SHIFT (0x00000000u)
  20016. #define CSL_CPINTC_PRI_HINT_REG68_PRI_HINT_68_RESETVAL (0x00000000u)
  20017. #define CSL_CPINTC_PRI_HINT_REG68_NONE_HINT_68_MASK (0x80000000u)
  20018. #define CSL_CPINTC_PRI_HINT_REG68_NONE_HINT_68_SHIFT (0x0000001Fu)
  20019. #define CSL_CPINTC_PRI_HINT_REG68_NONE_HINT_68_RESETVAL (0x00000001u)
  20020. #define CSL_CPINTC_PRI_HINT_REG68_RESETVAL (0x80000000u)
  20021. /* pri_hint_reg69 */
  20022. #define CSL_CPINTC_PRI_HINT_REG69_PRI_HINT_69_MASK (0x000003FFu)
  20023. #define CSL_CPINTC_PRI_HINT_REG69_PRI_HINT_69_SHIFT (0x00000000u)
  20024. #define CSL_CPINTC_PRI_HINT_REG69_PRI_HINT_69_RESETVAL (0x00000000u)
  20025. #define CSL_CPINTC_PRI_HINT_REG69_NONE_HINT_69_MASK (0x80000000u)
  20026. #define CSL_CPINTC_PRI_HINT_REG69_NONE_HINT_69_SHIFT (0x0000001Fu)
  20027. #define CSL_CPINTC_PRI_HINT_REG69_NONE_HINT_69_RESETVAL (0x00000001u)
  20028. #define CSL_CPINTC_PRI_HINT_REG69_RESETVAL (0x80000000u)
  20029. /* pri_hint_reg70 */
  20030. #define CSL_CPINTC_PRI_HINT_REG70_PRI_HINT_70_MASK (0x000003FFu)
  20031. #define CSL_CPINTC_PRI_HINT_REG70_PRI_HINT_70_SHIFT (0x00000000u)
  20032. #define CSL_CPINTC_PRI_HINT_REG70_PRI_HINT_70_RESETVAL (0x00000000u)
  20033. #define CSL_CPINTC_PRI_HINT_REG70_NONE_HINT_70_MASK (0x80000000u)
  20034. #define CSL_CPINTC_PRI_HINT_REG70_NONE_HINT_70_SHIFT (0x0000001Fu)
  20035. #define CSL_CPINTC_PRI_HINT_REG70_NONE_HINT_70_RESETVAL (0x00000001u)
  20036. #define CSL_CPINTC_PRI_HINT_REG70_RESETVAL (0x80000000u)
  20037. /* pri_hint_reg71 */
  20038. #define CSL_CPINTC_PRI_HINT_REG71_PRI_HINT_71_MASK (0x000003FFu)
  20039. #define CSL_CPINTC_PRI_HINT_REG71_PRI_HINT_71_SHIFT (0x00000000u)
  20040. #define CSL_CPINTC_PRI_HINT_REG71_PRI_HINT_71_RESETVAL (0x00000000u)
  20041. #define CSL_CPINTC_PRI_HINT_REG71_NONE_HINT_71_MASK (0x80000000u)
  20042. #define CSL_CPINTC_PRI_HINT_REG71_NONE_HINT_71_SHIFT (0x0000001Fu)
  20043. #define CSL_CPINTC_PRI_HINT_REG71_NONE_HINT_71_RESETVAL (0x00000001u)
  20044. #define CSL_CPINTC_PRI_HINT_REG71_RESETVAL (0x80000000u)
  20045. /* pri_hint_reg72 */
  20046. #define CSL_CPINTC_PRI_HINT_REG72_PRI_HINT_72_MASK (0x000003FFu)
  20047. #define CSL_CPINTC_PRI_HINT_REG72_PRI_HINT_72_SHIFT (0x00000000u)
  20048. #define CSL_CPINTC_PRI_HINT_REG72_PRI_HINT_72_RESETVAL (0x00000000u)
  20049. #define CSL_CPINTC_PRI_HINT_REG72_NONE_HINT_72_MASK (0x80000000u)
  20050. #define CSL_CPINTC_PRI_HINT_REG72_NONE_HINT_72_SHIFT (0x0000001Fu)
  20051. #define CSL_CPINTC_PRI_HINT_REG72_NONE_HINT_72_RESETVAL (0x00000001u)
  20052. #define CSL_CPINTC_PRI_HINT_REG72_RESETVAL (0x80000000u)
  20053. /* pri_hint_reg73 */
  20054. #define CSL_CPINTC_PRI_HINT_REG73_PRI_HINT_73_MASK (0x000003FFu)
  20055. #define CSL_CPINTC_PRI_HINT_REG73_PRI_HINT_73_SHIFT (0x00000000u)
  20056. #define CSL_CPINTC_PRI_HINT_REG73_PRI_HINT_73_RESETVAL (0x00000000u)
  20057. #define CSL_CPINTC_PRI_HINT_REG73_NONE_HINT_73_MASK (0x80000000u)
  20058. #define CSL_CPINTC_PRI_HINT_REG73_NONE_HINT_73_SHIFT (0x0000001Fu)
  20059. #define CSL_CPINTC_PRI_HINT_REG73_NONE_HINT_73_RESETVAL (0x00000001u)
  20060. #define CSL_CPINTC_PRI_HINT_REG73_RESETVAL (0x80000000u)
  20061. /* pri_hint_reg74 */
  20062. #define CSL_CPINTC_PRI_HINT_REG74_PRI_HINT_74_MASK (0x000003FFu)
  20063. #define CSL_CPINTC_PRI_HINT_REG74_PRI_HINT_74_SHIFT (0x00000000u)
  20064. #define CSL_CPINTC_PRI_HINT_REG74_PRI_HINT_74_RESETVAL (0x00000000u)
  20065. #define CSL_CPINTC_PRI_HINT_REG74_NONE_HINT_74_MASK (0x80000000u)
  20066. #define CSL_CPINTC_PRI_HINT_REG74_NONE_HINT_74_SHIFT (0x0000001Fu)
  20067. #define CSL_CPINTC_PRI_HINT_REG74_NONE_HINT_74_RESETVAL (0x00000001u)
  20068. #define CSL_CPINTC_PRI_HINT_REG74_RESETVAL (0x80000000u)
  20069. /* pri_hint_reg75 */
  20070. #define CSL_CPINTC_PRI_HINT_REG75_PRI_HINT_75_MASK (0x000003FFu)
  20071. #define CSL_CPINTC_PRI_HINT_REG75_PRI_HINT_75_SHIFT (0x00000000u)
  20072. #define CSL_CPINTC_PRI_HINT_REG75_PRI_HINT_75_RESETVAL (0x00000000u)
  20073. #define CSL_CPINTC_PRI_HINT_REG75_NONE_HINT_75_MASK (0x80000000u)
  20074. #define CSL_CPINTC_PRI_HINT_REG75_NONE_HINT_75_SHIFT (0x0000001Fu)
  20075. #define CSL_CPINTC_PRI_HINT_REG75_NONE_HINT_75_RESETVAL (0x00000001u)
  20076. #define CSL_CPINTC_PRI_HINT_REG75_RESETVAL (0x80000000u)
  20077. /* pri_hint_reg76 */
  20078. #define CSL_CPINTC_PRI_HINT_REG76_PRI_HINT_76_MASK (0x000003FFu)
  20079. #define CSL_CPINTC_PRI_HINT_REG76_PRI_HINT_76_SHIFT (0x00000000u)
  20080. #define CSL_CPINTC_PRI_HINT_REG76_PRI_HINT_76_RESETVAL (0x00000000u)
  20081. #define CSL_CPINTC_PRI_HINT_REG76_NONE_HINT_76_MASK (0x80000000u)
  20082. #define CSL_CPINTC_PRI_HINT_REG76_NONE_HINT_76_SHIFT (0x0000001Fu)
  20083. #define CSL_CPINTC_PRI_HINT_REG76_NONE_HINT_76_RESETVAL (0x00000001u)
  20084. #define CSL_CPINTC_PRI_HINT_REG76_RESETVAL (0x80000000u)
  20085. /* pri_hint_reg77 */
  20086. #define CSL_CPINTC_PRI_HINT_REG77_PRI_HINT_77_MASK (0x000003FFu)
  20087. #define CSL_CPINTC_PRI_HINT_REG77_PRI_HINT_77_SHIFT (0x00000000u)
  20088. #define CSL_CPINTC_PRI_HINT_REG77_PRI_HINT_77_RESETVAL (0x00000000u)
  20089. #define CSL_CPINTC_PRI_HINT_REG77_NONE_HINT_77_MASK (0x80000000u)
  20090. #define CSL_CPINTC_PRI_HINT_REG77_NONE_HINT_77_SHIFT (0x0000001Fu)
  20091. #define CSL_CPINTC_PRI_HINT_REG77_NONE_HINT_77_RESETVAL (0x00000001u)
  20092. #define CSL_CPINTC_PRI_HINT_REG77_RESETVAL (0x80000000u)
  20093. /* pri_hint_reg78 */
  20094. #define CSL_CPINTC_PRI_HINT_REG78_PRI_HINT_78_MASK (0x000003FFu)
  20095. #define CSL_CPINTC_PRI_HINT_REG78_PRI_HINT_78_SHIFT (0x00000000u)
  20096. #define CSL_CPINTC_PRI_HINT_REG78_PRI_HINT_78_RESETVAL (0x00000000u)
  20097. #define CSL_CPINTC_PRI_HINT_REG78_NONE_HINT_78_MASK (0x80000000u)
  20098. #define CSL_CPINTC_PRI_HINT_REG78_NONE_HINT_78_SHIFT (0x0000001Fu)
  20099. #define CSL_CPINTC_PRI_HINT_REG78_NONE_HINT_78_RESETVAL (0x00000001u)
  20100. #define CSL_CPINTC_PRI_HINT_REG78_RESETVAL (0x80000000u)
  20101. /* pri_hint_reg79 */
  20102. #define CSL_CPINTC_PRI_HINT_REG79_PRI_HINT_79_MASK (0x000003FFu)
  20103. #define CSL_CPINTC_PRI_HINT_REG79_PRI_HINT_79_SHIFT (0x00000000u)
  20104. #define CSL_CPINTC_PRI_HINT_REG79_PRI_HINT_79_RESETVAL (0x00000000u)
  20105. #define CSL_CPINTC_PRI_HINT_REG79_NONE_HINT_79_MASK (0x80000000u)
  20106. #define CSL_CPINTC_PRI_HINT_REG79_NONE_HINT_79_SHIFT (0x0000001Fu)
  20107. #define CSL_CPINTC_PRI_HINT_REG79_NONE_HINT_79_RESETVAL (0x00000001u)
  20108. #define CSL_CPINTC_PRI_HINT_REG79_RESETVAL (0x80000000u)
  20109. /* pri_hint_reg80 */
  20110. #define CSL_CPINTC_PRI_HINT_REG80_PRI_HINT_80_MASK (0x000003FFu)
  20111. #define CSL_CPINTC_PRI_HINT_REG80_PRI_HINT_80_SHIFT (0x00000000u)
  20112. #define CSL_CPINTC_PRI_HINT_REG80_PRI_HINT_80_RESETVAL (0x00000000u)
  20113. #define CSL_CPINTC_PRI_HINT_REG80_NONE_HINT_80_MASK (0x80000000u)
  20114. #define CSL_CPINTC_PRI_HINT_REG80_NONE_HINT_80_SHIFT (0x0000001Fu)
  20115. #define CSL_CPINTC_PRI_HINT_REG80_NONE_HINT_80_RESETVAL (0x00000001u)
  20116. #define CSL_CPINTC_PRI_HINT_REG80_RESETVAL (0x80000000u)
  20117. /* pri_hint_reg81 */
  20118. #define CSL_CPINTC_PRI_HINT_REG81_PRI_HINT_81_MASK (0x000003FFu)
  20119. #define CSL_CPINTC_PRI_HINT_REG81_PRI_HINT_81_SHIFT (0x00000000u)
  20120. #define CSL_CPINTC_PRI_HINT_REG81_PRI_HINT_81_RESETVAL (0x00000000u)
  20121. #define CSL_CPINTC_PRI_HINT_REG81_NONE_HINT_81_MASK (0x80000000u)
  20122. #define CSL_CPINTC_PRI_HINT_REG81_NONE_HINT_81_SHIFT (0x0000001Fu)
  20123. #define CSL_CPINTC_PRI_HINT_REG81_NONE_HINT_81_RESETVAL (0x00000001u)
  20124. #define CSL_CPINTC_PRI_HINT_REG81_RESETVAL (0x80000000u)
  20125. /* pri_hint_reg82 */
  20126. #define CSL_CPINTC_PRI_HINT_REG82_PRI_HINT_82_MASK (0x000003FFu)
  20127. #define CSL_CPINTC_PRI_HINT_REG82_PRI_HINT_82_SHIFT (0x00000000u)
  20128. #define CSL_CPINTC_PRI_HINT_REG82_PRI_HINT_82_RESETVAL (0x00000000u)
  20129. #define CSL_CPINTC_PRI_HINT_REG82_NONE_HINT_82_MASK (0x80000000u)
  20130. #define CSL_CPINTC_PRI_HINT_REG82_NONE_HINT_82_SHIFT (0x0000001Fu)
  20131. #define CSL_CPINTC_PRI_HINT_REG82_NONE_HINT_82_RESETVAL (0x00000001u)
  20132. #define CSL_CPINTC_PRI_HINT_REG82_RESETVAL (0x80000000u)
  20133. /* pri_hint_reg83 */
  20134. #define CSL_CPINTC_PRI_HINT_REG83_PRI_HINT_83_MASK (0x000003FFu)
  20135. #define CSL_CPINTC_PRI_HINT_REG83_PRI_HINT_83_SHIFT (0x00000000u)
  20136. #define CSL_CPINTC_PRI_HINT_REG83_PRI_HINT_83_RESETVAL (0x00000000u)
  20137. #define CSL_CPINTC_PRI_HINT_REG83_NONE_HINT_83_MASK (0x80000000u)
  20138. #define CSL_CPINTC_PRI_HINT_REG83_NONE_HINT_83_SHIFT (0x0000001Fu)
  20139. #define CSL_CPINTC_PRI_HINT_REG83_NONE_HINT_83_RESETVAL (0x00000001u)
  20140. #define CSL_CPINTC_PRI_HINT_REG83_RESETVAL (0x80000000u)
  20141. /* pri_hint_reg84 */
  20142. #define CSL_CPINTC_PRI_HINT_REG84_PRI_HINT_84_MASK (0x000003FFu)
  20143. #define CSL_CPINTC_PRI_HINT_REG84_PRI_HINT_84_SHIFT (0x00000000u)
  20144. #define CSL_CPINTC_PRI_HINT_REG84_PRI_HINT_84_RESETVAL (0x00000000u)
  20145. #define CSL_CPINTC_PRI_HINT_REG84_NONE_HINT_84_MASK (0x80000000u)
  20146. #define CSL_CPINTC_PRI_HINT_REG84_NONE_HINT_84_SHIFT (0x0000001Fu)
  20147. #define CSL_CPINTC_PRI_HINT_REG84_NONE_HINT_84_RESETVAL (0x00000001u)
  20148. #define CSL_CPINTC_PRI_HINT_REG84_RESETVAL (0x80000000u)
  20149. /* pri_hint_reg85 */
  20150. #define CSL_CPINTC_PRI_HINT_REG85_PRI_HINT_85_MASK (0x000003FFu)
  20151. #define CSL_CPINTC_PRI_HINT_REG85_PRI_HINT_85_SHIFT (0x00000000u)
  20152. #define CSL_CPINTC_PRI_HINT_REG85_PRI_HINT_85_RESETVAL (0x00000000u)
  20153. #define CSL_CPINTC_PRI_HINT_REG85_NONE_HINT_85_MASK (0x80000000u)
  20154. #define CSL_CPINTC_PRI_HINT_REG85_NONE_HINT_85_SHIFT (0x0000001Fu)
  20155. #define CSL_CPINTC_PRI_HINT_REG85_NONE_HINT_85_RESETVAL (0x00000001u)
  20156. #define CSL_CPINTC_PRI_HINT_REG85_RESETVAL (0x80000000u)
  20157. /* pri_hint_reg86 */
  20158. #define CSL_CPINTC_PRI_HINT_REG86_PRI_HINT_86_MASK (0x000003FFu)
  20159. #define CSL_CPINTC_PRI_HINT_REG86_PRI_HINT_86_SHIFT (0x00000000u)
  20160. #define CSL_CPINTC_PRI_HINT_REG86_PRI_HINT_86_RESETVAL (0x00000000u)
  20161. #define CSL_CPINTC_PRI_HINT_REG86_NONE_HINT_86_MASK (0x80000000u)
  20162. #define CSL_CPINTC_PRI_HINT_REG86_NONE_HINT_86_SHIFT (0x0000001Fu)
  20163. #define CSL_CPINTC_PRI_HINT_REG86_NONE_HINT_86_RESETVAL (0x00000001u)
  20164. #define CSL_CPINTC_PRI_HINT_REG86_RESETVAL (0x80000000u)
  20165. /* pri_hint_reg87 */
  20166. #define CSL_CPINTC_PRI_HINT_REG87_PRI_HINT_87_MASK (0x000003FFu)
  20167. #define CSL_CPINTC_PRI_HINT_REG87_PRI_HINT_87_SHIFT (0x00000000u)
  20168. #define CSL_CPINTC_PRI_HINT_REG87_PRI_HINT_87_RESETVAL (0x00000000u)
  20169. #define CSL_CPINTC_PRI_HINT_REG87_NONE_HINT_87_MASK (0x80000000u)
  20170. #define CSL_CPINTC_PRI_HINT_REG87_NONE_HINT_87_SHIFT (0x0000001Fu)
  20171. #define CSL_CPINTC_PRI_HINT_REG87_NONE_HINT_87_RESETVAL (0x00000001u)
  20172. #define CSL_CPINTC_PRI_HINT_REG87_RESETVAL (0x80000000u)
  20173. /* pri_hint_reg88 */
  20174. #define CSL_CPINTC_PRI_HINT_REG88_PRI_HINT_88_MASK (0x000003FFu)
  20175. #define CSL_CPINTC_PRI_HINT_REG88_PRI_HINT_88_SHIFT (0x00000000u)
  20176. #define CSL_CPINTC_PRI_HINT_REG88_PRI_HINT_88_RESETVAL (0x00000000u)
  20177. #define CSL_CPINTC_PRI_HINT_REG88_NONE_HINT_88_MASK (0x80000000u)
  20178. #define CSL_CPINTC_PRI_HINT_REG88_NONE_HINT_88_SHIFT (0x0000001Fu)
  20179. #define CSL_CPINTC_PRI_HINT_REG88_NONE_HINT_88_RESETVAL (0x00000001u)
  20180. #define CSL_CPINTC_PRI_HINT_REG88_RESETVAL (0x80000000u)
  20181. /* pri_hint_reg89 */
  20182. #define CSL_CPINTC_PRI_HINT_REG89_PRI_HINT_89_MASK (0x000003FFu)
  20183. #define CSL_CPINTC_PRI_HINT_REG89_PRI_HINT_89_SHIFT (0x00000000u)
  20184. #define CSL_CPINTC_PRI_HINT_REG89_PRI_HINT_89_RESETVAL (0x00000000u)
  20185. #define CSL_CPINTC_PRI_HINT_REG89_NONE_HINT_89_MASK (0x80000000u)
  20186. #define CSL_CPINTC_PRI_HINT_REG89_NONE_HINT_89_SHIFT (0x0000001Fu)
  20187. #define CSL_CPINTC_PRI_HINT_REG89_NONE_HINT_89_RESETVAL (0x00000001u)
  20188. #define CSL_CPINTC_PRI_HINT_REG89_RESETVAL (0x80000000u)
  20189. /* pri_hint_reg90 */
  20190. #define CSL_CPINTC_PRI_HINT_REG90_PRI_HINT_90_MASK (0x000003FFu)
  20191. #define CSL_CPINTC_PRI_HINT_REG90_PRI_HINT_90_SHIFT (0x00000000u)
  20192. #define CSL_CPINTC_PRI_HINT_REG90_PRI_HINT_90_RESETVAL (0x00000000u)
  20193. #define CSL_CPINTC_PRI_HINT_REG90_NONE_HINT_90_MASK (0x80000000u)
  20194. #define CSL_CPINTC_PRI_HINT_REG90_NONE_HINT_90_SHIFT (0x0000001Fu)
  20195. #define CSL_CPINTC_PRI_HINT_REG90_NONE_HINT_90_RESETVAL (0x00000001u)
  20196. #define CSL_CPINTC_PRI_HINT_REG90_RESETVAL (0x80000000u)
  20197. /* pri_hint_reg91 */
  20198. #define CSL_CPINTC_PRI_HINT_REG91_PRI_HINT_91_MASK (0x000003FFu)
  20199. #define CSL_CPINTC_PRI_HINT_REG91_PRI_HINT_91_SHIFT (0x00000000u)
  20200. #define CSL_CPINTC_PRI_HINT_REG91_PRI_HINT_91_RESETVAL (0x00000000u)
  20201. #define CSL_CPINTC_PRI_HINT_REG91_NONE_HINT_91_MASK (0x80000000u)
  20202. #define CSL_CPINTC_PRI_HINT_REG91_NONE_HINT_91_SHIFT (0x0000001Fu)
  20203. #define CSL_CPINTC_PRI_HINT_REG91_NONE_HINT_91_RESETVAL (0x00000001u)
  20204. #define CSL_CPINTC_PRI_HINT_REG91_RESETVAL (0x80000000u)
  20205. /* pri_hint_reg92 */
  20206. #define CSL_CPINTC_PRI_HINT_REG92_PRI_HINT_92_MASK (0x000003FFu)
  20207. #define CSL_CPINTC_PRI_HINT_REG92_PRI_HINT_92_SHIFT (0x00000000u)
  20208. #define CSL_CPINTC_PRI_HINT_REG92_PRI_HINT_92_RESETVAL (0x00000000u)
  20209. #define CSL_CPINTC_PRI_HINT_REG92_NONE_HINT_92_MASK (0x80000000u)
  20210. #define CSL_CPINTC_PRI_HINT_REG92_NONE_HINT_92_SHIFT (0x0000001Fu)
  20211. #define CSL_CPINTC_PRI_HINT_REG92_NONE_HINT_92_RESETVAL (0x00000001u)
  20212. #define CSL_CPINTC_PRI_HINT_REG92_RESETVAL (0x80000000u)
  20213. /* pri_hint_reg93 */
  20214. #define CSL_CPINTC_PRI_HINT_REG93_PRI_HINT_93_MASK (0x000003FFu)
  20215. #define CSL_CPINTC_PRI_HINT_REG93_PRI_HINT_93_SHIFT (0x00000000u)
  20216. #define CSL_CPINTC_PRI_HINT_REG93_PRI_HINT_93_RESETVAL (0x00000000u)
  20217. #define CSL_CPINTC_PRI_HINT_REG93_NONE_HINT_93_MASK (0x80000000u)
  20218. #define CSL_CPINTC_PRI_HINT_REG93_NONE_HINT_93_SHIFT (0x0000001Fu)
  20219. #define CSL_CPINTC_PRI_HINT_REG93_NONE_HINT_93_RESETVAL (0x00000001u)
  20220. #define CSL_CPINTC_PRI_HINT_REG93_RESETVAL (0x80000000u)
  20221. /* pri_hint_reg94 */
  20222. #define CSL_CPINTC_PRI_HINT_REG94_PRI_HINT_94_MASK (0x000003FFu)
  20223. #define CSL_CPINTC_PRI_HINT_REG94_PRI_HINT_94_SHIFT (0x00000000u)
  20224. #define CSL_CPINTC_PRI_HINT_REG94_PRI_HINT_94_RESETVAL (0x00000000u)
  20225. #define CSL_CPINTC_PRI_HINT_REG94_NONE_HINT_94_MASK (0x80000000u)
  20226. #define CSL_CPINTC_PRI_HINT_REG94_NONE_HINT_94_SHIFT (0x0000001Fu)
  20227. #define CSL_CPINTC_PRI_HINT_REG94_NONE_HINT_94_RESETVAL (0x00000001u)
  20228. #define CSL_CPINTC_PRI_HINT_REG94_RESETVAL (0x80000000u)
  20229. /* pri_hint_reg95 */
  20230. #define CSL_CPINTC_PRI_HINT_REG95_PRI_HINT_95_MASK (0x000003FFu)
  20231. #define CSL_CPINTC_PRI_HINT_REG95_PRI_HINT_95_SHIFT (0x00000000u)
  20232. #define CSL_CPINTC_PRI_HINT_REG95_PRI_HINT_95_RESETVAL (0x00000000u)
  20233. #define CSL_CPINTC_PRI_HINT_REG95_NONE_HINT_95_MASK (0x80000000u)
  20234. #define CSL_CPINTC_PRI_HINT_REG95_NONE_HINT_95_SHIFT (0x0000001Fu)
  20235. #define CSL_CPINTC_PRI_HINT_REG95_NONE_HINT_95_RESETVAL (0x00000001u)
  20236. #define CSL_CPINTC_PRI_HINT_REG95_RESETVAL (0x80000000u)
  20237. /* pri_hint_reg96 */
  20238. #define CSL_CPINTC_PRI_HINT_REG96_PRI_HINT_96_MASK (0x000003FFu)
  20239. #define CSL_CPINTC_PRI_HINT_REG96_PRI_HINT_96_SHIFT (0x00000000u)
  20240. #define CSL_CPINTC_PRI_HINT_REG96_PRI_HINT_96_RESETVAL (0x00000000u)
  20241. #define CSL_CPINTC_PRI_HINT_REG96_NONE_HINT_96_MASK (0x80000000u)
  20242. #define CSL_CPINTC_PRI_HINT_REG96_NONE_HINT_96_SHIFT (0x0000001Fu)
  20243. #define CSL_CPINTC_PRI_HINT_REG96_NONE_HINT_96_RESETVAL (0x00000001u)
  20244. #define CSL_CPINTC_PRI_HINT_REG96_RESETVAL (0x80000000u)
  20245. /* pri_hint_reg97 */
  20246. #define CSL_CPINTC_PRI_HINT_REG97_PRI_HINT_97_MASK (0x000003FFu)
  20247. #define CSL_CPINTC_PRI_HINT_REG97_PRI_HINT_97_SHIFT (0x00000000u)
  20248. #define CSL_CPINTC_PRI_HINT_REG97_PRI_HINT_97_RESETVAL (0x00000000u)
  20249. #define CSL_CPINTC_PRI_HINT_REG97_NONE_HINT_97_MASK (0x80000000u)
  20250. #define CSL_CPINTC_PRI_HINT_REG97_NONE_HINT_97_SHIFT (0x0000001Fu)
  20251. #define CSL_CPINTC_PRI_HINT_REG97_NONE_HINT_97_RESETVAL (0x00000001u)
  20252. #define CSL_CPINTC_PRI_HINT_REG97_RESETVAL (0x80000000u)
  20253. /* pri_hint_reg98 */
  20254. #define CSL_CPINTC_PRI_HINT_REG98_PRI_HINT_98_MASK (0x000003FFu)
  20255. #define CSL_CPINTC_PRI_HINT_REG98_PRI_HINT_98_SHIFT (0x00000000u)
  20256. #define CSL_CPINTC_PRI_HINT_REG98_PRI_HINT_98_RESETVAL (0x00000000u)
  20257. #define CSL_CPINTC_PRI_HINT_REG98_NONE_HINT_98_MASK (0x80000000u)
  20258. #define CSL_CPINTC_PRI_HINT_REG98_NONE_HINT_98_SHIFT (0x0000001Fu)
  20259. #define CSL_CPINTC_PRI_HINT_REG98_NONE_HINT_98_RESETVAL (0x00000001u)
  20260. #define CSL_CPINTC_PRI_HINT_REG98_RESETVAL (0x80000000u)
  20261. /* pri_hint_reg99 */
  20262. #define CSL_CPINTC_PRI_HINT_REG99_PRI_HINT_99_MASK (0x000003FFu)
  20263. #define CSL_CPINTC_PRI_HINT_REG99_PRI_HINT_99_SHIFT (0x00000000u)
  20264. #define CSL_CPINTC_PRI_HINT_REG99_PRI_HINT_99_RESETVAL (0x00000000u)
  20265. #define CSL_CPINTC_PRI_HINT_REG99_NONE_HINT_99_MASK (0x80000000u)
  20266. #define CSL_CPINTC_PRI_HINT_REG99_NONE_HINT_99_SHIFT (0x0000001Fu)
  20267. #define CSL_CPINTC_PRI_HINT_REG99_NONE_HINT_99_RESETVAL (0x00000001u)
  20268. #define CSL_CPINTC_PRI_HINT_REG99_RESETVAL (0x80000000u)
  20269. /* pri_hint_reg100 */
  20270. #define CSL_CPINTC_PRI_HINT_REG100_PRI_HINT_100_MASK (0x000003FFu)
  20271. #define CSL_CPINTC_PRI_HINT_REG100_PRI_HINT_100_SHIFT (0x00000000u)
  20272. #define CSL_CPINTC_PRI_HINT_REG100_PRI_HINT_100_RESETVAL (0x00000000u)
  20273. #define CSL_CPINTC_PRI_HINT_REG100_NONE_HINT_100_MASK (0x80000000u)
  20274. #define CSL_CPINTC_PRI_HINT_REG100_NONE_HINT_100_SHIFT (0x0000001Fu)
  20275. #define CSL_CPINTC_PRI_HINT_REG100_NONE_HINT_100_RESETVAL (0x00000001u)
  20276. #define CSL_CPINTC_PRI_HINT_REG100_RESETVAL (0x80000000u)
  20277. /* pri_hint_reg101 */
  20278. #define CSL_CPINTC_PRI_HINT_REG101_PRI_HINT_101_MASK (0x000003FFu)
  20279. #define CSL_CPINTC_PRI_HINT_REG101_PRI_HINT_101_SHIFT (0x00000000u)
  20280. #define CSL_CPINTC_PRI_HINT_REG101_PRI_HINT_101_RESETVAL (0x00000000u)
  20281. #define CSL_CPINTC_PRI_HINT_REG101_NONE_HINT_101_MASK (0x80000000u)
  20282. #define CSL_CPINTC_PRI_HINT_REG101_NONE_HINT_101_SHIFT (0x0000001Fu)
  20283. #define CSL_CPINTC_PRI_HINT_REG101_NONE_HINT_101_RESETVAL (0x00000001u)
  20284. #define CSL_CPINTC_PRI_HINT_REG101_RESETVAL (0x80000000u)
  20285. /* pri_hint_reg102 */
  20286. #define CSL_CPINTC_PRI_HINT_REG102_PRI_HINT_102_MASK (0x000003FFu)
  20287. #define CSL_CPINTC_PRI_HINT_REG102_PRI_HINT_102_SHIFT (0x00000000u)
  20288. #define CSL_CPINTC_PRI_HINT_REG102_PRI_HINT_102_RESETVAL (0x00000000u)
  20289. #define CSL_CPINTC_PRI_HINT_REG102_NONE_HINT_102_MASK (0x80000000u)
  20290. #define CSL_CPINTC_PRI_HINT_REG102_NONE_HINT_102_SHIFT (0x0000001Fu)
  20291. #define CSL_CPINTC_PRI_HINT_REG102_NONE_HINT_102_RESETVAL (0x00000001u)
  20292. #define CSL_CPINTC_PRI_HINT_REG102_RESETVAL (0x80000000u)
  20293. /* pri_hint_reg103 */
  20294. #define CSL_CPINTC_PRI_HINT_REG103_PRI_HINT_103_MASK (0x000003FFu)
  20295. #define CSL_CPINTC_PRI_HINT_REG103_PRI_HINT_103_SHIFT (0x00000000u)
  20296. #define CSL_CPINTC_PRI_HINT_REG103_PRI_HINT_103_RESETVAL (0x00000000u)
  20297. #define CSL_CPINTC_PRI_HINT_REG103_NONE_HINT_103_MASK (0x80000000u)
  20298. #define CSL_CPINTC_PRI_HINT_REG103_NONE_HINT_103_SHIFT (0x0000001Fu)
  20299. #define CSL_CPINTC_PRI_HINT_REG103_NONE_HINT_103_RESETVAL (0x00000001u)
  20300. #define CSL_CPINTC_PRI_HINT_REG103_RESETVAL (0x80000000u)
  20301. /* pri_hint_reg104 */
  20302. #define CSL_CPINTC_PRI_HINT_REG104_PRI_HINT_104_MASK (0x000003FFu)
  20303. #define CSL_CPINTC_PRI_HINT_REG104_PRI_HINT_104_SHIFT (0x00000000u)
  20304. #define CSL_CPINTC_PRI_HINT_REG104_PRI_HINT_104_RESETVAL (0x00000000u)
  20305. #define CSL_CPINTC_PRI_HINT_REG104_NONE_HINT_104_MASK (0x80000000u)
  20306. #define CSL_CPINTC_PRI_HINT_REG104_NONE_HINT_104_SHIFT (0x0000001Fu)
  20307. #define CSL_CPINTC_PRI_HINT_REG104_NONE_HINT_104_RESETVAL (0x00000001u)
  20308. #define CSL_CPINTC_PRI_HINT_REG104_RESETVAL (0x80000000u)
  20309. /* pri_hint_reg105 */
  20310. #define CSL_CPINTC_PRI_HINT_REG105_PRI_HINT_105_MASK (0x000003FFu)
  20311. #define CSL_CPINTC_PRI_HINT_REG105_PRI_HINT_105_SHIFT (0x00000000u)
  20312. #define CSL_CPINTC_PRI_HINT_REG105_PRI_HINT_105_RESETVAL (0x00000000u)
  20313. #define CSL_CPINTC_PRI_HINT_REG105_NONE_HINT_105_MASK (0x80000000u)
  20314. #define CSL_CPINTC_PRI_HINT_REG105_NONE_HINT_105_SHIFT (0x0000001Fu)
  20315. #define CSL_CPINTC_PRI_HINT_REG105_NONE_HINT_105_RESETVAL (0x00000001u)
  20316. #define CSL_CPINTC_PRI_HINT_REG105_RESETVAL (0x80000000u)
  20317. /* pri_hint_reg106 */
  20318. #define CSL_CPINTC_PRI_HINT_REG106_PRI_HINT_106_MASK (0x000003FFu)
  20319. #define CSL_CPINTC_PRI_HINT_REG106_PRI_HINT_106_SHIFT (0x00000000u)
  20320. #define CSL_CPINTC_PRI_HINT_REG106_PRI_HINT_106_RESETVAL (0x00000000u)
  20321. #define CSL_CPINTC_PRI_HINT_REG106_NONE_HINT_106_MASK (0x80000000u)
  20322. #define CSL_CPINTC_PRI_HINT_REG106_NONE_HINT_106_SHIFT (0x0000001Fu)
  20323. #define CSL_CPINTC_PRI_HINT_REG106_NONE_HINT_106_RESETVAL (0x00000001u)
  20324. #define CSL_CPINTC_PRI_HINT_REG106_RESETVAL (0x80000000u)
  20325. /* pri_hint_reg107 */
  20326. #define CSL_CPINTC_PRI_HINT_REG107_PRI_HINT_107_MASK (0x000003FFu)
  20327. #define CSL_CPINTC_PRI_HINT_REG107_PRI_HINT_107_SHIFT (0x00000000u)
  20328. #define CSL_CPINTC_PRI_HINT_REG107_PRI_HINT_107_RESETVAL (0x00000000u)
  20329. #define CSL_CPINTC_PRI_HINT_REG107_NONE_HINT_107_MASK (0x80000000u)
  20330. #define CSL_CPINTC_PRI_HINT_REG107_NONE_HINT_107_SHIFT (0x0000001Fu)
  20331. #define CSL_CPINTC_PRI_HINT_REG107_NONE_HINT_107_RESETVAL (0x00000001u)
  20332. #define CSL_CPINTC_PRI_HINT_REG107_RESETVAL (0x80000000u)
  20333. /* pri_hint_reg108 */
  20334. #define CSL_CPINTC_PRI_HINT_REG108_PRI_HINT_108_MASK (0x000003FFu)
  20335. #define CSL_CPINTC_PRI_HINT_REG108_PRI_HINT_108_SHIFT (0x00000000u)
  20336. #define CSL_CPINTC_PRI_HINT_REG108_PRI_HINT_108_RESETVAL (0x00000000u)
  20337. #define CSL_CPINTC_PRI_HINT_REG108_NONE_HINT_108_MASK (0x80000000u)
  20338. #define CSL_CPINTC_PRI_HINT_REG108_NONE_HINT_108_SHIFT (0x0000001Fu)
  20339. #define CSL_CPINTC_PRI_HINT_REG108_NONE_HINT_108_RESETVAL (0x00000001u)
  20340. #define CSL_CPINTC_PRI_HINT_REG108_RESETVAL (0x80000000u)
  20341. /* pri_hint_reg109 */
  20342. #define CSL_CPINTC_PRI_HINT_REG109_PRI_HINT_109_MASK (0x000003FFu)
  20343. #define CSL_CPINTC_PRI_HINT_REG109_PRI_HINT_109_SHIFT (0x00000000u)
  20344. #define CSL_CPINTC_PRI_HINT_REG109_PRI_HINT_109_RESETVAL (0x00000000u)
  20345. #define CSL_CPINTC_PRI_HINT_REG109_NONE_HINT_109_MASK (0x80000000u)
  20346. #define CSL_CPINTC_PRI_HINT_REG109_NONE_HINT_109_SHIFT (0x0000001Fu)
  20347. #define CSL_CPINTC_PRI_HINT_REG109_NONE_HINT_109_RESETVAL (0x00000001u)
  20348. #define CSL_CPINTC_PRI_HINT_REG109_RESETVAL (0x80000000u)
  20349. /* pri_hint_reg110 */
  20350. #define CSL_CPINTC_PRI_HINT_REG110_PRI_HINT_110_MASK (0x000003FFu)
  20351. #define CSL_CPINTC_PRI_HINT_REG110_PRI_HINT_110_SHIFT (0x00000000u)
  20352. #define CSL_CPINTC_PRI_HINT_REG110_PRI_HINT_110_RESETVAL (0x00000000u)
  20353. #define CSL_CPINTC_PRI_HINT_REG110_NONE_HINT_110_MASK (0x80000000u)
  20354. #define CSL_CPINTC_PRI_HINT_REG110_NONE_HINT_110_SHIFT (0x0000001Fu)
  20355. #define CSL_CPINTC_PRI_HINT_REG110_NONE_HINT_110_RESETVAL (0x00000001u)
  20356. #define CSL_CPINTC_PRI_HINT_REG110_RESETVAL (0x80000000u)
  20357. /* pri_hint_reg111 */
  20358. #define CSL_CPINTC_PRI_HINT_REG111_PRI_HINT_111_MASK (0x000003FFu)
  20359. #define CSL_CPINTC_PRI_HINT_REG111_PRI_HINT_111_SHIFT (0x00000000u)
  20360. #define CSL_CPINTC_PRI_HINT_REG111_PRI_HINT_111_RESETVAL (0x00000000u)
  20361. #define CSL_CPINTC_PRI_HINT_REG111_NONE_HINT_111_MASK (0x80000000u)
  20362. #define CSL_CPINTC_PRI_HINT_REG111_NONE_HINT_111_SHIFT (0x0000001Fu)
  20363. #define CSL_CPINTC_PRI_HINT_REG111_NONE_HINT_111_RESETVAL (0x00000001u)
  20364. #define CSL_CPINTC_PRI_HINT_REG111_RESETVAL (0x80000000u)
  20365. /* pri_hint_reg112 */
  20366. #define CSL_CPINTC_PRI_HINT_REG112_PRI_HINT_112_MASK (0x000003FFu)
  20367. #define CSL_CPINTC_PRI_HINT_REG112_PRI_HINT_112_SHIFT (0x00000000u)
  20368. #define CSL_CPINTC_PRI_HINT_REG112_PRI_HINT_112_RESETVAL (0x00000000u)
  20369. #define CSL_CPINTC_PRI_HINT_REG112_NONE_HINT_112_MASK (0x80000000u)
  20370. #define CSL_CPINTC_PRI_HINT_REG112_NONE_HINT_112_SHIFT (0x0000001Fu)
  20371. #define CSL_CPINTC_PRI_HINT_REG112_NONE_HINT_112_RESETVAL (0x00000001u)
  20372. #define CSL_CPINTC_PRI_HINT_REG112_RESETVAL (0x80000000u)
  20373. /* pri_hint_reg113 */
  20374. #define CSL_CPINTC_PRI_HINT_REG113_PRI_HINT_113_MASK (0x000003FFu)
  20375. #define CSL_CPINTC_PRI_HINT_REG113_PRI_HINT_113_SHIFT (0x00000000u)
  20376. #define CSL_CPINTC_PRI_HINT_REG113_PRI_HINT_113_RESETVAL (0x00000000u)
  20377. #define CSL_CPINTC_PRI_HINT_REG113_NONE_HINT_113_MASK (0x80000000u)
  20378. #define CSL_CPINTC_PRI_HINT_REG113_NONE_HINT_113_SHIFT (0x0000001Fu)
  20379. #define CSL_CPINTC_PRI_HINT_REG113_NONE_HINT_113_RESETVAL (0x00000001u)
  20380. #define CSL_CPINTC_PRI_HINT_REG113_RESETVAL (0x80000000u)
  20381. /* pri_hint_reg114 */
  20382. #define CSL_CPINTC_PRI_HINT_REG114_PRI_HINT_114_MASK (0x000003FFu)
  20383. #define CSL_CPINTC_PRI_HINT_REG114_PRI_HINT_114_SHIFT (0x00000000u)
  20384. #define CSL_CPINTC_PRI_HINT_REG114_PRI_HINT_114_RESETVAL (0x00000000u)
  20385. #define CSL_CPINTC_PRI_HINT_REG114_NONE_HINT_114_MASK (0x80000000u)
  20386. #define CSL_CPINTC_PRI_HINT_REG114_NONE_HINT_114_SHIFT (0x0000001Fu)
  20387. #define CSL_CPINTC_PRI_HINT_REG114_NONE_HINT_114_RESETVAL (0x00000001u)
  20388. #define CSL_CPINTC_PRI_HINT_REG114_RESETVAL (0x80000000u)
  20389. /* pri_hint_reg115 */
  20390. #define CSL_CPINTC_PRI_HINT_REG115_PRI_HINT_115_MASK (0x000003FFu)
  20391. #define CSL_CPINTC_PRI_HINT_REG115_PRI_HINT_115_SHIFT (0x00000000u)
  20392. #define CSL_CPINTC_PRI_HINT_REG115_PRI_HINT_115_RESETVAL (0x00000000u)
  20393. #define CSL_CPINTC_PRI_HINT_REG115_NONE_HINT_115_MASK (0x80000000u)
  20394. #define CSL_CPINTC_PRI_HINT_REG115_NONE_HINT_115_SHIFT (0x0000001Fu)
  20395. #define CSL_CPINTC_PRI_HINT_REG115_NONE_HINT_115_RESETVAL (0x00000001u)
  20396. #define CSL_CPINTC_PRI_HINT_REG115_RESETVAL (0x80000000u)
  20397. /* pri_hint_reg116 */
  20398. #define CSL_CPINTC_PRI_HINT_REG116_PRI_HINT_116_MASK (0x000003FFu)
  20399. #define CSL_CPINTC_PRI_HINT_REG116_PRI_HINT_116_SHIFT (0x00000000u)
  20400. #define CSL_CPINTC_PRI_HINT_REG116_PRI_HINT_116_RESETVAL (0x00000000u)
  20401. #define CSL_CPINTC_PRI_HINT_REG116_NONE_HINT_116_MASK (0x80000000u)
  20402. #define CSL_CPINTC_PRI_HINT_REG116_NONE_HINT_116_SHIFT (0x0000001Fu)
  20403. #define CSL_CPINTC_PRI_HINT_REG116_NONE_HINT_116_RESETVAL (0x00000001u)
  20404. #define CSL_CPINTC_PRI_HINT_REG116_RESETVAL (0x80000000u)
  20405. /* pri_hint_reg117 */
  20406. #define CSL_CPINTC_PRI_HINT_REG117_PRI_HINT_117_MASK (0x000003FFu)
  20407. #define CSL_CPINTC_PRI_HINT_REG117_PRI_HINT_117_SHIFT (0x00000000u)
  20408. #define CSL_CPINTC_PRI_HINT_REG117_PRI_HINT_117_RESETVAL (0x00000000u)
  20409. #define CSL_CPINTC_PRI_HINT_REG117_NONE_HINT_117_MASK (0x80000000u)
  20410. #define CSL_CPINTC_PRI_HINT_REG117_NONE_HINT_117_SHIFT (0x0000001Fu)
  20411. #define CSL_CPINTC_PRI_HINT_REG117_NONE_HINT_117_RESETVAL (0x00000001u)
  20412. #define CSL_CPINTC_PRI_HINT_REG117_RESETVAL (0x80000000u)
  20413. /* pri_hint_reg118 */
  20414. #define CSL_CPINTC_PRI_HINT_REG118_PRI_HINT_118_MASK (0x000003FFu)
  20415. #define CSL_CPINTC_PRI_HINT_REG118_PRI_HINT_118_SHIFT (0x00000000u)
  20416. #define CSL_CPINTC_PRI_HINT_REG118_PRI_HINT_118_RESETVAL (0x00000000u)
  20417. #define CSL_CPINTC_PRI_HINT_REG118_NONE_HINT_118_MASK (0x80000000u)
  20418. #define CSL_CPINTC_PRI_HINT_REG118_NONE_HINT_118_SHIFT (0x0000001Fu)
  20419. #define CSL_CPINTC_PRI_HINT_REG118_NONE_HINT_118_RESETVAL (0x00000001u)
  20420. #define CSL_CPINTC_PRI_HINT_REG118_RESETVAL (0x80000000u)
  20421. /* pri_hint_reg119 */
  20422. #define CSL_CPINTC_PRI_HINT_REG119_PRI_HINT_119_MASK (0x000003FFu)
  20423. #define CSL_CPINTC_PRI_HINT_REG119_PRI_HINT_119_SHIFT (0x00000000u)
  20424. #define CSL_CPINTC_PRI_HINT_REG119_PRI_HINT_119_RESETVAL (0x00000000u)
  20425. #define CSL_CPINTC_PRI_HINT_REG119_NONE_HINT_119_MASK (0x80000000u)
  20426. #define CSL_CPINTC_PRI_HINT_REG119_NONE_HINT_119_SHIFT (0x0000001Fu)
  20427. #define CSL_CPINTC_PRI_HINT_REG119_NONE_HINT_119_RESETVAL (0x00000001u)
  20428. #define CSL_CPINTC_PRI_HINT_REG119_RESETVAL (0x80000000u)
  20429. /* pri_hint_reg120 */
  20430. #define CSL_CPINTC_PRI_HINT_REG120_PRI_HINT_120_MASK (0x000003FFu)
  20431. #define CSL_CPINTC_PRI_HINT_REG120_PRI_HINT_120_SHIFT (0x00000000u)
  20432. #define CSL_CPINTC_PRI_HINT_REG120_PRI_HINT_120_RESETVAL (0x00000000u)
  20433. #define CSL_CPINTC_PRI_HINT_REG120_NONE_HINT_120_MASK (0x80000000u)
  20434. #define CSL_CPINTC_PRI_HINT_REG120_NONE_HINT_120_SHIFT (0x0000001Fu)
  20435. #define CSL_CPINTC_PRI_HINT_REG120_NONE_HINT_120_RESETVAL (0x00000001u)
  20436. #define CSL_CPINTC_PRI_HINT_REG120_RESETVAL (0x80000000u)
  20437. /* pri_hint_reg121 */
  20438. #define CSL_CPINTC_PRI_HINT_REG121_PRI_HINT_121_MASK (0x000003FFu)
  20439. #define CSL_CPINTC_PRI_HINT_REG121_PRI_HINT_121_SHIFT (0x00000000u)
  20440. #define CSL_CPINTC_PRI_HINT_REG121_PRI_HINT_121_RESETVAL (0x00000000u)
  20441. #define CSL_CPINTC_PRI_HINT_REG121_NONE_HINT_121_MASK (0x80000000u)
  20442. #define CSL_CPINTC_PRI_HINT_REG121_NONE_HINT_121_SHIFT (0x0000001Fu)
  20443. #define CSL_CPINTC_PRI_HINT_REG121_NONE_HINT_121_RESETVAL (0x00000001u)
  20444. #define CSL_CPINTC_PRI_HINT_REG121_RESETVAL (0x80000000u)
  20445. /* pri_hint_reg122 */
  20446. #define CSL_CPINTC_PRI_HINT_REG122_PRI_HINT_122_MASK (0x000003FFu)
  20447. #define CSL_CPINTC_PRI_HINT_REG122_PRI_HINT_122_SHIFT (0x00000000u)
  20448. #define CSL_CPINTC_PRI_HINT_REG122_PRI_HINT_122_RESETVAL (0x00000000u)
  20449. #define CSL_CPINTC_PRI_HINT_REG122_NONE_HINT_122_MASK (0x80000000u)
  20450. #define CSL_CPINTC_PRI_HINT_REG122_NONE_HINT_122_SHIFT (0x0000001Fu)
  20451. #define CSL_CPINTC_PRI_HINT_REG122_NONE_HINT_122_RESETVAL (0x00000001u)
  20452. #define CSL_CPINTC_PRI_HINT_REG122_RESETVAL (0x80000000u)
  20453. /* pri_hint_reg123 */
  20454. #define CSL_CPINTC_PRI_HINT_REG123_PRI_HINT_123_MASK (0x000003FFu)
  20455. #define CSL_CPINTC_PRI_HINT_REG123_PRI_HINT_123_SHIFT (0x00000000u)
  20456. #define CSL_CPINTC_PRI_HINT_REG123_PRI_HINT_123_RESETVAL (0x00000000u)
  20457. #define CSL_CPINTC_PRI_HINT_REG123_NONE_HINT_123_MASK (0x80000000u)
  20458. #define CSL_CPINTC_PRI_HINT_REG123_NONE_HINT_123_SHIFT (0x0000001Fu)
  20459. #define CSL_CPINTC_PRI_HINT_REG123_NONE_HINT_123_RESETVAL (0x00000001u)
  20460. #define CSL_CPINTC_PRI_HINT_REG123_RESETVAL (0x80000000u)
  20461. /* pri_hint_reg124 */
  20462. #define CSL_CPINTC_PRI_HINT_REG124_PRI_HINT_124_MASK (0x000003FFu)
  20463. #define CSL_CPINTC_PRI_HINT_REG124_PRI_HINT_124_SHIFT (0x00000000u)
  20464. #define CSL_CPINTC_PRI_HINT_REG124_PRI_HINT_124_RESETVAL (0x00000000u)
  20465. #define CSL_CPINTC_PRI_HINT_REG124_NONE_HINT_124_MASK (0x80000000u)
  20466. #define CSL_CPINTC_PRI_HINT_REG124_NONE_HINT_124_SHIFT (0x0000001Fu)
  20467. #define CSL_CPINTC_PRI_HINT_REG124_NONE_HINT_124_RESETVAL (0x00000001u)
  20468. #define CSL_CPINTC_PRI_HINT_REG124_RESETVAL (0x80000000u)
  20469. /* pri_hint_reg125 */
  20470. #define CSL_CPINTC_PRI_HINT_REG125_PRI_HINT_125_MASK (0x000003FFu)
  20471. #define CSL_CPINTC_PRI_HINT_REG125_PRI_HINT_125_SHIFT (0x00000000u)
  20472. #define CSL_CPINTC_PRI_HINT_REG125_PRI_HINT_125_RESETVAL (0x00000000u)
  20473. #define CSL_CPINTC_PRI_HINT_REG125_NONE_HINT_125_MASK (0x80000000u)
  20474. #define CSL_CPINTC_PRI_HINT_REG125_NONE_HINT_125_SHIFT (0x0000001Fu)
  20475. #define CSL_CPINTC_PRI_HINT_REG125_NONE_HINT_125_RESETVAL (0x00000001u)
  20476. #define CSL_CPINTC_PRI_HINT_REG125_RESETVAL (0x80000000u)
  20477. /* pri_hint_reg126 */
  20478. #define CSL_CPINTC_PRI_HINT_REG126_PRI_HINT_126_MASK (0x000003FFu)
  20479. #define CSL_CPINTC_PRI_HINT_REG126_PRI_HINT_126_SHIFT (0x00000000u)
  20480. #define CSL_CPINTC_PRI_HINT_REG126_PRI_HINT_126_RESETVAL (0x00000000u)
  20481. #define CSL_CPINTC_PRI_HINT_REG126_NONE_HINT_126_MASK (0x80000000u)
  20482. #define CSL_CPINTC_PRI_HINT_REG126_NONE_HINT_126_SHIFT (0x0000001Fu)
  20483. #define CSL_CPINTC_PRI_HINT_REG126_NONE_HINT_126_RESETVAL (0x00000001u)
  20484. #define CSL_CPINTC_PRI_HINT_REG126_RESETVAL (0x80000000u)
  20485. /* pri_hint_reg127 */
  20486. #define CSL_CPINTC_PRI_HINT_REG127_PRI_HINT_127_MASK (0x000003FFu)
  20487. #define CSL_CPINTC_PRI_HINT_REG127_PRI_HINT_127_SHIFT (0x00000000u)
  20488. #define CSL_CPINTC_PRI_HINT_REG127_PRI_HINT_127_RESETVAL (0x00000000u)
  20489. #define CSL_CPINTC_PRI_HINT_REG127_NONE_HINT_127_MASK (0x80000000u)
  20490. #define CSL_CPINTC_PRI_HINT_REG127_NONE_HINT_127_SHIFT (0x0000001Fu)
  20491. #define CSL_CPINTC_PRI_HINT_REG127_NONE_HINT_127_RESETVAL (0x00000001u)
  20492. #define CSL_CPINTC_PRI_HINT_REG127_RESETVAL (0x80000000u)
  20493. /* pri_hint_reg128 */
  20494. #define CSL_CPINTC_PRI_HINT_REG128_PRI_HINT_128_MASK (0x000003FFu)
  20495. #define CSL_CPINTC_PRI_HINT_REG128_PRI_HINT_128_SHIFT (0x00000000u)
  20496. #define CSL_CPINTC_PRI_HINT_REG128_PRI_HINT_128_RESETVAL (0x00000000u)
  20497. #define CSL_CPINTC_PRI_HINT_REG128_NONE_HINT_128_MASK (0x80000000u)
  20498. #define CSL_CPINTC_PRI_HINT_REG128_NONE_HINT_128_SHIFT (0x0000001Fu)
  20499. #define CSL_CPINTC_PRI_HINT_REG128_NONE_HINT_128_RESETVAL (0x00000001u)
  20500. #define CSL_CPINTC_PRI_HINT_REG128_RESETVAL (0x80000000u)
  20501. /* pri_hint_reg129 */
  20502. #define CSL_CPINTC_PRI_HINT_REG129_PRI_HINT_129_MASK (0x000003FFu)
  20503. #define CSL_CPINTC_PRI_HINT_REG129_PRI_HINT_129_SHIFT (0x00000000u)
  20504. #define CSL_CPINTC_PRI_HINT_REG129_PRI_HINT_129_RESETVAL (0x00000000u)
  20505. #define CSL_CPINTC_PRI_HINT_REG129_NONE_HINT_129_MASK (0x80000000u)
  20506. #define CSL_CPINTC_PRI_HINT_REG129_NONE_HINT_129_SHIFT (0x0000001Fu)
  20507. #define CSL_CPINTC_PRI_HINT_REG129_NONE_HINT_129_RESETVAL (0x00000001u)
  20508. #define CSL_CPINTC_PRI_HINT_REG129_RESETVAL (0x80000000u)
  20509. /* pri_hint_reg130 */
  20510. #define CSL_CPINTC_PRI_HINT_REG130_PRI_HINT_130_MASK (0x000003FFu)
  20511. #define CSL_CPINTC_PRI_HINT_REG130_PRI_HINT_130_SHIFT (0x00000000u)
  20512. #define CSL_CPINTC_PRI_HINT_REG130_PRI_HINT_130_RESETVAL (0x00000000u)
  20513. #define CSL_CPINTC_PRI_HINT_REG130_NONE_HINT_130_MASK (0x80000000u)
  20514. #define CSL_CPINTC_PRI_HINT_REG130_NONE_HINT_130_SHIFT (0x0000001Fu)
  20515. #define CSL_CPINTC_PRI_HINT_REG130_NONE_HINT_130_RESETVAL (0x00000001u)
  20516. #define CSL_CPINTC_PRI_HINT_REG130_RESETVAL (0x80000000u)
  20517. /* pri_hint_reg131 */
  20518. #define CSL_CPINTC_PRI_HINT_REG131_PRI_HINT_131_MASK (0x000003FFu)
  20519. #define CSL_CPINTC_PRI_HINT_REG131_PRI_HINT_131_SHIFT (0x00000000u)
  20520. #define CSL_CPINTC_PRI_HINT_REG131_PRI_HINT_131_RESETVAL (0x00000000u)
  20521. #define CSL_CPINTC_PRI_HINT_REG131_NONE_HINT_131_MASK (0x80000000u)
  20522. #define CSL_CPINTC_PRI_HINT_REG131_NONE_HINT_131_SHIFT (0x0000001Fu)
  20523. #define CSL_CPINTC_PRI_HINT_REG131_NONE_HINT_131_RESETVAL (0x00000001u)
  20524. #define CSL_CPINTC_PRI_HINT_REG131_RESETVAL (0x80000000u)
  20525. /* pri_hint_reg132 */
  20526. #define CSL_CPINTC_PRI_HINT_REG132_PRI_HINT_132_MASK (0x000003FFu)
  20527. #define CSL_CPINTC_PRI_HINT_REG132_PRI_HINT_132_SHIFT (0x00000000u)
  20528. #define CSL_CPINTC_PRI_HINT_REG132_PRI_HINT_132_RESETVAL (0x00000000u)
  20529. #define CSL_CPINTC_PRI_HINT_REG132_NONE_HINT_132_MASK (0x80000000u)
  20530. #define CSL_CPINTC_PRI_HINT_REG132_NONE_HINT_132_SHIFT (0x0000001Fu)
  20531. #define CSL_CPINTC_PRI_HINT_REG132_NONE_HINT_132_RESETVAL (0x00000001u)
  20532. #define CSL_CPINTC_PRI_HINT_REG132_RESETVAL (0x80000000u)
  20533. /* pri_hint_reg133 */
  20534. #define CSL_CPINTC_PRI_HINT_REG133_PRI_HINT_133_MASK (0x000003FFu)
  20535. #define CSL_CPINTC_PRI_HINT_REG133_PRI_HINT_133_SHIFT (0x00000000u)
  20536. #define CSL_CPINTC_PRI_HINT_REG133_PRI_HINT_133_RESETVAL (0x00000000u)
  20537. #define CSL_CPINTC_PRI_HINT_REG133_NONE_HINT_133_MASK (0x80000000u)
  20538. #define CSL_CPINTC_PRI_HINT_REG133_NONE_HINT_133_SHIFT (0x0000001Fu)
  20539. #define CSL_CPINTC_PRI_HINT_REG133_NONE_HINT_133_RESETVAL (0x00000001u)
  20540. #define CSL_CPINTC_PRI_HINT_REG133_RESETVAL (0x80000000u)
  20541. /* pri_hint_reg134 */
  20542. #define CSL_CPINTC_PRI_HINT_REG134_PRI_HINT_134_MASK (0x000003FFu)
  20543. #define CSL_CPINTC_PRI_HINT_REG134_PRI_HINT_134_SHIFT (0x00000000u)
  20544. #define CSL_CPINTC_PRI_HINT_REG134_PRI_HINT_134_RESETVAL (0x00000000u)
  20545. #define CSL_CPINTC_PRI_HINT_REG134_NONE_HINT_134_MASK (0x80000000u)
  20546. #define CSL_CPINTC_PRI_HINT_REG134_NONE_HINT_134_SHIFT (0x0000001Fu)
  20547. #define CSL_CPINTC_PRI_HINT_REG134_NONE_HINT_134_RESETVAL (0x00000001u)
  20548. #define CSL_CPINTC_PRI_HINT_REG134_RESETVAL (0x80000000u)
  20549. /* pri_hint_reg135 */
  20550. #define CSL_CPINTC_PRI_HINT_REG135_PRI_HINT_135_MASK (0x000003FFu)
  20551. #define CSL_CPINTC_PRI_HINT_REG135_PRI_HINT_135_SHIFT (0x00000000u)
  20552. #define CSL_CPINTC_PRI_HINT_REG135_PRI_HINT_135_RESETVAL (0x00000000u)
  20553. #define CSL_CPINTC_PRI_HINT_REG135_NONE_HINT_135_MASK (0x80000000u)
  20554. #define CSL_CPINTC_PRI_HINT_REG135_NONE_HINT_135_SHIFT (0x0000001Fu)
  20555. #define CSL_CPINTC_PRI_HINT_REG135_NONE_HINT_135_RESETVAL (0x00000001u)
  20556. #define CSL_CPINTC_PRI_HINT_REG135_RESETVAL (0x80000000u)
  20557. /* pri_hint_reg136 */
  20558. #define CSL_CPINTC_PRI_HINT_REG136_PRI_HINT_136_MASK (0x000003FFu)
  20559. #define CSL_CPINTC_PRI_HINT_REG136_PRI_HINT_136_SHIFT (0x00000000u)
  20560. #define CSL_CPINTC_PRI_HINT_REG136_PRI_HINT_136_RESETVAL (0x00000000u)
  20561. #define CSL_CPINTC_PRI_HINT_REG136_NONE_HINT_136_MASK (0x80000000u)
  20562. #define CSL_CPINTC_PRI_HINT_REG136_NONE_HINT_136_SHIFT (0x0000001Fu)
  20563. #define CSL_CPINTC_PRI_HINT_REG136_NONE_HINT_136_RESETVAL (0x00000001u)
  20564. #define CSL_CPINTC_PRI_HINT_REG136_RESETVAL (0x80000000u)
  20565. /* pri_hint_reg137 */
  20566. #define CSL_CPINTC_PRI_HINT_REG137_PRI_HINT_137_MASK (0x000003FFu)
  20567. #define CSL_CPINTC_PRI_HINT_REG137_PRI_HINT_137_SHIFT (0x00000000u)
  20568. #define CSL_CPINTC_PRI_HINT_REG137_PRI_HINT_137_RESETVAL (0x00000000u)
  20569. #define CSL_CPINTC_PRI_HINT_REG137_NONE_HINT_137_MASK (0x80000000u)
  20570. #define CSL_CPINTC_PRI_HINT_REG137_NONE_HINT_137_SHIFT (0x0000001Fu)
  20571. #define CSL_CPINTC_PRI_HINT_REG137_NONE_HINT_137_RESETVAL (0x00000001u)
  20572. #define CSL_CPINTC_PRI_HINT_REG137_RESETVAL (0x80000000u)
  20573. /* pri_hint_reg138 */
  20574. #define CSL_CPINTC_PRI_HINT_REG138_PRI_HINT_138_MASK (0x000003FFu)
  20575. #define CSL_CPINTC_PRI_HINT_REG138_PRI_HINT_138_SHIFT (0x00000000u)
  20576. #define CSL_CPINTC_PRI_HINT_REG138_PRI_HINT_138_RESETVAL (0x00000000u)
  20577. #define CSL_CPINTC_PRI_HINT_REG138_NONE_HINT_138_MASK (0x80000000u)
  20578. #define CSL_CPINTC_PRI_HINT_REG138_NONE_HINT_138_SHIFT (0x0000001Fu)
  20579. #define CSL_CPINTC_PRI_HINT_REG138_NONE_HINT_138_RESETVAL (0x00000001u)
  20580. #define CSL_CPINTC_PRI_HINT_REG138_RESETVAL (0x80000000u)
  20581. /* pri_hint_reg139 */
  20582. #define CSL_CPINTC_PRI_HINT_REG139_PRI_HINT_139_MASK (0x000003FFu)
  20583. #define CSL_CPINTC_PRI_HINT_REG139_PRI_HINT_139_SHIFT (0x00000000u)
  20584. #define CSL_CPINTC_PRI_HINT_REG139_PRI_HINT_139_RESETVAL (0x00000000u)
  20585. #define CSL_CPINTC_PRI_HINT_REG139_NONE_HINT_139_MASK (0x80000000u)
  20586. #define CSL_CPINTC_PRI_HINT_REG139_NONE_HINT_139_SHIFT (0x0000001Fu)
  20587. #define CSL_CPINTC_PRI_HINT_REG139_NONE_HINT_139_RESETVAL (0x00000001u)
  20588. #define CSL_CPINTC_PRI_HINT_REG139_RESETVAL (0x80000000u)
  20589. /* pri_hint_reg140 */
  20590. #define CSL_CPINTC_PRI_HINT_REG140_PRI_HINT_140_MASK (0x000003FFu)
  20591. #define CSL_CPINTC_PRI_HINT_REG140_PRI_HINT_140_SHIFT (0x00000000u)
  20592. #define CSL_CPINTC_PRI_HINT_REG140_PRI_HINT_140_RESETVAL (0x00000000u)
  20593. #define CSL_CPINTC_PRI_HINT_REG140_NONE_HINT_140_MASK (0x80000000u)
  20594. #define CSL_CPINTC_PRI_HINT_REG140_NONE_HINT_140_SHIFT (0x0000001Fu)
  20595. #define CSL_CPINTC_PRI_HINT_REG140_NONE_HINT_140_RESETVAL (0x00000001u)
  20596. #define CSL_CPINTC_PRI_HINT_REG140_RESETVAL (0x80000000u)
  20597. /* pri_hint_reg141 */
  20598. #define CSL_CPINTC_PRI_HINT_REG141_PRI_HINT_141_MASK (0x000003FFu)
  20599. #define CSL_CPINTC_PRI_HINT_REG141_PRI_HINT_141_SHIFT (0x00000000u)
  20600. #define CSL_CPINTC_PRI_HINT_REG141_PRI_HINT_141_RESETVAL (0x00000000u)
  20601. #define CSL_CPINTC_PRI_HINT_REG141_NONE_HINT_141_MASK (0x80000000u)
  20602. #define CSL_CPINTC_PRI_HINT_REG141_NONE_HINT_141_SHIFT (0x0000001Fu)
  20603. #define CSL_CPINTC_PRI_HINT_REG141_NONE_HINT_141_RESETVAL (0x00000001u)
  20604. #define CSL_CPINTC_PRI_HINT_REG141_RESETVAL (0x80000000u)
  20605. /* pri_hint_reg142 */
  20606. #define CSL_CPINTC_PRI_HINT_REG142_PRI_HINT_142_MASK (0x000003FFu)
  20607. #define CSL_CPINTC_PRI_HINT_REG142_PRI_HINT_142_SHIFT (0x00000000u)
  20608. #define CSL_CPINTC_PRI_HINT_REG142_PRI_HINT_142_RESETVAL (0x00000000u)
  20609. #define CSL_CPINTC_PRI_HINT_REG142_NONE_HINT_142_MASK (0x80000000u)
  20610. #define CSL_CPINTC_PRI_HINT_REG142_NONE_HINT_142_SHIFT (0x0000001Fu)
  20611. #define CSL_CPINTC_PRI_HINT_REG142_NONE_HINT_142_RESETVAL (0x00000001u)
  20612. #define CSL_CPINTC_PRI_HINT_REG142_RESETVAL (0x80000000u)
  20613. /* pri_hint_reg143 */
  20614. #define CSL_CPINTC_PRI_HINT_REG143_PRI_HINT_143_MASK (0x000003FFu)
  20615. #define CSL_CPINTC_PRI_HINT_REG143_PRI_HINT_143_SHIFT (0x00000000u)
  20616. #define CSL_CPINTC_PRI_HINT_REG143_PRI_HINT_143_RESETVAL (0x00000000u)
  20617. #define CSL_CPINTC_PRI_HINT_REG143_NONE_HINT_143_MASK (0x80000000u)
  20618. #define CSL_CPINTC_PRI_HINT_REG143_NONE_HINT_143_SHIFT (0x0000001Fu)
  20619. #define CSL_CPINTC_PRI_HINT_REG143_NONE_HINT_143_RESETVAL (0x00000001u)
  20620. #define CSL_CPINTC_PRI_HINT_REG143_RESETVAL (0x80000000u)
  20621. /* pri_hint_reg144 */
  20622. #define CSL_CPINTC_PRI_HINT_REG144_PRI_HINT_144_MASK (0x000003FFu)
  20623. #define CSL_CPINTC_PRI_HINT_REG144_PRI_HINT_144_SHIFT (0x00000000u)
  20624. #define CSL_CPINTC_PRI_HINT_REG144_PRI_HINT_144_RESETVAL (0x00000000u)
  20625. #define CSL_CPINTC_PRI_HINT_REG144_NONE_HINT_144_MASK (0x80000000u)
  20626. #define CSL_CPINTC_PRI_HINT_REG144_NONE_HINT_144_SHIFT (0x0000001Fu)
  20627. #define CSL_CPINTC_PRI_HINT_REG144_NONE_HINT_144_RESETVAL (0x00000001u)
  20628. #define CSL_CPINTC_PRI_HINT_REG144_RESETVAL (0x80000000u)
  20629. /* pri_hint_reg145 */
  20630. #define CSL_CPINTC_PRI_HINT_REG145_PRI_HINT_145_MASK (0x000003FFu)
  20631. #define CSL_CPINTC_PRI_HINT_REG145_PRI_HINT_145_SHIFT (0x00000000u)
  20632. #define CSL_CPINTC_PRI_HINT_REG145_PRI_HINT_145_RESETVAL (0x00000000u)
  20633. #define CSL_CPINTC_PRI_HINT_REG145_NONE_HINT_145_MASK (0x80000000u)
  20634. #define CSL_CPINTC_PRI_HINT_REG145_NONE_HINT_145_SHIFT (0x0000001Fu)
  20635. #define CSL_CPINTC_PRI_HINT_REG145_NONE_HINT_145_RESETVAL (0x00000001u)
  20636. #define CSL_CPINTC_PRI_HINT_REG145_RESETVAL (0x80000000u)
  20637. /* pri_hint_reg146 */
  20638. #define CSL_CPINTC_PRI_HINT_REG146_PRI_HINT_146_MASK (0x000003FFu)
  20639. #define CSL_CPINTC_PRI_HINT_REG146_PRI_HINT_146_SHIFT (0x00000000u)
  20640. #define CSL_CPINTC_PRI_HINT_REG146_PRI_HINT_146_RESETVAL (0x00000000u)
  20641. #define CSL_CPINTC_PRI_HINT_REG146_NONE_HINT_146_MASK (0x80000000u)
  20642. #define CSL_CPINTC_PRI_HINT_REG146_NONE_HINT_146_SHIFT (0x0000001Fu)
  20643. #define CSL_CPINTC_PRI_HINT_REG146_NONE_HINT_146_RESETVAL (0x00000001u)
  20644. #define CSL_CPINTC_PRI_HINT_REG146_RESETVAL (0x80000000u)
  20645. /* pri_hint_reg147 */
  20646. #define CSL_CPINTC_PRI_HINT_REG147_PRI_HINT_147_MASK (0x000003FFu)
  20647. #define CSL_CPINTC_PRI_HINT_REG147_PRI_HINT_147_SHIFT (0x00000000u)
  20648. #define CSL_CPINTC_PRI_HINT_REG147_PRI_HINT_147_RESETVAL (0x00000000u)
  20649. #define CSL_CPINTC_PRI_HINT_REG147_NONE_HINT_147_MASK (0x80000000u)
  20650. #define CSL_CPINTC_PRI_HINT_REG147_NONE_HINT_147_SHIFT (0x0000001Fu)
  20651. #define CSL_CPINTC_PRI_HINT_REG147_NONE_HINT_147_RESETVAL (0x00000001u)
  20652. #define CSL_CPINTC_PRI_HINT_REG147_RESETVAL (0x80000000u)
  20653. /* pri_hint_reg148 */
  20654. #define CSL_CPINTC_PRI_HINT_REG148_PRI_HINT_148_MASK (0x000003FFu)
  20655. #define CSL_CPINTC_PRI_HINT_REG148_PRI_HINT_148_SHIFT (0x00000000u)
  20656. #define CSL_CPINTC_PRI_HINT_REG148_PRI_HINT_148_RESETVAL (0x00000000u)
  20657. #define CSL_CPINTC_PRI_HINT_REG148_NONE_HINT_148_MASK (0x80000000u)
  20658. #define CSL_CPINTC_PRI_HINT_REG148_NONE_HINT_148_SHIFT (0x0000001Fu)
  20659. #define CSL_CPINTC_PRI_HINT_REG148_NONE_HINT_148_RESETVAL (0x00000001u)
  20660. #define CSL_CPINTC_PRI_HINT_REG148_RESETVAL (0x80000000u)
  20661. /* pri_hint_reg149 */
  20662. #define CSL_CPINTC_PRI_HINT_REG149_PRI_HINT_149_MASK (0x000003FFu)
  20663. #define CSL_CPINTC_PRI_HINT_REG149_PRI_HINT_149_SHIFT (0x00000000u)
  20664. #define CSL_CPINTC_PRI_HINT_REG149_PRI_HINT_149_RESETVAL (0x00000000u)
  20665. #define CSL_CPINTC_PRI_HINT_REG149_NONE_HINT_149_MASK (0x80000000u)
  20666. #define CSL_CPINTC_PRI_HINT_REG149_NONE_HINT_149_SHIFT (0x0000001Fu)
  20667. #define CSL_CPINTC_PRI_HINT_REG149_NONE_HINT_149_RESETVAL (0x00000001u)
  20668. #define CSL_CPINTC_PRI_HINT_REG149_RESETVAL (0x80000000u)
  20669. /* pri_hint_reg150 */
  20670. #define CSL_CPINTC_PRI_HINT_REG150_PRI_HINT_150_MASK (0x000003FFu)
  20671. #define CSL_CPINTC_PRI_HINT_REG150_PRI_HINT_150_SHIFT (0x00000000u)
  20672. #define CSL_CPINTC_PRI_HINT_REG150_PRI_HINT_150_RESETVAL (0x00000000u)
  20673. #define CSL_CPINTC_PRI_HINT_REG150_NONE_HINT_150_MASK (0x80000000u)
  20674. #define CSL_CPINTC_PRI_HINT_REG150_NONE_HINT_150_SHIFT (0x0000001Fu)
  20675. #define CSL_CPINTC_PRI_HINT_REG150_NONE_HINT_150_RESETVAL (0x00000001u)
  20676. #define CSL_CPINTC_PRI_HINT_REG150_RESETVAL (0x80000000u)
  20677. /* pri_hint_reg151 */
  20678. #define CSL_CPINTC_PRI_HINT_REG151_PRI_HINT_151_MASK (0x000003FFu)
  20679. #define CSL_CPINTC_PRI_HINT_REG151_PRI_HINT_151_SHIFT (0x00000000u)
  20680. #define CSL_CPINTC_PRI_HINT_REG151_PRI_HINT_151_RESETVAL (0x00000000u)
  20681. #define CSL_CPINTC_PRI_HINT_REG151_NONE_HINT_151_MASK (0x80000000u)
  20682. #define CSL_CPINTC_PRI_HINT_REG151_NONE_HINT_151_SHIFT (0x0000001Fu)
  20683. #define CSL_CPINTC_PRI_HINT_REG151_NONE_HINT_151_RESETVAL (0x00000001u)
  20684. #define CSL_CPINTC_PRI_HINT_REG151_RESETVAL (0x80000000u)
  20685. /* pri_hint_reg152 */
  20686. #define CSL_CPINTC_PRI_HINT_REG152_PRI_HINT_152_MASK (0x000003FFu)
  20687. #define CSL_CPINTC_PRI_HINT_REG152_PRI_HINT_152_SHIFT (0x00000000u)
  20688. #define CSL_CPINTC_PRI_HINT_REG152_PRI_HINT_152_RESETVAL (0x00000000u)
  20689. #define CSL_CPINTC_PRI_HINT_REG152_NONE_HINT_152_MASK (0x80000000u)
  20690. #define CSL_CPINTC_PRI_HINT_REG152_NONE_HINT_152_SHIFT (0x0000001Fu)
  20691. #define CSL_CPINTC_PRI_HINT_REG152_NONE_HINT_152_RESETVAL (0x00000001u)
  20692. #define CSL_CPINTC_PRI_HINT_REG152_RESETVAL (0x80000000u)
  20693. /* pri_hint_reg153 */
  20694. #define CSL_CPINTC_PRI_HINT_REG153_PRI_HINT_153_MASK (0x000003FFu)
  20695. #define CSL_CPINTC_PRI_HINT_REG153_PRI_HINT_153_SHIFT (0x00000000u)
  20696. #define CSL_CPINTC_PRI_HINT_REG153_PRI_HINT_153_RESETVAL (0x00000000u)
  20697. #define CSL_CPINTC_PRI_HINT_REG153_NONE_HINT_153_MASK (0x80000000u)
  20698. #define CSL_CPINTC_PRI_HINT_REG153_NONE_HINT_153_SHIFT (0x0000001Fu)
  20699. #define CSL_CPINTC_PRI_HINT_REG153_NONE_HINT_153_RESETVAL (0x00000001u)
  20700. #define CSL_CPINTC_PRI_HINT_REG153_RESETVAL (0x80000000u)
  20701. /* pri_hint_reg154 */
  20702. #define CSL_CPINTC_PRI_HINT_REG154_PRI_HINT_154_MASK (0x000003FFu)
  20703. #define CSL_CPINTC_PRI_HINT_REG154_PRI_HINT_154_SHIFT (0x00000000u)
  20704. #define CSL_CPINTC_PRI_HINT_REG154_PRI_HINT_154_RESETVAL (0x00000000u)
  20705. #define CSL_CPINTC_PRI_HINT_REG154_NONE_HINT_154_MASK (0x80000000u)
  20706. #define CSL_CPINTC_PRI_HINT_REG154_NONE_HINT_154_SHIFT (0x0000001Fu)
  20707. #define CSL_CPINTC_PRI_HINT_REG154_NONE_HINT_154_RESETVAL (0x00000001u)
  20708. #define CSL_CPINTC_PRI_HINT_REG154_RESETVAL (0x80000000u)
  20709. /* pri_hint_reg155 */
  20710. #define CSL_CPINTC_PRI_HINT_REG155_PRI_HINT_155_MASK (0x000003FFu)
  20711. #define CSL_CPINTC_PRI_HINT_REG155_PRI_HINT_155_SHIFT (0x00000000u)
  20712. #define CSL_CPINTC_PRI_HINT_REG155_PRI_HINT_155_RESETVAL (0x00000000u)
  20713. #define CSL_CPINTC_PRI_HINT_REG155_NONE_HINT_155_MASK (0x80000000u)
  20714. #define CSL_CPINTC_PRI_HINT_REG155_NONE_HINT_155_SHIFT (0x0000001Fu)
  20715. #define CSL_CPINTC_PRI_HINT_REG155_NONE_HINT_155_RESETVAL (0x00000001u)
  20716. #define CSL_CPINTC_PRI_HINT_REG155_RESETVAL (0x80000000u)
  20717. /* pri_hint_reg156 */
  20718. #define CSL_CPINTC_PRI_HINT_REG156_PRI_HINT_156_MASK (0x000003FFu)
  20719. #define CSL_CPINTC_PRI_HINT_REG156_PRI_HINT_156_SHIFT (0x00000000u)
  20720. #define CSL_CPINTC_PRI_HINT_REG156_PRI_HINT_156_RESETVAL (0x00000000u)
  20721. #define CSL_CPINTC_PRI_HINT_REG156_NONE_HINT_156_MASK (0x80000000u)
  20722. #define CSL_CPINTC_PRI_HINT_REG156_NONE_HINT_156_SHIFT (0x0000001Fu)
  20723. #define CSL_CPINTC_PRI_HINT_REG156_NONE_HINT_156_RESETVAL (0x00000001u)
  20724. #define CSL_CPINTC_PRI_HINT_REG156_RESETVAL (0x80000000u)
  20725. /* pri_hint_reg157 */
  20726. #define CSL_CPINTC_PRI_HINT_REG157_PRI_HINT_157_MASK (0x000003FFu)
  20727. #define CSL_CPINTC_PRI_HINT_REG157_PRI_HINT_157_SHIFT (0x00000000u)
  20728. #define CSL_CPINTC_PRI_HINT_REG157_PRI_HINT_157_RESETVAL (0x00000000u)
  20729. #define CSL_CPINTC_PRI_HINT_REG157_NONE_HINT_157_MASK (0x80000000u)
  20730. #define CSL_CPINTC_PRI_HINT_REG157_NONE_HINT_157_SHIFT (0x0000001Fu)
  20731. #define CSL_CPINTC_PRI_HINT_REG157_NONE_HINT_157_RESETVAL (0x00000001u)
  20732. #define CSL_CPINTC_PRI_HINT_REG157_RESETVAL (0x80000000u)
  20733. /* pri_hint_reg158 */
  20734. #define CSL_CPINTC_PRI_HINT_REG158_PRI_HINT_158_MASK (0x000003FFu)
  20735. #define CSL_CPINTC_PRI_HINT_REG158_PRI_HINT_158_SHIFT (0x00000000u)
  20736. #define CSL_CPINTC_PRI_HINT_REG158_PRI_HINT_158_RESETVAL (0x00000000u)
  20737. #define CSL_CPINTC_PRI_HINT_REG158_NONE_HINT_158_MASK (0x80000000u)
  20738. #define CSL_CPINTC_PRI_HINT_REG158_NONE_HINT_158_SHIFT (0x0000001Fu)
  20739. #define CSL_CPINTC_PRI_HINT_REG158_NONE_HINT_158_RESETVAL (0x00000001u)
  20740. #define CSL_CPINTC_PRI_HINT_REG158_RESETVAL (0x80000000u)
  20741. /* pri_hint_reg159 */
  20742. #define CSL_CPINTC_PRI_HINT_REG159_PRI_HINT_159_MASK (0x000003FFu)
  20743. #define CSL_CPINTC_PRI_HINT_REG159_PRI_HINT_159_SHIFT (0x00000000u)
  20744. #define CSL_CPINTC_PRI_HINT_REG159_PRI_HINT_159_RESETVAL (0x00000000u)
  20745. #define CSL_CPINTC_PRI_HINT_REG159_NONE_HINT_159_MASK (0x80000000u)
  20746. #define CSL_CPINTC_PRI_HINT_REG159_NONE_HINT_159_SHIFT (0x0000001Fu)
  20747. #define CSL_CPINTC_PRI_HINT_REG159_NONE_HINT_159_RESETVAL (0x00000001u)
  20748. #define CSL_CPINTC_PRI_HINT_REG159_RESETVAL (0x80000000u)
  20749. /* pri_hint_reg160 */
  20750. #define CSL_CPINTC_PRI_HINT_REG160_PRI_HINT_160_MASK (0x000003FFu)
  20751. #define CSL_CPINTC_PRI_HINT_REG160_PRI_HINT_160_SHIFT (0x00000000u)
  20752. #define CSL_CPINTC_PRI_HINT_REG160_PRI_HINT_160_RESETVAL (0x00000000u)
  20753. #define CSL_CPINTC_PRI_HINT_REG160_NONE_HINT_160_MASK (0x80000000u)
  20754. #define CSL_CPINTC_PRI_HINT_REG160_NONE_HINT_160_SHIFT (0x0000001Fu)
  20755. #define CSL_CPINTC_PRI_HINT_REG160_NONE_HINT_160_RESETVAL (0x00000001u)
  20756. #define CSL_CPINTC_PRI_HINT_REG160_RESETVAL (0x80000000u)
  20757. /* pri_hint_reg161 */
  20758. #define CSL_CPINTC_PRI_HINT_REG161_PRI_HINT_161_MASK (0x000003FFu)
  20759. #define CSL_CPINTC_PRI_HINT_REG161_PRI_HINT_161_SHIFT (0x00000000u)
  20760. #define CSL_CPINTC_PRI_HINT_REG161_PRI_HINT_161_RESETVAL (0x00000000u)
  20761. #define CSL_CPINTC_PRI_HINT_REG161_NONE_HINT_161_MASK (0x80000000u)
  20762. #define CSL_CPINTC_PRI_HINT_REG161_NONE_HINT_161_SHIFT (0x0000001Fu)
  20763. #define CSL_CPINTC_PRI_HINT_REG161_NONE_HINT_161_RESETVAL (0x00000001u)
  20764. #define CSL_CPINTC_PRI_HINT_REG161_RESETVAL (0x80000000u)
  20765. /* pri_hint_reg162 */
  20766. #define CSL_CPINTC_PRI_HINT_REG162_PRI_HINT_162_MASK (0x000003FFu)
  20767. #define CSL_CPINTC_PRI_HINT_REG162_PRI_HINT_162_SHIFT (0x00000000u)
  20768. #define CSL_CPINTC_PRI_HINT_REG162_PRI_HINT_162_RESETVAL (0x00000000u)
  20769. #define CSL_CPINTC_PRI_HINT_REG162_NONE_HINT_162_MASK (0x80000000u)
  20770. #define CSL_CPINTC_PRI_HINT_REG162_NONE_HINT_162_SHIFT (0x0000001Fu)
  20771. #define CSL_CPINTC_PRI_HINT_REG162_NONE_HINT_162_RESETVAL (0x00000001u)
  20772. #define CSL_CPINTC_PRI_HINT_REG162_RESETVAL (0x80000000u)
  20773. /* pri_hint_reg163 */
  20774. #define CSL_CPINTC_PRI_HINT_REG163_PRI_HINT_163_MASK (0x000003FFu)
  20775. #define CSL_CPINTC_PRI_HINT_REG163_PRI_HINT_163_SHIFT (0x00000000u)
  20776. #define CSL_CPINTC_PRI_HINT_REG163_PRI_HINT_163_RESETVAL (0x00000000u)
  20777. #define CSL_CPINTC_PRI_HINT_REG163_NONE_HINT_163_MASK (0x80000000u)
  20778. #define CSL_CPINTC_PRI_HINT_REG163_NONE_HINT_163_SHIFT (0x0000001Fu)
  20779. #define CSL_CPINTC_PRI_HINT_REG163_NONE_HINT_163_RESETVAL (0x00000001u)
  20780. #define CSL_CPINTC_PRI_HINT_REG163_RESETVAL (0x80000000u)
  20781. /* pri_hint_reg164 */
  20782. #define CSL_CPINTC_PRI_HINT_REG164_PRI_HINT_164_MASK (0x000003FFu)
  20783. #define CSL_CPINTC_PRI_HINT_REG164_PRI_HINT_164_SHIFT (0x00000000u)
  20784. #define CSL_CPINTC_PRI_HINT_REG164_PRI_HINT_164_RESETVAL (0x00000000u)
  20785. #define CSL_CPINTC_PRI_HINT_REG164_NONE_HINT_164_MASK (0x80000000u)
  20786. #define CSL_CPINTC_PRI_HINT_REG164_NONE_HINT_164_SHIFT (0x0000001Fu)
  20787. #define CSL_CPINTC_PRI_HINT_REG164_NONE_HINT_164_RESETVAL (0x00000001u)
  20788. #define CSL_CPINTC_PRI_HINT_REG164_RESETVAL (0x80000000u)
  20789. /* pri_hint_reg165 */
  20790. #define CSL_CPINTC_PRI_HINT_REG165_PRI_HINT_165_MASK (0x000003FFu)
  20791. #define CSL_CPINTC_PRI_HINT_REG165_PRI_HINT_165_SHIFT (0x00000000u)
  20792. #define CSL_CPINTC_PRI_HINT_REG165_PRI_HINT_165_RESETVAL (0x00000000u)
  20793. #define CSL_CPINTC_PRI_HINT_REG165_NONE_HINT_165_MASK (0x80000000u)
  20794. #define CSL_CPINTC_PRI_HINT_REG165_NONE_HINT_165_SHIFT (0x0000001Fu)
  20795. #define CSL_CPINTC_PRI_HINT_REG165_NONE_HINT_165_RESETVAL (0x00000001u)
  20796. #define CSL_CPINTC_PRI_HINT_REG165_RESETVAL (0x80000000u)
  20797. /* pri_hint_reg166 */
  20798. #define CSL_CPINTC_PRI_HINT_REG166_PRI_HINT_166_MASK (0x000003FFu)
  20799. #define CSL_CPINTC_PRI_HINT_REG166_PRI_HINT_166_SHIFT (0x00000000u)
  20800. #define CSL_CPINTC_PRI_HINT_REG166_PRI_HINT_166_RESETVAL (0x00000000u)
  20801. #define CSL_CPINTC_PRI_HINT_REG166_NONE_HINT_166_MASK (0x80000000u)
  20802. #define CSL_CPINTC_PRI_HINT_REG166_NONE_HINT_166_SHIFT (0x0000001Fu)
  20803. #define CSL_CPINTC_PRI_HINT_REG166_NONE_HINT_166_RESETVAL (0x00000001u)
  20804. #define CSL_CPINTC_PRI_HINT_REG166_RESETVAL (0x80000000u)
  20805. /* pri_hint_reg167 */
  20806. #define CSL_CPINTC_PRI_HINT_REG167_PRI_HINT_167_MASK (0x000003FFu)
  20807. #define CSL_CPINTC_PRI_HINT_REG167_PRI_HINT_167_SHIFT (0x00000000u)
  20808. #define CSL_CPINTC_PRI_HINT_REG167_PRI_HINT_167_RESETVAL (0x00000000u)
  20809. #define CSL_CPINTC_PRI_HINT_REG167_NONE_HINT_167_MASK (0x80000000u)
  20810. #define CSL_CPINTC_PRI_HINT_REG167_NONE_HINT_167_SHIFT (0x0000001Fu)
  20811. #define CSL_CPINTC_PRI_HINT_REG167_NONE_HINT_167_RESETVAL (0x00000001u)
  20812. #define CSL_CPINTC_PRI_HINT_REG167_RESETVAL (0x80000000u)
  20813. /* pri_hint_reg168 */
  20814. #define CSL_CPINTC_PRI_HINT_REG168_PRI_HINT_168_MASK (0x000003FFu)
  20815. #define CSL_CPINTC_PRI_HINT_REG168_PRI_HINT_168_SHIFT (0x00000000u)
  20816. #define CSL_CPINTC_PRI_HINT_REG168_PRI_HINT_168_RESETVAL (0x00000000u)
  20817. #define CSL_CPINTC_PRI_HINT_REG168_NONE_HINT_168_MASK (0x80000000u)
  20818. #define CSL_CPINTC_PRI_HINT_REG168_NONE_HINT_168_SHIFT (0x0000001Fu)
  20819. #define CSL_CPINTC_PRI_HINT_REG168_NONE_HINT_168_RESETVAL (0x00000001u)
  20820. #define CSL_CPINTC_PRI_HINT_REG168_RESETVAL (0x80000000u)
  20821. /* pri_hint_reg169 */
  20822. #define CSL_CPINTC_PRI_HINT_REG169_PRI_HINT_169_MASK (0x000003FFu)
  20823. #define CSL_CPINTC_PRI_HINT_REG169_PRI_HINT_169_SHIFT (0x00000000u)
  20824. #define CSL_CPINTC_PRI_HINT_REG169_PRI_HINT_169_RESETVAL (0x00000000u)
  20825. #define CSL_CPINTC_PRI_HINT_REG169_NONE_HINT_169_MASK (0x80000000u)
  20826. #define CSL_CPINTC_PRI_HINT_REG169_NONE_HINT_169_SHIFT (0x0000001Fu)
  20827. #define CSL_CPINTC_PRI_HINT_REG169_NONE_HINT_169_RESETVAL (0x00000001u)
  20828. #define CSL_CPINTC_PRI_HINT_REG169_RESETVAL (0x80000000u)
  20829. /* pri_hint_reg170 */
  20830. #define CSL_CPINTC_PRI_HINT_REG170_PRI_HINT_170_MASK (0x000003FFu)
  20831. #define CSL_CPINTC_PRI_HINT_REG170_PRI_HINT_170_SHIFT (0x00000000u)
  20832. #define CSL_CPINTC_PRI_HINT_REG170_PRI_HINT_170_RESETVAL (0x00000000u)
  20833. #define CSL_CPINTC_PRI_HINT_REG170_NONE_HINT_170_MASK (0x80000000u)
  20834. #define CSL_CPINTC_PRI_HINT_REG170_NONE_HINT_170_SHIFT (0x0000001Fu)
  20835. #define CSL_CPINTC_PRI_HINT_REG170_NONE_HINT_170_RESETVAL (0x00000001u)
  20836. #define CSL_CPINTC_PRI_HINT_REG170_RESETVAL (0x80000000u)
  20837. /* pri_hint_reg171 */
  20838. #define CSL_CPINTC_PRI_HINT_REG171_PRI_HINT_171_MASK (0x000003FFu)
  20839. #define CSL_CPINTC_PRI_HINT_REG171_PRI_HINT_171_SHIFT (0x00000000u)
  20840. #define CSL_CPINTC_PRI_HINT_REG171_PRI_HINT_171_RESETVAL (0x00000000u)
  20841. #define CSL_CPINTC_PRI_HINT_REG171_NONE_HINT_171_MASK (0x80000000u)
  20842. #define CSL_CPINTC_PRI_HINT_REG171_NONE_HINT_171_SHIFT (0x0000001Fu)
  20843. #define CSL_CPINTC_PRI_HINT_REG171_NONE_HINT_171_RESETVAL (0x00000001u)
  20844. #define CSL_CPINTC_PRI_HINT_REG171_RESETVAL (0x80000000u)
  20845. /* pri_hint_reg172 */
  20846. #define CSL_CPINTC_PRI_HINT_REG172_PRI_HINT_172_MASK (0x000003FFu)
  20847. #define CSL_CPINTC_PRI_HINT_REG172_PRI_HINT_172_SHIFT (0x00000000u)
  20848. #define CSL_CPINTC_PRI_HINT_REG172_PRI_HINT_172_RESETVAL (0x00000000u)
  20849. #define CSL_CPINTC_PRI_HINT_REG172_NONE_HINT_172_MASK (0x80000000u)
  20850. #define CSL_CPINTC_PRI_HINT_REG172_NONE_HINT_172_SHIFT (0x0000001Fu)
  20851. #define CSL_CPINTC_PRI_HINT_REG172_NONE_HINT_172_RESETVAL (0x00000001u)
  20852. #define CSL_CPINTC_PRI_HINT_REG172_RESETVAL (0x80000000u)
  20853. /* pri_hint_reg173 */
  20854. #define CSL_CPINTC_PRI_HINT_REG173_PRI_HINT_173_MASK (0x000003FFu)
  20855. #define CSL_CPINTC_PRI_HINT_REG173_PRI_HINT_173_SHIFT (0x00000000u)
  20856. #define CSL_CPINTC_PRI_HINT_REG173_PRI_HINT_173_RESETVAL (0x00000000u)
  20857. #define CSL_CPINTC_PRI_HINT_REG173_NONE_HINT_173_MASK (0x80000000u)
  20858. #define CSL_CPINTC_PRI_HINT_REG173_NONE_HINT_173_SHIFT (0x0000001Fu)
  20859. #define CSL_CPINTC_PRI_HINT_REG173_NONE_HINT_173_RESETVAL (0x00000001u)
  20860. #define CSL_CPINTC_PRI_HINT_REG173_RESETVAL (0x80000000u)
  20861. /* pri_hint_reg174 */
  20862. #define CSL_CPINTC_PRI_HINT_REG174_PRI_HINT_174_MASK (0x000003FFu)
  20863. #define CSL_CPINTC_PRI_HINT_REG174_PRI_HINT_174_SHIFT (0x00000000u)
  20864. #define CSL_CPINTC_PRI_HINT_REG174_PRI_HINT_174_RESETVAL (0x00000000u)
  20865. #define CSL_CPINTC_PRI_HINT_REG174_NONE_HINT_174_MASK (0x80000000u)
  20866. #define CSL_CPINTC_PRI_HINT_REG174_NONE_HINT_174_SHIFT (0x0000001Fu)
  20867. #define CSL_CPINTC_PRI_HINT_REG174_NONE_HINT_174_RESETVAL (0x00000001u)
  20868. #define CSL_CPINTC_PRI_HINT_REG174_RESETVAL (0x80000000u)
  20869. /* pri_hint_reg175 */
  20870. #define CSL_CPINTC_PRI_HINT_REG175_PRI_HINT_175_MASK (0x000003FFu)
  20871. #define CSL_CPINTC_PRI_HINT_REG175_PRI_HINT_175_SHIFT (0x00000000u)
  20872. #define CSL_CPINTC_PRI_HINT_REG175_PRI_HINT_175_RESETVAL (0x00000000u)
  20873. #define CSL_CPINTC_PRI_HINT_REG175_NONE_HINT_175_MASK (0x80000000u)
  20874. #define CSL_CPINTC_PRI_HINT_REG175_NONE_HINT_175_SHIFT (0x0000001Fu)
  20875. #define CSL_CPINTC_PRI_HINT_REG175_NONE_HINT_175_RESETVAL (0x00000001u)
  20876. #define CSL_CPINTC_PRI_HINT_REG175_RESETVAL (0x80000000u)
  20877. /* pri_hint_reg176 */
  20878. #define CSL_CPINTC_PRI_HINT_REG176_PRI_HINT_176_MASK (0x000003FFu)
  20879. #define CSL_CPINTC_PRI_HINT_REG176_PRI_HINT_176_SHIFT (0x00000000u)
  20880. #define CSL_CPINTC_PRI_HINT_REG176_PRI_HINT_176_RESETVAL (0x00000000u)
  20881. #define CSL_CPINTC_PRI_HINT_REG176_NONE_HINT_176_MASK (0x80000000u)
  20882. #define CSL_CPINTC_PRI_HINT_REG176_NONE_HINT_176_SHIFT (0x0000001Fu)
  20883. #define CSL_CPINTC_PRI_HINT_REG176_NONE_HINT_176_RESETVAL (0x00000001u)
  20884. #define CSL_CPINTC_PRI_HINT_REG176_RESETVAL (0x80000000u)
  20885. /* pri_hint_reg177 */
  20886. #define CSL_CPINTC_PRI_HINT_REG177_PRI_HINT_177_MASK (0x000003FFu)
  20887. #define CSL_CPINTC_PRI_HINT_REG177_PRI_HINT_177_SHIFT (0x00000000u)
  20888. #define CSL_CPINTC_PRI_HINT_REG177_PRI_HINT_177_RESETVAL (0x00000000u)
  20889. #define CSL_CPINTC_PRI_HINT_REG177_NONE_HINT_177_MASK (0x80000000u)
  20890. #define CSL_CPINTC_PRI_HINT_REG177_NONE_HINT_177_SHIFT (0x0000001Fu)
  20891. #define CSL_CPINTC_PRI_HINT_REG177_NONE_HINT_177_RESETVAL (0x00000001u)
  20892. #define CSL_CPINTC_PRI_HINT_REG177_RESETVAL (0x80000000u)
  20893. /* pri_hint_reg178 */
  20894. #define CSL_CPINTC_PRI_HINT_REG178_PRI_HINT_178_MASK (0x000003FFu)
  20895. #define CSL_CPINTC_PRI_HINT_REG178_PRI_HINT_178_SHIFT (0x00000000u)
  20896. #define CSL_CPINTC_PRI_HINT_REG178_PRI_HINT_178_RESETVAL (0x00000000u)
  20897. #define CSL_CPINTC_PRI_HINT_REG178_NONE_HINT_178_MASK (0x80000000u)
  20898. #define CSL_CPINTC_PRI_HINT_REG178_NONE_HINT_178_SHIFT (0x0000001Fu)
  20899. #define CSL_CPINTC_PRI_HINT_REG178_NONE_HINT_178_RESETVAL (0x00000001u)
  20900. #define CSL_CPINTC_PRI_HINT_REG178_RESETVAL (0x80000000u)
  20901. /* pri_hint_reg179 */
  20902. #define CSL_CPINTC_PRI_HINT_REG179_PRI_HINT_179_MASK (0x000003FFu)
  20903. #define CSL_CPINTC_PRI_HINT_REG179_PRI_HINT_179_SHIFT (0x00000000u)
  20904. #define CSL_CPINTC_PRI_HINT_REG179_PRI_HINT_179_RESETVAL (0x00000000u)
  20905. #define CSL_CPINTC_PRI_HINT_REG179_NONE_HINT_179_MASK (0x80000000u)
  20906. #define CSL_CPINTC_PRI_HINT_REG179_NONE_HINT_179_SHIFT (0x0000001Fu)
  20907. #define CSL_CPINTC_PRI_HINT_REG179_NONE_HINT_179_RESETVAL (0x00000001u)
  20908. #define CSL_CPINTC_PRI_HINT_REG179_RESETVAL (0x80000000u)
  20909. /* pri_hint_reg180 */
  20910. #define CSL_CPINTC_PRI_HINT_REG180_PRI_HINT_180_MASK (0x000003FFu)
  20911. #define CSL_CPINTC_PRI_HINT_REG180_PRI_HINT_180_SHIFT (0x00000000u)
  20912. #define CSL_CPINTC_PRI_HINT_REG180_PRI_HINT_180_RESETVAL (0x00000000u)
  20913. #define CSL_CPINTC_PRI_HINT_REG180_NONE_HINT_180_MASK (0x80000000u)
  20914. #define CSL_CPINTC_PRI_HINT_REG180_NONE_HINT_180_SHIFT (0x0000001Fu)
  20915. #define CSL_CPINTC_PRI_HINT_REG180_NONE_HINT_180_RESETVAL (0x00000001u)
  20916. #define CSL_CPINTC_PRI_HINT_REG180_RESETVAL (0x80000000u)
  20917. /* pri_hint_reg181 */
  20918. #define CSL_CPINTC_PRI_HINT_REG181_PRI_HINT_181_MASK (0x000003FFu)
  20919. #define CSL_CPINTC_PRI_HINT_REG181_PRI_HINT_181_SHIFT (0x00000000u)
  20920. #define CSL_CPINTC_PRI_HINT_REG181_PRI_HINT_181_RESETVAL (0x00000000u)
  20921. #define CSL_CPINTC_PRI_HINT_REG181_NONE_HINT_181_MASK (0x80000000u)
  20922. #define CSL_CPINTC_PRI_HINT_REG181_NONE_HINT_181_SHIFT (0x0000001Fu)
  20923. #define CSL_CPINTC_PRI_HINT_REG181_NONE_HINT_181_RESETVAL (0x00000001u)
  20924. #define CSL_CPINTC_PRI_HINT_REG181_RESETVAL (0x80000000u)
  20925. /* pri_hint_reg182 */
  20926. #define CSL_CPINTC_PRI_HINT_REG182_PRI_HINT_182_MASK (0x000003FFu)
  20927. #define CSL_CPINTC_PRI_HINT_REG182_PRI_HINT_182_SHIFT (0x00000000u)
  20928. #define CSL_CPINTC_PRI_HINT_REG182_PRI_HINT_182_RESETVAL (0x00000000u)
  20929. #define CSL_CPINTC_PRI_HINT_REG182_NONE_HINT_182_MASK (0x80000000u)
  20930. #define CSL_CPINTC_PRI_HINT_REG182_NONE_HINT_182_SHIFT (0x0000001Fu)
  20931. #define CSL_CPINTC_PRI_HINT_REG182_NONE_HINT_182_RESETVAL (0x00000001u)
  20932. #define CSL_CPINTC_PRI_HINT_REG182_RESETVAL (0x80000000u)
  20933. /* pri_hint_reg183 */
  20934. #define CSL_CPINTC_PRI_HINT_REG183_PRI_HINT_183_MASK (0x000003FFu)
  20935. #define CSL_CPINTC_PRI_HINT_REG183_PRI_HINT_183_SHIFT (0x00000000u)
  20936. #define CSL_CPINTC_PRI_HINT_REG183_PRI_HINT_183_RESETVAL (0x00000000u)
  20937. #define CSL_CPINTC_PRI_HINT_REG183_NONE_HINT_183_MASK (0x80000000u)
  20938. #define CSL_CPINTC_PRI_HINT_REG183_NONE_HINT_183_SHIFT (0x0000001Fu)
  20939. #define CSL_CPINTC_PRI_HINT_REG183_NONE_HINT_183_RESETVAL (0x00000001u)
  20940. #define CSL_CPINTC_PRI_HINT_REG183_RESETVAL (0x80000000u)
  20941. /* pri_hint_reg184 */
  20942. #define CSL_CPINTC_PRI_HINT_REG184_PRI_HINT_184_MASK (0x000003FFu)
  20943. #define CSL_CPINTC_PRI_HINT_REG184_PRI_HINT_184_SHIFT (0x00000000u)
  20944. #define CSL_CPINTC_PRI_HINT_REG184_PRI_HINT_184_RESETVAL (0x00000000u)
  20945. #define CSL_CPINTC_PRI_HINT_REG184_NONE_HINT_184_MASK (0x80000000u)
  20946. #define CSL_CPINTC_PRI_HINT_REG184_NONE_HINT_184_SHIFT (0x0000001Fu)
  20947. #define CSL_CPINTC_PRI_HINT_REG184_NONE_HINT_184_RESETVAL (0x00000001u)
  20948. #define CSL_CPINTC_PRI_HINT_REG184_RESETVAL (0x80000000u)
  20949. /* pri_hint_reg185 */
  20950. #define CSL_CPINTC_PRI_HINT_REG185_PRI_HINT_185_MASK (0x000003FFu)
  20951. #define CSL_CPINTC_PRI_HINT_REG185_PRI_HINT_185_SHIFT (0x00000000u)
  20952. #define CSL_CPINTC_PRI_HINT_REG185_PRI_HINT_185_RESETVAL (0x00000000u)
  20953. #define CSL_CPINTC_PRI_HINT_REG185_NONE_HINT_185_MASK (0x80000000u)
  20954. #define CSL_CPINTC_PRI_HINT_REG185_NONE_HINT_185_SHIFT (0x0000001Fu)
  20955. #define CSL_CPINTC_PRI_HINT_REG185_NONE_HINT_185_RESETVAL (0x00000001u)
  20956. #define CSL_CPINTC_PRI_HINT_REG185_RESETVAL (0x80000000u)
  20957. /* pri_hint_reg186 */
  20958. #define CSL_CPINTC_PRI_HINT_REG186_PRI_HINT_186_MASK (0x000003FFu)
  20959. #define CSL_CPINTC_PRI_HINT_REG186_PRI_HINT_186_SHIFT (0x00000000u)
  20960. #define CSL_CPINTC_PRI_HINT_REG186_PRI_HINT_186_RESETVAL (0x00000000u)
  20961. #define CSL_CPINTC_PRI_HINT_REG186_NONE_HINT_186_MASK (0x80000000u)
  20962. #define CSL_CPINTC_PRI_HINT_REG186_NONE_HINT_186_SHIFT (0x0000001Fu)
  20963. #define CSL_CPINTC_PRI_HINT_REG186_NONE_HINT_186_RESETVAL (0x00000001u)
  20964. #define CSL_CPINTC_PRI_HINT_REG186_RESETVAL (0x80000000u)
  20965. /* pri_hint_reg187 */
  20966. #define CSL_CPINTC_PRI_HINT_REG187_PRI_HINT_187_MASK (0x000003FFu)
  20967. #define CSL_CPINTC_PRI_HINT_REG187_PRI_HINT_187_SHIFT (0x00000000u)
  20968. #define CSL_CPINTC_PRI_HINT_REG187_PRI_HINT_187_RESETVAL (0x00000000u)
  20969. #define CSL_CPINTC_PRI_HINT_REG187_NONE_HINT_187_MASK (0x80000000u)
  20970. #define CSL_CPINTC_PRI_HINT_REG187_NONE_HINT_187_SHIFT (0x0000001Fu)
  20971. #define CSL_CPINTC_PRI_HINT_REG187_NONE_HINT_187_RESETVAL (0x00000001u)
  20972. #define CSL_CPINTC_PRI_HINT_REG187_RESETVAL (0x80000000u)
  20973. /* pri_hint_reg188 */
  20974. #define CSL_CPINTC_PRI_HINT_REG188_PRI_HINT_188_MASK (0x000003FFu)
  20975. #define CSL_CPINTC_PRI_HINT_REG188_PRI_HINT_188_SHIFT (0x00000000u)
  20976. #define CSL_CPINTC_PRI_HINT_REG188_PRI_HINT_188_RESETVAL (0x00000000u)
  20977. #define CSL_CPINTC_PRI_HINT_REG188_NONE_HINT_188_MASK (0x80000000u)
  20978. #define CSL_CPINTC_PRI_HINT_REG188_NONE_HINT_188_SHIFT (0x0000001Fu)
  20979. #define CSL_CPINTC_PRI_HINT_REG188_NONE_HINT_188_RESETVAL (0x00000001u)
  20980. #define CSL_CPINTC_PRI_HINT_REG188_RESETVAL (0x80000000u)
  20981. /* pri_hint_reg189 */
  20982. #define CSL_CPINTC_PRI_HINT_REG189_PRI_HINT_189_MASK (0x000003FFu)
  20983. #define CSL_CPINTC_PRI_HINT_REG189_PRI_HINT_189_SHIFT (0x00000000u)
  20984. #define CSL_CPINTC_PRI_HINT_REG189_PRI_HINT_189_RESETVAL (0x00000000u)
  20985. #define CSL_CPINTC_PRI_HINT_REG189_NONE_HINT_189_MASK (0x80000000u)
  20986. #define CSL_CPINTC_PRI_HINT_REG189_NONE_HINT_189_SHIFT (0x0000001Fu)
  20987. #define CSL_CPINTC_PRI_HINT_REG189_NONE_HINT_189_RESETVAL (0x00000001u)
  20988. #define CSL_CPINTC_PRI_HINT_REG189_RESETVAL (0x80000000u)
  20989. /* pri_hint_reg190 */
  20990. #define CSL_CPINTC_PRI_HINT_REG190_PRI_HINT_190_MASK (0x000003FFu)
  20991. #define CSL_CPINTC_PRI_HINT_REG190_PRI_HINT_190_SHIFT (0x00000000u)
  20992. #define CSL_CPINTC_PRI_HINT_REG190_PRI_HINT_190_RESETVAL (0x00000000u)
  20993. #define CSL_CPINTC_PRI_HINT_REG190_NONE_HINT_190_MASK (0x80000000u)
  20994. #define CSL_CPINTC_PRI_HINT_REG190_NONE_HINT_190_SHIFT (0x0000001Fu)
  20995. #define CSL_CPINTC_PRI_HINT_REG190_NONE_HINT_190_RESETVAL (0x00000001u)
  20996. #define CSL_CPINTC_PRI_HINT_REG190_RESETVAL (0x80000000u)
  20997. /* pri_hint_reg191 */
  20998. #define CSL_CPINTC_PRI_HINT_REG191_PRI_HINT_191_MASK (0x000003FFu)
  20999. #define CSL_CPINTC_PRI_HINT_REG191_PRI_HINT_191_SHIFT (0x00000000u)
  21000. #define CSL_CPINTC_PRI_HINT_REG191_PRI_HINT_191_RESETVAL (0x00000000u)
  21001. #define CSL_CPINTC_PRI_HINT_REG191_NONE_HINT_191_MASK (0x80000000u)
  21002. #define CSL_CPINTC_PRI_HINT_REG191_NONE_HINT_191_SHIFT (0x0000001Fu)
  21003. #define CSL_CPINTC_PRI_HINT_REG191_NONE_HINT_191_RESETVAL (0x00000001u)
  21004. #define CSL_CPINTC_PRI_HINT_REG191_RESETVAL (0x80000000u)
  21005. /* pri_hint_reg192 */
  21006. #define CSL_CPINTC_PRI_HINT_REG192_PRI_HINT_192_MASK (0x000003FFu)
  21007. #define CSL_CPINTC_PRI_HINT_REG192_PRI_HINT_192_SHIFT (0x00000000u)
  21008. #define CSL_CPINTC_PRI_HINT_REG192_PRI_HINT_192_RESETVAL (0x00000000u)
  21009. #define CSL_CPINTC_PRI_HINT_REG192_NONE_HINT_192_MASK (0x80000000u)
  21010. #define CSL_CPINTC_PRI_HINT_REG192_NONE_HINT_192_SHIFT (0x0000001Fu)
  21011. #define CSL_CPINTC_PRI_HINT_REG192_NONE_HINT_192_RESETVAL (0x00000001u)
  21012. #define CSL_CPINTC_PRI_HINT_REG192_RESETVAL (0x80000000u)
  21013. /* pri_hint_reg193 */
  21014. #define CSL_CPINTC_PRI_HINT_REG193_PRI_HINT_193_MASK (0x000003FFu)
  21015. #define CSL_CPINTC_PRI_HINT_REG193_PRI_HINT_193_SHIFT (0x00000000u)
  21016. #define CSL_CPINTC_PRI_HINT_REG193_PRI_HINT_193_RESETVAL (0x00000000u)
  21017. #define CSL_CPINTC_PRI_HINT_REG193_NONE_HINT_193_MASK (0x80000000u)
  21018. #define CSL_CPINTC_PRI_HINT_REG193_NONE_HINT_193_SHIFT (0x0000001Fu)
  21019. #define CSL_CPINTC_PRI_HINT_REG193_NONE_HINT_193_RESETVAL (0x00000001u)
  21020. #define CSL_CPINTC_PRI_HINT_REG193_RESETVAL (0x80000000u)
  21021. /* pri_hint_reg194 */
  21022. #define CSL_CPINTC_PRI_HINT_REG194_PRI_HINT_194_MASK (0x000003FFu)
  21023. #define CSL_CPINTC_PRI_HINT_REG194_PRI_HINT_194_SHIFT (0x00000000u)
  21024. #define CSL_CPINTC_PRI_HINT_REG194_PRI_HINT_194_RESETVAL (0x00000000u)
  21025. #define CSL_CPINTC_PRI_HINT_REG194_NONE_HINT_194_MASK (0x80000000u)
  21026. #define CSL_CPINTC_PRI_HINT_REG194_NONE_HINT_194_SHIFT (0x0000001Fu)
  21027. #define CSL_CPINTC_PRI_HINT_REG194_NONE_HINT_194_RESETVAL (0x00000001u)
  21028. #define CSL_CPINTC_PRI_HINT_REG194_RESETVAL (0x80000000u)
  21029. /* pri_hint_reg195 */
  21030. #define CSL_CPINTC_PRI_HINT_REG195_PRI_HINT_195_MASK (0x000003FFu)
  21031. #define CSL_CPINTC_PRI_HINT_REG195_PRI_HINT_195_SHIFT (0x00000000u)
  21032. #define CSL_CPINTC_PRI_HINT_REG195_PRI_HINT_195_RESETVAL (0x00000000u)
  21033. #define CSL_CPINTC_PRI_HINT_REG195_NONE_HINT_195_MASK (0x80000000u)
  21034. #define CSL_CPINTC_PRI_HINT_REG195_NONE_HINT_195_SHIFT (0x0000001Fu)
  21035. #define CSL_CPINTC_PRI_HINT_REG195_NONE_HINT_195_RESETVAL (0x00000001u)
  21036. #define CSL_CPINTC_PRI_HINT_REG195_RESETVAL (0x80000000u)
  21037. /* pri_hint_reg196 */
  21038. #define CSL_CPINTC_PRI_HINT_REG196_PRI_HINT_196_MASK (0x000003FFu)
  21039. #define CSL_CPINTC_PRI_HINT_REG196_PRI_HINT_196_SHIFT (0x00000000u)
  21040. #define CSL_CPINTC_PRI_HINT_REG196_PRI_HINT_196_RESETVAL (0x00000000u)
  21041. #define CSL_CPINTC_PRI_HINT_REG196_NONE_HINT_196_MASK (0x80000000u)
  21042. #define CSL_CPINTC_PRI_HINT_REG196_NONE_HINT_196_SHIFT (0x0000001Fu)
  21043. #define CSL_CPINTC_PRI_HINT_REG196_NONE_HINT_196_RESETVAL (0x00000001u)
  21044. #define CSL_CPINTC_PRI_HINT_REG196_RESETVAL (0x80000000u)
  21045. /* pri_hint_reg197 */
  21046. #define CSL_CPINTC_PRI_HINT_REG197_PRI_HINT_197_MASK (0x000003FFu)
  21047. #define CSL_CPINTC_PRI_HINT_REG197_PRI_HINT_197_SHIFT (0x00000000u)
  21048. #define CSL_CPINTC_PRI_HINT_REG197_PRI_HINT_197_RESETVAL (0x00000000u)
  21049. #define CSL_CPINTC_PRI_HINT_REG197_NONE_HINT_197_MASK (0x80000000u)
  21050. #define CSL_CPINTC_PRI_HINT_REG197_NONE_HINT_197_SHIFT (0x0000001Fu)
  21051. #define CSL_CPINTC_PRI_HINT_REG197_NONE_HINT_197_RESETVAL (0x00000001u)
  21052. #define CSL_CPINTC_PRI_HINT_REG197_RESETVAL (0x80000000u)
  21053. /* pri_hint_reg198 */
  21054. #define CSL_CPINTC_PRI_HINT_REG198_PRI_HINT_198_MASK (0x000003FFu)
  21055. #define CSL_CPINTC_PRI_HINT_REG198_PRI_HINT_198_SHIFT (0x00000000u)
  21056. #define CSL_CPINTC_PRI_HINT_REG198_PRI_HINT_198_RESETVAL (0x00000000u)
  21057. #define CSL_CPINTC_PRI_HINT_REG198_NONE_HINT_198_MASK (0x80000000u)
  21058. #define CSL_CPINTC_PRI_HINT_REG198_NONE_HINT_198_SHIFT (0x0000001Fu)
  21059. #define CSL_CPINTC_PRI_HINT_REG198_NONE_HINT_198_RESETVAL (0x00000001u)
  21060. #define CSL_CPINTC_PRI_HINT_REG198_RESETVAL (0x80000000u)
  21061. /* pri_hint_reg199 */
  21062. #define CSL_CPINTC_PRI_HINT_REG199_PRI_HINT_199_MASK (0x000003FFu)
  21063. #define CSL_CPINTC_PRI_HINT_REG199_PRI_HINT_199_SHIFT (0x00000000u)
  21064. #define CSL_CPINTC_PRI_HINT_REG199_PRI_HINT_199_RESETVAL (0x00000000u)
  21065. #define CSL_CPINTC_PRI_HINT_REG199_NONE_HINT_199_MASK (0x80000000u)
  21066. #define CSL_CPINTC_PRI_HINT_REG199_NONE_HINT_199_SHIFT (0x0000001Fu)
  21067. #define CSL_CPINTC_PRI_HINT_REG199_NONE_HINT_199_RESETVAL (0x00000001u)
  21068. #define CSL_CPINTC_PRI_HINT_REG199_RESETVAL (0x80000000u)
  21069. /* pri_hint_reg200 */
  21070. #define CSL_CPINTC_PRI_HINT_REG200_PRI_HINT_200_MASK (0x000003FFu)
  21071. #define CSL_CPINTC_PRI_HINT_REG200_PRI_HINT_200_SHIFT (0x00000000u)
  21072. #define CSL_CPINTC_PRI_HINT_REG200_PRI_HINT_200_RESETVAL (0x00000000u)
  21073. #define CSL_CPINTC_PRI_HINT_REG200_NONE_HINT_200_MASK (0x80000000u)
  21074. #define CSL_CPINTC_PRI_HINT_REG200_NONE_HINT_200_SHIFT (0x0000001Fu)
  21075. #define CSL_CPINTC_PRI_HINT_REG200_NONE_HINT_200_RESETVAL (0x00000001u)
  21076. #define CSL_CPINTC_PRI_HINT_REG200_RESETVAL (0x80000000u)
  21077. /* pri_hint_reg201 */
  21078. #define CSL_CPINTC_PRI_HINT_REG201_PRI_HINT_201_MASK (0x000003FFu)
  21079. #define CSL_CPINTC_PRI_HINT_REG201_PRI_HINT_201_SHIFT (0x00000000u)
  21080. #define CSL_CPINTC_PRI_HINT_REG201_PRI_HINT_201_RESETVAL (0x00000000u)
  21081. #define CSL_CPINTC_PRI_HINT_REG201_NONE_HINT_201_MASK (0x80000000u)
  21082. #define CSL_CPINTC_PRI_HINT_REG201_NONE_HINT_201_SHIFT (0x0000001Fu)
  21083. #define CSL_CPINTC_PRI_HINT_REG201_NONE_HINT_201_RESETVAL (0x00000001u)
  21084. #define CSL_CPINTC_PRI_HINT_REG201_RESETVAL (0x80000000u)
  21085. /* pri_hint_reg202 */
  21086. #define CSL_CPINTC_PRI_HINT_REG202_PRI_HINT_202_MASK (0x000003FFu)
  21087. #define CSL_CPINTC_PRI_HINT_REG202_PRI_HINT_202_SHIFT (0x00000000u)
  21088. #define CSL_CPINTC_PRI_HINT_REG202_PRI_HINT_202_RESETVAL (0x00000000u)
  21089. #define CSL_CPINTC_PRI_HINT_REG202_NONE_HINT_202_MASK (0x80000000u)
  21090. #define CSL_CPINTC_PRI_HINT_REG202_NONE_HINT_202_SHIFT (0x0000001Fu)
  21091. #define CSL_CPINTC_PRI_HINT_REG202_NONE_HINT_202_RESETVAL (0x00000001u)
  21092. #define CSL_CPINTC_PRI_HINT_REG202_RESETVAL (0x80000000u)
  21093. /* pri_hint_reg203 */
  21094. #define CSL_CPINTC_PRI_HINT_REG203_PRI_HINT_203_MASK (0x000003FFu)
  21095. #define CSL_CPINTC_PRI_HINT_REG203_PRI_HINT_203_SHIFT (0x00000000u)
  21096. #define CSL_CPINTC_PRI_HINT_REG203_PRI_HINT_203_RESETVAL (0x00000000u)
  21097. #define CSL_CPINTC_PRI_HINT_REG203_NONE_HINT_203_MASK (0x80000000u)
  21098. #define CSL_CPINTC_PRI_HINT_REG203_NONE_HINT_203_SHIFT (0x0000001Fu)
  21099. #define CSL_CPINTC_PRI_HINT_REG203_NONE_HINT_203_RESETVAL (0x00000001u)
  21100. #define CSL_CPINTC_PRI_HINT_REG203_RESETVAL (0x80000000u)
  21101. /* pri_hint_reg204 */
  21102. #define CSL_CPINTC_PRI_HINT_REG204_PRI_HINT_204_MASK (0x000003FFu)
  21103. #define CSL_CPINTC_PRI_HINT_REG204_PRI_HINT_204_SHIFT (0x00000000u)
  21104. #define CSL_CPINTC_PRI_HINT_REG204_PRI_HINT_204_RESETVAL (0x00000000u)
  21105. #define CSL_CPINTC_PRI_HINT_REG204_NONE_HINT_204_MASK (0x80000000u)
  21106. #define CSL_CPINTC_PRI_HINT_REG204_NONE_HINT_204_SHIFT (0x0000001Fu)
  21107. #define CSL_CPINTC_PRI_HINT_REG204_NONE_HINT_204_RESETVAL (0x00000001u)
  21108. #define CSL_CPINTC_PRI_HINT_REG204_RESETVAL (0x80000000u)
  21109. /* pri_hint_reg205 */
  21110. #define CSL_CPINTC_PRI_HINT_REG205_PRI_HINT_205_MASK (0x000003FFu)
  21111. #define CSL_CPINTC_PRI_HINT_REG205_PRI_HINT_205_SHIFT (0x00000000u)
  21112. #define CSL_CPINTC_PRI_HINT_REG205_PRI_HINT_205_RESETVAL (0x00000000u)
  21113. #define CSL_CPINTC_PRI_HINT_REG205_NONE_HINT_205_MASK (0x80000000u)
  21114. #define CSL_CPINTC_PRI_HINT_REG205_NONE_HINT_205_SHIFT (0x0000001Fu)
  21115. #define CSL_CPINTC_PRI_HINT_REG205_NONE_HINT_205_RESETVAL (0x00000001u)
  21116. #define CSL_CPINTC_PRI_HINT_REG205_RESETVAL (0x80000000u)
  21117. /* pri_hint_reg206 */
  21118. #define CSL_CPINTC_PRI_HINT_REG206_PRI_HINT_206_MASK (0x000003FFu)
  21119. #define CSL_CPINTC_PRI_HINT_REG206_PRI_HINT_206_SHIFT (0x00000000u)
  21120. #define CSL_CPINTC_PRI_HINT_REG206_PRI_HINT_206_RESETVAL (0x00000000u)
  21121. #define CSL_CPINTC_PRI_HINT_REG206_NONE_HINT_206_MASK (0x80000000u)
  21122. #define CSL_CPINTC_PRI_HINT_REG206_NONE_HINT_206_SHIFT (0x0000001Fu)
  21123. #define CSL_CPINTC_PRI_HINT_REG206_NONE_HINT_206_RESETVAL (0x00000001u)
  21124. #define CSL_CPINTC_PRI_HINT_REG206_RESETVAL (0x80000000u)
  21125. /* pri_hint_reg207 */
  21126. #define CSL_CPINTC_PRI_HINT_REG207_PRI_HINT_207_MASK (0x000003FFu)
  21127. #define CSL_CPINTC_PRI_HINT_REG207_PRI_HINT_207_SHIFT (0x00000000u)
  21128. #define CSL_CPINTC_PRI_HINT_REG207_PRI_HINT_207_RESETVAL (0x00000000u)
  21129. #define CSL_CPINTC_PRI_HINT_REG207_NONE_HINT_207_MASK (0x80000000u)
  21130. #define CSL_CPINTC_PRI_HINT_REG207_NONE_HINT_207_SHIFT (0x0000001Fu)
  21131. #define CSL_CPINTC_PRI_HINT_REG207_NONE_HINT_207_RESETVAL (0x00000001u)
  21132. #define CSL_CPINTC_PRI_HINT_REG207_RESETVAL (0x80000000u)
  21133. /* pri_hint_reg208 */
  21134. #define CSL_CPINTC_PRI_HINT_REG208_PRI_HINT_208_MASK (0x000003FFu)
  21135. #define CSL_CPINTC_PRI_HINT_REG208_PRI_HINT_208_SHIFT (0x00000000u)
  21136. #define CSL_CPINTC_PRI_HINT_REG208_PRI_HINT_208_RESETVAL (0x00000000u)
  21137. #define CSL_CPINTC_PRI_HINT_REG208_NONE_HINT_208_MASK (0x80000000u)
  21138. #define CSL_CPINTC_PRI_HINT_REG208_NONE_HINT_208_SHIFT (0x0000001Fu)
  21139. #define CSL_CPINTC_PRI_HINT_REG208_NONE_HINT_208_RESETVAL (0x00000001u)
  21140. #define CSL_CPINTC_PRI_HINT_REG208_RESETVAL (0x80000000u)
  21141. /* pri_hint_reg209 */
  21142. #define CSL_CPINTC_PRI_HINT_REG209_PRI_HINT_209_MASK (0x000003FFu)
  21143. #define CSL_CPINTC_PRI_HINT_REG209_PRI_HINT_209_SHIFT (0x00000000u)
  21144. #define CSL_CPINTC_PRI_HINT_REG209_PRI_HINT_209_RESETVAL (0x00000000u)
  21145. #define CSL_CPINTC_PRI_HINT_REG209_NONE_HINT_209_MASK (0x80000000u)
  21146. #define CSL_CPINTC_PRI_HINT_REG209_NONE_HINT_209_SHIFT (0x0000001Fu)
  21147. #define CSL_CPINTC_PRI_HINT_REG209_NONE_HINT_209_RESETVAL (0x00000001u)
  21148. #define CSL_CPINTC_PRI_HINT_REG209_RESETVAL (0x80000000u)
  21149. /* pri_hint_reg210 */
  21150. #define CSL_CPINTC_PRI_HINT_REG210_PRI_HINT_210_MASK (0x000003FFu)
  21151. #define CSL_CPINTC_PRI_HINT_REG210_PRI_HINT_210_SHIFT (0x00000000u)
  21152. #define CSL_CPINTC_PRI_HINT_REG210_PRI_HINT_210_RESETVAL (0x00000000u)
  21153. #define CSL_CPINTC_PRI_HINT_REG210_NONE_HINT_210_MASK (0x80000000u)
  21154. #define CSL_CPINTC_PRI_HINT_REG210_NONE_HINT_210_SHIFT (0x0000001Fu)
  21155. #define CSL_CPINTC_PRI_HINT_REG210_NONE_HINT_210_RESETVAL (0x00000001u)
  21156. #define CSL_CPINTC_PRI_HINT_REG210_RESETVAL (0x80000000u)
  21157. /* pri_hint_reg211 */
  21158. #define CSL_CPINTC_PRI_HINT_REG211_PRI_HINT_211_MASK (0x000003FFu)
  21159. #define CSL_CPINTC_PRI_HINT_REG211_PRI_HINT_211_SHIFT (0x00000000u)
  21160. #define CSL_CPINTC_PRI_HINT_REG211_PRI_HINT_211_RESETVAL (0x00000000u)
  21161. #define CSL_CPINTC_PRI_HINT_REG211_NONE_HINT_211_MASK (0x80000000u)
  21162. #define CSL_CPINTC_PRI_HINT_REG211_NONE_HINT_211_SHIFT (0x0000001Fu)
  21163. #define CSL_CPINTC_PRI_HINT_REG211_NONE_HINT_211_RESETVAL (0x00000001u)
  21164. #define CSL_CPINTC_PRI_HINT_REG211_RESETVAL (0x80000000u)
  21165. /* pri_hint_reg212 */
  21166. #define CSL_CPINTC_PRI_HINT_REG212_PRI_HINT_212_MASK (0x000003FFu)
  21167. #define CSL_CPINTC_PRI_HINT_REG212_PRI_HINT_212_SHIFT (0x00000000u)
  21168. #define CSL_CPINTC_PRI_HINT_REG212_PRI_HINT_212_RESETVAL (0x00000000u)
  21169. #define CSL_CPINTC_PRI_HINT_REG212_NONE_HINT_212_MASK (0x80000000u)
  21170. #define CSL_CPINTC_PRI_HINT_REG212_NONE_HINT_212_SHIFT (0x0000001Fu)
  21171. #define CSL_CPINTC_PRI_HINT_REG212_NONE_HINT_212_RESETVAL (0x00000001u)
  21172. #define CSL_CPINTC_PRI_HINT_REG212_RESETVAL (0x80000000u)
  21173. /* pri_hint_reg213 */
  21174. #define CSL_CPINTC_PRI_HINT_REG213_PRI_HINT_213_MASK (0x000003FFu)
  21175. #define CSL_CPINTC_PRI_HINT_REG213_PRI_HINT_213_SHIFT (0x00000000u)
  21176. #define CSL_CPINTC_PRI_HINT_REG213_PRI_HINT_213_RESETVAL (0x00000000u)
  21177. #define CSL_CPINTC_PRI_HINT_REG213_NONE_HINT_213_MASK (0x80000000u)
  21178. #define CSL_CPINTC_PRI_HINT_REG213_NONE_HINT_213_SHIFT (0x0000001Fu)
  21179. #define CSL_CPINTC_PRI_HINT_REG213_NONE_HINT_213_RESETVAL (0x00000001u)
  21180. #define CSL_CPINTC_PRI_HINT_REG213_RESETVAL (0x80000000u)
  21181. /* pri_hint_reg214 */
  21182. #define CSL_CPINTC_PRI_HINT_REG214_PRI_HINT_214_MASK (0x000003FFu)
  21183. #define CSL_CPINTC_PRI_HINT_REG214_PRI_HINT_214_SHIFT (0x00000000u)
  21184. #define CSL_CPINTC_PRI_HINT_REG214_PRI_HINT_214_RESETVAL (0x00000000u)
  21185. #define CSL_CPINTC_PRI_HINT_REG214_NONE_HINT_214_MASK (0x80000000u)
  21186. #define CSL_CPINTC_PRI_HINT_REG214_NONE_HINT_214_SHIFT (0x0000001Fu)
  21187. #define CSL_CPINTC_PRI_HINT_REG214_NONE_HINT_214_RESETVAL (0x00000001u)
  21188. #define CSL_CPINTC_PRI_HINT_REG214_RESETVAL (0x80000000u)
  21189. /* pri_hint_reg215 */
  21190. #define CSL_CPINTC_PRI_HINT_REG215_PRI_HINT_215_MASK (0x000003FFu)
  21191. #define CSL_CPINTC_PRI_HINT_REG215_PRI_HINT_215_SHIFT (0x00000000u)
  21192. #define CSL_CPINTC_PRI_HINT_REG215_PRI_HINT_215_RESETVAL (0x00000000u)
  21193. #define CSL_CPINTC_PRI_HINT_REG215_NONE_HINT_215_MASK (0x80000000u)
  21194. #define CSL_CPINTC_PRI_HINT_REG215_NONE_HINT_215_SHIFT (0x0000001Fu)
  21195. #define CSL_CPINTC_PRI_HINT_REG215_NONE_HINT_215_RESETVAL (0x00000001u)
  21196. #define CSL_CPINTC_PRI_HINT_REG215_RESETVAL (0x80000000u)
  21197. /* pri_hint_reg216 */
  21198. #define CSL_CPINTC_PRI_HINT_REG216_PRI_HINT_216_MASK (0x000003FFu)
  21199. #define CSL_CPINTC_PRI_HINT_REG216_PRI_HINT_216_SHIFT (0x00000000u)
  21200. #define CSL_CPINTC_PRI_HINT_REG216_PRI_HINT_216_RESETVAL (0x00000000u)
  21201. #define CSL_CPINTC_PRI_HINT_REG216_NONE_HINT_216_MASK (0x80000000u)
  21202. #define CSL_CPINTC_PRI_HINT_REG216_NONE_HINT_216_SHIFT (0x0000001Fu)
  21203. #define CSL_CPINTC_PRI_HINT_REG216_NONE_HINT_216_RESETVAL (0x00000001u)
  21204. #define CSL_CPINTC_PRI_HINT_REG216_RESETVAL (0x80000000u)
  21205. /* pri_hint_reg217 */
  21206. #define CSL_CPINTC_PRI_HINT_REG217_PRI_HINT_217_MASK (0x000003FFu)
  21207. #define CSL_CPINTC_PRI_HINT_REG217_PRI_HINT_217_SHIFT (0x00000000u)
  21208. #define CSL_CPINTC_PRI_HINT_REG217_PRI_HINT_217_RESETVAL (0x00000000u)
  21209. #define CSL_CPINTC_PRI_HINT_REG217_NONE_HINT_217_MASK (0x80000000u)
  21210. #define CSL_CPINTC_PRI_HINT_REG217_NONE_HINT_217_SHIFT (0x0000001Fu)
  21211. #define CSL_CPINTC_PRI_HINT_REG217_NONE_HINT_217_RESETVAL (0x00000001u)
  21212. #define CSL_CPINTC_PRI_HINT_REG217_RESETVAL (0x80000000u)
  21213. /* pri_hint_reg218 */
  21214. #define CSL_CPINTC_PRI_HINT_REG218_PRI_HINT_218_MASK (0x000003FFu)
  21215. #define CSL_CPINTC_PRI_HINT_REG218_PRI_HINT_218_SHIFT (0x00000000u)
  21216. #define CSL_CPINTC_PRI_HINT_REG218_PRI_HINT_218_RESETVAL (0x00000000u)
  21217. #define CSL_CPINTC_PRI_HINT_REG218_NONE_HINT_218_MASK (0x80000000u)
  21218. #define CSL_CPINTC_PRI_HINT_REG218_NONE_HINT_218_SHIFT (0x0000001Fu)
  21219. #define CSL_CPINTC_PRI_HINT_REG218_NONE_HINT_218_RESETVAL (0x00000001u)
  21220. #define CSL_CPINTC_PRI_HINT_REG218_RESETVAL (0x80000000u)
  21221. /* pri_hint_reg219 */
  21222. #define CSL_CPINTC_PRI_HINT_REG219_PRI_HINT_219_MASK (0x000003FFu)
  21223. #define CSL_CPINTC_PRI_HINT_REG219_PRI_HINT_219_SHIFT (0x00000000u)
  21224. #define CSL_CPINTC_PRI_HINT_REG219_PRI_HINT_219_RESETVAL (0x00000000u)
  21225. #define CSL_CPINTC_PRI_HINT_REG219_NONE_HINT_219_MASK (0x80000000u)
  21226. #define CSL_CPINTC_PRI_HINT_REG219_NONE_HINT_219_SHIFT (0x0000001Fu)
  21227. #define CSL_CPINTC_PRI_HINT_REG219_NONE_HINT_219_RESETVAL (0x00000001u)
  21228. #define CSL_CPINTC_PRI_HINT_REG219_RESETVAL (0x80000000u)
  21229. /* pri_hint_reg220 */
  21230. #define CSL_CPINTC_PRI_HINT_REG220_PRI_HINT_220_MASK (0x000003FFu)
  21231. #define CSL_CPINTC_PRI_HINT_REG220_PRI_HINT_220_SHIFT (0x00000000u)
  21232. #define CSL_CPINTC_PRI_HINT_REG220_PRI_HINT_220_RESETVAL (0x00000000u)
  21233. #define CSL_CPINTC_PRI_HINT_REG220_NONE_HINT_220_MASK (0x80000000u)
  21234. #define CSL_CPINTC_PRI_HINT_REG220_NONE_HINT_220_SHIFT (0x0000001Fu)
  21235. #define CSL_CPINTC_PRI_HINT_REG220_NONE_HINT_220_RESETVAL (0x00000001u)
  21236. #define CSL_CPINTC_PRI_HINT_REG220_RESETVAL (0x80000000u)
  21237. /* pri_hint_reg221 */
  21238. #define CSL_CPINTC_PRI_HINT_REG221_PRI_HINT_221_MASK (0x000003FFu)
  21239. #define CSL_CPINTC_PRI_HINT_REG221_PRI_HINT_221_SHIFT (0x00000000u)
  21240. #define CSL_CPINTC_PRI_HINT_REG221_PRI_HINT_221_RESETVAL (0x00000000u)
  21241. #define CSL_CPINTC_PRI_HINT_REG221_NONE_HINT_221_MASK (0x80000000u)
  21242. #define CSL_CPINTC_PRI_HINT_REG221_NONE_HINT_221_SHIFT (0x0000001Fu)
  21243. #define CSL_CPINTC_PRI_HINT_REG221_NONE_HINT_221_RESETVAL (0x00000001u)
  21244. #define CSL_CPINTC_PRI_HINT_REG221_RESETVAL (0x80000000u)
  21245. /* pri_hint_reg222 */
  21246. #define CSL_CPINTC_PRI_HINT_REG222_PRI_HINT_222_MASK (0x000003FFu)
  21247. #define CSL_CPINTC_PRI_HINT_REG222_PRI_HINT_222_SHIFT (0x00000000u)
  21248. #define CSL_CPINTC_PRI_HINT_REG222_PRI_HINT_222_RESETVAL (0x00000000u)
  21249. #define CSL_CPINTC_PRI_HINT_REG222_NONE_HINT_222_MASK (0x80000000u)
  21250. #define CSL_CPINTC_PRI_HINT_REG222_NONE_HINT_222_SHIFT (0x0000001Fu)
  21251. #define CSL_CPINTC_PRI_HINT_REG222_NONE_HINT_222_RESETVAL (0x00000001u)
  21252. #define CSL_CPINTC_PRI_HINT_REG222_RESETVAL (0x80000000u)
  21253. /* pri_hint_reg223 */
  21254. #define CSL_CPINTC_PRI_HINT_REG223_PRI_HINT_223_MASK (0x000003FFu)
  21255. #define CSL_CPINTC_PRI_HINT_REG223_PRI_HINT_223_SHIFT (0x00000000u)
  21256. #define CSL_CPINTC_PRI_HINT_REG223_PRI_HINT_223_RESETVAL (0x00000000u)
  21257. #define CSL_CPINTC_PRI_HINT_REG223_NONE_HINT_223_MASK (0x80000000u)
  21258. #define CSL_CPINTC_PRI_HINT_REG223_NONE_HINT_223_SHIFT (0x0000001Fu)
  21259. #define CSL_CPINTC_PRI_HINT_REG223_NONE_HINT_223_RESETVAL (0x00000001u)
  21260. #define CSL_CPINTC_PRI_HINT_REG223_RESETVAL (0x80000000u)
  21261. /* pri_hint_reg224 */
  21262. #define CSL_CPINTC_PRI_HINT_REG224_PRI_HINT_224_MASK (0x000003FFu)
  21263. #define CSL_CPINTC_PRI_HINT_REG224_PRI_HINT_224_SHIFT (0x00000000u)
  21264. #define CSL_CPINTC_PRI_HINT_REG224_PRI_HINT_224_RESETVAL (0x00000000u)
  21265. #define CSL_CPINTC_PRI_HINT_REG224_NONE_HINT_224_MASK (0x80000000u)
  21266. #define CSL_CPINTC_PRI_HINT_REG224_NONE_HINT_224_SHIFT (0x0000001Fu)
  21267. #define CSL_CPINTC_PRI_HINT_REG224_NONE_HINT_224_RESETVAL (0x00000001u)
  21268. #define CSL_CPINTC_PRI_HINT_REG224_RESETVAL (0x80000000u)
  21269. /* pri_hint_reg225 */
  21270. #define CSL_CPINTC_PRI_HINT_REG225_PRI_HINT_225_MASK (0x000003FFu)
  21271. #define CSL_CPINTC_PRI_HINT_REG225_PRI_HINT_225_SHIFT (0x00000000u)
  21272. #define CSL_CPINTC_PRI_HINT_REG225_PRI_HINT_225_RESETVAL (0x00000000u)
  21273. #define CSL_CPINTC_PRI_HINT_REG225_NONE_HINT_225_MASK (0x80000000u)
  21274. #define CSL_CPINTC_PRI_HINT_REG225_NONE_HINT_225_SHIFT (0x0000001Fu)
  21275. #define CSL_CPINTC_PRI_HINT_REG225_NONE_HINT_225_RESETVAL (0x00000001u)
  21276. #define CSL_CPINTC_PRI_HINT_REG225_RESETVAL (0x80000000u)
  21277. /* pri_hint_reg226 */
  21278. #define CSL_CPINTC_PRI_HINT_REG226_PRI_HINT_226_MASK (0x000003FFu)
  21279. #define CSL_CPINTC_PRI_HINT_REG226_PRI_HINT_226_SHIFT (0x00000000u)
  21280. #define CSL_CPINTC_PRI_HINT_REG226_PRI_HINT_226_RESETVAL (0x00000000u)
  21281. #define CSL_CPINTC_PRI_HINT_REG226_NONE_HINT_226_MASK (0x80000000u)
  21282. #define CSL_CPINTC_PRI_HINT_REG226_NONE_HINT_226_SHIFT (0x0000001Fu)
  21283. #define CSL_CPINTC_PRI_HINT_REG226_NONE_HINT_226_RESETVAL (0x00000001u)
  21284. #define CSL_CPINTC_PRI_HINT_REG226_RESETVAL (0x80000000u)
  21285. /* pri_hint_reg227 */
  21286. #define CSL_CPINTC_PRI_HINT_REG227_PRI_HINT_227_MASK (0x000003FFu)
  21287. #define CSL_CPINTC_PRI_HINT_REG227_PRI_HINT_227_SHIFT (0x00000000u)
  21288. #define CSL_CPINTC_PRI_HINT_REG227_PRI_HINT_227_RESETVAL (0x00000000u)
  21289. #define CSL_CPINTC_PRI_HINT_REG227_NONE_HINT_227_MASK (0x80000000u)
  21290. #define CSL_CPINTC_PRI_HINT_REG227_NONE_HINT_227_SHIFT (0x0000001Fu)
  21291. #define CSL_CPINTC_PRI_HINT_REG227_NONE_HINT_227_RESETVAL (0x00000001u)
  21292. #define CSL_CPINTC_PRI_HINT_REG227_RESETVAL (0x80000000u)
  21293. /* pri_hint_reg228 */
  21294. #define CSL_CPINTC_PRI_HINT_REG228_PRI_HINT_228_MASK (0x000003FFu)
  21295. #define CSL_CPINTC_PRI_HINT_REG228_PRI_HINT_228_SHIFT (0x00000000u)
  21296. #define CSL_CPINTC_PRI_HINT_REG228_PRI_HINT_228_RESETVAL (0x00000000u)
  21297. #define CSL_CPINTC_PRI_HINT_REG228_NONE_HINT_228_MASK (0x80000000u)
  21298. #define CSL_CPINTC_PRI_HINT_REG228_NONE_HINT_228_SHIFT (0x0000001Fu)
  21299. #define CSL_CPINTC_PRI_HINT_REG228_NONE_HINT_228_RESETVAL (0x00000001u)
  21300. #define CSL_CPINTC_PRI_HINT_REG228_RESETVAL (0x80000000u)
  21301. /* pri_hint_reg229 */
  21302. #define CSL_CPINTC_PRI_HINT_REG229_PRI_HINT_229_MASK (0x000003FFu)
  21303. #define CSL_CPINTC_PRI_HINT_REG229_PRI_HINT_229_SHIFT (0x00000000u)
  21304. #define CSL_CPINTC_PRI_HINT_REG229_PRI_HINT_229_RESETVAL (0x00000000u)
  21305. #define CSL_CPINTC_PRI_HINT_REG229_NONE_HINT_229_MASK (0x80000000u)
  21306. #define CSL_CPINTC_PRI_HINT_REG229_NONE_HINT_229_SHIFT (0x0000001Fu)
  21307. #define CSL_CPINTC_PRI_HINT_REG229_NONE_HINT_229_RESETVAL (0x00000001u)
  21308. #define CSL_CPINTC_PRI_HINT_REG229_RESETVAL (0x80000000u)
  21309. /* pri_hint_reg230 */
  21310. #define CSL_CPINTC_PRI_HINT_REG230_PRI_HINT_230_MASK (0x000003FFu)
  21311. #define CSL_CPINTC_PRI_HINT_REG230_PRI_HINT_230_SHIFT (0x00000000u)
  21312. #define CSL_CPINTC_PRI_HINT_REG230_PRI_HINT_230_RESETVAL (0x00000000u)
  21313. #define CSL_CPINTC_PRI_HINT_REG230_NONE_HINT_230_MASK (0x80000000u)
  21314. #define CSL_CPINTC_PRI_HINT_REG230_NONE_HINT_230_SHIFT (0x0000001Fu)
  21315. #define CSL_CPINTC_PRI_HINT_REG230_NONE_HINT_230_RESETVAL (0x00000001u)
  21316. #define CSL_CPINTC_PRI_HINT_REG230_RESETVAL (0x80000000u)
  21317. /* pri_hint_reg231 */
  21318. #define CSL_CPINTC_PRI_HINT_REG231_PRI_HINT_231_MASK (0x000003FFu)
  21319. #define CSL_CPINTC_PRI_HINT_REG231_PRI_HINT_231_SHIFT (0x00000000u)
  21320. #define CSL_CPINTC_PRI_HINT_REG231_PRI_HINT_231_RESETVAL (0x00000000u)
  21321. #define CSL_CPINTC_PRI_HINT_REG231_NONE_HINT_231_MASK (0x80000000u)
  21322. #define CSL_CPINTC_PRI_HINT_REG231_NONE_HINT_231_SHIFT (0x0000001Fu)
  21323. #define CSL_CPINTC_PRI_HINT_REG231_NONE_HINT_231_RESETVAL (0x00000001u)
  21324. #define CSL_CPINTC_PRI_HINT_REG231_RESETVAL (0x80000000u)
  21325. /* pri_hint_reg232 */
  21326. #define CSL_CPINTC_PRI_HINT_REG232_PRI_HINT_232_MASK (0x000003FFu)
  21327. #define CSL_CPINTC_PRI_HINT_REG232_PRI_HINT_232_SHIFT (0x00000000u)
  21328. #define CSL_CPINTC_PRI_HINT_REG232_PRI_HINT_232_RESETVAL (0x00000000u)
  21329. #define CSL_CPINTC_PRI_HINT_REG232_NONE_HINT_232_MASK (0x80000000u)
  21330. #define CSL_CPINTC_PRI_HINT_REG232_NONE_HINT_232_SHIFT (0x0000001Fu)
  21331. #define CSL_CPINTC_PRI_HINT_REG232_NONE_HINT_232_RESETVAL (0x00000001u)
  21332. #define CSL_CPINTC_PRI_HINT_REG232_RESETVAL (0x80000000u)
  21333. /* pri_hint_reg233 */
  21334. #define CSL_CPINTC_PRI_HINT_REG233_PRI_HINT_233_MASK (0x000003FFu)
  21335. #define CSL_CPINTC_PRI_HINT_REG233_PRI_HINT_233_SHIFT (0x00000000u)
  21336. #define CSL_CPINTC_PRI_HINT_REG233_PRI_HINT_233_RESETVAL (0x00000000u)
  21337. #define CSL_CPINTC_PRI_HINT_REG233_NONE_HINT_233_MASK (0x80000000u)
  21338. #define CSL_CPINTC_PRI_HINT_REG233_NONE_HINT_233_SHIFT (0x0000001Fu)
  21339. #define CSL_CPINTC_PRI_HINT_REG233_NONE_HINT_233_RESETVAL (0x00000001u)
  21340. #define CSL_CPINTC_PRI_HINT_REG233_RESETVAL (0x80000000u)
  21341. /* pri_hint_reg234 */
  21342. #define CSL_CPINTC_PRI_HINT_REG234_PRI_HINT_234_MASK (0x000003FFu)
  21343. #define CSL_CPINTC_PRI_HINT_REG234_PRI_HINT_234_SHIFT (0x00000000u)
  21344. #define CSL_CPINTC_PRI_HINT_REG234_PRI_HINT_234_RESETVAL (0x00000000u)
  21345. #define CSL_CPINTC_PRI_HINT_REG234_NONE_HINT_234_MASK (0x80000000u)
  21346. #define CSL_CPINTC_PRI_HINT_REG234_NONE_HINT_234_SHIFT (0x0000001Fu)
  21347. #define CSL_CPINTC_PRI_HINT_REG234_NONE_HINT_234_RESETVAL (0x00000001u)
  21348. #define CSL_CPINTC_PRI_HINT_REG234_RESETVAL (0x80000000u)
  21349. /* pri_hint_reg235 */
  21350. #define CSL_CPINTC_PRI_HINT_REG235_PRI_HINT_235_MASK (0x000003FFu)
  21351. #define CSL_CPINTC_PRI_HINT_REG235_PRI_HINT_235_SHIFT (0x00000000u)
  21352. #define CSL_CPINTC_PRI_HINT_REG235_PRI_HINT_235_RESETVAL (0x00000000u)
  21353. #define CSL_CPINTC_PRI_HINT_REG235_NONE_HINT_235_MASK (0x80000000u)
  21354. #define CSL_CPINTC_PRI_HINT_REG235_NONE_HINT_235_SHIFT (0x0000001Fu)
  21355. #define CSL_CPINTC_PRI_HINT_REG235_NONE_HINT_235_RESETVAL (0x00000001u)
  21356. #define CSL_CPINTC_PRI_HINT_REG235_RESETVAL (0x80000000u)
  21357. /* pri_hint_reg236 */
  21358. #define CSL_CPINTC_PRI_HINT_REG236_PRI_HINT_236_MASK (0x000003FFu)
  21359. #define CSL_CPINTC_PRI_HINT_REG236_PRI_HINT_236_SHIFT (0x00000000u)
  21360. #define CSL_CPINTC_PRI_HINT_REG236_PRI_HINT_236_RESETVAL (0x00000000u)
  21361. #define CSL_CPINTC_PRI_HINT_REG236_NONE_HINT_236_MASK (0x80000000u)
  21362. #define CSL_CPINTC_PRI_HINT_REG236_NONE_HINT_236_SHIFT (0x0000001Fu)
  21363. #define CSL_CPINTC_PRI_HINT_REG236_NONE_HINT_236_RESETVAL (0x00000001u)
  21364. #define CSL_CPINTC_PRI_HINT_REG236_RESETVAL (0x80000000u)
  21365. /* pri_hint_reg237 */
  21366. #define CSL_CPINTC_PRI_HINT_REG237_PRI_HINT_237_MASK (0x000003FFu)
  21367. #define CSL_CPINTC_PRI_HINT_REG237_PRI_HINT_237_SHIFT (0x00000000u)
  21368. #define CSL_CPINTC_PRI_HINT_REG237_PRI_HINT_237_RESETVAL (0x00000000u)
  21369. #define CSL_CPINTC_PRI_HINT_REG237_NONE_HINT_237_MASK (0x80000000u)
  21370. #define CSL_CPINTC_PRI_HINT_REG237_NONE_HINT_237_SHIFT (0x0000001Fu)
  21371. #define CSL_CPINTC_PRI_HINT_REG237_NONE_HINT_237_RESETVAL (0x00000001u)
  21372. #define CSL_CPINTC_PRI_HINT_REG237_RESETVAL (0x80000000u)
  21373. /* pri_hint_reg238 */
  21374. #define CSL_CPINTC_PRI_HINT_REG238_PRI_HINT_238_MASK (0x000003FFu)
  21375. #define CSL_CPINTC_PRI_HINT_REG238_PRI_HINT_238_SHIFT (0x00000000u)
  21376. #define CSL_CPINTC_PRI_HINT_REG238_PRI_HINT_238_RESETVAL (0x00000000u)
  21377. #define CSL_CPINTC_PRI_HINT_REG238_NONE_HINT_238_MASK (0x80000000u)
  21378. #define CSL_CPINTC_PRI_HINT_REG238_NONE_HINT_238_SHIFT (0x0000001Fu)
  21379. #define CSL_CPINTC_PRI_HINT_REG238_NONE_HINT_238_RESETVAL (0x00000001u)
  21380. #define CSL_CPINTC_PRI_HINT_REG238_RESETVAL (0x80000000u)
  21381. /* pri_hint_reg239 */
  21382. #define CSL_CPINTC_PRI_HINT_REG239_PRI_HINT_239_MASK (0x000003FFu)
  21383. #define CSL_CPINTC_PRI_HINT_REG239_PRI_HINT_239_SHIFT (0x00000000u)
  21384. #define CSL_CPINTC_PRI_HINT_REG239_PRI_HINT_239_RESETVAL (0x00000000u)
  21385. #define CSL_CPINTC_PRI_HINT_REG239_NONE_HINT_239_MASK (0x80000000u)
  21386. #define CSL_CPINTC_PRI_HINT_REG239_NONE_HINT_239_SHIFT (0x0000001Fu)
  21387. #define CSL_CPINTC_PRI_HINT_REG239_NONE_HINT_239_RESETVAL (0x00000001u)
  21388. #define CSL_CPINTC_PRI_HINT_REG239_RESETVAL (0x80000000u)
  21389. /* pri_hint_reg240 */
  21390. #define CSL_CPINTC_PRI_HINT_REG240_PRI_HINT_240_MASK (0x000003FFu)
  21391. #define CSL_CPINTC_PRI_HINT_REG240_PRI_HINT_240_SHIFT (0x00000000u)
  21392. #define CSL_CPINTC_PRI_HINT_REG240_PRI_HINT_240_RESETVAL (0x00000000u)
  21393. #define CSL_CPINTC_PRI_HINT_REG240_NONE_HINT_240_MASK (0x80000000u)
  21394. #define CSL_CPINTC_PRI_HINT_REG240_NONE_HINT_240_SHIFT (0x0000001Fu)
  21395. #define CSL_CPINTC_PRI_HINT_REG240_NONE_HINT_240_RESETVAL (0x00000001u)
  21396. #define CSL_CPINTC_PRI_HINT_REG240_RESETVAL (0x80000000u)
  21397. /* pri_hint_reg241 */
  21398. #define CSL_CPINTC_PRI_HINT_REG241_PRI_HINT_241_MASK (0x000003FFu)
  21399. #define CSL_CPINTC_PRI_HINT_REG241_PRI_HINT_241_SHIFT (0x00000000u)
  21400. #define CSL_CPINTC_PRI_HINT_REG241_PRI_HINT_241_RESETVAL (0x00000000u)
  21401. #define CSL_CPINTC_PRI_HINT_REG241_NONE_HINT_241_MASK (0x80000000u)
  21402. #define CSL_CPINTC_PRI_HINT_REG241_NONE_HINT_241_SHIFT (0x0000001Fu)
  21403. #define CSL_CPINTC_PRI_HINT_REG241_NONE_HINT_241_RESETVAL (0x00000001u)
  21404. #define CSL_CPINTC_PRI_HINT_REG241_RESETVAL (0x80000000u)
  21405. /* pri_hint_reg242 */
  21406. #define CSL_CPINTC_PRI_HINT_REG242_PRI_HINT_242_MASK (0x000003FFu)
  21407. #define CSL_CPINTC_PRI_HINT_REG242_PRI_HINT_242_SHIFT (0x00000000u)
  21408. #define CSL_CPINTC_PRI_HINT_REG242_PRI_HINT_242_RESETVAL (0x00000000u)
  21409. #define CSL_CPINTC_PRI_HINT_REG242_NONE_HINT_242_MASK (0x80000000u)
  21410. #define CSL_CPINTC_PRI_HINT_REG242_NONE_HINT_242_SHIFT (0x0000001Fu)
  21411. #define CSL_CPINTC_PRI_HINT_REG242_NONE_HINT_242_RESETVAL (0x00000001u)
  21412. #define CSL_CPINTC_PRI_HINT_REG242_RESETVAL (0x80000000u)
  21413. /* pri_hint_reg243 */
  21414. #define CSL_CPINTC_PRI_HINT_REG243_PRI_HINT_243_MASK (0x000003FFu)
  21415. #define CSL_CPINTC_PRI_HINT_REG243_PRI_HINT_243_SHIFT (0x00000000u)
  21416. #define CSL_CPINTC_PRI_HINT_REG243_PRI_HINT_243_RESETVAL (0x00000000u)
  21417. #define CSL_CPINTC_PRI_HINT_REG243_NONE_HINT_243_MASK (0x80000000u)
  21418. #define CSL_CPINTC_PRI_HINT_REG243_NONE_HINT_243_SHIFT (0x0000001Fu)
  21419. #define CSL_CPINTC_PRI_HINT_REG243_NONE_HINT_243_RESETVAL (0x00000001u)
  21420. #define CSL_CPINTC_PRI_HINT_REG243_RESETVAL (0x80000000u)
  21421. /* pri_hint_reg244 */
  21422. #define CSL_CPINTC_PRI_HINT_REG244_PRI_HINT_244_MASK (0x000003FFu)
  21423. #define CSL_CPINTC_PRI_HINT_REG244_PRI_HINT_244_SHIFT (0x00000000u)
  21424. #define CSL_CPINTC_PRI_HINT_REG244_PRI_HINT_244_RESETVAL (0x00000000u)
  21425. #define CSL_CPINTC_PRI_HINT_REG244_NONE_HINT_244_MASK (0x80000000u)
  21426. #define CSL_CPINTC_PRI_HINT_REG244_NONE_HINT_244_SHIFT (0x0000001Fu)
  21427. #define CSL_CPINTC_PRI_HINT_REG244_NONE_HINT_244_RESETVAL (0x00000001u)
  21428. #define CSL_CPINTC_PRI_HINT_REG244_RESETVAL (0x80000000u)
  21429. /* pri_hint_reg245 */
  21430. #define CSL_CPINTC_PRI_HINT_REG245_PRI_HINT_245_MASK (0x000003FFu)
  21431. #define CSL_CPINTC_PRI_HINT_REG245_PRI_HINT_245_SHIFT (0x00000000u)
  21432. #define CSL_CPINTC_PRI_HINT_REG245_PRI_HINT_245_RESETVAL (0x00000000u)
  21433. #define CSL_CPINTC_PRI_HINT_REG245_NONE_HINT_245_MASK (0x80000000u)
  21434. #define CSL_CPINTC_PRI_HINT_REG245_NONE_HINT_245_SHIFT (0x0000001Fu)
  21435. #define CSL_CPINTC_PRI_HINT_REG245_NONE_HINT_245_RESETVAL (0x00000001u)
  21436. #define CSL_CPINTC_PRI_HINT_REG245_RESETVAL (0x80000000u)
  21437. /* pri_hint_reg246 */
  21438. #define CSL_CPINTC_PRI_HINT_REG246_PRI_HINT_246_MASK (0x000003FFu)
  21439. #define CSL_CPINTC_PRI_HINT_REG246_PRI_HINT_246_SHIFT (0x00000000u)
  21440. #define CSL_CPINTC_PRI_HINT_REG246_PRI_HINT_246_RESETVAL (0x00000000u)
  21441. #define CSL_CPINTC_PRI_HINT_REG246_NONE_HINT_246_MASK (0x80000000u)
  21442. #define CSL_CPINTC_PRI_HINT_REG246_NONE_HINT_246_SHIFT (0x0000001Fu)
  21443. #define CSL_CPINTC_PRI_HINT_REG246_NONE_HINT_246_RESETVAL (0x00000001u)
  21444. #define CSL_CPINTC_PRI_HINT_REG246_RESETVAL (0x80000000u)
  21445. /* pri_hint_reg247 */
  21446. #define CSL_CPINTC_PRI_HINT_REG247_PRI_HINT_247_MASK (0x000003FFu)
  21447. #define CSL_CPINTC_PRI_HINT_REG247_PRI_HINT_247_SHIFT (0x00000000u)
  21448. #define CSL_CPINTC_PRI_HINT_REG247_PRI_HINT_247_RESETVAL (0x00000000u)
  21449. #define CSL_CPINTC_PRI_HINT_REG247_NONE_HINT_247_MASK (0x80000000u)
  21450. #define CSL_CPINTC_PRI_HINT_REG247_NONE_HINT_247_SHIFT (0x0000001Fu)
  21451. #define CSL_CPINTC_PRI_HINT_REG247_NONE_HINT_247_RESETVAL (0x00000001u)
  21452. #define CSL_CPINTC_PRI_HINT_REG247_RESETVAL (0x80000000u)
  21453. /* pri_hint_reg248 */
  21454. #define CSL_CPINTC_PRI_HINT_REG248_PRI_HINT_248_MASK (0x000003FFu)
  21455. #define CSL_CPINTC_PRI_HINT_REG248_PRI_HINT_248_SHIFT (0x00000000u)
  21456. #define CSL_CPINTC_PRI_HINT_REG248_PRI_HINT_248_RESETVAL (0x00000000u)
  21457. #define CSL_CPINTC_PRI_HINT_REG248_NONE_HINT_248_MASK (0x80000000u)
  21458. #define CSL_CPINTC_PRI_HINT_REG248_NONE_HINT_248_SHIFT (0x0000001Fu)
  21459. #define CSL_CPINTC_PRI_HINT_REG248_NONE_HINT_248_RESETVAL (0x00000001u)
  21460. #define CSL_CPINTC_PRI_HINT_REG248_RESETVAL (0x80000000u)
  21461. /* pri_hint_reg249 */
  21462. #define CSL_CPINTC_PRI_HINT_REG249_PRI_HINT_249_MASK (0x000003FFu)
  21463. #define CSL_CPINTC_PRI_HINT_REG249_PRI_HINT_249_SHIFT (0x00000000u)
  21464. #define CSL_CPINTC_PRI_HINT_REG249_PRI_HINT_249_RESETVAL (0x00000000u)
  21465. #define CSL_CPINTC_PRI_HINT_REG249_NONE_HINT_249_MASK (0x80000000u)
  21466. #define CSL_CPINTC_PRI_HINT_REG249_NONE_HINT_249_SHIFT (0x0000001Fu)
  21467. #define CSL_CPINTC_PRI_HINT_REG249_NONE_HINT_249_RESETVAL (0x00000001u)
  21468. #define CSL_CPINTC_PRI_HINT_REG249_RESETVAL (0x80000000u)
  21469. /* pri_hint_reg250 */
  21470. #define CSL_CPINTC_PRI_HINT_REG250_PRI_HINT_250_MASK (0x000003FFu)
  21471. #define CSL_CPINTC_PRI_HINT_REG250_PRI_HINT_250_SHIFT (0x00000000u)
  21472. #define CSL_CPINTC_PRI_HINT_REG250_PRI_HINT_250_RESETVAL (0x00000000u)
  21473. #define CSL_CPINTC_PRI_HINT_REG250_NONE_HINT_250_MASK (0x80000000u)
  21474. #define CSL_CPINTC_PRI_HINT_REG250_NONE_HINT_250_SHIFT (0x0000001Fu)
  21475. #define CSL_CPINTC_PRI_HINT_REG250_NONE_HINT_250_RESETVAL (0x00000001u)
  21476. #define CSL_CPINTC_PRI_HINT_REG250_RESETVAL (0x80000000u)
  21477. /* pri_hint_reg251 */
  21478. #define CSL_CPINTC_PRI_HINT_REG251_PRI_HINT_251_MASK (0x000003FFu)
  21479. #define CSL_CPINTC_PRI_HINT_REG251_PRI_HINT_251_SHIFT (0x00000000u)
  21480. #define CSL_CPINTC_PRI_HINT_REG251_PRI_HINT_251_RESETVAL (0x00000000u)
  21481. #define CSL_CPINTC_PRI_HINT_REG251_NONE_HINT_251_MASK (0x80000000u)
  21482. #define CSL_CPINTC_PRI_HINT_REG251_NONE_HINT_251_SHIFT (0x0000001Fu)
  21483. #define CSL_CPINTC_PRI_HINT_REG251_NONE_HINT_251_RESETVAL (0x00000001u)
  21484. #define CSL_CPINTC_PRI_HINT_REG251_RESETVAL (0x80000000u)
  21485. /* pri_hint_reg252 */
  21486. #define CSL_CPINTC_PRI_HINT_REG252_PRI_HINT_252_MASK (0x000003FFu)
  21487. #define CSL_CPINTC_PRI_HINT_REG252_PRI_HINT_252_SHIFT (0x00000000u)
  21488. #define CSL_CPINTC_PRI_HINT_REG252_PRI_HINT_252_RESETVAL (0x00000000u)
  21489. #define CSL_CPINTC_PRI_HINT_REG252_NONE_HINT_252_MASK (0x80000000u)
  21490. #define CSL_CPINTC_PRI_HINT_REG252_NONE_HINT_252_SHIFT (0x0000001Fu)
  21491. #define CSL_CPINTC_PRI_HINT_REG252_NONE_HINT_252_RESETVAL (0x00000001u)
  21492. #define CSL_CPINTC_PRI_HINT_REG252_RESETVAL (0x80000000u)
  21493. /* pri_hint_reg253 */
  21494. #define CSL_CPINTC_PRI_HINT_REG253_PRI_HINT_253_MASK (0x000003FFu)
  21495. #define CSL_CPINTC_PRI_HINT_REG253_PRI_HINT_253_SHIFT (0x00000000u)
  21496. #define CSL_CPINTC_PRI_HINT_REG253_PRI_HINT_253_RESETVAL (0x00000000u)
  21497. #define CSL_CPINTC_PRI_HINT_REG253_NONE_HINT_253_MASK (0x80000000u)
  21498. #define CSL_CPINTC_PRI_HINT_REG253_NONE_HINT_253_SHIFT (0x0000001Fu)
  21499. #define CSL_CPINTC_PRI_HINT_REG253_NONE_HINT_253_RESETVAL (0x00000001u)
  21500. #define CSL_CPINTC_PRI_HINT_REG253_RESETVAL (0x80000000u)
  21501. /* pri_hint_reg254 */
  21502. #define CSL_CPINTC_PRI_HINT_REG254_PRI_HINT_254_MASK (0x000003FFu)
  21503. #define CSL_CPINTC_PRI_HINT_REG254_PRI_HINT_254_SHIFT (0x00000000u)
  21504. #define CSL_CPINTC_PRI_HINT_REG254_PRI_HINT_254_RESETVAL (0x00000000u)
  21505. #define CSL_CPINTC_PRI_HINT_REG254_NONE_HINT_254_MASK (0x80000000u)
  21506. #define CSL_CPINTC_PRI_HINT_REG254_NONE_HINT_254_SHIFT (0x0000001Fu)
  21507. #define CSL_CPINTC_PRI_HINT_REG254_NONE_HINT_254_RESETVAL (0x00000001u)
  21508. #define CSL_CPINTC_PRI_HINT_REG254_RESETVAL (0x80000000u)
  21509. /* pri_hint_reg255 */
  21510. #define CSL_CPINTC_PRI_HINT_REG255_PRI_HINT_255_MASK (0x000003FFu)
  21511. #define CSL_CPINTC_PRI_HINT_REG255_PRI_HINT_255_SHIFT (0x00000000u)
  21512. #define CSL_CPINTC_PRI_HINT_REG255_PRI_HINT_255_RESETVAL (0x00000000u)
  21513. #define CSL_CPINTC_PRI_HINT_REG255_NONE_HINT_255_MASK (0x80000000u)
  21514. #define CSL_CPINTC_PRI_HINT_REG255_NONE_HINT_255_SHIFT (0x0000001Fu)
  21515. #define CSL_CPINTC_PRI_HINT_REG255_NONE_HINT_255_RESETVAL (0x00000001u)
  21516. #define CSL_CPINTC_PRI_HINT_REG255_RESETVAL (0x80000000u)
  21517. /* polarity_reg0 */
  21518. #define CSL_CPINTC_POLARITY_REG0_POLARITY_0_MASK (0x00000001u)
  21519. #define CSL_CPINTC_POLARITY_REG0_POLARITY_0_SHIFT (0x00000000u)
  21520. #define CSL_CPINTC_POLARITY_REG0_POLARITY_0_RESETVAL (0x00000000u)
  21521. #define CSL_CPINTC_POLARITY_REG0_POLARITY_1_MASK (0x00000002u)
  21522. #define CSL_CPINTC_POLARITY_REG0_POLARITY_1_SHIFT (0x00000001u)
  21523. #define CSL_CPINTC_POLARITY_REG0_POLARITY_1_RESETVAL (0x00000000u)
  21524. #define CSL_CPINTC_POLARITY_REG0_POLARITY_2_MASK (0x00000004u)
  21525. #define CSL_CPINTC_POLARITY_REG0_POLARITY_2_SHIFT (0x00000002u)
  21526. #define CSL_CPINTC_POLARITY_REG0_POLARITY_2_RESETVAL (0x00000000u)
  21527. #define CSL_CPINTC_POLARITY_REG0_POLARITY_3_MASK (0x00000008u)
  21528. #define CSL_CPINTC_POLARITY_REG0_POLARITY_3_SHIFT (0x00000003u)
  21529. #define CSL_CPINTC_POLARITY_REG0_POLARITY_3_RESETVAL (0x00000000u)
  21530. #define CSL_CPINTC_POLARITY_REG0_POLARITY_4_MASK (0x00000010u)
  21531. #define CSL_CPINTC_POLARITY_REG0_POLARITY_4_SHIFT (0x00000004u)
  21532. #define CSL_CPINTC_POLARITY_REG0_POLARITY_4_RESETVAL (0x00000000u)
  21533. #define CSL_CPINTC_POLARITY_REG0_POLARITY_5_MASK (0x00000020u)
  21534. #define CSL_CPINTC_POLARITY_REG0_POLARITY_5_SHIFT (0x00000005u)
  21535. #define CSL_CPINTC_POLARITY_REG0_POLARITY_5_RESETVAL (0x00000000u)
  21536. #define CSL_CPINTC_POLARITY_REG0_POLARITY_6_MASK (0x00000040u)
  21537. #define CSL_CPINTC_POLARITY_REG0_POLARITY_6_SHIFT (0x00000006u)
  21538. #define CSL_CPINTC_POLARITY_REG0_POLARITY_6_RESETVAL (0x00000000u)
  21539. #define CSL_CPINTC_POLARITY_REG0_POLARITY_7_MASK (0x00000080u)
  21540. #define CSL_CPINTC_POLARITY_REG0_POLARITY_7_SHIFT (0x00000007u)
  21541. #define CSL_CPINTC_POLARITY_REG0_POLARITY_7_RESETVAL (0x00000000u)
  21542. #define CSL_CPINTC_POLARITY_REG0_POLARITY_8_MASK (0x00000100u)
  21543. #define CSL_CPINTC_POLARITY_REG0_POLARITY_8_SHIFT (0x00000008u)
  21544. #define CSL_CPINTC_POLARITY_REG0_POLARITY_8_RESETVAL (0x00000000u)
  21545. #define CSL_CPINTC_POLARITY_REG0_POLARITY_9_MASK (0x00000200u)
  21546. #define CSL_CPINTC_POLARITY_REG0_POLARITY_9_SHIFT (0x00000009u)
  21547. #define CSL_CPINTC_POLARITY_REG0_POLARITY_9_RESETVAL (0x00000000u)
  21548. #define CSL_CPINTC_POLARITY_REG0_POLARITY_10_MASK (0x00000400u)
  21549. #define CSL_CPINTC_POLARITY_REG0_POLARITY_10_SHIFT (0x0000000Au)
  21550. #define CSL_CPINTC_POLARITY_REG0_POLARITY_10_RESETVAL (0x00000000u)
  21551. #define CSL_CPINTC_POLARITY_REG0_POLARITY_11_MASK (0x00000800u)
  21552. #define CSL_CPINTC_POLARITY_REG0_POLARITY_11_SHIFT (0x0000000Bu)
  21553. #define CSL_CPINTC_POLARITY_REG0_POLARITY_11_RESETVAL (0x00000000u)
  21554. #define CSL_CPINTC_POLARITY_REG0_POLARITY_12_MASK (0x00001000u)
  21555. #define CSL_CPINTC_POLARITY_REG0_POLARITY_12_SHIFT (0x0000000Cu)
  21556. #define CSL_CPINTC_POLARITY_REG0_POLARITY_12_RESETVAL (0x00000000u)
  21557. #define CSL_CPINTC_POLARITY_REG0_POLARITY_13_MASK (0x00002000u)
  21558. #define CSL_CPINTC_POLARITY_REG0_POLARITY_13_SHIFT (0x0000000Du)
  21559. #define CSL_CPINTC_POLARITY_REG0_POLARITY_13_RESETVAL (0x00000000u)
  21560. #define CSL_CPINTC_POLARITY_REG0_POLARITY_14_MASK (0x00004000u)
  21561. #define CSL_CPINTC_POLARITY_REG0_POLARITY_14_SHIFT (0x0000000Eu)
  21562. #define CSL_CPINTC_POLARITY_REG0_POLARITY_14_RESETVAL (0x00000000u)
  21563. #define CSL_CPINTC_POLARITY_REG0_POLARITY_15_MASK (0x00008000u)
  21564. #define CSL_CPINTC_POLARITY_REG0_POLARITY_15_SHIFT (0x0000000Fu)
  21565. #define CSL_CPINTC_POLARITY_REG0_POLARITY_15_RESETVAL (0x00000000u)
  21566. #define CSL_CPINTC_POLARITY_REG0_POLARITY_16_MASK (0x00010000u)
  21567. #define CSL_CPINTC_POLARITY_REG0_POLARITY_16_SHIFT (0x00000010u)
  21568. #define CSL_CPINTC_POLARITY_REG0_POLARITY_16_RESETVAL (0x00000000u)
  21569. #define CSL_CPINTC_POLARITY_REG0_POLARITY_17_MASK (0x00020000u)
  21570. #define CSL_CPINTC_POLARITY_REG0_POLARITY_17_SHIFT (0x00000011u)
  21571. #define CSL_CPINTC_POLARITY_REG0_POLARITY_17_RESETVAL (0x00000000u)
  21572. #define CSL_CPINTC_POLARITY_REG0_POLARITY_18_MASK (0x00040000u)
  21573. #define CSL_CPINTC_POLARITY_REG0_POLARITY_18_SHIFT (0x00000012u)
  21574. #define CSL_CPINTC_POLARITY_REG0_POLARITY_18_RESETVAL (0x00000000u)
  21575. #define CSL_CPINTC_POLARITY_REG0_POLARITY_19_MASK (0x00080000u)
  21576. #define CSL_CPINTC_POLARITY_REG0_POLARITY_19_SHIFT (0x00000013u)
  21577. #define CSL_CPINTC_POLARITY_REG0_POLARITY_19_RESETVAL (0x00000000u)
  21578. #define CSL_CPINTC_POLARITY_REG0_POLARITY_20_MASK (0x00100000u)
  21579. #define CSL_CPINTC_POLARITY_REG0_POLARITY_20_SHIFT (0x00000014u)
  21580. #define CSL_CPINTC_POLARITY_REG0_POLARITY_20_RESETVAL (0x00000000u)
  21581. #define CSL_CPINTC_POLARITY_REG0_POLARITY_21_MASK (0x00200000u)
  21582. #define CSL_CPINTC_POLARITY_REG0_POLARITY_21_SHIFT (0x00000015u)
  21583. #define CSL_CPINTC_POLARITY_REG0_POLARITY_21_RESETVAL (0x00000000u)
  21584. #define CSL_CPINTC_POLARITY_REG0_POLARITY_22_MASK (0x00400000u)
  21585. #define CSL_CPINTC_POLARITY_REG0_POLARITY_22_SHIFT (0x00000016u)
  21586. #define CSL_CPINTC_POLARITY_REG0_POLARITY_22_RESETVAL (0x00000000u)
  21587. #define CSL_CPINTC_POLARITY_REG0_POLARITY_23_MASK (0x00800000u)
  21588. #define CSL_CPINTC_POLARITY_REG0_POLARITY_23_SHIFT (0x00000017u)
  21589. #define CSL_CPINTC_POLARITY_REG0_POLARITY_23_RESETVAL (0x00000000u)
  21590. #define CSL_CPINTC_POLARITY_REG0_POLARITY_24_MASK (0x01000000u)
  21591. #define CSL_CPINTC_POLARITY_REG0_POLARITY_24_SHIFT (0x00000018u)
  21592. #define CSL_CPINTC_POLARITY_REG0_POLARITY_24_RESETVAL (0x00000000u)
  21593. #define CSL_CPINTC_POLARITY_REG0_POLARITY_25_MASK (0x02000000u)
  21594. #define CSL_CPINTC_POLARITY_REG0_POLARITY_25_SHIFT (0x00000019u)
  21595. #define CSL_CPINTC_POLARITY_REG0_POLARITY_25_RESETVAL (0x00000000u)
  21596. #define CSL_CPINTC_POLARITY_REG0_POLARITY_26_MASK (0x04000000u)
  21597. #define CSL_CPINTC_POLARITY_REG0_POLARITY_26_SHIFT (0x0000001Au)
  21598. #define CSL_CPINTC_POLARITY_REG0_POLARITY_26_RESETVAL (0x00000000u)
  21599. #define CSL_CPINTC_POLARITY_REG0_POLARITY_27_MASK (0x08000000u)
  21600. #define CSL_CPINTC_POLARITY_REG0_POLARITY_27_SHIFT (0x0000001Bu)
  21601. #define CSL_CPINTC_POLARITY_REG0_POLARITY_27_RESETVAL (0x00000000u)
  21602. #define CSL_CPINTC_POLARITY_REG0_POLARITY_28_MASK (0x10000000u)
  21603. #define CSL_CPINTC_POLARITY_REG0_POLARITY_28_SHIFT (0x0000001Cu)
  21604. #define CSL_CPINTC_POLARITY_REG0_POLARITY_28_RESETVAL (0x00000000u)
  21605. #define CSL_CPINTC_POLARITY_REG0_POLARITY_29_MASK (0x20000000u)
  21606. #define CSL_CPINTC_POLARITY_REG0_POLARITY_29_SHIFT (0x0000001Du)
  21607. #define CSL_CPINTC_POLARITY_REG0_POLARITY_29_RESETVAL (0x00000000u)
  21608. #define CSL_CPINTC_POLARITY_REG0_POLARITY_30_MASK (0x40000000u)
  21609. #define CSL_CPINTC_POLARITY_REG0_POLARITY_30_SHIFT (0x0000001Eu)
  21610. #define CSL_CPINTC_POLARITY_REG0_POLARITY_30_RESETVAL (0x00000000u)
  21611. #define CSL_CPINTC_POLARITY_REG0_POLARITY_31_MASK (0x80000000u)
  21612. #define CSL_CPINTC_POLARITY_REG0_POLARITY_31_SHIFT (0x0000001Fu)
  21613. #define CSL_CPINTC_POLARITY_REG0_POLARITY_31_RESETVAL (0x00000000u)
  21614. #define CSL_CPINTC_POLARITY_REG0_RESETVAL (0x00000000u)
  21615. /* polarity_reg1 */
  21616. #define CSL_CPINTC_POLARITY_REG1_POLARITY_32_MASK (0x00000001u)
  21617. #define CSL_CPINTC_POLARITY_REG1_POLARITY_32_SHIFT (0x00000000u)
  21618. #define CSL_CPINTC_POLARITY_REG1_POLARITY_32_RESETVAL (0x00000000u)
  21619. #define CSL_CPINTC_POLARITY_REG1_POLARITY_33_MASK (0x00000002u)
  21620. #define CSL_CPINTC_POLARITY_REG1_POLARITY_33_SHIFT (0x00000001u)
  21621. #define CSL_CPINTC_POLARITY_REG1_POLARITY_33_RESETVAL (0x00000000u)
  21622. #define CSL_CPINTC_POLARITY_REG1_POLARITY_34_MASK (0x00000004u)
  21623. #define CSL_CPINTC_POLARITY_REG1_POLARITY_34_SHIFT (0x00000002u)
  21624. #define CSL_CPINTC_POLARITY_REG1_POLARITY_34_RESETVAL (0x00000000u)
  21625. #define CSL_CPINTC_POLARITY_REG1_POLARITY_35_MASK (0x00000008u)
  21626. #define CSL_CPINTC_POLARITY_REG1_POLARITY_35_SHIFT (0x00000003u)
  21627. #define CSL_CPINTC_POLARITY_REG1_POLARITY_35_RESETVAL (0x00000000u)
  21628. #define CSL_CPINTC_POLARITY_REG1_POLARITY_36_MASK (0x00000010u)
  21629. #define CSL_CPINTC_POLARITY_REG1_POLARITY_36_SHIFT (0x00000004u)
  21630. #define CSL_CPINTC_POLARITY_REG1_POLARITY_36_RESETVAL (0x00000000u)
  21631. #define CSL_CPINTC_POLARITY_REG1_POLARITY_37_MASK (0x00000020u)
  21632. #define CSL_CPINTC_POLARITY_REG1_POLARITY_37_SHIFT (0x00000005u)
  21633. #define CSL_CPINTC_POLARITY_REG1_POLARITY_37_RESETVAL (0x00000000u)
  21634. #define CSL_CPINTC_POLARITY_REG1_POLARITY_38_MASK (0x00000040u)
  21635. #define CSL_CPINTC_POLARITY_REG1_POLARITY_38_SHIFT (0x00000006u)
  21636. #define CSL_CPINTC_POLARITY_REG1_POLARITY_38_RESETVAL (0x00000000u)
  21637. #define CSL_CPINTC_POLARITY_REG1_POLARITY_39_MASK (0x00000080u)
  21638. #define CSL_CPINTC_POLARITY_REG1_POLARITY_39_SHIFT (0x00000007u)
  21639. #define CSL_CPINTC_POLARITY_REG1_POLARITY_39_RESETVAL (0x00000000u)
  21640. #define CSL_CPINTC_POLARITY_REG1_POLARITY_40_MASK (0x00000100u)
  21641. #define CSL_CPINTC_POLARITY_REG1_POLARITY_40_SHIFT (0x00000008u)
  21642. #define CSL_CPINTC_POLARITY_REG1_POLARITY_40_RESETVAL (0x00000000u)
  21643. #define CSL_CPINTC_POLARITY_REG1_POLARITY_41_MASK (0x00000200u)
  21644. #define CSL_CPINTC_POLARITY_REG1_POLARITY_41_SHIFT (0x00000009u)
  21645. #define CSL_CPINTC_POLARITY_REG1_POLARITY_41_RESETVAL (0x00000000u)
  21646. #define CSL_CPINTC_POLARITY_REG1_POLARITY_42_MASK (0x00000400u)
  21647. #define CSL_CPINTC_POLARITY_REG1_POLARITY_42_SHIFT (0x0000000Au)
  21648. #define CSL_CPINTC_POLARITY_REG1_POLARITY_42_RESETVAL (0x00000000u)
  21649. #define CSL_CPINTC_POLARITY_REG1_POLARITY_43_MASK (0x00000800u)
  21650. #define CSL_CPINTC_POLARITY_REG1_POLARITY_43_SHIFT (0x0000000Bu)
  21651. #define CSL_CPINTC_POLARITY_REG1_POLARITY_43_RESETVAL (0x00000000u)
  21652. #define CSL_CPINTC_POLARITY_REG1_POLARITY_44_MASK (0x00001000u)
  21653. #define CSL_CPINTC_POLARITY_REG1_POLARITY_44_SHIFT (0x0000000Cu)
  21654. #define CSL_CPINTC_POLARITY_REG1_POLARITY_44_RESETVAL (0x00000000u)
  21655. #define CSL_CPINTC_POLARITY_REG1_POLARITY_45_MASK (0x00002000u)
  21656. #define CSL_CPINTC_POLARITY_REG1_POLARITY_45_SHIFT (0x0000000Du)
  21657. #define CSL_CPINTC_POLARITY_REG1_POLARITY_45_RESETVAL (0x00000000u)
  21658. #define CSL_CPINTC_POLARITY_REG1_POLARITY_46_MASK (0x00004000u)
  21659. #define CSL_CPINTC_POLARITY_REG1_POLARITY_46_SHIFT (0x0000000Eu)
  21660. #define CSL_CPINTC_POLARITY_REG1_POLARITY_46_RESETVAL (0x00000000u)
  21661. #define CSL_CPINTC_POLARITY_REG1_POLARITY_47_MASK (0x00008000u)
  21662. #define CSL_CPINTC_POLARITY_REG1_POLARITY_47_SHIFT (0x0000000Fu)
  21663. #define CSL_CPINTC_POLARITY_REG1_POLARITY_47_RESETVAL (0x00000000u)
  21664. #define CSL_CPINTC_POLARITY_REG1_POLARITY_48_MASK (0x00010000u)
  21665. #define CSL_CPINTC_POLARITY_REG1_POLARITY_48_SHIFT (0x00000010u)
  21666. #define CSL_CPINTC_POLARITY_REG1_POLARITY_48_RESETVAL (0x00000000u)
  21667. #define CSL_CPINTC_POLARITY_REG1_POLARITY_49_MASK (0x00020000u)
  21668. #define CSL_CPINTC_POLARITY_REG1_POLARITY_49_SHIFT (0x00000011u)
  21669. #define CSL_CPINTC_POLARITY_REG1_POLARITY_49_RESETVAL (0x00000000u)
  21670. #define CSL_CPINTC_POLARITY_REG1_POLARITY_50_MASK (0x00040000u)
  21671. #define CSL_CPINTC_POLARITY_REG1_POLARITY_50_SHIFT (0x00000012u)
  21672. #define CSL_CPINTC_POLARITY_REG1_POLARITY_50_RESETVAL (0x00000000u)
  21673. #define CSL_CPINTC_POLARITY_REG1_POLARITY_51_MASK (0x00080000u)
  21674. #define CSL_CPINTC_POLARITY_REG1_POLARITY_51_SHIFT (0x00000013u)
  21675. #define CSL_CPINTC_POLARITY_REG1_POLARITY_51_RESETVAL (0x00000000u)
  21676. #define CSL_CPINTC_POLARITY_REG1_POLARITY_52_MASK (0x00100000u)
  21677. #define CSL_CPINTC_POLARITY_REG1_POLARITY_52_SHIFT (0x00000014u)
  21678. #define CSL_CPINTC_POLARITY_REG1_POLARITY_52_RESETVAL (0x00000000u)
  21679. #define CSL_CPINTC_POLARITY_REG1_POLARITY_53_MASK (0x00200000u)
  21680. #define CSL_CPINTC_POLARITY_REG1_POLARITY_53_SHIFT (0x00000015u)
  21681. #define CSL_CPINTC_POLARITY_REG1_POLARITY_53_RESETVAL (0x00000000u)
  21682. #define CSL_CPINTC_POLARITY_REG1_POLARITY_54_MASK (0x00400000u)
  21683. #define CSL_CPINTC_POLARITY_REG1_POLARITY_54_SHIFT (0x00000016u)
  21684. #define CSL_CPINTC_POLARITY_REG1_POLARITY_54_RESETVAL (0x00000000u)
  21685. #define CSL_CPINTC_POLARITY_REG1_POLARITY_55_MASK (0x00800000u)
  21686. #define CSL_CPINTC_POLARITY_REG1_POLARITY_55_SHIFT (0x00000017u)
  21687. #define CSL_CPINTC_POLARITY_REG1_POLARITY_55_RESETVAL (0x00000000u)
  21688. #define CSL_CPINTC_POLARITY_REG1_POLARITY_56_MASK (0x01000000u)
  21689. #define CSL_CPINTC_POLARITY_REG1_POLARITY_56_SHIFT (0x00000018u)
  21690. #define CSL_CPINTC_POLARITY_REG1_POLARITY_56_RESETVAL (0x00000000u)
  21691. #define CSL_CPINTC_POLARITY_REG1_POLARITY_57_MASK (0x02000000u)
  21692. #define CSL_CPINTC_POLARITY_REG1_POLARITY_57_SHIFT (0x00000019u)
  21693. #define CSL_CPINTC_POLARITY_REG1_POLARITY_57_RESETVAL (0x00000000u)
  21694. #define CSL_CPINTC_POLARITY_REG1_POLARITY_58_MASK (0x04000000u)
  21695. #define CSL_CPINTC_POLARITY_REG1_POLARITY_58_SHIFT (0x0000001Au)
  21696. #define CSL_CPINTC_POLARITY_REG1_POLARITY_58_RESETVAL (0x00000000u)
  21697. #define CSL_CPINTC_POLARITY_REG1_POLARITY_59_MASK (0x08000000u)
  21698. #define CSL_CPINTC_POLARITY_REG1_POLARITY_59_SHIFT (0x0000001Bu)
  21699. #define CSL_CPINTC_POLARITY_REG1_POLARITY_59_RESETVAL (0x00000000u)
  21700. #define CSL_CPINTC_POLARITY_REG1_POLARITY_60_MASK (0x10000000u)
  21701. #define CSL_CPINTC_POLARITY_REG1_POLARITY_60_SHIFT (0x0000001Cu)
  21702. #define CSL_CPINTC_POLARITY_REG1_POLARITY_60_RESETVAL (0x00000000u)
  21703. #define CSL_CPINTC_POLARITY_REG1_POLARITY_61_MASK (0x20000000u)
  21704. #define CSL_CPINTC_POLARITY_REG1_POLARITY_61_SHIFT (0x0000001Du)
  21705. #define CSL_CPINTC_POLARITY_REG1_POLARITY_61_RESETVAL (0x00000000u)
  21706. #define CSL_CPINTC_POLARITY_REG1_POLARITY_62_MASK (0x40000000u)
  21707. #define CSL_CPINTC_POLARITY_REG1_POLARITY_62_SHIFT (0x0000001Eu)
  21708. #define CSL_CPINTC_POLARITY_REG1_POLARITY_62_RESETVAL (0x00000000u)
  21709. #define CSL_CPINTC_POLARITY_REG1_POLARITY_63_MASK (0x80000000u)
  21710. #define CSL_CPINTC_POLARITY_REG1_POLARITY_63_SHIFT (0x0000001Fu)
  21711. #define CSL_CPINTC_POLARITY_REG1_POLARITY_63_RESETVAL (0x00000000u)
  21712. #define CSL_CPINTC_POLARITY_REG1_RESETVAL (0x00000000u)
  21713. /* polarity_reg2 */
  21714. #define CSL_CPINTC_POLARITY_REG2_POLARITY_64_MASK (0x00000001u)
  21715. #define CSL_CPINTC_POLARITY_REG2_POLARITY_64_SHIFT (0x00000000u)
  21716. #define CSL_CPINTC_POLARITY_REG2_POLARITY_64_RESETVAL (0x00000000u)
  21717. #define CSL_CPINTC_POLARITY_REG2_POLARITY_65_MASK (0x00000002u)
  21718. #define CSL_CPINTC_POLARITY_REG2_POLARITY_65_SHIFT (0x00000001u)
  21719. #define CSL_CPINTC_POLARITY_REG2_POLARITY_65_RESETVAL (0x00000000u)
  21720. #define CSL_CPINTC_POLARITY_REG2_POLARITY_66_MASK (0x00000004u)
  21721. #define CSL_CPINTC_POLARITY_REG2_POLARITY_66_SHIFT (0x00000002u)
  21722. #define CSL_CPINTC_POLARITY_REG2_POLARITY_66_RESETVAL (0x00000000u)
  21723. #define CSL_CPINTC_POLARITY_REG2_POLARITY_67_MASK (0x00000008u)
  21724. #define CSL_CPINTC_POLARITY_REG2_POLARITY_67_SHIFT (0x00000003u)
  21725. #define CSL_CPINTC_POLARITY_REG2_POLARITY_67_RESETVAL (0x00000000u)
  21726. #define CSL_CPINTC_POLARITY_REG2_POLARITY_68_MASK (0x00000010u)
  21727. #define CSL_CPINTC_POLARITY_REG2_POLARITY_68_SHIFT (0x00000004u)
  21728. #define CSL_CPINTC_POLARITY_REG2_POLARITY_68_RESETVAL (0x00000000u)
  21729. #define CSL_CPINTC_POLARITY_REG2_POLARITY_69_MASK (0x00000020u)
  21730. #define CSL_CPINTC_POLARITY_REG2_POLARITY_69_SHIFT (0x00000005u)
  21731. #define CSL_CPINTC_POLARITY_REG2_POLARITY_69_RESETVAL (0x00000000u)
  21732. #define CSL_CPINTC_POLARITY_REG2_POLARITY_70_MASK (0x00000040u)
  21733. #define CSL_CPINTC_POLARITY_REG2_POLARITY_70_SHIFT (0x00000006u)
  21734. #define CSL_CPINTC_POLARITY_REG2_POLARITY_70_RESETVAL (0x00000000u)
  21735. #define CSL_CPINTC_POLARITY_REG2_POLARITY_71_MASK (0x00000080u)
  21736. #define CSL_CPINTC_POLARITY_REG2_POLARITY_71_SHIFT (0x00000007u)
  21737. #define CSL_CPINTC_POLARITY_REG2_POLARITY_71_RESETVAL (0x00000000u)
  21738. #define CSL_CPINTC_POLARITY_REG2_POLARITY_72_MASK (0x00000100u)
  21739. #define CSL_CPINTC_POLARITY_REG2_POLARITY_72_SHIFT (0x00000008u)
  21740. #define CSL_CPINTC_POLARITY_REG2_POLARITY_72_RESETVAL (0x00000000u)
  21741. #define CSL_CPINTC_POLARITY_REG2_POLARITY_73_MASK (0x00000200u)
  21742. #define CSL_CPINTC_POLARITY_REG2_POLARITY_73_SHIFT (0x00000009u)
  21743. #define CSL_CPINTC_POLARITY_REG2_POLARITY_73_RESETVAL (0x00000000u)
  21744. #define CSL_CPINTC_POLARITY_REG2_POLARITY_74_MASK (0x00000400u)
  21745. #define CSL_CPINTC_POLARITY_REG2_POLARITY_74_SHIFT (0x0000000Au)
  21746. #define CSL_CPINTC_POLARITY_REG2_POLARITY_74_RESETVAL (0x00000000u)
  21747. #define CSL_CPINTC_POLARITY_REG2_POLARITY_75_MASK (0x00000800u)
  21748. #define CSL_CPINTC_POLARITY_REG2_POLARITY_75_SHIFT (0x0000000Bu)
  21749. #define CSL_CPINTC_POLARITY_REG2_POLARITY_75_RESETVAL (0x00000000u)
  21750. #define CSL_CPINTC_POLARITY_REG2_POLARITY_76_MASK (0x00001000u)
  21751. #define CSL_CPINTC_POLARITY_REG2_POLARITY_76_SHIFT (0x0000000Cu)
  21752. #define CSL_CPINTC_POLARITY_REG2_POLARITY_76_RESETVAL (0x00000000u)
  21753. #define CSL_CPINTC_POLARITY_REG2_POLARITY_77_MASK (0x00002000u)
  21754. #define CSL_CPINTC_POLARITY_REG2_POLARITY_77_SHIFT (0x0000000Du)
  21755. #define CSL_CPINTC_POLARITY_REG2_POLARITY_77_RESETVAL (0x00000000u)
  21756. #define CSL_CPINTC_POLARITY_REG2_POLARITY_78_MASK (0x00004000u)
  21757. #define CSL_CPINTC_POLARITY_REG2_POLARITY_78_SHIFT (0x0000000Eu)
  21758. #define CSL_CPINTC_POLARITY_REG2_POLARITY_78_RESETVAL (0x00000000u)
  21759. #define CSL_CPINTC_POLARITY_REG2_POLARITY_79_MASK (0x00008000u)
  21760. #define CSL_CPINTC_POLARITY_REG2_POLARITY_79_SHIFT (0x0000000Fu)
  21761. #define CSL_CPINTC_POLARITY_REG2_POLARITY_79_RESETVAL (0x00000000u)
  21762. #define CSL_CPINTC_POLARITY_REG2_POLARITY_80_MASK (0x00010000u)
  21763. #define CSL_CPINTC_POLARITY_REG2_POLARITY_80_SHIFT (0x00000010u)
  21764. #define CSL_CPINTC_POLARITY_REG2_POLARITY_80_RESETVAL (0x00000000u)
  21765. #define CSL_CPINTC_POLARITY_REG2_POLARITY_81_MASK (0x00020000u)
  21766. #define CSL_CPINTC_POLARITY_REG2_POLARITY_81_SHIFT (0x00000011u)
  21767. #define CSL_CPINTC_POLARITY_REG2_POLARITY_81_RESETVAL (0x00000000u)
  21768. #define CSL_CPINTC_POLARITY_REG2_POLARITY_82_MASK (0x00040000u)
  21769. #define CSL_CPINTC_POLARITY_REG2_POLARITY_82_SHIFT (0x00000012u)
  21770. #define CSL_CPINTC_POLARITY_REG2_POLARITY_82_RESETVAL (0x00000000u)
  21771. #define CSL_CPINTC_POLARITY_REG2_POLARITY_83_MASK (0x00080000u)
  21772. #define CSL_CPINTC_POLARITY_REG2_POLARITY_83_SHIFT (0x00000013u)
  21773. #define CSL_CPINTC_POLARITY_REG2_POLARITY_83_RESETVAL (0x00000000u)
  21774. #define CSL_CPINTC_POLARITY_REG2_POLARITY_84_MASK (0x00100000u)
  21775. #define CSL_CPINTC_POLARITY_REG2_POLARITY_84_SHIFT (0x00000014u)
  21776. #define CSL_CPINTC_POLARITY_REG2_POLARITY_84_RESETVAL (0x00000000u)
  21777. #define CSL_CPINTC_POLARITY_REG2_POLARITY_85_MASK (0x00200000u)
  21778. #define CSL_CPINTC_POLARITY_REG2_POLARITY_85_SHIFT (0x00000015u)
  21779. #define CSL_CPINTC_POLARITY_REG2_POLARITY_85_RESETVAL (0x00000000u)
  21780. #define CSL_CPINTC_POLARITY_REG2_POLARITY_86_MASK (0x00400000u)
  21781. #define CSL_CPINTC_POLARITY_REG2_POLARITY_86_SHIFT (0x00000016u)
  21782. #define CSL_CPINTC_POLARITY_REG2_POLARITY_86_RESETVAL (0x00000000u)
  21783. #define CSL_CPINTC_POLARITY_REG2_POLARITY_87_MASK (0x00800000u)
  21784. #define CSL_CPINTC_POLARITY_REG2_POLARITY_87_SHIFT (0x00000017u)
  21785. #define CSL_CPINTC_POLARITY_REG2_POLARITY_87_RESETVAL (0x00000000u)
  21786. #define CSL_CPINTC_POLARITY_REG2_POLARITY_88_MASK (0x01000000u)
  21787. #define CSL_CPINTC_POLARITY_REG2_POLARITY_88_SHIFT (0x00000018u)
  21788. #define CSL_CPINTC_POLARITY_REG2_POLARITY_88_RESETVAL (0x00000000u)
  21789. #define CSL_CPINTC_POLARITY_REG2_POLARITY_89_MASK (0x02000000u)
  21790. #define CSL_CPINTC_POLARITY_REG2_POLARITY_89_SHIFT (0x00000019u)
  21791. #define CSL_CPINTC_POLARITY_REG2_POLARITY_89_RESETVAL (0x00000000u)
  21792. #define CSL_CPINTC_POLARITY_REG2_POLARITY_90_MASK (0x04000000u)
  21793. #define CSL_CPINTC_POLARITY_REG2_POLARITY_90_SHIFT (0x0000001Au)
  21794. #define CSL_CPINTC_POLARITY_REG2_POLARITY_90_RESETVAL (0x00000000u)
  21795. #define CSL_CPINTC_POLARITY_REG2_POLARITY_91_MASK (0x08000000u)
  21796. #define CSL_CPINTC_POLARITY_REG2_POLARITY_91_SHIFT (0x0000001Bu)
  21797. #define CSL_CPINTC_POLARITY_REG2_POLARITY_91_RESETVAL (0x00000000u)
  21798. #define CSL_CPINTC_POLARITY_REG2_POLARITY_92_MASK (0x10000000u)
  21799. #define CSL_CPINTC_POLARITY_REG2_POLARITY_92_SHIFT (0x0000001Cu)
  21800. #define CSL_CPINTC_POLARITY_REG2_POLARITY_92_RESETVAL (0x00000000u)
  21801. #define CSL_CPINTC_POLARITY_REG2_POLARITY_93_MASK (0x20000000u)
  21802. #define CSL_CPINTC_POLARITY_REG2_POLARITY_93_SHIFT (0x0000001Du)
  21803. #define CSL_CPINTC_POLARITY_REG2_POLARITY_93_RESETVAL (0x00000000u)
  21804. #define CSL_CPINTC_POLARITY_REG2_POLARITY_94_MASK (0x40000000u)
  21805. #define CSL_CPINTC_POLARITY_REG2_POLARITY_94_SHIFT (0x0000001Eu)
  21806. #define CSL_CPINTC_POLARITY_REG2_POLARITY_94_RESETVAL (0x00000000u)
  21807. #define CSL_CPINTC_POLARITY_REG2_POLARITY_95_MASK (0x80000000u)
  21808. #define CSL_CPINTC_POLARITY_REG2_POLARITY_95_SHIFT (0x0000001Fu)
  21809. #define CSL_CPINTC_POLARITY_REG2_POLARITY_95_RESETVAL (0x00000000u)
  21810. #define CSL_CPINTC_POLARITY_REG2_RESETVAL (0x00000000u)
  21811. /* polarity_reg3 */
  21812. #define CSL_CPINTC_POLARITY_REG3_POLARITY_96_MASK (0x00000001u)
  21813. #define CSL_CPINTC_POLARITY_REG3_POLARITY_96_SHIFT (0x00000000u)
  21814. #define CSL_CPINTC_POLARITY_REG3_POLARITY_96_RESETVAL (0x00000000u)
  21815. #define CSL_CPINTC_POLARITY_REG3_POLARITY_97_MASK (0x00000002u)
  21816. #define CSL_CPINTC_POLARITY_REG3_POLARITY_97_SHIFT (0x00000001u)
  21817. #define CSL_CPINTC_POLARITY_REG3_POLARITY_97_RESETVAL (0x00000000u)
  21818. #define CSL_CPINTC_POLARITY_REG3_POLARITY_98_MASK (0x00000004u)
  21819. #define CSL_CPINTC_POLARITY_REG3_POLARITY_98_SHIFT (0x00000002u)
  21820. #define CSL_CPINTC_POLARITY_REG3_POLARITY_98_RESETVAL (0x00000000u)
  21821. #define CSL_CPINTC_POLARITY_REG3_POLARITY_99_MASK (0x00000008u)
  21822. #define CSL_CPINTC_POLARITY_REG3_POLARITY_99_SHIFT (0x00000003u)
  21823. #define CSL_CPINTC_POLARITY_REG3_POLARITY_99_RESETVAL (0x00000000u)
  21824. #define CSL_CPINTC_POLARITY_REG3_POLARITY_100_MASK (0x00000010u)
  21825. #define CSL_CPINTC_POLARITY_REG3_POLARITY_100_SHIFT (0x00000004u)
  21826. #define CSL_CPINTC_POLARITY_REG3_POLARITY_100_RESETVAL (0x00000000u)
  21827. #define CSL_CPINTC_POLARITY_REG3_POLARITY_101_MASK (0x00000020u)
  21828. #define CSL_CPINTC_POLARITY_REG3_POLARITY_101_SHIFT (0x00000005u)
  21829. #define CSL_CPINTC_POLARITY_REG3_POLARITY_101_RESETVAL (0x00000000u)
  21830. #define CSL_CPINTC_POLARITY_REG3_POLARITY_102_MASK (0x00000040u)
  21831. #define CSL_CPINTC_POLARITY_REG3_POLARITY_102_SHIFT (0x00000006u)
  21832. #define CSL_CPINTC_POLARITY_REG3_POLARITY_102_RESETVAL (0x00000000u)
  21833. #define CSL_CPINTC_POLARITY_REG3_POLARITY_103_MASK (0x00000080u)
  21834. #define CSL_CPINTC_POLARITY_REG3_POLARITY_103_SHIFT (0x00000007u)
  21835. #define CSL_CPINTC_POLARITY_REG3_POLARITY_103_RESETVAL (0x00000000u)
  21836. #define CSL_CPINTC_POLARITY_REG3_POLARITY_104_MASK (0x00000100u)
  21837. #define CSL_CPINTC_POLARITY_REG3_POLARITY_104_SHIFT (0x00000008u)
  21838. #define CSL_CPINTC_POLARITY_REG3_POLARITY_104_RESETVAL (0x00000000u)
  21839. #define CSL_CPINTC_POLARITY_REG3_POLARITY_105_MASK (0x00000200u)
  21840. #define CSL_CPINTC_POLARITY_REG3_POLARITY_105_SHIFT (0x00000009u)
  21841. #define CSL_CPINTC_POLARITY_REG3_POLARITY_105_RESETVAL (0x00000000u)
  21842. #define CSL_CPINTC_POLARITY_REG3_POLARITY_106_MASK (0x00000400u)
  21843. #define CSL_CPINTC_POLARITY_REG3_POLARITY_106_SHIFT (0x0000000Au)
  21844. #define CSL_CPINTC_POLARITY_REG3_POLARITY_106_RESETVAL (0x00000000u)
  21845. #define CSL_CPINTC_POLARITY_REG3_POLARITY_107_MASK (0x00000800u)
  21846. #define CSL_CPINTC_POLARITY_REG3_POLARITY_107_SHIFT (0x0000000Bu)
  21847. #define CSL_CPINTC_POLARITY_REG3_POLARITY_107_RESETVAL (0x00000000u)
  21848. #define CSL_CPINTC_POLARITY_REG3_POLARITY_108_MASK (0x00001000u)
  21849. #define CSL_CPINTC_POLARITY_REG3_POLARITY_108_SHIFT (0x0000000Cu)
  21850. #define CSL_CPINTC_POLARITY_REG3_POLARITY_108_RESETVAL (0x00000000u)
  21851. #define CSL_CPINTC_POLARITY_REG3_POLARITY_109_MASK (0x00002000u)
  21852. #define CSL_CPINTC_POLARITY_REG3_POLARITY_109_SHIFT (0x0000000Du)
  21853. #define CSL_CPINTC_POLARITY_REG3_POLARITY_109_RESETVAL (0x00000000u)
  21854. #define CSL_CPINTC_POLARITY_REG3_POLARITY_110_MASK (0x00004000u)
  21855. #define CSL_CPINTC_POLARITY_REG3_POLARITY_110_SHIFT (0x0000000Eu)
  21856. #define CSL_CPINTC_POLARITY_REG3_POLARITY_110_RESETVAL (0x00000000u)
  21857. #define CSL_CPINTC_POLARITY_REG3_POLARITY_111_MASK (0x00008000u)
  21858. #define CSL_CPINTC_POLARITY_REG3_POLARITY_111_SHIFT (0x0000000Fu)
  21859. #define CSL_CPINTC_POLARITY_REG3_POLARITY_111_RESETVAL (0x00000000u)
  21860. #define CSL_CPINTC_POLARITY_REG3_POLARITY_112_MASK (0x00010000u)
  21861. #define CSL_CPINTC_POLARITY_REG3_POLARITY_112_SHIFT (0x00000010u)
  21862. #define CSL_CPINTC_POLARITY_REG3_POLARITY_112_RESETVAL (0x00000000u)
  21863. #define CSL_CPINTC_POLARITY_REG3_POLARITY_113_MASK (0x00020000u)
  21864. #define CSL_CPINTC_POLARITY_REG3_POLARITY_113_SHIFT (0x00000011u)
  21865. #define CSL_CPINTC_POLARITY_REG3_POLARITY_113_RESETVAL (0x00000000u)
  21866. #define CSL_CPINTC_POLARITY_REG3_POLARITY_114_MASK (0x00040000u)
  21867. #define CSL_CPINTC_POLARITY_REG3_POLARITY_114_SHIFT (0x00000012u)
  21868. #define CSL_CPINTC_POLARITY_REG3_POLARITY_114_RESETVAL (0x00000000u)
  21869. #define CSL_CPINTC_POLARITY_REG3_POLARITY_115_MASK (0x00080000u)
  21870. #define CSL_CPINTC_POLARITY_REG3_POLARITY_115_SHIFT (0x00000013u)
  21871. #define CSL_CPINTC_POLARITY_REG3_POLARITY_115_RESETVAL (0x00000000u)
  21872. #define CSL_CPINTC_POLARITY_REG3_POLARITY_116_MASK (0x00100000u)
  21873. #define CSL_CPINTC_POLARITY_REG3_POLARITY_116_SHIFT (0x00000014u)
  21874. #define CSL_CPINTC_POLARITY_REG3_POLARITY_116_RESETVAL (0x00000000u)
  21875. #define CSL_CPINTC_POLARITY_REG3_POLARITY_117_MASK (0x00200000u)
  21876. #define CSL_CPINTC_POLARITY_REG3_POLARITY_117_SHIFT (0x00000015u)
  21877. #define CSL_CPINTC_POLARITY_REG3_POLARITY_117_RESETVAL (0x00000000u)
  21878. #define CSL_CPINTC_POLARITY_REG3_POLARITY_118_MASK (0x00400000u)
  21879. #define CSL_CPINTC_POLARITY_REG3_POLARITY_118_SHIFT (0x00000016u)
  21880. #define CSL_CPINTC_POLARITY_REG3_POLARITY_118_RESETVAL (0x00000000u)
  21881. #define CSL_CPINTC_POLARITY_REG3_POLARITY_119_MASK (0x00800000u)
  21882. #define CSL_CPINTC_POLARITY_REG3_POLARITY_119_SHIFT (0x00000017u)
  21883. #define CSL_CPINTC_POLARITY_REG3_POLARITY_119_RESETVAL (0x00000000u)
  21884. #define CSL_CPINTC_POLARITY_REG3_POLARITY_120_MASK (0x01000000u)
  21885. #define CSL_CPINTC_POLARITY_REG3_POLARITY_120_SHIFT (0x00000018u)
  21886. #define CSL_CPINTC_POLARITY_REG3_POLARITY_120_RESETVAL (0x00000000u)
  21887. #define CSL_CPINTC_POLARITY_REG3_POLARITY_121_MASK (0x02000000u)
  21888. #define CSL_CPINTC_POLARITY_REG3_POLARITY_121_SHIFT (0x00000019u)
  21889. #define CSL_CPINTC_POLARITY_REG3_POLARITY_121_RESETVAL (0x00000000u)
  21890. #define CSL_CPINTC_POLARITY_REG3_POLARITY_122_MASK (0x04000000u)
  21891. #define CSL_CPINTC_POLARITY_REG3_POLARITY_122_SHIFT (0x0000001Au)
  21892. #define CSL_CPINTC_POLARITY_REG3_POLARITY_122_RESETVAL (0x00000000u)
  21893. #define CSL_CPINTC_POLARITY_REG3_POLARITY_123_MASK (0x08000000u)
  21894. #define CSL_CPINTC_POLARITY_REG3_POLARITY_123_SHIFT (0x0000001Bu)
  21895. #define CSL_CPINTC_POLARITY_REG3_POLARITY_123_RESETVAL (0x00000000u)
  21896. #define CSL_CPINTC_POLARITY_REG3_POLARITY_124_MASK (0x10000000u)
  21897. #define CSL_CPINTC_POLARITY_REG3_POLARITY_124_SHIFT (0x0000001Cu)
  21898. #define CSL_CPINTC_POLARITY_REG3_POLARITY_124_RESETVAL (0x00000000u)
  21899. #define CSL_CPINTC_POLARITY_REG3_POLARITY_125_MASK (0x20000000u)
  21900. #define CSL_CPINTC_POLARITY_REG3_POLARITY_125_SHIFT (0x0000001Du)
  21901. #define CSL_CPINTC_POLARITY_REG3_POLARITY_125_RESETVAL (0x00000000u)
  21902. #define CSL_CPINTC_POLARITY_REG3_POLARITY_126_MASK (0x40000000u)
  21903. #define CSL_CPINTC_POLARITY_REG3_POLARITY_126_SHIFT (0x0000001Eu)
  21904. #define CSL_CPINTC_POLARITY_REG3_POLARITY_126_RESETVAL (0x00000000u)
  21905. #define CSL_CPINTC_POLARITY_REG3_POLARITY_127_MASK (0x80000000u)
  21906. #define CSL_CPINTC_POLARITY_REG3_POLARITY_127_SHIFT (0x0000001Fu)
  21907. #define CSL_CPINTC_POLARITY_REG3_POLARITY_127_RESETVAL (0x00000000u)
  21908. #define CSL_CPINTC_POLARITY_REG3_RESETVAL (0x00000000u)
  21909. /* polarity_reg4 */
  21910. #define CSL_CPINTC_POLARITY_REG4_POLARITY_128_MASK (0x00000001u)
  21911. #define CSL_CPINTC_POLARITY_REG4_POLARITY_128_SHIFT (0x00000000u)
  21912. #define CSL_CPINTC_POLARITY_REG4_POLARITY_128_RESETVAL (0x00000000u)
  21913. #define CSL_CPINTC_POLARITY_REG4_POLARITY_129_MASK (0x00000002u)
  21914. #define CSL_CPINTC_POLARITY_REG4_POLARITY_129_SHIFT (0x00000001u)
  21915. #define CSL_CPINTC_POLARITY_REG4_POLARITY_129_RESETVAL (0x00000000u)
  21916. #define CSL_CPINTC_POLARITY_REG4_POLARITY_130_MASK (0x00000004u)
  21917. #define CSL_CPINTC_POLARITY_REG4_POLARITY_130_SHIFT (0x00000002u)
  21918. #define CSL_CPINTC_POLARITY_REG4_POLARITY_130_RESETVAL (0x00000000u)
  21919. #define CSL_CPINTC_POLARITY_REG4_POLARITY_131_MASK (0x00000008u)
  21920. #define CSL_CPINTC_POLARITY_REG4_POLARITY_131_SHIFT (0x00000003u)
  21921. #define CSL_CPINTC_POLARITY_REG4_POLARITY_131_RESETVAL (0x00000000u)
  21922. #define CSL_CPINTC_POLARITY_REG4_POLARITY_132_MASK (0x00000010u)
  21923. #define CSL_CPINTC_POLARITY_REG4_POLARITY_132_SHIFT (0x00000004u)
  21924. #define CSL_CPINTC_POLARITY_REG4_POLARITY_132_RESETVAL (0x00000000u)
  21925. #define CSL_CPINTC_POLARITY_REG4_POLARITY_133_MASK (0x00000020u)
  21926. #define CSL_CPINTC_POLARITY_REG4_POLARITY_133_SHIFT (0x00000005u)
  21927. #define CSL_CPINTC_POLARITY_REG4_POLARITY_133_RESETVAL (0x00000000u)
  21928. #define CSL_CPINTC_POLARITY_REG4_POLARITY_134_MASK (0x00000040u)
  21929. #define CSL_CPINTC_POLARITY_REG4_POLARITY_134_SHIFT (0x00000006u)
  21930. #define CSL_CPINTC_POLARITY_REG4_POLARITY_134_RESETVAL (0x00000000u)
  21931. #define CSL_CPINTC_POLARITY_REG4_POLARITY_135_MASK (0x00000080u)
  21932. #define CSL_CPINTC_POLARITY_REG4_POLARITY_135_SHIFT (0x00000007u)
  21933. #define CSL_CPINTC_POLARITY_REG4_POLARITY_135_RESETVAL (0x00000000u)
  21934. #define CSL_CPINTC_POLARITY_REG4_POLARITY_136_MASK (0x00000100u)
  21935. #define CSL_CPINTC_POLARITY_REG4_POLARITY_136_SHIFT (0x00000008u)
  21936. #define CSL_CPINTC_POLARITY_REG4_POLARITY_136_RESETVAL (0x00000000u)
  21937. #define CSL_CPINTC_POLARITY_REG4_POLARITY_137_MASK (0x00000200u)
  21938. #define CSL_CPINTC_POLARITY_REG4_POLARITY_137_SHIFT (0x00000009u)
  21939. #define CSL_CPINTC_POLARITY_REG4_POLARITY_137_RESETVAL (0x00000000u)
  21940. #define CSL_CPINTC_POLARITY_REG4_POLARITY_138_MASK (0x00000400u)
  21941. #define CSL_CPINTC_POLARITY_REG4_POLARITY_138_SHIFT (0x0000000Au)
  21942. #define CSL_CPINTC_POLARITY_REG4_POLARITY_138_RESETVAL (0x00000000u)
  21943. #define CSL_CPINTC_POLARITY_REG4_POLARITY_139_MASK (0x00000800u)
  21944. #define CSL_CPINTC_POLARITY_REG4_POLARITY_139_SHIFT (0x0000000Bu)
  21945. #define CSL_CPINTC_POLARITY_REG4_POLARITY_139_RESETVAL (0x00000000u)
  21946. #define CSL_CPINTC_POLARITY_REG4_POLARITY_140_MASK (0x00001000u)
  21947. #define CSL_CPINTC_POLARITY_REG4_POLARITY_140_SHIFT (0x0000000Cu)
  21948. #define CSL_CPINTC_POLARITY_REG4_POLARITY_140_RESETVAL (0x00000000u)
  21949. #define CSL_CPINTC_POLARITY_REG4_POLARITY_141_MASK (0x00002000u)
  21950. #define CSL_CPINTC_POLARITY_REG4_POLARITY_141_SHIFT (0x0000000Du)
  21951. #define CSL_CPINTC_POLARITY_REG4_POLARITY_141_RESETVAL (0x00000000u)
  21952. #define CSL_CPINTC_POLARITY_REG4_POLARITY_142_MASK (0x00004000u)
  21953. #define CSL_CPINTC_POLARITY_REG4_POLARITY_142_SHIFT (0x0000000Eu)
  21954. #define CSL_CPINTC_POLARITY_REG4_POLARITY_142_RESETVAL (0x00000000u)
  21955. #define CSL_CPINTC_POLARITY_REG4_POLARITY_143_MASK (0x00008000u)
  21956. #define CSL_CPINTC_POLARITY_REG4_POLARITY_143_SHIFT (0x0000000Fu)
  21957. #define CSL_CPINTC_POLARITY_REG4_POLARITY_143_RESETVAL (0x00000000u)
  21958. #define CSL_CPINTC_POLARITY_REG4_POLARITY_144_MASK (0x00010000u)
  21959. #define CSL_CPINTC_POLARITY_REG4_POLARITY_144_SHIFT (0x00000010u)
  21960. #define CSL_CPINTC_POLARITY_REG4_POLARITY_144_RESETVAL (0x00000000u)
  21961. #define CSL_CPINTC_POLARITY_REG4_POLARITY_145_MASK (0x00020000u)
  21962. #define CSL_CPINTC_POLARITY_REG4_POLARITY_145_SHIFT (0x00000011u)
  21963. #define CSL_CPINTC_POLARITY_REG4_POLARITY_145_RESETVAL (0x00000000u)
  21964. #define CSL_CPINTC_POLARITY_REG4_POLARITY_146_MASK (0x00040000u)
  21965. #define CSL_CPINTC_POLARITY_REG4_POLARITY_146_SHIFT (0x00000012u)
  21966. #define CSL_CPINTC_POLARITY_REG4_POLARITY_146_RESETVAL (0x00000000u)
  21967. #define CSL_CPINTC_POLARITY_REG4_POLARITY_147_MASK (0x00080000u)
  21968. #define CSL_CPINTC_POLARITY_REG4_POLARITY_147_SHIFT (0x00000013u)
  21969. #define CSL_CPINTC_POLARITY_REG4_POLARITY_147_RESETVAL (0x00000000u)
  21970. #define CSL_CPINTC_POLARITY_REG4_POLARITY_148_MASK (0x00100000u)
  21971. #define CSL_CPINTC_POLARITY_REG4_POLARITY_148_SHIFT (0x00000014u)
  21972. #define CSL_CPINTC_POLARITY_REG4_POLARITY_148_RESETVAL (0x00000000u)
  21973. #define CSL_CPINTC_POLARITY_REG4_POLARITY_149_MASK (0x00200000u)
  21974. #define CSL_CPINTC_POLARITY_REG4_POLARITY_149_SHIFT (0x00000015u)
  21975. #define CSL_CPINTC_POLARITY_REG4_POLARITY_149_RESETVAL (0x00000000u)
  21976. #define CSL_CPINTC_POLARITY_REG4_POLARITY_150_MASK (0x00400000u)
  21977. #define CSL_CPINTC_POLARITY_REG4_POLARITY_150_SHIFT (0x00000016u)
  21978. #define CSL_CPINTC_POLARITY_REG4_POLARITY_150_RESETVAL (0x00000000u)
  21979. #define CSL_CPINTC_POLARITY_REG4_POLARITY_151_MASK (0x00800000u)
  21980. #define CSL_CPINTC_POLARITY_REG4_POLARITY_151_SHIFT (0x00000017u)
  21981. #define CSL_CPINTC_POLARITY_REG4_POLARITY_151_RESETVAL (0x00000000u)
  21982. #define CSL_CPINTC_POLARITY_REG4_POLARITY_152_MASK (0x01000000u)
  21983. #define CSL_CPINTC_POLARITY_REG4_POLARITY_152_SHIFT (0x00000018u)
  21984. #define CSL_CPINTC_POLARITY_REG4_POLARITY_152_RESETVAL (0x00000000u)
  21985. #define CSL_CPINTC_POLARITY_REG4_POLARITY_153_MASK (0x02000000u)
  21986. #define CSL_CPINTC_POLARITY_REG4_POLARITY_153_SHIFT (0x00000019u)
  21987. #define CSL_CPINTC_POLARITY_REG4_POLARITY_153_RESETVAL (0x00000000u)
  21988. #define CSL_CPINTC_POLARITY_REG4_POLARITY_154_MASK (0x04000000u)
  21989. #define CSL_CPINTC_POLARITY_REG4_POLARITY_154_SHIFT (0x0000001Au)
  21990. #define CSL_CPINTC_POLARITY_REG4_POLARITY_154_RESETVAL (0x00000000u)
  21991. #define CSL_CPINTC_POLARITY_REG4_POLARITY_155_MASK (0x08000000u)
  21992. #define CSL_CPINTC_POLARITY_REG4_POLARITY_155_SHIFT (0x0000001Bu)
  21993. #define CSL_CPINTC_POLARITY_REG4_POLARITY_155_RESETVAL (0x00000000u)
  21994. #define CSL_CPINTC_POLARITY_REG4_POLARITY_156_MASK (0x10000000u)
  21995. #define CSL_CPINTC_POLARITY_REG4_POLARITY_156_SHIFT (0x0000001Cu)
  21996. #define CSL_CPINTC_POLARITY_REG4_POLARITY_156_RESETVAL (0x00000000u)
  21997. #define CSL_CPINTC_POLARITY_REG4_POLARITY_157_MASK (0x20000000u)
  21998. #define CSL_CPINTC_POLARITY_REG4_POLARITY_157_SHIFT (0x0000001Du)
  21999. #define CSL_CPINTC_POLARITY_REG4_POLARITY_157_RESETVAL (0x00000000u)
  22000. #define CSL_CPINTC_POLARITY_REG4_POLARITY_158_MASK (0x40000000u)
  22001. #define CSL_CPINTC_POLARITY_REG4_POLARITY_158_SHIFT (0x0000001Eu)
  22002. #define CSL_CPINTC_POLARITY_REG4_POLARITY_158_RESETVAL (0x00000000u)
  22003. #define CSL_CPINTC_POLARITY_REG4_POLARITY_159_MASK (0x80000000u)
  22004. #define CSL_CPINTC_POLARITY_REG4_POLARITY_159_SHIFT (0x0000001Fu)
  22005. #define CSL_CPINTC_POLARITY_REG4_POLARITY_159_RESETVAL (0x00000000u)
  22006. #define CSL_CPINTC_POLARITY_REG4_RESETVAL (0x00000000u)
  22007. /* polarity_reg5 */
  22008. #define CSL_CPINTC_POLARITY_REG5_POLARITY_160_MASK (0x00000001u)
  22009. #define CSL_CPINTC_POLARITY_REG5_POLARITY_160_SHIFT (0x00000000u)
  22010. #define CSL_CPINTC_POLARITY_REG5_POLARITY_160_RESETVAL (0x00000000u)
  22011. #define CSL_CPINTC_POLARITY_REG5_POLARITY_161_MASK (0x00000002u)
  22012. #define CSL_CPINTC_POLARITY_REG5_POLARITY_161_SHIFT (0x00000001u)
  22013. #define CSL_CPINTC_POLARITY_REG5_POLARITY_161_RESETVAL (0x00000000u)
  22014. #define CSL_CPINTC_POLARITY_REG5_POLARITY_162_MASK (0x00000004u)
  22015. #define CSL_CPINTC_POLARITY_REG5_POLARITY_162_SHIFT (0x00000002u)
  22016. #define CSL_CPINTC_POLARITY_REG5_POLARITY_162_RESETVAL (0x00000000u)
  22017. #define CSL_CPINTC_POLARITY_REG5_POLARITY_163_MASK (0x00000008u)
  22018. #define CSL_CPINTC_POLARITY_REG5_POLARITY_163_SHIFT (0x00000003u)
  22019. #define CSL_CPINTC_POLARITY_REG5_POLARITY_163_RESETVAL (0x00000000u)
  22020. #define CSL_CPINTC_POLARITY_REG5_POLARITY_164_MASK (0x00000010u)
  22021. #define CSL_CPINTC_POLARITY_REG5_POLARITY_164_SHIFT (0x00000004u)
  22022. #define CSL_CPINTC_POLARITY_REG5_POLARITY_164_RESETVAL (0x00000000u)
  22023. #define CSL_CPINTC_POLARITY_REG5_POLARITY_165_MASK (0x00000020u)
  22024. #define CSL_CPINTC_POLARITY_REG5_POLARITY_165_SHIFT (0x00000005u)
  22025. #define CSL_CPINTC_POLARITY_REG5_POLARITY_165_RESETVAL (0x00000000u)
  22026. #define CSL_CPINTC_POLARITY_REG5_POLARITY_166_MASK (0x00000040u)
  22027. #define CSL_CPINTC_POLARITY_REG5_POLARITY_166_SHIFT (0x00000006u)
  22028. #define CSL_CPINTC_POLARITY_REG5_POLARITY_166_RESETVAL (0x00000000u)
  22029. #define CSL_CPINTC_POLARITY_REG5_POLARITY_167_MASK (0x00000080u)
  22030. #define CSL_CPINTC_POLARITY_REG5_POLARITY_167_SHIFT (0x00000007u)
  22031. #define CSL_CPINTC_POLARITY_REG5_POLARITY_167_RESETVAL (0x00000000u)
  22032. #define CSL_CPINTC_POLARITY_REG5_POLARITY_168_MASK (0x00000100u)
  22033. #define CSL_CPINTC_POLARITY_REG5_POLARITY_168_SHIFT (0x00000008u)
  22034. #define CSL_CPINTC_POLARITY_REG5_POLARITY_168_RESETVAL (0x00000000u)
  22035. #define CSL_CPINTC_POLARITY_REG5_POLARITY_169_MASK (0x00000200u)
  22036. #define CSL_CPINTC_POLARITY_REG5_POLARITY_169_SHIFT (0x00000009u)
  22037. #define CSL_CPINTC_POLARITY_REG5_POLARITY_169_RESETVAL (0x00000000u)
  22038. #define CSL_CPINTC_POLARITY_REG5_POLARITY_170_MASK (0x00000400u)
  22039. #define CSL_CPINTC_POLARITY_REG5_POLARITY_170_SHIFT (0x0000000Au)
  22040. #define CSL_CPINTC_POLARITY_REG5_POLARITY_170_RESETVAL (0x00000000u)
  22041. #define CSL_CPINTC_POLARITY_REG5_POLARITY_171_MASK (0x00000800u)
  22042. #define CSL_CPINTC_POLARITY_REG5_POLARITY_171_SHIFT (0x0000000Bu)
  22043. #define CSL_CPINTC_POLARITY_REG5_POLARITY_171_RESETVAL (0x00000000u)
  22044. #define CSL_CPINTC_POLARITY_REG5_POLARITY_172_MASK (0x00001000u)
  22045. #define CSL_CPINTC_POLARITY_REG5_POLARITY_172_SHIFT (0x0000000Cu)
  22046. #define CSL_CPINTC_POLARITY_REG5_POLARITY_172_RESETVAL (0x00000000u)
  22047. #define CSL_CPINTC_POLARITY_REG5_POLARITY_173_MASK (0x00002000u)
  22048. #define CSL_CPINTC_POLARITY_REG5_POLARITY_173_SHIFT (0x0000000Du)
  22049. #define CSL_CPINTC_POLARITY_REG5_POLARITY_173_RESETVAL (0x00000000u)
  22050. #define CSL_CPINTC_POLARITY_REG5_POLARITY_174_MASK (0x00004000u)
  22051. #define CSL_CPINTC_POLARITY_REG5_POLARITY_174_SHIFT (0x0000000Eu)
  22052. #define CSL_CPINTC_POLARITY_REG5_POLARITY_174_RESETVAL (0x00000000u)
  22053. #define CSL_CPINTC_POLARITY_REG5_POLARITY_175_MASK (0x00008000u)
  22054. #define CSL_CPINTC_POLARITY_REG5_POLARITY_175_SHIFT (0x0000000Fu)
  22055. #define CSL_CPINTC_POLARITY_REG5_POLARITY_175_RESETVAL (0x00000000u)
  22056. #define CSL_CPINTC_POLARITY_REG5_POLARITY_176_MASK (0x00010000u)
  22057. #define CSL_CPINTC_POLARITY_REG5_POLARITY_176_SHIFT (0x00000010u)
  22058. #define CSL_CPINTC_POLARITY_REG5_POLARITY_176_RESETVAL (0x00000000u)
  22059. #define CSL_CPINTC_POLARITY_REG5_POLARITY_177_MASK (0x00020000u)
  22060. #define CSL_CPINTC_POLARITY_REG5_POLARITY_177_SHIFT (0x00000011u)
  22061. #define CSL_CPINTC_POLARITY_REG5_POLARITY_177_RESETVAL (0x00000000u)
  22062. #define CSL_CPINTC_POLARITY_REG5_POLARITY_178_MASK (0x00040000u)
  22063. #define CSL_CPINTC_POLARITY_REG5_POLARITY_178_SHIFT (0x00000012u)
  22064. #define CSL_CPINTC_POLARITY_REG5_POLARITY_178_RESETVAL (0x00000000u)
  22065. #define CSL_CPINTC_POLARITY_REG5_POLARITY_179_MASK (0x00080000u)
  22066. #define CSL_CPINTC_POLARITY_REG5_POLARITY_179_SHIFT (0x00000013u)
  22067. #define CSL_CPINTC_POLARITY_REG5_POLARITY_179_RESETVAL (0x00000000u)
  22068. #define CSL_CPINTC_POLARITY_REG5_POLARITY_180_MASK (0x00100000u)
  22069. #define CSL_CPINTC_POLARITY_REG5_POLARITY_180_SHIFT (0x00000014u)
  22070. #define CSL_CPINTC_POLARITY_REG5_POLARITY_180_RESETVAL (0x00000000u)
  22071. #define CSL_CPINTC_POLARITY_REG5_POLARITY_181_MASK (0x00200000u)
  22072. #define CSL_CPINTC_POLARITY_REG5_POLARITY_181_SHIFT (0x00000015u)
  22073. #define CSL_CPINTC_POLARITY_REG5_POLARITY_181_RESETVAL (0x00000000u)
  22074. #define CSL_CPINTC_POLARITY_REG5_POLARITY_182_MASK (0x00400000u)
  22075. #define CSL_CPINTC_POLARITY_REG5_POLARITY_182_SHIFT (0x00000016u)
  22076. #define CSL_CPINTC_POLARITY_REG5_POLARITY_182_RESETVAL (0x00000000u)
  22077. #define CSL_CPINTC_POLARITY_REG5_POLARITY_183_MASK (0x00800000u)
  22078. #define CSL_CPINTC_POLARITY_REG5_POLARITY_183_SHIFT (0x00000017u)
  22079. #define CSL_CPINTC_POLARITY_REG5_POLARITY_183_RESETVAL (0x00000000u)
  22080. #define CSL_CPINTC_POLARITY_REG5_POLARITY_184_MASK (0x01000000u)
  22081. #define CSL_CPINTC_POLARITY_REG5_POLARITY_184_SHIFT (0x00000018u)
  22082. #define CSL_CPINTC_POLARITY_REG5_POLARITY_184_RESETVAL (0x00000000u)
  22083. #define CSL_CPINTC_POLARITY_REG5_POLARITY_185_MASK (0x02000000u)
  22084. #define CSL_CPINTC_POLARITY_REG5_POLARITY_185_SHIFT (0x00000019u)
  22085. #define CSL_CPINTC_POLARITY_REG5_POLARITY_185_RESETVAL (0x00000000u)
  22086. #define CSL_CPINTC_POLARITY_REG5_POLARITY_186_MASK (0x04000000u)
  22087. #define CSL_CPINTC_POLARITY_REG5_POLARITY_186_SHIFT (0x0000001Au)
  22088. #define CSL_CPINTC_POLARITY_REG5_POLARITY_186_RESETVAL (0x00000000u)
  22089. #define CSL_CPINTC_POLARITY_REG5_POLARITY_187_MASK (0x08000000u)
  22090. #define CSL_CPINTC_POLARITY_REG5_POLARITY_187_SHIFT (0x0000001Bu)
  22091. #define CSL_CPINTC_POLARITY_REG5_POLARITY_187_RESETVAL (0x00000000u)
  22092. #define CSL_CPINTC_POLARITY_REG5_POLARITY_188_MASK (0x10000000u)
  22093. #define CSL_CPINTC_POLARITY_REG5_POLARITY_188_SHIFT (0x0000001Cu)
  22094. #define CSL_CPINTC_POLARITY_REG5_POLARITY_188_RESETVAL (0x00000000u)
  22095. #define CSL_CPINTC_POLARITY_REG5_POLARITY_189_MASK (0x20000000u)
  22096. #define CSL_CPINTC_POLARITY_REG5_POLARITY_189_SHIFT (0x0000001Du)
  22097. #define CSL_CPINTC_POLARITY_REG5_POLARITY_189_RESETVAL (0x00000000u)
  22098. #define CSL_CPINTC_POLARITY_REG5_POLARITY_190_MASK (0x40000000u)
  22099. #define CSL_CPINTC_POLARITY_REG5_POLARITY_190_SHIFT (0x0000001Eu)
  22100. #define CSL_CPINTC_POLARITY_REG5_POLARITY_190_RESETVAL (0x00000000u)
  22101. #define CSL_CPINTC_POLARITY_REG5_POLARITY_191_MASK (0x80000000u)
  22102. #define CSL_CPINTC_POLARITY_REG5_POLARITY_191_SHIFT (0x0000001Fu)
  22103. #define CSL_CPINTC_POLARITY_REG5_POLARITY_191_RESETVAL (0x00000000u)
  22104. #define CSL_CPINTC_POLARITY_REG5_RESETVAL (0x00000000u)
  22105. /* polarity_reg6 */
  22106. #define CSL_CPINTC_POLARITY_REG6_POLARITY_192_MASK (0x00000001u)
  22107. #define CSL_CPINTC_POLARITY_REG6_POLARITY_192_SHIFT (0x00000000u)
  22108. #define CSL_CPINTC_POLARITY_REG6_POLARITY_192_RESETVAL (0x00000000u)
  22109. #define CSL_CPINTC_POLARITY_REG6_POLARITY_193_MASK (0x00000002u)
  22110. #define CSL_CPINTC_POLARITY_REG6_POLARITY_193_SHIFT (0x00000001u)
  22111. #define CSL_CPINTC_POLARITY_REG6_POLARITY_193_RESETVAL (0x00000000u)
  22112. #define CSL_CPINTC_POLARITY_REG6_POLARITY_194_MASK (0x00000004u)
  22113. #define CSL_CPINTC_POLARITY_REG6_POLARITY_194_SHIFT (0x00000002u)
  22114. #define CSL_CPINTC_POLARITY_REG6_POLARITY_194_RESETVAL (0x00000000u)
  22115. #define CSL_CPINTC_POLARITY_REG6_POLARITY_195_MASK (0x00000008u)
  22116. #define CSL_CPINTC_POLARITY_REG6_POLARITY_195_SHIFT (0x00000003u)
  22117. #define CSL_CPINTC_POLARITY_REG6_POLARITY_195_RESETVAL (0x00000000u)
  22118. #define CSL_CPINTC_POLARITY_REG6_POLARITY_196_MASK (0x00000010u)
  22119. #define CSL_CPINTC_POLARITY_REG6_POLARITY_196_SHIFT (0x00000004u)
  22120. #define CSL_CPINTC_POLARITY_REG6_POLARITY_196_RESETVAL (0x00000000u)
  22121. #define CSL_CPINTC_POLARITY_REG6_POLARITY_197_MASK (0x00000020u)
  22122. #define CSL_CPINTC_POLARITY_REG6_POLARITY_197_SHIFT (0x00000005u)
  22123. #define CSL_CPINTC_POLARITY_REG6_POLARITY_197_RESETVAL (0x00000000u)
  22124. #define CSL_CPINTC_POLARITY_REG6_POLARITY_198_MASK (0x00000040u)
  22125. #define CSL_CPINTC_POLARITY_REG6_POLARITY_198_SHIFT (0x00000006u)
  22126. #define CSL_CPINTC_POLARITY_REG6_POLARITY_198_RESETVAL (0x00000000u)
  22127. #define CSL_CPINTC_POLARITY_REG6_POLARITY_199_MASK (0x00000080u)
  22128. #define CSL_CPINTC_POLARITY_REG6_POLARITY_199_SHIFT (0x00000007u)
  22129. #define CSL_CPINTC_POLARITY_REG6_POLARITY_199_RESETVAL (0x00000000u)
  22130. #define CSL_CPINTC_POLARITY_REG6_POLARITY_200_MASK (0x00000100u)
  22131. #define CSL_CPINTC_POLARITY_REG6_POLARITY_200_SHIFT (0x00000008u)
  22132. #define CSL_CPINTC_POLARITY_REG6_POLARITY_200_RESETVAL (0x00000000u)
  22133. #define CSL_CPINTC_POLARITY_REG6_POLARITY_201_MASK (0x00000200u)
  22134. #define CSL_CPINTC_POLARITY_REG6_POLARITY_201_SHIFT (0x00000009u)
  22135. #define CSL_CPINTC_POLARITY_REG6_POLARITY_201_RESETVAL (0x00000000u)
  22136. #define CSL_CPINTC_POLARITY_REG6_POLARITY_202_MASK (0x00000400u)
  22137. #define CSL_CPINTC_POLARITY_REG6_POLARITY_202_SHIFT (0x0000000Au)
  22138. #define CSL_CPINTC_POLARITY_REG6_POLARITY_202_RESETVAL (0x00000000u)
  22139. #define CSL_CPINTC_POLARITY_REG6_POLARITY_203_MASK (0x00000800u)
  22140. #define CSL_CPINTC_POLARITY_REG6_POLARITY_203_SHIFT (0x0000000Bu)
  22141. #define CSL_CPINTC_POLARITY_REG6_POLARITY_203_RESETVAL (0x00000000u)
  22142. #define CSL_CPINTC_POLARITY_REG6_POLARITY_204_MASK (0x00001000u)
  22143. #define CSL_CPINTC_POLARITY_REG6_POLARITY_204_SHIFT (0x0000000Cu)
  22144. #define CSL_CPINTC_POLARITY_REG6_POLARITY_204_RESETVAL (0x00000000u)
  22145. #define CSL_CPINTC_POLARITY_REG6_POLARITY_205_MASK (0x00002000u)
  22146. #define CSL_CPINTC_POLARITY_REG6_POLARITY_205_SHIFT (0x0000000Du)
  22147. #define CSL_CPINTC_POLARITY_REG6_POLARITY_205_RESETVAL (0x00000000u)
  22148. #define CSL_CPINTC_POLARITY_REG6_POLARITY_206_MASK (0x00004000u)
  22149. #define CSL_CPINTC_POLARITY_REG6_POLARITY_206_SHIFT (0x0000000Eu)
  22150. #define CSL_CPINTC_POLARITY_REG6_POLARITY_206_RESETVAL (0x00000000u)
  22151. #define CSL_CPINTC_POLARITY_REG6_POLARITY_207_MASK (0x00008000u)
  22152. #define CSL_CPINTC_POLARITY_REG6_POLARITY_207_SHIFT (0x0000000Fu)
  22153. #define CSL_CPINTC_POLARITY_REG6_POLARITY_207_RESETVAL (0x00000000u)
  22154. #define CSL_CPINTC_POLARITY_REG6_POLARITY_208_MASK (0x00010000u)
  22155. #define CSL_CPINTC_POLARITY_REG6_POLARITY_208_SHIFT (0x00000010u)
  22156. #define CSL_CPINTC_POLARITY_REG6_POLARITY_208_RESETVAL (0x00000000u)
  22157. #define CSL_CPINTC_POLARITY_REG6_POLARITY_209_MASK (0x00020000u)
  22158. #define CSL_CPINTC_POLARITY_REG6_POLARITY_209_SHIFT (0x00000011u)
  22159. #define CSL_CPINTC_POLARITY_REG6_POLARITY_209_RESETVAL (0x00000000u)
  22160. #define CSL_CPINTC_POLARITY_REG6_POLARITY_210_MASK (0x00040000u)
  22161. #define CSL_CPINTC_POLARITY_REG6_POLARITY_210_SHIFT (0x00000012u)
  22162. #define CSL_CPINTC_POLARITY_REG6_POLARITY_210_RESETVAL (0x00000000u)
  22163. #define CSL_CPINTC_POLARITY_REG6_POLARITY_211_MASK (0x00080000u)
  22164. #define CSL_CPINTC_POLARITY_REG6_POLARITY_211_SHIFT (0x00000013u)
  22165. #define CSL_CPINTC_POLARITY_REG6_POLARITY_211_RESETVAL (0x00000000u)
  22166. #define CSL_CPINTC_POLARITY_REG6_POLARITY_212_MASK (0x00100000u)
  22167. #define CSL_CPINTC_POLARITY_REG6_POLARITY_212_SHIFT (0x00000014u)
  22168. #define CSL_CPINTC_POLARITY_REG6_POLARITY_212_RESETVAL (0x00000000u)
  22169. #define CSL_CPINTC_POLARITY_REG6_POLARITY_213_MASK (0x00200000u)
  22170. #define CSL_CPINTC_POLARITY_REG6_POLARITY_213_SHIFT (0x00000015u)
  22171. #define CSL_CPINTC_POLARITY_REG6_POLARITY_213_RESETVAL (0x00000000u)
  22172. #define CSL_CPINTC_POLARITY_REG6_POLARITY_214_MASK (0x00400000u)
  22173. #define CSL_CPINTC_POLARITY_REG6_POLARITY_214_SHIFT (0x00000016u)
  22174. #define CSL_CPINTC_POLARITY_REG6_POLARITY_214_RESETVAL (0x00000000u)
  22175. #define CSL_CPINTC_POLARITY_REG6_POLARITY_215_MASK (0x00800000u)
  22176. #define CSL_CPINTC_POLARITY_REG6_POLARITY_215_SHIFT (0x00000017u)
  22177. #define CSL_CPINTC_POLARITY_REG6_POLARITY_215_RESETVAL (0x00000000u)
  22178. #define CSL_CPINTC_POLARITY_REG6_POLARITY_216_MASK (0x01000000u)
  22179. #define CSL_CPINTC_POLARITY_REG6_POLARITY_216_SHIFT (0x00000018u)
  22180. #define CSL_CPINTC_POLARITY_REG6_POLARITY_216_RESETVAL (0x00000000u)
  22181. #define CSL_CPINTC_POLARITY_REG6_POLARITY_217_MASK (0x02000000u)
  22182. #define CSL_CPINTC_POLARITY_REG6_POLARITY_217_SHIFT (0x00000019u)
  22183. #define CSL_CPINTC_POLARITY_REG6_POLARITY_217_RESETVAL (0x00000000u)
  22184. #define CSL_CPINTC_POLARITY_REG6_POLARITY_218_MASK (0x04000000u)
  22185. #define CSL_CPINTC_POLARITY_REG6_POLARITY_218_SHIFT (0x0000001Au)
  22186. #define CSL_CPINTC_POLARITY_REG6_POLARITY_218_RESETVAL (0x00000000u)
  22187. #define CSL_CPINTC_POLARITY_REG6_POLARITY_219_MASK (0x08000000u)
  22188. #define CSL_CPINTC_POLARITY_REG6_POLARITY_219_SHIFT (0x0000001Bu)
  22189. #define CSL_CPINTC_POLARITY_REG6_POLARITY_219_RESETVAL (0x00000000u)
  22190. #define CSL_CPINTC_POLARITY_REG6_POLARITY_220_MASK (0x10000000u)
  22191. #define CSL_CPINTC_POLARITY_REG6_POLARITY_220_SHIFT (0x0000001Cu)
  22192. #define CSL_CPINTC_POLARITY_REG6_POLARITY_220_RESETVAL (0x00000000u)
  22193. #define CSL_CPINTC_POLARITY_REG6_POLARITY_221_MASK (0x20000000u)
  22194. #define CSL_CPINTC_POLARITY_REG6_POLARITY_221_SHIFT (0x0000001Du)
  22195. #define CSL_CPINTC_POLARITY_REG6_POLARITY_221_RESETVAL (0x00000000u)
  22196. #define CSL_CPINTC_POLARITY_REG6_POLARITY_222_MASK (0x40000000u)
  22197. #define CSL_CPINTC_POLARITY_REG6_POLARITY_222_SHIFT (0x0000001Eu)
  22198. #define CSL_CPINTC_POLARITY_REG6_POLARITY_222_RESETVAL (0x00000000u)
  22199. #define CSL_CPINTC_POLARITY_REG6_POLARITY_223_MASK (0x80000000u)
  22200. #define CSL_CPINTC_POLARITY_REG6_POLARITY_223_SHIFT (0x0000001Fu)
  22201. #define CSL_CPINTC_POLARITY_REG6_POLARITY_223_RESETVAL (0x00000000u)
  22202. #define CSL_CPINTC_POLARITY_REG6_RESETVAL (0x00000000u)
  22203. /* polarity_reg7 */
  22204. #define CSL_CPINTC_POLARITY_REG7_POLARITY_224_MASK (0x00000001u)
  22205. #define CSL_CPINTC_POLARITY_REG7_POLARITY_224_SHIFT (0x00000000u)
  22206. #define CSL_CPINTC_POLARITY_REG7_POLARITY_224_RESETVAL (0x00000000u)
  22207. #define CSL_CPINTC_POLARITY_REG7_POLARITY_225_MASK (0x00000002u)
  22208. #define CSL_CPINTC_POLARITY_REG7_POLARITY_225_SHIFT (0x00000001u)
  22209. #define CSL_CPINTC_POLARITY_REG7_POLARITY_225_RESETVAL (0x00000000u)
  22210. #define CSL_CPINTC_POLARITY_REG7_POLARITY_226_MASK (0x00000004u)
  22211. #define CSL_CPINTC_POLARITY_REG7_POLARITY_226_SHIFT (0x00000002u)
  22212. #define CSL_CPINTC_POLARITY_REG7_POLARITY_226_RESETVAL (0x00000000u)
  22213. #define CSL_CPINTC_POLARITY_REG7_POLARITY_227_MASK (0x00000008u)
  22214. #define CSL_CPINTC_POLARITY_REG7_POLARITY_227_SHIFT (0x00000003u)
  22215. #define CSL_CPINTC_POLARITY_REG7_POLARITY_227_RESETVAL (0x00000000u)
  22216. #define CSL_CPINTC_POLARITY_REG7_POLARITY_228_MASK (0x00000010u)
  22217. #define CSL_CPINTC_POLARITY_REG7_POLARITY_228_SHIFT (0x00000004u)
  22218. #define CSL_CPINTC_POLARITY_REG7_POLARITY_228_RESETVAL (0x00000000u)
  22219. #define CSL_CPINTC_POLARITY_REG7_POLARITY_229_MASK (0x00000020u)
  22220. #define CSL_CPINTC_POLARITY_REG7_POLARITY_229_SHIFT (0x00000005u)
  22221. #define CSL_CPINTC_POLARITY_REG7_POLARITY_229_RESETVAL (0x00000000u)
  22222. #define CSL_CPINTC_POLARITY_REG7_POLARITY_230_MASK (0x00000040u)
  22223. #define CSL_CPINTC_POLARITY_REG7_POLARITY_230_SHIFT (0x00000006u)
  22224. #define CSL_CPINTC_POLARITY_REG7_POLARITY_230_RESETVAL (0x00000000u)
  22225. #define CSL_CPINTC_POLARITY_REG7_POLARITY_231_MASK (0x00000080u)
  22226. #define CSL_CPINTC_POLARITY_REG7_POLARITY_231_SHIFT (0x00000007u)
  22227. #define CSL_CPINTC_POLARITY_REG7_POLARITY_231_RESETVAL (0x00000000u)
  22228. #define CSL_CPINTC_POLARITY_REG7_POLARITY_232_MASK (0x00000100u)
  22229. #define CSL_CPINTC_POLARITY_REG7_POLARITY_232_SHIFT (0x00000008u)
  22230. #define CSL_CPINTC_POLARITY_REG7_POLARITY_232_RESETVAL (0x00000000u)
  22231. #define CSL_CPINTC_POLARITY_REG7_POLARITY_233_MASK (0x00000200u)
  22232. #define CSL_CPINTC_POLARITY_REG7_POLARITY_233_SHIFT (0x00000009u)
  22233. #define CSL_CPINTC_POLARITY_REG7_POLARITY_233_RESETVAL (0x00000000u)
  22234. #define CSL_CPINTC_POLARITY_REG7_POLARITY_234_MASK (0x00000400u)
  22235. #define CSL_CPINTC_POLARITY_REG7_POLARITY_234_SHIFT (0x0000000Au)
  22236. #define CSL_CPINTC_POLARITY_REG7_POLARITY_234_RESETVAL (0x00000000u)
  22237. #define CSL_CPINTC_POLARITY_REG7_POLARITY_235_MASK (0x00000800u)
  22238. #define CSL_CPINTC_POLARITY_REG7_POLARITY_235_SHIFT (0x0000000Bu)
  22239. #define CSL_CPINTC_POLARITY_REG7_POLARITY_235_RESETVAL (0x00000000u)
  22240. #define CSL_CPINTC_POLARITY_REG7_POLARITY_236_MASK (0x00001000u)
  22241. #define CSL_CPINTC_POLARITY_REG7_POLARITY_236_SHIFT (0x0000000Cu)
  22242. #define CSL_CPINTC_POLARITY_REG7_POLARITY_236_RESETVAL (0x00000000u)
  22243. #define CSL_CPINTC_POLARITY_REG7_POLARITY_237_MASK (0x00002000u)
  22244. #define CSL_CPINTC_POLARITY_REG7_POLARITY_237_SHIFT (0x0000000Du)
  22245. #define CSL_CPINTC_POLARITY_REG7_POLARITY_237_RESETVAL (0x00000000u)
  22246. #define CSL_CPINTC_POLARITY_REG7_POLARITY_238_MASK (0x00004000u)
  22247. #define CSL_CPINTC_POLARITY_REG7_POLARITY_238_SHIFT (0x0000000Eu)
  22248. #define CSL_CPINTC_POLARITY_REG7_POLARITY_238_RESETVAL (0x00000000u)
  22249. #define CSL_CPINTC_POLARITY_REG7_POLARITY_239_MASK (0x00008000u)
  22250. #define CSL_CPINTC_POLARITY_REG7_POLARITY_239_SHIFT (0x0000000Fu)
  22251. #define CSL_CPINTC_POLARITY_REG7_POLARITY_239_RESETVAL (0x00000000u)
  22252. #define CSL_CPINTC_POLARITY_REG7_POLARITY_240_MASK (0x00010000u)
  22253. #define CSL_CPINTC_POLARITY_REG7_POLARITY_240_SHIFT (0x00000010u)
  22254. #define CSL_CPINTC_POLARITY_REG7_POLARITY_240_RESETVAL (0x00000000u)
  22255. #define CSL_CPINTC_POLARITY_REG7_POLARITY_241_MASK (0x00020000u)
  22256. #define CSL_CPINTC_POLARITY_REG7_POLARITY_241_SHIFT (0x00000011u)
  22257. #define CSL_CPINTC_POLARITY_REG7_POLARITY_241_RESETVAL (0x00000000u)
  22258. #define CSL_CPINTC_POLARITY_REG7_POLARITY_242_MASK (0x00040000u)
  22259. #define CSL_CPINTC_POLARITY_REG7_POLARITY_242_SHIFT (0x00000012u)
  22260. #define CSL_CPINTC_POLARITY_REG7_POLARITY_242_RESETVAL (0x00000000u)
  22261. #define CSL_CPINTC_POLARITY_REG7_POLARITY_243_MASK (0x00080000u)
  22262. #define CSL_CPINTC_POLARITY_REG7_POLARITY_243_SHIFT (0x00000013u)
  22263. #define CSL_CPINTC_POLARITY_REG7_POLARITY_243_RESETVAL (0x00000000u)
  22264. #define CSL_CPINTC_POLARITY_REG7_POLARITY_244_MASK (0x00100000u)
  22265. #define CSL_CPINTC_POLARITY_REG7_POLARITY_244_SHIFT (0x00000014u)
  22266. #define CSL_CPINTC_POLARITY_REG7_POLARITY_244_RESETVAL (0x00000000u)
  22267. #define CSL_CPINTC_POLARITY_REG7_POLARITY_245_MASK (0x00200000u)
  22268. #define CSL_CPINTC_POLARITY_REG7_POLARITY_245_SHIFT (0x00000015u)
  22269. #define CSL_CPINTC_POLARITY_REG7_POLARITY_245_RESETVAL (0x00000000u)
  22270. #define CSL_CPINTC_POLARITY_REG7_POLARITY_246_MASK (0x00400000u)
  22271. #define CSL_CPINTC_POLARITY_REG7_POLARITY_246_SHIFT (0x00000016u)
  22272. #define CSL_CPINTC_POLARITY_REG7_POLARITY_246_RESETVAL (0x00000000u)
  22273. #define CSL_CPINTC_POLARITY_REG7_POLARITY_247_MASK (0x00800000u)
  22274. #define CSL_CPINTC_POLARITY_REG7_POLARITY_247_SHIFT (0x00000017u)
  22275. #define CSL_CPINTC_POLARITY_REG7_POLARITY_247_RESETVAL (0x00000000u)
  22276. #define CSL_CPINTC_POLARITY_REG7_POLARITY_248_MASK (0x01000000u)
  22277. #define CSL_CPINTC_POLARITY_REG7_POLARITY_248_SHIFT (0x00000018u)
  22278. #define CSL_CPINTC_POLARITY_REG7_POLARITY_248_RESETVAL (0x00000000u)
  22279. #define CSL_CPINTC_POLARITY_REG7_POLARITY_249_MASK (0x02000000u)
  22280. #define CSL_CPINTC_POLARITY_REG7_POLARITY_249_SHIFT (0x00000019u)
  22281. #define CSL_CPINTC_POLARITY_REG7_POLARITY_249_RESETVAL (0x00000000u)
  22282. #define CSL_CPINTC_POLARITY_REG7_POLARITY_250_MASK (0x04000000u)
  22283. #define CSL_CPINTC_POLARITY_REG7_POLARITY_250_SHIFT (0x0000001Au)
  22284. #define CSL_CPINTC_POLARITY_REG7_POLARITY_250_RESETVAL (0x00000000u)
  22285. #define CSL_CPINTC_POLARITY_REG7_POLARITY_251_MASK (0x08000000u)
  22286. #define CSL_CPINTC_POLARITY_REG7_POLARITY_251_SHIFT (0x0000001Bu)
  22287. #define CSL_CPINTC_POLARITY_REG7_POLARITY_251_RESETVAL (0x00000000u)
  22288. #define CSL_CPINTC_POLARITY_REG7_POLARITY_252_MASK (0x10000000u)
  22289. #define CSL_CPINTC_POLARITY_REG7_POLARITY_252_SHIFT (0x0000001Cu)
  22290. #define CSL_CPINTC_POLARITY_REG7_POLARITY_252_RESETVAL (0x00000000u)
  22291. #define CSL_CPINTC_POLARITY_REG7_POLARITY_253_MASK (0x20000000u)
  22292. #define CSL_CPINTC_POLARITY_REG7_POLARITY_253_SHIFT (0x0000001Du)
  22293. #define CSL_CPINTC_POLARITY_REG7_POLARITY_253_RESETVAL (0x00000000u)
  22294. #define CSL_CPINTC_POLARITY_REG7_POLARITY_254_MASK (0x40000000u)
  22295. #define CSL_CPINTC_POLARITY_REG7_POLARITY_254_SHIFT (0x0000001Eu)
  22296. #define CSL_CPINTC_POLARITY_REG7_POLARITY_254_RESETVAL (0x00000000u)
  22297. #define CSL_CPINTC_POLARITY_REG7_POLARITY_255_MASK (0x80000000u)
  22298. #define CSL_CPINTC_POLARITY_REG7_POLARITY_255_SHIFT (0x0000001Fu)
  22299. #define CSL_CPINTC_POLARITY_REG7_POLARITY_255_RESETVAL (0x00000000u)
  22300. #define CSL_CPINTC_POLARITY_REG7_RESETVAL (0x00000000u)
  22301. /* polarity_reg8 */
  22302. #define CSL_CPINTC_POLARITY_REG8_POLARITY_256_MASK (0x00000001u)
  22303. #define CSL_CPINTC_POLARITY_REG8_POLARITY_256_SHIFT (0x00000000u)
  22304. #define CSL_CPINTC_POLARITY_REG8_POLARITY_256_RESETVAL (0x00000000u)
  22305. #define CSL_CPINTC_POLARITY_REG8_POLARITY_257_MASK (0x00000002u)
  22306. #define CSL_CPINTC_POLARITY_REG8_POLARITY_257_SHIFT (0x00000001u)
  22307. #define CSL_CPINTC_POLARITY_REG8_POLARITY_257_RESETVAL (0x00000000u)
  22308. #define CSL_CPINTC_POLARITY_REG8_POLARITY_258_MASK (0x00000004u)
  22309. #define CSL_CPINTC_POLARITY_REG8_POLARITY_258_SHIFT (0x00000002u)
  22310. #define CSL_CPINTC_POLARITY_REG8_POLARITY_258_RESETVAL (0x00000000u)
  22311. #define CSL_CPINTC_POLARITY_REG8_POLARITY_259_MASK (0x00000008u)
  22312. #define CSL_CPINTC_POLARITY_REG8_POLARITY_259_SHIFT (0x00000003u)
  22313. #define CSL_CPINTC_POLARITY_REG8_POLARITY_259_RESETVAL (0x00000000u)
  22314. #define CSL_CPINTC_POLARITY_REG8_POLARITY_260_MASK (0x00000010u)
  22315. #define CSL_CPINTC_POLARITY_REG8_POLARITY_260_SHIFT (0x00000004u)
  22316. #define CSL_CPINTC_POLARITY_REG8_POLARITY_260_RESETVAL (0x00000000u)
  22317. #define CSL_CPINTC_POLARITY_REG8_POLARITY_261_MASK (0x00000020u)
  22318. #define CSL_CPINTC_POLARITY_REG8_POLARITY_261_SHIFT (0x00000005u)
  22319. #define CSL_CPINTC_POLARITY_REG8_POLARITY_261_RESETVAL (0x00000000u)
  22320. #define CSL_CPINTC_POLARITY_REG8_POLARITY_262_MASK (0x00000040u)
  22321. #define CSL_CPINTC_POLARITY_REG8_POLARITY_262_SHIFT (0x00000006u)
  22322. #define CSL_CPINTC_POLARITY_REG8_POLARITY_262_RESETVAL (0x00000000u)
  22323. #define CSL_CPINTC_POLARITY_REG8_POLARITY_263_MASK (0x00000080u)
  22324. #define CSL_CPINTC_POLARITY_REG8_POLARITY_263_SHIFT (0x00000007u)
  22325. #define CSL_CPINTC_POLARITY_REG8_POLARITY_263_RESETVAL (0x00000000u)
  22326. #define CSL_CPINTC_POLARITY_REG8_POLARITY_264_MASK (0x00000100u)
  22327. #define CSL_CPINTC_POLARITY_REG8_POLARITY_264_SHIFT (0x00000008u)
  22328. #define CSL_CPINTC_POLARITY_REG8_POLARITY_264_RESETVAL (0x00000000u)
  22329. #define CSL_CPINTC_POLARITY_REG8_POLARITY_265_MASK (0x00000200u)
  22330. #define CSL_CPINTC_POLARITY_REG8_POLARITY_265_SHIFT (0x00000009u)
  22331. #define CSL_CPINTC_POLARITY_REG8_POLARITY_265_RESETVAL (0x00000000u)
  22332. #define CSL_CPINTC_POLARITY_REG8_POLARITY_266_MASK (0x00000400u)
  22333. #define CSL_CPINTC_POLARITY_REG8_POLARITY_266_SHIFT (0x0000000Au)
  22334. #define CSL_CPINTC_POLARITY_REG8_POLARITY_266_RESETVAL (0x00000000u)
  22335. #define CSL_CPINTC_POLARITY_REG8_POLARITY_267_MASK (0x00000800u)
  22336. #define CSL_CPINTC_POLARITY_REG8_POLARITY_267_SHIFT (0x0000000Bu)
  22337. #define CSL_CPINTC_POLARITY_REG8_POLARITY_267_RESETVAL (0x00000000u)
  22338. #define CSL_CPINTC_POLARITY_REG8_POLARITY_268_MASK (0x00001000u)
  22339. #define CSL_CPINTC_POLARITY_REG8_POLARITY_268_SHIFT (0x0000000Cu)
  22340. #define CSL_CPINTC_POLARITY_REG8_POLARITY_268_RESETVAL (0x00000000u)
  22341. #define CSL_CPINTC_POLARITY_REG8_POLARITY_269_MASK (0x00002000u)
  22342. #define CSL_CPINTC_POLARITY_REG8_POLARITY_269_SHIFT (0x0000000Du)
  22343. #define CSL_CPINTC_POLARITY_REG8_POLARITY_269_RESETVAL (0x00000000u)
  22344. #define CSL_CPINTC_POLARITY_REG8_POLARITY_270_MASK (0x00004000u)
  22345. #define CSL_CPINTC_POLARITY_REG8_POLARITY_270_SHIFT (0x0000000Eu)
  22346. #define CSL_CPINTC_POLARITY_REG8_POLARITY_270_RESETVAL (0x00000000u)
  22347. #define CSL_CPINTC_POLARITY_REG8_POLARITY_271_MASK (0x00008000u)
  22348. #define CSL_CPINTC_POLARITY_REG8_POLARITY_271_SHIFT (0x0000000Fu)
  22349. #define CSL_CPINTC_POLARITY_REG8_POLARITY_271_RESETVAL (0x00000000u)
  22350. #define CSL_CPINTC_POLARITY_REG8_POLARITY_272_MASK (0x00010000u)
  22351. #define CSL_CPINTC_POLARITY_REG8_POLARITY_272_SHIFT (0x00000010u)
  22352. #define CSL_CPINTC_POLARITY_REG8_POLARITY_272_RESETVAL (0x00000000u)
  22353. #define CSL_CPINTC_POLARITY_REG8_POLARITY_273_MASK (0x00020000u)
  22354. #define CSL_CPINTC_POLARITY_REG8_POLARITY_273_SHIFT (0x00000011u)
  22355. #define CSL_CPINTC_POLARITY_REG8_POLARITY_273_RESETVAL (0x00000000u)
  22356. #define CSL_CPINTC_POLARITY_REG8_POLARITY_274_MASK (0x00040000u)
  22357. #define CSL_CPINTC_POLARITY_REG8_POLARITY_274_SHIFT (0x00000012u)
  22358. #define CSL_CPINTC_POLARITY_REG8_POLARITY_274_RESETVAL (0x00000000u)
  22359. #define CSL_CPINTC_POLARITY_REG8_POLARITY_275_MASK (0x00080000u)
  22360. #define CSL_CPINTC_POLARITY_REG8_POLARITY_275_SHIFT (0x00000013u)
  22361. #define CSL_CPINTC_POLARITY_REG8_POLARITY_275_RESETVAL (0x00000000u)
  22362. #define CSL_CPINTC_POLARITY_REG8_POLARITY_276_MASK (0x00100000u)
  22363. #define CSL_CPINTC_POLARITY_REG8_POLARITY_276_SHIFT (0x00000014u)
  22364. #define CSL_CPINTC_POLARITY_REG8_POLARITY_276_RESETVAL (0x00000000u)
  22365. #define CSL_CPINTC_POLARITY_REG8_POLARITY_277_MASK (0x00200000u)
  22366. #define CSL_CPINTC_POLARITY_REG8_POLARITY_277_SHIFT (0x00000015u)
  22367. #define CSL_CPINTC_POLARITY_REG8_POLARITY_277_RESETVAL (0x00000000u)
  22368. #define CSL_CPINTC_POLARITY_REG8_POLARITY_278_MASK (0x00400000u)
  22369. #define CSL_CPINTC_POLARITY_REG8_POLARITY_278_SHIFT (0x00000016u)
  22370. #define CSL_CPINTC_POLARITY_REG8_POLARITY_278_RESETVAL (0x00000000u)
  22371. #define CSL_CPINTC_POLARITY_REG8_POLARITY_279_MASK (0x00800000u)
  22372. #define CSL_CPINTC_POLARITY_REG8_POLARITY_279_SHIFT (0x00000017u)
  22373. #define CSL_CPINTC_POLARITY_REG8_POLARITY_279_RESETVAL (0x00000000u)
  22374. #define CSL_CPINTC_POLARITY_REG8_POLARITY_280_MASK (0x01000000u)
  22375. #define CSL_CPINTC_POLARITY_REG8_POLARITY_280_SHIFT (0x00000018u)
  22376. #define CSL_CPINTC_POLARITY_REG8_POLARITY_280_RESETVAL (0x00000000u)
  22377. #define CSL_CPINTC_POLARITY_REG8_POLARITY_281_MASK (0x02000000u)
  22378. #define CSL_CPINTC_POLARITY_REG8_POLARITY_281_SHIFT (0x00000019u)
  22379. #define CSL_CPINTC_POLARITY_REG8_POLARITY_281_RESETVAL (0x00000000u)
  22380. #define CSL_CPINTC_POLARITY_REG8_POLARITY_282_MASK (0x04000000u)
  22381. #define CSL_CPINTC_POLARITY_REG8_POLARITY_282_SHIFT (0x0000001Au)
  22382. #define CSL_CPINTC_POLARITY_REG8_POLARITY_282_RESETVAL (0x00000000u)
  22383. #define CSL_CPINTC_POLARITY_REG8_POLARITY_283_MASK (0x08000000u)
  22384. #define CSL_CPINTC_POLARITY_REG8_POLARITY_283_SHIFT (0x0000001Bu)
  22385. #define CSL_CPINTC_POLARITY_REG8_POLARITY_283_RESETVAL (0x00000000u)
  22386. #define CSL_CPINTC_POLARITY_REG8_POLARITY_284_MASK (0x10000000u)
  22387. #define CSL_CPINTC_POLARITY_REG8_POLARITY_284_SHIFT (0x0000001Cu)
  22388. #define CSL_CPINTC_POLARITY_REG8_POLARITY_284_RESETVAL (0x00000000u)
  22389. #define CSL_CPINTC_POLARITY_REG8_POLARITY_285_MASK (0x20000000u)
  22390. #define CSL_CPINTC_POLARITY_REG8_POLARITY_285_SHIFT (0x0000001Du)
  22391. #define CSL_CPINTC_POLARITY_REG8_POLARITY_285_RESETVAL (0x00000000u)
  22392. #define CSL_CPINTC_POLARITY_REG8_POLARITY_286_MASK (0x40000000u)
  22393. #define CSL_CPINTC_POLARITY_REG8_POLARITY_286_SHIFT (0x0000001Eu)
  22394. #define CSL_CPINTC_POLARITY_REG8_POLARITY_286_RESETVAL (0x00000000u)
  22395. #define CSL_CPINTC_POLARITY_REG8_POLARITY_287_MASK (0x80000000u)
  22396. #define CSL_CPINTC_POLARITY_REG8_POLARITY_287_SHIFT (0x0000001Fu)
  22397. #define CSL_CPINTC_POLARITY_REG8_POLARITY_287_RESETVAL (0x00000000u)
  22398. #define CSL_CPINTC_POLARITY_REG8_RESETVAL (0x00000000u)
  22399. /* polarity_reg9 */
  22400. #define CSL_CPINTC_POLARITY_REG9_POLARITY_288_MASK (0x00000001u)
  22401. #define CSL_CPINTC_POLARITY_REG9_POLARITY_288_SHIFT (0x00000000u)
  22402. #define CSL_CPINTC_POLARITY_REG9_POLARITY_288_RESETVAL (0x00000000u)
  22403. #define CSL_CPINTC_POLARITY_REG9_POLARITY_289_MASK (0x00000002u)
  22404. #define CSL_CPINTC_POLARITY_REG9_POLARITY_289_SHIFT (0x00000001u)
  22405. #define CSL_CPINTC_POLARITY_REG9_POLARITY_289_RESETVAL (0x00000000u)
  22406. #define CSL_CPINTC_POLARITY_REG9_POLARITY_290_MASK (0x00000004u)
  22407. #define CSL_CPINTC_POLARITY_REG9_POLARITY_290_SHIFT (0x00000002u)
  22408. #define CSL_CPINTC_POLARITY_REG9_POLARITY_290_RESETVAL (0x00000000u)
  22409. #define CSL_CPINTC_POLARITY_REG9_POLARITY_291_MASK (0x00000008u)
  22410. #define CSL_CPINTC_POLARITY_REG9_POLARITY_291_SHIFT (0x00000003u)
  22411. #define CSL_CPINTC_POLARITY_REG9_POLARITY_291_RESETVAL (0x00000000u)
  22412. #define CSL_CPINTC_POLARITY_REG9_POLARITY_292_MASK (0x00000010u)
  22413. #define CSL_CPINTC_POLARITY_REG9_POLARITY_292_SHIFT (0x00000004u)
  22414. #define CSL_CPINTC_POLARITY_REG9_POLARITY_292_RESETVAL (0x00000000u)
  22415. #define CSL_CPINTC_POLARITY_REG9_POLARITY_293_MASK (0x00000020u)
  22416. #define CSL_CPINTC_POLARITY_REG9_POLARITY_293_SHIFT (0x00000005u)
  22417. #define CSL_CPINTC_POLARITY_REG9_POLARITY_293_RESETVAL (0x00000000u)
  22418. #define CSL_CPINTC_POLARITY_REG9_POLARITY_294_MASK (0x00000040u)
  22419. #define CSL_CPINTC_POLARITY_REG9_POLARITY_294_SHIFT (0x00000006u)
  22420. #define CSL_CPINTC_POLARITY_REG9_POLARITY_294_RESETVAL (0x00000000u)
  22421. #define CSL_CPINTC_POLARITY_REG9_POLARITY_295_MASK (0x00000080u)
  22422. #define CSL_CPINTC_POLARITY_REG9_POLARITY_295_SHIFT (0x00000007u)
  22423. #define CSL_CPINTC_POLARITY_REG9_POLARITY_295_RESETVAL (0x00000000u)
  22424. #define CSL_CPINTC_POLARITY_REG9_POLARITY_296_MASK (0x00000100u)
  22425. #define CSL_CPINTC_POLARITY_REG9_POLARITY_296_SHIFT (0x00000008u)
  22426. #define CSL_CPINTC_POLARITY_REG9_POLARITY_296_RESETVAL (0x00000000u)
  22427. #define CSL_CPINTC_POLARITY_REG9_POLARITY_297_MASK (0x00000200u)
  22428. #define CSL_CPINTC_POLARITY_REG9_POLARITY_297_SHIFT (0x00000009u)
  22429. #define CSL_CPINTC_POLARITY_REG9_POLARITY_297_RESETVAL (0x00000000u)
  22430. #define CSL_CPINTC_POLARITY_REG9_POLARITY_298_MASK (0x00000400u)
  22431. #define CSL_CPINTC_POLARITY_REG9_POLARITY_298_SHIFT (0x0000000Au)
  22432. #define CSL_CPINTC_POLARITY_REG9_POLARITY_298_RESETVAL (0x00000000u)
  22433. #define CSL_CPINTC_POLARITY_REG9_POLARITY_299_MASK (0x00000800u)
  22434. #define CSL_CPINTC_POLARITY_REG9_POLARITY_299_SHIFT (0x0000000Bu)
  22435. #define CSL_CPINTC_POLARITY_REG9_POLARITY_299_RESETVAL (0x00000000u)
  22436. #define CSL_CPINTC_POLARITY_REG9_POLARITY_300_MASK (0x00001000u)
  22437. #define CSL_CPINTC_POLARITY_REG9_POLARITY_300_SHIFT (0x0000000Cu)
  22438. #define CSL_CPINTC_POLARITY_REG9_POLARITY_300_RESETVAL (0x00000000u)
  22439. #define CSL_CPINTC_POLARITY_REG9_POLARITY_301_MASK (0x00002000u)
  22440. #define CSL_CPINTC_POLARITY_REG9_POLARITY_301_SHIFT (0x0000000Du)
  22441. #define CSL_CPINTC_POLARITY_REG9_POLARITY_301_RESETVAL (0x00000000u)
  22442. #define CSL_CPINTC_POLARITY_REG9_POLARITY_302_MASK (0x00004000u)
  22443. #define CSL_CPINTC_POLARITY_REG9_POLARITY_302_SHIFT (0x0000000Eu)
  22444. #define CSL_CPINTC_POLARITY_REG9_POLARITY_302_RESETVAL (0x00000000u)
  22445. #define CSL_CPINTC_POLARITY_REG9_POLARITY_303_MASK (0x00008000u)
  22446. #define CSL_CPINTC_POLARITY_REG9_POLARITY_303_SHIFT (0x0000000Fu)
  22447. #define CSL_CPINTC_POLARITY_REG9_POLARITY_303_RESETVAL (0x00000000u)
  22448. #define CSL_CPINTC_POLARITY_REG9_POLARITY_304_MASK (0x00010000u)
  22449. #define CSL_CPINTC_POLARITY_REG9_POLARITY_304_SHIFT (0x00000010u)
  22450. #define CSL_CPINTC_POLARITY_REG9_POLARITY_304_RESETVAL (0x00000000u)
  22451. #define CSL_CPINTC_POLARITY_REG9_POLARITY_305_MASK (0x00020000u)
  22452. #define CSL_CPINTC_POLARITY_REG9_POLARITY_305_SHIFT (0x00000011u)
  22453. #define CSL_CPINTC_POLARITY_REG9_POLARITY_305_RESETVAL (0x00000000u)
  22454. #define CSL_CPINTC_POLARITY_REG9_POLARITY_306_MASK (0x00040000u)
  22455. #define CSL_CPINTC_POLARITY_REG9_POLARITY_306_SHIFT (0x00000012u)
  22456. #define CSL_CPINTC_POLARITY_REG9_POLARITY_306_RESETVAL (0x00000000u)
  22457. #define CSL_CPINTC_POLARITY_REG9_POLARITY_307_MASK (0x00080000u)
  22458. #define CSL_CPINTC_POLARITY_REG9_POLARITY_307_SHIFT (0x00000013u)
  22459. #define CSL_CPINTC_POLARITY_REG9_POLARITY_307_RESETVAL (0x00000000u)
  22460. #define CSL_CPINTC_POLARITY_REG9_POLARITY_308_MASK (0x00100000u)
  22461. #define CSL_CPINTC_POLARITY_REG9_POLARITY_308_SHIFT (0x00000014u)
  22462. #define CSL_CPINTC_POLARITY_REG9_POLARITY_308_RESETVAL (0x00000000u)
  22463. #define CSL_CPINTC_POLARITY_REG9_POLARITY_309_MASK (0x00200000u)
  22464. #define CSL_CPINTC_POLARITY_REG9_POLARITY_309_SHIFT (0x00000015u)
  22465. #define CSL_CPINTC_POLARITY_REG9_POLARITY_309_RESETVAL (0x00000000u)
  22466. #define CSL_CPINTC_POLARITY_REG9_POLARITY_310_MASK (0x00400000u)
  22467. #define CSL_CPINTC_POLARITY_REG9_POLARITY_310_SHIFT (0x00000016u)
  22468. #define CSL_CPINTC_POLARITY_REG9_POLARITY_310_RESETVAL (0x00000000u)
  22469. #define CSL_CPINTC_POLARITY_REG9_POLARITY_311_MASK (0x00800000u)
  22470. #define CSL_CPINTC_POLARITY_REG9_POLARITY_311_SHIFT (0x00000017u)
  22471. #define CSL_CPINTC_POLARITY_REG9_POLARITY_311_RESETVAL (0x00000000u)
  22472. #define CSL_CPINTC_POLARITY_REG9_POLARITY_312_MASK (0x01000000u)
  22473. #define CSL_CPINTC_POLARITY_REG9_POLARITY_312_SHIFT (0x00000018u)
  22474. #define CSL_CPINTC_POLARITY_REG9_POLARITY_312_RESETVAL (0x00000000u)
  22475. #define CSL_CPINTC_POLARITY_REG9_POLARITY_313_MASK (0x02000000u)
  22476. #define CSL_CPINTC_POLARITY_REG9_POLARITY_313_SHIFT (0x00000019u)
  22477. #define CSL_CPINTC_POLARITY_REG9_POLARITY_313_RESETVAL (0x00000000u)
  22478. #define CSL_CPINTC_POLARITY_REG9_POLARITY_314_MASK (0x04000000u)
  22479. #define CSL_CPINTC_POLARITY_REG9_POLARITY_314_SHIFT (0x0000001Au)
  22480. #define CSL_CPINTC_POLARITY_REG9_POLARITY_314_RESETVAL (0x00000000u)
  22481. #define CSL_CPINTC_POLARITY_REG9_POLARITY_315_MASK (0x08000000u)
  22482. #define CSL_CPINTC_POLARITY_REG9_POLARITY_315_SHIFT (0x0000001Bu)
  22483. #define CSL_CPINTC_POLARITY_REG9_POLARITY_315_RESETVAL (0x00000000u)
  22484. #define CSL_CPINTC_POLARITY_REG9_POLARITY_316_MASK (0x10000000u)
  22485. #define CSL_CPINTC_POLARITY_REG9_POLARITY_316_SHIFT (0x0000001Cu)
  22486. #define CSL_CPINTC_POLARITY_REG9_POLARITY_316_RESETVAL (0x00000000u)
  22487. #define CSL_CPINTC_POLARITY_REG9_POLARITY_317_MASK (0x20000000u)
  22488. #define CSL_CPINTC_POLARITY_REG9_POLARITY_317_SHIFT (0x0000001Du)
  22489. #define CSL_CPINTC_POLARITY_REG9_POLARITY_317_RESETVAL (0x00000000u)
  22490. #define CSL_CPINTC_POLARITY_REG9_POLARITY_318_MASK (0x40000000u)
  22491. #define CSL_CPINTC_POLARITY_REG9_POLARITY_318_SHIFT (0x0000001Eu)
  22492. #define CSL_CPINTC_POLARITY_REG9_POLARITY_318_RESETVAL (0x00000000u)
  22493. #define CSL_CPINTC_POLARITY_REG9_POLARITY_319_MASK (0x80000000u)
  22494. #define CSL_CPINTC_POLARITY_REG9_POLARITY_319_SHIFT (0x0000001Fu)
  22495. #define CSL_CPINTC_POLARITY_REG9_POLARITY_319_RESETVAL (0x00000000u)
  22496. #define CSL_CPINTC_POLARITY_REG9_RESETVAL (0x00000000u)
  22497. /* polarity_reg10 */
  22498. #define CSL_CPINTC_POLARITY_REG10_POLARITY_320_MASK (0x00000001u)
  22499. #define CSL_CPINTC_POLARITY_REG10_POLARITY_320_SHIFT (0x00000000u)
  22500. #define CSL_CPINTC_POLARITY_REG10_POLARITY_320_RESETVAL (0x00000000u)
  22501. #define CSL_CPINTC_POLARITY_REG10_POLARITY_321_MASK (0x00000002u)
  22502. #define CSL_CPINTC_POLARITY_REG10_POLARITY_321_SHIFT (0x00000001u)
  22503. #define CSL_CPINTC_POLARITY_REG10_POLARITY_321_RESETVAL (0x00000000u)
  22504. #define CSL_CPINTC_POLARITY_REG10_POLARITY_322_MASK (0x00000004u)
  22505. #define CSL_CPINTC_POLARITY_REG10_POLARITY_322_SHIFT (0x00000002u)
  22506. #define CSL_CPINTC_POLARITY_REG10_POLARITY_322_RESETVAL (0x00000000u)
  22507. #define CSL_CPINTC_POLARITY_REG10_POLARITY_323_MASK (0x00000008u)
  22508. #define CSL_CPINTC_POLARITY_REG10_POLARITY_323_SHIFT (0x00000003u)
  22509. #define CSL_CPINTC_POLARITY_REG10_POLARITY_323_RESETVAL (0x00000000u)
  22510. #define CSL_CPINTC_POLARITY_REG10_POLARITY_324_MASK (0x00000010u)
  22511. #define CSL_CPINTC_POLARITY_REG10_POLARITY_324_SHIFT (0x00000004u)
  22512. #define CSL_CPINTC_POLARITY_REG10_POLARITY_324_RESETVAL (0x00000000u)
  22513. #define CSL_CPINTC_POLARITY_REG10_POLARITY_325_MASK (0x00000020u)
  22514. #define CSL_CPINTC_POLARITY_REG10_POLARITY_325_SHIFT (0x00000005u)
  22515. #define CSL_CPINTC_POLARITY_REG10_POLARITY_325_RESETVAL (0x00000000u)
  22516. #define CSL_CPINTC_POLARITY_REG10_POLARITY_326_MASK (0x00000040u)
  22517. #define CSL_CPINTC_POLARITY_REG10_POLARITY_326_SHIFT (0x00000006u)
  22518. #define CSL_CPINTC_POLARITY_REG10_POLARITY_326_RESETVAL (0x00000000u)
  22519. #define CSL_CPINTC_POLARITY_REG10_POLARITY_327_MASK (0x00000080u)
  22520. #define CSL_CPINTC_POLARITY_REG10_POLARITY_327_SHIFT (0x00000007u)
  22521. #define CSL_CPINTC_POLARITY_REG10_POLARITY_327_RESETVAL (0x00000000u)
  22522. #define CSL_CPINTC_POLARITY_REG10_POLARITY_328_MASK (0x00000100u)
  22523. #define CSL_CPINTC_POLARITY_REG10_POLARITY_328_SHIFT (0x00000008u)
  22524. #define CSL_CPINTC_POLARITY_REG10_POLARITY_328_RESETVAL (0x00000000u)
  22525. #define CSL_CPINTC_POLARITY_REG10_POLARITY_329_MASK (0x00000200u)
  22526. #define CSL_CPINTC_POLARITY_REG10_POLARITY_329_SHIFT (0x00000009u)
  22527. #define CSL_CPINTC_POLARITY_REG10_POLARITY_329_RESETVAL (0x00000000u)
  22528. #define CSL_CPINTC_POLARITY_REG10_POLARITY_330_MASK (0x00000400u)
  22529. #define CSL_CPINTC_POLARITY_REG10_POLARITY_330_SHIFT (0x0000000Au)
  22530. #define CSL_CPINTC_POLARITY_REG10_POLARITY_330_RESETVAL (0x00000000u)
  22531. #define CSL_CPINTC_POLARITY_REG10_POLARITY_331_MASK (0x00000800u)
  22532. #define CSL_CPINTC_POLARITY_REG10_POLARITY_331_SHIFT (0x0000000Bu)
  22533. #define CSL_CPINTC_POLARITY_REG10_POLARITY_331_RESETVAL (0x00000000u)
  22534. #define CSL_CPINTC_POLARITY_REG10_POLARITY_332_MASK (0x00001000u)
  22535. #define CSL_CPINTC_POLARITY_REG10_POLARITY_332_SHIFT (0x0000000Cu)
  22536. #define CSL_CPINTC_POLARITY_REG10_POLARITY_332_RESETVAL (0x00000000u)
  22537. #define CSL_CPINTC_POLARITY_REG10_POLARITY_333_MASK (0x00002000u)
  22538. #define CSL_CPINTC_POLARITY_REG10_POLARITY_333_SHIFT (0x0000000Du)
  22539. #define CSL_CPINTC_POLARITY_REG10_POLARITY_333_RESETVAL (0x00000000u)
  22540. #define CSL_CPINTC_POLARITY_REG10_POLARITY_334_MASK (0x00004000u)
  22541. #define CSL_CPINTC_POLARITY_REG10_POLARITY_334_SHIFT (0x0000000Eu)
  22542. #define CSL_CPINTC_POLARITY_REG10_POLARITY_334_RESETVAL (0x00000000u)
  22543. #define CSL_CPINTC_POLARITY_REG10_POLARITY_335_MASK (0x00008000u)
  22544. #define CSL_CPINTC_POLARITY_REG10_POLARITY_335_SHIFT (0x0000000Fu)
  22545. #define CSL_CPINTC_POLARITY_REG10_POLARITY_335_RESETVAL (0x00000000u)
  22546. #define CSL_CPINTC_POLARITY_REG10_POLARITY_336_MASK (0x00010000u)
  22547. #define CSL_CPINTC_POLARITY_REG10_POLARITY_336_SHIFT (0x00000010u)
  22548. #define CSL_CPINTC_POLARITY_REG10_POLARITY_336_RESETVAL (0x00000000u)
  22549. #define CSL_CPINTC_POLARITY_REG10_POLARITY_337_MASK (0x00020000u)
  22550. #define CSL_CPINTC_POLARITY_REG10_POLARITY_337_SHIFT (0x00000011u)
  22551. #define CSL_CPINTC_POLARITY_REG10_POLARITY_337_RESETVAL (0x00000000u)
  22552. #define CSL_CPINTC_POLARITY_REG10_POLARITY_338_MASK (0x00040000u)
  22553. #define CSL_CPINTC_POLARITY_REG10_POLARITY_338_SHIFT (0x00000012u)
  22554. #define CSL_CPINTC_POLARITY_REG10_POLARITY_338_RESETVAL (0x00000000u)
  22555. #define CSL_CPINTC_POLARITY_REG10_POLARITY_339_MASK (0x00080000u)
  22556. #define CSL_CPINTC_POLARITY_REG10_POLARITY_339_SHIFT (0x00000013u)
  22557. #define CSL_CPINTC_POLARITY_REG10_POLARITY_339_RESETVAL (0x00000000u)
  22558. #define CSL_CPINTC_POLARITY_REG10_POLARITY_340_MASK (0x00100000u)
  22559. #define CSL_CPINTC_POLARITY_REG10_POLARITY_340_SHIFT (0x00000014u)
  22560. #define CSL_CPINTC_POLARITY_REG10_POLARITY_340_RESETVAL (0x00000000u)
  22561. #define CSL_CPINTC_POLARITY_REG10_POLARITY_341_MASK (0x00200000u)
  22562. #define CSL_CPINTC_POLARITY_REG10_POLARITY_341_SHIFT (0x00000015u)
  22563. #define CSL_CPINTC_POLARITY_REG10_POLARITY_341_RESETVAL (0x00000000u)
  22564. #define CSL_CPINTC_POLARITY_REG10_POLARITY_342_MASK (0x00400000u)
  22565. #define CSL_CPINTC_POLARITY_REG10_POLARITY_342_SHIFT (0x00000016u)
  22566. #define CSL_CPINTC_POLARITY_REG10_POLARITY_342_RESETVAL (0x00000000u)
  22567. #define CSL_CPINTC_POLARITY_REG10_POLARITY_343_MASK (0x00800000u)
  22568. #define CSL_CPINTC_POLARITY_REG10_POLARITY_343_SHIFT (0x00000017u)
  22569. #define CSL_CPINTC_POLARITY_REG10_POLARITY_343_RESETVAL (0x00000000u)
  22570. #define CSL_CPINTC_POLARITY_REG10_POLARITY_344_MASK (0x01000000u)
  22571. #define CSL_CPINTC_POLARITY_REG10_POLARITY_344_SHIFT (0x00000018u)
  22572. #define CSL_CPINTC_POLARITY_REG10_POLARITY_344_RESETVAL (0x00000000u)
  22573. #define CSL_CPINTC_POLARITY_REG10_POLARITY_345_MASK (0x02000000u)
  22574. #define CSL_CPINTC_POLARITY_REG10_POLARITY_345_SHIFT (0x00000019u)
  22575. #define CSL_CPINTC_POLARITY_REG10_POLARITY_345_RESETVAL (0x00000000u)
  22576. #define CSL_CPINTC_POLARITY_REG10_POLARITY_346_MASK (0x04000000u)
  22577. #define CSL_CPINTC_POLARITY_REG10_POLARITY_346_SHIFT (0x0000001Au)
  22578. #define CSL_CPINTC_POLARITY_REG10_POLARITY_346_RESETVAL (0x00000000u)
  22579. #define CSL_CPINTC_POLARITY_REG10_POLARITY_347_MASK (0x08000000u)
  22580. #define CSL_CPINTC_POLARITY_REG10_POLARITY_347_SHIFT (0x0000001Bu)
  22581. #define CSL_CPINTC_POLARITY_REG10_POLARITY_347_RESETVAL (0x00000000u)
  22582. #define CSL_CPINTC_POLARITY_REG10_POLARITY_348_MASK (0x10000000u)
  22583. #define CSL_CPINTC_POLARITY_REG10_POLARITY_348_SHIFT (0x0000001Cu)
  22584. #define CSL_CPINTC_POLARITY_REG10_POLARITY_348_RESETVAL (0x00000000u)
  22585. #define CSL_CPINTC_POLARITY_REG10_POLARITY_349_MASK (0x20000000u)
  22586. #define CSL_CPINTC_POLARITY_REG10_POLARITY_349_SHIFT (0x0000001Du)
  22587. #define CSL_CPINTC_POLARITY_REG10_POLARITY_349_RESETVAL (0x00000000u)
  22588. #define CSL_CPINTC_POLARITY_REG10_POLARITY_350_MASK (0x40000000u)
  22589. #define CSL_CPINTC_POLARITY_REG10_POLARITY_350_SHIFT (0x0000001Eu)
  22590. #define CSL_CPINTC_POLARITY_REG10_POLARITY_350_RESETVAL (0x00000000u)
  22591. #define CSL_CPINTC_POLARITY_REG10_POLARITY_351_MASK (0x80000000u)
  22592. #define CSL_CPINTC_POLARITY_REG10_POLARITY_351_SHIFT (0x0000001Fu)
  22593. #define CSL_CPINTC_POLARITY_REG10_POLARITY_351_RESETVAL (0x00000000u)
  22594. #define CSL_CPINTC_POLARITY_REG10_RESETVAL (0x00000000u)
  22595. /* polarity_reg11 */
  22596. #define CSL_CPINTC_POLARITY_REG11_POLARITY_352_MASK (0x00000001u)
  22597. #define CSL_CPINTC_POLARITY_REG11_POLARITY_352_SHIFT (0x00000000u)
  22598. #define CSL_CPINTC_POLARITY_REG11_POLARITY_352_RESETVAL (0x00000000u)
  22599. #define CSL_CPINTC_POLARITY_REG11_POLARITY_353_MASK (0x00000002u)
  22600. #define CSL_CPINTC_POLARITY_REG11_POLARITY_353_SHIFT (0x00000001u)
  22601. #define CSL_CPINTC_POLARITY_REG11_POLARITY_353_RESETVAL (0x00000000u)
  22602. #define CSL_CPINTC_POLARITY_REG11_POLARITY_354_MASK (0x00000004u)
  22603. #define CSL_CPINTC_POLARITY_REG11_POLARITY_354_SHIFT (0x00000002u)
  22604. #define CSL_CPINTC_POLARITY_REG11_POLARITY_354_RESETVAL (0x00000000u)
  22605. #define CSL_CPINTC_POLARITY_REG11_POLARITY_355_MASK (0x00000008u)
  22606. #define CSL_CPINTC_POLARITY_REG11_POLARITY_355_SHIFT (0x00000003u)
  22607. #define CSL_CPINTC_POLARITY_REG11_POLARITY_355_RESETVAL (0x00000000u)
  22608. #define CSL_CPINTC_POLARITY_REG11_POLARITY_356_MASK (0x00000010u)
  22609. #define CSL_CPINTC_POLARITY_REG11_POLARITY_356_SHIFT (0x00000004u)
  22610. #define CSL_CPINTC_POLARITY_REG11_POLARITY_356_RESETVAL (0x00000000u)
  22611. #define CSL_CPINTC_POLARITY_REG11_POLARITY_357_MASK (0x00000020u)
  22612. #define CSL_CPINTC_POLARITY_REG11_POLARITY_357_SHIFT (0x00000005u)
  22613. #define CSL_CPINTC_POLARITY_REG11_POLARITY_357_RESETVAL (0x00000000u)
  22614. #define CSL_CPINTC_POLARITY_REG11_POLARITY_358_MASK (0x00000040u)
  22615. #define CSL_CPINTC_POLARITY_REG11_POLARITY_358_SHIFT (0x00000006u)
  22616. #define CSL_CPINTC_POLARITY_REG11_POLARITY_358_RESETVAL (0x00000000u)
  22617. #define CSL_CPINTC_POLARITY_REG11_POLARITY_359_MASK (0x00000080u)
  22618. #define CSL_CPINTC_POLARITY_REG11_POLARITY_359_SHIFT (0x00000007u)
  22619. #define CSL_CPINTC_POLARITY_REG11_POLARITY_359_RESETVAL (0x00000000u)
  22620. #define CSL_CPINTC_POLARITY_REG11_POLARITY_360_MASK (0x00000100u)
  22621. #define CSL_CPINTC_POLARITY_REG11_POLARITY_360_SHIFT (0x00000008u)
  22622. #define CSL_CPINTC_POLARITY_REG11_POLARITY_360_RESETVAL (0x00000000u)
  22623. #define CSL_CPINTC_POLARITY_REG11_POLARITY_361_MASK (0x00000200u)
  22624. #define CSL_CPINTC_POLARITY_REG11_POLARITY_361_SHIFT (0x00000009u)
  22625. #define CSL_CPINTC_POLARITY_REG11_POLARITY_361_RESETVAL (0x00000000u)
  22626. #define CSL_CPINTC_POLARITY_REG11_POLARITY_362_MASK (0x00000400u)
  22627. #define CSL_CPINTC_POLARITY_REG11_POLARITY_362_SHIFT (0x0000000Au)
  22628. #define CSL_CPINTC_POLARITY_REG11_POLARITY_362_RESETVAL (0x00000000u)
  22629. #define CSL_CPINTC_POLARITY_REG11_POLARITY_363_MASK (0x00000800u)
  22630. #define CSL_CPINTC_POLARITY_REG11_POLARITY_363_SHIFT (0x0000000Bu)
  22631. #define CSL_CPINTC_POLARITY_REG11_POLARITY_363_RESETVAL (0x00000000u)
  22632. #define CSL_CPINTC_POLARITY_REG11_POLARITY_364_MASK (0x00001000u)
  22633. #define CSL_CPINTC_POLARITY_REG11_POLARITY_364_SHIFT (0x0000000Cu)
  22634. #define CSL_CPINTC_POLARITY_REG11_POLARITY_364_RESETVAL (0x00000000u)
  22635. #define CSL_CPINTC_POLARITY_REG11_POLARITY_365_MASK (0x00002000u)
  22636. #define CSL_CPINTC_POLARITY_REG11_POLARITY_365_SHIFT (0x0000000Du)
  22637. #define CSL_CPINTC_POLARITY_REG11_POLARITY_365_RESETVAL (0x00000000u)
  22638. #define CSL_CPINTC_POLARITY_REG11_POLARITY_366_MASK (0x00004000u)
  22639. #define CSL_CPINTC_POLARITY_REG11_POLARITY_366_SHIFT (0x0000000Eu)
  22640. #define CSL_CPINTC_POLARITY_REG11_POLARITY_366_RESETVAL (0x00000000u)
  22641. #define CSL_CPINTC_POLARITY_REG11_POLARITY_367_MASK (0x00008000u)
  22642. #define CSL_CPINTC_POLARITY_REG11_POLARITY_367_SHIFT (0x0000000Fu)
  22643. #define CSL_CPINTC_POLARITY_REG11_POLARITY_367_RESETVAL (0x00000000u)
  22644. #define CSL_CPINTC_POLARITY_REG11_POLARITY_368_MASK (0x00010000u)
  22645. #define CSL_CPINTC_POLARITY_REG11_POLARITY_368_SHIFT (0x00000010u)
  22646. #define CSL_CPINTC_POLARITY_REG11_POLARITY_368_RESETVAL (0x00000000u)
  22647. #define CSL_CPINTC_POLARITY_REG11_POLARITY_369_MASK (0x00020000u)
  22648. #define CSL_CPINTC_POLARITY_REG11_POLARITY_369_SHIFT (0x00000011u)
  22649. #define CSL_CPINTC_POLARITY_REG11_POLARITY_369_RESETVAL (0x00000000u)
  22650. #define CSL_CPINTC_POLARITY_REG11_POLARITY_370_MASK (0x00040000u)
  22651. #define CSL_CPINTC_POLARITY_REG11_POLARITY_370_SHIFT (0x00000012u)
  22652. #define CSL_CPINTC_POLARITY_REG11_POLARITY_370_RESETVAL (0x00000000u)
  22653. #define CSL_CPINTC_POLARITY_REG11_POLARITY_371_MASK (0x00080000u)
  22654. #define CSL_CPINTC_POLARITY_REG11_POLARITY_371_SHIFT (0x00000013u)
  22655. #define CSL_CPINTC_POLARITY_REG11_POLARITY_371_RESETVAL (0x00000000u)
  22656. #define CSL_CPINTC_POLARITY_REG11_POLARITY_372_MASK (0x00100000u)
  22657. #define CSL_CPINTC_POLARITY_REG11_POLARITY_372_SHIFT (0x00000014u)
  22658. #define CSL_CPINTC_POLARITY_REG11_POLARITY_372_RESETVAL (0x00000000u)
  22659. #define CSL_CPINTC_POLARITY_REG11_POLARITY_373_MASK (0x00200000u)
  22660. #define CSL_CPINTC_POLARITY_REG11_POLARITY_373_SHIFT (0x00000015u)
  22661. #define CSL_CPINTC_POLARITY_REG11_POLARITY_373_RESETVAL (0x00000000u)
  22662. #define CSL_CPINTC_POLARITY_REG11_POLARITY_374_MASK (0x00400000u)
  22663. #define CSL_CPINTC_POLARITY_REG11_POLARITY_374_SHIFT (0x00000016u)
  22664. #define CSL_CPINTC_POLARITY_REG11_POLARITY_374_RESETVAL (0x00000000u)
  22665. #define CSL_CPINTC_POLARITY_REG11_POLARITY_375_MASK (0x00800000u)
  22666. #define CSL_CPINTC_POLARITY_REG11_POLARITY_375_SHIFT (0x00000017u)
  22667. #define CSL_CPINTC_POLARITY_REG11_POLARITY_375_RESETVAL (0x00000000u)
  22668. #define CSL_CPINTC_POLARITY_REG11_POLARITY_376_MASK (0x01000000u)
  22669. #define CSL_CPINTC_POLARITY_REG11_POLARITY_376_SHIFT (0x00000018u)
  22670. #define CSL_CPINTC_POLARITY_REG11_POLARITY_376_RESETVAL (0x00000000u)
  22671. #define CSL_CPINTC_POLARITY_REG11_POLARITY_377_MASK (0x02000000u)
  22672. #define CSL_CPINTC_POLARITY_REG11_POLARITY_377_SHIFT (0x00000019u)
  22673. #define CSL_CPINTC_POLARITY_REG11_POLARITY_377_RESETVAL (0x00000000u)
  22674. #define CSL_CPINTC_POLARITY_REG11_POLARITY_378_MASK (0x04000000u)
  22675. #define CSL_CPINTC_POLARITY_REG11_POLARITY_378_SHIFT (0x0000001Au)
  22676. #define CSL_CPINTC_POLARITY_REG11_POLARITY_378_RESETVAL (0x00000000u)
  22677. #define CSL_CPINTC_POLARITY_REG11_POLARITY_379_MASK (0x08000000u)
  22678. #define CSL_CPINTC_POLARITY_REG11_POLARITY_379_SHIFT (0x0000001Bu)
  22679. #define CSL_CPINTC_POLARITY_REG11_POLARITY_379_RESETVAL (0x00000000u)
  22680. #define CSL_CPINTC_POLARITY_REG11_POLARITY_380_MASK (0x10000000u)
  22681. #define CSL_CPINTC_POLARITY_REG11_POLARITY_380_SHIFT (0x0000001Cu)
  22682. #define CSL_CPINTC_POLARITY_REG11_POLARITY_380_RESETVAL (0x00000000u)
  22683. #define CSL_CPINTC_POLARITY_REG11_POLARITY_381_MASK (0x20000000u)
  22684. #define CSL_CPINTC_POLARITY_REG11_POLARITY_381_SHIFT (0x0000001Du)
  22685. #define CSL_CPINTC_POLARITY_REG11_POLARITY_381_RESETVAL (0x00000000u)
  22686. #define CSL_CPINTC_POLARITY_REG11_POLARITY_382_MASK (0x40000000u)
  22687. #define CSL_CPINTC_POLARITY_REG11_POLARITY_382_SHIFT (0x0000001Eu)
  22688. #define CSL_CPINTC_POLARITY_REG11_POLARITY_382_RESETVAL (0x00000000u)
  22689. #define CSL_CPINTC_POLARITY_REG11_POLARITY_383_MASK (0x80000000u)
  22690. #define CSL_CPINTC_POLARITY_REG11_POLARITY_383_SHIFT (0x0000001Fu)
  22691. #define CSL_CPINTC_POLARITY_REG11_POLARITY_383_RESETVAL (0x00000000u)
  22692. #define CSL_CPINTC_POLARITY_REG11_RESETVAL (0x00000000u)
  22693. /* polarity_reg12 */
  22694. #define CSL_CPINTC_POLARITY_REG12_POLARITY_384_MASK (0x00000001u)
  22695. #define CSL_CPINTC_POLARITY_REG12_POLARITY_384_SHIFT (0x00000000u)
  22696. #define CSL_CPINTC_POLARITY_REG12_POLARITY_384_RESETVAL (0x00000000u)
  22697. #define CSL_CPINTC_POLARITY_REG12_POLARITY_385_MASK (0x00000002u)
  22698. #define CSL_CPINTC_POLARITY_REG12_POLARITY_385_SHIFT (0x00000001u)
  22699. #define CSL_CPINTC_POLARITY_REG12_POLARITY_385_RESETVAL (0x00000000u)
  22700. #define CSL_CPINTC_POLARITY_REG12_POLARITY_386_MASK (0x00000004u)
  22701. #define CSL_CPINTC_POLARITY_REG12_POLARITY_386_SHIFT (0x00000002u)
  22702. #define CSL_CPINTC_POLARITY_REG12_POLARITY_386_RESETVAL (0x00000000u)
  22703. #define CSL_CPINTC_POLARITY_REG12_POLARITY_387_MASK (0x00000008u)
  22704. #define CSL_CPINTC_POLARITY_REG12_POLARITY_387_SHIFT (0x00000003u)
  22705. #define CSL_CPINTC_POLARITY_REG12_POLARITY_387_RESETVAL (0x00000000u)
  22706. #define CSL_CPINTC_POLARITY_REG12_POLARITY_388_MASK (0x00000010u)
  22707. #define CSL_CPINTC_POLARITY_REG12_POLARITY_388_SHIFT (0x00000004u)
  22708. #define CSL_CPINTC_POLARITY_REG12_POLARITY_388_RESETVAL (0x00000000u)
  22709. #define CSL_CPINTC_POLARITY_REG12_POLARITY_389_MASK (0x00000020u)
  22710. #define CSL_CPINTC_POLARITY_REG12_POLARITY_389_SHIFT (0x00000005u)
  22711. #define CSL_CPINTC_POLARITY_REG12_POLARITY_389_RESETVAL (0x00000000u)
  22712. #define CSL_CPINTC_POLARITY_REG12_POLARITY_390_MASK (0x00000040u)
  22713. #define CSL_CPINTC_POLARITY_REG12_POLARITY_390_SHIFT (0x00000006u)
  22714. #define CSL_CPINTC_POLARITY_REG12_POLARITY_390_RESETVAL (0x00000000u)
  22715. #define CSL_CPINTC_POLARITY_REG12_POLARITY_391_MASK (0x00000080u)
  22716. #define CSL_CPINTC_POLARITY_REG12_POLARITY_391_SHIFT (0x00000007u)
  22717. #define CSL_CPINTC_POLARITY_REG12_POLARITY_391_RESETVAL (0x00000000u)
  22718. #define CSL_CPINTC_POLARITY_REG12_POLARITY_392_MASK (0x00000100u)
  22719. #define CSL_CPINTC_POLARITY_REG12_POLARITY_392_SHIFT (0x00000008u)
  22720. #define CSL_CPINTC_POLARITY_REG12_POLARITY_392_RESETVAL (0x00000000u)
  22721. #define CSL_CPINTC_POLARITY_REG12_POLARITY_393_MASK (0x00000200u)
  22722. #define CSL_CPINTC_POLARITY_REG12_POLARITY_393_SHIFT (0x00000009u)
  22723. #define CSL_CPINTC_POLARITY_REG12_POLARITY_393_RESETVAL (0x00000000u)
  22724. #define CSL_CPINTC_POLARITY_REG12_POLARITY_394_MASK (0x00000400u)
  22725. #define CSL_CPINTC_POLARITY_REG12_POLARITY_394_SHIFT (0x0000000Au)
  22726. #define CSL_CPINTC_POLARITY_REG12_POLARITY_394_RESETVAL (0x00000000u)
  22727. #define CSL_CPINTC_POLARITY_REG12_POLARITY_395_MASK (0x00000800u)
  22728. #define CSL_CPINTC_POLARITY_REG12_POLARITY_395_SHIFT (0x0000000Bu)
  22729. #define CSL_CPINTC_POLARITY_REG12_POLARITY_395_RESETVAL (0x00000000u)
  22730. #define CSL_CPINTC_POLARITY_REG12_POLARITY_396_MASK (0x00001000u)
  22731. #define CSL_CPINTC_POLARITY_REG12_POLARITY_396_SHIFT (0x0000000Cu)
  22732. #define CSL_CPINTC_POLARITY_REG12_POLARITY_396_RESETVAL (0x00000000u)
  22733. #define CSL_CPINTC_POLARITY_REG12_POLARITY_397_MASK (0x00002000u)
  22734. #define CSL_CPINTC_POLARITY_REG12_POLARITY_397_SHIFT (0x0000000Du)
  22735. #define CSL_CPINTC_POLARITY_REG12_POLARITY_397_RESETVAL (0x00000000u)
  22736. #define CSL_CPINTC_POLARITY_REG12_POLARITY_398_MASK (0x00004000u)
  22737. #define CSL_CPINTC_POLARITY_REG12_POLARITY_398_SHIFT (0x0000000Eu)
  22738. #define CSL_CPINTC_POLARITY_REG12_POLARITY_398_RESETVAL (0x00000000u)
  22739. #define CSL_CPINTC_POLARITY_REG12_POLARITY_399_MASK (0x00008000u)
  22740. #define CSL_CPINTC_POLARITY_REG12_POLARITY_399_SHIFT (0x0000000Fu)
  22741. #define CSL_CPINTC_POLARITY_REG12_POLARITY_399_RESETVAL (0x00000000u)
  22742. #define CSL_CPINTC_POLARITY_REG12_POLARITY_400_MASK (0x00010000u)
  22743. #define CSL_CPINTC_POLARITY_REG12_POLARITY_400_SHIFT (0x00000010u)
  22744. #define CSL_CPINTC_POLARITY_REG12_POLARITY_400_RESETVAL (0x00000000u)
  22745. #define CSL_CPINTC_POLARITY_REG12_POLARITY_401_MASK (0x00020000u)
  22746. #define CSL_CPINTC_POLARITY_REG12_POLARITY_401_SHIFT (0x00000011u)
  22747. #define CSL_CPINTC_POLARITY_REG12_POLARITY_401_RESETVAL (0x00000000u)
  22748. #define CSL_CPINTC_POLARITY_REG12_POLARITY_402_MASK (0x00040000u)
  22749. #define CSL_CPINTC_POLARITY_REG12_POLARITY_402_SHIFT (0x00000012u)
  22750. #define CSL_CPINTC_POLARITY_REG12_POLARITY_402_RESETVAL (0x00000000u)
  22751. #define CSL_CPINTC_POLARITY_REG12_POLARITY_403_MASK (0x00080000u)
  22752. #define CSL_CPINTC_POLARITY_REG12_POLARITY_403_SHIFT (0x00000013u)
  22753. #define CSL_CPINTC_POLARITY_REG12_POLARITY_403_RESETVAL (0x00000000u)
  22754. #define CSL_CPINTC_POLARITY_REG12_POLARITY_404_MASK (0x00100000u)
  22755. #define CSL_CPINTC_POLARITY_REG12_POLARITY_404_SHIFT (0x00000014u)
  22756. #define CSL_CPINTC_POLARITY_REG12_POLARITY_404_RESETVAL (0x00000000u)
  22757. #define CSL_CPINTC_POLARITY_REG12_POLARITY_405_MASK (0x00200000u)
  22758. #define CSL_CPINTC_POLARITY_REG12_POLARITY_405_SHIFT (0x00000015u)
  22759. #define CSL_CPINTC_POLARITY_REG12_POLARITY_405_RESETVAL (0x00000000u)
  22760. #define CSL_CPINTC_POLARITY_REG12_POLARITY_406_MASK (0x00400000u)
  22761. #define CSL_CPINTC_POLARITY_REG12_POLARITY_406_SHIFT (0x00000016u)
  22762. #define CSL_CPINTC_POLARITY_REG12_POLARITY_406_RESETVAL (0x00000000u)
  22763. #define CSL_CPINTC_POLARITY_REG12_POLARITY_407_MASK (0x00800000u)
  22764. #define CSL_CPINTC_POLARITY_REG12_POLARITY_407_SHIFT (0x00000017u)
  22765. #define CSL_CPINTC_POLARITY_REG12_POLARITY_407_RESETVAL (0x00000000u)
  22766. #define CSL_CPINTC_POLARITY_REG12_POLARITY_408_MASK (0x01000000u)
  22767. #define CSL_CPINTC_POLARITY_REG12_POLARITY_408_SHIFT (0x00000018u)
  22768. #define CSL_CPINTC_POLARITY_REG12_POLARITY_408_RESETVAL (0x00000000u)
  22769. #define CSL_CPINTC_POLARITY_REG12_POLARITY_409_MASK (0x02000000u)
  22770. #define CSL_CPINTC_POLARITY_REG12_POLARITY_409_SHIFT (0x00000019u)
  22771. #define CSL_CPINTC_POLARITY_REG12_POLARITY_409_RESETVAL (0x00000000u)
  22772. #define CSL_CPINTC_POLARITY_REG12_POLARITY_410_MASK (0x04000000u)
  22773. #define CSL_CPINTC_POLARITY_REG12_POLARITY_410_SHIFT (0x0000001Au)
  22774. #define CSL_CPINTC_POLARITY_REG12_POLARITY_410_RESETVAL (0x00000000u)
  22775. #define CSL_CPINTC_POLARITY_REG12_POLARITY_411_MASK (0x08000000u)
  22776. #define CSL_CPINTC_POLARITY_REG12_POLARITY_411_SHIFT (0x0000001Bu)
  22777. #define CSL_CPINTC_POLARITY_REG12_POLARITY_411_RESETVAL (0x00000000u)
  22778. #define CSL_CPINTC_POLARITY_REG12_POLARITY_412_MASK (0x10000000u)
  22779. #define CSL_CPINTC_POLARITY_REG12_POLARITY_412_SHIFT (0x0000001Cu)
  22780. #define CSL_CPINTC_POLARITY_REG12_POLARITY_412_RESETVAL (0x00000000u)
  22781. #define CSL_CPINTC_POLARITY_REG12_POLARITY_413_MASK (0x20000000u)
  22782. #define CSL_CPINTC_POLARITY_REG12_POLARITY_413_SHIFT (0x0000001Du)
  22783. #define CSL_CPINTC_POLARITY_REG12_POLARITY_413_RESETVAL (0x00000000u)
  22784. #define CSL_CPINTC_POLARITY_REG12_POLARITY_414_MASK (0x40000000u)
  22785. #define CSL_CPINTC_POLARITY_REG12_POLARITY_414_SHIFT (0x0000001Eu)
  22786. #define CSL_CPINTC_POLARITY_REG12_POLARITY_414_RESETVAL (0x00000000u)
  22787. #define CSL_CPINTC_POLARITY_REG12_POLARITY_415_MASK (0x80000000u)
  22788. #define CSL_CPINTC_POLARITY_REG12_POLARITY_415_SHIFT (0x0000001Fu)
  22789. #define CSL_CPINTC_POLARITY_REG12_POLARITY_415_RESETVAL (0x00000000u)
  22790. #define CSL_CPINTC_POLARITY_REG12_RESETVAL (0x00000000u)
  22791. /* polarity_reg13 */
  22792. #define CSL_CPINTC_POLARITY_REG13_POLARITY_416_MASK (0x00000001u)
  22793. #define CSL_CPINTC_POLARITY_REG13_POLARITY_416_SHIFT (0x00000000u)
  22794. #define CSL_CPINTC_POLARITY_REG13_POLARITY_416_RESETVAL (0x00000000u)
  22795. #define CSL_CPINTC_POLARITY_REG13_POLARITY_417_MASK (0x00000002u)
  22796. #define CSL_CPINTC_POLARITY_REG13_POLARITY_417_SHIFT (0x00000001u)
  22797. #define CSL_CPINTC_POLARITY_REG13_POLARITY_417_RESETVAL (0x00000000u)
  22798. #define CSL_CPINTC_POLARITY_REG13_POLARITY_418_MASK (0x00000004u)
  22799. #define CSL_CPINTC_POLARITY_REG13_POLARITY_418_SHIFT (0x00000002u)
  22800. #define CSL_CPINTC_POLARITY_REG13_POLARITY_418_RESETVAL (0x00000000u)
  22801. #define CSL_CPINTC_POLARITY_REG13_POLARITY_419_MASK (0x00000008u)
  22802. #define CSL_CPINTC_POLARITY_REG13_POLARITY_419_SHIFT (0x00000003u)
  22803. #define CSL_CPINTC_POLARITY_REG13_POLARITY_419_RESETVAL (0x00000000u)
  22804. #define CSL_CPINTC_POLARITY_REG13_POLARITY_420_MASK (0x00000010u)
  22805. #define CSL_CPINTC_POLARITY_REG13_POLARITY_420_SHIFT (0x00000004u)
  22806. #define CSL_CPINTC_POLARITY_REG13_POLARITY_420_RESETVAL (0x00000000u)
  22807. #define CSL_CPINTC_POLARITY_REG13_POLARITY_421_MASK (0x00000020u)
  22808. #define CSL_CPINTC_POLARITY_REG13_POLARITY_421_SHIFT (0x00000005u)
  22809. #define CSL_CPINTC_POLARITY_REG13_POLARITY_421_RESETVAL (0x00000000u)
  22810. #define CSL_CPINTC_POLARITY_REG13_POLARITY_422_MASK (0x00000040u)
  22811. #define CSL_CPINTC_POLARITY_REG13_POLARITY_422_SHIFT (0x00000006u)
  22812. #define CSL_CPINTC_POLARITY_REG13_POLARITY_422_RESETVAL (0x00000000u)
  22813. #define CSL_CPINTC_POLARITY_REG13_POLARITY_423_MASK (0x00000080u)
  22814. #define CSL_CPINTC_POLARITY_REG13_POLARITY_423_SHIFT (0x00000007u)
  22815. #define CSL_CPINTC_POLARITY_REG13_POLARITY_423_RESETVAL (0x00000000u)
  22816. #define CSL_CPINTC_POLARITY_REG13_POLARITY_424_MASK (0x00000100u)
  22817. #define CSL_CPINTC_POLARITY_REG13_POLARITY_424_SHIFT (0x00000008u)
  22818. #define CSL_CPINTC_POLARITY_REG13_POLARITY_424_RESETVAL (0x00000000u)
  22819. #define CSL_CPINTC_POLARITY_REG13_POLARITY_425_MASK (0x00000200u)
  22820. #define CSL_CPINTC_POLARITY_REG13_POLARITY_425_SHIFT (0x00000009u)
  22821. #define CSL_CPINTC_POLARITY_REG13_POLARITY_425_RESETVAL (0x00000000u)
  22822. #define CSL_CPINTC_POLARITY_REG13_POLARITY_426_MASK (0x00000400u)
  22823. #define CSL_CPINTC_POLARITY_REG13_POLARITY_426_SHIFT (0x0000000Au)
  22824. #define CSL_CPINTC_POLARITY_REG13_POLARITY_426_RESETVAL (0x00000000u)
  22825. #define CSL_CPINTC_POLARITY_REG13_POLARITY_427_MASK (0x00000800u)
  22826. #define CSL_CPINTC_POLARITY_REG13_POLARITY_427_SHIFT (0x0000000Bu)
  22827. #define CSL_CPINTC_POLARITY_REG13_POLARITY_427_RESETVAL (0x00000000u)
  22828. #define CSL_CPINTC_POLARITY_REG13_POLARITY_428_MASK (0x00001000u)
  22829. #define CSL_CPINTC_POLARITY_REG13_POLARITY_428_SHIFT (0x0000000Cu)
  22830. #define CSL_CPINTC_POLARITY_REG13_POLARITY_428_RESETVAL (0x00000000u)
  22831. #define CSL_CPINTC_POLARITY_REG13_POLARITY_429_MASK (0x00002000u)
  22832. #define CSL_CPINTC_POLARITY_REG13_POLARITY_429_SHIFT (0x0000000Du)
  22833. #define CSL_CPINTC_POLARITY_REG13_POLARITY_429_RESETVAL (0x00000000u)
  22834. #define CSL_CPINTC_POLARITY_REG13_POLARITY_430_MASK (0x00004000u)
  22835. #define CSL_CPINTC_POLARITY_REG13_POLARITY_430_SHIFT (0x0000000Eu)
  22836. #define CSL_CPINTC_POLARITY_REG13_POLARITY_430_RESETVAL (0x00000000u)
  22837. #define CSL_CPINTC_POLARITY_REG13_POLARITY_431_MASK (0x00008000u)
  22838. #define CSL_CPINTC_POLARITY_REG13_POLARITY_431_SHIFT (0x0000000Fu)
  22839. #define CSL_CPINTC_POLARITY_REG13_POLARITY_431_RESETVAL (0x00000000u)
  22840. #define CSL_CPINTC_POLARITY_REG13_POLARITY_432_MASK (0x00010000u)
  22841. #define CSL_CPINTC_POLARITY_REG13_POLARITY_432_SHIFT (0x00000010u)
  22842. #define CSL_CPINTC_POLARITY_REG13_POLARITY_432_RESETVAL (0x00000000u)
  22843. #define CSL_CPINTC_POLARITY_REG13_POLARITY_433_MASK (0x00020000u)
  22844. #define CSL_CPINTC_POLARITY_REG13_POLARITY_433_SHIFT (0x00000011u)
  22845. #define CSL_CPINTC_POLARITY_REG13_POLARITY_433_RESETVAL (0x00000000u)
  22846. #define CSL_CPINTC_POLARITY_REG13_POLARITY_434_MASK (0x00040000u)
  22847. #define CSL_CPINTC_POLARITY_REG13_POLARITY_434_SHIFT (0x00000012u)
  22848. #define CSL_CPINTC_POLARITY_REG13_POLARITY_434_RESETVAL (0x00000000u)
  22849. #define CSL_CPINTC_POLARITY_REG13_POLARITY_435_MASK (0x00080000u)
  22850. #define CSL_CPINTC_POLARITY_REG13_POLARITY_435_SHIFT (0x00000013u)
  22851. #define CSL_CPINTC_POLARITY_REG13_POLARITY_435_RESETVAL (0x00000000u)
  22852. #define CSL_CPINTC_POLARITY_REG13_POLARITY_436_MASK (0x00100000u)
  22853. #define CSL_CPINTC_POLARITY_REG13_POLARITY_436_SHIFT (0x00000014u)
  22854. #define CSL_CPINTC_POLARITY_REG13_POLARITY_436_RESETVAL (0x00000000u)
  22855. #define CSL_CPINTC_POLARITY_REG13_POLARITY_437_MASK (0x00200000u)
  22856. #define CSL_CPINTC_POLARITY_REG13_POLARITY_437_SHIFT (0x00000015u)
  22857. #define CSL_CPINTC_POLARITY_REG13_POLARITY_437_RESETVAL (0x00000000u)
  22858. #define CSL_CPINTC_POLARITY_REG13_POLARITY_438_MASK (0x00400000u)
  22859. #define CSL_CPINTC_POLARITY_REG13_POLARITY_438_SHIFT (0x00000016u)
  22860. #define CSL_CPINTC_POLARITY_REG13_POLARITY_438_RESETVAL (0x00000000u)
  22861. #define CSL_CPINTC_POLARITY_REG13_POLARITY_439_MASK (0x00800000u)
  22862. #define CSL_CPINTC_POLARITY_REG13_POLARITY_439_SHIFT (0x00000017u)
  22863. #define CSL_CPINTC_POLARITY_REG13_POLARITY_439_RESETVAL (0x00000000u)
  22864. #define CSL_CPINTC_POLARITY_REG13_POLARITY_440_MASK (0x01000000u)
  22865. #define CSL_CPINTC_POLARITY_REG13_POLARITY_440_SHIFT (0x00000018u)
  22866. #define CSL_CPINTC_POLARITY_REG13_POLARITY_440_RESETVAL (0x00000000u)
  22867. #define CSL_CPINTC_POLARITY_REG13_POLARITY_441_MASK (0x02000000u)
  22868. #define CSL_CPINTC_POLARITY_REG13_POLARITY_441_SHIFT (0x00000019u)
  22869. #define CSL_CPINTC_POLARITY_REG13_POLARITY_441_RESETVAL (0x00000000u)
  22870. #define CSL_CPINTC_POLARITY_REG13_POLARITY_442_MASK (0x04000000u)
  22871. #define CSL_CPINTC_POLARITY_REG13_POLARITY_442_SHIFT (0x0000001Au)
  22872. #define CSL_CPINTC_POLARITY_REG13_POLARITY_442_RESETVAL (0x00000000u)
  22873. #define CSL_CPINTC_POLARITY_REG13_POLARITY_443_MASK (0x08000000u)
  22874. #define CSL_CPINTC_POLARITY_REG13_POLARITY_443_SHIFT (0x0000001Bu)
  22875. #define CSL_CPINTC_POLARITY_REG13_POLARITY_443_RESETVAL (0x00000000u)
  22876. #define CSL_CPINTC_POLARITY_REG13_POLARITY_444_MASK (0x10000000u)
  22877. #define CSL_CPINTC_POLARITY_REG13_POLARITY_444_SHIFT (0x0000001Cu)
  22878. #define CSL_CPINTC_POLARITY_REG13_POLARITY_444_RESETVAL (0x00000000u)
  22879. #define CSL_CPINTC_POLARITY_REG13_POLARITY_445_MASK (0x20000000u)
  22880. #define CSL_CPINTC_POLARITY_REG13_POLARITY_445_SHIFT (0x0000001Du)
  22881. #define CSL_CPINTC_POLARITY_REG13_POLARITY_445_RESETVAL (0x00000000u)
  22882. #define CSL_CPINTC_POLARITY_REG13_POLARITY_446_MASK (0x40000000u)
  22883. #define CSL_CPINTC_POLARITY_REG13_POLARITY_446_SHIFT (0x0000001Eu)
  22884. #define CSL_CPINTC_POLARITY_REG13_POLARITY_446_RESETVAL (0x00000000u)
  22885. #define CSL_CPINTC_POLARITY_REG13_POLARITY_447_MASK (0x80000000u)
  22886. #define CSL_CPINTC_POLARITY_REG13_POLARITY_447_SHIFT (0x0000001Fu)
  22887. #define CSL_CPINTC_POLARITY_REG13_POLARITY_447_RESETVAL (0x00000000u)
  22888. #define CSL_CPINTC_POLARITY_REG13_RESETVAL (0x00000000u)
  22889. /* polarity_reg14 */
  22890. #define CSL_CPINTC_POLARITY_REG14_POLARITY_448_MASK (0x00000001u)
  22891. #define CSL_CPINTC_POLARITY_REG14_POLARITY_448_SHIFT (0x00000000u)
  22892. #define CSL_CPINTC_POLARITY_REG14_POLARITY_448_RESETVAL (0x00000000u)
  22893. #define CSL_CPINTC_POLARITY_REG14_POLARITY_449_MASK (0x00000002u)
  22894. #define CSL_CPINTC_POLARITY_REG14_POLARITY_449_SHIFT (0x00000001u)
  22895. #define CSL_CPINTC_POLARITY_REG14_POLARITY_449_RESETVAL (0x00000000u)
  22896. #define CSL_CPINTC_POLARITY_REG14_POLARITY_450_MASK (0x00000004u)
  22897. #define CSL_CPINTC_POLARITY_REG14_POLARITY_450_SHIFT (0x00000002u)
  22898. #define CSL_CPINTC_POLARITY_REG14_POLARITY_450_RESETVAL (0x00000000u)
  22899. #define CSL_CPINTC_POLARITY_REG14_POLARITY_451_MASK (0x00000008u)
  22900. #define CSL_CPINTC_POLARITY_REG14_POLARITY_451_SHIFT (0x00000003u)
  22901. #define CSL_CPINTC_POLARITY_REG14_POLARITY_451_RESETVAL (0x00000000u)
  22902. #define CSL_CPINTC_POLARITY_REG14_POLARITY_452_MASK (0x00000010u)
  22903. #define CSL_CPINTC_POLARITY_REG14_POLARITY_452_SHIFT (0x00000004u)
  22904. #define CSL_CPINTC_POLARITY_REG14_POLARITY_452_RESETVAL (0x00000000u)
  22905. #define CSL_CPINTC_POLARITY_REG14_POLARITY_453_MASK (0x00000020u)
  22906. #define CSL_CPINTC_POLARITY_REG14_POLARITY_453_SHIFT (0x00000005u)
  22907. #define CSL_CPINTC_POLARITY_REG14_POLARITY_453_RESETVAL (0x00000000u)
  22908. #define CSL_CPINTC_POLARITY_REG14_POLARITY_454_MASK (0x00000040u)
  22909. #define CSL_CPINTC_POLARITY_REG14_POLARITY_454_SHIFT (0x00000006u)
  22910. #define CSL_CPINTC_POLARITY_REG14_POLARITY_454_RESETVAL (0x00000000u)
  22911. #define CSL_CPINTC_POLARITY_REG14_POLARITY_455_MASK (0x00000080u)
  22912. #define CSL_CPINTC_POLARITY_REG14_POLARITY_455_SHIFT (0x00000007u)
  22913. #define CSL_CPINTC_POLARITY_REG14_POLARITY_455_RESETVAL (0x00000000u)
  22914. #define CSL_CPINTC_POLARITY_REG14_POLARITY_456_MASK (0x00000100u)
  22915. #define CSL_CPINTC_POLARITY_REG14_POLARITY_456_SHIFT (0x00000008u)
  22916. #define CSL_CPINTC_POLARITY_REG14_POLARITY_456_RESETVAL (0x00000000u)
  22917. #define CSL_CPINTC_POLARITY_REG14_POLARITY_457_MASK (0x00000200u)
  22918. #define CSL_CPINTC_POLARITY_REG14_POLARITY_457_SHIFT (0x00000009u)
  22919. #define CSL_CPINTC_POLARITY_REG14_POLARITY_457_RESETVAL (0x00000000u)
  22920. #define CSL_CPINTC_POLARITY_REG14_POLARITY_458_MASK (0x00000400u)
  22921. #define CSL_CPINTC_POLARITY_REG14_POLARITY_458_SHIFT (0x0000000Au)
  22922. #define CSL_CPINTC_POLARITY_REG14_POLARITY_458_RESETVAL (0x00000000u)
  22923. #define CSL_CPINTC_POLARITY_REG14_POLARITY_459_MASK (0x00000800u)
  22924. #define CSL_CPINTC_POLARITY_REG14_POLARITY_459_SHIFT (0x0000000Bu)
  22925. #define CSL_CPINTC_POLARITY_REG14_POLARITY_459_RESETVAL (0x00000000u)
  22926. #define CSL_CPINTC_POLARITY_REG14_POLARITY_460_MASK (0x00001000u)
  22927. #define CSL_CPINTC_POLARITY_REG14_POLARITY_460_SHIFT (0x0000000Cu)
  22928. #define CSL_CPINTC_POLARITY_REG14_POLARITY_460_RESETVAL (0x00000000u)
  22929. #define CSL_CPINTC_POLARITY_REG14_POLARITY_461_MASK (0x00002000u)
  22930. #define CSL_CPINTC_POLARITY_REG14_POLARITY_461_SHIFT (0x0000000Du)
  22931. #define CSL_CPINTC_POLARITY_REG14_POLARITY_461_RESETVAL (0x00000000u)
  22932. #define CSL_CPINTC_POLARITY_REG14_POLARITY_462_MASK (0x00004000u)
  22933. #define CSL_CPINTC_POLARITY_REG14_POLARITY_462_SHIFT (0x0000000Eu)
  22934. #define CSL_CPINTC_POLARITY_REG14_POLARITY_462_RESETVAL (0x00000000u)
  22935. #define CSL_CPINTC_POLARITY_REG14_POLARITY_463_MASK (0x00008000u)
  22936. #define CSL_CPINTC_POLARITY_REG14_POLARITY_463_SHIFT (0x0000000Fu)
  22937. #define CSL_CPINTC_POLARITY_REG14_POLARITY_463_RESETVAL (0x00000000u)
  22938. #define CSL_CPINTC_POLARITY_REG14_POLARITY_464_MASK (0x00010000u)
  22939. #define CSL_CPINTC_POLARITY_REG14_POLARITY_464_SHIFT (0x00000010u)
  22940. #define CSL_CPINTC_POLARITY_REG14_POLARITY_464_RESETVAL (0x00000000u)
  22941. #define CSL_CPINTC_POLARITY_REG14_POLARITY_465_MASK (0x00020000u)
  22942. #define CSL_CPINTC_POLARITY_REG14_POLARITY_465_SHIFT (0x00000011u)
  22943. #define CSL_CPINTC_POLARITY_REG14_POLARITY_465_RESETVAL (0x00000000u)
  22944. #define CSL_CPINTC_POLARITY_REG14_POLARITY_466_MASK (0x00040000u)
  22945. #define CSL_CPINTC_POLARITY_REG14_POLARITY_466_SHIFT (0x00000012u)
  22946. #define CSL_CPINTC_POLARITY_REG14_POLARITY_466_RESETVAL (0x00000000u)
  22947. #define CSL_CPINTC_POLARITY_REG14_POLARITY_467_MASK (0x00080000u)
  22948. #define CSL_CPINTC_POLARITY_REG14_POLARITY_467_SHIFT (0x00000013u)
  22949. #define CSL_CPINTC_POLARITY_REG14_POLARITY_467_RESETVAL (0x00000000u)
  22950. #define CSL_CPINTC_POLARITY_REG14_POLARITY_468_MASK (0x00100000u)
  22951. #define CSL_CPINTC_POLARITY_REG14_POLARITY_468_SHIFT (0x00000014u)
  22952. #define CSL_CPINTC_POLARITY_REG14_POLARITY_468_RESETVAL (0x00000000u)
  22953. #define CSL_CPINTC_POLARITY_REG14_POLARITY_469_MASK (0x00200000u)
  22954. #define CSL_CPINTC_POLARITY_REG14_POLARITY_469_SHIFT (0x00000015u)
  22955. #define CSL_CPINTC_POLARITY_REG14_POLARITY_469_RESETVAL (0x00000000u)
  22956. #define CSL_CPINTC_POLARITY_REG14_POLARITY_470_MASK (0x00400000u)
  22957. #define CSL_CPINTC_POLARITY_REG14_POLARITY_470_SHIFT (0x00000016u)
  22958. #define CSL_CPINTC_POLARITY_REG14_POLARITY_470_RESETVAL (0x00000000u)
  22959. #define CSL_CPINTC_POLARITY_REG14_POLARITY_471_MASK (0x00800000u)
  22960. #define CSL_CPINTC_POLARITY_REG14_POLARITY_471_SHIFT (0x00000017u)
  22961. #define CSL_CPINTC_POLARITY_REG14_POLARITY_471_RESETVAL (0x00000000u)
  22962. #define CSL_CPINTC_POLARITY_REG14_POLARITY_472_MASK (0x01000000u)
  22963. #define CSL_CPINTC_POLARITY_REG14_POLARITY_472_SHIFT (0x00000018u)
  22964. #define CSL_CPINTC_POLARITY_REG14_POLARITY_472_RESETVAL (0x00000000u)
  22965. #define CSL_CPINTC_POLARITY_REG14_POLARITY_473_MASK (0x02000000u)
  22966. #define CSL_CPINTC_POLARITY_REG14_POLARITY_473_SHIFT (0x00000019u)
  22967. #define CSL_CPINTC_POLARITY_REG14_POLARITY_473_RESETVAL (0x00000000u)
  22968. #define CSL_CPINTC_POLARITY_REG14_POLARITY_474_MASK (0x04000000u)
  22969. #define CSL_CPINTC_POLARITY_REG14_POLARITY_474_SHIFT (0x0000001Au)
  22970. #define CSL_CPINTC_POLARITY_REG14_POLARITY_474_RESETVAL (0x00000000u)
  22971. #define CSL_CPINTC_POLARITY_REG14_POLARITY_475_MASK (0x08000000u)
  22972. #define CSL_CPINTC_POLARITY_REG14_POLARITY_475_SHIFT (0x0000001Bu)
  22973. #define CSL_CPINTC_POLARITY_REG14_POLARITY_475_RESETVAL (0x00000000u)
  22974. #define CSL_CPINTC_POLARITY_REG14_POLARITY_476_MASK (0x10000000u)
  22975. #define CSL_CPINTC_POLARITY_REG14_POLARITY_476_SHIFT (0x0000001Cu)
  22976. #define CSL_CPINTC_POLARITY_REG14_POLARITY_476_RESETVAL (0x00000000u)
  22977. #define CSL_CPINTC_POLARITY_REG14_POLARITY_477_MASK (0x20000000u)
  22978. #define CSL_CPINTC_POLARITY_REG14_POLARITY_477_SHIFT (0x0000001Du)
  22979. #define CSL_CPINTC_POLARITY_REG14_POLARITY_477_RESETVAL (0x00000000u)
  22980. #define CSL_CPINTC_POLARITY_REG14_POLARITY_478_MASK (0x40000000u)
  22981. #define CSL_CPINTC_POLARITY_REG14_POLARITY_478_SHIFT (0x0000001Eu)
  22982. #define CSL_CPINTC_POLARITY_REG14_POLARITY_478_RESETVAL (0x00000000u)
  22983. #define CSL_CPINTC_POLARITY_REG14_POLARITY_479_MASK (0x80000000u)
  22984. #define CSL_CPINTC_POLARITY_REG14_POLARITY_479_SHIFT (0x0000001Fu)
  22985. #define CSL_CPINTC_POLARITY_REG14_POLARITY_479_RESETVAL (0x00000000u)
  22986. #define CSL_CPINTC_POLARITY_REG14_RESETVAL (0x00000000u)
  22987. /* polarity_reg15 */
  22988. #define CSL_CPINTC_POLARITY_REG15_POLARITY_480_MASK (0x00000001u)
  22989. #define CSL_CPINTC_POLARITY_REG15_POLARITY_480_SHIFT (0x00000000u)
  22990. #define CSL_CPINTC_POLARITY_REG15_POLARITY_480_RESETVAL (0x00000000u)
  22991. #define CSL_CPINTC_POLARITY_REG15_POLARITY_481_MASK (0x00000002u)
  22992. #define CSL_CPINTC_POLARITY_REG15_POLARITY_481_SHIFT (0x00000001u)
  22993. #define CSL_CPINTC_POLARITY_REG15_POLARITY_481_RESETVAL (0x00000000u)
  22994. #define CSL_CPINTC_POLARITY_REG15_POLARITY_482_MASK (0x00000004u)
  22995. #define CSL_CPINTC_POLARITY_REG15_POLARITY_482_SHIFT (0x00000002u)
  22996. #define CSL_CPINTC_POLARITY_REG15_POLARITY_482_RESETVAL (0x00000000u)
  22997. #define CSL_CPINTC_POLARITY_REG15_POLARITY_483_MASK (0x00000008u)
  22998. #define CSL_CPINTC_POLARITY_REG15_POLARITY_483_SHIFT (0x00000003u)
  22999. #define CSL_CPINTC_POLARITY_REG15_POLARITY_483_RESETVAL (0x00000000u)
  23000. #define CSL_CPINTC_POLARITY_REG15_POLARITY_484_MASK (0x00000010u)
  23001. #define CSL_CPINTC_POLARITY_REG15_POLARITY_484_SHIFT (0x00000004u)
  23002. #define CSL_CPINTC_POLARITY_REG15_POLARITY_484_RESETVAL (0x00000000u)
  23003. #define CSL_CPINTC_POLARITY_REG15_POLARITY_485_MASK (0x00000020u)
  23004. #define CSL_CPINTC_POLARITY_REG15_POLARITY_485_SHIFT (0x00000005u)
  23005. #define CSL_CPINTC_POLARITY_REG15_POLARITY_485_RESETVAL (0x00000000u)
  23006. #define CSL_CPINTC_POLARITY_REG15_POLARITY_486_MASK (0x00000040u)
  23007. #define CSL_CPINTC_POLARITY_REG15_POLARITY_486_SHIFT (0x00000006u)
  23008. #define CSL_CPINTC_POLARITY_REG15_POLARITY_486_RESETVAL (0x00000000u)
  23009. #define CSL_CPINTC_POLARITY_REG15_POLARITY_487_MASK (0x00000080u)
  23010. #define CSL_CPINTC_POLARITY_REG15_POLARITY_487_SHIFT (0x00000007u)
  23011. #define CSL_CPINTC_POLARITY_REG15_POLARITY_487_RESETVAL (0x00000000u)
  23012. #define CSL_CPINTC_POLARITY_REG15_POLARITY_488_MASK (0x00000100u)
  23013. #define CSL_CPINTC_POLARITY_REG15_POLARITY_488_SHIFT (0x00000008u)
  23014. #define CSL_CPINTC_POLARITY_REG15_POLARITY_488_RESETVAL (0x00000000u)
  23015. #define CSL_CPINTC_POLARITY_REG15_POLARITY_489_MASK (0x00000200u)
  23016. #define CSL_CPINTC_POLARITY_REG15_POLARITY_489_SHIFT (0x00000009u)
  23017. #define CSL_CPINTC_POLARITY_REG15_POLARITY_489_RESETVAL (0x00000000u)
  23018. #define CSL_CPINTC_POLARITY_REG15_POLARITY_490_MASK (0x00000400u)
  23019. #define CSL_CPINTC_POLARITY_REG15_POLARITY_490_SHIFT (0x0000000Au)
  23020. #define CSL_CPINTC_POLARITY_REG15_POLARITY_490_RESETVAL (0x00000000u)
  23021. #define CSL_CPINTC_POLARITY_REG15_POLARITY_491_MASK (0x00000800u)
  23022. #define CSL_CPINTC_POLARITY_REG15_POLARITY_491_SHIFT (0x0000000Bu)
  23023. #define CSL_CPINTC_POLARITY_REG15_POLARITY_491_RESETVAL (0x00000000u)
  23024. #define CSL_CPINTC_POLARITY_REG15_POLARITY_492_MASK (0x00001000u)
  23025. #define CSL_CPINTC_POLARITY_REG15_POLARITY_492_SHIFT (0x0000000Cu)
  23026. #define CSL_CPINTC_POLARITY_REG15_POLARITY_492_RESETVAL (0x00000000u)
  23027. #define CSL_CPINTC_POLARITY_REG15_POLARITY_493_MASK (0x00002000u)
  23028. #define CSL_CPINTC_POLARITY_REG15_POLARITY_493_SHIFT (0x0000000Du)
  23029. #define CSL_CPINTC_POLARITY_REG15_POLARITY_493_RESETVAL (0x00000000u)
  23030. #define CSL_CPINTC_POLARITY_REG15_POLARITY_494_MASK (0x00004000u)
  23031. #define CSL_CPINTC_POLARITY_REG15_POLARITY_494_SHIFT (0x0000000Eu)
  23032. #define CSL_CPINTC_POLARITY_REG15_POLARITY_494_RESETVAL (0x00000000u)
  23033. #define CSL_CPINTC_POLARITY_REG15_POLARITY_495_MASK (0x00008000u)
  23034. #define CSL_CPINTC_POLARITY_REG15_POLARITY_495_SHIFT (0x0000000Fu)
  23035. #define CSL_CPINTC_POLARITY_REG15_POLARITY_495_RESETVAL (0x00000000u)
  23036. #define CSL_CPINTC_POLARITY_REG15_POLARITY_496_MASK (0x00010000u)
  23037. #define CSL_CPINTC_POLARITY_REG15_POLARITY_496_SHIFT (0x00000010u)
  23038. #define CSL_CPINTC_POLARITY_REG15_POLARITY_496_RESETVAL (0x00000000u)
  23039. #define CSL_CPINTC_POLARITY_REG15_POLARITY_497_MASK (0x00020000u)
  23040. #define CSL_CPINTC_POLARITY_REG15_POLARITY_497_SHIFT (0x00000011u)
  23041. #define CSL_CPINTC_POLARITY_REG15_POLARITY_497_RESETVAL (0x00000000u)
  23042. #define CSL_CPINTC_POLARITY_REG15_POLARITY_498_MASK (0x00040000u)
  23043. #define CSL_CPINTC_POLARITY_REG15_POLARITY_498_SHIFT (0x00000012u)
  23044. #define CSL_CPINTC_POLARITY_REG15_POLARITY_498_RESETVAL (0x00000000u)
  23045. #define CSL_CPINTC_POLARITY_REG15_POLARITY_499_MASK (0x00080000u)
  23046. #define CSL_CPINTC_POLARITY_REG15_POLARITY_499_SHIFT (0x00000013u)
  23047. #define CSL_CPINTC_POLARITY_REG15_POLARITY_499_RESETVAL (0x00000000u)
  23048. #define CSL_CPINTC_POLARITY_REG15_POLARITY_500_MASK (0x00100000u)
  23049. #define CSL_CPINTC_POLARITY_REG15_POLARITY_500_SHIFT (0x00000014u)
  23050. #define CSL_CPINTC_POLARITY_REG15_POLARITY_500_RESETVAL (0x00000000u)
  23051. #define CSL_CPINTC_POLARITY_REG15_POLARITY_501_MASK (0x00200000u)
  23052. #define CSL_CPINTC_POLARITY_REG15_POLARITY_501_SHIFT (0x00000015u)
  23053. #define CSL_CPINTC_POLARITY_REG15_POLARITY_501_RESETVAL (0x00000000u)
  23054. #define CSL_CPINTC_POLARITY_REG15_POLARITY_502_MASK (0x00400000u)
  23055. #define CSL_CPINTC_POLARITY_REG15_POLARITY_502_SHIFT (0x00000016u)
  23056. #define CSL_CPINTC_POLARITY_REG15_POLARITY_502_RESETVAL (0x00000000u)
  23057. #define CSL_CPINTC_POLARITY_REG15_POLARITY_503_MASK (0x00800000u)
  23058. #define CSL_CPINTC_POLARITY_REG15_POLARITY_503_SHIFT (0x00000017u)
  23059. #define CSL_CPINTC_POLARITY_REG15_POLARITY_503_RESETVAL (0x00000000u)
  23060. #define CSL_CPINTC_POLARITY_REG15_POLARITY_504_MASK (0x01000000u)
  23061. #define CSL_CPINTC_POLARITY_REG15_POLARITY_504_SHIFT (0x00000018u)
  23062. #define CSL_CPINTC_POLARITY_REG15_POLARITY_504_RESETVAL (0x00000000u)
  23063. #define CSL_CPINTC_POLARITY_REG15_POLARITY_505_MASK (0x02000000u)
  23064. #define CSL_CPINTC_POLARITY_REG15_POLARITY_505_SHIFT (0x00000019u)
  23065. #define CSL_CPINTC_POLARITY_REG15_POLARITY_505_RESETVAL (0x00000000u)
  23066. #define CSL_CPINTC_POLARITY_REG15_POLARITY_506_MASK (0x04000000u)
  23067. #define CSL_CPINTC_POLARITY_REG15_POLARITY_506_SHIFT (0x0000001Au)
  23068. #define CSL_CPINTC_POLARITY_REG15_POLARITY_506_RESETVAL (0x00000000u)
  23069. #define CSL_CPINTC_POLARITY_REG15_POLARITY_507_MASK (0x08000000u)
  23070. #define CSL_CPINTC_POLARITY_REG15_POLARITY_507_SHIFT (0x0000001Bu)
  23071. #define CSL_CPINTC_POLARITY_REG15_POLARITY_507_RESETVAL (0x00000000u)
  23072. #define CSL_CPINTC_POLARITY_REG15_POLARITY_508_MASK (0x10000000u)
  23073. #define CSL_CPINTC_POLARITY_REG15_POLARITY_508_SHIFT (0x0000001Cu)
  23074. #define CSL_CPINTC_POLARITY_REG15_POLARITY_508_RESETVAL (0x00000000u)
  23075. #define CSL_CPINTC_POLARITY_REG15_POLARITY_509_MASK (0x20000000u)
  23076. #define CSL_CPINTC_POLARITY_REG15_POLARITY_509_SHIFT (0x0000001Du)
  23077. #define CSL_CPINTC_POLARITY_REG15_POLARITY_509_RESETVAL (0x00000000u)
  23078. #define CSL_CPINTC_POLARITY_REG15_POLARITY_510_MASK (0x40000000u)
  23079. #define CSL_CPINTC_POLARITY_REG15_POLARITY_510_SHIFT (0x0000001Eu)
  23080. #define CSL_CPINTC_POLARITY_REG15_POLARITY_510_RESETVAL (0x00000000u)
  23081. #define CSL_CPINTC_POLARITY_REG15_POLARITY_511_MASK (0x80000000u)
  23082. #define CSL_CPINTC_POLARITY_REG15_POLARITY_511_SHIFT (0x0000001Fu)
  23083. #define CSL_CPINTC_POLARITY_REG15_POLARITY_511_RESETVAL (0x00000000u)
  23084. #define CSL_CPINTC_POLARITY_REG15_RESETVAL (0x00000000u)
  23085. /* polarity_reg16 */
  23086. #define CSL_CPINTC_POLARITY_REG16_POLARITY_512_MASK (0x00000001u)
  23087. #define CSL_CPINTC_POLARITY_REG16_POLARITY_512_SHIFT (0x00000000u)
  23088. #define CSL_CPINTC_POLARITY_REG16_POLARITY_512_RESETVAL (0x00000000u)
  23089. #define CSL_CPINTC_POLARITY_REG16_POLARITY_513_MASK (0x00000002u)
  23090. #define CSL_CPINTC_POLARITY_REG16_POLARITY_513_SHIFT (0x00000001u)
  23091. #define CSL_CPINTC_POLARITY_REG16_POLARITY_513_RESETVAL (0x00000000u)
  23092. #define CSL_CPINTC_POLARITY_REG16_POLARITY_514_MASK (0x00000004u)
  23093. #define CSL_CPINTC_POLARITY_REG16_POLARITY_514_SHIFT (0x00000002u)
  23094. #define CSL_CPINTC_POLARITY_REG16_POLARITY_514_RESETVAL (0x00000000u)
  23095. #define CSL_CPINTC_POLARITY_REG16_POLARITY_515_MASK (0x00000008u)
  23096. #define CSL_CPINTC_POLARITY_REG16_POLARITY_515_SHIFT (0x00000003u)
  23097. #define CSL_CPINTC_POLARITY_REG16_POLARITY_515_RESETVAL (0x00000000u)
  23098. #define CSL_CPINTC_POLARITY_REG16_POLARITY_516_MASK (0x00000010u)
  23099. #define CSL_CPINTC_POLARITY_REG16_POLARITY_516_SHIFT (0x00000004u)
  23100. #define CSL_CPINTC_POLARITY_REG16_POLARITY_516_RESETVAL (0x00000000u)
  23101. #define CSL_CPINTC_POLARITY_REG16_POLARITY_517_MASK (0x00000020u)
  23102. #define CSL_CPINTC_POLARITY_REG16_POLARITY_517_SHIFT (0x00000005u)
  23103. #define CSL_CPINTC_POLARITY_REG16_POLARITY_517_RESETVAL (0x00000000u)
  23104. #define CSL_CPINTC_POLARITY_REG16_POLARITY_518_MASK (0x00000040u)
  23105. #define CSL_CPINTC_POLARITY_REG16_POLARITY_518_SHIFT (0x00000006u)
  23106. #define CSL_CPINTC_POLARITY_REG16_POLARITY_518_RESETVAL (0x00000000u)
  23107. #define CSL_CPINTC_POLARITY_REG16_POLARITY_519_MASK (0x00000080u)
  23108. #define CSL_CPINTC_POLARITY_REG16_POLARITY_519_SHIFT (0x00000007u)
  23109. #define CSL_CPINTC_POLARITY_REG16_POLARITY_519_RESETVAL (0x00000000u)
  23110. #define CSL_CPINTC_POLARITY_REG16_POLARITY_520_MASK (0x00000100u)
  23111. #define CSL_CPINTC_POLARITY_REG16_POLARITY_520_SHIFT (0x00000008u)
  23112. #define CSL_CPINTC_POLARITY_REG16_POLARITY_520_RESETVAL (0x00000000u)
  23113. #define CSL_CPINTC_POLARITY_REG16_POLARITY_521_MASK (0x00000200u)
  23114. #define CSL_CPINTC_POLARITY_REG16_POLARITY_521_SHIFT (0x00000009u)
  23115. #define CSL_CPINTC_POLARITY_REG16_POLARITY_521_RESETVAL (0x00000000u)
  23116. #define CSL_CPINTC_POLARITY_REG16_POLARITY_522_MASK (0x00000400u)
  23117. #define CSL_CPINTC_POLARITY_REG16_POLARITY_522_SHIFT (0x0000000Au)
  23118. #define CSL_CPINTC_POLARITY_REG16_POLARITY_522_RESETVAL (0x00000000u)
  23119. #define CSL_CPINTC_POLARITY_REG16_POLARITY_523_MASK (0x00000800u)
  23120. #define CSL_CPINTC_POLARITY_REG16_POLARITY_523_SHIFT (0x0000000Bu)
  23121. #define CSL_CPINTC_POLARITY_REG16_POLARITY_523_RESETVAL (0x00000000u)
  23122. #define CSL_CPINTC_POLARITY_REG16_POLARITY_524_MASK (0x00001000u)
  23123. #define CSL_CPINTC_POLARITY_REG16_POLARITY_524_SHIFT (0x0000000Cu)
  23124. #define CSL_CPINTC_POLARITY_REG16_POLARITY_524_RESETVAL (0x00000000u)
  23125. #define CSL_CPINTC_POLARITY_REG16_POLARITY_525_MASK (0x00002000u)
  23126. #define CSL_CPINTC_POLARITY_REG16_POLARITY_525_SHIFT (0x0000000Du)
  23127. #define CSL_CPINTC_POLARITY_REG16_POLARITY_525_RESETVAL (0x00000000u)
  23128. #define CSL_CPINTC_POLARITY_REG16_POLARITY_526_MASK (0x00004000u)
  23129. #define CSL_CPINTC_POLARITY_REG16_POLARITY_526_SHIFT (0x0000000Eu)
  23130. #define CSL_CPINTC_POLARITY_REG16_POLARITY_526_RESETVAL (0x00000000u)
  23131. #define CSL_CPINTC_POLARITY_REG16_POLARITY_527_MASK (0x00008000u)
  23132. #define CSL_CPINTC_POLARITY_REG16_POLARITY_527_SHIFT (0x0000000Fu)
  23133. #define CSL_CPINTC_POLARITY_REG16_POLARITY_527_RESETVAL (0x00000000u)
  23134. #define CSL_CPINTC_POLARITY_REG16_POLARITY_528_MASK (0x00010000u)
  23135. #define CSL_CPINTC_POLARITY_REG16_POLARITY_528_SHIFT (0x00000010u)
  23136. #define CSL_CPINTC_POLARITY_REG16_POLARITY_528_RESETVAL (0x00000000u)
  23137. #define CSL_CPINTC_POLARITY_REG16_POLARITY_529_MASK (0x00020000u)
  23138. #define CSL_CPINTC_POLARITY_REG16_POLARITY_529_SHIFT (0x00000011u)
  23139. #define CSL_CPINTC_POLARITY_REG16_POLARITY_529_RESETVAL (0x00000000u)
  23140. #define CSL_CPINTC_POLARITY_REG16_POLARITY_530_MASK (0x00040000u)
  23141. #define CSL_CPINTC_POLARITY_REG16_POLARITY_530_SHIFT (0x00000012u)
  23142. #define CSL_CPINTC_POLARITY_REG16_POLARITY_530_RESETVAL (0x00000000u)
  23143. #define CSL_CPINTC_POLARITY_REG16_POLARITY_531_MASK (0x00080000u)
  23144. #define CSL_CPINTC_POLARITY_REG16_POLARITY_531_SHIFT (0x00000013u)
  23145. #define CSL_CPINTC_POLARITY_REG16_POLARITY_531_RESETVAL (0x00000000u)
  23146. #define CSL_CPINTC_POLARITY_REG16_POLARITY_532_MASK (0x00100000u)
  23147. #define CSL_CPINTC_POLARITY_REG16_POLARITY_532_SHIFT (0x00000014u)
  23148. #define CSL_CPINTC_POLARITY_REG16_POLARITY_532_RESETVAL (0x00000000u)
  23149. #define CSL_CPINTC_POLARITY_REG16_POLARITY_533_MASK (0x00200000u)
  23150. #define CSL_CPINTC_POLARITY_REG16_POLARITY_533_SHIFT (0x00000015u)
  23151. #define CSL_CPINTC_POLARITY_REG16_POLARITY_533_RESETVAL (0x00000000u)
  23152. #define CSL_CPINTC_POLARITY_REG16_POLARITY_534_MASK (0x00400000u)
  23153. #define CSL_CPINTC_POLARITY_REG16_POLARITY_534_SHIFT (0x00000016u)
  23154. #define CSL_CPINTC_POLARITY_REG16_POLARITY_534_RESETVAL (0x00000000u)
  23155. #define CSL_CPINTC_POLARITY_REG16_POLARITY_535_MASK (0x00800000u)
  23156. #define CSL_CPINTC_POLARITY_REG16_POLARITY_535_SHIFT (0x00000017u)
  23157. #define CSL_CPINTC_POLARITY_REG16_POLARITY_535_RESETVAL (0x00000000u)
  23158. #define CSL_CPINTC_POLARITY_REG16_POLARITY_536_MASK (0x01000000u)
  23159. #define CSL_CPINTC_POLARITY_REG16_POLARITY_536_SHIFT (0x00000018u)
  23160. #define CSL_CPINTC_POLARITY_REG16_POLARITY_536_RESETVAL (0x00000000u)
  23161. #define CSL_CPINTC_POLARITY_REG16_POLARITY_537_MASK (0x02000000u)
  23162. #define CSL_CPINTC_POLARITY_REG16_POLARITY_537_SHIFT (0x00000019u)
  23163. #define CSL_CPINTC_POLARITY_REG16_POLARITY_537_RESETVAL (0x00000000u)
  23164. #define CSL_CPINTC_POLARITY_REG16_POLARITY_538_MASK (0x04000000u)
  23165. #define CSL_CPINTC_POLARITY_REG16_POLARITY_538_SHIFT (0x0000001Au)
  23166. #define CSL_CPINTC_POLARITY_REG16_POLARITY_538_RESETVAL (0x00000000u)
  23167. #define CSL_CPINTC_POLARITY_REG16_POLARITY_539_MASK (0x08000000u)
  23168. #define CSL_CPINTC_POLARITY_REG16_POLARITY_539_SHIFT (0x0000001Bu)
  23169. #define CSL_CPINTC_POLARITY_REG16_POLARITY_539_RESETVAL (0x00000000u)
  23170. #define CSL_CPINTC_POLARITY_REG16_POLARITY_540_MASK (0x10000000u)
  23171. #define CSL_CPINTC_POLARITY_REG16_POLARITY_540_SHIFT (0x0000001Cu)
  23172. #define CSL_CPINTC_POLARITY_REG16_POLARITY_540_RESETVAL (0x00000000u)
  23173. #define CSL_CPINTC_POLARITY_REG16_POLARITY_541_MASK (0x20000000u)
  23174. #define CSL_CPINTC_POLARITY_REG16_POLARITY_541_SHIFT (0x0000001Du)
  23175. #define CSL_CPINTC_POLARITY_REG16_POLARITY_541_RESETVAL (0x00000000u)
  23176. #define CSL_CPINTC_POLARITY_REG16_POLARITY_542_MASK (0x40000000u)
  23177. #define CSL_CPINTC_POLARITY_REG16_POLARITY_542_SHIFT (0x0000001Eu)
  23178. #define CSL_CPINTC_POLARITY_REG16_POLARITY_542_RESETVAL (0x00000000u)
  23179. #define CSL_CPINTC_POLARITY_REG16_POLARITY_543_MASK (0x80000000u)
  23180. #define CSL_CPINTC_POLARITY_REG16_POLARITY_543_SHIFT (0x0000001Fu)
  23181. #define CSL_CPINTC_POLARITY_REG16_POLARITY_543_RESETVAL (0x00000000u)
  23182. #define CSL_CPINTC_POLARITY_REG16_RESETVAL (0x00000000u)
  23183. /* polarity_reg17 */
  23184. #define CSL_CPINTC_POLARITY_REG17_POLARITY_544_MASK (0x00000001u)
  23185. #define CSL_CPINTC_POLARITY_REG17_POLARITY_544_SHIFT (0x00000000u)
  23186. #define CSL_CPINTC_POLARITY_REG17_POLARITY_544_RESETVAL (0x00000000u)
  23187. #define CSL_CPINTC_POLARITY_REG17_POLARITY_545_MASK (0x00000002u)
  23188. #define CSL_CPINTC_POLARITY_REG17_POLARITY_545_SHIFT (0x00000001u)
  23189. #define CSL_CPINTC_POLARITY_REG17_POLARITY_545_RESETVAL (0x00000000u)
  23190. #define CSL_CPINTC_POLARITY_REG17_POLARITY_546_MASK (0x00000004u)
  23191. #define CSL_CPINTC_POLARITY_REG17_POLARITY_546_SHIFT (0x00000002u)
  23192. #define CSL_CPINTC_POLARITY_REG17_POLARITY_546_RESETVAL (0x00000000u)
  23193. #define CSL_CPINTC_POLARITY_REG17_POLARITY_547_MASK (0x00000008u)
  23194. #define CSL_CPINTC_POLARITY_REG17_POLARITY_547_SHIFT (0x00000003u)
  23195. #define CSL_CPINTC_POLARITY_REG17_POLARITY_547_RESETVAL (0x00000000u)
  23196. #define CSL_CPINTC_POLARITY_REG17_POLARITY_548_MASK (0x00000010u)
  23197. #define CSL_CPINTC_POLARITY_REG17_POLARITY_548_SHIFT (0x00000004u)
  23198. #define CSL_CPINTC_POLARITY_REG17_POLARITY_548_RESETVAL (0x00000000u)
  23199. #define CSL_CPINTC_POLARITY_REG17_POLARITY_549_MASK (0x00000020u)
  23200. #define CSL_CPINTC_POLARITY_REG17_POLARITY_549_SHIFT (0x00000005u)
  23201. #define CSL_CPINTC_POLARITY_REG17_POLARITY_549_RESETVAL (0x00000000u)
  23202. #define CSL_CPINTC_POLARITY_REG17_POLARITY_550_MASK (0x00000040u)
  23203. #define CSL_CPINTC_POLARITY_REG17_POLARITY_550_SHIFT (0x00000006u)
  23204. #define CSL_CPINTC_POLARITY_REG17_POLARITY_550_RESETVAL (0x00000000u)
  23205. #define CSL_CPINTC_POLARITY_REG17_POLARITY_551_MASK (0x00000080u)
  23206. #define CSL_CPINTC_POLARITY_REG17_POLARITY_551_SHIFT (0x00000007u)
  23207. #define CSL_CPINTC_POLARITY_REG17_POLARITY_551_RESETVAL (0x00000000u)
  23208. #define CSL_CPINTC_POLARITY_REG17_POLARITY_552_MASK (0x00000100u)
  23209. #define CSL_CPINTC_POLARITY_REG17_POLARITY_552_SHIFT (0x00000008u)
  23210. #define CSL_CPINTC_POLARITY_REG17_POLARITY_552_RESETVAL (0x00000000u)
  23211. #define CSL_CPINTC_POLARITY_REG17_POLARITY_553_MASK (0x00000200u)
  23212. #define CSL_CPINTC_POLARITY_REG17_POLARITY_553_SHIFT (0x00000009u)
  23213. #define CSL_CPINTC_POLARITY_REG17_POLARITY_553_RESETVAL (0x00000000u)
  23214. #define CSL_CPINTC_POLARITY_REG17_POLARITY_554_MASK (0x00000400u)
  23215. #define CSL_CPINTC_POLARITY_REG17_POLARITY_554_SHIFT (0x0000000Au)
  23216. #define CSL_CPINTC_POLARITY_REG17_POLARITY_554_RESETVAL (0x00000000u)
  23217. #define CSL_CPINTC_POLARITY_REG17_POLARITY_555_MASK (0x00000800u)
  23218. #define CSL_CPINTC_POLARITY_REG17_POLARITY_555_SHIFT (0x0000000Bu)
  23219. #define CSL_CPINTC_POLARITY_REG17_POLARITY_555_RESETVAL (0x00000000u)
  23220. #define CSL_CPINTC_POLARITY_REG17_POLARITY_556_MASK (0x00001000u)
  23221. #define CSL_CPINTC_POLARITY_REG17_POLARITY_556_SHIFT (0x0000000Cu)
  23222. #define CSL_CPINTC_POLARITY_REG17_POLARITY_556_RESETVAL (0x00000000u)
  23223. #define CSL_CPINTC_POLARITY_REG17_POLARITY_557_MASK (0x00002000u)
  23224. #define CSL_CPINTC_POLARITY_REG17_POLARITY_557_SHIFT (0x0000000Du)
  23225. #define CSL_CPINTC_POLARITY_REG17_POLARITY_557_RESETVAL (0x00000000u)
  23226. #define CSL_CPINTC_POLARITY_REG17_POLARITY_558_MASK (0x00004000u)
  23227. #define CSL_CPINTC_POLARITY_REG17_POLARITY_558_SHIFT (0x0000000Eu)
  23228. #define CSL_CPINTC_POLARITY_REG17_POLARITY_558_RESETVAL (0x00000000u)
  23229. #define CSL_CPINTC_POLARITY_REG17_POLARITY_559_MASK (0x00008000u)
  23230. #define CSL_CPINTC_POLARITY_REG17_POLARITY_559_SHIFT (0x0000000Fu)
  23231. #define CSL_CPINTC_POLARITY_REG17_POLARITY_559_RESETVAL (0x00000000u)
  23232. #define CSL_CPINTC_POLARITY_REG17_POLARITY_560_MASK (0x00010000u)
  23233. #define CSL_CPINTC_POLARITY_REG17_POLARITY_560_SHIFT (0x00000010u)
  23234. #define CSL_CPINTC_POLARITY_REG17_POLARITY_560_RESETVAL (0x00000000u)
  23235. #define CSL_CPINTC_POLARITY_REG17_POLARITY_561_MASK (0x00020000u)
  23236. #define CSL_CPINTC_POLARITY_REG17_POLARITY_561_SHIFT (0x00000011u)
  23237. #define CSL_CPINTC_POLARITY_REG17_POLARITY_561_RESETVAL (0x00000000u)
  23238. #define CSL_CPINTC_POLARITY_REG17_POLARITY_562_MASK (0x00040000u)
  23239. #define CSL_CPINTC_POLARITY_REG17_POLARITY_562_SHIFT (0x00000012u)
  23240. #define CSL_CPINTC_POLARITY_REG17_POLARITY_562_RESETVAL (0x00000000u)
  23241. #define CSL_CPINTC_POLARITY_REG17_POLARITY_563_MASK (0x00080000u)
  23242. #define CSL_CPINTC_POLARITY_REG17_POLARITY_563_SHIFT (0x00000013u)
  23243. #define CSL_CPINTC_POLARITY_REG17_POLARITY_563_RESETVAL (0x00000000u)
  23244. #define CSL_CPINTC_POLARITY_REG17_POLARITY_564_MASK (0x00100000u)
  23245. #define CSL_CPINTC_POLARITY_REG17_POLARITY_564_SHIFT (0x00000014u)
  23246. #define CSL_CPINTC_POLARITY_REG17_POLARITY_564_RESETVAL (0x00000000u)
  23247. #define CSL_CPINTC_POLARITY_REG17_POLARITY_565_MASK (0x00200000u)
  23248. #define CSL_CPINTC_POLARITY_REG17_POLARITY_565_SHIFT (0x00000015u)
  23249. #define CSL_CPINTC_POLARITY_REG17_POLARITY_565_RESETVAL (0x00000000u)
  23250. #define CSL_CPINTC_POLARITY_REG17_POLARITY_566_MASK (0x00400000u)
  23251. #define CSL_CPINTC_POLARITY_REG17_POLARITY_566_SHIFT (0x00000016u)
  23252. #define CSL_CPINTC_POLARITY_REG17_POLARITY_566_RESETVAL (0x00000000u)
  23253. #define CSL_CPINTC_POLARITY_REG17_POLARITY_567_MASK (0x00800000u)
  23254. #define CSL_CPINTC_POLARITY_REG17_POLARITY_567_SHIFT (0x00000017u)
  23255. #define CSL_CPINTC_POLARITY_REG17_POLARITY_567_RESETVAL (0x00000000u)
  23256. #define CSL_CPINTC_POLARITY_REG17_POLARITY_568_MASK (0x01000000u)
  23257. #define CSL_CPINTC_POLARITY_REG17_POLARITY_568_SHIFT (0x00000018u)
  23258. #define CSL_CPINTC_POLARITY_REG17_POLARITY_568_RESETVAL (0x00000000u)
  23259. #define CSL_CPINTC_POLARITY_REG17_POLARITY_569_MASK (0x02000000u)
  23260. #define CSL_CPINTC_POLARITY_REG17_POLARITY_569_SHIFT (0x00000019u)
  23261. #define CSL_CPINTC_POLARITY_REG17_POLARITY_569_RESETVAL (0x00000000u)
  23262. #define CSL_CPINTC_POLARITY_REG17_POLARITY_570_MASK (0x04000000u)
  23263. #define CSL_CPINTC_POLARITY_REG17_POLARITY_570_SHIFT (0x0000001Au)
  23264. #define CSL_CPINTC_POLARITY_REG17_POLARITY_570_RESETVAL (0x00000000u)
  23265. #define CSL_CPINTC_POLARITY_REG17_POLARITY_571_MASK (0x08000000u)
  23266. #define CSL_CPINTC_POLARITY_REG17_POLARITY_571_SHIFT (0x0000001Bu)
  23267. #define CSL_CPINTC_POLARITY_REG17_POLARITY_571_RESETVAL (0x00000000u)
  23268. #define CSL_CPINTC_POLARITY_REG17_POLARITY_572_MASK (0x10000000u)
  23269. #define CSL_CPINTC_POLARITY_REG17_POLARITY_572_SHIFT (0x0000001Cu)
  23270. #define CSL_CPINTC_POLARITY_REG17_POLARITY_572_RESETVAL (0x00000000u)
  23271. #define CSL_CPINTC_POLARITY_REG17_POLARITY_573_MASK (0x20000000u)
  23272. #define CSL_CPINTC_POLARITY_REG17_POLARITY_573_SHIFT (0x0000001Du)
  23273. #define CSL_CPINTC_POLARITY_REG17_POLARITY_573_RESETVAL (0x00000000u)
  23274. #define CSL_CPINTC_POLARITY_REG17_POLARITY_574_MASK (0x40000000u)
  23275. #define CSL_CPINTC_POLARITY_REG17_POLARITY_574_SHIFT (0x0000001Eu)
  23276. #define CSL_CPINTC_POLARITY_REG17_POLARITY_574_RESETVAL (0x00000000u)
  23277. #define CSL_CPINTC_POLARITY_REG17_POLARITY_575_MASK (0x80000000u)
  23278. #define CSL_CPINTC_POLARITY_REG17_POLARITY_575_SHIFT (0x0000001Fu)
  23279. #define CSL_CPINTC_POLARITY_REG17_POLARITY_575_RESETVAL (0x00000000u)
  23280. #define CSL_CPINTC_POLARITY_REG17_RESETVAL (0x00000000u)
  23281. /* polarity_reg18 */
  23282. #define CSL_CPINTC_POLARITY_REG18_POLARITY_576_MASK (0x00000001u)
  23283. #define CSL_CPINTC_POLARITY_REG18_POLARITY_576_SHIFT (0x00000000u)
  23284. #define CSL_CPINTC_POLARITY_REG18_POLARITY_576_RESETVAL (0x00000000u)
  23285. #define CSL_CPINTC_POLARITY_REG18_POLARITY_577_MASK (0x00000002u)
  23286. #define CSL_CPINTC_POLARITY_REG18_POLARITY_577_SHIFT (0x00000001u)
  23287. #define CSL_CPINTC_POLARITY_REG18_POLARITY_577_RESETVAL (0x00000000u)
  23288. #define CSL_CPINTC_POLARITY_REG18_POLARITY_578_MASK (0x00000004u)
  23289. #define CSL_CPINTC_POLARITY_REG18_POLARITY_578_SHIFT (0x00000002u)
  23290. #define CSL_CPINTC_POLARITY_REG18_POLARITY_578_RESETVAL (0x00000000u)
  23291. #define CSL_CPINTC_POLARITY_REG18_POLARITY_579_MASK (0x00000008u)
  23292. #define CSL_CPINTC_POLARITY_REG18_POLARITY_579_SHIFT (0x00000003u)
  23293. #define CSL_CPINTC_POLARITY_REG18_POLARITY_579_RESETVAL (0x00000000u)
  23294. #define CSL_CPINTC_POLARITY_REG18_POLARITY_580_MASK (0x00000010u)
  23295. #define CSL_CPINTC_POLARITY_REG18_POLARITY_580_SHIFT (0x00000004u)
  23296. #define CSL_CPINTC_POLARITY_REG18_POLARITY_580_RESETVAL (0x00000000u)
  23297. #define CSL_CPINTC_POLARITY_REG18_POLARITY_581_MASK (0x00000020u)
  23298. #define CSL_CPINTC_POLARITY_REG18_POLARITY_581_SHIFT (0x00000005u)
  23299. #define CSL_CPINTC_POLARITY_REG18_POLARITY_581_RESETVAL (0x00000000u)
  23300. #define CSL_CPINTC_POLARITY_REG18_POLARITY_582_MASK (0x00000040u)
  23301. #define CSL_CPINTC_POLARITY_REG18_POLARITY_582_SHIFT (0x00000006u)
  23302. #define CSL_CPINTC_POLARITY_REG18_POLARITY_582_RESETVAL (0x00000000u)
  23303. #define CSL_CPINTC_POLARITY_REG18_POLARITY_583_MASK (0x00000080u)
  23304. #define CSL_CPINTC_POLARITY_REG18_POLARITY_583_SHIFT (0x00000007u)
  23305. #define CSL_CPINTC_POLARITY_REG18_POLARITY_583_RESETVAL (0x00000000u)
  23306. #define CSL_CPINTC_POLARITY_REG18_POLARITY_584_MASK (0x00000100u)
  23307. #define CSL_CPINTC_POLARITY_REG18_POLARITY_584_SHIFT (0x00000008u)
  23308. #define CSL_CPINTC_POLARITY_REG18_POLARITY_584_RESETVAL (0x00000000u)
  23309. #define CSL_CPINTC_POLARITY_REG18_POLARITY_585_MASK (0x00000200u)
  23310. #define CSL_CPINTC_POLARITY_REG18_POLARITY_585_SHIFT (0x00000009u)
  23311. #define CSL_CPINTC_POLARITY_REG18_POLARITY_585_RESETVAL (0x00000000u)
  23312. #define CSL_CPINTC_POLARITY_REG18_POLARITY_586_MASK (0x00000400u)
  23313. #define CSL_CPINTC_POLARITY_REG18_POLARITY_586_SHIFT (0x0000000Au)
  23314. #define CSL_CPINTC_POLARITY_REG18_POLARITY_586_RESETVAL (0x00000000u)
  23315. #define CSL_CPINTC_POLARITY_REG18_POLARITY_587_MASK (0x00000800u)
  23316. #define CSL_CPINTC_POLARITY_REG18_POLARITY_587_SHIFT (0x0000000Bu)
  23317. #define CSL_CPINTC_POLARITY_REG18_POLARITY_587_RESETVAL (0x00000000u)
  23318. #define CSL_CPINTC_POLARITY_REG18_POLARITY_588_MASK (0x00001000u)
  23319. #define CSL_CPINTC_POLARITY_REG18_POLARITY_588_SHIFT (0x0000000Cu)
  23320. #define CSL_CPINTC_POLARITY_REG18_POLARITY_588_RESETVAL (0x00000000u)
  23321. #define CSL_CPINTC_POLARITY_REG18_POLARITY_589_MASK (0x00002000u)
  23322. #define CSL_CPINTC_POLARITY_REG18_POLARITY_589_SHIFT (0x0000000Du)
  23323. #define CSL_CPINTC_POLARITY_REG18_POLARITY_589_RESETVAL (0x00000000u)
  23324. #define CSL_CPINTC_POLARITY_REG18_POLARITY_590_MASK (0x00004000u)
  23325. #define CSL_CPINTC_POLARITY_REG18_POLARITY_590_SHIFT (0x0000000Eu)
  23326. #define CSL_CPINTC_POLARITY_REG18_POLARITY_590_RESETVAL (0x00000000u)
  23327. #define CSL_CPINTC_POLARITY_REG18_POLARITY_591_MASK (0x00008000u)
  23328. #define CSL_CPINTC_POLARITY_REG18_POLARITY_591_SHIFT (0x0000000Fu)
  23329. #define CSL_CPINTC_POLARITY_REG18_POLARITY_591_RESETVAL (0x00000000u)
  23330. #define CSL_CPINTC_POLARITY_REG18_POLARITY_592_MASK (0x00010000u)
  23331. #define CSL_CPINTC_POLARITY_REG18_POLARITY_592_SHIFT (0x00000010u)
  23332. #define CSL_CPINTC_POLARITY_REG18_POLARITY_592_RESETVAL (0x00000000u)
  23333. #define CSL_CPINTC_POLARITY_REG18_POLARITY_593_MASK (0x00020000u)
  23334. #define CSL_CPINTC_POLARITY_REG18_POLARITY_593_SHIFT (0x00000011u)
  23335. #define CSL_CPINTC_POLARITY_REG18_POLARITY_593_RESETVAL (0x00000000u)
  23336. #define CSL_CPINTC_POLARITY_REG18_POLARITY_594_MASK (0x00040000u)
  23337. #define CSL_CPINTC_POLARITY_REG18_POLARITY_594_SHIFT (0x00000012u)
  23338. #define CSL_CPINTC_POLARITY_REG18_POLARITY_594_RESETVAL (0x00000000u)
  23339. #define CSL_CPINTC_POLARITY_REG18_POLARITY_595_MASK (0x00080000u)
  23340. #define CSL_CPINTC_POLARITY_REG18_POLARITY_595_SHIFT (0x00000013u)
  23341. #define CSL_CPINTC_POLARITY_REG18_POLARITY_595_RESETVAL (0x00000000u)
  23342. #define CSL_CPINTC_POLARITY_REG18_POLARITY_596_MASK (0x00100000u)
  23343. #define CSL_CPINTC_POLARITY_REG18_POLARITY_596_SHIFT (0x00000014u)
  23344. #define CSL_CPINTC_POLARITY_REG18_POLARITY_596_RESETVAL (0x00000000u)
  23345. #define CSL_CPINTC_POLARITY_REG18_POLARITY_597_MASK (0x00200000u)
  23346. #define CSL_CPINTC_POLARITY_REG18_POLARITY_597_SHIFT (0x00000015u)
  23347. #define CSL_CPINTC_POLARITY_REG18_POLARITY_597_RESETVAL (0x00000000u)
  23348. #define CSL_CPINTC_POLARITY_REG18_POLARITY_598_MASK (0x00400000u)
  23349. #define CSL_CPINTC_POLARITY_REG18_POLARITY_598_SHIFT (0x00000016u)
  23350. #define CSL_CPINTC_POLARITY_REG18_POLARITY_598_RESETVAL (0x00000000u)
  23351. #define CSL_CPINTC_POLARITY_REG18_POLARITY_599_MASK (0x00800000u)
  23352. #define CSL_CPINTC_POLARITY_REG18_POLARITY_599_SHIFT (0x00000017u)
  23353. #define CSL_CPINTC_POLARITY_REG18_POLARITY_599_RESETVAL (0x00000000u)
  23354. #define CSL_CPINTC_POLARITY_REG18_POLARITY_600_MASK (0x01000000u)
  23355. #define CSL_CPINTC_POLARITY_REG18_POLARITY_600_SHIFT (0x00000018u)
  23356. #define CSL_CPINTC_POLARITY_REG18_POLARITY_600_RESETVAL (0x00000000u)
  23357. #define CSL_CPINTC_POLARITY_REG18_POLARITY_601_MASK (0x02000000u)
  23358. #define CSL_CPINTC_POLARITY_REG18_POLARITY_601_SHIFT (0x00000019u)
  23359. #define CSL_CPINTC_POLARITY_REG18_POLARITY_601_RESETVAL (0x00000000u)
  23360. #define CSL_CPINTC_POLARITY_REG18_POLARITY_602_MASK (0x04000000u)
  23361. #define CSL_CPINTC_POLARITY_REG18_POLARITY_602_SHIFT (0x0000001Au)
  23362. #define CSL_CPINTC_POLARITY_REG18_POLARITY_602_RESETVAL (0x00000000u)
  23363. #define CSL_CPINTC_POLARITY_REG18_POLARITY_603_MASK (0x08000000u)
  23364. #define CSL_CPINTC_POLARITY_REG18_POLARITY_603_SHIFT (0x0000001Bu)
  23365. #define CSL_CPINTC_POLARITY_REG18_POLARITY_603_RESETVAL (0x00000000u)
  23366. #define CSL_CPINTC_POLARITY_REG18_POLARITY_604_MASK (0x10000000u)
  23367. #define CSL_CPINTC_POLARITY_REG18_POLARITY_604_SHIFT (0x0000001Cu)
  23368. #define CSL_CPINTC_POLARITY_REG18_POLARITY_604_RESETVAL (0x00000000u)
  23369. #define CSL_CPINTC_POLARITY_REG18_POLARITY_605_MASK (0x20000000u)
  23370. #define CSL_CPINTC_POLARITY_REG18_POLARITY_605_SHIFT (0x0000001Du)
  23371. #define CSL_CPINTC_POLARITY_REG18_POLARITY_605_RESETVAL (0x00000000u)
  23372. #define CSL_CPINTC_POLARITY_REG18_POLARITY_606_MASK (0x40000000u)
  23373. #define CSL_CPINTC_POLARITY_REG18_POLARITY_606_SHIFT (0x0000001Eu)
  23374. #define CSL_CPINTC_POLARITY_REG18_POLARITY_606_RESETVAL (0x00000000u)
  23375. #define CSL_CPINTC_POLARITY_REG18_POLARITY_607_MASK (0x80000000u)
  23376. #define CSL_CPINTC_POLARITY_REG18_POLARITY_607_SHIFT (0x0000001Fu)
  23377. #define CSL_CPINTC_POLARITY_REG18_POLARITY_607_RESETVAL (0x00000000u)
  23378. #define CSL_CPINTC_POLARITY_REG18_RESETVAL (0x00000000u)
  23379. /* polarity_reg19 */
  23380. #define CSL_CPINTC_POLARITY_REG19_POLARITY_608_MASK (0x00000001u)
  23381. #define CSL_CPINTC_POLARITY_REG19_POLARITY_608_SHIFT (0x00000000u)
  23382. #define CSL_CPINTC_POLARITY_REG19_POLARITY_608_RESETVAL (0x00000000u)
  23383. #define CSL_CPINTC_POLARITY_REG19_POLARITY_609_MASK (0x00000002u)
  23384. #define CSL_CPINTC_POLARITY_REG19_POLARITY_609_SHIFT (0x00000001u)
  23385. #define CSL_CPINTC_POLARITY_REG19_POLARITY_609_RESETVAL (0x00000000u)
  23386. #define CSL_CPINTC_POLARITY_REG19_POLARITY_610_MASK (0x00000004u)
  23387. #define CSL_CPINTC_POLARITY_REG19_POLARITY_610_SHIFT (0x00000002u)
  23388. #define CSL_CPINTC_POLARITY_REG19_POLARITY_610_RESETVAL (0x00000000u)
  23389. #define CSL_CPINTC_POLARITY_REG19_POLARITY_611_MASK (0x00000008u)
  23390. #define CSL_CPINTC_POLARITY_REG19_POLARITY_611_SHIFT (0x00000003u)
  23391. #define CSL_CPINTC_POLARITY_REG19_POLARITY_611_RESETVAL (0x00000000u)
  23392. #define CSL_CPINTC_POLARITY_REG19_POLARITY_612_MASK (0x00000010u)
  23393. #define CSL_CPINTC_POLARITY_REG19_POLARITY_612_SHIFT (0x00000004u)
  23394. #define CSL_CPINTC_POLARITY_REG19_POLARITY_612_RESETVAL (0x00000000u)
  23395. #define CSL_CPINTC_POLARITY_REG19_POLARITY_613_MASK (0x00000020u)
  23396. #define CSL_CPINTC_POLARITY_REG19_POLARITY_613_SHIFT (0x00000005u)
  23397. #define CSL_CPINTC_POLARITY_REG19_POLARITY_613_RESETVAL (0x00000000u)
  23398. #define CSL_CPINTC_POLARITY_REG19_POLARITY_614_MASK (0x00000040u)
  23399. #define CSL_CPINTC_POLARITY_REG19_POLARITY_614_SHIFT (0x00000006u)
  23400. #define CSL_CPINTC_POLARITY_REG19_POLARITY_614_RESETVAL (0x00000000u)
  23401. #define CSL_CPINTC_POLARITY_REG19_POLARITY_615_MASK (0x00000080u)
  23402. #define CSL_CPINTC_POLARITY_REG19_POLARITY_615_SHIFT (0x00000007u)
  23403. #define CSL_CPINTC_POLARITY_REG19_POLARITY_615_RESETVAL (0x00000000u)
  23404. #define CSL_CPINTC_POLARITY_REG19_POLARITY_616_MASK (0x00000100u)
  23405. #define CSL_CPINTC_POLARITY_REG19_POLARITY_616_SHIFT (0x00000008u)
  23406. #define CSL_CPINTC_POLARITY_REG19_POLARITY_616_RESETVAL (0x00000000u)
  23407. #define CSL_CPINTC_POLARITY_REG19_POLARITY_617_MASK (0x00000200u)
  23408. #define CSL_CPINTC_POLARITY_REG19_POLARITY_617_SHIFT (0x00000009u)
  23409. #define CSL_CPINTC_POLARITY_REG19_POLARITY_617_RESETVAL (0x00000000u)
  23410. #define CSL_CPINTC_POLARITY_REG19_POLARITY_618_MASK (0x00000400u)
  23411. #define CSL_CPINTC_POLARITY_REG19_POLARITY_618_SHIFT (0x0000000Au)
  23412. #define CSL_CPINTC_POLARITY_REG19_POLARITY_618_RESETVAL (0x00000000u)
  23413. #define CSL_CPINTC_POLARITY_REG19_POLARITY_619_MASK (0x00000800u)
  23414. #define CSL_CPINTC_POLARITY_REG19_POLARITY_619_SHIFT (0x0000000Bu)
  23415. #define CSL_CPINTC_POLARITY_REG19_POLARITY_619_RESETVAL (0x00000000u)
  23416. #define CSL_CPINTC_POLARITY_REG19_POLARITY_620_MASK (0x00001000u)
  23417. #define CSL_CPINTC_POLARITY_REG19_POLARITY_620_SHIFT (0x0000000Cu)
  23418. #define CSL_CPINTC_POLARITY_REG19_POLARITY_620_RESETVAL (0x00000000u)
  23419. #define CSL_CPINTC_POLARITY_REG19_POLARITY_621_MASK (0x00002000u)
  23420. #define CSL_CPINTC_POLARITY_REG19_POLARITY_621_SHIFT (0x0000000Du)
  23421. #define CSL_CPINTC_POLARITY_REG19_POLARITY_621_RESETVAL (0x00000000u)
  23422. #define CSL_CPINTC_POLARITY_REG19_POLARITY_622_MASK (0x00004000u)
  23423. #define CSL_CPINTC_POLARITY_REG19_POLARITY_622_SHIFT (0x0000000Eu)
  23424. #define CSL_CPINTC_POLARITY_REG19_POLARITY_622_RESETVAL (0x00000000u)
  23425. #define CSL_CPINTC_POLARITY_REG19_POLARITY_623_MASK (0x00008000u)
  23426. #define CSL_CPINTC_POLARITY_REG19_POLARITY_623_SHIFT (0x0000000Fu)
  23427. #define CSL_CPINTC_POLARITY_REG19_POLARITY_623_RESETVAL (0x00000000u)
  23428. #define CSL_CPINTC_POLARITY_REG19_POLARITY_624_MASK (0x00010000u)
  23429. #define CSL_CPINTC_POLARITY_REG19_POLARITY_624_SHIFT (0x00000010u)
  23430. #define CSL_CPINTC_POLARITY_REG19_POLARITY_624_RESETVAL (0x00000000u)
  23431. #define CSL_CPINTC_POLARITY_REG19_POLARITY_625_MASK (0x00020000u)
  23432. #define CSL_CPINTC_POLARITY_REG19_POLARITY_625_SHIFT (0x00000011u)
  23433. #define CSL_CPINTC_POLARITY_REG19_POLARITY_625_RESETVAL (0x00000000u)
  23434. #define CSL_CPINTC_POLARITY_REG19_POLARITY_626_MASK (0x00040000u)
  23435. #define CSL_CPINTC_POLARITY_REG19_POLARITY_626_SHIFT (0x00000012u)
  23436. #define CSL_CPINTC_POLARITY_REG19_POLARITY_626_RESETVAL (0x00000000u)
  23437. #define CSL_CPINTC_POLARITY_REG19_POLARITY_627_MASK (0x00080000u)
  23438. #define CSL_CPINTC_POLARITY_REG19_POLARITY_627_SHIFT (0x00000013u)
  23439. #define CSL_CPINTC_POLARITY_REG19_POLARITY_627_RESETVAL (0x00000000u)
  23440. #define CSL_CPINTC_POLARITY_REG19_POLARITY_628_MASK (0x00100000u)
  23441. #define CSL_CPINTC_POLARITY_REG19_POLARITY_628_SHIFT (0x00000014u)
  23442. #define CSL_CPINTC_POLARITY_REG19_POLARITY_628_RESETVAL (0x00000000u)
  23443. #define CSL_CPINTC_POLARITY_REG19_POLARITY_629_MASK (0x00200000u)
  23444. #define CSL_CPINTC_POLARITY_REG19_POLARITY_629_SHIFT (0x00000015u)
  23445. #define CSL_CPINTC_POLARITY_REG19_POLARITY_629_RESETVAL (0x00000000u)
  23446. #define CSL_CPINTC_POLARITY_REG19_POLARITY_630_MASK (0x00400000u)
  23447. #define CSL_CPINTC_POLARITY_REG19_POLARITY_630_SHIFT (0x00000016u)
  23448. #define CSL_CPINTC_POLARITY_REG19_POLARITY_630_RESETVAL (0x00000000u)
  23449. #define CSL_CPINTC_POLARITY_REG19_POLARITY_631_MASK (0x00800000u)
  23450. #define CSL_CPINTC_POLARITY_REG19_POLARITY_631_SHIFT (0x00000017u)
  23451. #define CSL_CPINTC_POLARITY_REG19_POLARITY_631_RESETVAL (0x00000000u)
  23452. #define CSL_CPINTC_POLARITY_REG19_POLARITY_632_MASK (0x01000000u)
  23453. #define CSL_CPINTC_POLARITY_REG19_POLARITY_632_SHIFT (0x00000018u)
  23454. #define CSL_CPINTC_POLARITY_REG19_POLARITY_632_RESETVAL (0x00000000u)
  23455. #define CSL_CPINTC_POLARITY_REG19_POLARITY_633_MASK (0x02000000u)
  23456. #define CSL_CPINTC_POLARITY_REG19_POLARITY_633_SHIFT (0x00000019u)
  23457. #define CSL_CPINTC_POLARITY_REG19_POLARITY_633_RESETVAL (0x00000000u)
  23458. #define CSL_CPINTC_POLARITY_REG19_POLARITY_634_MASK (0x04000000u)
  23459. #define CSL_CPINTC_POLARITY_REG19_POLARITY_634_SHIFT (0x0000001Au)
  23460. #define CSL_CPINTC_POLARITY_REG19_POLARITY_634_RESETVAL (0x00000000u)
  23461. #define CSL_CPINTC_POLARITY_REG19_POLARITY_635_MASK (0x08000000u)
  23462. #define CSL_CPINTC_POLARITY_REG19_POLARITY_635_SHIFT (0x0000001Bu)
  23463. #define CSL_CPINTC_POLARITY_REG19_POLARITY_635_RESETVAL (0x00000000u)
  23464. #define CSL_CPINTC_POLARITY_REG19_POLARITY_636_MASK (0x10000000u)
  23465. #define CSL_CPINTC_POLARITY_REG19_POLARITY_636_SHIFT (0x0000001Cu)
  23466. #define CSL_CPINTC_POLARITY_REG19_POLARITY_636_RESETVAL (0x00000000u)
  23467. #define CSL_CPINTC_POLARITY_REG19_POLARITY_637_MASK (0x20000000u)
  23468. #define CSL_CPINTC_POLARITY_REG19_POLARITY_637_SHIFT (0x0000001Du)
  23469. #define CSL_CPINTC_POLARITY_REG19_POLARITY_637_RESETVAL (0x00000000u)
  23470. #define CSL_CPINTC_POLARITY_REG19_POLARITY_638_MASK (0x40000000u)
  23471. #define CSL_CPINTC_POLARITY_REG19_POLARITY_638_SHIFT (0x0000001Eu)
  23472. #define CSL_CPINTC_POLARITY_REG19_POLARITY_638_RESETVAL (0x00000000u)
  23473. #define CSL_CPINTC_POLARITY_REG19_POLARITY_639_MASK (0x80000000u)
  23474. #define CSL_CPINTC_POLARITY_REG19_POLARITY_639_SHIFT (0x0000001Fu)
  23475. #define CSL_CPINTC_POLARITY_REG19_POLARITY_639_RESETVAL (0x00000000u)
  23476. #define CSL_CPINTC_POLARITY_REG19_RESETVAL (0x00000000u)
  23477. /* polarity_reg20 */
  23478. #define CSL_CPINTC_POLARITY_REG20_POLARITY_640_MASK (0x00000001u)
  23479. #define CSL_CPINTC_POLARITY_REG20_POLARITY_640_SHIFT (0x00000000u)
  23480. #define CSL_CPINTC_POLARITY_REG20_POLARITY_640_RESETVAL (0x00000000u)
  23481. #define CSL_CPINTC_POLARITY_REG20_POLARITY_641_MASK (0x00000002u)
  23482. #define CSL_CPINTC_POLARITY_REG20_POLARITY_641_SHIFT (0x00000001u)
  23483. #define CSL_CPINTC_POLARITY_REG20_POLARITY_641_RESETVAL (0x00000000u)
  23484. #define CSL_CPINTC_POLARITY_REG20_POLARITY_642_MASK (0x00000004u)
  23485. #define CSL_CPINTC_POLARITY_REG20_POLARITY_642_SHIFT (0x00000002u)
  23486. #define CSL_CPINTC_POLARITY_REG20_POLARITY_642_RESETVAL (0x00000000u)
  23487. #define CSL_CPINTC_POLARITY_REG20_POLARITY_643_MASK (0x00000008u)
  23488. #define CSL_CPINTC_POLARITY_REG20_POLARITY_643_SHIFT (0x00000003u)
  23489. #define CSL_CPINTC_POLARITY_REG20_POLARITY_643_RESETVAL (0x00000000u)
  23490. #define CSL_CPINTC_POLARITY_REG20_POLARITY_644_MASK (0x00000010u)
  23491. #define CSL_CPINTC_POLARITY_REG20_POLARITY_644_SHIFT (0x00000004u)
  23492. #define CSL_CPINTC_POLARITY_REG20_POLARITY_644_RESETVAL (0x00000000u)
  23493. #define CSL_CPINTC_POLARITY_REG20_POLARITY_645_MASK (0x00000020u)
  23494. #define CSL_CPINTC_POLARITY_REG20_POLARITY_645_SHIFT (0x00000005u)
  23495. #define CSL_CPINTC_POLARITY_REG20_POLARITY_645_RESETVAL (0x00000000u)
  23496. #define CSL_CPINTC_POLARITY_REG20_POLARITY_646_MASK (0x00000040u)
  23497. #define CSL_CPINTC_POLARITY_REG20_POLARITY_646_SHIFT (0x00000006u)
  23498. #define CSL_CPINTC_POLARITY_REG20_POLARITY_646_RESETVAL (0x00000000u)
  23499. #define CSL_CPINTC_POLARITY_REG20_POLARITY_647_MASK (0x00000080u)
  23500. #define CSL_CPINTC_POLARITY_REG20_POLARITY_647_SHIFT (0x00000007u)
  23501. #define CSL_CPINTC_POLARITY_REG20_POLARITY_647_RESETVAL (0x00000000u)
  23502. #define CSL_CPINTC_POLARITY_REG20_POLARITY_648_MASK (0x00000100u)
  23503. #define CSL_CPINTC_POLARITY_REG20_POLARITY_648_SHIFT (0x00000008u)
  23504. #define CSL_CPINTC_POLARITY_REG20_POLARITY_648_RESETVAL (0x00000000u)
  23505. #define CSL_CPINTC_POLARITY_REG20_POLARITY_649_MASK (0x00000200u)
  23506. #define CSL_CPINTC_POLARITY_REG20_POLARITY_649_SHIFT (0x00000009u)
  23507. #define CSL_CPINTC_POLARITY_REG20_POLARITY_649_RESETVAL (0x00000000u)
  23508. #define CSL_CPINTC_POLARITY_REG20_POLARITY_650_MASK (0x00000400u)
  23509. #define CSL_CPINTC_POLARITY_REG20_POLARITY_650_SHIFT (0x0000000Au)
  23510. #define CSL_CPINTC_POLARITY_REG20_POLARITY_650_RESETVAL (0x00000000u)
  23511. #define CSL_CPINTC_POLARITY_REG20_POLARITY_651_MASK (0x00000800u)
  23512. #define CSL_CPINTC_POLARITY_REG20_POLARITY_651_SHIFT (0x0000000Bu)
  23513. #define CSL_CPINTC_POLARITY_REG20_POLARITY_651_RESETVAL (0x00000000u)
  23514. #define CSL_CPINTC_POLARITY_REG20_POLARITY_652_MASK (0x00001000u)
  23515. #define CSL_CPINTC_POLARITY_REG20_POLARITY_652_SHIFT (0x0000000Cu)
  23516. #define CSL_CPINTC_POLARITY_REG20_POLARITY_652_RESETVAL (0x00000000u)
  23517. #define CSL_CPINTC_POLARITY_REG20_POLARITY_653_MASK (0x00002000u)
  23518. #define CSL_CPINTC_POLARITY_REG20_POLARITY_653_SHIFT (0x0000000Du)
  23519. #define CSL_CPINTC_POLARITY_REG20_POLARITY_653_RESETVAL (0x00000000u)
  23520. #define CSL_CPINTC_POLARITY_REG20_POLARITY_654_MASK (0x00004000u)
  23521. #define CSL_CPINTC_POLARITY_REG20_POLARITY_654_SHIFT (0x0000000Eu)
  23522. #define CSL_CPINTC_POLARITY_REG20_POLARITY_654_RESETVAL (0x00000000u)
  23523. #define CSL_CPINTC_POLARITY_REG20_POLARITY_655_MASK (0x00008000u)
  23524. #define CSL_CPINTC_POLARITY_REG20_POLARITY_655_SHIFT (0x0000000Fu)
  23525. #define CSL_CPINTC_POLARITY_REG20_POLARITY_655_RESETVAL (0x00000000u)
  23526. #define CSL_CPINTC_POLARITY_REG20_POLARITY_656_MASK (0x00010000u)
  23527. #define CSL_CPINTC_POLARITY_REG20_POLARITY_656_SHIFT (0x00000010u)
  23528. #define CSL_CPINTC_POLARITY_REG20_POLARITY_656_RESETVAL (0x00000000u)
  23529. #define CSL_CPINTC_POLARITY_REG20_POLARITY_657_MASK (0x00020000u)
  23530. #define CSL_CPINTC_POLARITY_REG20_POLARITY_657_SHIFT (0x00000011u)
  23531. #define CSL_CPINTC_POLARITY_REG20_POLARITY_657_RESETVAL (0x00000000u)
  23532. #define CSL_CPINTC_POLARITY_REG20_POLARITY_658_MASK (0x00040000u)
  23533. #define CSL_CPINTC_POLARITY_REG20_POLARITY_658_SHIFT (0x00000012u)
  23534. #define CSL_CPINTC_POLARITY_REG20_POLARITY_658_RESETVAL (0x00000000u)
  23535. #define CSL_CPINTC_POLARITY_REG20_POLARITY_659_MASK (0x00080000u)
  23536. #define CSL_CPINTC_POLARITY_REG20_POLARITY_659_SHIFT (0x00000013u)
  23537. #define CSL_CPINTC_POLARITY_REG20_POLARITY_659_RESETVAL (0x00000000u)
  23538. #define CSL_CPINTC_POLARITY_REG20_POLARITY_660_MASK (0x00100000u)
  23539. #define CSL_CPINTC_POLARITY_REG20_POLARITY_660_SHIFT (0x00000014u)
  23540. #define CSL_CPINTC_POLARITY_REG20_POLARITY_660_RESETVAL (0x00000000u)
  23541. #define CSL_CPINTC_POLARITY_REG20_POLARITY_661_MASK (0x00200000u)
  23542. #define CSL_CPINTC_POLARITY_REG20_POLARITY_661_SHIFT (0x00000015u)
  23543. #define CSL_CPINTC_POLARITY_REG20_POLARITY_661_RESETVAL (0x00000000u)
  23544. #define CSL_CPINTC_POLARITY_REG20_POLARITY_662_MASK (0x00400000u)
  23545. #define CSL_CPINTC_POLARITY_REG20_POLARITY_662_SHIFT (0x00000016u)
  23546. #define CSL_CPINTC_POLARITY_REG20_POLARITY_662_RESETVAL (0x00000000u)
  23547. #define CSL_CPINTC_POLARITY_REG20_POLARITY_663_MASK (0x00800000u)
  23548. #define CSL_CPINTC_POLARITY_REG20_POLARITY_663_SHIFT (0x00000017u)
  23549. #define CSL_CPINTC_POLARITY_REG20_POLARITY_663_RESETVAL (0x00000000u)
  23550. #define CSL_CPINTC_POLARITY_REG20_POLARITY_664_MASK (0x01000000u)
  23551. #define CSL_CPINTC_POLARITY_REG20_POLARITY_664_SHIFT (0x00000018u)
  23552. #define CSL_CPINTC_POLARITY_REG20_POLARITY_664_RESETVAL (0x00000000u)
  23553. #define CSL_CPINTC_POLARITY_REG20_POLARITY_665_MASK (0x02000000u)
  23554. #define CSL_CPINTC_POLARITY_REG20_POLARITY_665_SHIFT (0x00000019u)
  23555. #define CSL_CPINTC_POLARITY_REG20_POLARITY_665_RESETVAL (0x00000000u)
  23556. #define CSL_CPINTC_POLARITY_REG20_POLARITY_666_MASK (0x04000000u)
  23557. #define CSL_CPINTC_POLARITY_REG20_POLARITY_666_SHIFT (0x0000001Au)
  23558. #define CSL_CPINTC_POLARITY_REG20_POLARITY_666_RESETVAL (0x00000000u)
  23559. #define CSL_CPINTC_POLARITY_REG20_POLARITY_667_MASK (0x08000000u)
  23560. #define CSL_CPINTC_POLARITY_REG20_POLARITY_667_SHIFT (0x0000001Bu)
  23561. #define CSL_CPINTC_POLARITY_REG20_POLARITY_667_RESETVAL (0x00000000u)
  23562. #define CSL_CPINTC_POLARITY_REG20_POLARITY_668_MASK (0x10000000u)
  23563. #define CSL_CPINTC_POLARITY_REG20_POLARITY_668_SHIFT (0x0000001Cu)
  23564. #define CSL_CPINTC_POLARITY_REG20_POLARITY_668_RESETVAL (0x00000000u)
  23565. #define CSL_CPINTC_POLARITY_REG20_POLARITY_669_MASK (0x20000000u)
  23566. #define CSL_CPINTC_POLARITY_REG20_POLARITY_669_SHIFT (0x0000001Du)
  23567. #define CSL_CPINTC_POLARITY_REG20_POLARITY_669_RESETVAL (0x00000000u)
  23568. #define CSL_CPINTC_POLARITY_REG20_POLARITY_670_MASK (0x40000000u)
  23569. #define CSL_CPINTC_POLARITY_REG20_POLARITY_670_SHIFT (0x0000001Eu)
  23570. #define CSL_CPINTC_POLARITY_REG20_POLARITY_670_RESETVAL (0x00000000u)
  23571. #define CSL_CPINTC_POLARITY_REG20_POLARITY_671_MASK (0x80000000u)
  23572. #define CSL_CPINTC_POLARITY_REG20_POLARITY_671_SHIFT (0x0000001Fu)
  23573. #define CSL_CPINTC_POLARITY_REG20_POLARITY_671_RESETVAL (0x00000000u)
  23574. #define CSL_CPINTC_POLARITY_REG20_RESETVAL (0x00000000u)
  23575. /* polarity_reg21 */
  23576. #define CSL_CPINTC_POLARITY_REG21_POLARITY_672_MASK (0x00000001u)
  23577. #define CSL_CPINTC_POLARITY_REG21_POLARITY_672_SHIFT (0x00000000u)
  23578. #define CSL_CPINTC_POLARITY_REG21_POLARITY_672_RESETVAL (0x00000000u)
  23579. #define CSL_CPINTC_POLARITY_REG21_POLARITY_673_MASK (0x00000002u)
  23580. #define CSL_CPINTC_POLARITY_REG21_POLARITY_673_SHIFT (0x00000001u)
  23581. #define CSL_CPINTC_POLARITY_REG21_POLARITY_673_RESETVAL (0x00000000u)
  23582. #define CSL_CPINTC_POLARITY_REG21_POLARITY_674_MASK (0x00000004u)
  23583. #define CSL_CPINTC_POLARITY_REG21_POLARITY_674_SHIFT (0x00000002u)
  23584. #define CSL_CPINTC_POLARITY_REG21_POLARITY_674_RESETVAL (0x00000000u)
  23585. #define CSL_CPINTC_POLARITY_REG21_POLARITY_675_MASK (0x00000008u)
  23586. #define CSL_CPINTC_POLARITY_REG21_POLARITY_675_SHIFT (0x00000003u)
  23587. #define CSL_CPINTC_POLARITY_REG21_POLARITY_675_RESETVAL (0x00000000u)
  23588. #define CSL_CPINTC_POLARITY_REG21_POLARITY_676_MASK (0x00000010u)
  23589. #define CSL_CPINTC_POLARITY_REG21_POLARITY_676_SHIFT (0x00000004u)
  23590. #define CSL_CPINTC_POLARITY_REG21_POLARITY_676_RESETVAL (0x00000000u)
  23591. #define CSL_CPINTC_POLARITY_REG21_POLARITY_677_MASK (0x00000020u)
  23592. #define CSL_CPINTC_POLARITY_REG21_POLARITY_677_SHIFT (0x00000005u)
  23593. #define CSL_CPINTC_POLARITY_REG21_POLARITY_677_RESETVAL (0x00000000u)
  23594. #define CSL_CPINTC_POLARITY_REG21_POLARITY_678_MASK (0x00000040u)
  23595. #define CSL_CPINTC_POLARITY_REG21_POLARITY_678_SHIFT (0x00000006u)
  23596. #define CSL_CPINTC_POLARITY_REG21_POLARITY_678_RESETVAL (0x00000000u)
  23597. #define CSL_CPINTC_POLARITY_REG21_POLARITY_679_MASK (0x00000080u)
  23598. #define CSL_CPINTC_POLARITY_REG21_POLARITY_679_SHIFT (0x00000007u)
  23599. #define CSL_CPINTC_POLARITY_REG21_POLARITY_679_RESETVAL (0x00000000u)
  23600. #define CSL_CPINTC_POLARITY_REG21_POLARITY_680_MASK (0x00000100u)
  23601. #define CSL_CPINTC_POLARITY_REG21_POLARITY_680_SHIFT (0x00000008u)
  23602. #define CSL_CPINTC_POLARITY_REG21_POLARITY_680_RESETVAL (0x00000000u)
  23603. #define CSL_CPINTC_POLARITY_REG21_POLARITY_681_MASK (0x00000200u)
  23604. #define CSL_CPINTC_POLARITY_REG21_POLARITY_681_SHIFT (0x00000009u)
  23605. #define CSL_CPINTC_POLARITY_REG21_POLARITY_681_RESETVAL (0x00000000u)
  23606. #define CSL_CPINTC_POLARITY_REG21_POLARITY_682_MASK (0x00000400u)
  23607. #define CSL_CPINTC_POLARITY_REG21_POLARITY_682_SHIFT (0x0000000Au)
  23608. #define CSL_CPINTC_POLARITY_REG21_POLARITY_682_RESETVAL (0x00000000u)
  23609. #define CSL_CPINTC_POLARITY_REG21_POLARITY_683_MASK (0x00000800u)
  23610. #define CSL_CPINTC_POLARITY_REG21_POLARITY_683_SHIFT (0x0000000Bu)
  23611. #define CSL_CPINTC_POLARITY_REG21_POLARITY_683_RESETVAL (0x00000000u)
  23612. #define CSL_CPINTC_POLARITY_REG21_POLARITY_684_MASK (0x00001000u)
  23613. #define CSL_CPINTC_POLARITY_REG21_POLARITY_684_SHIFT (0x0000000Cu)
  23614. #define CSL_CPINTC_POLARITY_REG21_POLARITY_684_RESETVAL (0x00000000u)
  23615. #define CSL_CPINTC_POLARITY_REG21_POLARITY_685_MASK (0x00002000u)
  23616. #define CSL_CPINTC_POLARITY_REG21_POLARITY_685_SHIFT (0x0000000Du)
  23617. #define CSL_CPINTC_POLARITY_REG21_POLARITY_685_RESETVAL (0x00000000u)
  23618. #define CSL_CPINTC_POLARITY_REG21_POLARITY_686_MASK (0x00004000u)
  23619. #define CSL_CPINTC_POLARITY_REG21_POLARITY_686_SHIFT (0x0000000Eu)
  23620. #define CSL_CPINTC_POLARITY_REG21_POLARITY_686_RESETVAL (0x00000000u)
  23621. #define CSL_CPINTC_POLARITY_REG21_POLARITY_687_MASK (0x00008000u)
  23622. #define CSL_CPINTC_POLARITY_REG21_POLARITY_687_SHIFT (0x0000000Fu)
  23623. #define CSL_CPINTC_POLARITY_REG21_POLARITY_687_RESETVAL (0x00000000u)
  23624. #define CSL_CPINTC_POLARITY_REG21_POLARITY_688_MASK (0x00010000u)
  23625. #define CSL_CPINTC_POLARITY_REG21_POLARITY_688_SHIFT (0x00000010u)
  23626. #define CSL_CPINTC_POLARITY_REG21_POLARITY_688_RESETVAL (0x00000000u)
  23627. #define CSL_CPINTC_POLARITY_REG21_POLARITY_689_MASK (0x00020000u)
  23628. #define CSL_CPINTC_POLARITY_REG21_POLARITY_689_SHIFT (0x00000011u)
  23629. #define CSL_CPINTC_POLARITY_REG21_POLARITY_689_RESETVAL (0x00000000u)
  23630. #define CSL_CPINTC_POLARITY_REG21_POLARITY_690_MASK (0x00040000u)
  23631. #define CSL_CPINTC_POLARITY_REG21_POLARITY_690_SHIFT (0x00000012u)
  23632. #define CSL_CPINTC_POLARITY_REG21_POLARITY_690_RESETVAL (0x00000000u)
  23633. #define CSL_CPINTC_POLARITY_REG21_POLARITY_691_MASK (0x00080000u)
  23634. #define CSL_CPINTC_POLARITY_REG21_POLARITY_691_SHIFT (0x00000013u)
  23635. #define CSL_CPINTC_POLARITY_REG21_POLARITY_691_RESETVAL (0x00000000u)
  23636. #define CSL_CPINTC_POLARITY_REG21_POLARITY_692_MASK (0x00100000u)
  23637. #define CSL_CPINTC_POLARITY_REG21_POLARITY_692_SHIFT (0x00000014u)
  23638. #define CSL_CPINTC_POLARITY_REG21_POLARITY_692_RESETVAL (0x00000000u)
  23639. #define CSL_CPINTC_POLARITY_REG21_POLARITY_693_MASK (0x00200000u)
  23640. #define CSL_CPINTC_POLARITY_REG21_POLARITY_693_SHIFT (0x00000015u)
  23641. #define CSL_CPINTC_POLARITY_REG21_POLARITY_693_RESETVAL (0x00000000u)
  23642. #define CSL_CPINTC_POLARITY_REG21_POLARITY_694_MASK (0x00400000u)
  23643. #define CSL_CPINTC_POLARITY_REG21_POLARITY_694_SHIFT (0x00000016u)
  23644. #define CSL_CPINTC_POLARITY_REG21_POLARITY_694_RESETVAL (0x00000000u)
  23645. #define CSL_CPINTC_POLARITY_REG21_POLARITY_695_MASK (0x00800000u)
  23646. #define CSL_CPINTC_POLARITY_REG21_POLARITY_695_SHIFT (0x00000017u)
  23647. #define CSL_CPINTC_POLARITY_REG21_POLARITY_695_RESETVAL (0x00000000u)
  23648. #define CSL_CPINTC_POLARITY_REG21_POLARITY_696_MASK (0x01000000u)
  23649. #define CSL_CPINTC_POLARITY_REG21_POLARITY_696_SHIFT (0x00000018u)
  23650. #define CSL_CPINTC_POLARITY_REG21_POLARITY_696_RESETVAL (0x00000000u)
  23651. #define CSL_CPINTC_POLARITY_REG21_POLARITY_697_MASK (0x02000000u)
  23652. #define CSL_CPINTC_POLARITY_REG21_POLARITY_697_SHIFT (0x00000019u)
  23653. #define CSL_CPINTC_POLARITY_REG21_POLARITY_697_RESETVAL (0x00000000u)
  23654. #define CSL_CPINTC_POLARITY_REG21_POLARITY_698_MASK (0x04000000u)
  23655. #define CSL_CPINTC_POLARITY_REG21_POLARITY_698_SHIFT (0x0000001Au)
  23656. #define CSL_CPINTC_POLARITY_REG21_POLARITY_698_RESETVAL (0x00000000u)
  23657. #define CSL_CPINTC_POLARITY_REG21_POLARITY_699_MASK (0x08000000u)
  23658. #define CSL_CPINTC_POLARITY_REG21_POLARITY_699_SHIFT (0x0000001Bu)
  23659. #define CSL_CPINTC_POLARITY_REG21_POLARITY_699_RESETVAL (0x00000000u)
  23660. #define CSL_CPINTC_POLARITY_REG21_POLARITY_700_MASK (0x10000000u)
  23661. #define CSL_CPINTC_POLARITY_REG21_POLARITY_700_SHIFT (0x0000001Cu)
  23662. #define CSL_CPINTC_POLARITY_REG21_POLARITY_700_RESETVAL (0x00000000u)
  23663. #define CSL_CPINTC_POLARITY_REG21_POLARITY_701_MASK (0x20000000u)
  23664. #define CSL_CPINTC_POLARITY_REG21_POLARITY_701_SHIFT (0x0000001Du)
  23665. #define CSL_CPINTC_POLARITY_REG21_POLARITY_701_RESETVAL (0x00000000u)
  23666. #define CSL_CPINTC_POLARITY_REG21_POLARITY_702_MASK (0x40000000u)
  23667. #define CSL_CPINTC_POLARITY_REG21_POLARITY_702_SHIFT (0x0000001Eu)
  23668. #define CSL_CPINTC_POLARITY_REG21_POLARITY_702_RESETVAL (0x00000000u)
  23669. #define CSL_CPINTC_POLARITY_REG21_POLARITY_703_MASK (0x80000000u)
  23670. #define CSL_CPINTC_POLARITY_REG21_POLARITY_703_SHIFT (0x0000001Fu)
  23671. #define CSL_CPINTC_POLARITY_REG21_POLARITY_703_RESETVAL (0x00000000u)
  23672. #define CSL_CPINTC_POLARITY_REG21_RESETVAL (0x00000000u)
  23673. /* polarity_reg22 */
  23674. #define CSL_CPINTC_POLARITY_REG22_POLARITY_704_MASK (0x00000001u)
  23675. #define CSL_CPINTC_POLARITY_REG22_POLARITY_704_SHIFT (0x00000000u)
  23676. #define CSL_CPINTC_POLARITY_REG22_POLARITY_704_RESETVAL (0x00000000u)
  23677. #define CSL_CPINTC_POLARITY_REG22_POLARITY_705_MASK (0x00000002u)
  23678. #define CSL_CPINTC_POLARITY_REG22_POLARITY_705_SHIFT (0x00000001u)
  23679. #define CSL_CPINTC_POLARITY_REG22_POLARITY_705_RESETVAL (0x00000000u)
  23680. #define CSL_CPINTC_POLARITY_REG22_POLARITY_706_MASK (0x00000004u)
  23681. #define CSL_CPINTC_POLARITY_REG22_POLARITY_706_SHIFT (0x00000002u)
  23682. #define CSL_CPINTC_POLARITY_REG22_POLARITY_706_RESETVAL (0x00000000u)
  23683. #define CSL_CPINTC_POLARITY_REG22_POLARITY_707_MASK (0x00000008u)
  23684. #define CSL_CPINTC_POLARITY_REG22_POLARITY_707_SHIFT (0x00000003u)
  23685. #define CSL_CPINTC_POLARITY_REG22_POLARITY_707_RESETVAL (0x00000000u)
  23686. #define CSL_CPINTC_POLARITY_REG22_POLARITY_708_MASK (0x00000010u)
  23687. #define CSL_CPINTC_POLARITY_REG22_POLARITY_708_SHIFT (0x00000004u)
  23688. #define CSL_CPINTC_POLARITY_REG22_POLARITY_708_RESETVAL (0x00000000u)
  23689. #define CSL_CPINTC_POLARITY_REG22_POLARITY_709_MASK (0x00000020u)
  23690. #define CSL_CPINTC_POLARITY_REG22_POLARITY_709_SHIFT (0x00000005u)
  23691. #define CSL_CPINTC_POLARITY_REG22_POLARITY_709_RESETVAL (0x00000000u)
  23692. #define CSL_CPINTC_POLARITY_REG22_POLARITY_710_MASK (0x00000040u)
  23693. #define CSL_CPINTC_POLARITY_REG22_POLARITY_710_SHIFT (0x00000006u)
  23694. #define CSL_CPINTC_POLARITY_REG22_POLARITY_710_RESETVAL (0x00000000u)
  23695. #define CSL_CPINTC_POLARITY_REG22_POLARITY_711_MASK (0x00000080u)
  23696. #define CSL_CPINTC_POLARITY_REG22_POLARITY_711_SHIFT (0x00000007u)
  23697. #define CSL_CPINTC_POLARITY_REG22_POLARITY_711_RESETVAL (0x00000000u)
  23698. #define CSL_CPINTC_POLARITY_REG22_POLARITY_712_MASK (0x00000100u)
  23699. #define CSL_CPINTC_POLARITY_REG22_POLARITY_712_SHIFT (0x00000008u)
  23700. #define CSL_CPINTC_POLARITY_REG22_POLARITY_712_RESETVAL (0x00000000u)
  23701. #define CSL_CPINTC_POLARITY_REG22_POLARITY_713_MASK (0x00000200u)
  23702. #define CSL_CPINTC_POLARITY_REG22_POLARITY_713_SHIFT (0x00000009u)
  23703. #define CSL_CPINTC_POLARITY_REG22_POLARITY_713_RESETVAL (0x00000000u)
  23704. #define CSL_CPINTC_POLARITY_REG22_POLARITY_714_MASK (0x00000400u)
  23705. #define CSL_CPINTC_POLARITY_REG22_POLARITY_714_SHIFT (0x0000000Au)
  23706. #define CSL_CPINTC_POLARITY_REG22_POLARITY_714_RESETVAL (0x00000000u)
  23707. #define CSL_CPINTC_POLARITY_REG22_POLARITY_715_MASK (0x00000800u)
  23708. #define CSL_CPINTC_POLARITY_REG22_POLARITY_715_SHIFT (0x0000000Bu)
  23709. #define CSL_CPINTC_POLARITY_REG22_POLARITY_715_RESETVAL (0x00000000u)
  23710. #define CSL_CPINTC_POLARITY_REG22_POLARITY_716_MASK (0x00001000u)
  23711. #define CSL_CPINTC_POLARITY_REG22_POLARITY_716_SHIFT (0x0000000Cu)
  23712. #define CSL_CPINTC_POLARITY_REG22_POLARITY_716_RESETVAL (0x00000000u)
  23713. #define CSL_CPINTC_POLARITY_REG22_POLARITY_717_MASK (0x00002000u)
  23714. #define CSL_CPINTC_POLARITY_REG22_POLARITY_717_SHIFT (0x0000000Du)
  23715. #define CSL_CPINTC_POLARITY_REG22_POLARITY_717_RESETVAL (0x00000000u)
  23716. #define CSL_CPINTC_POLARITY_REG22_POLARITY_718_MASK (0x00004000u)
  23717. #define CSL_CPINTC_POLARITY_REG22_POLARITY_718_SHIFT (0x0000000Eu)
  23718. #define CSL_CPINTC_POLARITY_REG22_POLARITY_718_RESETVAL (0x00000000u)
  23719. #define CSL_CPINTC_POLARITY_REG22_POLARITY_719_MASK (0x00008000u)
  23720. #define CSL_CPINTC_POLARITY_REG22_POLARITY_719_SHIFT (0x0000000Fu)
  23721. #define CSL_CPINTC_POLARITY_REG22_POLARITY_719_RESETVAL (0x00000000u)
  23722. #define CSL_CPINTC_POLARITY_REG22_POLARITY_720_MASK (0x00010000u)
  23723. #define CSL_CPINTC_POLARITY_REG22_POLARITY_720_SHIFT (0x00000010u)
  23724. #define CSL_CPINTC_POLARITY_REG22_POLARITY_720_RESETVAL (0x00000000u)
  23725. #define CSL_CPINTC_POLARITY_REG22_POLARITY_721_MASK (0x00020000u)
  23726. #define CSL_CPINTC_POLARITY_REG22_POLARITY_721_SHIFT (0x00000011u)
  23727. #define CSL_CPINTC_POLARITY_REG22_POLARITY_721_RESETVAL (0x00000000u)
  23728. #define CSL_CPINTC_POLARITY_REG22_POLARITY_722_MASK (0x00040000u)
  23729. #define CSL_CPINTC_POLARITY_REG22_POLARITY_722_SHIFT (0x00000012u)
  23730. #define CSL_CPINTC_POLARITY_REG22_POLARITY_722_RESETVAL (0x00000000u)
  23731. #define CSL_CPINTC_POLARITY_REG22_POLARITY_723_MASK (0x00080000u)
  23732. #define CSL_CPINTC_POLARITY_REG22_POLARITY_723_SHIFT (0x00000013u)
  23733. #define CSL_CPINTC_POLARITY_REG22_POLARITY_723_RESETVAL (0x00000000u)
  23734. #define CSL_CPINTC_POLARITY_REG22_POLARITY_724_MASK (0x00100000u)
  23735. #define CSL_CPINTC_POLARITY_REG22_POLARITY_724_SHIFT (0x00000014u)
  23736. #define CSL_CPINTC_POLARITY_REG22_POLARITY_724_RESETVAL (0x00000000u)
  23737. #define CSL_CPINTC_POLARITY_REG22_POLARITY_725_MASK (0x00200000u)
  23738. #define CSL_CPINTC_POLARITY_REG22_POLARITY_725_SHIFT (0x00000015u)
  23739. #define CSL_CPINTC_POLARITY_REG22_POLARITY_725_RESETVAL (0x00000000u)
  23740. #define CSL_CPINTC_POLARITY_REG22_POLARITY_726_MASK (0x00400000u)
  23741. #define CSL_CPINTC_POLARITY_REG22_POLARITY_726_SHIFT (0x00000016u)
  23742. #define CSL_CPINTC_POLARITY_REG22_POLARITY_726_RESETVAL (0x00000000u)
  23743. #define CSL_CPINTC_POLARITY_REG22_POLARITY_727_MASK (0x00800000u)
  23744. #define CSL_CPINTC_POLARITY_REG22_POLARITY_727_SHIFT (0x00000017u)
  23745. #define CSL_CPINTC_POLARITY_REG22_POLARITY_727_RESETVAL (0x00000000u)
  23746. #define CSL_CPINTC_POLARITY_REG22_POLARITY_728_MASK (0x01000000u)
  23747. #define CSL_CPINTC_POLARITY_REG22_POLARITY_728_SHIFT (0x00000018u)
  23748. #define CSL_CPINTC_POLARITY_REG22_POLARITY_728_RESETVAL (0x00000000u)
  23749. #define CSL_CPINTC_POLARITY_REG22_POLARITY_729_MASK (0x02000000u)
  23750. #define CSL_CPINTC_POLARITY_REG22_POLARITY_729_SHIFT (0x00000019u)
  23751. #define CSL_CPINTC_POLARITY_REG22_POLARITY_729_RESETVAL (0x00000000u)
  23752. #define CSL_CPINTC_POLARITY_REG22_POLARITY_730_MASK (0x04000000u)
  23753. #define CSL_CPINTC_POLARITY_REG22_POLARITY_730_SHIFT (0x0000001Au)
  23754. #define CSL_CPINTC_POLARITY_REG22_POLARITY_730_RESETVAL (0x00000000u)
  23755. #define CSL_CPINTC_POLARITY_REG22_POLARITY_731_MASK (0x08000000u)
  23756. #define CSL_CPINTC_POLARITY_REG22_POLARITY_731_SHIFT (0x0000001Bu)
  23757. #define CSL_CPINTC_POLARITY_REG22_POLARITY_731_RESETVAL (0x00000000u)
  23758. #define CSL_CPINTC_POLARITY_REG22_POLARITY_732_MASK (0x10000000u)
  23759. #define CSL_CPINTC_POLARITY_REG22_POLARITY_732_SHIFT (0x0000001Cu)
  23760. #define CSL_CPINTC_POLARITY_REG22_POLARITY_732_RESETVAL (0x00000000u)
  23761. #define CSL_CPINTC_POLARITY_REG22_POLARITY_733_MASK (0x20000000u)
  23762. #define CSL_CPINTC_POLARITY_REG22_POLARITY_733_SHIFT (0x0000001Du)
  23763. #define CSL_CPINTC_POLARITY_REG22_POLARITY_733_RESETVAL (0x00000000u)
  23764. #define CSL_CPINTC_POLARITY_REG22_POLARITY_734_MASK (0x40000000u)
  23765. #define CSL_CPINTC_POLARITY_REG22_POLARITY_734_SHIFT (0x0000001Eu)
  23766. #define CSL_CPINTC_POLARITY_REG22_POLARITY_734_RESETVAL (0x00000000u)
  23767. #define CSL_CPINTC_POLARITY_REG22_POLARITY_735_MASK (0x80000000u)
  23768. #define CSL_CPINTC_POLARITY_REG22_POLARITY_735_SHIFT (0x0000001Fu)
  23769. #define CSL_CPINTC_POLARITY_REG22_POLARITY_735_RESETVAL (0x00000000u)
  23770. #define CSL_CPINTC_POLARITY_REG22_RESETVAL (0x00000000u)
  23771. /* polarity_reg23 */
  23772. #define CSL_CPINTC_POLARITY_REG23_POLARITY_736_MASK (0x00000001u)
  23773. #define CSL_CPINTC_POLARITY_REG23_POLARITY_736_SHIFT (0x00000000u)
  23774. #define CSL_CPINTC_POLARITY_REG23_POLARITY_736_RESETVAL (0x00000000u)
  23775. #define CSL_CPINTC_POLARITY_REG23_POLARITY_737_MASK (0x00000002u)
  23776. #define CSL_CPINTC_POLARITY_REG23_POLARITY_737_SHIFT (0x00000001u)
  23777. #define CSL_CPINTC_POLARITY_REG23_POLARITY_737_RESETVAL (0x00000000u)
  23778. #define CSL_CPINTC_POLARITY_REG23_POLARITY_738_MASK (0x00000004u)
  23779. #define CSL_CPINTC_POLARITY_REG23_POLARITY_738_SHIFT (0x00000002u)
  23780. #define CSL_CPINTC_POLARITY_REG23_POLARITY_738_RESETVAL (0x00000000u)
  23781. #define CSL_CPINTC_POLARITY_REG23_POLARITY_739_MASK (0x00000008u)
  23782. #define CSL_CPINTC_POLARITY_REG23_POLARITY_739_SHIFT (0x00000003u)
  23783. #define CSL_CPINTC_POLARITY_REG23_POLARITY_739_RESETVAL (0x00000000u)
  23784. #define CSL_CPINTC_POLARITY_REG23_POLARITY_740_MASK (0x00000010u)
  23785. #define CSL_CPINTC_POLARITY_REG23_POLARITY_740_SHIFT (0x00000004u)
  23786. #define CSL_CPINTC_POLARITY_REG23_POLARITY_740_RESETVAL (0x00000000u)
  23787. #define CSL_CPINTC_POLARITY_REG23_POLARITY_741_MASK (0x00000020u)
  23788. #define CSL_CPINTC_POLARITY_REG23_POLARITY_741_SHIFT (0x00000005u)
  23789. #define CSL_CPINTC_POLARITY_REG23_POLARITY_741_RESETVAL (0x00000000u)
  23790. #define CSL_CPINTC_POLARITY_REG23_POLARITY_742_MASK (0x00000040u)
  23791. #define CSL_CPINTC_POLARITY_REG23_POLARITY_742_SHIFT (0x00000006u)
  23792. #define CSL_CPINTC_POLARITY_REG23_POLARITY_742_RESETVAL (0x00000000u)
  23793. #define CSL_CPINTC_POLARITY_REG23_POLARITY_743_MASK (0x00000080u)
  23794. #define CSL_CPINTC_POLARITY_REG23_POLARITY_743_SHIFT (0x00000007u)
  23795. #define CSL_CPINTC_POLARITY_REG23_POLARITY_743_RESETVAL (0x00000000u)
  23796. #define CSL_CPINTC_POLARITY_REG23_POLARITY_744_MASK (0x00000100u)
  23797. #define CSL_CPINTC_POLARITY_REG23_POLARITY_744_SHIFT (0x00000008u)
  23798. #define CSL_CPINTC_POLARITY_REG23_POLARITY_744_RESETVAL (0x00000000u)
  23799. #define CSL_CPINTC_POLARITY_REG23_POLARITY_745_MASK (0x00000200u)
  23800. #define CSL_CPINTC_POLARITY_REG23_POLARITY_745_SHIFT (0x00000009u)
  23801. #define CSL_CPINTC_POLARITY_REG23_POLARITY_745_RESETVAL (0x00000000u)
  23802. #define CSL_CPINTC_POLARITY_REG23_POLARITY_746_MASK (0x00000400u)
  23803. #define CSL_CPINTC_POLARITY_REG23_POLARITY_746_SHIFT (0x0000000Au)
  23804. #define CSL_CPINTC_POLARITY_REG23_POLARITY_746_RESETVAL (0x00000000u)
  23805. #define CSL_CPINTC_POLARITY_REG23_POLARITY_747_MASK (0x00000800u)
  23806. #define CSL_CPINTC_POLARITY_REG23_POLARITY_747_SHIFT (0x0000000Bu)
  23807. #define CSL_CPINTC_POLARITY_REG23_POLARITY_747_RESETVAL (0x00000000u)
  23808. #define CSL_CPINTC_POLARITY_REG23_POLARITY_748_MASK (0x00001000u)
  23809. #define CSL_CPINTC_POLARITY_REG23_POLARITY_748_SHIFT (0x0000000Cu)
  23810. #define CSL_CPINTC_POLARITY_REG23_POLARITY_748_RESETVAL (0x00000000u)
  23811. #define CSL_CPINTC_POLARITY_REG23_POLARITY_749_MASK (0x00002000u)
  23812. #define CSL_CPINTC_POLARITY_REG23_POLARITY_749_SHIFT (0x0000000Du)
  23813. #define CSL_CPINTC_POLARITY_REG23_POLARITY_749_RESETVAL (0x00000000u)
  23814. #define CSL_CPINTC_POLARITY_REG23_POLARITY_750_MASK (0x00004000u)
  23815. #define CSL_CPINTC_POLARITY_REG23_POLARITY_750_SHIFT (0x0000000Eu)
  23816. #define CSL_CPINTC_POLARITY_REG23_POLARITY_750_RESETVAL (0x00000000u)
  23817. #define CSL_CPINTC_POLARITY_REG23_POLARITY_751_MASK (0x00008000u)
  23818. #define CSL_CPINTC_POLARITY_REG23_POLARITY_751_SHIFT (0x0000000Fu)
  23819. #define CSL_CPINTC_POLARITY_REG23_POLARITY_751_RESETVAL (0x00000000u)
  23820. #define CSL_CPINTC_POLARITY_REG23_POLARITY_752_MASK (0x00010000u)
  23821. #define CSL_CPINTC_POLARITY_REG23_POLARITY_752_SHIFT (0x00000010u)
  23822. #define CSL_CPINTC_POLARITY_REG23_POLARITY_752_RESETVAL (0x00000000u)
  23823. #define CSL_CPINTC_POLARITY_REG23_POLARITY_753_MASK (0x00020000u)
  23824. #define CSL_CPINTC_POLARITY_REG23_POLARITY_753_SHIFT (0x00000011u)
  23825. #define CSL_CPINTC_POLARITY_REG23_POLARITY_753_RESETVAL (0x00000000u)
  23826. #define CSL_CPINTC_POLARITY_REG23_POLARITY_754_MASK (0x00040000u)
  23827. #define CSL_CPINTC_POLARITY_REG23_POLARITY_754_SHIFT (0x00000012u)
  23828. #define CSL_CPINTC_POLARITY_REG23_POLARITY_754_RESETVAL (0x00000000u)
  23829. #define CSL_CPINTC_POLARITY_REG23_POLARITY_755_MASK (0x00080000u)
  23830. #define CSL_CPINTC_POLARITY_REG23_POLARITY_755_SHIFT (0x00000013u)
  23831. #define CSL_CPINTC_POLARITY_REG23_POLARITY_755_RESETVAL (0x00000000u)
  23832. #define CSL_CPINTC_POLARITY_REG23_POLARITY_756_MASK (0x00100000u)
  23833. #define CSL_CPINTC_POLARITY_REG23_POLARITY_756_SHIFT (0x00000014u)
  23834. #define CSL_CPINTC_POLARITY_REG23_POLARITY_756_RESETVAL (0x00000000u)
  23835. #define CSL_CPINTC_POLARITY_REG23_POLARITY_757_MASK (0x00200000u)
  23836. #define CSL_CPINTC_POLARITY_REG23_POLARITY_757_SHIFT (0x00000015u)
  23837. #define CSL_CPINTC_POLARITY_REG23_POLARITY_757_RESETVAL (0x00000000u)
  23838. #define CSL_CPINTC_POLARITY_REG23_POLARITY_758_MASK (0x00400000u)
  23839. #define CSL_CPINTC_POLARITY_REG23_POLARITY_758_SHIFT (0x00000016u)
  23840. #define CSL_CPINTC_POLARITY_REG23_POLARITY_758_RESETVAL (0x00000000u)
  23841. #define CSL_CPINTC_POLARITY_REG23_POLARITY_759_MASK (0x00800000u)
  23842. #define CSL_CPINTC_POLARITY_REG23_POLARITY_759_SHIFT (0x00000017u)
  23843. #define CSL_CPINTC_POLARITY_REG23_POLARITY_759_RESETVAL (0x00000000u)
  23844. #define CSL_CPINTC_POLARITY_REG23_POLARITY_760_MASK (0x01000000u)
  23845. #define CSL_CPINTC_POLARITY_REG23_POLARITY_760_SHIFT (0x00000018u)
  23846. #define CSL_CPINTC_POLARITY_REG23_POLARITY_760_RESETVAL (0x00000000u)
  23847. #define CSL_CPINTC_POLARITY_REG23_POLARITY_761_MASK (0x02000000u)
  23848. #define CSL_CPINTC_POLARITY_REG23_POLARITY_761_SHIFT (0x00000019u)
  23849. #define CSL_CPINTC_POLARITY_REG23_POLARITY_761_RESETVAL (0x00000000u)
  23850. #define CSL_CPINTC_POLARITY_REG23_POLARITY_762_MASK (0x04000000u)
  23851. #define CSL_CPINTC_POLARITY_REG23_POLARITY_762_SHIFT (0x0000001Au)
  23852. #define CSL_CPINTC_POLARITY_REG23_POLARITY_762_RESETVAL (0x00000000u)
  23853. #define CSL_CPINTC_POLARITY_REG23_POLARITY_763_MASK (0x08000000u)
  23854. #define CSL_CPINTC_POLARITY_REG23_POLARITY_763_SHIFT (0x0000001Bu)
  23855. #define CSL_CPINTC_POLARITY_REG23_POLARITY_763_RESETVAL (0x00000000u)
  23856. #define CSL_CPINTC_POLARITY_REG23_POLARITY_764_MASK (0x10000000u)
  23857. #define CSL_CPINTC_POLARITY_REG23_POLARITY_764_SHIFT (0x0000001Cu)
  23858. #define CSL_CPINTC_POLARITY_REG23_POLARITY_764_RESETVAL (0x00000000u)
  23859. #define CSL_CPINTC_POLARITY_REG23_POLARITY_765_MASK (0x20000000u)
  23860. #define CSL_CPINTC_POLARITY_REG23_POLARITY_765_SHIFT (0x0000001Du)
  23861. #define CSL_CPINTC_POLARITY_REG23_POLARITY_765_RESETVAL (0x00000000u)
  23862. #define CSL_CPINTC_POLARITY_REG23_POLARITY_766_MASK (0x40000000u)
  23863. #define CSL_CPINTC_POLARITY_REG23_POLARITY_766_SHIFT (0x0000001Eu)
  23864. #define CSL_CPINTC_POLARITY_REG23_POLARITY_766_RESETVAL (0x00000000u)
  23865. #define CSL_CPINTC_POLARITY_REG23_POLARITY_767_MASK (0x80000000u)
  23866. #define CSL_CPINTC_POLARITY_REG23_POLARITY_767_SHIFT (0x0000001Fu)
  23867. #define CSL_CPINTC_POLARITY_REG23_POLARITY_767_RESETVAL (0x00000000u)
  23868. #define CSL_CPINTC_POLARITY_REG23_RESETVAL (0x00000000u)
  23869. /* polarity_reg24 */
  23870. #define CSL_CPINTC_POLARITY_REG24_POLARITY_768_MASK (0x00000001u)
  23871. #define CSL_CPINTC_POLARITY_REG24_POLARITY_768_SHIFT (0x00000000u)
  23872. #define CSL_CPINTC_POLARITY_REG24_POLARITY_768_RESETVAL (0x00000000u)
  23873. #define CSL_CPINTC_POLARITY_REG24_POLARITY_769_MASK (0x00000002u)
  23874. #define CSL_CPINTC_POLARITY_REG24_POLARITY_769_SHIFT (0x00000001u)
  23875. #define CSL_CPINTC_POLARITY_REG24_POLARITY_769_RESETVAL (0x00000000u)
  23876. #define CSL_CPINTC_POLARITY_REG24_POLARITY_770_MASK (0x00000004u)
  23877. #define CSL_CPINTC_POLARITY_REG24_POLARITY_770_SHIFT (0x00000002u)
  23878. #define CSL_CPINTC_POLARITY_REG24_POLARITY_770_RESETVAL (0x00000000u)
  23879. #define CSL_CPINTC_POLARITY_REG24_POLARITY_771_MASK (0x00000008u)
  23880. #define CSL_CPINTC_POLARITY_REG24_POLARITY_771_SHIFT (0x00000003u)
  23881. #define CSL_CPINTC_POLARITY_REG24_POLARITY_771_RESETVAL (0x00000000u)
  23882. #define CSL_CPINTC_POLARITY_REG24_POLARITY_772_MASK (0x00000010u)
  23883. #define CSL_CPINTC_POLARITY_REG24_POLARITY_772_SHIFT (0x00000004u)
  23884. #define CSL_CPINTC_POLARITY_REG24_POLARITY_772_RESETVAL (0x00000000u)
  23885. #define CSL_CPINTC_POLARITY_REG24_POLARITY_773_MASK (0x00000020u)
  23886. #define CSL_CPINTC_POLARITY_REG24_POLARITY_773_SHIFT (0x00000005u)
  23887. #define CSL_CPINTC_POLARITY_REG24_POLARITY_773_RESETVAL (0x00000000u)
  23888. #define CSL_CPINTC_POLARITY_REG24_POLARITY_774_MASK (0x00000040u)
  23889. #define CSL_CPINTC_POLARITY_REG24_POLARITY_774_SHIFT (0x00000006u)
  23890. #define CSL_CPINTC_POLARITY_REG24_POLARITY_774_RESETVAL (0x00000000u)
  23891. #define CSL_CPINTC_POLARITY_REG24_POLARITY_775_MASK (0x00000080u)
  23892. #define CSL_CPINTC_POLARITY_REG24_POLARITY_775_SHIFT (0x00000007u)
  23893. #define CSL_CPINTC_POLARITY_REG24_POLARITY_775_RESETVAL (0x00000000u)
  23894. #define CSL_CPINTC_POLARITY_REG24_POLARITY_776_MASK (0x00000100u)
  23895. #define CSL_CPINTC_POLARITY_REG24_POLARITY_776_SHIFT (0x00000008u)
  23896. #define CSL_CPINTC_POLARITY_REG24_POLARITY_776_RESETVAL (0x00000000u)
  23897. #define CSL_CPINTC_POLARITY_REG24_POLARITY_777_MASK (0x00000200u)
  23898. #define CSL_CPINTC_POLARITY_REG24_POLARITY_777_SHIFT (0x00000009u)
  23899. #define CSL_CPINTC_POLARITY_REG24_POLARITY_777_RESETVAL (0x00000000u)
  23900. #define CSL_CPINTC_POLARITY_REG24_POLARITY_778_MASK (0x00000400u)
  23901. #define CSL_CPINTC_POLARITY_REG24_POLARITY_778_SHIFT (0x0000000Au)
  23902. #define CSL_CPINTC_POLARITY_REG24_POLARITY_778_RESETVAL (0x00000000u)
  23903. #define CSL_CPINTC_POLARITY_REG24_POLARITY_779_MASK (0x00000800u)
  23904. #define CSL_CPINTC_POLARITY_REG24_POLARITY_779_SHIFT (0x0000000Bu)
  23905. #define CSL_CPINTC_POLARITY_REG24_POLARITY_779_RESETVAL (0x00000000u)
  23906. #define CSL_CPINTC_POLARITY_REG24_POLARITY_780_MASK (0x00001000u)
  23907. #define CSL_CPINTC_POLARITY_REG24_POLARITY_780_SHIFT (0x0000000Cu)
  23908. #define CSL_CPINTC_POLARITY_REG24_POLARITY_780_RESETVAL (0x00000000u)
  23909. #define CSL_CPINTC_POLARITY_REG24_POLARITY_781_MASK (0x00002000u)
  23910. #define CSL_CPINTC_POLARITY_REG24_POLARITY_781_SHIFT (0x0000000Du)
  23911. #define CSL_CPINTC_POLARITY_REG24_POLARITY_781_RESETVAL (0x00000000u)
  23912. #define CSL_CPINTC_POLARITY_REG24_POLARITY_782_MASK (0x00004000u)
  23913. #define CSL_CPINTC_POLARITY_REG24_POLARITY_782_SHIFT (0x0000000Eu)
  23914. #define CSL_CPINTC_POLARITY_REG24_POLARITY_782_RESETVAL (0x00000000u)
  23915. #define CSL_CPINTC_POLARITY_REG24_POLARITY_783_MASK (0x00008000u)
  23916. #define CSL_CPINTC_POLARITY_REG24_POLARITY_783_SHIFT (0x0000000Fu)
  23917. #define CSL_CPINTC_POLARITY_REG24_POLARITY_783_RESETVAL (0x00000000u)
  23918. #define CSL_CPINTC_POLARITY_REG24_POLARITY_784_MASK (0x00010000u)
  23919. #define CSL_CPINTC_POLARITY_REG24_POLARITY_784_SHIFT (0x00000010u)
  23920. #define CSL_CPINTC_POLARITY_REG24_POLARITY_784_RESETVAL (0x00000000u)
  23921. #define CSL_CPINTC_POLARITY_REG24_POLARITY_785_MASK (0x00020000u)
  23922. #define CSL_CPINTC_POLARITY_REG24_POLARITY_785_SHIFT (0x00000011u)
  23923. #define CSL_CPINTC_POLARITY_REG24_POLARITY_785_RESETVAL (0x00000000u)
  23924. #define CSL_CPINTC_POLARITY_REG24_POLARITY_786_MASK (0x00040000u)
  23925. #define CSL_CPINTC_POLARITY_REG24_POLARITY_786_SHIFT (0x00000012u)
  23926. #define CSL_CPINTC_POLARITY_REG24_POLARITY_786_RESETVAL (0x00000000u)
  23927. #define CSL_CPINTC_POLARITY_REG24_POLARITY_787_MASK (0x00080000u)
  23928. #define CSL_CPINTC_POLARITY_REG24_POLARITY_787_SHIFT (0x00000013u)
  23929. #define CSL_CPINTC_POLARITY_REG24_POLARITY_787_RESETVAL (0x00000000u)
  23930. #define CSL_CPINTC_POLARITY_REG24_POLARITY_788_MASK (0x00100000u)
  23931. #define CSL_CPINTC_POLARITY_REG24_POLARITY_788_SHIFT (0x00000014u)
  23932. #define CSL_CPINTC_POLARITY_REG24_POLARITY_788_RESETVAL (0x00000000u)
  23933. #define CSL_CPINTC_POLARITY_REG24_POLARITY_789_MASK (0x00200000u)
  23934. #define CSL_CPINTC_POLARITY_REG24_POLARITY_789_SHIFT (0x00000015u)
  23935. #define CSL_CPINTC_POLARITY_REG24_POLARITY_789_RESETVAL (0x00000000u)
  23936. #define CSL_CPINTC_POLARITY_REG24_POLARITY_790_MASK (0x00400000u)
  23937. #define CSL_CPINTC_POLARITY_REG24_POLARITY_790_SHIFT (0x00000016u)
  23938. #define CSL_CPINTC_POLARITY_REG24_POLARITY_790_RESETVAL (0x00000000u)
  23939. #define CSL_CPINTC_POLARITY_REG24_POLARITY_791_MASK (0x00800000u)
  23940. #define CSL_CPINTC_POLARITY_REG24_POLARITY_791_SHIFT (0x00000017u)
  23941. #define CSL_CPINTC_POLARITY_REG24_POLARITY_791_RESETVAL (0x00000000u)
  23942. #define CSL_CPINTC_POLARITY_REG24_POLARITY_792_MASK (0x01000000u)
  23943. #define CSL_CPINTC_POLARITY_REG24_POLARITY_792_SHIFT (0x00000018u)
  23944. #define CSL_CPINTC_POLARITY_REG24_POLARITY_792_RESETVAL (0x00000000u)
  23945. #define CSL_CPINTC_POLARITY_REG24_POLARITY_793_MASK (0x02000000u)
  23946. #define CSL_CPINTC_POLARITY_REG24_POLARITY_793_SHIFT (0x00000019u)
  23947. #define CSL_CPINTC_POLARITY_REG24_POLARITY_793_RESETVAL (0x00000000u)
  23948. #define CSL_CPINTC_POLARITY_REG24_POLARITY_794_MASK (0x04000000u)
  23949. #define CSL_CPINTC_POLARITY_REG24_POLARITY_794_SHIFT (0x0000001Au)
  23950. #define CSL_CPINTC_POLARITY_REG24_POLARITY_794_RESETVAL (0x00000000u)
  23951. #define CSL_CPINTC_POLARITY_REG24_POLARITY_795_MASK (0x08000000u)
  23952. #define CSL_CPINTC_POLARITY_REG24_POLARITY_795_SHIFT (0x0000001Bu)
  23953. #define CSL_CPINTC_POLARITY_REG24_POLARITY_795_RESETVAL (0x00000000u)
  23954. #define CSL_CPINTC_POLARITY_REG24_POLARITY_796_MASK (0x10000000u)
  23955. #define CSL_CPINTC_POLARITY_REG24_POLARITY_796_SHIFT (0x0000001Cu)
  23956. #define CSL_CPINTC_POLARITY_REG24_POLARITY_796_RESETVAL (0x00000000u)
  23957. #define CSL_CPINTC_POLARITY_REG24_POLARITY_797_MASK (0x20000000u)
  23958. #define CSL_CPINTC_POLARITY_REG24_POLARITY_797_SHIFT (0x0000001Du)
  23959. #define CSL_CPINTC_POLARITY_REG24_POLARITY_797_RESETVAL (0x00000000u)
  23960. #define CSL_CPINTC_POLARITY_REG24_POLARITY_798_MASK (0x40000000u)
  23961. #define CSL_CPINTC_POLARITY_REG24_POLARITY_798_SHIFT (0x0000001Eu)
  23962. #define CSL_CPINTC_POLARITY_REG24_POLARITY_798_RESETVAL (0x00000000u)
  23963. #define CSL_CPINTC_POLARITY_REG24_POLARITY_799_MASK (0x80000000u)
  23964. #define CSL_CPINTC_POLARITY_REG24_POLARITY_799_SHIFT (0x0000001Fu)
  23965. #define CSL_CPINTC_POLARITY_REG24_POLARITY_799_RESETVAL (0x00000000u)
  23966. #define CSL_CPINTC_POLARITY_REG24_RESETVAL (0x00000000u)
  23967. /* polarity_reg25 */
  23968. #define CSL_CPINTC_POLARITY_REG25_POLARITY_800_MASK (0x00000001u)
  23969. #define CSL_CPINTC_POLARITY_REG25_POLARITY_800_SHIFT (0x00000000u)
  23970. #define CSL_CPINTC_POLARITY_REG25_POLARITY_800_RESETVAL (0x00000000u)
  23971. #define CSL_CPINTC_POLARITY_REG25_POLARITY_801_MASK (0x00000002u)
  23972. #define CSL_CPINTC_POLARITY_REG25_POLARITY_801_SHIFT (0x00000001u)
  23973. #define CSL_CPINTC_POLARITY_REG25_POLARITY_801_RESETVAL (0x00000000u)
  23974. #define CSL_CPINTC_POLARITY_REG25_POLARITY_802_MASK (0x00000004u)
  23975. #define CSL_CPINTC_POLARITY_REG25_POLARITY_802_SHIFT (0x00000002u)
  23976. #define CSL_CPINTC_POLARITY_REG25_POLARITY_802_RESETVAL (0x00000000u)
  23977. #define CSL_CPINTC_POLARITY_REG25_POLARITY_803_MASK (0x00000008u)
  23978. #define CSL_CPINTC_POLARITY_REG25_POLARITY_803_SHIFT (0x00000003u)
  23979. #define CSL_CPINTC_POLARITY_REG25_POLARITY_803_RESETVAL (0x00000000u)
  23980. #define CSL_CPINTC_POLARITY_REG25_POLARITY_804_MASK (0x00000010u)
  23981. #define CSL_CPINTC_POLARITY_REG25_POLARITY_804_SHIFT (0x00000004u)
  23982. #define CSL_CPINTC_POLARITY_REG25_POLARITY_804_RESETVAL (0x00000000u)
  23983. #define CSL_CPINTC_POLARITY_REG25_POLARITY_805_MASK (0x00000020u)
  23984. #define CSL_CPINTC_POLARITY_REG25_POLARITY_805_SHIFT (0x00000005u)
  23985. #define CSL_CPINTC_POLARITY_REG25_POLARITY_805_RESETVAL (0x00000000u)
  23986. #define CSL_CPINTC_POLARITY_REG25_POLARITY_806_MASK (0x00000040u)
  23987. #define CSL_CPINTC_POLARITY_REG25_POLARITY_806_SHIFT (0x00000006u)
  23988. #define CSL_CPINTC_POLARITY_REG25_POLARITY_806_RESETVAL (0x00000000u)
  23989. #define CSL_CPINTC_POLARITY_REG25_POLARITY_807_MASK (0x00000080u)
  23990. #define CSL_CPINTC_POLARITY_REG25_POLARITY_807_SHIFT (0x00000007u)
  23991. #define CSL_CPINTC_POLARITY_REG25_POLARITY_807_RESETVAL (0x00000000u)
  23992. #define CSL_CPINTC_POLARITY_REG25_POLARITY_808_MASK (0x00000100u)
  23993. #define CSL_CPINTC_POLARITY_REG25_POLARITY_808_SHIFT (0x00000008u)
  23994. #define CSL_CPINTC_POLARITY_REG25_POLARITY_808_RESETVAL (0x00000000u)
  23995. #define CSL_CPINTC_POLARITY_REG25_POLARITY_809_MASK (0x00000200u)
  23996. #define CSL_CPINTC_POLARITY_REG25_POLARITY_809_SHIFT (0x00000009u)
  23997. #define CSL_CPINTC_POLARITY_REG25_POLARITY_809_RESETVAL (0x00000000u)
  23998. #define CSL_CPINTC_POLARITY_REG25_POLARITY_810_MASK (0x00000400u)
  23999. #define CSL_CPINTC_POLARITY_REG25_POLARITY_810_SHIFT (0x0000000Au)
  24000. #define CSL_CPINTC_POLARITY_REG25_POLARITY_810_RESETVAL (0x00000000u)
  24001. #define CSL_CPINTC_POLARITY_REG25_POLARITY_811_MASK (0x00000800u)
  24002. #define CSL_CPINTC_POLARITY_REG25_POLARITY_811_SHIFT (0x0000000Bu)
  24003. #define CSL_CPINTC_POLARITY_REG25_POLARITY_811_RESETVAL (0x00000000u)
  24004. #define CSL_CPINTC_POLARITY_REG25_POLARITY_812_MASK (0x00001000u)
  24005. #define CSL_CPINTC_POLARITY_REG25_POLARITY_812_SHIFT (0x0000000Cu)
  24006. #define CSL_CPINTC_POLARITY_REG25_POLARITY_812_RESETVAL (0x00000000u)
  24007. #define CSL_CPINTC_POLARITY_REG25_POLARITY_813_MASK (0x00002000u)
  24008. #define CSL_CPINTC_POLARITY_REG25_POLARITY_813_SHIFT (0x0000000Du)
  24009. #define CSL_CPINTC_POLARITY_REG25_POLARITY_813_RESETVAL (0x00000000u)
  24010. #define CSL_CPINTC_POLARITY_REG25_POLARITY_814_MASK (0x00004000u)
  24011. #define CSL_CPINTC_POLARITY_REG25_POLARITY_814_SHIFT (0x0000000Eu)
  24012. #define CSL_CPINTC_POLARITY_REG25_POLARITY_814_RESETVAL (0x00000000u)
  24013. #define CSL_CPINTC_POLARITY_REG25_POLARITY_815_MASK (0x00008000u)
  24014. #define CSL_CPINTC_POLARITY_REG25_POLARITY_815_SHIFT (0x0000000Fu)
  24015. #define CSL_CPINTC_POLARITY_REG25_POLARITY_815_RESETVAL (0x00000000u)
  24016. #define CSL_CPINTC_POLARITY_REG25_POLARITY_816_MASK (0x00010000u)
  24017. #define CSL_CPINTC_POLARITY_REG25_POLARITY_816_SHIFT (0x00000010u)
  24018. #define CSL_CPINTC_POLARITY_REG25_POLARITY_816_RESETVAL (0x00000000u)
  24019. #define CSL_CPINTC_POLARITY_REG25_POLARITY_817_MASK (0x00020000u)
  24020. #define CSL_CPINTC_POLARITY_REG25_POLARITY_817_SHIFT (0x00000011u)
  24021. #define CSL_CPINTC_POLARITY_REG25_POLARITY_817_RESETVAL (0x00000000u)
  24022. #define CSL_CPINTC_POLARITY_REG25_POLARITY_818_MASK (0x00040000u)
  24023. #define CSL_CPINTC_POLARITY_REG25_POLARITY_818_SHIFT (0x00000012u)
  24024. #define CSL_CPINTC_POLARITY_REG25_POLARITY_818_RESETVAL (0x00000000u)
  24025. #define CSL_CPINTC_POLARITY_REG25_POLARITY_819_MASK (0x00080000u)
  24026. #define CSL_CPINTC_POLARITY_REG25_POLARITY_819_SHIFT (0x00000013u)
  24027. #define CSL_CPINTC_POLARITY_REG25_POLARITY_819_RESETVAL (0x00000000u)
  24028. #define CSL_CPINTC_POLARITY_REG25_POLARITY_820_MASK (0x00100000u)
  24029. #define CSL_CPINTC_POLARITY_REG25_POLARITY_820_SHIFT (0x00000014u)
  24030. #define CSL_CPINTC_POLARITY_REG25_POLARITY_820_RESETVAL (0x00000000u)
  24031. #define CSL_CPINTC_POLARITY_REG25_POLARITY_821_MASK (0x00200000u)
  24032. #define CSL_CPINTC_POLARITY_REG25_POLARITY_821_SHIFT (0x00000015u)
  24033. #define CSL_CPINTC_POLARITY_REG25_POLARITY_821_RESETVAL (0x00000000u)
  24034. #define CSL_CPINTC_POLARITY_REG25_POLARITY_822_MASK (0x00400000u)
  24035. #define CSL_CPINTC_POLARITY_REG25_POLARITY_822_SHIFT (0x00000016u)
  24036. #define CSL_CPINTC_POLARITY_REG25_POLARITY_822_RESETVAL (0x00000000u)
  24037. #define CSL_CPINTC_POLARITY_REG25_POLARITY_823_MASK (0x00800000u)
  24038. #define CSL_CPINTC_POLARITY_REG25_POLARITY_823_SHIFT (0x00000017u)
  24039. #define CSL_CPINTC_POLARITY_REG25_POLARITY_823_RESETVAL (0x00000000u)
  24040. #define CSL_CPINTC_POLARITY_REG25_POLARITY_824_MASK (0x01000000u)
  24041. #define CSL_CPINTC_POLARITY_REG25_POLARITY_824_SHIFT (0x00000018u)
  24042. #define CSL_CPINTC_POLARITY_REG25_POLARITY_824_RESETVAL (0x00000000u)
  24043. #define CSL_CPINTC_POLARITY_REG25_POLARITY_825_MASK (0x02000000u)
  24044. #define CSL_CPINTC_POLARITY_REG25_POLARITY_825_SHIFT (0x00000019u)
  24045. #define CSL_CPINTC_POLARITY_REG25_POLARITY_825_RESETVAL (0x00000000u)
  24046. #define CSL_CPINTC_POLARITY_REG25_POLARITY_826_MASK (0x04000000u)
  24047. #define CSL_CPINTC_POLARITY_REG25_POLARITY_826_SHIFT (0x0000001Au)
  24048. #define CSL_CPINTC_POLARITY_REG25_POLARITY_826_RESETVAL (0x00000000u)
  24049. #define CSL_CPINTC_POLARITY_REG25_POLARITY_827_MASK (0x08000000u)
  24050. #define CSL_CPINTC_POLARITY_REG25_POLARITY_827_SHIFT (0x0000001Bu)
  24051. #define CSL_CPINTC_POLARITY_REG25_POLARITY_827_RESETVAL (0x00000000u)
  24052. #define CSL_CPINTC_POLARITY_REG25_POLARITY_828_MASK (0x10000000u)
  24053. #define CSL_CPINTC_POLARITY_REG25_POLARITY_828_SHIFT (0x0000001Cu)
  24054. #define CSL_CPINTC_POLARITY_REG25_POLARITY_828_RESETVAL (0x00000000u)
  24055. #define CSL_CPINTC_POLARITY_REG25_POLARITY_829_MASK (0x20000000u)
  24056. #define CSL_CPINTC_POLARITY_REG25_POLARITY_829_SHIFT (0x0000001Du)
  24057. #define CSL_CPINTC_POLARITY_REG25_POLARITY_829_RESETVAL (0x00000000u)
  24058. #define CSL_CPINTC_POLARITY_REG25_POLARITY_830_MASK (0x40000000u)
  24059. #define CSL_CPINTC_POLARITY_REG25_POLARITY_830_SHIFT (0x0000001Eu)
  24060. #define CSL_CPINTC_POLARITY_REG25_POLARITY_830_RESETVAL (0x00000000u)
  24061. #define CSL_CPINTC_POLARITY_REG25_POLARITY_831_MASK (0x80000000u)
  24062. #define CSL_CPINTC_POLARITY_REG25_POLARITY_831_SHIFT (0x0000001Fu)
  24063. #define CSL_CPINTC_POLARITY_REG25_POLARITY_831_RESETVAL (0x00000000u)
  24064. #define CSL_CPINTC_POLARITY_REG25_RESETVAL (0x00000000u)
  24065. /* polarity_reg26 */
  24066. #define CSL_CPINTC_POLARITY_REG26_POLARITY_832_MASK (0x00000001u)
  24067. #define CSL_CPINTC_POLARITY_REG26_POLARITY_832_SHIFT (0x00000000u)
  24068. #define CSL_CPINTC_POLARITY_REG26_POLARITY_832_RESETVAL (0x00000000u)
  24069. #define CSL_CPINTC_POLARITY_REG26_POLARITY_833_MASK (0x00000002u)
  24070. #define CSL_CPINTC_POLARITY_REG26_POLARITY_833_SHIFT (0x00000001u)
  24071. #define CSL_CPINTC_POLARITY_REG26_POLARITY_833_RESETVAL (0x00000000u)
  24072. #define CSL_CPINTC_POLARITY_REG26_POLARITY_834_MASK (0x00000004u)
  24073. #define CSL_CPINTC_POLARITY_REG26_POLARITY_834_SHIFT (0x00000002u)
  24074. #define CSL_CPINTC_POLARITY_REG26_POLARITY_834_RESETVAL (0x00000000u)
  24075. #define CSL_CPINTC_POLARITY_REG26_POLARITY_835_MASK (0x00000008u)
  24076. #define CSL_CPINTC_POLARITY_REG26_POLARITY_835_SHIFT (0x00000003u)
  24077. #define CSL_CPINTC_POLARITY_REG26_POLARITY_835_RESETVAL (0x00000000u)
  24078. #define CSL_CPINTC_POLARITY_REG26_POLARITY_836_MASK (0x00000010u)
  24079. #define CSL_CPINTC_POLARITY_REG26_POLARITY_836_SHIFT (0x00000004u)
  24080. #define CSL_CPINTC_POLARITY_REG26_POLARITY_836_RESETVAL (0x00000000u)
  24081. #define CSL_CPINTC_POLARITY_REG26_POLARITY_837_MASK (0x00000020u)
  24082. #define CSL_CPINTC_POLARITY_REG26_POLARITY_837_SHIFT (0x00000005u)
  24083. #define CSL_CPINTC_POLARITY_REG26_POLARITY_837_RESETVAL (0x00000000u)
  24084. #define CSL_CPINTC_POLARITY_REG26_POLARITY_838_MASK (0x00000040u)
  24085. #define CSL_CPINTC_POLARITY_REG26_POLARITY_838_SHIFT (0x00000006u)
  24086. #define CSL_CPINTC_POLARITY_REG26_POLARITY_838_RESETVAL (0x00000000u)
  24087. #define CSL_CPINTC_POLARITY_REG26_POLARITY_839_MASK (0x00000080u)
  24088. #define CSL_CPINTC_POLARITY_REG26_POLARITY_839_SHIFT (0x00000007u)
  24089. #define CSL_CPINTC_POLARITY_REG26_POLARITY_839_RESETVAL (0x00000000u)
  24090. #define CSL_CPINTC_POLARITY_REG26_POLARITY_840_MASK (0x00000100u)
  24091. #define CSL_CPINTC_POLARITY_REG26_POLARITY_840_SHIFT (0x00000008u)
  24092. #define CSL_CPINTC_POLARITY_REG26_POLARITY_840_RESETVAL (0x00000000u)
  24093. #define CSL_CPINTC_POLARITY_REG26_POLARITY_841_MASK (0x00000200u)
  24094. #define CSL_CPINTC_POLARITY_REG26_POLARITY_841_SHIFT (0x00000009u)
  24095. #define CSL_CPINTC_POLARITY_REG26_POLARITY_841_RESETVAL (0x00000000u)
  24096. #define CSL_CPINTC_POLARITY_REG26_POLARITY_842_MASK (0x00000400u)
  24097. #define CSL_CPINTC_POLARITY_REG26_POLARITY_842_SHIFT (0x0000000Au)
  24098. #define CSL_CPINTC_POLARITY_REG26_POLARITY_842_RESETVAL (0x00000000u)
  24099. #define CSL_CPINTC_POLARITY_REG26_POLARITY_843_MASK (0x00000800u)
  24100. #define CSL_CPINTC_POLARITY_REG26_POLARITY_843_SHIFT (0x0000000Bu)
  24101. #define CSL_CPINTC_POLARITY_REG26_POLARITY_843_RESETVAL (0x00000000u)
  24102. #define CSL_CPINTC_POLARITY_REG26_POLARITY_844_MASK (0x00001000u)
  24103. #define CSL_CPINTC_POLARITY_REG26_POLARITY_844_SHIFT (0x0000000Cu)
  24104. #define CSL_CPINTC_POLARITY_REG26_POLARITY_844_RESETVAL (0x00000000u)
  24105. #define CSL_CPINTC_POLARITY_REG26_POLARITY_845_MASK (0x00002000u)
  24106. #define CSL_CPINTC_POLARITY_REG26_POLARITY_845_SHIFT (0x0000000Du)
  24107. #define CSL_CPINTC_POLARITY_REG26_POLARITY_845_RESETVAL (0x00000000u)
  24108. #define CSL_CPINTC_POLARITY_REG26_POLARITY_846_MASK (0x00004000u)
  24109. #define CSL_CPINTC_POLARITY_REG26_POLARITY_846_SHIFT (0x0000000Eu)
  24110. #define CSL_CPINTC_POLARITY_REG26_POLARITY_846_RESETVAL (0x00000000u)
  24111. #define CSL_CPINTC_POLARITY_REG26_POLARITY_847_MASK (0x00008000u)
  24112. #define CSL_CPINTC_POLARITY_REG26_POLARITY_847_SHIFT (0x0000000Fu)
  24113. #define CSL_CPINTC_POLARITY_REG26_POLARITY_847_RESETVAL (0x00000000u)
  24114. #define CSL_CPINTC_POLARITY_REG26_POLARITY_848_MASK (0x00010000u)
  24115. #define CSL_CPINTC_POLARITY_REG26_POLARITY_848_SHIFT (0x00000010u)
  24116. #define CSL_CPINTC_POLARITY_REG26_POLARITY_848_RESETVAL (0x00000000u)
  24117. #define CSL_CPINTC_POLARITY_REG26_POLARITY_849_MASK (0x00020000u)
  24118. #define CSL_CPINTC_POLARITY_REG26_POLARITY_849_SHIFT (0x00000011u)
  24119. #define CSL_CPINTC_POLARITY_REG26_POLARITY_849_RESETVAL (0x00000000u)
  24120. #define CSL_CPINTC_POLARITY_REG26_POLARITY_850_MASK (0x00040000u)
  24121. #define CSL_CPINTC_POLARITY_REG26_POLARITY_850_SHIFT (0x00000012u)
  24122. #define CSL_CPINTC_POLARITY_REG26_POLARITY_850_RESETVAL (0x00000000u)
  24123. #define CSL_CPINTC_POLARITY_REG26_POLARITY_851_MASK (0x00080000u)
  24124. #define CSL_CPINTC_POLARITY_REG26_POLARITY_851_SHIFT (0x00000013u)
  24125. #define CSL_CPINTC_POLARITY_REG26_POLARITY_851_RESETVAL (0x00000000u)
  24126. #define CSL_CPINTC_POLARITY_REG26_POLARITY_852_MASK (0x00100000u)
  24127. #define CSL_CPINTC_POLARITY_REG26_POLARITY_852_SHIFT (0x00000014u)
  24128. #define CSL_CPINTC_POLARITY_REG26_POLARITY_852_RESETVAL (0x00000000u)
  24129. #define CSL_CPINTC_POLARITY_REG26_POLARITY_853_MASK (0x00200000u)
  24130. #define CSL_CPINTC_POLARITY_REG26_POLARITY_853_SHIFT (0x00000015u)
  24131. #define CSL_CPINTC_POLARITY_REG26_POLARITY_853_RESETVAL (0x00000000u)
  24132. #define CSL_CPINTC_POLARITY_REG26_POLARITY_854_MASK (0x00400000u)
  24133. #define CSL_CPINTC_POLARITY_REG26_POLARITY_854_SHIFT (0x00000016u)
  24134. #define CSL_CPINTC_POLARITY_REG26_POLARITY_854_RESETVAL (0x00000000u)
  24135. #define CSL_CPINTC_POLARITY_REG26_POLARITY_855_MASK (0x00800000u)
  24136. #define CSL_CPINTC_POLARITY_REG26_POLARITY_855_SHIFT (0x00000017u)
  24137. #define CSL_CPINTC_POLARITY_REG26_POLARITY_855_RESETVAL (0x00000000u)
  24138. #define CSL_CPINTC_POLARITY_REG26_POLARITY_856_MASK (0x01000000u)
  24139. #define CSL_CPINTC_POLARITY_REG26_POLARITY_856_SHIFT (0x00000018u)
  24140. #define CSL_CPINTC_POLARITY_REG26_POLARITY_856_RESETVAL (0x00000000u)
  24141. #define CSL_CPINTC_POLARITY_REG26_POLARITY_857_MASK (0x02000000u)
  24142. #define CSL_CPINTC_POLARITY_REG26_POLARITY_857_SHIFT (0x00000019u)
  24143. #define CSL_CPINTC_POLARITY_REG26_POLARITY_857_RESETVAL (0x00000000u)
  24144. #define CSL_CPINTC_POLARITY_REG26_POLARITY_858_MASK (0x04000000u)
  24145. #define CSL_CPINTC_POLARITY_REG26_POLARITY_858_SHIFT (0x0000001Au)
  24146. #define CSL_CPINTC_POLARITY_REG26_POLARITY_858_RESETVAL (0x00000000u)
  24147. #define CSL_CPINTC_POLARITY_REG26_POLARITY_859_MASK (0x08000000u)
  24148. #define CSL_CPINTC_POLARITY_REG26_POLARITY_859_SHIFT (0x0000001Bu)
  24149. #define CSL_CPINTC_POLARITY_REG26_POLARITY_859_RESETVAL (0x00000000u)
  24150. #define CSL_CPINTC_POLARITY_REG26_POLARITY_860_MASK (0x10000000u)
  24151. #define CSL_CPINTC_POLARITY_REG26_POLARITY_860_SHIFT (0x0000001Cu)
  24152. #define CSL_CPINTC_POLARITY_REG26_POLARITY_860_RESETVAL (0x00000000u)
  24153. #define CSL_CPINTC_POLARITY_REG26_POLARITY_861_MASK (0x20000000u)
  24154. #define CSL_CPINTC_POLARITY_REG26_POLARITY_861_SHIFT (0x0000001Du)
  24155. #define CSL_CPINTC_POLARITY_REG26_POLARITY_861_RESETVAL (0x00000000u)
  24156. #define CSL_CPINTC_POLARITY_REG26_POLARITY_862_MASK (0x40000000u)
  24157. #define CSL_CPINTC_POLARITY_REG26_POLARITY_862_SHIFT (0x0000001Eu)
  24158. #define CSL_CPINTC_POLARITY_REG26_POLARITY_862_RESETVAL (0x00000000u)
  24159. #define CSL_CPINTC_POLARITY_REG26_POLARITY_863_MASK (0x80000000u)
  24160. #define CSL_CPINTC_POLARITY_REG26_POLARITY_863_SHIFT (0x0000001Fu)
  24161. #define CSL_CPINTC_POLARITY_REG26_POLARITY_863_RESETVAL (0x00000000u)
  24162. #define CSL_CPINTC_POLARITY_REG26_RESETVAL (0x00000000u)
  24163. /* polarity_reg27 */
  24164. #define CSL_CPINTC_POLARITY_REG27_POLARITY_864_MASK (0x00000001u)
  24165. #define CSL_CPINTC_POLARITY_REG27_POLARITY_864_SHIFT (0x00000000u)
  24166. #define CSL_CPINTC_POLARITY_REG27_POLARITY_864_RESETVAL (0x00000000u)
  24167. #define CSL_CPINTC_POLARITY_REG27_POLARITY_865_MASK (0x00000002u)
  24168. #define CSL_CPINTC_POLARITY_REG27_POLARITY_865_SHIFT (0x00000001u)
  24169. #define CSL_CPINTC_POLARITY_REG27_POLARITY_865_RESETVAL (0x00000000u)
  24170. #define CSL_CPINTC_POLARITY_REG27_POLARITY_866_MASK (0x00000004u)
  24171. #define CSL_CPINTC_POLARITY_REG27_POLARITY_866_SHIFT (0x00000002u)
  24172. #define CSL_CPINTC_POLARITY_REG27_POLARITY_866_RESETVAL (0x00000000u)
  24173. #define CSL_CPINTC_POLARITY_REG27_POLARITY_867_MASK (0x00000008u)
  24174. #define CSL_CPINTC_POLARITY_REG27_POLARITY_867_SHIFT (0x00000003u)
  24175. #define CSL_CPINTC_POLARITY_REG27_POLARITY_867_RESETVAL (0x00000000u)
  24176. #define CSL_CPINTC_POLARITY_REG27_POLARITY_868_MASK (0x00000010u)
  24177. #define CSL_CPINTC_POLARITY_REG27_POLARITY_868_SHIFT (0x00000004u)
  24178. #define CSL_CPINTC_POLARITY_REG27_POLARITY_868_RESETVAL (0x00000000u)
  24179. #define CSL_CPINTC_POLARITY_REG27_POLARITY_869_MASK (0x00000020u)
  24180. #define CSL_CPINTC_POLARITY_REG27_POLARITY_869_SHIFT (0x00000005u)
  24181. #define CSL_CPINTC_POLARITY_REG27_POLARITY_869_RESETVAL (0x00000000u)
  24182. #define CSL_CPINTC_POLARITY_REG27_POLARITY_870_MASK (0x00000040u)
  24183. #define CSL_CPINTC_POLARITY_REG27_POLARITY_870_SHIFT (0x00000006u)
  24184. #define CSL_CPINTC_POLARITY_REG27_POLARITY_870_RESETVAL (0x00000000u)
  24185. #define CSL_CPINTC_POLARITY_REG27_POLARITY_871_MASK (0x00000080u)
  24186. #define CSL_CPINTC_POLARITY_REG27_POLARITY_871_SHIFT (0x00000007u)
  24187. #define CSL_CPINTC_POLARITY_REG27_POLARITY_871_RESETVAL (0x00000000u)
  24188. #define CSL_CPINTC_POLARITY_REG27_POLARITY_872_MASK (0x00000100u)
  24189. #define CSL_CPINTC_POLARITY_REG27_POLARITY_872_SHIFT (0x00000008u)
  24190. #define CSL_CPINTC_POLARITY_REG27_POLARITY_872_RESETVAL (0x00000000u)
  24191. #define CSL_CPINTC_POLARITY_REG27_POLARITY_873_MASK (0x00000200u)
  24192. #define CSL_CPINTC_POLARITY_REG27_POLARITY_873_SHIFT (0x00000009u)
  24193. #define CSL_CPINTC_POLARITY_REG27_POLARITY_873_RESETVAL (0x00000000u)
  24194. #define CSL_CPINTC_POLARITY_REG27_POLARITY_874_MASK (0x00000400u)
  24195. #define CSL_CPINTC_POLARITY_REG27_POLARITY_874_SHIFT (0x0000000Au)
  24196. #define CSL_CPINTC_POLARITY_REG27_POLARITY_874_RESETVAL (0x00000000u)
  24197. #define CSL_CPINTC_POLARITY_REG27_POLARITY_875_MASK (0x00000800u)
  24198. #define CSL_CPINTC_POLARITY_REG27_POLARITY_875_SHIFT (0x0000000Bu)
  24199. #define CSL_CPINTC_POLARITY_REG27_POLARITY_875_RESETVAL (0x00000000u)
  24200. #define CSL_CPINTC_POLARITY_REG27_POLARITY_876_MASK (0x00001000u)
  24201. #define CSL_CPINTC_POLARITY_REG27_POLARITY_876_SHIFT (0x0000000Cu)
  24202. #define CSL_CPINTC_POLARITY_REG27_POLARITY_876_RESETVAL (0x00000000u)
  24203. #define CSL_CPINTC_POLARITY_REG27_POLARITY_877_MASK (0x00002000u)
  24204. #define CSL_CPINTC_POLARITY_REG27_POLARITY_877_SHIFT (0x0000000Du)
  24205. #define CSL_CPINTC_POLARITY_REG27_POLARITY_877_RESETVAL (0x00000000u)
  24206. #define CSL_CPINTC_POLARITY_REG27_POLARITY_878_MASK (0x00004000u)
  24207. #define CSL_CPINTC_POLARITY_REG27_POLARITY_878_SHIFT (0x0000000Eu)
  24208. #define CSL_CPINTC_POLARITY_REG27_POLARITY_878_RESETVAL (0x00000000u)
  24209. #define CSL_CPINTC_POLARITY_REG27_POLARITY_879_MASK (0x00008000u)
  24210. #define CSL_CPINTC_POLARITY_REG27_POLARITY_879_SHIFT (0x0000000Fu)
  24211. #define CSL_CPINTC_POLARITY_REG27_POLARITY_879_RESETVAL (0x00000000u)
  24212. #define CSL_CPINTC_POLARITY_REG27_POLARITY_880_MASK (0x00010000u)
  24213. #define CSL_CPINTC_POLARITY_REG27_POLARITY_880_SHIFT (0x00000010u)
  24214. #define CSL_CPINTC_POLARITY_REG27_POLARITY_880_RESETVAL (0x00000000u)
  24215. #define CSL_CPINTC_POLARITY_REG27_POLARITY_881_MASK (0x00020000u)
  24216. #define CSL_CPINTC_POLARITY_REG27_POLARITY_881_SHIFT (0x00000011u)
  24217. #define CSL_CPINTC_POLARITY_REG27_POLARITY_881_RESETVAL (0x00000000u)
  24218. #define CSL_CPINTC_POLARITY_REG27_POLARITY_882_MASK (0x00040000u)
  24219. #define CSL_CPINTC_POLARITY_REG27_POLARITY_882_SHIFT (0x00000012u)
  24220. #define CSL_CPINTC_POLARITY_REG27_POLARITY_882_RESETVAL (0x00000000u)
  24221. #define CSL_CPINTC_POLARITY_REG27_POLARITY_883_MASK (0x00080000u)
  24222. #define CSL_CPINTC_POLARITY_REG27_POLARITY_883_SHIFT (0x00000013u)
  24223. #define CSL_CPINTC_POLARITY_REG27_POLARITY_883_RESETVAL (0x00000000u)
  24224. #define CSL_CPINTC_POLARITY_REG27_POLARITY_884_MASK (0x00100000u)
  24225. #define CSL_CPINTC_POLARITY_REG27_POLARITY_884_SHIFT (0x00000014u)
  24226. #define CSL_CPINTC_POLARITY_REG27_POLARITY_884_RESETVAL (0x00000000u)
  24227. #define CSL_CPINTC_POLARITY_REG27_POLARITY_885_MASK (0x00200000u)
  24228. #define CSL_CPINTC_POLARITY_REG27_POLARITY_885_SHIFT (0x00000015u)
  24229. #define CSL_CPINTC_POLARITY_REG27_POLARITY_885_RESETVAL (0x00000000u)
  24230. #define CSL_CPINTC_POLARITY_REG27_POLARITY_886_MASK (0x00400000u)
  24231. #define CSL_CPINTC_POLARITY_REG27_POLARITY_886_SHIFT (0x00000016u)
  24232. #define CSL_CPINTC_POLARITY_REG27_POLARITY_886_RESETVAL (0x00000000u)
  24233. #define CSL_CPINTC_POLARITY_REG27_POLARITY_887_MASK (0x00800000u)
  24234. #define CSL_CPINTC_POLARITY_REG27_POLARITY_887_SHIFT (0x00000017u)
  24235. #define CSL_CPINTC_POLARITY_REG27_POLARITY_887_RESETVAL (0x00000000u)
  24236. #define CSL_CPINTC_POLARITY_REG27_POLARITY_888_MASK (0x01000000u)
  24237. #define CSL_CPINTC_POLARITY_REG27_POLARITY_888_SHIFT (0x00000018u)
  24238. #define CSL_CPINTC_POLARITY_REG27_POLARITY_888_RESETVAL (0x00000000u)
  24239. #define CSL_CPINTC_POLARITY_REG27_POLARITY_889_MASK (0x02000000u)
  24240. #define CSL_CPINTC_POLARITY_REG27_POLARITY_889_SHIFT (0x00000019u)
  24241. #define CSL_CPINTC_POLARITY_REG27_POLARITY_889_RESETVAL (0x00000000u)
  24242. #define CSL_CPINTC_POLARITY_REG27_POLARITY_890_MASK (0x04000000u)
  24243. #define CSL_CPINTC_POLARITY_REG27_POLARITY_890_SHIFT (0x0000001Au)
  24244. #define CSL_CPINTC_POLARITY_REG27_POLARITY_890_RESETVAL (0x00000000u)
  24245. #define CSL_CPINTC_POLARITY_REG27_POLARITY_891_MASK (0x08000000u)
  24246. #define CSL_CPINTC_POLARITY_REG27_POLARITY_891_SHIFT (0x0000001Bu)
  24247. #define CSL_CPINTC_POLARITY_REG27_POLARITY_891_RESETVAL (0x00000000u)
  24248. #define CSL_CPINTC_POLARITY_REG27_POLARITY_892_MASK (0x10000000u)
  24249. #define CSL_CPINTC_POLARITY_REG27_POLARITY_892_SHIFT (0x0000001Cu)
  24250. #define CSL_CPINTC_POLARITY_REG27_POLARITY_892_RESETVAL (0x00000000u)
  24251. #define CSL_CPINTC_POLARITY_REG27_POLARITY_893_MASK (0x20000000u)
  24252. #define CSL_CPINTC_POLARITY_REG27_POLARITY_893_SHIFT (0x0000001Du)
  24253. #define CSL_CPINTC_POLARITY_REG27_POLARITY_893_RESETVAL (0x00000000u)
  24254. #define CSL_CPINTC_POLARITY_REG27_POLARITY_894_MASK (0x40000000u)
  24255. #define CSL_CPINTC_POLARITY_REG27_POLARITY_894_SHIFT (0x0000001Eu)
  24256. #define CSL_CPINTC_POLARITY_REG27_POLARITY_894_RESETVAL (0x00000000u)
  24257. #define CSL_CPINTC_POLARITY_REG27_POLARITY_895_MASK (0x80000000u)
  24258. #define CSL_CPINTC_POLARITY_REG27_POLARITY_895_SHIFT (0x0000001Fu)
  24259. #define CSL_CPINTC_POLARITY_REG27_POLARITY_895_RESETVAL (0x00000000u)
  24260. #define CSL_CPINTC_POLARITY_REG27_RESETVAL (0x00000000u)
  24261. /* polarity_reg28 */
  24262. #define CSL_CPINTC_POLARITY_REG28_POLARITY_896_MASK (0x00000001u)
  24263. #define CSL_CPINTC_POLARITY_REG28_POLARITY_896_SHIFT (0x00000000u)
  24264. #define CSL_CPINTC_POLARITY_REG28_POLARITY_896_RESETVAL (0x00000000u)
  24265. #define CSL_CPINTC_POLARITY_REG28_POLARITY_897_MASK (0x00000002u)
  24266. #define CSL_CPINTC_POLARITY_REG28_POLARITY_897_SHIFT (0x00000001u)
  24267. #define CSL_CPINTC_POLARITY_REG28_POLARITY_897_RESETVAL (0x00000000u)
  24268. #define CSL_CPINTC_POLARITY_REG28_POLARITY_898_MASK (0x00000004u)
  24269. #define CSL_CPINTC_POLARITY_REG28_POLARITY_898_SHIFT (0x00000002u)
  24270. #define CSL_CPINTC_POLARITY_REG28_POLARITY_898_RESETVAL (0x00000000u)
  24271. #define CSL_CPINTC_POLARITY_REG28_POLARITY_899_MASK (0x00000008u)
  24272. #define CSL_CPINTC_POLARITY_REG28_POLARITY_899_SHIFT (0x00000003u)
  24273. #define CSL_CPINTC_POLARITY_REG28_POLARITY_899_RESETVAL (0x00000000u)
  24274. #define CSL_CPINTC_POLARITY_REG28_POLARITY_900_MASK (0x00000010u)
  24275. #define CSL_CPINTC_POLARITY_REG28_POLARITY_900_SHIFT (0x00000004u)
  24276. #define CSL_CPINTC_POLARITY_REG28_POLARITY_900_RESETVAL (0x00000000u)
  24277. #define CSL_CPINTC_POLARITY_REG28_POLARITY_901_MASK (0x00000020u)
  24278. #define CSL_CPINTC_POLARITY_REG28_POLARITY_901_SHIFT (0x00000005u)
  24279. #define CSL_CPINTC_POLARITY_REG28_POLARITY_901_RESETVAL (0x00000000u)
  24280. #define CSL_CPINTC_POLARITY_REG28_POLARITY_902_MASK (0x00000040u)
  24281. #define CSL_CPINTC_POLARITY_REG28_POLARITY_902_SHIFT (0x00000006u)
  24282. #define CSL_CPINTC_POLARITY_REG28_POLARITY_902_RESETVAL (0x00000000u)
  24283. #define CSL_CPINTC_POLARITY_REG28_POLARITY_903_MASK (0x00000080u)
  24284. #define CSL_CPINTC_POLARITY_REG28_POLARITY_903_SHIFT (0x00000007u)
  24285. #define CSL_CPINTC_POLARITY_REG28_POLARITY_903_RESETVAL (0x00000000u)
  24286. #define CSL_CPINTC_POLARITY_REG28_POLARITY_904_MASK (0x00000100u)
  24287. #define CSL_CPINTC_POLARITY_REG28_POLARITY_904_SHIFT (0x00000008u)
  24288. #define CSL_CPINTC_POLARITY_REG28_POLARITY_904_RESETVAL (0x00000000u)
  24289. #define CSL_CPINTC_POLARITY_REG28_POLARITY_905_MASK (0x00000200u)
  24290. #define CSL_CPINTC_POLARITY_REG28_POLARITY_905_SHIFT (0x00000009u)
  24291. #define CSL_CPINTC_POLARITY_REG28_POLARITY_905_RESETVAL (0x00000000u)
  24292. #define CSL_CPINTC_POLARITY_REG28_POLARITY_906_MASK (0x00000400u)
  24293. #define CSL_CPINTC_POLARITY_REG28_POLARITY_906_SHIFT (0x0000000Au)
  24294. #define CSL_CPINTC_POLARITY_REG28_POLARITY_906_RESETVAL (0x00000000u)
  24295. #define CSL_CPINTC_POLARITY_REG28_POLARITY_907_MASK (0x00000800u)
  24296. #define CSL_CPINTC_POLARITY_REG28_POLARITY_907_SHIFT (0x0000000Bu)
  24297. #define CSL_CPINTC_POLARITY_REG28_POLARITY_907_RESETVAL (0x00000000u)
  24298. #define CSL_CPINTC_POLARITY_REG28_POLARITY_908_MASK (0x00001000u)
  24299. #define CSL_CPINTC_POLARITY_REG28_POLARITY_908_SHIFT (0x0000000Cu)
  24300. #define CSL_CPINTC_POLARITY_REG28_POLARITY_908_RESETVAL (0x00000000u)
  24301. #define CSL_CPINTC_POLARITY_REG28_POLARITY_909_MASK (0x00002000u)
  24302. #define CSL_CPINTC_POLARITY_REG28_POLARITY_909_SHIFT (0x0000000Du)
  24303. #define CSL_CPINTC_POLARITY_REG28_POLARITY_909_RESETVAL (0x00000000u)
  24304. #define CSL_CPINTC_POLARITY_REG28_POLARITY_910_MASK (0x00004000u)
  24305. #define CSL_CPINTC_POLARITY_REG28_POLARITY_910_SHIFT (0x0000000Eu)
  24306. #define CSL_CPINTC_POLARITY_REG28_POLARITY_910_RESETVAL (0x00000000u)
  24307. #define CSL_CPINTC_POLARITY_REG28_POLARITY_911_MASK (0x00008000u)
  24308. #define CSL_CPINTC_POLARITY_REG28_POLARITY_911_SHIFT (0x0000000Fu)
  24309. #define CSL_CPINTC_POLARITY_REG28_POLARITY_911_RESETVAL (0x00000000u)
  24310. #define CSL_CPINTC_POLARITY_REG28_POLARITY_912_MASK (0x00010000u)
  24311. #define CSL_CPINTC_POLARITY_REG28_POLARITY_912_SHIFT (0x00000010u)
  24312. #define CSL_CPINTC_POLARITY_REG28_POLARITY_912_RESETVAL (0x00000000u)
  24313. #define CSL_CPINTC_POLARITY_REG28_POLARITY_913_MASK (0x00020000u)
  24314. #define CSL_CPINTC_POLARITY_REG28_POLARITY_913_SHIFT (0x00000011u)
  24315. #define CSL_CPINTC_POLARITY_REG28_POLARITY_913_RESETVAL (0x00000000u)
  24316. #define CSL_CPINTC_POLARITY_REG28_POLARITY_914_MASK (0x00040000u)
  24317. #define CSL_CPINTC_POLARITY_REG28_POLARITY_914_SHIFT (0x00000012u)
  24318. #define CSL_CPINTC_POLARITY_REG28_POLARITY_914_RESETVAL (0x00000000u)
  24319. #define CSL_CPINTC_POLARITY_REG28_POLARITY_915_MASK (0x00080000u)
  24320. #define CSL_CPINTC_POLARITY_REG28_POLARITY_915_SHIFT (0x00000013u)
  24321. #define CSL_CPINTC_POLARITY_REG28_POLARITY_915_RESETVAL (0x00000000u)
  24322. #define CSL_CPINTC_POLARITY_REG28_POLARITY_916_MASK (0x00100000u)
  24323. #define CSL_CPINTC_POLARITY_REG28_POLARITY_916_SHIFT (0x00000014u)
  24324. #define CSL_CPINTC_POLARITY_REG28_POLARITY_916_RESETVAL (0x00000000u)
  24325. #define CSL_CPINTC_POLARITY_REG28_POLARITY_917_MASK (0x00200000u)
  24326. #define CSL_CPINTC_POLARITY_REG28_POLARITY_917_SHIFT (0x00000015u)
  24327. #define CSL_CPINTC_POLARITY_REG28_POLARITY_917_RESETVAL (0x00000000u)
  24328. #define CSL_CPINTC_POLARITY_REG28_POLARITY_918_MASK (0x00400000u)
  24329. #define CSL_CPINTC_POLARITY_REG28_POLARITY_918_SHIFT (0x00000016u)
  24330. #define CSL_CPINTC_POLARITY_REG28_POLARITY_918_RESETVAL (0x00000000u)
  24331. #define CSL_CPINTC_POLARITY_REG28_POLARITY_919_MASK (0x00800000u)
  24332. #define CSL_CPINTC_POLARITY_REG28_POLARITY_919_SHIFT (0x00000017u)
  24333. #define CSL_CPINTC_POLARITY_REG28_POLARITY_919_RESETVAL (0x00000000u)
  24334. #define CSL_CPINTC_POLARITY_REG28_POLARITY_920_MASK (0x01000000u)
  24335. #define CSL_CPINTC_POLARITY_REG28_POLARITY_920_SHIFT (0x00000018u)
  24336. #define CSL_CPINTC_POLARITY_REG28_POLARITY_920_RESETVAL (0x00000000u)
  24337. #define CSL_CPINTC_POLARITY_REG28_POLARITY_921_MASK (0x02000000u)
  24338. #define CSL_CPINTC_POLARITY_REG28_POLARITY_921_SHIFT (0x00000019u)
  24339. #define CSL_CPINTC_POLARITY_REG28_POLARITY_921_RESETVAL (0x00000000u)
  24340. #define CSL_CPINTC_POLARITY_REG28_POLARITY_922_MASK (0x04000000u)
  24341. #define CSL_CPINTC_POLARITY_REG28_POLARITY_922_SHIFT (0x0000001Au)
  24342. #define CSL_CPINTC_POLARITY_REG28_POLARITY_922_RESETVAL (0x00000000u)
  24343. #define CSL_CPINTC_POLARITY_REG28_POLARITY_923_MASK (0x08000000u)
  24344. #define CSL_CPINTC_POLARITY_REG28_POLARITY_923_SHIFT (0x0000001Bu)
  24345. #define CSL_CPINTC_POLARITY_REG28_POLARITY_923_RESETVAL (0x00000000u)
  24346. #define CSL_CPINTC_POLARITY_REG28_POLARITY_924_MASK (0x10000000u)
  24347. #define CSL_CPINTC_POLARITY_REG28_POLARITY_924_SHIFT (0x0000001Cu)
  24348. #define CSL_CPINTC_POLARITY_REG28_POLARITY_924_RESETVAL (0x00000000u)
  24349. #define CSL_CPINTC_POLARITY_REG28_POLARITY_925_MASK (0x20000000u)
  24350. #define CSL_CPINTC_POLARITY_REG28_POLARITY_925_SHIFT (0x0000001Du)
  24351. #define CSL_CPINTC_POLARITY_REG28_POLARITY_925_RESETVAL (0x00000000u)
  24352. #define CSL_CPINTC_POLARITY_REG28_POLARITY_926_MASK (0x40000000u)
  24353. #define CSL_CPINTC_POLARITY_REG28_POLARITY_926_SHIFT (0x0000001Eu)
  24354. #define CSL_CPINTC_POLARITY_REG28_POLARITY_926_RESETVAL (0x00000000u)
  24355. #define CSL_CPINTC_POLARITY_REG28_POLARITY_927_MASK (0x80000000u)
  24356. #define CSL_CPINTC_POLARITY_REG28_POLARITY_927_SHIFT (0x0000001Fu)
  24357. #define CSL_CPINTC_POLARITY_REG28_POLARITY_927_RESETVAL (0x00000000u)
  24358. #define CSL_CPINTC_POLARITY_REG28_RESETVAL (0x00000000u)
  24359. /* polarity_reg29 */
  24360. #define CSL_CPINTC_POLARITY_REG29_POLARITY_928_MASK (0x00000001u)
  24361. #define CSL_CPINTC_POLARITY_REG29_POLARITY_928_SHIFT (0x00000000u)
  24362. #define CSL_CPINTC_POLARITY_REG29_POLARITY_928_RESETVAL (0x00000000u)
  24363. #define CSL_CPINTC_POLARITY_REG29_POLARITY_929_MASK (0x00000002u)
  24364. #define CSL_CPINTC_POLARITY_REG29_POLARITY_929_SHIFT (0x00000001u)
  24365. #define CSL_CPINTC_POLARITY_REG29_POLARITY_929_RESETVAL (0x00000000u)
  24366. #define CSL_CPINTC_POLARITY_REG29_POLARITY_930_MASK (0x00000004u)
  24367. #define CSL_CPINTC_POLARITY_REG29_POLARITY_930_SHIFT (0x00000002u)
  24368. #define CSL_CPINTC_POLARITY_REG29_POLARITY_930_RESETVAL (0x00000000u)
  24369. #define CSL_CPINTC_POLARITY_REG29_POLARITY_931_MASK (0x00000008u)
  24370. #define CSL_CPINTC_POLARITY_REG29_POLARITY_931_SHIFT (0x00000003u)
  24371. #define CSL_CPINTC_POLARITY_REG29_POLARITY_931_RESETVAL (0x00000000u)
  24372. #define CSL_CPINTC_POLARITY_REG29_POLARITY_932_MASK (0x00000010u)
  24373. #define CSL_CPINTC_POLARITY_REG29_POLARITY_932_SHIFT (0x00000004u)
  24374. #define CSL_CPINTC_POLARITY_REG29_POLARITY_932_RESETVAL (0x00000000u)
  24375. #define CSL_CPINTC_POLARITY_REG29_POLARITY_933_MASK (0x00000020u)
  24376. #define CSL_CPINTC_POLARITY_REG29_POLARITY_933_SHIFT (0x00000005u)
  24377. #define CSL_CPINTC_POLARITY_REG29_POLARITY_933_RESETVAL (0x00000000u)
  24378. #define CSL_CPINTC_POLARITY_REG29_POLARITY_934_MASK (0x00000040u)
  24379. #define CSL_CPINTC_POLARITY_REG29_POLARITY_934_SHIFT (0x00000006u)
  24380. #define CSL_CPINTC_POLARITY_REG29_POLARITY_934_RESETVAL (0x00000000u)
  24381. #define CSL_CPINTC_POLARITY_REG29_POLARITY_935_MASK (0x00000080u)
  24382. #define CSL_CPINTC_POLARITY_REG29_POLARITY_935_SHIFT (0x00000007u)
  24383. #define CSL_CPINTC_POLARITY_REG29_POLARITY_935_RESETVAL (0x00000000u)
  24384. #define CSL_CPINTC_POLARITY_REG29_POLARITY_936_MASK (0x00000100u)
  24385. #define CSL_CPINTC_POLARITY_REG29_POLARITY_936_SHIFT (0x00000008u)
  24386. #define CSL_CPINTC_POLARITY_REG29_POLARITY_936_RESETVAL (0x00000000u)
  24387. #define CSL_CPINTC_POLARITY_REG29_POLARITY_937_MASK (0x00000200u)
  24388. #define CSL_CPINTC_POLARITY_REG29_POLARITY_937_SHIFT (0x00000009u)
  24389. #define CSL_CPINTC_POLARITY_REG29_POLARITY_937_RESETVAL (0x00000000u)
  24390. #define CSL_CPINTC_POLARITY_REG29_POLARITY_938_MASK (0x00000400u)
  24391. #define CSL_CPINTC_POLARITY_REG29_POLARITY_938_SHIFT (0x0000000Au)
  24392. #define CSL_CPINTC_POLARITY_REG29_POLARITY_938_RESETVAL (0x00000000u)
  24393. #define CSL_CPINTC_POLARITY_REG29_POLARITY_939_MASK (0x00000800u)
  24394. #define CSL_CPINTC_POLARITY_REG29_POLARITY_939_SHIFT (0x0000000Bu)
  24395. #define CSL_CPINTC_POLARITY_REG29_POLARITY_939_RESETVAL (0x00000000u)
  24396. #define CSL_CPINTC_POLARITY_REG29_POLARITY_940_MASK (0x00001000u)
  24397. #define CSL_CPINTC_POLARITY_REG29_POLARITY_940_SHIFT (0x0000000Cu)
  24398. #define CSL_CPINTC_POLARITY_REG29_POLARITY_940_RESETVAL (0x00000000u)
  24399. #define CSL_CPINTC_POLARITY_REG29_POLARITY_941_MASK (0x00002000u)
  24400. #define CSL_CPINTC_POLARITY_REG29_POLARITY_941_SHIFT (0x0000000Du)
  24401. #define CSL_CPINTC_POLARITY_REG29_POLARITY_941_RESETVAL (0x00000000u)
  24402. #define CSL_CPINTC_POLARITY_REG29_POLARITY_942_MASK (0x00004000u)
  24403. #define CSL_CPINTC_POLARITY_REG29_POLARITY_942_SHIFT (0x0000000Eu)
  24404. #define CSL_CPINTC_POLARITY_REG29_POLARITY_942_RESETVAL (0x00000000u)
  24405. #define CSL_CPINTC_POLARITY_REG29_POLARITY_943_MASK (0x00008000u)
  24406. #define CSL_CPINTC_POLARITY_REG29_POLARITY_943_SHIFT (0x0000000Fu)
  24407. #define CSL_CPINTC_POLARITY_REG29_POLARITY_943_RESETVAL (0x00000000u)
  24408. #define CSL_CPINTC_POLARITY_REG29_POLARITY_944_MASK (0x00010000u)
  24409. #define CSL_CPINTC_POLARITY_REG29_POLARITY_944_SHIFT (0x00000010u)
  24410. #define CSL_CPINTC_POLARITY_REG29_POLARITY_944_RESETVAL (0x00000000u)
  24411. #define CSL_CPINTC_POLARITY_REG29_POLARITY_945_MASK (0x00020000u)
  24412. #define CSL_CPINTC_POLARITY_REG29_POLARITY_945_SHIFT (0x00000011u)
  24413. #define CSL_CPINTC_POLARITY_REG29_POLARITY_945_RESETVAL (0x00000000u)
  24414. #define CSL_CPINTC_POLARITY_REG29_POLARITY_946_MASK (0x00040000u)
  24415. #define CSL_CPINTC_POLARITY_REG29_POLARITY_946_SHIFT (0x00000012u)
  24416. #define CSL_CPINTC_POLARITY_REG29_POLARITY_946_RESETVAL (0x00000000u)
  24417. #define CSL_CPINTC_POLARITY_REG29_POLARITY_947_MASK (0x00080000u)
  24418. #define CSL_CPINTC_POLARITY_REG29_POLARITY_947_SHIFT (0x00000013u)
  24419. #define CSL_CPINTC_POLARITY_REG29_POLARITY_947_RESETVAL (0x00000000u)
  24420. #define CSL_CPINTC_POLARITY_REG29_POLARITY_948_MASK (0x00100000u)
  24421. #define CSL_CPINTC_POLARITY_REG29_POLARITY_948_SHIFT (0x00000014u)
  24422. #define CSL_CPINTC_POLARITY_REG29_POLARITY_948_RESETVAL (0x00000000u)
  24423. #define CSL_CPINTC_POLARITY_REG29_POLARITY_949_MASK (0x00200000u)
  24424. #define CSL_CPINTC_POLARITY_REG29_POLARITY_949_SHIFT (0x00000015u)
  24425. #define CSL_CPINTC_POLARITY_REG29_POLARITY_949_RESETVAL (0x00000000u)
  24426. #define CSL_CPINTC_POLARITY_REG29_POLARITY_950_MASK (0x00400000u)
  24427. #define CSL_CPINTC_POLARITY_REG29_POLARITY_950_SHIFT (0x00000016u)
  24428. #define CSL_CPINTC_POLARITY_REG29_POLARITY_950_RESETVAL (0x00000000u)
  24429. #define CSL_CPINTC_POLARITY_REG29_POLARITY_951_MASK (0x00800000u)
  24430. #define CSL_CPINTC_POLARITY_REG29_POLARITY_951_SHIFT (0x00000017u)
  24431. #define CSL_CPINTC_POLARITY_REG29_POLARITY_951_RESETVAL (0x00000000u)
  24432. #define CSL_CPINTC_POLARITY_REG29_POLARITY_952_MASK (0x01000000u)
  24433. #define CSL_CPINTC_POLARITY_REG29_POLARITY_952_SHIFT (0x00000018u)
  24434. #define CSL_CPINTC_POLARITY_REG29_POLARITY_952_RESETVAL (0x00000000u)
  24435. #define CSL_CPINTC_POLARITY_REG29_POLARITY_953_MASK (0x02000000u)
  24436. #define CSL_CPINTC_POLARITY_REG29_POLARITY_953_SHIFT (0x00000019u)
  24437. #define CSL_CPINTC_POLARITY_REG29_POLARITY_953_RESETVAL (0x00000000u)
  24438. #define CSL_CPINTC_POLARITY_REG29_POLARITY_954_MASK (0x04000000u)
  24439. #define CSL_CPINTC_POLARITY_REG29_POLARITY_954_SHIFT (0x0000001Au)
  24440. #define CSL_CPINTC_POLARITY_REG29_POLARITY_954_RESETVAL (0x00000000u)
  24441. #define CSL_CPINTC_POLARITY_REG29_POLARITY_955_MASK (0x08000000u)
  24442. #define CSL_CPINTC_POLARITY_REG29_POLARITY_955_SHIFT (0x0000001Bu)
  24443. #define CSL_CPINTC_POLARITY_REG29_POLARITY_955_RESETVAL (0x00000000u)
  24444. #define CSL_CPINTC_POLARITY_REG29_POLARITY_956_MASK (0x10000000u)
  24445. #define CSL_CPINTC_POLARITY_REG29_POLARITY_956_SHIFT (0x0000001Cu)
  24446. #define CSL_CPINTC_POLARITY_REG29_POLARITY_956_RESETVAL (0x00000000u)
  24447. #define CSL_CPINTC_POLARITY_REG29_POLARITY_957_MASK (0x20000000u)
  24448. #define CSL_CPINTC_POLARITY_REG29_POLARITY_957_SHIFT (0x0000001Du)
  24449. #define CSL_CPINTC_POLARITY_REG29_POLARITY_957_RESETVAL (0x00000000u)
  24450. #define CSL_CPINTC_POLARITY_REG29_POLARITY_958_MASK (0x40000000u)
  24451. #define CSL_CPINTC_POLARITY_REG29_POLARITY_958_SHIFT (0x0000001Eu)
  24452. #define CSL_CPINTC_POLARITY_REG29_POLARITY_958_RESETVAL (0x00000000u)
  24453. #define CSL_CPINTC_POLARITY_REG29_POLARITY_959_MASK (0x80000000u)
  24454. #define CSL_CPINTC_POLARITY_REG29_POLARITY_959_SHIFT (0x0000001Fu)
  24455. #define CSL_CPINTC_POLARITY_REG29_POLARITY_959_RESETVAL (0x00000000u)
  24456. #define CSL_CPINTC_POLARITY_REG29_RESETVAL (0x00000000u)
  24457. /* polarity_reg30 */
  24458. #define CSL_CPINTC_POLARITY_REG30_POLARITY_960_MASK (0x00000001u)
  24459. #define CSL_CPINTC_POLARITY_REG30_POLARITY_960_SHIFT (0x00000000u)
  24460. #define CSL_CPINTC_POLARITY_REG30_POLARITY_960_RESETVAL (0x00000000u)
  24461. #define CSL_CPINTC_POLARITY_REG30_POLARITY_961_MASK (0x00000002u)
  24462. #define CSL_CPINTC_POLARITY_REG30_POLARITY_961_SHIFT (0x00000001u)
  24463. #define CSL_CPINTC_POLARITY_REG30_POLARITY_961_RESETVAL (0x00000000u)
  24464. #define CSL_CPINTC_POLARITY_REG30_POLARITY_962_MASK (0x00000004u)
  24465. #define CSL_CPINTC_POLARITY_REG30_POLARITY_962_SHIFT (0x00000002u)
  24466. #define CSL_CPINTC_POLARITY_REG30_POLARITY_962_RESETVAL (0x00000000u)
  24467. #define CSL_CPINTC_POLARITY_REG30_POLARITY_963_MASK (0x00000008u)
  24468. #define CSL_CPINTC_POLARITY_REG30_POLARITY_963_SHIFT (0x00000003u)
  24469. #define CSL_CPINTC_POLARITY_REG30_POLARITY_963_RESETVAL (0x00000000u)
  24470. #define CSL_CPINTC_POLARITY_REG30_POLARITY_964_MASK (0x00000010u)
  24471. #define CSL_CPINTC_POLARITY_REG30_POLARITY_964_SHIFT (0x00000004u)
  24472. #define CSL_CPINTC_POLARITY_REG30_POLARITY_964_RESETVAL (0x00000000u)
  24473. #define CSL_CPINTC_POLARITY_REG30_POLARITY_965_MASK (0x00000020u)
  24474. #define CSL_CPINTC_POLARITY_REG30_POLARITY_965_SHIFT (0x00000005u)
  24475. #define CSL_CPINTC_POLARITY_REG30_POLARITY_965_RESETVAL (0x00000000u)
  24476. #define CSL_CPINTC_POLARITY_REG30_POLARITY_966_MASK (0x00000040u)
  24477. #define CSL_CPINTC_POLARITY_REG30_POLARITY_966_SHIFT (0x00000006u)
  24478. #define CSL_CPINTC_POLARITY_REG30_POLARITY_966_RESETVAL (0x00000000u)
  24479. #define CSL_CPINTC_POLARITY_REG30_POLARITY_967_MASK (0x00000080u)
  24480. #define CSL_CPINTC_POLARITY_REG30_POLARITY_967_SHIFT (0x00000007u)
  24481. #define CSL_CPINTC_POLARITY_REG30_POLARITY_967_RESETVAL (0x00000000u)
  24482. #define CSL_CPINTC_POLARITY_REG30_POLARITY_968_MASK (0x00000100u)
  24483. #define CSL_CPINTC_POLARITY_REG30_POLARITY_968_SHIFT (0x00000008u)
  24484. #define CSL_CPINTC_POLARITY_REG30_POLARITY_968_RESETVAL (0x00000000u)
  24485. #define CSL_CPINTC_POLARITY_REG30_POLARITY_969_MASK (0x00000200u)
  24486. #define CSL_CPINTC_POLARITY_REG30_POLARITY_969_SHIFT (0x00000009u)
  24487. #define CSL_CPINTC_POLARITY_REG30_POLARITY_969_RESETVAL (0x00000000u)
  24488. #define CSL_CPINTC_POLARITY_REG30_POLARITY_970_MASK (0x00000400u)
  24489. #define CSL_CPINTC_POLARITY_REG30_POLARITY_970_SHIFT (0x0000000Au)
  24490. #define CSL_CPINTC_POLARITY_REG30_POLARITY_970_RESETVAL (0x00000000u)
  24491. #define CSL_CPINTC_POLARITY_REG30_POLARITY_971_MASK (0x00000800u)
  24492. #define CSL_CPINTC_POLARITY_REG30_POLARITY_971_SHIFT (0x0000000Bu)
  24493. #define CSL_CPINTC_POLARITY_REG30_POLARITY_971_RESETVAL (0x00000000u)
  24494. #define CSL_CPINTC_POLARITY_REG30_POLARITY_972_MASK (0x00001000u)
  24495. #define CSL_CPINTC_POLARITY_REG30_POLARITY_972_SHIFT (0x0000000Cu)
  24496. #define CSL_CPINTC_POLARITY_REG30_POLARITY_972_RESETVAL (0x00000000u)
  24497. #define CSL_CPINTC_POLARITY_REG30_POLARITY_973_MASK (0x00002000u)
  24498. #define CSL_CPINTC_POLARITY_REG30_POLARITY_973_SHIFT (0x0000000Du)
  24499. #define CSL_CPINTC_POLARITY_REG30_POLARITY_973_RESETVAL (0x00000000u)
  24500. #define CSL_CPINTC_POLARITY_REG30_POLARITY_974_MASK (0x00004000u)
  24501. #define CSL_CPINTC_POLARITY_REG30_POLARITY_974_SHIFT (0x0000000Eu)
  24502. #define CSL_CPINTC_POLARITY_REG30_POLARITY_974_RESETVAL (0x00000000u)
  24503. #define CSL_CPINTC_POLARITY_REG30_POLARITY_975_MASK (0x00008000u)
  24504. #define CSL_CPINTC_POLARITY_REG30_POLARITY_975_SHIFT (0x0000000Fu)
  24505. #define CSL_CPINTC_POLARITY_REG30_POLARITY_975_RESETVAL (0x00000000u)
  24506. #define CSL_CPINTC_POLARITY_REG30_POLARITY_976_MASK (0x00010000u)
  24507. #define CSL_CPINTC_POLARITY_REG30_POLARITY_976_SHIFT (0x00000010u)
  24508. #define CSL_CPINTC_POLARITY_REG30_POLARITY_976_RESETVAL (0x00000000u)
  24509. #define CSL_CPINTC_POLARITY_REG30_POLARITY_977_MASK (0x00020000u)
  24510. #define CSL_CPINTC_POLARITY_REG30_POLARITY_977_SHIFT (0x00000011u)
  24511. #define CSL_CPINTC_POLARITY_REG30_POLARITY_977_RESETVAL (0x00000000u)
  24512. #define CSL_CPINTC_POLARITY_REG30_POLARITY_978_MASK (0x00040000u)
  24513. #define CSL_CPINTC_POLARITY_REG30_POLARITY_978_SHIFT (0x00000012u)
  24514. #define CSL_CPINTC_POLARITY_REG30_POLARITY_978_RESETVAL (0x00000000u)
  24515. #define CSL_CPINTC_POLARITY_REG30_POLARITY_979_MASK (0x00080000u)
  24516. #define CSL_CPINTC_POLARITY_REG30_POLARITY_979_SHIFT (0x00000013u)
  24517. #define CSL_CPINTC_POLARITY_REG30_POLARITY_979_RESETVAL (0x00000000u)
  24518. #define CSL_CPINTC_POLARITY_REG30_POLARITY_980_MASK (0x00100000u)
  24519. #define CSL_CPINTC_POLARITY_REG30_POLARITY_980_SHIFT (0x00000014u)
  24520. #define CSL_CPINTC_POLARITY_REG30_POLARITY_980_RESETVAL (0x00000000u)
  24521. #define CSL_CPINTC_POLARITY_REG30_POLARITY_981_MASK (0x00200000u)
  24522. #define CSL_CPINTC_POLARITY_REG30_POLARITY_981_SHIFT (0x00000015u)
  24523. #define CSL_CPINTC_POLARITY_REG30_POLARITY_981_RESETVAL (0x00000000u)
  24524. #define CSL_CPINTC_POLARITY_REG30_POLARITY_982_MASK (0x00400000u)
  24525. #define CSL_CPINTC_POLARITY_REG30_POLARITY_982_SHIFT (0x00000016u)
  24526. #define CSL_CPINTC_POLARITY_REG30_POLARITY_982_RESETVAL (0x00000000u)
  24527. #define CSL_CPINTC_POLARITY_REG30_POLARITY_983_MASK (0x00800000u)
  24528. #define CSL_CPINTC_POLARITY_REG30_POLARITY_983_SHIFT (0x00000017u)
  24529. #define CSL_CPINTC_POLARITY_REG30_POLARITY_983_RESETVAL (0x00000000u)
  24530. #define CSL_CPINTC_POLARITY_REG30_POLARITY_984_MASK (0x01000000u)
  24531. #define CSL_CPINTC_POLARITY_REG30_POLARITY_984_SHIFT (0x00000018u)
  24532. #define CSL_CPINTC_POLARITY_REG30_POLARITY_984_RESETVAL (0x00000000u)
  24533. #define CSL_CPINTC_POLARITY_REG30_POLARITY_985_MASK (0x02000000u)
  24534. #define CSL_CPINTC_POLARITY_REG30_POLARITY_985_SHIFT (0x00000019u)
  24535. #define CSL_CPINTC_POLARITY_REG30_POLARITY_985_RESETVAL (0x00000000u)
  24536. #define CSL_CPINTC_POLARITY_REG30_POLARITY_986_MASK (0x04000000u)
  24537. #define CSL_CPINTC_POLARITY_REG30_POLARITY_986_SHIFT (0x0000001Au)
  24538. #define CSL_CPINTC_POLARITY_REG30_POLARITY_986_RESETVAL (0x00000000u)
  24539. #define CSL_CPINTC_POLARITY_REG30_POLARITY_987_MASK (0x08000000u)
  24540. #define CSL_CPINTC_POLARITY_REG30_POLARITY_987_SHIFT (0x0000001Bu)
  24541. #define CSL_CPINTC_POLARITY_REG30_POLARITY_987_RESETVAL (0x00000000u)
  24542. #define CSL_CPINTC_POLARITY_REG30_POLARITY_988_MASK (0x10000000u)
  24543. #define CSL_CPINTC_POLARITY_REG30_POLARITY_988_SHIFT (0x0000001Cu)
  24544. #define CSL_CPINTC_POLARITY_REG30_POLARITY_988_RESETVAL (0x00000000u)
  24545. #define CSL_CPINTC_POLARITY_REG30_POLARITY_989_MASK (0x20000000u)
  24546. #define CSL_CPINTC_POLARITY_REG30_POLARITY_989_SHIFT (0x0000001Du)
  24547. #define CSL_CPINTC_POLARITY_REG30_POLARITY_989_RESETVAL (0x00000000u)
  24548. #define CSL_CPINTC_POLARITY_REG30_POLARITY_990_MASK (0x40000000u)
  24549. #define CSL_CPINTC_POLARITY_REG30_POLARITY_990_SHIFT (0x0000001Eu)
  24550. #define CSL_CPINTC_POLARITY_REG30_POLARITY_990_RESETVAL (0x00000000u)
  24551. #define CSL_CPINTC_POLARITY_REG30_POLARITY_991_MASK (0x80000000u)
  24552. #define CSL_CPINTC_POLARITY_REG30_POLARITY_991_SHIFT (0x0000001Fu)
  24553. #define CSL_CPINTC_POLARITY_REG30_POLARITY_991_RESETVAL (0x00000000u)
  24554. #define CSL_CPINTC_POLARITY_REG30_RESETVAL (0x00000000u)
  24555. /* polarity_reg31 */
  24556. #define CSL_CPINTC_POLARITY_REG31_POLARITY_992_MASK (0x00000001u)
  24557. #define CSL_CPINTC_POLARITY_REG31_POLARITY_992_SHIFT (0x00000000u)
  24558. #define CSL_CPINTC_POLARITY_REG31_POLARITY_992_RESETVAL (0x00000000u)
  24559. #define CSL_CPINTC_POLARITY_REG31_POLARITY_993_MASK (0x00000002u)
  24560. #define CSL_CPINTC_POLARITY_REG31_POLARITY_993_SHIFT (0x00000001u)
  24561. #define CSL_CPINTC_POLARITY_REG31_POLARITY_993_RESETVAL (0x00000000u)
  24562. #define CSL_CPINTC_POLARITY_REG31_POLARITY_994_MASK (0x00000004u)
  24563. #define CSL_CPINTC_POLARITY_REG31_POLARITY_994_SHIFT (0x00000002u)
  24564. #define CSL_CPINTC_POLARITY_REG31_POLARITY_994_RESETVAL (0x00000000u)
  24565. #define CSL_CPINTC_POLARITY_REG31_POLARITY_995_MASK (0x00000008u)
  24566. #define CSL_CPINTC_POLARITY_REG31_POLARITY_995_SHIFT (0x00000003u)
  24567. #define CSL_CPINTC_POLARITY_REG31_POLARITY_995_RESETVAL (0x00000000u)
  24568. #define CSL_CPINTC_POLARITY_REG31_POLARITY_996_MASK (0x00000010u)
  24569. #define CSL_CPINTC_POLARITY_REG31_POLARITY_996_SHIFT (0x00000004u)
  24570. #define CSL_CPINTC_POLARITY_REG31_POLARITY_996_RESETVAL (0x00000000u)
  24571. #define CSL_CPINTC_POLARITY_REG31_POLARITY_997_MASK (0x00000020u)
  24572. #define CSL_CPINTC_POLARITY_REG31_POLARITY_997_SHIFT (0x00000005u)
  24573. #define CSL_CPINTC_POLARITY_REG31_POLARITY_997_RESETVAL (0x00000000u)
  24574. #define CSL_CPINTC_POLARITY_REG31_POLARITY_998_MASK (0x00000040u)
  24575. #define CSL_CPINTC_POLARITY_REG31_POLARITY_998_SHIFT (0x00000006u)
  24576. #define CSL_CPINTC_POLARITY_REG31_POLARITY_998_RESETVAL (0x00000000u)
  24577. #define CSL_CPINTC_POLARITY_REG31_POLARITY_999_MASK (0x00000080u)
  24578. #define CSL_CPINTC_POLARITY_REG31_POLARITY_999_SHIFT (0x00000007u)
  24579. #define CSL_CPINTC_POLARITY_REG31_POLARITY_999_RESETVAL (0x00000000u)
  24580. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1000_MASK (0x00000100u)
  24581. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1000_SHIFT (0x00000008u)
  24582. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1000_RESETVAL (0x00000000u)
  24583. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1001_MASK (0x00000200u)
  24584. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1001_SHIFT (0x00000009u)
  24585. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1001_RESETVAL (0x00000000u)
  24586. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1002_MASK (0x00000400u)
  24587. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1002_SHIFT (0x0000000Au)
  24588. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1002_RESETVAL (0x00000000u)
  24589. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1003_MASK (0x00000800u)
  24590. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1003_SHIFT (0x0000000Bu)
  24591. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1003_RESETVAL (0x00000000u)
  24592. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1004_MASK (0x00001000u)
  24593. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1004_SHIFT (0x0000000Cu)
  24594. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1004_RESETVAL (0x00000000u)
  24595. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1005_MASK (0x00002000u)
  24596. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1005_SHIFT (0x0000000Du)
  24597. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1005_RESETVAL (0x00000000u)
  24598. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1006_MASK (0x00004000u)
  24599. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1006_SHIFT (0x0000000Eu)
  24600. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1006_RESETVAL (0x00000000u)
  24601. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1007_MASK (0x00008000u)
  24602. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1007_SHIFT (0x0000000Fu)
  24603. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1007_RESETVAL (0x00000000u)
  24604. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1008_MASK (0x00010000u)
  24605. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1008_SHIFT (0x00000010u)
  24606. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1008_RESETVAL (0x00000000u)
  24607. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1009_MASK (0x00020000u)
  24608. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1009_SHIFT (0x00000011u)
  24609. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1009_RESETVAL (0x00000000u)
  24610. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1010_MASK (0x00040000u)
  24611. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1010_SHIFT (0x00000012u)
  24612. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1010_RESETVAL (0x00000000u)
  24613. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1011_MASK (0x00080000u)
  24614. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1011_SHIFT (0x00000013u)
  24615. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1011_RESETVAL (0x00000000u)
  24616. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1012_MASK (0x00100000u)
  24617. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1012_SHIFT (0x00000014u)
  24618. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1012_RESETVAL (0x00000000u)
  24619. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1013_MASK (0x00200000u)
  24620. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1013_SHIFT (0x00000015u)
  24621. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1013_RESETVAL (0x00000000u)
  24622. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1014_MASK (0x00400000u)
  24623. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1014_SHIFT (0x00000016u)
  24624. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1014_RESETVAL (0x00000000u)
  24625. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1015_MASK (0x00800000u)
  24626. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1015_SHIFT (0x00000017u)
  24627. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1015_RESETVAL (0x00000000u)
  24628. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1016_MASK (0x01000000u)
  24629. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1016_SHIFT (0x00000018u)
  24630. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1016_RESETVAL (0x00000000u)
  24631. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1017_MASK (0x02000000u)
  24632. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1017_SHIFT (0x00000019u)
  24633. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1017_RESETVAL (0x00000000u)
  24634. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1018_MASK (0x04000000u)
  24635. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1018_SHIFT (0x0000001Au)
  24636. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1018_RESETVAL (0x00000000u)
  24637. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1019_MASK (0x08000000u)
  24638. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1019_SHIFT (0x0000001Bu)
  24639. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1019_RESETVAL (0x00000000u)
  24640. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1020_MASK (0x10000000u)
  24641. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1020_SHIFT (0x0000001Cu)
  24642. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1020_RESETVAL (0x00000000u)
  24643. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1021_MASK (0x20000000u)
  24644. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1021_SHIFT (0x0000001Du)
  24645. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1021_RESETVAL (0x00000000u)
  24646. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1022_MASK (0x40000000u)
  24647. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1022_SHIFT (0x0000001Eu)
  24648. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1022_RESETVAL (0x00000000u)
  24649. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1023_MASK (0x80000000u)
  24650. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1023_SHIFT (0x0000001Fu)
  24651. #define CSL_CPINTC_POLARITY_REG31_POLARITY_1023_RESETVAL (0x00000000u)
  24652. #define CSL_CPINTC_POLARITY_REG31_RESETVAL (0x00000000u)
  24653. /* type_reg0 */
  24654. #define CSL_CPINTC_TYPE_REG0_TYPE_0_MASK (0x00000001u)
  24655. #define CSL_CPINTC_TYPE_REG0_TYPE_0_SHIFT (0x00000000u)
  24656. #define CSL_CPINTC_TYPE_REG0_TYPE_0_RESETVAL (0x00000000u)
  24657. #define CSL_CPINTC_TYPE_REG0_TYPE_1_MASK (0x00000002u)
  24658. #define CSL_CPINTC_TYPE_REG0_TYPE_1_SHIFT (0x00000001u)
  24659. #define CSL_CPINTC_TYPE_REG0_TYPE_1_RESETVAL (0x00000000u)
  24660. #define CSL_CPINTC_TYPE_REG0_TYPE_2_MASK (0x00000004u)
  24661. #define CSL_CPINTC_TYPE_REG0_TYPE_2_SHIFT (0x00000002u)
  24662. #define CSL_CPINTC_TYPE_REG0_TYPE_2_RESETVAL (0x00000000u)
  24663. #define CSL_CPINTC_TYPE_REG0_TYPE_3_MASK (0x00000008u)
  24664. #define CSL_CPINTC_TYPE_REG0_TYPE_3_SHIFT (0x00000003u)
  24665. #define CSL_CPINTC_TYPE_REG0_TYPE_3_RESETVAL (0x00000000u)
  24666. #define CSL_CPINTC_TYPE_REG0_TYPE_4_MASK (0x00000010u)
  24667. #define CSL_CPINTC_TYPE_REG0_TYPE_4_SHIFT (0x00000004u)
  24668. #define CSL_CPINTC_TYPE_REG0_TYPE_4_RESETVAL (0x00000000u)
  24669. #define CSL_CPINTC_TYPE_REG0_TYPE_5_MASK (0x00000020u)
  24670. #define CSL_CPINTC_TYPE_REG0_TYPE_5_SHIFT (0x00000005u)
  24671. #define CSL_CPINTC_TYPE_REG0_TYPE_5_RESETVAL (0x00000000u)
  24672. #define CSL_CPINTC_TYPE_REG0_TYPE_6_MASK (0x00000040u)
  24673. #define CSL_CPINTC_TYPE_REG0_TYPE_6_SHIFT (0x00000006u)
  24674. #define CSL_CPINTC_TYPE_REG0_TYPE_6_RESETVAL (0x00000000u)
  24675. #define CSL_CPINTC_TYPE_REG0_TYPE_7_MASK (0x00000080u)
  24676. #define CSL_CPINTC_TYPE_REG0_TYPE_7_SHIFT (0x00000007u)
  24677. #define CSL_CPINTC_TYPE_REG0_TYPE_7_RESETVAL (0x00000000u)
  24678. #define CSL_CPINTC_TYPE_REG0_TYPE_8_MASK (0x00000100u)
  24679. #define CSL_CPINTC_TYPE_REG0_TYPE_8_SHIFT (0x00000008u)
  24680. #define CSL_CPINTC_TYPE_REG0_TYPE_8_RESETVAL (0x00000000u)
  24681. #define CSL_CPINTC_TYPE_REG0_TYPE_9_MASK (0x00000200u)
  24682. #define CSL_CPINTC_TYPE_REG0_TYPE_9_SHIFT (0x00000009u)
  24683. #define CSL_CPINTC_TYPE_REG0_TYPE_9_RESETVAL (0x00000000u)
  24684. #define CSL_CPINTC_TYPE_REG0_TYPE_10_MASK (0x00000400u)
  24685. #define CSL_CPINTC_TYPE_REG0_TYPE_10_SHIFT (0x0000000Au)
  24686. #define CSL_CPINTC_TYPE_REG0_TYPE_10_RESETVAL (0x00000000u)
  24687. #define CSL_CPINTC_TYPE_REG0_TYPE_11_MASK (0x00000800u)
  24688. #define CSL_CPINTC_TYPE_REG0_TYPE_11_SHIFT (0x0000000Bu)
  24689. #define CSL_CPINTC_TYPE_REG0_TYPE_11_RESETVAL (0x00000000u)
  24690. #define CSL_CPINTC_TYPE_REG0_TYPE_12_MASK (0x00001000u)
  24691. #define CSL_CPINTC_TYPE_REG0_TYPE_12_SHIFT (0x0000000Cu)
  24692. #define CSL_CPINTC_TYPE_REG0_TYPE_12_RESETVAL (0x00000000u)
  24693. #define CSL_CPINTC_TYPE_REG0_TYPE_13_MASK (0x00002000u)
  24694. #define CSL_CPINTC_TYPE_REG0_TYPE_13_SHIFT (0x0000000Du)
  24695. #define CSL_CPINTC_TYPE_REG0_TYPE_13_RESETVAL (0x00000000u)
  24696. #define CSL_CPINTC_TYPE_REG0_TYPE_14_MASK (0x00004000u)
  24697. #define CSL_CPINTC_TYPE_REG0_TYPE_14_SHIFT (0x0000000Eu)
  24698. #define CSL_CPINTC_TYPE_REG0_TYPE_14_RESETVAL (0x00000000u)
  24699. #define CSL_CPINTC_TYPE_REG0_TYPE_15_MASK (0x00008000u)
  24700. #define CSL_CPINTC_TYPE_REG0_TYPE_15_SHIFT (0x0000000Fu)
  24701. #define CSL_CPINTC_TYPE_REG0_TYPE_15_RESETVAL (0x00000000u)
  24702. #define CSL_CPINTC_TYPE_REG0_TYPE_16_MASK (0x00010000u)
  24703. #define CSL_CPINTC_TYPE_REG0_TYPE_16_SHIFT (0x00000010u)
  24704. #define CSL_CPINTC_TYPE_REG0_TYPE_16_RESETVAL (0x00000000u)
  24705. #define CSL_CPINTC_TYPE_REG0_TYPE_17_MASK (0x00020000u)
  24706. #define CSL_CPINTC_TYPE_REG0_TYPE_17_SHIFT (0x00000011u)
  24707. #define CSL_CPINTC_TYPE_REG0_TYPE_17_RESETVAL (0x00000000u)
  24708. #define CSL_CPINTC_TYPE_REG0_TYPE_18_MASK (0x00040000u)
  24709. #define CSL_CPINTC_TYPE_REG0_TYPE_18_SHIFT (0x00000012u)
  24710. #define CSL_CPINTC_TYPE_REG0_TYPE_18_RESETVAL (0x00000000u)
  24711. #define CSL_CPINTC_TYPE_REG0_TYPE_19_MASK (0x00080000u)
  24712. #define CSL_CPINTC_TYPE_REG0_TYPE_19_SHIFT (0x00000013u)
  24713. #define CSL_CPINTC_TYPE_REG0_TYPE_19_RESETVAL (0x00000000u)
  24714. #define CSL_CPINTC_TYPE_REG0_TYPE_20_MASK (0x00100000u)
  24715. #define CSL_CPINTC_TYPE_REG0_TYPE_20_SHIFT (0x00000014u)
  24716. #define CSL_CPINTC_TYPE_REG0_TYPE_20_RESETVAL (0x00000000u)
  24717. #define CSL_CPINTC_TYPE_REG0_TYPE_21_MASK (0x00200000u)
  24718. #define CSL_CPINTC_TYPE_REG0_TYPE_21_SHIFT (0x00000015u)
  24719. #define CSL_CPINTC_TYPE_REG0_TYPE_21_RESETVAL (0x00000000u)
  24720. #define CSL_CPINTC_TYPE_REG0_TYPE_22_MASK (0x00400000u)
  24721. #define CSL_CPINTC_TYPE_REG0_TYPE_22_SHIFT (0x00000016u)
  24722. #define CSL_CPINTC_TYPE_REG0_TYPE_22_RESETVAL (0x00000000u)
  24723. #define CSL_CPINTC_TYPE_REG0_TYPE_23_MASK (0x00800000u)
  24724. #define CSL_CPINTC_TYPE_REG0_TYPE_23_SHIFT (0x00000017u)
  24725. #define CSL_CPINTC_TYPE_REG0_TYPE_23_RESETVAL (0x00000000u)
  24726. #define CSL_CPINTC_TYPE_REG0_TYPE_24_MASK (0x01000000u)
  24727. #define CSL_CPINTC_TYPE_REG0_TYPE_24_SHIFT (0x00000018u)
  24728. #define CSL_CPINTC_TYPE_REG0_TYPE_24_RESETVAL (0x00000000u)
  24729. #define CSL_CPINTC_TYPE_REG0_TYPE_25_MASK (0x02000000u)
  24730. #define CSL_CPINTC_TYPE_REG0_TYPE_25_SHIFT (0x00000019u)
  24731. #define CSL_CPINTC_TYPE_REG0_TYPE_25_RESETVAL (0x00000000u)
  24732. #define CSL_CPINTC_TYPE_REG0_TYPE_26_MASK (0x04000000u)
  24733. #define CSL_CPINTC_TYPE_REG0_TYPE_26_SHIFT (0x0000001Au)
  24734. #define CSL_CPINTC_TYPE_REG0_TYPE_26_RESETVAL (0x00000000u)
  24735. #define CSL_CPINTC_TYPE_REG0_TYPE_27_MASK (0x08000000u)
  24736. #define CSL_CPINTC_TYPE_REG0_TYPE_27_SHIFT (0x0000001Bu)
  24737. #define CSL_CPINTC_TYPE_REG0_TYPE_27_RESETVAL (0x00000000u)
  24738. #define CSL_CPINTC_TYPE_REG0_TYPE_28_MASK (0x10000000u)
  24739. #define CSL_CPINTC_TYPE_REG0_TYPE_28_SHIFT (0x0000001Cu)
  24740. #define CSL_CPINTC_TYPE_REG0_TYPE_28_RESETVAL (0x00000000u)
  24741. #define CSL_CPINTC_TYPE_REG0_TYPE_29_MASK (0x20000000u)
  24742. #define CSL_CPINTC_TYPE_REG0_TYPE_29_SHIFT (0x0000001Du)
  24743. #define CSL_CPINTC_TYPE_REG0_TYPE_29_RESETVAL (0x00000000u)
  24744. #define CSL_CPINTC_TYPE_REG0_TYPE_30_MASK (0x40000000u)
  24745. #define CSL_CPINTC_TYPE_REG0_TYPE_30_SHIFT (0x0000001Eu)
  24746. #define CSL_CPINTC_TYPE_REG0_TYPE_30_RESETVAL (0x00000000u)
  24747. #define CSL_CPINTC_TYPE_REG0_TYPE_31_MASK (0x80000000u)
  24748. #define CSL_CPINTC_TYPE_REG0_TYPE_31_SHIFT (0x0000001Fu)
  24749. #define CSL_CPINTC_TYPE_REG0_TYPE_31_RESETVAL (0x00000000u)
  24750. #define CSL_CPINTC_TYPE_REG0_RESETVAL (0x00000000u)
  24751. /* type_reg1 */
  24752. #define CSL_CPINTC_TYPE_REG1_TYPE_32_MASK (0x00000001u)
  24753. #define CSL_CPINTC_TYPE_REG1_TYPE_32_SHIFT (0x00000000u)
  24754. #define CSL_CPINTC_TYPE_REG1_TYPE_32_RESETVAL (0x00000000u)
  24755. #define CSL_CPINTC_TYPE_REG1_TYPE_33_MASK (0x00000002u)
  24756. #define CSL_CPINTC_TYPE_REG1_TYPE_33_SHIFT (0x00000001u)
  24757. #define CSL_CPINTC_TYPE_REG1_TYPE_33_RESETVAL (0x00000000u)
  24758. #define CSL_CPINTC_TYPE_REG1_TYPE_34_MASK (0x00000004u)
  24759. #define CSL_CPINTC_TYPE_REG1_TYPE_34_SHIFT (0x00000002u)
  24760. #define CSL_CPINTC_TYPE_REG1_TYPE_34_RESETVAL (0x00000000u)
  24761. #define CSL_CPINTC_TYPE_REG1_TYPE_35_MASK (0x00000008u)
  24762. #define CSL_CPINTC_TYPE_REG1_TYPE_35_SHIFT (0x00000003u)
  24763. #define CSL_CPINTC_TYPE_REG1_TYPE_35_RESETVAL (0x00000000u)
  24764. #define CSL_CPINTC_TYPE_REG1_TYPE_36_MASK (0x00000010u)
  24765. #define CSL_CPINTC_TYPE_REG1_TYPE_36_SHIFT (0x00000004u)
  24766. #define CSL_CPINTC_TYPE_REG1_TYPE_36_RESETVAL (0x00000000u)
  24767. #define CSL_CPINTC_TYPE_REG1_TYPE_37_MASK (0x00000020u)
  24768. #define CSL_CPINTC_TYPE_REG1_TYPE_37_SHIFT (0x00000005u)
  24769. #define CSL_CPINTC_TYPE_REG1_TYPE_37_RESETVAL (0x00000000u)
  24770. #define CSL_CPINTC_TYPE_REG1_TYPE_38_MASK (0x00000040u)
  24771. #define CSL_CPINTC_TYPE_REG1_TYPE_38_SHIFT (0x00000006u)
  24772. #define CSL_CPINTC_TYPE_REG1_TYPE_38_RESETVAL (0x00000000u)
  24773. #define CSL_CPINTC_TYPE_REG1_TYPE_39_MASK (0x00000080u)
  24774. #define CSL_CPINTC_TYPE_REG1_TYPE_39_SHIFT (0x00000007u)
  24775. #define CSL_CPINTC_TYPE_REG1_TYPE_39_RESETVAL (0x00000000u)
  24776. #define CSL_CPINTC_TYPE_REG1_TYPE_40_MASK (0x00000100u)
  24777. #define CSL_CPINTC_TYPE_REG1_TYPE_40_SHIFT (0x00000008u)
  24778. #define CSL_CPINTC_TYPE_REG1_TYPE_40_RESETVAL (0x00000000u)
  24779. #define CSL_CPINTC_TYPE_REG1_TYPE_41_MASK (0x00000200u)
  24780. #define CSL_CPINTC_TYPE_REG1_TYPE_41_SHIFT (0x00000009u)
  24781. #define CSL_CPINTC_TYPE_REG1_TYPE_41_RESETVAL (0x00000000u)
  24782. #define CSL_CPINTC_TYPE_REG1_TYPE_42_MASK (0x00000400u)
  24783. #define CSL_CPINTC_TYPE_REG1_TYPE_42_SHIFT (0x0000000Au)
  24784. #define CSL_CPINTC_TYPE_REG1_TYPE_42_RESETVAL (0x00000000u)
  24785. #define CSL_CPINTC_TYPE_REG1_TYPE_43_MASK (0x00000800u)
  24786. #define CSL_CPINTC_TYPE_REG1_TYPE_43_SHIFT (0x0000000Bu)
  24787. #define CSL_CPINTC_TYPE_REG1_TYPE_43_RESETVAL (0x00000000u)
  24788. #define CSL_CPINTC_TYPE_REG1_TYPE_44_MASK (0x00001000u)
  24789. #define CSL_CPINTC_TYPE_REG1_TYPE_44_SHIFT (0x0000000Cu)
  24790. #define CSL_CPINTC_TYPE_REG1_TYPE_44_RESETVAL (0x00000000u)
  24791. #define CSL_CPINTC_TYPE_REG1_TYPE_45_MASK (0x00002000u)
  24792. #define CSL_CPINTC_TYPE_REG1_TYPE_45_SHIFT (0x0000000Du)
  24793. #define CSL_CPINTC_TYPE_REG1_TYPE_45_RESETVAL (0x00000000u)
  24794. #define CSL_CPINTC_TYPE_REG1_TYPE_46_MASK (0x00004000u)
  24795. #define CSL_CPINTC_TYPE_REG1_TYPE_46_SHIFT (0x0000000Eu)
  24796. #define CSL_CPINTC_TYPE_REG1_TYPE_46_RESETVAL (0x00000000u)
  24797. #define CSL_CPINTC_TYPE_REG1_TYPE_47_MASK (0x00008000u)
  24798. #define CSL_CPINTC_TYPE_REG1_TYPE_47_SHIFT (0x0000000Fu)
  24799. #define CSL_CPINTC_TYPE_REG1_TYPE_47_RESETVAL (0x00000000u)
  24800. #define CSL_CPINTC_TYPE_REG1_TYPE_48_MASK (0x00010000u)
  24801. #define CSL_CPINTC_TYPE_REG1_TYPE_48_SHIFT (0x00000010u)
  24802. #define CSL_CPINTC_TYPE_REG1_TYPE_48_RESETVAL (0x00000000u)
  24803. #define CSL_CPINTC_TYPE_REG1_TYPE_49_MASK (0x00020000u)
  24804. #define CSL_CPINTC_TYPE_REG1_TYPE_49_SHIFT (0x00000011u)
  24805. #define CSL_CPINTC_TYPE_REG1_TYPE_49_RESETVAL (0x00000000u)
  24806. #define CSL_CPINTC_TYPE_REG1_TYPE_50_MASK (0x00040000u)
  24807. #define CSL_CPINTC_TYPE_REG1_TYPE_50_SHIFT (0x00000012u)
  24808. #define CSL_CPINTC_TYPE_REG1_TYPE_50_RESETVAL (0x00000000u)
  24809. #define CSL_CPINTC_TYPE_REG1_TYPE_51_MASK (0x00080000u)
  24810. #define CSL_CPINTC_TYPE_REG1_TYPE_51_SHIFT (0x00000013u)
  24811. #define CSL_CPINTC_TYPE_REG1_TYPE_51_RESETVAL (0x00000000u)
  24812. #define CSL_CPINTC_TYPE_REG1_TYPE_52_MASK (0x00100000u)
  24813. #define CSL_CPINTC_TYPE_REG1_TYPE_52_SHIFT (0x00000014u)
  24814. #define CSL_CPINTC_TYPE_REG1_TYPE_52_RESETVAL (0x00000000u)
  24815. #define CSL_CPINTC_TYPE_REG1_TYPE_53_MASK (0x00200000u)
  24816. #define CSL_CPINTC_TYPE_REG1_TYPE_53_SHIFT (0x00000015u)
  24817. #define CSL_CPINTC_TYPE_REG1_TYPE_53_RESETVAL (0x00000000u)
  24818. #define CSL_CPINTC_TYPE_REG1_TYPE_54_MASK (0x00400000u)
  24819. #define CSL_CPINTC_TYPE_REG1_TYPE_54_SHIFT (0x00000016u)
  24820. #define CSL_CPINTC_TYPE_REG1_TYPE_54_RESETVAL (0x00000000u)
  24821. #define CSL_CPINTC_TYPE_REG1_TYPE_55_MASK (0x00800000u)
  24822. #define CSL_CPINTC_TYPE_REG1_TYPE_55_SHIFT (0x00000017u)
  24823. #define CSL_CPINTC_TYPE_REG1_TYPE_55_RESETVAL (0x00000000u)
  24824. #define CSL_CPINTC_TYPE_REG1_TYPE_56_MASK (0x01000000u)
  24825. #define CSL_CPINTC_TYPE_REG1_TYPE_56_SHIFT (0x00000018u)
  24826. #define CSL_CPINTC_TYPE_REG1_TYPE_56_RESETVAL (0x00000000u)
  24827. #define CSL_CPINTC_TYPE_REG1_TYPE_57_MASK (0x02000000u)
  24828. #define CSL_CPINTC_TYPE_REG1_TYPE_57_SHIFT (0x00000019u)
  24829. #define CSL_CPINTC_TYPE_REG1_TYPE_57_RESETVAL (0x00000000u)
  24830. #define CSL_CPINTC_TYPE_REG1_TYPE_58_MASK (0x04000000u)
  24831. #define CSL_CPINTC_TYPE_REG1_TYPE_58_SHIFT (0x0000001Au)
  24832. #define CSL_CPINTC_TYPE_REG1_TYPE_58_RESETVAL (0x00000000u)
  24833. #define CSL_CPINTC_TYPE_REG1_TYPE_59_MASK (0x08000000u)
  24834. #define CSL_CPINTC_TYPE_REG1_TYPE_59_SHIFT (0x0000001Bu)
  24835. #define CSL_CPINTC_TYPE_REG1_TYPE_59_RESETVAL (0x00000000u)
  24836. #define CSL_CPINTC_TYPE_REG1_TYPE_60_MASK (0x10000000u)
  24837. #define CSL_CPINTC_TYPE_REG1_TYPE_60_SHIFT (0x0000001Cu)
  24838. #define CSL_CPINTC_TYPE_REG1_TYPE_60_RESETVAL (0x00000000u)
  24839. #define CSL_CPINTC_TYPE_REG1_TYPE_61_MASK (0x20000000u)
  24840. #define CSL_CPINTC_TYPE_REG1_TYPE_61_SHIFT (0x0000001Du)
  24841. #define CSL_CPINTC_TYPE_REG1_TYPE_61_RESETVAL (0x00000000u)
  24842. #define CSL_CPINTC_TYPE_REG1_TYPE_62_MASK (0x40000000u)
  24843. #define CSL_CPINTC_TYPE_REG1_TYPE_62_SHIFT (0x0000001Eu)
  24844. #define CSL_CPINTC_TYPE_REG1_TYPE_62_RESETVAL (0x00000000u)
  24845. #define CSL_CPINTC_TYPE_REG1_TYPE_63_MASK (0x80000000u)
  24846. #define CSL_CPINTC_TYPE_REG1_TYPE_63_SHIFT (0x0000001Fu)
  24847. #define CSL_CPINTC_TYPE_REG1_TYPE_63_RESETVAL (0x00000000u)
  24848. #define CSL_CPINTC_TYPE_REG1_RESETVAL (0x00000000u)
  24849. /* type_reg2 */
  24850. #define CSL_CPINTC_TYPE_REG2_TYPE_64_MASK (0x00000001u)
  24851. #define CSL_CPINTC_TYPE_REG2_TYPE_64_SHIFT (0x00000000u)
  24852. #define CSL_CPINTC_TYPE_REG2_TYPE_64_RESETVAL (0x00000000u)
  24853. #define CSL_CPINTC_TYPE_REG2_TYPE_65_MASK (0x00000002u)
  24854. #define CSL_CPINTC_TYPE_REG2_TYPE_65_SHIFT (0x00000001u)
  24855. #define CSL_CPINTC_TYPE_REG2_TYPE_65_RESETVAL (0x00000000u)
  24856. #define CSL_CPINTC_TYPE_REG2_TYPE_66_MASK (0x00000004u)
  24857. #define CSL_CPINTC_TYPE_REG2_TYPE_66_SHIFT (0x00000002u)
  24858. #define CSL_CPINTC_TYPE_REG2_TYPE_66_RESETVAL (0x00000000u)
  24859. #define CSL_CPINTC_TYPE_REG2_TYPE_67_MASK (0x00000008u)
  24860. #define CSL_CPINTC_TYPE_REG2_TYPE_67_SHIFT (0x00000003u)
  24861. #define CSL_CPINTC_TYPE_REG2_TYPE_67_RESETVAL (0x00000000u)
  24862. #define CSL_CPINTC_TYPE_REG2_TYPE_68_MASK (0x00000010u)
  24863. #define CSL_CPINTC_TYPE_REG2_TYPE_68_SHIFT (0x00000004u)
  24864. #define CSL_CPINTC_TYPE_REG2_TYPE_68_RESETVAL (0x00000000u)
  24865. #define CSL_CPINTC_TYPE_REG2_TYPE_69_MASK (0x00000020u)
  24866. #define CSL_CPINTC_TYPE_REG2_TYPE_69_SHIFT (0x00000005u)
  24867. #define CSL_CPINTC_TYPE_REG2_TYPE_69_RESETVAL (0x00000000u)
  24868. #define CSL_CPINTC_TYPE_REG2_TYPE_70_MASK (0x00000040u)
  24869. #define CSL_CPINTC_TYPE_REG2_TYPE_70_SHIFT (0x00000006u)
  24870. #define CSL_CPINTC_TYPE_REG2_TYPE_70_RESETVAL (0x00000000u)
  24871. #define CSL_CPINTC_TYPE_REG2_TYPE_71_MASK (0x00000080u)
  24872. #define CSL_CPINTC_TYPE_REG2_TYPE_71_SHIFT (0x00000007u)
  24873. #define CSL_CPINTC_TYPE_REG2_TYPE_71_RESETVAL (0x00000000u)
  24874. #define CSL_CPINTC_TYPE_REG2_TYPE_72_MASK (0x00000100u)
  24875. #define CSL_CPINTC_TYPE_REG2_TYPE_72_SHIFT (0x00000008u)
  24876. #define CSL_CPINTC_TYPE_REG2_TYPE_72_RESETVAL (0x00000000u)
  24877. #define CSL_CPINTC_TYPE_REG2_TYPE_73_MASK (0x00000200u)
  24878. #define CSL_CPINTC_TYPE_REG2_TYPE_73_SHIFT (0x00000009u)
  24879. #define CSL_CPINTC_TYPE_REG2_TYPE_73_RESETVAL (0x00000000u)
  24880. #define CSL_CPINTC_TYPE_REG2_TYPE_74_MASK (0x00000400u)
  24881. #define CSL_CPINTC_TYPE_REG2_TYPE_74_SHIFT (0x0000000Au)
  24882. #define CSL_CPINTC_TYPE_REG2_TYPE_74_RESETVAL (0x00000000u)
  24883. #define CSL_CPINTC_TYPE_REG2_TYPE_75_MASK (0x00000800u)
  24884. #define CSL_CPINTC_TYPE_REG2_TYPE_75_SHIFT (0x0000000Bu)
  24885. #define CSL_CPINTC_TYPE_REG2_TYPE_75_RESETVAL (0x00000000u)
  24886. #define CSL_CPINTC_TYPE_REG2_TYPE_76_MASK (0x00001000u)
  24887. #define CSL_CPINTC_TYPE_REG2_TYPE_76_SHIFT (0x0000000Cu)
  24888. #define CSL_CPINTC_TYPE_REG2_TYPE_76_RESETVAL (0x00000000u)
  24889. #define CSL_CPINTC_TYPE_REG2_TYPE_77_MASK (0x00002000u)
  24890. #define CSL_CPINTC_TYPE_REG2_TYPE_77_SHIFT (0x0000000Du)
  24891. #define CSL_CPINTC_TYPE_REG2_TYPE_77_RESETVAL (0x00000000u)
  24892. #define CSL_CPINTC_TYPE_REG2_TYPE_78_MASK (0x00004000u)
  24893. #define CSL_CPINTC_TYPE_REG2_TYPE_78_SHIFT (0x0000000Eu)
  24894. #define CSL_CPINTC_TYPE_REG2_TYPE_78_RESETVAL (0x00000000u)
  24895. #define CSL_CPINTC_TYPE_REG2_TYPE_79_MASK (0x00008000u)
  24896. #define CSL_CPINTC_TYPE_REG2_TYPE_79_SHIFT (0x0000000Fu)
  24897. #define CSL_CPINTC_TYPE_REG2_TYPE_79_RESETVAL (0x00000000u)
  24898. #define CSL_CPINTC_TYPE_REG2_TYPE_80_MASK (0x00010000u)
  24899. #define CSL_CPINTC_TYPE_REG2_TYPE_80_SHIFT (0x00000010u)
  24900. #define CSL_CPINTC_TYPE_REG2_TYPE_80_RESETVAL (0x00000000u)
  24901. #define CSL_CPINTC_TYPE_REG2_TYPE_81_MASK (0x00020000u)
  24902. #define CSL_CPINTC_TYPE_REG2_TYPE_81_SHIFT (0x00000011u)
  24903. #define CSL_CPINTC_TYPE_REG2_TYPE_81_RESETVAL (0x00000000u)
  24904. #define CSL_CPINTC_TYPE_REG2_TYPE_82_MASK (0x00040000u)
  24905. #define CSL_CPINTC_TYPE_REG2_TYPE_82_SHIFT (0x00000012u)
  24906. #define CSL_CPINTC_TYPE_REG2_TYPE_82_RESETVAL (0x00000000u)
  24907. #define CSL_CPINTC_TYPE_REG2_TYPE_83_MASK (0x00080000u)
  24908. #define CSL_CPINTC_TYPE_REG2_TYPE_83_SHIFT (0x00000013u)
  24909. #define CSL_CPINTC_TYPE_REG2_TYPE_83_RESETVAL (0x00000000u)
  24910. #define CSL_CPINTC_TYPE_REG2_TYPE_84_MASK (0x00100000u)
  24911. #define CSL_CPINTC_TYPE_REG2_TYPE_84_SHIFT (0x00000014u)
  24912. #define CSL_CPINTC_TYPE_REG2_TYPE_84_RESETVAL (0x00000000u)
  24913. #define CSL_CPINTC_TYPE_REG2_TYPE_85_MASK (0x00200000u)
  24914. #define CSL_CPINTC_TYPE_REG2_TYPE_85_SHIFT (0x00000015u)
  24915. #define CSL_CPINTC_TYPE_REG2_TYPE_85_RESETVAL (0x00000000u)
  24916. #define CSL_CPINTC_TYPE_REG2_TYPE_86_MASK (0x00400000u)
  24917. #define CSL_CPINTC_TYPE_REG2_TYPE_86_SHIFT (0x00000016u)
  24918. #define CSL_CPINTC_TYPE_REG2_TYPE_86_RESETVAL (0x00000000u)
  24919. #define CSL_CPINTC_TYPE_REG2_TYPE_87_MASK (0x00800000u)
  24920. #define CSL_CPINTC_TYPE_REG2_TYPE_87_SHIFT (0x00000017u)
  24921. #define CSL_CPINTC_TYPE_REG2_TYPE_87_RESETVAL (0x00000000u)
  24922. #define CSL_CPINTC_TYPE_REG2_TYPE_88_MASK (0x01000000u)
  24923. #define CSL_CPINTC_TYPE_REG2_TYPE_88_SHIFT (0x00000018u)
  24924. #define CSL_CPINTC_TYPE_REG2_TYPE_88_RESETVAL (0x00000000u)
  24925. #define CSL_CPINTC_TYPE_REG2_TYPE_89_MASK (0x02000000u)
  24926. #define CSL_CPINTC_TYPE_REG2_TYPE_89_SHIFT (0x00000019u)
  24927. #define CSL_CPINTC_TYPE_REG2_TYPE_89_RESETVAL (0x00000000u)
  24928. #define CSL_CPINTC_TYPE_REG2_TYPE_90_MASK (0x04000000u)
  24929. #define CSL_CPINTC_TYPE_REG2_TYPE_90_SHIFT (0x0000001Au)
  24930. #define CSL_CPINTC_TYPE_REG2_TYPE_90_RESETVAL (0x00000000u)
  24931. #define CSL_CPINTC_TYPE_REG2_TYPE_91_MASK (0x08000000u)
  24932. #define CSL_CPINTC_TYPE_REG2_TYPE_91_SHIFT (0x0000001Bu)
  24933. #define CSL_CPINTC_TYPE_REG2_TYPE_91_RESETVAL (0x00000000u)
  24934. #define CSL_CPINTC_TYPE_REG2_TYPE_92_MASK (0x10000000u)
  24935. #define CSL_CPINTC_TYPE_REG2_TYPE_92_SHIFT (0x0000001Cu)
  24936. #define CSL_CPINTC_TYPE_REG2_TYPE_92_RESETVAL (0x00000000u)
  24937. #define CSL_CPINTC_TYPE_REG2_TYPE_93_MASK (0x20000000u)
  24938. #define CSL_CPINTC_TYPE_REG2_TYPE_93_SHIFT (0x0000001Du)
  24939. #define CSL_CPINTC_TYPE_REG2_TYPE_93_RESETVAL (0x00000000u)
  24940. #define CSL_CPINTC_TYPE_REG2_TYPE_94_MASK (0x40000000u)
  24941. #define CSL_CPINTC_TYPE_REG2_TYPE_94_SHIFT (0x0000001Eu)
  24942. #define CSL_CPINTC_TYPE_REG2_TYPE_94_RESETVAL (0x00000000u)
  24943. #define CSL_CPINTC_TYPE_REG2_TYPE_95_MASK (0x80000000u)
  24944. #define CSL_CPINTC_TYPE_REG2_TYPE_95_SHIFT (0x0000001Fu)
  24945. #define CSL_CPINTC_TYPE_REG2_TYPE_95_RESETVAL (0x00000000u)
  24946. #define CSL_CPINTC_TYPE_REG2_RESETVAL (0x00000000u)
  24947. /* type_reg3 */
  24948. #define CSL_CPINTC_TYPE_REG3_TYPE_96_MASK (0x00000001u)
  24949. #define CSL_CPINTC_TYPE_REG3_TYPE_96_SHIFT (0x00000000u)
  24950. #define CSL_CPINTC_TYPE_REG3_TYPE_96_RESETVAL (0x00000000u)
  24951. #define CSL_CPINTC_TYPE_REG3_TYPE_97_MASK (0x00000002u)
  24952. #define CSL_CPINTC_TYPE_REG3_TYPE_97_SHIFT (0x00000001u)
  24953. #define CSL_CPINTC_TYPE_REG3_TYPE_97_RESETVAL (0x00000000u)
  24954. #define CSL_CPINTC_TYPE_REG3_TYPE_98_MASK (0x00000004u)
  24955. #define CSL_CPINTC_TYPE_REG3_TYPE_98_SHIFT (0x00000002u)
  24956. #define CSL_CPINTC_TYPE_REG3_TYPE_98_RESETVAL (0x00000000u)
  24957. #define CSL_CPINTC_TYPE_REG3_TYPE_99_MASK (0x00000008u)
  24958. #define CSL_CPINTC_TYPE_REG3_TYPE_99_SHIFT (0x00000003u)
  24959. #define CSL_CPINTC_TYPE_REG3_TYPE_99_RESETVAL (0x00000000u)
  24960. #define CSL_CPINTC_TYPE_REG3_TYPE_100_MASK (0x00000010u)
  24961. #define CSL_CPINTC_TYPE_REG3_TYPE_100_SHIFT (0x00000004u)
  24962. #define CSL_CPINTC_TYPE_REG3_TYPE_100_RESETVAL (0x00000000u)
  24963. #define CSL_CPINTC_TYPE_REG3_TYPE_101_MASK (0x00000020u)
  24964. #define CSL_CPINTC_TYPE_REG3_TYPE_101_SHIFT (0x00000005u)
  24965. #define CSL_CPINTC_TYPE_REG3_TYPE_101_RESETVAL (0x00000000u)
  24966. #define CSL_CPINTC_TYPE_REG3_TYPE_102_MASK (0x00000040u)
  24967. #define CSL_CPINTC_TYPE_REG3_TYPE_102_SHIFT (0x00000006u)
  24968. #define CSL_CPINTC_TYPE_REG3_TYPE_102_RESETVAL (0x00000000u)
  24969. #define CSL_CPINTC_TYPE_REG3_TYPE_103_MASK (0x00000080u)
  24970. #define CSL_CPINTC_TYPE_REG3_TYPE_103_SHIFT (0x00000007u)
  24971. #define CSL_CPINTC_TYPE_REG3_TYPE_103_RESETVAL (0x00000000u)
  24972. #define CSL_CPINTC_TYPE_REG3_TYPE_104_MASK (0x00000100u)
  24973. #define CSL_CPINTC_TYPE_REG3_TYPE_104_SHIFT (0x00000008u)
  24974. #define CSL_CPINTC_TYPE_REG3_TYPE_104_RESETVAL (0x00000000u)
  24975. #define CSL_CPINTC_TYPE_REG3_TYPE_105_MASK (0x00000200u)
  24976. #define CSL_CPINTC_TYPE_REG3_TYPE_105_SHIFT (0x00000009u)
  24977. #define CSL_CPINTC_TYPE_REG3_TYPE_105_RESETVAL (0x00000000u)
  24978. #define CSL_CPINTC_TYPE_REG3_TYPE_106_MASK (0x00000400u)
  24979. #define CSL_CPINTC_TYPE_REG3_TYPE_106_SHIFT (0x0000000Au)
  24980. #define CSL_CPINTC_TYPE_REG3_TYPE_106_RESETVAL (0x00000000u)
  24981. #define CSL_CPINTC_TYPE_REG3_TYPE_107_MASK (0x00000800u)
  24982. #define CSL_CPINTC_TYPE_REG3_TYPE_107_SHIFT (0x0000000Bu)
  24983. #define CSL_CPINTC_TYPE_REG3_TYPE_107_RESETVAL (0x00000000u)
  24984. #define CSL_CPINTC_TYPE_REG3_TYPE_108_MASK (0x00001000u)
  24985. #define CSL_CPINTC_TYPE_REG3_TYPE_108_SHIFT (0x0000000Cu)
  24986. #define CSL_CPINTC_TYPE_REG3_TYPE_108_RESETVAL (0x00000000u)
  24987. #define CSL_CPINTC_TYPE_REG3_TYPE_109_MASK (0x00002000u)
  24988. #define CSL_CPINTC_TYPE_REG3_TYPE_109_SHIFT (0x0000000Du)
  24989. #define CSL_CPINTC_TYPE_REG3_TYPE_109_RESETVAL (0x00000000u)
  24990. #define CSL_CPINTC_TYPE_REG3_TYPE_110_MASK (0x00004000u)
  24991. #define CSL_CPINTC_TYPE_REG3_TYPE_110_SHIFT (0x0000000Eu)
  24992. #define CSL_CPINTC_TYPE_REG3_TYPE_110_RESETVAL (0x00000000u)
  24993. #define CSL_CPINTC_TYPE_REG3_TYPE_111_MASK (0x00008000u)
  24994. #define CSL_CPINTC_TYPE_REG3_TYPE_111_SHIFT (0x0000000Fu)
  24995. #define CSL_CPINTC_TYPE_REG3_TYPE_111_RESETVAL (0x00000000u)
  24996. #define CSL_CPINTC_TYPE_REG3_TYPE_112_MASK (0x00010000u)
  24997. #define CSL_CPINTC_TYPE_REG3_TYPE_112_SHIFT (0x00000010u)
  24998. #define CSL_CPINTC_TYPE_REG3_TYPE_112_RESETVAL (0x00000000u)
  24999. #define CSL_CPINTC_TYPE_REG3_TYPE_113_MASK (0x00020000u)
  25000. #define CSL_CPINTC_TYPE_REG3_TYPE_113_SHIFT (0x00000011u)
  25001. #define CSL_CPINTC_TYPE_REG3_TYPE_113_RESETVAL (0x00000000u)
  25002. #define CSL_CPINTC_TYPE_REG3_TYPE_114_MASK (0x00040000u)
  25003. #define CSL_CPINTC_TYPE_REG3_TYPE_114_SHIFT (0x00000012u)
  25004. #define CSL_CPINTC_TYPE_REG3_TYPE_114_RESETVAL (0x00000000u)
  25005. #define CSL_CPINTC_TYPE_REG3_TYPE_115_MASK (0x00080000u)
  25006. #define CSL_CPINTC_TYPE_REG3_TYPE_115_SHIFT (0x00000013u)
  25007. #define CSL_CPINTC_TYPE_REG3_TYPE_115_RESETVAL (0x00000000u)
  25008. #define CSL_CPINTC_TYPE_REG3_TYPE_116_MASK (0x00100000u)
  25009. #define CSL_CPINTC_TYPE_REG3_TYPE_116_SHIFT (0x00000014u)
  25010. #define CSL_CPINTC_TYPE_REG3_TYPE_116_RESETVAL (0x00000000u)
  25011. #define CSL_CPINTC_TYPE_REG3_TYPE_117_MASK (0x00200000u)
  25012. #define CSL_CPINTC_TYPE_REG3_TYPE_117_SHIFT (0x00000015u)
  25013. #define CSL_CPINTC_TYPE_REG3_TYPE_117_RESETVAL (0x00000000u)
  25014. #define CSL_CPINTC_TYPE_REG3_TYPE_118_MASK (0x00400000u)
  25015. #define CSL_CPINTC_TYPE_REG3_TYPE_118_SHIFT (0x00000016u)
  25016. #define CSL_CPINTC_TYPE_REG3_TYPE_118_RESETVAL (0x00000000u)
  25017. #define CSL_CPINTC_TYPE_REG3_TYPE_119_MASK (0x00800000u)
  25018. #define CSL_CPINTC_TYPE_REG3_TYPE_119_SHIFT (0x00000017u)
  25019. #define CSL_CPINTC_TYPE_REG3_TYPE_119_RESETVAL (0x00000000u)
  25020. #define CSL_CPINTC_TYPE_REG3_TYPE_120_MASK (0x01000000u)
  25021. #define CSL_CPINTC_TYPE_REG3_TYPE_120_SHIFT (0x00000018u)
  25022. #define CSL_CPINTC_TYPE_REG3_TYPE_120_RESETVAL (0x00000000u)
  25023. #define CSL_CPINTC_TYPE_REG3_TYPE_121_MASK (0x02000000u)
  25024. #define CSL_CPINTC_TYPE_REG3_TYPE_121_SHIFT (0x00000019u)
  25025. #define CSL_CPINTC_TYPE_REG3_TYPE_121_RESETVAL (0x00000000u)
  25026. #define CSL_CPINTC_TYPE_REG3_TYPE_122_MASK (0x04000000u)
  25027. #define CSL_CPINTC_TYPE_REG3_TYPE_122_SHIFT (0x0000001Au)
  25028. #define CSL_CPINTC_TYPE_REG3_TYPE_122_RESETVAL (0x00000000u)
  25029. #define CSL_CPINTC_TYPE_REG3_TYPE_123_MASK (0x08000000u)
  25030. #define CSL_CPINTC_TYPE_REG3_TYPE_123_SHIFT (0x0000001Bu)
  25031. #define CSL_CPINTC_TYPE_REG3_TYPE_123_RESETVAL (0x00000000u)
  25032. #define CSL_CPINTC_TYPE_REG3_TYPE_124_MASK (0x10000000u)
  25033. #define CSL_CPINTC_TYPE_REG3_TYPE_124_SHIFT (0x0000001Cu)
  25034. #define CSL_CPINTC_TYPE_REG3_TYPE_124_RESETVAL (0x00000000u)
  25035. #define CSL_CPINTC_TYPE_REG3_TYPE_125_MASK (0x20000000u)
  25036. #define CSL_CPINTC_TYPE_REG3_TYPE_125_SHIFT (0x0000001Du)
  25037. #define CSL_CPINTC_TYPE_REG3_TYPE_125_RESETVAL (0x00000000u)
  25038. #define CSL_CPINTC_TYPE_REG3_TYPE_126_MASK (0x40000000u)
  25039. #define CSL_CPINTC_TYPE_REG3_TYPE_126_SHIFT (0x0000001Eu)
  25040. #define CSL_CPINTC_TYPE_REG3_TYPE_126_RESETVAL (0x00000000u)
  25041. #define CSL_CPINTC_TYPE_REG3_TYPE_127_MASK (0x80000000u)
  25042. #define CSL_CPINTC_TYPE_REG3_TYPE_127_SHIFT (0x0000001Fu)
  25043. #define CSL_CPINTC_TYPE_REG3_TYPE_127_RESETVAL (0x00000000u)
  25044. #define CSL_CPINTC_TYPE_REG3_RESETVAL (0x00000000u)
  25045. /* type_reg4 */
  25046. #define CSL_CPINTC_TYPE_REG4_TYPE_128_MASK (0x00000001u)
  25047. #define CSL_CPINTC_TYPE_REG4_TYPE_128_SHIFT (0x00000000u)
  25048. #define CSL_CPINTC_TYPE_REG4_TYPE_128_RESETVAL (0x00000000u)
  25049. #define CSL_CPINTC_TYPE_REG4_TYPE_129_MASK (0x00000002u)
  25050. #define CSL_CPINTC_TYPE_REG4_TYPE_129_SHIFT (0x00000001u)
  25051. #define CSL_CPINTC_TYPE_REG4_TYPE_129_RESETVAL (0x00000000u)
  25052. #define CSL_CPINTC_TYPE_REG4_TYPE_130_MASK (0x00000004u)
  25053. #define CSL_CPINTC_TYPE_REG4_TYPE_130_SHIFT (0x00000002u)
  25054. #define CSL_CPINTC_TYPE_REG4_TYPE_130_RESETVAL (0x00000000u)
  25055. #define CSL_CPINTC_TYPE_REG4_TYPE_131_MASK (0x00000008u)
  25056. #define CSL_CPINTC_TYPE_REG4_TYPE_131_SHIFT (0x00000003u)
  25057. #define CSL_CPINTC_TYPE_REG4_TYPE_131_RESETVAL (0x00000000u)
  25058. #define CSL_CPINTC_TYPE_REG4_TYPE_132_MASK (0x00000010u)
  25059. #define CSL_CPINTC_TYPE_REG4_TYPE_132_SHIFT (0x00000004u)
  25060. #define CSL_CPINTC_TYPE_REG4_TYPE_132_RESETVAL (0x00000000u)
  25061. #define CSL_CPINTC_TYPE_REG4_TYPE_133_MASK (0x00000020u)
  25062. #define CSL_CPINTC_TYPE_REG4_TYPE_133_SHIFT (0x00000005u)
  25063. #define CSL_CPINTC_TYPE_REG4_TYPE_133_RESETVAL (0x00000000u)
  25064. #define CSL_CPINTC_TYPE_REG4_TYPE_134_MASK (0x00000040u)
  25065. #define CSL_CPINTC_TYPE_REG4_TYPE_134_SHIFT (0x00000006u)
  25066. #define CSL_CPINTC_TYPE_REG4_TYPE_134_RESETVAL (0x00000000u)
  25067. #define CSL_CPINTC_TYPE_REG4_TYPE_135_MASK (0x00000080u)
  25068. #define CSL_CPINTC_TYPE_REG4_TYPE_135_SHIFT (0x00000007u)
  25069. #define CSL_CPINTC_TYPE_REG4_TYPE_135_RESETVAL (0x00000000u)
  25070. #define CSL_CPINTC_TYPE_REG4_TYPE_136_MASK (0x00000100u)
  25071. #define CSL_CPINTC_TYPE_REG4_TYPE_136_SHIFT (0x00000008u)
  25072. #define CSL_CPINTC_TYPE_REG4_TYPE_136_RESETVAL (0x00000000u)
  25073. #define CSL_CPINTC_TYPE_REG4_TYPE_137_MASK (0x00000200u)
  25074. #define CSL_CPINTC_TYPE_REG4_TYPE_137_SHIFT (0x00000009u)
  25075. #define CSL_CPINTC_TYPE_REG4_TYPE_137_RESETVAL (0x00000000u)
  25076. #define CSL_CPINTC_TYPE_REG4_TYPE_138_MASK (0x00000400u)
  25077. #define CSL_CPINTC_TYPE_REG4_TYPE_138_SHIFT (0x0000000Au)
  25078. #define CSL_CPINTC_TYPE_REG4_TYPE_138_RESETVAL (0x00000000u)
  25079. #define CSL_CPINTC_TYPE_REG4_TYPE_139_MASK (0x00000800u)
  25080. #define CSL_CPINTC_TYPE_REG4_TYPE_139_SHIFT (0x0000000Bu)
  25081. #define CSL_CPINTC_TYPE_REG4_TYPE_139_RESETVAL (0x00000000u)
  25082. #define CSL_CPINTC_TYPE_REG4_TYPE_140_MASK (0x00001000u)
  25083. #define CSL_CPINTC_TYPE_REG4_TYPE_140_SHIFT (0x0000000Cu)
  25084. #define CSL_CPINTC_TYPE_REG4_TYPE_140_RESETVAL (0x00000000u)
  25085. #define CSL_CPINTC_TYPE_REG4_TYPE_141_MASK (0x00002000u)
  25086. #define CSL_CPINTC_TYPE_REG4_TYPE_141_SHIFT (0x0000000Du)
  25087. #define CSL_CPINTC_TYPE_REG4_TYPE_141_RESETVAL (0x00000000u)
  25088. #define CSL_CPINTC_TYPE_REG4_TYPE_142_MASK (0x00004000u)
  25089. #define CSL_CPINTC_TYPE_REG4_TYPE_142_SHIFT (0x0000000Eu)
  25090. #define CSL_CPINTC_TYPE_REG4_TYPE_142_RESETVAL (0x00000000u)
  25091. #define CSL_CPINTC_TYPE_REG4_TYPE_143_MASK (0x00008000u)
  25092. #define CSL_CPINTC_TYPE_REG4_TYPE_143_SHIFT (0x0000000Fu)
  25093. #define CSL_CPINTC_TYPE_REG4_TYPE_143_RESETVAL (0x00000000u)
  25094. #define CSL_CPINTC_TYPE_REG4_TYPE_144_MASK (0x00010000u)
  25095. #define CSL_CPINTC_TYPE_REG4_TYPE_144_SHIFT (0x00000010u)
  25096. #define CSL_CPINTC_TYPE_REG4_TYPE_144_RESETVAL (0x00000000u)
  25097. #define CSL_CPINTC_TYPE_REG4_TYPE_145_MASK (0x00020000u)
  25098. #define CSL_CPINTC_TYPE_REG4_TYPE_145_SHIFT (0x00000011u)
  25099. #define CSL_CPINTC_TYPE_REG4_TYPE_145_RESETVAL (0x00000000u)
  25100. #define CSL_CPINTC_TYPE_REG4_TYPE_146_MASK (0x00040000u)
  25101. #define CSL_CPINTC_TYPE_REG4_TYPE_146_SHIFT (0x00000012u)
  25102. #define CSL_CPINTC_TYPE_REG4_TYPE_146_RESETVAL (0x00000000u)
  25103. #define CSL_CPINTC_TYPE_REG4_TYPE_147_MASK (0x00080000u)
  25104. #define CSL_CPINTC_TYPE_REG4_TYPE_147_SHIFT (0x00000013u)
  25105. #define CSL_CPINTC_TYPE_REG4_TYPE_147_RESETVAL (0x00000000u)
  25106. #define CSL_CPINTC_TYPE_REG4_TYPE_148_MASK (0x00100000u)
  25107. #define CSL_CPINTC_TYPE_REG4_TYPE_148_SHIFT (0x00000014u)
  25108. #define CSL_CPINTC_TYPE_REG4_TYPE_148_RESETVAL (0x00000000u)
  25109. #define CSL_CPINTC_TYPE_REG4_TYPE_149_MASK (0x00200000u)
  25110. #define CSL_CPINTC_TYPE_REG4_TYPE_149_SHIFT (0x00000015u)
  25111. #define CSL_CPINTC_TYPE_REG4_TYPE_149_RESETVAL (0x00000000u)
  25112. #define CSL_CPINTC_TYPE_REG4_TYPE_150_MASK (0x00400000u)
  25113. #define CSL_CPINTC_TYPE_REG4_TYPE_150_SHIFT (0x00000016u)
  25114. #define CSL_CPINTC_TYPE_REG4_TYPE_150_RESETVAL (0x00000000u)
  25115. #define CSL_CPINTC_TYPE_REG4_TYPE_151_MASK (0x00800000u)
  25116. #define CSL_CPINTC_TYPE_REG4_TYPE_151_SHIFT (0x00000017u)
  25117. #define CSL_CPINTC_TYPE_REG4_TYPE_151_RESETVAL (0x00000000u)
  25118. #define CSL_CPINTC_TYPE_REG4_TYPE_152_MASK (0x01000000u)
  25119. #define CSL_CPINTC_TYPE_REG4_TYPE_152_SHIFT (0x00000018u)
  25120. #define CSL_CPINTC_TYPE_REG4_TYPE_152_RESETVAL (0x00000000u)
  25121. #define CSL_CPINTC_TYPE_REG4_TYPE_153_MASK (0x02000000u)
  25122. #define CSL_CPINTC_TYPE_REG4_TYPE_153_SHIFT (0x00000019u)
  25123. #define CSL_CPINTC_TYPE_REG4_TYPE_153_RESETVAL (0x00000000u)
  25124. #define CSL_CPINTC_TYPE_REG4_TYPE_154_MASK (0x04000000u)
  25125. #define CSL_CPINTC_TYPE_REG4_TYPE_154_SHIFT (0x0000001Au)
  25126. #define CSL_CPINTC_TYPE_REG4_TYPE_154_RESETVAL (0x00000000u)
  25127. #define CSL_CPINTC_TYPE_REG4_TYPE_155_MASK (0x08000000u)
  25128. #define CSL_CPINTC_TYPE_REG4_TYPE_155_SHIFT (0x0000001Bu)
  25129. #define CSL_CPINTC_TYPE_REG4_TYPE_155_RESETVAL (0x00000000u)
  25130. #define CSL_CPINTC_TYPE_REG4_TYPE_156_MASK (0x10000000u)
  25131. #define CSL_CPINTC_TYPE_REG4_TYPE_156_SHIFT (0x0000001Cu)
  25132. #define CSL_CPINTC_TYPE_REG4_TYPE_156_RESETVAL (0x00000000u)
  25133. #define CSL_CPINTC_TYPE_REG4_TYPE_157_MASK (0x20000000u)
  25134. #define CSL_CPINTC_TYPE_REG4_TYPE_157_SHIFT (0x0000001Du)
  25135. #define CSL_CPINTC_TYPE_REG4_TYPE_157_RESETVAL (0x00000000u)
  25136. #define CSL_CPINTC_TYPE_REG4_TYPE_158_MASK (0x40000000u)
  25137. #define CSL_CPINTC_TYPE_REG4_TYPE_158_SHIFT (0x0000001Eu)
  25138. #define CSL_CPINTC_TYPE_REG4_TYPE_158_RESETVAL (0x00000000u)
  25139. #define CSL_CPINTC_TYPE_REG4_TYPE_159_MASK (0x80000000u)
  25140. #define CSL_CPINTC_TYPE_REG4_TYPE_159_SHIFT (0x0000001Fu)
  25141. #define CSL_CPINTC_TYPE_REG4_TYPE_159_RESETVAL (0x00000000u)
  25142. #define CSL_CPINTC_TYPE_REG4_RESETVAL (0x00000000u)
  25143. /* type_reg5 */
  25144. #define CSL_CPINTC_TYPE_REG5_TYPE_160_MASK (0x00000001u)
  25145. #define CSL_CPINTC_TYPE_REG5_TYPE_160_SHIFT (0x00000000u)
  25146. #define CSL_CPINTC_TYPE_REG5_TYPE_160_RESETVAL (0x00000000u)
  25147. #define CSL_CPINTC_TYPE_REG5_TYPE_161_MASK (0x00000002u)
  25148. #define CSL_CPINTC_TYPE_REG5_TYPE_161_SHIFT (0x00000001u)
  25149. #define CSL_CPINTC_TYPE_REG5_TYPE_161_RESETVAL (0x00000000u)
  25150. #define CSL_CPINTC_TYPE_REG5_TYPE_162_MASK (0x00000004u)
  25151. #define CSL_CPINTC_TYPE_REG5_TYPE_162_SHIFT (0x00000002u)
  25152. #define CSL_CPINTC_TYPE_REG5_TYPE_162_RESETVAL (0x00000000u)
  25153. #define CSL_CPINTC_TYPE_REG5_TYPE_163_MASK (0x00000008u)
  25154. #define CSL_CPINTC_TYPE_REG5_TYPE_163_SHIFT (0x00000003u)
  25155. #define CSL_CPINTC_TYPE_REG5_TYPE_163_RESETVAL (0x00000000u)
  25156. #define CSL_CPINTC_TYPE_REG5_TYPE_164_MASK (0x00000010u)
  25157. #define CSL_CPINTC_TYPE_REG5_TYPE_164_SHIFT (0x00000004u)
  25158. #define CSL_CPINTC_TYPE_REG5_TYPE_164_RESETVAL (0x00000000u)
  25159. #define CSL_CPINTC_TYPE_REG5_TYPE_165_MASK (0x00000020u)
  25160. #define CSL_CPINTC_TYPE_REG5_TYPE_165_SHIFT (0x00000005u)
  25161. #define CSL_CPINTC_TYPE_REG5_TYPE_165_RESETVAL (0x00000000u)
  25162. #define CSL_CPINTC_TYPE_REG5_TYPE_166_MASK (0x00000040u)
  25163. #define CSL_CPINTC_TYPE_REG5_TYPE_166_SHIFT (0x00000006u)
  25164. #define CSL_CPINTC_TYPE_REG5_TYPE_166_RESETVAL (0x00000000u)
  25165. #define CSL_CPINTC_TYPE_REG5_TYPE_167_MASK (0x00000080u)
  25166. #define CSL_CPINTC_TYPE_REG5_TYPE_167_SHIFT (0x00000007u)
  25167. #define CSL_CPINTC_TYPE_REG5_TYPE_167_RESETVAL (0x00000000u)
  25168. #define CSL_CPINTC_TYPE_REG5_TYPE_168_MASK (0x00000100u)
  25169. #define CSL_CPINTC_TYPE_REG5_TYPE_168_SHIFT (0x00000008u)
  25170. #define CSL_CPINTC_TYPE_REG5_TYPE_168_RESETVAL (0x00000000u)
  25171. #define CSL_CPINTC_TYPE_REG5_TYPE_169_MASK (0x00000200u)
  25172. #define CSL_CPINTC_TYPE_REG5_TYPE_169_SHIFT (0x00000009u)
  25173. #define CSL_CPINTC_TYPE_REG5_TYPE_169_RESETVAL (0x00000000u)
  25174. #define CSL_CPINTC_TYPE_REG5_TYPE_170_MASK (0x00000400u)
  25175. #define CSL_CPINTC_TYPE_REG5_TYPE_170_SHIFT (0x0000000Au)
  25176. #define CSL_CPINTC_TYPE_REG5_TYPE_170_RESETVAL (0x00000000u)
  25177. #define CSL_CPINTC_TYPE_REG5_TYPE_171_MASK (0x00000800u)
  25178. #define CSL_CPINTC_TYPE_REG5_TYPE_171_SHIFT (0x0000000Bu)
  25179. #define CSL_CPINTC_TYPE_REG5_TYPE_171_RESETVAL (0x00000000u)
  25180. #define CSL_CPINTC_TYPE_REG5_TYPE_172_MASK (0x00001000u)
  25181. #define CSL_CPINTC_TYPE_REG5_TYPE_172_SHIFT (0x0000000Cu)
  25182. #define CSL_CPINTC_TYPE_REG5_TYPE_172_RESETVAL (0x00000000u)
  25183. #define CSL_CPINTC_TYPE_REG5_TYPE_173_MASK (0x00002000u)
  25184. #define CSL_CPINTC_TYPE_REG5_TYPE_173_SHIFT (0x0000000Du)
  25185. #define CSL_CPINTC_TYPE_REG5_TYPE_173_RESETVAL (0x00000000u)
  25186. #define CSL_CPINTC_TYPE_REG5_TYPE_174_MASK (0x00004000u)
  25187. #define CSL_CPINTC_TYPE_REG5_TYPE_174_SHIFT (0x0000000Eu)
  25188. #define CSL_CPINTC_TYPE_REG5_TYPE_174_RESETVAL (0x00000000u)
  25189. #define CSL_CPINTC_TYPE_REG5_TYPE_175_MASK (0x00008000u)
  25190. #define CSL_CPINTC_TYPE_REG5_TYPE_175_SHIFT (0x0000000Fu)
  25191. #define CSL_CPINTC_TYPE_REG5_TYPE_175_RESETVAL (0x00000000u)
  25192. #define CSL_CPINTC_TYPE_REG5_TYPE_176_MASK (0x00010000u)
  25193. #define CSL_CPINTC_TYPE_REG5_TYPE_176_SHIFT (0x00000010u)
  25194. #define CSL_CPINTC_TYPE_REG5_TYPE_176_RESETVAL (0x00000000u)
  25195. #define CSL_CPINTC_TYPE_REG5_TYPE_177_MASK (0x00020000u)
  25196. #define CSL_CPINTC_TYPE_REG5_TYPE_177_SHIFT (0x00000011u)
  25197. #define CSL_CPINTC_TYPE_REG5_TYPE_177_RESETVAL (0x00000000u)
  25198. #define CSL_CPINTC_TYPE_REG5_TYPE_178_MASK (0x00040000u)
  25199. #define CSL_CPINTC_TYPE_REG5_TYPE_178_SHIFT (0x00000012u)
  25200. #define CSL_CPINTC_TYPE_REG5_TYPE_178_RESETVAL (0x00000000u)
  25201. #define CSL_CPINTC_TYPE_REG5_TYPE_179_MASK (0x00080000u)
  25202. #define CSL_CPINTC_TYPE_REG5_TYPE_179_SHIFT (0x00000013u)
  25203. #define CSL_CPINTC_TYPE_REG5_TYPE_179_RESETVAL (0x00000000u)
  25204. #define CSL_CPINTC_TYPE_REG5_TYPE_180_MASK (0x00100000u)
  25205. #define CSL_CPINTC_TYPE_REG5_TYPE_180_SHIFT (0x00000014u)
  25206. #define CSL_CPINTC_TYPE_REG5_TYPE_180_RESETVAL (0x00000000u)
  25207. #define CSL_CPINTC_TYPE_REG5_TYPE_181_MASK (0x00200000u)
  25208. #define CSL_CPINTC_TYPE_REG5_TYPE_181_SHIFT (0x00000015u)
  25209. #define CSL_CPINTC_TYPE_REG5_TYPE_181_RESETVAL (0x00000000u)
  25210. #define CSL_CPINTC_TYPE_REG5_TYPE_182_MASK (0x00400000u)
  25211. #define CSL_CPINTC_TYPE_REG5_TYPE_182_SHIFT (0x00000016u)
  25212. #define CSL_CPINTC_TYPE_REG5_TYPE_182_RESETVAL (0x00000000u)
  25213. #define CSL_CPINTC_TYPE_REG5_TYPE_183_MASK (0x00800000u)
  25214. #define CSL_CPINTC_TYPE_REG5_TYPE_183_SHIFT (0x00000017u)
  25215. #define CSL_CPINTC_TYPE_REG5_TYPE_183_RESETVAL (0x00000000u)
  25216. #define CSL_CPINTC_TYPE_REG5_TYPE_184_MASK (0x01000000u)
  25217. #define CSL_CPINTC_TYPE_REG5_TYPE_184_SHIFT (0x00000018u)
  25218. #define CSL_CPINTC_TYPE_REG5_TYPE_184_RESETVAL (0x00000000u)
  25219. #define CSL_CPINTC_TYPE_REG5_TYPE_185_MASK (0x02000000u)
  25220. #define CSL_CPINTC_TYPE_REG5_TYPE_185_SHIFT (0x00000019u)
  25221. #define CSL_CPINTC_TYPE_REG5_TYPE_185_RESETVAL (0x00000000u)
  25222. #define CSL_CPINTC_TYPE_REG5_TYPE_186_MASK (0x04000000u)
  25223. #define CSL_CPINTC_TYPE_REG5_TYPE_186_SHIFT (0x0000001Au)
  25224. #define CSL_CPINTC_TYPE_REG5_TYPE_186_RESETVAL (0x00000000u)
  25225. #define CSL_CPINTC_TYPE_REG5_TYPE_187_MASK (0x08000000u)
  25226. #define CSL_CPINTC_TYPE_REG5_TYPE_187_SHIFT (0x0000001Bu)
  25227. #define CSL_CPINTC_TYPE_REG5_TYPE_187_RESETVAL (0x00000000u)
  25228. #define CSL_CPINTC_TYPE_REG5_TYPE_188_MASK (0x10000000u)
  25229. #define CSL_CPINTC_TYPE_REG5_TYPE_188_SHIFT (0x0000001Cu)
  25230. #define CSL_CPINTC_TYPE_REG5_TYPE_188_RESETVAL (0x00000000u)
  25231. #define CSL_CPINTC_TYPE_REG5_TYPE_189_MASK (0x20000000u)
  25232. #define CSL_CPINTC_TYPE_REG5_TYPE_189_SHIFT (0x0000001Du)
  25233. #define CSL_CPINTC_TYPE_REG5_TYPE_189_RESETVAL (0x00000000u)
  25234. #define CSL_CPINTC_TYPE_REG5_TYPE_190_MASK (0x40000000u)
  25235. #define CSL_CPINTC_TYPE_REG5_TYPE_190_SHIFT (0x0000001Eu)
  25236. #define CSL_CPINTC_TYPE_REG5_TYPE_190_RESETVAL (0x00000000u)
  25237. #define CSL_CPINTC_TYPE_REG5_TYPE_191_MASK (0x80000000u)
  25238. #define CSL_CPINTC_TYPE_REG5_TYPE_191_SHIFT (0x0000001Fu)
  25239. #define CSL_CPINTC_TYPE_REG5_TYPE_191_RESETVAL (0x00000000u)
  25240. #define CSL_CPINTC_TYPE_REG5_RESETVAL (0x00000000u)
  25241. /* type_reg6 */
  25242. #define CSL_CPINTC_TYPE_REG6_TYPE_192_MASK (0x00000001u)
  25243. #define CSL_CPINTC_TYPE_REG6_TYPE_192_SHIFT (0x00000000u)
  25244. #define CSL_CPINTC_TYPE_REG6_TYPE_192_RESETVAL (0x00000000u)
  25245. #define CSL_CPINTC_TYPE_REG6_TYPE_193_MASK (0x00000002u)
  25246. #define CSL_CPINTC_TYPE_REG6_TYPE_193_SHIFT (0x00000001u)
  25247. #define CSL_CPINTC_TYPE_REG6_TYPE_193_RESETVAL (0x00000000u)
  25248. #define CSL_CPINTC_TYPE_REG6_TYPE_194_MASK (0x00000004u)
  25249. #define CSL_CPINTC_TYPE_REG6_TYPE_194_SHIFT (0x00000002u)
  25250. #define CSL_CPINTC_TYPE_REG6_TYPE_194_RESETVAL (0x00000000u)
  25251. #define CSL_CPINTC_TYPE_REG6_TYPE_195_MASK (0x00000008u)
  25252. #define CSL_CPINTC_TYPE_REG6_TYPE_195_SHIFT (0x00000003u)
  25253. #define CSL_CPINTC_TYPE_REG6_TYPE_195_RESETVAL (0x00000000u)
  25254. #define CSL_CPINTC_TYPE_REG6_TYPE_196_MASK (0x00000010u)
  25255. #define CSL_CPINTC_TYPE_REG6_TYPE_196_SHIFT (0x00000004u)
  25256. #define CSL_CPINTC_TYPE_REG6_TYPE_196_RESETVAL (0x00000000u)
  25257. #define CSL_CPINTC_TYPE_REG6_TYPE_197_MASK (0x00000020u)
  25258. #define CSL_CPINTC_TYPE_REG6_TYPE_197_SHIFT (0x00000005u)
  25259. #define CSL_CPINTC_TYPE_REG6_TYPE_197_RESETVAL (0x00000000u)
  25260. #define CSL_CPINTC_TYPE_REG6_TYPE_198_MASK (0x00000040u)
  25261. #define CSL_CPINTC_TYPE_REG6_TYPE_198_SHIFT (0x00000006u)
  25262. #define CSL_CPINTC_TYPE_REG6_TYPE_198_RESETVAL (0x00000000u)
  25263. #define CSL_CPINTC_TYPE_REG6_TYPE_199_MASK (0x00000080u)
  25264. #define CSL_CPINTC_TYPE_REG6_TYPE_199_SHIFT (0x00000007u)
  25265. #define CSL_CPINTC_TYPE_REG6_TYPE_199_RESETVAL (0x00000000u)
  25266. #define CSL_CPINTC_TYPE_REG6_TYPE_200_MASK (0x00000100u)
  25267. #define CSL_CPINTC_TYPE_REG6_TYPE_200_SHIFT (0x00000008u)
  25268. #define CSL_CPINTC_TYPE_REG6_TYPE_200_RESETVAL (0x00000000u)
  25269. #define CSL_CPINTC_TYPE_REG6_TYPE_201_MASK (0x00000200u)
  25270. #define CSL_CPINTC_TYPE_REG6_TYPE_201_SHIFT (0x00000009u)
  25271. #define CSL_CPINTC_TYPE_REG6_TYPE_201_RESETVAL (0x00000000u)
  25272. #define CSL_CPINTC_TYPE_REG6_TYPE_202_MASK (0x00000400u)
  25273. #define CSL_CPINTC_TYPE_REG6_TYPE_202_SHIFT (0x0000000Au)
  25274. #define CSL_CPINTC_TYPE_REG6_TYPE_202_RESETVAL (0x00000000u)
  25275. #define CSL_CPINTC_TYPE_REG6_TYPE_203_MASK (0x00000800u)
  25276. #define CSL_CPINTC_TYPE_REG6_TYPE_203_SHIFT (0x0000000Bu)
  25277. #define CSL_CPINTC_TYPE_REG6_TYPE_203_RESETVAL (0x00000000u)
  25278. #define CSL_CPINTC_TYPE_REG6_TYPE_204_MASK (0x00001000u)
  25279. #define CSL_CPINTC_TYPE_REG6_TYPE_204_SHIFT (0x0000000Cu)
  25280. #define CSL_CPINTC_TYPE_REG6_TYPE_204_RESETVAL (0x00000000u)
  25281. #define CSL_CPINTC_TYPE_REG6_TYPE_205_MASK (0x00002000u)
  25282. #define CSL_CPINTC_TYPE_REG6_TYPE_205_SHIFT (0x0000000Du)
  25283. #define CSL_CPINTC_TYPE_REG6_TYPE_205_RESETVAL (0x00000000u)
  25284. #define CSL_CPINTC_TYPE_REG6_TYPE_206_MASK (0x00004000u)
  25285. #define CSL_CPINTC_TYPE_REG6_TYPE_206_SHIFT (0x0000000Eu)
  25286. #define CSL_CPINTC_TYPE_REG6_TYPE_206_RESETVAL (0x00000000u)
  25287. #define CSL_CPINTC_TYPE_REG6_TYPE_207_MASK (0x00008000u)
  25288. #define CSL_CPINTC_TYPE_REG6_TYPE_207_SHIFT (0x0000000Fu)
  25289. #define CSL_CPINTC_TYPE_REG6_TYPE_207_RESETVAL (0x00000000u)
  25290. #define CSL_CPINTC_TYPE_REG6_TYPE_208_MASK (0x00010000u)
  25291. #define CSL_CPINTC_TYPE_REG6_TYPE_208_SHIFT (0x00000010u)
  25292. #define CSL_CPINTC_TYPE_REG6_TYPE_208_RESETVAL (0x00000000u)
  25293. #define CSL_CPINTC_TYPE_REG6_TYPE_209_MASK (0x00020000u)
  25294. #define CSL_CPINTC_TYPE_REG6_TYPE_209_SHIFT (0x00000011u)
  25295. #define CSL_CPINTC_TYPE_REG6_TYPE_209_RESETVAL (0x00000000u)
  25296. #define CSL_CPINTC_TYPE_REG6_TYPE_210_MASK (0x00040000u)
  25297. #define CSL_CPINTC_TYPE_REG6_TYPE_210_SHIFT (0x00000012u)
  25298. #define CSL_CPINTC_TYPE_REG6_TYPE_210_RESETVAL (0x00000000u)
  25299. #define CSL_CPINTC_TYPE_REG6_TYPE_211_MASK (0x00080000u)
  25300. #define CSL_CPINTC_TYPE_REG6_TYPE_211_SHIFT (0x00000013u)
  25301. #define CSL_CPINTC_TYPE_REG6_TYPE_211_RESETVAL (0x00000000u)
  25302. #define CSL_CPINTC_TYPE_REG6_TYPE_212_MASK (0x00100000u)
  25303. #define CSL_CPINTC_TYPE_REG6_TYPE_212_SHIFT (0x00000014u)
  25304. #define CSL_CPINTC_TYPE_REG6_TYPE_212_RESETVAL (0x00000000u)
  25305. #define CSL_CPINTC_TYPE_REG6_TYPE_213_MASK (0x00200000u)
  25306. #define CSL_CPINTC_TYPE_REG6_TYPE_213_SHIFT (0x00000015u)
  25307. #define CSL_CPINTC_TYPE_REG6_TYPE_213_RESETVAL (0x00000000u)
  25308. #define CSL_CPINTC_TYPE_REG6_TYPE_214_MASK (0x00400000u)
  25309. #define CSL_CPINTC_TYPE_REG6_TYPE_214_SHIFT (0x00000016u)
  25310. #define CSL_CPINTC_TYPE_REG6_TYPE_214_RESETVAL (0x00000000u)
  25311. #define CSL_CPINTC_TYPE_REG6_TYPE_215_MASK (0x00800000u)
  25312. #define CSL_CPINTC_TYPE_REG6_TYPE_215_SHIFT (0x00000017u)
  25313. #define CSL_CPINTC_TYPE_REG6_TYPE_215_RESETVAL (0x00000000u)
  25314. #define CSL_CPINTC_TYPE_REG6_TYPE_216_MASK (0x01000000u)
  25315. #define CSL_CPINTC_TYPE_REG6_TYPE_216_SHIFT (0x00000018u)
  25316. #define CSL_CPINTC_TYPE_REG6_TYPE_216_RESETVAL (0x00000000u)
  25317. #define CSL_CPINTC_TYPE_REG6_TYPE_217_MASK (0x02000000u)
  25318. #define CSL_CPINTC_TYPE_REG6_TYPE_217_SHIFT (0x00000019u)
  25319. #define CSL_CPINTC_TYPE_REG6_TYPE_217_RESETVAL (0x00000000u)
  25320. #define CSL_CPINTC_TYPE_REG6_TYPE_218_MASK (0x04000000u)
  25321. #define CSL_CPINTC_TYPE_REG6_TYPE_218_SHIFT (0x0000001Au)
  25322. #define CSL_CPINTC_TYPE_REG6_TYPE_218_RESETVAL (0x00000000u)
  25323. #define CSL_CPINTC_TYPE_REG6_TYPE_219_MASK (0x08000000u)
  25324. #define CSL_CPINTC_TYPE_REG6_TYPE_219_SHIFT (0x0000001Bu)
  25325. #define CSL_CPINTC_TYPE_REG6_TYPE_219_RESETVAL (0x00000000u)
  25326. #define CSL_CPINTC_TYPE_REG6_TYPE_220_MASK (0x10000000u)
  25327. #define CSL_CPINTC_TYPE_REG6_TYPE_220_SHIFT (0x0000001Cu)
  25328. #define CSL_CPINTC_TYPE_REG6_TYPE_220_RESETVAL (0x00000000u)
  25329. #define CSL_CPINTC_TYPE_REG6_TYPE_221_MASK (0x20000000u)
  25330. #define CSL_CPINTC_TYPE_REG6_TYPE_221_SHIFT (0x0000001Du)
  25331. #define CSL_CPINTC_TYPE_REG6_TYPE_221_RESETVAL (0x00000000u)
  25332. #define CSL_CPINTC_TYPE_REG6_TYPE_222_MASK (0x40000000u)
  25333. #define CSL_CPINTC_TYPE_REG6_TYPE_222_SHIFT (0x0000001Eu)
  25334. #define CSL_CPINTC_TYPE_REG6_TYPE_222_RESETVAL (0x00000000u)
  25335. #define CSL_CPINTC_TYPE_REG6_TYPE_223_MASK (0x80000000u)
  25336. #define CSL_CPINTC_TYPE_REG6_TYPE_223_SHIFT (0x0000001Fu)
  25337. #define CSL_CPINTC_TYPE_REG6_TYPE_223_RESETVAL (0x00000000u)
  25338. #define CSL_CPINTC_TYPE_REG6_RESETVAL (0x00000000u)
  25339. /* type_reg7 */
  25340. #define CSL_CPINTC_TYPE_REG7_TYPE_224_MASK (0x00000001u)
  25341. #define CSL_CPINTC_TYPE_REG7_TYPE_224_SHIFT (0x00000000u)
  25342. #define CSL_CPINTC_TYPE_REG7_TYPE_224_RESETVAL (0x00000000u)
  25343. #define CSL_CPINTC_TYPE_REG7_TYPE_225_MASK (0x00000002u)
  25344. #define CSL_CPINTC_TYPE_REG7_TYPE_225_SHIFT (0x00000001u)
  25345. #define CSL_CPINTC_TYPE_REG7_TYPE_225_RESETVAL (0x00000000u)
  25346. #define CSL_CPINTC_TYPE_REG7_TYPE_226_MASK (0x00000004u)
  25347. #define CSL_CPINTC_TYPE_REG7_TYPE_226_SHIFT (0x00000002u)
  25348. #define CSL_CPINTC_TYPE_REG7_TYPE_226_RESETVAL (0x00000000u)
  25349. #define CSL_CPINTC_TYPE_REG7_TYPE_227_MASK (0x00000008u)
  25350. #define CSL_CPINTC_TYPE_REG7_TYPE_227_SHIFT (0x00000003u)
  25351. #define CSL_CPINTC_TYPE_REG7_TYPE_227_RESETVAL (0x00000000u)
  25352. #define CSL_CPINTC_TYPE_REG7_TYPE_228_MASK (0x00000010u)
  25353. #define CSL_CPINTC_TYPE_REG7_TYPE_228_SHIFT (0x00000004u)
  25354. #define CSL_CPINTC_TYPE_REG7_TYPE_228_RESETVAL (0x00000000u)
  25355. #define CSL_CPINTC_TYPE_REG7_TYPE_229_MASK (0x00000020u)
  25356. #define CSL_CPINTC_TYPE_REG7_TYPE_229_SHIFT (0x00000005u)
  25357. #define CSL_CPINTC_TYPE_REG7_TYPE_229_RESETVAL (0x00000000u)
  25358. #define CSL_CPINTC_TYPE_REG7_TYPE_230_MASK (0x00000040u)
  25359. #define CSL_CPINTC_TYPE_REG7_TYPE_230_SHIFT (0x00000006u)
  25360. #define CSL_CPINTC_TYPE_REG7_TYPE_230_RESETVAL (0x00000000u)
  25361. #define CSL_CPINTC_TYPE_REG7_TYPE_231_MASK (0x00000080u)
  25362. #define CSL_CPINTC_TYPE_REG7_TYPE_231_SHIFT (0x00000007u)
  25363. #define CSL_CPINTC_TYPE_REG7_TYPE_231_RESETVAL (0x00000000u)
  25364. #define CSL_CPINTC_TYPE_REG7_TYPE_232_MASK (0x00000100u)
  25365. #define CSL_CPINTC_TYPE_REG7_TYPE_232_SHIFT (0x00000008u)
  25366. #define CSL_CPINTC_TYPE_REG7_TYPE_232_RESETVAL (0x00000000u)
  25367. #define CSL_CPINTC_TYPE_REG7_TYPE_233_MASK (0x00000200u)
  25368. #define CSL_CPINTC_TYPE_REG7_TYPE_233_SHIFT (0x00000009u)
  25369. #define CSL_CPINTC_TYPE_REG7_TYPE_233_RESETVAL (0x00000000u)
  25370. #define CSL_CPINTC_TYPE_REG7_TYPE_234_MASK (0x00000400u)
  25371. #define CSL_CPINTC_TYPE_REG7_TYPE_234_SHIFT (0x0000000Au)
  25372. #define CSL_CPINTC_TYPE_REG7_TYPE_234_RESETVAL (0x00000000u)
  25373. #define CSL_CPINTC_TYPE_REG7_TYPE_235_MASK (0x00000800u)
  25374. #define CSL_CPINTC_TYPE_REG7_TYPE_235_SHIFT (0x0000000Bu)
  25375. #define CSL_CPINTC_TYPE_REG7_TYPE_235_RESETVAL (0x00000000u)
  25376. #define CSL_CPINTC_TYPE_REG7_TYPE_236_MASK (0x00001000u)
  25377. #define CSL_CPINTC_TYPE_REG7_TYPE_236_SHIFT (0x0000000Cu)
  25378. #define CSL_CPINTC_TYPE_REG7_TYPE_236_RESETVAL (0x00000000u)
  25379. #define CSL_CPINTC_TYPE_REG7_TYPE_237_MASK (0x00002000u)
  25380. #define CSL_CPINTC_TYPE_REG7_TYPE_237_SHIFT (0x0000000Du)
  25381. #define CSL_CPINTC_TYPE_REG7_TYPE_237_RESETVAL (0x00000000u)
  25382. #define CSL_CPINTC_TYPE_REG7_TYPE_238_MASK (0x00004000u)
  25383. #define CSL_CPINTC_TYPE_REG7_TYPE_238_SHIFT (0x0000000Eu)
  25384. #define CSL_CPINTC_TYPE_REG7_TYPE_238_RESETVAL (0x00000000u)
  25385. #define CSL_CPINTC_TYPE_REG7_TYPE_239_MASK (0x00008000u)
  25386. #define CSL_CPINTC_TYPE_REG7_TYPE_239_SHIFT (0x0000000Fu)
  25387. #define CSL_CPINTC_TYPE_REG7_TYPE_239_RESETVAL (0x00000000u)
  25388. #define CSL_CPINTC_TYPE_REG7_TYPE_240_MASK (0x00010000u)
  25389. #define CSL_CPINTC_TYPE_REG7_TYPE_240_SHIFT (0x00000010u)
  25390. #define CSL_CPINTC_TYPE_REG7_TYPE_240_RESETVAL (0x00000000u)
  25391. #define CSL_CPINTC_TYPE_REG7_TYPE_241_MASK (0x00020000u)
  25392. #define CSL_CPINTC_TYPE_REG7_TYPE_241_SHIFT (0x00000011u)
  25393. #define CSL_CPINTC_TYPE_REG7_TYPE_241_RESETVAL (0x00000000u)
  25394. #define CSL_CPINTC_TYPE_REG7_TYPE_242_MASK (0x00040000u)
  25395. #define CSL_CPINTC_TYPE_REG7_TYPE_242_SHIFT (0x00000012u)
  25396. #define CSL_CPINTC_TYPE_REG7_TYPE_242_RESETVAL (0x00000000u)
  25397. #define CSL_CPINTC_TYPE_REG7_TYPE_243_MASK (0x00080000u)
  25398. #define CSL_CPINTC_TYPE_REG7_TYPE_243_SHIFT (0x00000013u)
  25399. #define CSL_CPINTC_TYPE_REG7_TYPE_243_RESETVAL (0x00000000u)
  25400. #define CSL_CPINTC_TYPE_REG7_TYPE_244_MASK (0x00100000u)
  25401. #define CSL_CPINTC_TYPE_REG7_TYPE_244_SHIFT (0x00000014u)
  25402. #define CSL_CPINTC_TYPE_REG7_TYPE_244_RESETVAL (0x00000000u)
  25403. #define CSL_CPINTC_TYPE_REG7_TYPE_245_MASK (0x00200000u)
  25404. #define CSL_CPINTC_TYPE_REG7_TYPE_245_SHIFT (0x00000015u)
  25405. #define CSL_CPINTC_TYPE_REG7_TYPE_245_RESETVAL (0x00000000u)
  25406. #define CSL_CPINTC_TYPE_REG7_TYPE_246_MASK (0x00400000u)
  25407. #define CSL_CPINTC_TYPE_REG7_TYPE_246_SHIFT (0x00000016u)
  25408. #define CSL_CPINTC_TYPE_REG7_TYPE_246_RESETVAL (0x00000000u)
  25409. #define CSL_CPINTC_TYPE_REG7_TYPE_247_MASK (0x00800000u)
  25410. #define CSL_CPINTC_TYPE_REG7_TYPE_247_SHIFT (0x00000017u)
  25411. #define CSL_CPINTC_TYPE_REG7_TYPE_247_RESETVAL (0x00000000u)
  25412. #define CSL_CPINTC_TYPE_REG7_TYPE_248_MASK (0x01000000u)
  25413. #define CSL_CPINTC_TYPE_REG7_TYPE_248_SHIFT (0x00000018u)
  25414. #define CSL_CPINTC_TYPE_REG7_TYPE_248_RESETVAL (0x00000000u)
  25415. #define CSL_CPINTC_TYPE_REG7_TYPE_249_MASK (0x02000000u)
  25416. #define CSL_CPINTC_TYPE_REG7_TYPE_249_SHIFT (0x00000019u)
  25417. #define CSL_CPINTC_TYPE_REG7_TYPE_249_RESETVAL (0x00000000u)
  25418. #define CSL_CPINTC_TYPE_REG7_TYPE_250_MASK (0x04000000u)
  25419. #define CSL_CPINTC_TYPE_REG7_TYPE_250_SHIFT (0x0000001Au)
  25420. #define CSL_CPINTC_TYPE_REG7_TYPE_250_RESETVAL (0x00000000u)
  25421. #define CSL_CPINTC_TYPE_REG7_TYPE_251_MASK (0x08000000u)
  25422. #define CSL_CPINTC_TYPE_REG7_TYPE_251_SHIFT (0x0000001Bu)
  25423. #define CSL_CPINTC_TYPE_REG7_TYPE_251_RESETVAL (0x00000000u)
  25424. #define CSL_CPINTC_TYPE_REG7_TYPE_252_MASK (0x10000000u)
  25425. #define CSL_CPINTC_TYPE_REG7_TYPE_252_SHIFT (0x0000001Cu)
  25426. #define CSL_CPINTC_TYPE_REG7_TYPE_252_RESETVAL (0x00000000u)
  25427. #define CSL_CPINTC_TYPE_REG7_TYPE_253_MASK (0x20000000u)
  25428. #define CSL_CPINTC_TYPE_REG7_TYPE_253_SHIFT (0x0000001Du)
  25429. #define CSL_CPINTC_TYPE_REG7_TYPE_253_RESETVAL (0x00000000u)
  25430. #define CSL_CPINTC_TYPE_REG7_TYPE_254_MASK (0x40000000u)
  25431. #define CSL_CPINTC_TYPE_REG7_TYPE_254_SHIFT (0x0000001Eu)
  25432. #define CSL_CPINTC_TYPE_REG7_TYPE_254_RESETVAL (0x00000000u)
  25433. #define CSL_CPINTC_TYPE_REG7_TYPE_255_MASK (0x80000000u)
  25434. #define CSL_CPINTC_TYPE_REG7_TYPE_255_SHIFT (0x0000001Fu)
  25435. #define CSL_CPINTC_TYPE_REG7_TYPE_255_RESETVAL (0x00000000u)
  25436. #define CSL_CPINTC_TYPE_REG7_RESETVAL (0x00000000u)
  25437. /* type_reg8 */
  25438. #define CSL_CPINTC_TYPE_REG8_TYPE_256_MASK (0x00000001u)
  25439. #define CSL_CPINTC_TYPE_REG8_TYPE_256_SHIFT (0x00000000u)
  25440. #define CSL_CPINTC_TYPE_REG8_TYPE_256_RESETVAL (0x00000000u)
  25441. #define CSL_CPINTC_TYPE_REG8_TYPE_257_MASK (0x00000002u)
  25442. #define CSL_CPINTC_TYPE_REG8_TYPE_257_SHIFT (0x00000001u)
  25443. #define CSL_CPINTC_TYPE_REG8_TYPE_257_RESETVAL (0x00000000u)
  25444. #define CSL_CPINTC_TYPE_REG8_TYPE_258_MASK (0x00000004u)
  25445. #define CSL_CPINTC_TYPE_REG8_TYPE_258_SHIFT (0x00000002u)
  25446. #define CSL_CPINTC_TYPE_REG8_TYPE_258_RESETVAL (0x00000000u)
  25447. #define CSL_CPINTC_TYPE_REG8_TYPE_259_MASK (0x00000008u)
  25448. #define CSL_CPINTC_TYPE_REG8_TYPE_259_SHIFT (0x00000003u)
  25449. #define CSL_CPINTC_TYPE_REG8_TYPE_259_RESETVAL (0x00000000u)
  25450. #define CSL_CPINTC_TYPE_REG8_TYPE_260_MASK (0x00000010u)
  25451. #define CSL_CPINTC_TYPE_REG8_TYPE_260_SHIFT (0x00000004u)
  25452. #define CSL_CPINTC_TYPE_REG8_TYPE_260_RESETVAL (0x00000000u)
  25453. #define CSL_CPINTC_TYPE_REG8_TYPE_261_MASK (0x00000020u)
  25454. #define CSL_CPINTC_TYPE_REG8_TYPE_261_SHIFT (0x00000005u)
  25455. #define CSL_CPINTC_TYPE_REG8_TYPE_261_RESETVAL (0x00000000u)
  25456. #define CSL_CPINTC_TYPE_REG8_TYPE_262_MASK (0x00000040u)
  25457. #define CSL_CPINTC_TYPE_REG8_TYPE_262_SHIFT (0x00000006u)
  25458. #define CSL_CPINTC_TYPE_REG8_TYPE_262_RESETVAL (0x00000000u)
  25459. #define CSL_CPINTC_TYPE_REG8_TYPE_263_MASK (0x00000080u)
  25460. #define CSL_CPINTC_TYPE_REG8_TYPE_263_SHIFT (0x00000007u)
  25461. #define CSL_CPINTC_TYPE_REG8_TYPE_263_RESETVAL (0x00000000u)
  25462. #define CSL_CPINTC_TYPE_REG8_TYPE_264_MASK (0x00000100u)
  25463. #define CSL_CPINTC_TYPE_REG8_TYPE_264_SHIFT (0x00000008u)
  25464. #define CSL_CPINTC_TYPE_REG8_TYPE_264_RESETVAL (0x00000000u)
  25465. #define CSL_CPINTC_TYPE_REG8_TYPE_265_MASK (0x00000200u)
  25466. #define CSL_CPINTC_TYPE_REG8_TYPE_265_SHIFT (0x00000009u)
  25467. #define CSL_CPINTC_TYPE_REG8_TYPE_265_RESETVAL (0x00000000u)
  25468. #define CSL_CPINTC_TYPE_REG8_TYPE_266_MASK (0x00000400u)
  25469. #define CSL_CPINTC_TYPE_REG8_TYPE_266_SHIFT (0x0000000Au)
  25470. #define CSL_CPINTC_TYPE_REG8_TYPE_266_RESETVAL (0x00000000u)
  25471. #define CSL_CPINTC_TYPE_REG8_TYPE_267_MASK (0x00000800u)
  25472. #define CSL_CPINTC_TYPE_REG8_TYPE_267_SHIFT (0x0000000Bu)
  25473. #define CSL_CPINTC_TYPE_REG8_TYPE_267_RESETVAL (0x00000000u)
  25474. #define CSL_CPINTC_TYPE_REG8_TYPE_268_MASK (0x00001000u)
  25475. #define CSL_CPINTC_TYPE_REG8_TYPE_268_SHIFT (0x0000000Cu)
  25476. #define CSL_CPINTC_TYPE_REG8_TYPE_268_RESETVAL (0x00000000u)
  25477. #define CSL_CPINTC_TYPE_REG8_TYPE_269_MASK (0x00002000u)
  25478. #define CSL_CPINTC_TYPE_REG8_TYPE_269_SHIFT (0x0000000Du)
  25479. #define CSL_CPINTC_TYPE_REG8_TYPE_269_RESETVAL (0x00000000u)
  25480. #define CSL_CPINTC_TYPE_REG8_TYPE_270_MASK (0x00004000u)
  25481. #define CSL_CPINTC_TYPE_REG8_TYPE_270_SHIFT (0x0000000Eu)
  25482. #define CSL_CPINTC_TYPE_REG8_TYPE_270_RESETVAL (0x00000000u)
  25483. #define CSL_CPINTC_TYPE_REG8_TYPE_271_MASK (0x00008000u)
  25484. #define CSL_CPINTC_TYPE_REG8_TYPE_271_SHIFT (0x0000000Fu)
  25485. #define CSL_CPINTC_TYPE_REG8_TYPE_271_RESETVAL (0x00000000u)
  25486. #define CSL_CPINTC_TYPE_REG8_TYPE_272_MASK (0x00010000u)
  25487. #define CSL_CPINTC_TYPE_REG8_TYPE_272_SHIFT (0x00000010u)
  25488. #define CSL_CPINTC_TYPE_REG8_TYPE_272_RESETVAL (0x00000000u)
  25489. #define CSL_CPINTC_TYPE_REG8_TYPE_273_MASK (0x00020000u)
  25490. #define CSL_CPINTC_TYPE_REG8_TYPE_273_SHIFT (0x00000011u)
  25491. #define CSL_CPINTC_TYPE_REG8_TYPE_273_RESETVAL (0x00000000u)
  25492. #define CSL_CPINTC_TYPE_REG8_TYPE_274_MASK (0x00040000u)
  25493. #define CSL_CPINTC_TYPE_REG8_TYPE_274_SHIFT (0x00000012u)
  25494. #define CSL_CPINTC_TYPE_REG8_TYPE_274_RESETVAL (0x00000000u)
  25495. #define CSL_CPINTC_TYPE_REG8_TYPE_275_MASK (0x00080000u)
  25496. #define CSL_CPINTC_TYPE_REG8_TYPE_275_SHIFT (0x00000013u)
  25497. #define CSL_CPINTC_TYPE_REG8_TYPE_275_RESETVAL (0x00000000u)
  25498. #define CSL_CPINTC_TYPE_REG8_TYPE_276_MASK (0x00100000u)
  25499. #define CSL_CPINTC_TYPE_REG8_TYPE_276_SHIFT (0x00000014u)
  25500. #define CSL_CPINTC_TYPE_REG8_TYPE_276_RESETVAL (0x00000000u)
  25501. #define CSL_CPINTC_TYPE_REG8_TYPE_277_MASK (0x00200000u)
  25502. #define CSL_CPINTC_TYPE_REG8_TYPE_277_SHIFT (0x00000015u)
  25503. #define CSL_CPINTC_TYPE_REG8_TYPE_277_RESETVAL (0x00000000u)
  25504. #define CSL_CPINTC_TYPE_REG8_TYPE_278_MASK (0x00400000u)
  25505. #define CSL_CPINTC_TYPE_REG8_TYPE_278_SHIFT (0x00000016u)
  25506. #define CSL_CPINTC_TYPE_REG8_TYPE_278_RESETVAL (0x00000000u)
  25507. #define CSL_CPINTC_TYPE_REG8_TYPE_279_MASK (0x00800000u)
  25508. #define CSL_CPINTC_TYPE_REG8_TYPE_279_SHIFT (0x00000017u)
  25509. #define CSL_CPINTC_TYPE_REG8_TYPE_279_RESETVAL (0x00000000u)
  25510. #define CSL_CPINTC_TYPE_REG8_TYPE_280_MASK (0x01000000u)
  25511. #define CSL_CPINTC_TYPE_REG8_TYPE_280_SHIFT (0x00000018u)
  25512. #define CSL_CPINTC_TYPE_REG8_TYPE_280_RESETVAL (0x00000000u)
  25513. #define CSL_CPINTC_TYPE_REG8_TYPE_281_MASK (0x02000000u)
  25514. #define CSL_CPINTC_TYPE_REG8_TYPE_281_SHIFT (0x00000019u)
  25515. #define CSL_CPINTC_TYPE_REG8_TYPE_281_RESETVAL (0x00000000u)
  25516. #define CSL_CPINTC_TYPE_REG8_TYPE_282_MASK (0x04000000u)
  25517. #define CSL_CPINTC_TYPE_REG8_TYPE_282_SHIFT (0x0000001Au)
  25518. #define CSL_CPINTC_TYPE_REG8_TYPE_282_RESETVAL (0x00000000u)
  25519. #define CSL_CPINTC_TYPE_REG8_TYPE_283_MASK (0x08000000u)
  25520. #define CSL_CPINTC_TYPE_REG8_TYPE_283_SHIFT (0x0000001Bu)
  25521. #define CSL_CPINTC_TYPE_REG8_TYPE_283_RESETVAL (0x00000000u)
  25522. #define CSL_CPINTC_TYPE_REG8_TYPE_284_MASK (0x10000000u)
  25523. #define CSL_CPINTC_TYPE_REG8_TYPE_284_SHIFT (0x0000001Cu)
  25524. #define CSL_CPINTC_TYPE_REG8_TYPE_284_RESETVAL (0x00000000u)
  25525. #define CSL_CPINTC_TYPE_REG8_TYPE_285_MASK (0x20000000u)
  25526. #define CSL_CPINTC_TYPE_REG8_TYPE_285_SHIFT (0x0000001Du)
  25527. #define CSL_CPINTC_TYPE_REG8_TYPE_285_RESETVAL (0x00000000u)
  25528. #define CSL_CPINTC_TYPE_REG8_TYPE_286_MASK (0x40000000u)
  25529. #define CSL_CPINTC_TYPE_REG8_TYPE_286_SHIFT (0x0000001Eu)
  25530. #define CSL_CPINTC_TYPE_REG8_TYPE_286_RESETVAL (0x00000000u)
  25531. #define CSL_CPINTC_TYPE_REG8_TYPE_287_MASK (0x80000000u)
  25532. #define CSL_CPINTC_TYPE_REG8_TYPE_287_SHIFT (0x0000001Fu)
  25533. #define CSL_CPINTC_TYPE_REG8_TYPE_287_RESETVAL (0x00000000u)
  25534. #define CSL_CPINTC_TYPE_REG8_RESETVAL (0x00000000u)
  25535. /* type_reg9 */
  25536. #define CSL_CPINTC_TYPE_REG9_TYPE_288_MASK (0x00000001u)
  25537. #define CSL_CPINTC_TYPE_REG9_TYPE_288_SHIFT (0x00000000u)
  25538. #define CSL_CPINTC_TYPE_REG9_TYPE_288_RESETVAL (0x00000000u)
  25539. #define CSL_CPINTC_TYPE_REG9_TYPE_289_MASK (0x00000002u)
  25540. #define CSL_CPINTC_TYPE_REG9_TYPE_289_SHIFT (0x00000001u)
  25541. #define CSL_CPINTC_TYPE_REG9_TYPE_289_RESETVAL (0x00000000u)
  25542. #define CSL_CPINTC_TYPE_REG9_TYPE_290_MASK (0x00000004u)
  25543. #define CSL_CPINTC_TYPE_REG9_TYPE_290_SHIFT (0x00000002u)
  25544. #define CSL_CPINTC_TYPE_REG9_TYPE_290_RESETVAL (0x00000000u)
  25545. #define CSL_CPINTC_TYPE_REG9_TYPE_291_MASK (0x00000008u)
  25546. #define CSL_CPINTC_TYPE_REG9_TYPE_291_SHIFT (0x00000003u)
  25547. #define CSL_CPINTC_TYPE_REG9_TYPE_291_RESETVAL (0x00000000u)
  25548. #define CSL_CPINTC_TYPE_REG9_TYPE_292_MASK (0x00000010u)
  25549. #define CSL_CPINTC_TYPE_REG9_TYPE_292_SHIFT (0x00000004u)
  25550. #define CSL_CPINTC_TYPE_REG9_TYPE_292_RESETVAL (0x00000000u)
  25551. #define CSL_CPINTC_TYPE_REG9_TYPE_293_MASK (0x00000020u)
  25552. #define CSL_CPINTC_TYPE_REG9_TYPE_293_SHIFT (0x00000005u)
  25553. #define CSL_CPINTC_TYPE_REG9_TYPE_293_RESETVAL (0x00000000u)
  25554. #define CSL_CPINTC_TYPE_REG9_TYPE_294_MASK (0x00000040u)
  25555. #define CSL_CPINTC_TYPE_REG9_TYPE_294_SHIFT (0x00000006u)
  25556. #define CSL_CPINTC_TYPE_REG9_TYPE_294_RESETVAL (0x00000000u)
  25557. #define CSL_CPINTC_TYPE_REG9_TYPE_295_MASK (0x00000080u)
  25558. #define CSL_CPINTC_TYPE_REG9_TYPE_295_SHIFT (0x00000007u)
  25559. #define CSL_CPINTC_TYPE_REG9_TYPE_295_RESETVAL (0x00000000u)
  25560. #define CSL_CPINTC_TYPE_REG9_TYPE_296_MASK (0x00000100u)
  25561. #define CSL_CPINTC_TYPE_REG9_TYPE_296_SHIFT (0x00000008u)
  25562. #define CSL_CPINTC_TYPE_REG9_TYPE_296_RESETVAL (0x00000000u)
  25563. #define CSL_CPINTC_TYPE_REG9_TYPE_297_MASK (0x00000200u)
  25564. #define CSL_CPINTC_TYPE_REG9_TYPE_297_SHIFT (0x00000009u)
  25565. #define CSL_CPINTC_TYPE_REG9_TYPE_297_RESETVAL (0x00000000u)
  25566. #define CSL_CPINTC_TYPE_REG9_TYPE_298_MASK (0x00000400u)
  25567. #define CSL_CPINTC_TYPE_REG9_TYPE_298_SHIFT (0x0000000Au)
  25568. #define CSL_CPINTC_TYPE_REG9_TYPE_298_RESETVAL (0x00000000u)
  25569. #define CSL_CPINTC_TYPE_REG9_TYPE_299_MASK (0x00000800u)
  25570. #define CSL_CPINTC_TYPE_REG9_TYPE_299_SHIFT (0x0000000Bu)
  25571. #define CSL_CPINTC_TYPE_REG9_TYPE_299_RESETVAL (0x00000000u)
  25572. #define CSL_CPINTC_TYPE_REG9_TYPE_300_MASK (0x00001000u)
  25573. #define CSL_CPINTC_TYPE_REG9_TYPE_300_SHIFT (0x0000000Cu)
  25574. #define CSL_CPINTC_TYPE_REG9_TYPE_300_RESETVAL (0x00000000u)
  25575. #define CSL_CPINTC_TYPE_REG9_TYPE_301_MASK (0x00002000u)
  25576. #define CSL_CPINTC_TYPE_REG9_TYPE_301_SHIFT (0x0000000Du)
  25577. #define CSL_CPINTC_TYPE_REG9_TYPE_301_RESETVAL (0x00000000u)
  25578. #define CSL_CPINTC_TYPE_REG9_TYPE_302_MASK (0x00004000u)
  25579. #define CSL_CPINTC_TYPE_REG9_TYPE_302_SHIFT (0x0000000Eu)
  25580. #define CSL_CPINTC_TYPE_REG9_TYPE_302_RESETVAL (0x00000000u)
  25581. #define CSL_CPINTC_TYPE_REG9_TYPE_303_MASK (0x00008000u)
  25582. #define CSL_CPINTC_TYPE_REG9_TYPE_303_SHIFT (0x0000000Fu)
  25583. #define CSL_CPINTC_TYPE_REG9_TYPE_303_RESETVAL (0x00000000u)
  25584. #define CSL_CPINTC_TYPE_REG9_TYPE_304_MASK (0x00010000u)
  25585. #define CSL_CPINTC_TYPE_REG9_TYPE_304_SHIFT (0x00000010u)
  25586. #define CSL_CPINTC_TYPE_REG9_TYPE_304_RESETVAL (0x00000000u)
  25587. #define CSL_CPINTC_TYPE_REG9_TYPE_305_MASK (0x00020000u)
  25588. #define CSL_CPINTC_TYPE_REG9_TYPE_305_SHIFT (0x00000011u)
  25589. #define CSL_CPINTC_TYPE_REG9_TYPE_305_RESETVAL (0x00000000u)
  25590. #define CSL_CPINTC_TYPE_REG9_TYPE_306_MASK (0x00040000u)
  25591. #define CSL_CPINTC_TYPE_REG9_TYPE_306_SHIFT (0x00000012u)
  25592. #define CSL_CPINTC_TYPE_REG9_TYPE_306_RESETVAL (0x00000000u)
  25593. #define CSL_CPINTC_TYPE_REG9_TYPE_307_MASK (0x00080000u)
  25594. #define CSL_CPINTC_TYPE_REG9_TYPE_307_SHIFT (0x00000013u)
  25595. #define CSL_CPINTC_TYPE_REG9_TYPE_307_RESETVAL (0x00000000u)
  25596. #define CSL_CPINTC_TYPE_REG9_TYPE_308_MASK (0x00100000u)
  25597. #define CSL_CPINTC_TYPE_REG9_TYPE_308_SHIFT (0x00000014u)
  25598. #define CSL_CPINTC_TYPE_REG9_TYPE_308_RESETVAL (0x00000000u)
  25599. #define CSL_CPINTC_TYPE_REG9_TYPE_309_MASK (0x00200000u)
  25600. #define CSL_CPINTC_TYPE_REG9_TYPE_309_SHIFT (0x00000015u)
  25601. #define CSL_CPINTC_TYPE_REG9_TYPE_309_RESETVAL (0x00000000u)
  25602. #define CSL_CPINTC_TYPE_REG9_TYPE_310_MASK (0x00400000u)
  25603. #define CSL_CPINTC_TYPE_REG9_TYPE_310_SHIFT (0x00000016u)
  25604. #define CSL_CPINTC_TYPE_REG9_TYPE_310_RESETVAL (0x00000000u)
  25605. #define CSL_CPINTC_TYPE_REG9_TYPE_311_MASK (0x00800000u)
  25606. #define CSL_CPINTC_TYPE_REG9_TYPE_311_SHIFT (0x00000017u)
  25607. #define CSL_CPINTC_TYPE_REG9_TYPE_311_RESETVAL (0x00000000u)
  25608. #define CSL_CPINTC_TYPE_REG9_TYPE_312_MASK (0x01000000u)
  25609. #define CSL_CPINTC_TYPE_REG9_TYPE_312_SHIFT (0x00000018u)
  25610. #define CSL_CPINTC_TYPE_REG9_TYPE_312_RESETVAL (0x00000000u)
  25611. #define CSL_CPINTC_TYPE_REG9_TYPE_313_MASK (0x02000000u)
  25612. #define CSL_CPINTC_TYPE_REG9_TYPE_313_SHIFT (0x00000019u)
  25613. #define CSL_CPINTC_TYPE_REG9_TYPE_313_RESETVAL (0x00000000u)
  25614. #define CSL_CPINTC_TYPE_REG9_TYPE_314_MASK (0x04000000u)
  25615. #define CSL_CPINTC_TYPE_REG9_TYPE_314_SHIFT (0x0000001Au)
  25616. #define CSL_CPINTC_TYPE_REG9_TYPE_314_RESETVAL (0x00000000u)
  25617. #define CSL_CPINTC_TYPE_REG9_TYPE_315_MASK (0x08000000u)
  25618. #define CSL_CPINTC_TYPE_REG9_TYPE_315_SHIFT (0x0000001Bu)
  25619. #define CSL_CPINTC_TYPE_REG9_TYPE_315_RESETVAL (0x00000000u)
  25620. #define CSL_CPINTC_TYPE_REG9_TYPE_316_MASK (0x10000000u)
  25621. #define CSL_CPINTC_TYPE_REG9_TYPE_316_SHIFT (0x0000001Cu)
  25622. #define CSL_CPINTC_TYPE_REG9_TYPE_316_RESETVAL (0x00000000u)
  25623. #define CSL_CPINTC_TYPE_REG9_TYPE_317_MASK (0x20000000u)
  25624. #define CSL_CPINTC_TYPE_REG9_TYPE_317_SHIFT (0x0000001Du)
  25625. #define CSL_CPINTC_TYPE_REG9_TYPE_317_RESETVAL (0x00000000u)
  25626. #define CSL_CPINTC_TYPE_REG9_TYPE_318_MASK (0x40000000u)
  25627. #define CSL_CPINTC_TYPE_REG9_TYPE_318_SHIFT (0x0000001Eu)
  25628. #define CSL_CPINTC_TYPE_REG9_TYPE_318_RESETVAL (0x00000000u)
  25629. #define CSL_CPINTC_TYPE_REG9_TYPE_319_MASK (0x80000000u)
  25630. #define CSL_CPINTC_TYPE_REG9_TYPE_319_SHIFT (0x0000001Fu)
  25631. #define CSL_CPINTC_TYPE_REG9_TYPE_319_RESETVAL (0x00000000u)
  25632. #define CSL_CPINTC_TYPE_REG9_RESETVAL (0x00000000u)
  25633. /* type_reg10 */
  25634. #define CSL_CPINTC_TYPE_REG10_TYPE_320_MASK (0x00000001u)
  25635. #define CSL_CPINTC_TYPE_REG10_TYPE_320_SHIFT (0x00000000u)
  25636. #define CSL_CPINTC_TYPE_REG10_TYPE_320_RESETVAL (0x00000000u)
  25637. #define CSL_CPINTC_TYPE_REG10_TYPE_321_MASK (0x00000002u)
  25638. #define CSL_CPINTC_TYPE_REG10_TYPE_321_SHIFT (0x00000001u)
  25639. #define CSL_CPINTC_TYPE_REG10_TYPE_321_RESETVAL (0x00000000u)
  25640. #define CSL_CPINTC_TYPE_REG10_TYPE_322_MASK (0x00000004u)
  25641. #define CSL_CPINTC_TYPE_REG10_TYPE_322_SHIFT (0x00000002u)
  25642. #define CSL_CPINTC_TYPE_REG10_TYPE_322_RESETVAL (0x00000000u)
  25643. #define CSL_CPINTC_TYPE_REG10_TYPE_323_MASK (0x00000008u)
  25644. #define CSL_CPINTC_TYPE_REG10_TYPE_323_SHIFT (0x00000003u)
  25645. #define CSL_CPINTC_TYPE_REG10_TYPE_323_RESETVAL (0x00000000u)
  25646. #define CSL_CPINTC_TYPE_REG10_TYPE_324_MASK (0x00000010u)
  25647. #define CSL_CPINTC_TYPE_REG10_TYPE_324_SHIFT (0x00000004u)
  25648. #define CSL_CPINTC_TYPE_REG10_TYPE_324_RESETVAL (0x00000000u)
  25649. #define CSL_CPINTC_TYPE_REG10_TYPE_325_MASK (0x00000020u)
  25650. #define CSL_CPINTC_TYPE_REG10_TYPE_325_SHIFT (0x00000005u)
  25651. #define CSL_CPINTC_TYPE_REG10_TYPE_325_RESETVAL (0x00000000u)
  25652. #define CSL_CPINTC_TYPE_REG10_TYPE_326_MASK (0x00000040u)
  25653. #define CSL_CPINTC_TYPE_REG10_TYPE_326_SHIFT (0x00000006u)
  25654. #define CSL_CPINTC_TYPE_REG10_TYPE_326_RESETVAL (0x00000000u)
  25655. #define CSL_CPINTC_TYPE_REG10_TYPE_327_MASK (0x00000080u)
  25656. #define CSL_CPINTC_TYPE_REG10_TYPE_327_SHIFT (0x00000007u)
  25657. #define CSL_CPINTC_TYPE_REG10_TYPE_327_RESETVAL (0x00000000u)
  25658. #define CSL_CPINTC_TYPE_REG10_TYPE_328_MASK (0x00000100u)
  25659. #define CSL_CPINTC_TYPE_REG10_TYPE_328_SHIFT (0x00000008u)
  25660. #define CSL_CPINTC_TYPE_REG10_TYPE_328_RESETVAL (0x00000000u)
  25661. #define CSL_CPINTC_TYPE_REG10_TYPE_329_MASK (0x00000200u)
  25662. #define CSL_CPINTC_TYPE_REG10_TYPE_329_SHIFT (0x00000009u)
  25663. #define CSL_CPINTC_TYPE_REG10_TYPE_329_RESETVAL (0x00000000u)
  25664. #define CSL_CPINTC_TYPE_REG10_TYPE_330_MASK (0x00000400u)
  25665. #define CSL_CPINTC_TYPE_REG10_TYPE_330_SHIFT (0x0000000Au)
  25666. #define CSL_CPINTC_TYPE_REG10_TYPE_330_RESETVAL (0x00000000u)
  25667. #define CSL_CPINTC_TYPE_REG10_TYPE_331_MASK (0x00000800u)
  25668. #define CSL_CPINTC_TYPE_REG10_TYPE_331_SHIFT (0x0000000Bu)
  25669. #define CSL_CPINTC_TYPE_REG10_TYPE_331_RESETVAL (0x00000000u)
  25670. #define CSL_CPINTC_TYPE_REG10_TYPE_332_MASK (0x00001000u)
  25671. #define CSL_CPINTC_TYPE_REG10_TYPE_332_SHIFT (0x0000000Cu)
  25672. #define CSL_CPINTC_TYPE_REG10_TYPE_332_RESETVAL (0x00000000u)
  25673. #define CSL_CPINTC_TYPE_REG10_TYPE_333_MASK (0x00002000u)
  25674. #define CSL_CPINTC_TYPE_REG10_TYPE_333_SHIFT (0x0000000Du)
  25675. #define CSL_CPINTC_TYPE_REG10_TYPE_333_RESETVAL (0x00000000u)
  25676. #define CSL_CPINTC_TYPE_REG10_TYPE_334_MASK (0x00004000u)
  25677. #define CSL_CPINTC_TYPE_REG10_TYPE_334_SHIFT (0x0000000Eu)
  25678. #define CSL_CPINTC_TYPE_REG10_TYPE_334_RESETVAL (0x00000000u)
  25679. #define CSL_CPINTC_TYPE_REG10_TYPE_335_MASK (0x00008000u)
  25680. #define CSL_CPINTC_TYPE_REG10_TYPE_335_SHIFT (0x0000000Fu)
  25681. #define CSL_CPINTC_TYPE_REG10_TYPE_335_RESETVAL (0x00000000u)
  25682. #define CSL_CPINTC_TYPE_REG10_TYPE_336_MASK (0x00010000u)
  25683. #define CSL_CPINTC_TYPE_REG10_TYPE_336_SHIFT (0x00000010u)
  25684. #define CSL_CPINTC_TYPE_REG10_TYPE_336_RESETVAL (0x00000000u)
  25685. #define CSL_CPINTC_TYPE_REG10_TYPE_337_MASK (0x00020000u)
  25686. #define CSL_CPINTC_TYPE_REG10_TYPE_337_SHIFT (0x00000011u)
  25687. #define CSL_CPINTC_TYPE_REG10_TYPE_337_RESETVAL (0x00000000u)
  25688. #define CSL_CPINTC_TYPE_REG10_TYPE_338_MASK (0x00040000u)
  25689. #define CSL_CPINTC_TYPE_REG10_TYPE_338_SHIFT (0x00000012u)
  25690. #define CSL_CPINTC_TYPE_REG10_TYPE_338_RESETVAL (0x00000000u)
  25691. #define CSL_CPINTC_TYPE_REG10_TYPE_339_MASK (0x00080000u)
  25692. #define CSL_CPINTC_TYPE_REG10_TYPE_339_SHIFT (0x00000013u)
  25693. #define CSL_CPINTC_TYPE_REG10_TYPE_339_RESETVAL (0x00000000u)
  25694. #define CSL_CPINTC_TYPE_REG10_TYPE_340_MASK (0x00100000u)
  25695. #define CSL_CPINTC_TYPE_REG10_TYPE_340_SHIFT (0x00000014u)
  25696. #define CSL_CPINTC_TYPE_REG10_TYPE_340_RESETVAL (0x00000000u)
  25697. #define CSL_CPINTC_TYPE_REG10_TYPE_341_MASK (0x00200000u)
  25698. #define CSL_CPINTC_TYPE_REG10_TYPE_341_SHIFT (0x00000015u)
  25699. #define CSL_CPINTC_TYPE_REG10_TYPE_341_RESETVAL (0x00000000u)
  25700. #define CSL_CPINTC_TYPE_REG10_TYPE_342_MASK (0x00400000u)
  25701. #define CSL_CPINTC_TYPE_REG10_TYPE_342_SHIFT (0x00000016u)
  25702. #define CSL_CPINTC_TYPE_REG10_TYPE_342_RESETVAL (0x00000000u)
  25703. #define CSL_CPINTC_TYPE_REG10_TYPE_343_MASK (0x00800000u)
  25704. #define CSL_CPINTC_TYPE_REG10_TYPE_343_SHIFT (0x00000017u)
  25705. #define CSL_CPINTC_TYPE_REG10_TYPE_343_RESETVAL (0x00000000u)
  25706. #define CSL_CPINTC_TYPE_REG10_TYPE_344_MASK (0x01000000u)
  25707. #define CSL_CPINTC_TYPE_REG10_TYPE_344_SHIFT (0x00000018u)
  25708. #define CSL_CPINTC_TYPE_REG10_TYPE_344_RESETVAL (0x00000000u)
  25709. #define CSL_CPINTC_TYPE_REG10_TYPE_345_MASK (0x02000000u)
  25710. #define CSL_CPINTC_TYPE_REG10_TYPE_345_SHIFT (0x00000019u)
  25711. #define CSL_CPINTC_TYPE_REG10_TYPE_345_RESETVAL (0x00000000u)
  25712. #define CSL_CPINTC_TYPE_REG10_TYPE_346_MASK (0x04000000u)
  25713. #define CSL_CPINTC_TYPE_REG10_TYPE_346_SHIFT (0x0000001Au)
  25714. #define CSL_CPINTC_TYPE_REG10_TYPE_346_RESETVAL (0x00000000u)
  25715. #define CSL_CPINTC_TYPE_REG10_TYPE_347_MASK (0x08000000u)
  25716. #define CSL_CPINTC_TYPE_REG10_TYPE_347_SHIFT (0x0000001Bu)
  25717. #define CSL_CPINTC_TYPE_REG10_TYPE_347_RESETVAL (0x00000000u)
  25718. #define CSL_CPINTC_TYPE_REG10_TYPE_348_MASK (0x10000000u)
  25719. #define CSL_CPINTC_TYPE_REG10_TYPE_348_SHIFT (0x0000001Cu)
  25720. #define CSL_CPINTC_TYPE_REG10_TYPE_348_RESETVAL (0x00000000u)
  25721. #define CSL_CPINTC_TYPE_REG10_TYPE_349_MASK (0x20000000u)
  25722. #define CSL_CPINTC_TYPE_REG10_TYPE_349_SHIFT (0x0000001Du)
  25723. #define CSL_CPINTC_TYPE_REG10_TYPE_349_RESETVAL (0x00000000u)
  25724. #define CSL_CPINTC_TYPE_REG10_TYPE_350_MASK (0x40000000u)
  25725. #define CSL_CPINTC_TYPE_REG10_TYPE_350_SHIFT (0x0000001Eu)
  25726. #define CSL_CPINTC_TYPE_REG10_TYPE_350_RESETVAL (0x00000000u)
  25727. #define CSL_CPINTC_TYPE_REG10_TYPE_351_MASK (0x80000000u)
  25728. #define CSL_CPINTC_TYPE_REG10_TYPE_351_SHIFT (0x0000001Fu)
  25729. #define CSL_CPINTC_TYPE_REG10_TYPE_351_RESETVAL (0x00000000u)
  25730. #define CSL_CPINTC_TYPE_REG10_RESETVAL (0x00000000u)
  25731. /* type_reg11 */
  25732. #define CSL_CPINTC_TYPE_REG11_TYPE_352_MASK (0x00000001u)
  25733. #define CSL_CPINTC_TYPE_REG11_TYPE_352_SHIFT (0x00000000u)
  25734. #define CSL_CPINTC_TYPE_REG11_TYPE_352_RESETVAL (0x00000000u)
  25735. #define CSL_CPINTC_TYPE_REG11_TYPE_353_MASK (0x00000002u)
  25736. #define CSL_CPINTC_TYPE_REG11_TYPE_353_SHIFT (0x00000001u)
  25737. #define CSL_CPINTC_TYPE_REG11_TYPE_353_RESETVAL (0x00000000u)
  25738. #define CSL_CPINTC_TYPE_REG11_TYPE_354_MASK (0x00000004u)
  25739. #define CSL_CPINTC_TYPE_REG11_TYPE_354_SHIFT (0x00000002u)
  25740. #define CSL_CPINTC_TYPE_REG11_TYPE_354_RESETVAL (0x00000000u)
  25741. #define CSL_CPINTC_TYPE_REG11_TYPE_355_MASK (0x00000008u)
  25742. #define CSL_CPINTC_TYPE_REG11_TYPE_355_SHIFT (0x00000003u)
  25743. #define CSL_CPINTC_TYPE_REG11_TYPE_355_RESETVAL (0x00000000u)
  25744. #define CSL_CPINTC_TYPE_REG11_TYPE_356_MASK (0x00000010u)
  25745. #define CSL_CPINTC_TYPE_REG11_TYPE_356_SHIFT (0x00000004u)
  25746. #define CSL_CPINTC_TYPE_REG11_TYPE_356_RESETVAL (0x00000000u)
  25747. #define CSL_CPINTC_TYPE_REG11_TYPE_357_MASK (0x00000020u)
  25748. #define CSL_CPINTC_TYPE_REG11_TYPE_357_SHIFT (0x00000005u)
  25749. #define CSL_CPINTC_TYPE_REG11_TYPE_357_RESETVAL (0x00000000u)
  25750. #define CSL_CPINTC_TYPE_REG11_TYPE_358_MASK (0x00000040u)
  25751. #define CSL_CPINTC_TYPE_REG11_TYPE_358_SHIFT (0x00000006u)
  25752. #define CSL_CPINTC_TYPE_REG11_TYPE_358_RESETVAL (0x00000000u)
  25753. #define CSL_CPINTC_TYPE_REG11_TYPE_359_MASK (0x00000080u)
  25754. #define CSL_CPINTC_TYPE_REG11_TYPE_359_SHIFT (0x00000007u)
  25755. #define CSL_CPINTC_TYPE_REG11_TYPE_359_RESETVAL (0x00000000u)
  25756. #define CSL_CPINTC_TYPE_REG11_TYPE_360_MASK (0x00000100u)
  25757. #define CSL_CPINTC_TYPE_REG11_TYPE_360_SHIFT (0x00000008u)
  25758. #define CSL_CPINTC_TYPE_REG11_TYPE_360_RESETVAL (0x00000000u)
  25759. #define CSL_CPINTC_TYPE_REG11_TYPE_361_MASK (0x00000200u)
  25760. #define CSL_CPINTC_TYPE_REG11_TYPE_361_SHIFT (0x00000009u)
  25761. #define CSL_CPINTC_TYPE_REG11_TYPE_361_RESETVAL (0x00000000u)
  25762. #define CSL_CPINTC_TYPE_REG11_TYPE_362_MASK (0x00000400u)
  25763. #define CSL_CPINTC_TYPE_REG11_TYPE_362_SHIFT (0x0000000Au)
  25764. #define CSL_CPINTC_TYPE_REG11_TYPE_362_RESETVAL (0x00000000u)
  25765. #define CSL_CPINTC_TYPE_REG11_TYPE_363_MASK (0x00000800u)
  25766. #define CSL_CPINTC_TYPE_REG11_TYPE_363_SHIFT (0x0000000Bu)
  25767. #define CSL_CPINTC_TYPE_REG11_TYPE_363_RESETVAL (0x00000000u)
  25768. #define CSL_CPINTC_TYPE_REG11_TYPE_364_MASK (0x00001000u)
  25769. #define CSL_CPINTC_TYPE_REG11_TYPE_364_SHIFT (0x0000000Cu)
  25770. #define CSL_CPINTC_TYPE_REG11_TYPE_364_RESETVAL (0x00000000u)
  25771. #define CSL_CPINTC_TYPE_REG11_TYPE_365_MASK (0x00002000u)
  25772. #define CSL_CPINTC_TYPE_REG11_TYPE_365_SHIFT (0x0000000Du)
  25773. #define CSL_CPINTC_TYPE_REG11_TYPE_365_RESETVAL (0x00000000u)
  25774. #define CSL_CPINTC_TYPE_REG11_TYPE_366_MASK (0x00004000u)
  25775. #define CSL_CPINTC_TYPE_REG11_TYPE_366_SHIFT (0x0000000Eu)
  25776. #define CSL_CPINTC_TYPE_REG11_TYPE_366_RESETVAL (0x00000000u)
  25777. #define CSL_CPINTC_TYPE_REG11_TYPE_367_MASK (0x00008000u)
  25778. #define CSL_CPINTC_TYPE_REG11_TYPE_367_SHIFT (0x0000000Fu)
  25779. #define CSL_CPINTC_TYPE_REG11_TYPE_367_RESETVAL (0x00000000u)
  25780. #define CSL_CPINTC_TYPE_REG11_TYPE_368_MASK (0x00010000u)
  25781. #define CSL_CPINTC_TYPE_REG11_TYPE_368_SHIFT (0x00000010u)
  25782. #define CSL_CPINTC_TYPE_REG11_TYPE_368_RESETVAL (0x00000000u)
  25783. #define CSL_CPINTC_TYPE_REG11_TYPE_369_MASK (0x00020000u)
  25784. #define CSL_CPINTC_TYPE_REG11_TYPE_369_SHIFT (0x00000011u)
  25785. #define CSL_CPINTC_TYPE_REG11_TYPE_369_RESETVAL (0x00000000u)
  25786. #define CSL_CPINTC_TYPE_REG11_TYPE_370_MASK (0x00040000u)
  25787. #define CSL_CPINTC_TYPE_REG11_TYPE_370_SHIFT (0x00000012u)
  25788. #define CSL_CPINTC_TYPE_REG11_TYPE_370_RESETVAL (0x00000000u)
  25789. #define CSL_CPINTC_TYPE_REG11_TYPE_371_MASK (0x00080000u)
  25790. #define CSL_CPINTC_TYPE_REG11_TYPE_371_SHIFT (0x00000013u)
  25791. #define CSL_CPINTC_TYPE_REG11_TYPE_371_RESETVAL (0x00000000u)
  25792. #define CSL_CPINTC_TYPE_REG11_TYPE_372_MASK (0x00100000u)
  25793. #define CSL_CPINTC_TYPE_REG11_TYPE_372_SHIFT (0x00000014u)
  25794. #define CSL_CPINTC_TYPE_REG11_TYPE_372_RESETVAL (0x00000000u)
  25795. #define CSL_CPINTC_TYPE_REG11_TYPE_373_MASK (0x00200000u)
  25796. #define CSL_CPINTC_TYPE_REG11_TYPE_373_SHIFT (0x00000015u)
  25797. #define CSL_CPINTC_TYPE_REG11_TYPE_373_RESETVAL (0x00000000u)
  25798. #define CSL_CPINTC_TYPE_REG11_TYPE_374_MASK (0x00400000u)
  25799. #define CSL_CPINTC_TYPE_REG11_TYPE_374_SHIFT (0x00000016u)
  25800. #define CSL_CPINTC_TYPE_REG11_TYPE_374_RESETVAL (0x00000000u)
  25801. #define CSL_CPINTC_TYPE_REG11_TYPE_375_MASK (0x00800000u)
  25802. #define CSL_CPINTC_TYPE_REG11_TYPE_375_SHIFT (0x00000017u)
  25803. #define CSL_CPINTC_TYPE_REG11_TYPE_375_RESETVAL (0x00000000u)
  25804. #define CSL_CPINTC_TYPE_REG11_TYPE_376_MASK (0x01000000u)
  25805. #define CSL_CPINTC_TYPE_REG11_TYPE_376_SHIFT (0x00000018u)
  25806. #define CSL_CPINTC_TYPE_REG11_TYPE_376_RESETVAL (0x00000000u)
  25807. #define CSL_CPINTC_TYPE_REG11_TYPE_377_MASK (0x02000000u)
  25808. #define CSL_CPINTC_TYPE_REG11_TYPE_377_SHIFT (0x00000019u)
  25809. #define CSL_CPINTC_TYPE_REG11_TYPE_377_RESETVAL (0x00000000u)
  25810. #define CSL_CPINTC_TYPE_REG11_TYPE_378_MASK (0x04000000u)
  25811. #define CSL_CPINTC_TYPE_REG11_TYPE_378_SHIFT (0x0000001Au)
  25812. #define CSL_CPINTC_TYPE_REG11_TYPE_378_RESETVAL (0x00000000u)
  25813. #define CSL_CPINTC_TYPE_REG11_TYPE_379_MASK (0x08000000u)
  25814. #define CSL_CPINTC_TYPE_REG11_TYPE_379_SHIFT (0x0000001Bu)
  25815. #define CSL_CPINTC_TYPE_REG11_TYPE_379_RESETVAL (0x00000000u)
  25816. #define CSL_CPINTC_TYPE_REG11_TYPE_380_MASK (0x10000000u)
  25817. #define CSL_CPINTC_TYPE_REG11_TYPE_380_SHIFT (0x0000001Cu)
  25818. #define CSL_CPINTC_TYPE_REG11_TYPE_380_RESETVAL (0x00000000u)
  25819. #define CSL_CPINTC_TYPE_REG11_TYPE_381_MASK (0x20000000u)
  25820. #define CSL_CPINTC_TYPE_REG11_TYPE_381_SHIFT (0x0000001Du)
  25821. #define CSL_CPINTC_TYPE_REG11_TYPE_381_RESETVAL (0x00000000u)
  25822. #define CSL_CPINTC_TYPE_REG11_TYPE_382_MASK (0x40000000u)
  25823. #define CSL_CPINTC_TYPE_REG11_TYPE_382_SHIFT (0x0000001Eu)
  25824. #define CSL_CPINTC_TYPE_REG11_TYPE_382_RESETVAL (0x00000000u)
  25825. #define CSL_CPINTC_TYPE_REG11_TYPE_383_MASK (0x80000000u)
  25826. #define CSL_CPINTC_TYPE_REG11_TYPE_383_SHIFT (0x0000001Fu)
  25827. #define CSL_CPINTC_TYPE_REG11_TYPE_383_RESETVAL (0x00000000u)
  25828. #define CSL_CPINTC_TYPE_REG11_RESETVAL (0x00000000u)
  25829. /* type_reg12 */
  25830. #define CSL_CPINTC_TYPE_REG12_TYPE_384_MASK (0x00000001u)
  25831. #define CSL_CPINTC_TYPE_REG12_TYPE_384_SHIFT (0x00000000u)
  25832. #define CSL_CPINTC_TYPE_REG12_TYPE_384_RESETVAL (0x00000000u)
  25833. #define CSL_CPINTC_TYPE_REG12_TYPE_385_MASK (0x00000002u)
  25834. #define CSL_CPINTC_TYPE_REG12_TYPE_385_SHIFT (0x00000001u)
  25835. #define CSL_CPINTC_TYPE_REG12_TYPE_385_RESETVAL (0x00000000u)
  25836. #define CSL_CPINTC_TYPE_REG12_TYPE_386_MASK (0x00000004u)
  25837. #define CSL_CPINTC_TYPE_REG12_TYPE_386_SHIFT (0x00000002u)
  25838. #define CSL_CPINTC_TYPE_REG12_TYPE_386_RESETVAL (0x00000000u)
  25839. #define CSL_CPINTC_TYPE_REG12_TYPE_387_MASK (0x00000008u)
  25840. #define CSL_CPINTC_TYPE_REG12_TYPE_387_SHIFT (0x00000003u)
  25841. #define CSL_CPINTC_TYPE_REG12_TYPE_387_RESETVAL (0x00000000u)
  25842. #define CSL_CPINTC_TYPE_REG12_TYPE_388_MASK (0x00000010u)
  25843. #define CSL_CPINTC_TYPE_REG12_TYPE_388_SHIFT (0x00000004u)
  25844. #define CSL_CPINTC_TYPE_REG12_TYPE_388_RESETVAL (0x00000000u)
  25845. #define CSL_CPINTC_TYPE_REG12_TYPE_389_MASK (0x00000020u)
  25846. #define CSL_CPINTC_TYPE_REG12_TYPE_389_SHIFT (0x00000005u)
  25847. #define CSL_CPINTC_TYPE_REG12_TYPE_389_RESETVAL (0x00000000u)
  25848. #define CSL_CPINTC_TYPE_REG12_TYPE_390_MASK (0x00000040u)
  25849. #define CSL_CPINTC_TYPE_REG12_TYPE_390_SHIFT (0x00000006u)
  25850. #define CSL_CPINTC_TYPE_REG12_TYPE_390_RESETVAL (0x00000000u)
  25851. #define CSL_CPINTC_TYPE_REG12_TYPE_391_MASK (0x00000080u)
  25852. #define CSL_CPINTC_TYPE_REG12_TYPE_391_SHIFT (0x00000007u)
  25853. #define CSL_CPINTC_TYPE_REG12_TYPE_391_RESETVAL (0x00000000u)
  25854. #define CSL_CPINTC_TYPE_REG12_TYPE_392_MASK (0x00000100u)
  25855. #define CSL_CPINTC_TYPE_REG12_TYPE_392_SHIFT (0x00000008u)
  25856. #define CSL_CPINTC_TYPE_REG12_TYPE_392_RESETVAL (0x00000000u)
  25857. #define CSL_CPINTC_TYPE_REG12_TYPE_393_MASK (0x00000200u)
  25858. #define CSL_CPINTC_TYPE_REG12_TYPE_393_SHIFT (0x00000009u)
  25859. #define CSL_CPINTC_TYPE_REG12_TYPE_393_RESETVAL (0x00000000u)
  25860. #define CSL_CPINTC_TYPE_REG12_TYPE_394_MASK (0x00000400u)
  25861. #define CSL_CPINTC_TYPE_REG12_TYPE_394_SHIFT (0x0000000Au)
  25862. #define CSL_CPINTC_TYPE_REG12_TYPE_394_RESETVAL (0x00000000u)
  25863. #define CSL_CPINTC_TYPE_REG12_TYPE_395_MASK (0x00000800u)
  25864. #define CSL_CPINTC_TYPE_REG12_TYPE_395_SHIFT (0x0000000Bu)
  25865. #define CSL_CPINTC_TYPE_REG12_TYPE_395_RESETVAL (0x00000000u)
  25866. #define CSL_CPINTC_TYPE_REG12_TYPE_396_MASK (0x00001000u)
  25867. #define CSL_CPINTC_TYPE_REG12_TYPE_396_SHIFT (0x0000000Cu)
  25868. #define CSL_CPINTC_TYPE_REG12_TYPE_396_RESETVAL (0x00000000u)
  25869. #define CSL_CPINTC_TYPE_REG12_TYPE_397_MASK (0x00002000u)
  25870. #define CSL_CPINTC_TYPE_REG12_TYPE_397_SHIFT (0x0000000Du)
  25871. #define CSL_CPINTC_TYPE_REG12_TYPE_397_RESETVAL (0x00000000u)
  25872. #define CSL_CPINTC_TYPE_REG12_TYPE_398_MASK (0x00004000u)
  25873. #define CSL_CPINTC_TYPE_REG12_TYPE_398_SHIFT (0x0000000Eu)
  25874. #define CSL_CPINTC_TYPE_REG12_TYPE_398_RESETVAL (0x00000000u)
  25875. #define CSL_CPINTC_TYPE_REG12_TYPE_399_MASK (0x00008000u)
  25876. #define CSL_CPINTC_TYPE_REG12_TYPE_399_SHIFT (0x0000000Fu)
  25877. #define CSL_CPINTC_TYPE_REG12_TYPE_399_RESETVAL (0x00000000u)
  25878. #define CSL_CPINTC_TYPE_REG12_TYPE_400_MASK (0x00010000u)
  25879. #define CSL_CPINTC_TYPE_REG12_TYPE_400_SHIFT (0x00000010u)
  25880. #define CSL_CPINTC_TYPE_REG12_TYPE_400_RESETVAL (0x00000000u)
  25881. #define CSL_CPINTC_TYPE_REG12_TYPE_401_MASK (0x00020000u)
  25882. #define CSL_CPINTC_TYPE_REG12_TYPE_401_SHIFT (0x00000011u)
  25883. #define CSL_CPINTC_TYPE_REG12_TYPE_401_RESETVAL (0x00000000u)
  25884. #define CSL_CPINTC_TYPE_REG12_TYPE_402_MASK (0x00040000u)
  25885. #define CSL_CPINTC_TYPE_REG12_TYPE_402_SHIFT (0x00000012u)
  25886. #define CSL_CPINTC_TYPE_REG12_TYPE_402_RESETVAL (0x00000000u)
  25887. #define CSL_CPINTC_TYPE_REG12_TYPE_403_MASK (0x00080000u)
  25888. #define CSL_CPINTC_TYPE_REG12_TYPE_403_SHIFT (0x00000013u)
  25889. #define CSL_CPINTC_TYPE_REG12_TYPE_403_RESETVAL (0x00000000u)
  25890. #define CSL_CPINTC_TYPE_REG12_TYPE_404_MASK (0x00100000u)
  25891. #define CSL_CPINTC_TYPE_REG12_TYPE_404_SHIFT (0x00000014u)
  25892. #define CSL_CPINTC_TYPE_REG12_TYPE_404_RESETVAL (0x00000000u)
  25893. #define CSL_CPINTC_TYPE_REG12_TYPE_405_MASK (0x00200000u)
  25894. #define CSL_CPINTC_TYPE_REG12_TYPE_405_SHIFT (0x00000015u)
  25895. #define CSL_CPINTC_TYPE_REG12_TYPE_405_RESETVAL (0x00000000u)
  25896. #define CSL_CPINTC_TYPE_REG12_TYPE_406_MASK (0x00400000u)
  25897. #define CSL_CPINTC_TYPE_REG12_TYPE_406_SHIFT (0x00000016u)
  25898. #define CSL_CPINTC_TYPE_REG12_TYPE_406_RESETVAL (0x00000000u)
  25899. #define CSL_CPINTC_TYPE_REG12_TYPE_407_MASK (0x00800000u)
  25900. #define CSL_CPINTC_TYPE_REG12_TYPE_407_SHIFT (0x00000017u)
  25901. #define CSL_CPINTC_TYPE_REG12_TYPE_407_RESETVAL (0x00000000u)
  25902. #define CSL_CPINTC_TYPE_REG12_TYPE_408_MASK (0x01000000u)
  25903. #define CSL_CPINTC_TYPE_REG12_TYPE_408_SHIFT (0x00000018u)
  25904. #define CSL_CPINTC_TYPE_REG12_TYPE_408_RESETVAL (0x00000000u)
  25905. #define CSL_CPINTC_TYPE_REG12_TYPE_409_MASK (0x02000000u)
  25906. #define CSL_CPINTC_TYPE_REG12_TYPE_409_SHIFT (0x00000019u)
  25907. #define CSL_CPINTC_TYPE_REG12_TYPE_409_RESETVAL (0x00000000u)
  25908. #define CSL_CPINTC_TYPE_REG12_TYPE_410_MASK (0x04000000u)
  25909. #define CSL_CPINTC_TYPE_REG12_TYPE_410_SHIFT (0x0000001Au)
  25910. #define CSL_CPINTC_TYPE_REG12_TYPE_410_RESETVAL (0x00000000u)
  25911. #define CSL_CPINTC_TYPE_REG12_TYPE_411_MASK (0x08000000u)
  25912. #define CSL_CPINTC_TYPE_REG12_TYPE_411_SHIFT (0x0000001Bu)
  25913. #define CSL_CPINTC_TYPE_REG12_TYPE_411_RESETVAL (0x00000000u)
  25914. #define CSL_CPINTC_TYPE_REG12_TYPE_412_MASK (0x10000000u)
  25915. #define CSL_CPINTC_TYPE_REG12_TYPE_412_SHIFT (0x0000001Cu)
  25916. #define CSL_CPINTC_TYPE_REG12_TYPE_412_RESETVAL (0x00000000u)
  25917. #define CSL_CPINTC_TYPE_REG12_TYPE_413_MASK (0x20000000u)
  25918. #define CSL_CPINTC_TYPE_REG12_TYPE_413_SHIFT (0x0000001Du)
  25919. #define CSL_CPINTC_TYPE_REG12_TYPE_413_RESETVAL (0x00000000u)
  25920. #define CSL_CPINTC_TYPE_REG12_TYPE_414_MASK (0x40000000u)
  25921. #define CSL_CPINTC_TYPE_REG12_TYPE_414_SHIFT (0x0000001Eu)
  25922. #define CSL_CPINTC_TYPE_REG12_TYPE_414_RESETVAL (0x00000000u)
  25923. #define CSL_CPINTC_TYPE_REG12_TYPE_415_MASK (0x80000000u)
  25924. #define CSL_CPINTC_TYPE_REG12_TYPE_415_SHIFT (0x0000001Fu)
  25925. #define CSL_CPINTC_TYPE_REG12_TYPE_415_RESETVAL (0x00000000u)
  25926. #define CSL_CPINTC_TYPE_REG12_RESETVAL (0x00000000u)
  25927. /* type_reg13 */
  25928. #define CSL_CPINTC_TYPE_REG13_TYPE_416_MASK (0x00000001u)
  25929. #define CSL_CPINTC_TYPE_REG13_TYPE_416_SHIFT (0x00000000u)
  25930. #define CSL_CPINTC_TYPE_REG13_TYPE_416_RESETVAL (0x00000000u)
  25931. #define CSL_CPINTC_TYPE_REG13_TYPE_417_MASK (0x00000002u)
  25932. #define CSL_CPINTC_TYPE_REG13_TYPE_417_SHIFT (0x00000001u)
  25933. #define CSL_CPINTC_TYPE_REG13_TYPE_417_RESETVAL (0x00000000u)
  25934. #define CSL_CPINTC_TYPE_REG13_TYPE_418_MASK (0x00000004u)
  25935. #define CSL_CPINTC_TYPE_REG13_TYPE_418_SHIFT (0x00000002u)
  25936. #define CSL_CPINTC_TYPE_REG13_TYPE_418_RESETVAL (0x00000000u)
  25937. #define CSL_CPINTC_TYPE_REG13_TYPE_419_MASK (0x00000008u)
  25938. #define CSL_CPINTC_TYPE_REG13_TYPE_419_SHIFT (0x00000003u)
  25939. #define CSL_CPINTC_TYPE_REG13_TYPE_419_RESETVAL (0x00000000u)
  25940. #define CSL_CPINTC_TYPE_REG13_TYPE_420_MASK (0x00000010u)
  25941. #define CSL_CPINTC_TYPE_REG13_TYPE_420_SHIFT (0x00000004u)
  25942. #define CSL_CPINTC_TYPE_REG13_TYPE_420_RESETVAL (0x00000000u)
  25943. #define CSL_CPINTC_TYPE_REG13_TYPE_421_MASK (0x00000020u)
  25944. #define CSL_CPINTC_TYPE_REG13_TYPE_421_SHIFT (0x00000005u)
  25945. #define CSL_CPINTC_TYPE_REG13_TYPE_421_RESETVAL (0x00000000u)
  25946. #define CSL_CPINTC_TYPE_REG13_TYPE_422_MASK (0x00000040u)
  25947. #define CSL_CPINTC_TYPE_REG13_TYPE_422_SHIFT (0x00000006u)
  25948. #define CSL_CPINTC_TYPE_REG13_TYPE_422_RESETVAL (0x00000000u)
  25949. #define CSL_CPINTC_TYPE_REG13_TYPE_423_MASK (0x00000080u)
  25950. #define CSL_CPINTC_TYPE_REG13_TYPE_423_SHIFT (0x00000007u)
  25951. #define CSL_CPINTC_TYPE_REG13_TYPE_423_RESETVAL (0x00000000u)
  25952. #define CSL_CPINTC_TYPE_REG13_TYPE_424_MASK (0x00000100u)
  25953. #define CSL_CPINTC_TYPE_REG13_TYPE_424_SHIFT (0x00000008u)
  25954. #define CSL_CPINTC_TYPE_REG13_TYPE_424_RESETVAL (0x00000000u)
  25955. #define CSL_CPINTC_TYPE_REG13_TYPE_425_MASK (0x00000200u)
  25956. #define CSL_CPINTC_TYPE_REG13_TYPE_425_SHIFT (0x00000009u)
  25957. #define CSL_CPINTC_TYPE_REG13_TYPE_425_RESETVAL (0x00000000u)
  25958. #define CSL_CPINTC_TYPE_REG13_TYPE_426_MASK (0x00000400u)
  25959. #define CSL_CPINTC_TYPE_REG13_TYPE_426_SHIFT (0x0000000Au)
  25960. #define CSL_CPINTC_TYPE_REG13_TYPE_426_RESETVAL (0x00000000u)
  25961. #define CSL_CPINTC_TYPE_REG13_TYPE_427_MASK (0x00000800u)
  25962. #define CSL_CPINTC_TYPE_REG13_TYPE_427_SHIFT (0x0000000Bu)
  25963. #define CSL_CPINTC_TYPE_REG13_TYPE_427_RESETVAL (0x00000000u)
  25964. #define CSL_CPINTC_TYPE_REG13_TYPE_428_MASK (0x00001000u)
  25965. #define CSL_CPINTC_TYPE_REG13_TYPE_428_SHIFT (0x0000000Cu)
  25966. #define CSL_CPINTC_TYPE_REG13_TYPE_428_RESETVAL (0x00000000u)
  25967. #define CSL_CPINTC_TYPE_REG13_TYPE_429_MASK (0x00002000u)
  25968. #define CSL_CPINTC_TYPE_REG13_TYPE_429_SHIFT (0x0000000Du)
  25969. #define CSL_CPINTC_TYPE_REG13_TYPE_429_RESETVAL (0x00000000u)
  25970. #define CSL_CPINTC_TYPE_REG13_TYPE_430_MASK (0x00004000u)
  25971. #define CSL_CPINTC_TYPE_REG13_TYPE_430_SHIFT (0x0000000Eu)
  25972. #define CSL_CPINTC_TYPE_REG13_TYPE_430_RESETVAL (0x00000000u)
  25973. #define CSL_CPINTC_TYPE_REG13_TYPE_431_MASK (0x00008000u)
  25974. #define CSL_CPINTC_TYPE_REG13_TYPE_431_SHIFT (0x0000000Fu)
  25975. #define CSL_CPINTC_TYPE_REG13_TYPE_431_RESETVAL (0x00000000u)
  25976. #define CSL_CPINTC_TYPE_REG13_TYPE_432_MASK (0x00010000u)
  25977. #define CSL_CPINTC_TYPE_REG13_TYPE_432_SHIFT (0x00000010u)
  25978. #define CSL_CPINTC_TYPE_REG13_TYPE_432_RESETVAL (0x00000000u)
  25979. #define CSL_CPINTC_TYPE_REG13_TYPE_433_MASK (0x00020000u)
  25980. #define CSL_CPINTC_TYPE_REG13_TYPE_433_SHIFT (0x00000011u)
  25981. #define CSL_CPINTC_TYPE_REG13_TYPE_433_RESETVAL (0x00000000u)
  25982. #define CSL_CPINTC_TYPE_REG13_TYPE_434_MASK (0x00040000u)
  25983. #define CSL_CPINTC_TYPE_REG13_TYPE_434_SHIFT (0x00000012u)
  25984. #define CSL_CPINTC_TYPE_REG13_TYPE_434_RESETVAL (0x00000000u)
  25985. #define CSL_CPINTC_TYPE_REG13_TYPE_435_MASK (0x00080000u)
  25986. #define CSL_CPINTC_TYPE_REG13_TYPE_435_SHIFT (0x00000013u)
  25987. #define CSL_CPINTC_TYPE_REG13_TYPE_435_RESETVAL (0x00000000u)
  25988. #define CSL_CPINTC_TYPE_REG13_TYPE_436_MASK (0x00100000u)
  25989. #define CSL_CPINTC_TYPE_REG13_TYPE_436_SHIFT (0x00000014u)
  25990. #define CSL_CPINTC_TYPE_REG13_TYPE_436_RESETVAL (0x00000000u)
  25991. #define CSL_CPINTC_TYPE_REG13_TYPE_437_MASK (0x00200000u)
  25992. #define CSL_CPINTC_TYPE_REG13_TYPE_437_SHIFT (0x00000015u)
  25993. #define CSL_CPINTC_TYPE_REG13_TYPE_437_RESETVAL (0x00000000u)
  25994. #define CSL_CPINTC_TYPE_REG13_TYPE_438_MASK (0x00400000u)
  25995. #define CSL_CPINTC_TYPE_REG13_TYPE_438_SHIFT (0x00000016u)
  25996. #define CSL_CPINTC_TYPE_REG13_TYPE_438_RESETVAL (0x00000000u)
  25997. #define CSL_CPINTC_TYPE_REG13_TYPE_439_MASK (0x00800000u)
  25998. #define CSL_CPINTC_TYPE_REG13_TYPE_439_SHIFT (0x00000017u)
  25999. #define CSL_CPINTC_TYPE_REG13_TYPE_439_RESETVAL (0x00000000u)
  26000. #define CSL_CPINTC_TYPE_REG13_TYPE_440_MASK (0x01000000u)
  26001. #define CSL_CPINTC_TYPE_REG13_TYPE_440_SHIFT (0x00000018u)
  26002. #define CSL_CPINTC_TYPE_REG13_TYPE_440_RESETVAL (0x00000000u)
  26003. #define CSL_CPINTC_TYPE_REG13_TYPE_441_MASK (0x02000000u)
  26004. #define CSL_CPINTC_TYPE_REG13_TYPE_441_SHIFT (0x00000019u)
  26005. #define CSL_CPINTC_TYPE_REG13_TYPE_441_RESETVAL (0x00000000u)
  26006. #define CSL_CPINTC_TYPE_REG13_TYPE_442_MASK (0x04000000u)
  26007. #define CSL_CPINTC_TYPE_REG13_TYPE_442_SHIFT (0x0000001Au)
  26008. #define CSL_CPINTC_TYPE_REG13_TYPE_442_RESETVAL (0x00000000u)
  26009. #define CSL_CPINTC_TYPE_REG13_TYPE_443_MASK (0x08000000u)
  26010. #define CSL_CPINTC_TYPE_REG13_TYPE_443_SHIFT (0x0000001Bu)
  26011. #define CSL_CPINTC_TYPE_REG13_TYPE_443_RESETVAL (0x00000000u)
  26012. #define CSL_CPINTC_TYPE_REG13_TYPE_444_MASK (0x10000000u)
  26013. #define CSL_CPINTC_TYPE_REG13_TYPE_444_SHIFT (0x0000001Cu)
  26014. #define CSL_CPINTC_TYPE_REG13_TYPE_444_RESETVAL (0x00000000u)
  26015. #define CSL_CPINTC_TYPE_REG13_TYPE_445_MASK (0x20000000u)
  26016. #define CSL_CPINTC_TYPE_REG13_TYPE_445_SHIFT (0x0000001Du)
  26017. #define CSL_CPINTC_TYPE_REG13_TYPE_445_RESETVAL (0x00000000u)
  26018. #define CSL_CPINTC_TYPE_REG13_TYPE_446_MASK (0x40000000u)
  26019. #define CSL_CPINTC_TYPE_REG13_TYPE_446_SHIFT (0x0000001Eu)
  26020. #define CSL_CPINTC_TYPE_REG13_TYPE_446_RESETVAL (0x00000000u)
  26021. #define CSL_CPINTC_TYPE_REG13_TYPE_447_MASK (0x80000000u)
  26022. #define CSL_CPINTC_TYPE_REG13_TYPE_447_SHIFT (0x0000001Fu)
  26023. #define CSL_CPINTC_TYPE_REG13_TYPE_447_RESETVAL (0x00000000u)
  26024. #define CSL_CPINTC_TYPE_REG13_RESETVAL (0x00000000u)
  26025. /* type_reg14 */
  26026. #define CSL_CPINTC_TYPE_REG14_TYPE_448_MASK (0x00000001u)
  26027. #define CSL_CPINTC_TYPE_REG14_TYPE_448_SHIFT (0x00000000u)
  26028. #define CSL_CPINTC_TYPE_REG14_TYPE_448_RESETVAL (0x00000000u)
  26029. #define CSL_CPINTC_TYPE_REG14_TYPE_449_MASK (0x00000002u)
  26030. #define CSL_CPINTC_TYPE_REG14_TYPE_449_SHIFT (0x00000001u)
  26031. #define CSL_CPINTC_TYPE_REG14_TYPE_449_RESETVAL (0x00000000u)
  26032. #define CSL_CPINTC_TYPE_REG14_TYPE_450_MASK (0x00000004u)
  26033. #define CSL_CPINTC_TYPE_REG14_TYPE_450_SHIFT (0x00000002u)
  26034. #define CSL_CPINTC_TYPE_REG14_TYPE_450_RESETVAL (0x00000000u)
  26035. #define CSL_CPINTC_TYPE_REG14_TYPE_451_MASK (0x00000008u)
  26036. #define CSL_CPINTC_TYPE_REG14_TYPE_451_SHIFT (0x00000003u)
  26037. #define CSL_CPINTC_TYPE_REG14_TYPE_451_RESETVAL (0x00000000u)
  26038. #define CSL_CPINTC_TYPE_REG14_TYPE_452_MASK (0x00000010u)
  26039. #define CSL_CPINTC_TYPE_REG14_TYPE_452_SHIFT (0x00000004u)
  26040. #define CSL_CPINTC_TYPE_REG14_TYPE_452_RESETVAL (0x00000000u)
  26041. #define CSL_CPINTC_TYPE_REG14_TYPE_453_MASK (0x00000020u)
  26042. #define CSL_CPINTC_TYPE_REG14_TYPE_453_SHIFT (0x00000005u)
  26043. #define CSL_CPINTC_TYPE_REG14_TYPE_453_RESETVAL (0x00000000u)
  26044. #define CSL_CPINTC_TYPE_REG14_TYPE_454_MASK (0x00000040u)
  26045. #define CSL_CPINTC_TYPE_REG14_TYPE_454_SHIFT (0x00000006u)
  26046. #define CSL_CPINTC_TYPE_REG14_TYPE_454_RESETVAL (0x00000000u)
  26047. #define CSL_CPINTC_TYPE_REG14_TYPE_455_MASK (0x00000080u)
  26048. #define CSL_CPINTC_TYPE_REG14_TYPE_455_SHIFT (0x00000007u)
  26049. #define CSL_CPINTC_TYPE_REG14_TYPE_455_RESETVAL (0x00000000u)
  26050. #define CSL_CPINTC_TYPE_REG14_TYPE_456_MASK (0x00000100u)
  26051. #define CSL_CPINTC_TYPE_REG14_TYPE_456_SHIFT (0x00000008u)
  26052. #define CSL_CPINTC_TYPE_REG14_TYPE_456_RESETVAL (0x00000000u)
  26053. #define CSL_CPINTC_TYPE_REG14_TYPE_457_MASK (0x00000200u)
  26054. #define CSL_CPINTC_TYPE_REG14_TYPE_457_SHIFT (0x00000009u)
  26055. #define CSL_CPINTC_TYPE_REG14_TYPE_457_RESETVAL (0x00000000u)
  26056. #define CSL_CPINTC_TYPE_REG14_TYPE_458_MASK (0x00000400u)
  26057. #define CSL_CPINTC_TYPE_REG14_TYPE_458_SHIFT (0x0000000Au)
  26058. #define CSL_CPINTC_TYPE_REG14_TYPE_458_RESETVAL (0x00000000u)
  26059. #define CSL_CPINTC_TYPE_REG14_TYPE_459_MASK (0x00000800u)
  26060. #define CSL_CPINTC_TYPE_REG14_TYPE_459_SHIFT (0x0000000Bu)
  26061. #define CSL_CPINTC_TYPE_REG14_TYPE_459_RESETVAL (0x00000000u)
  26062. #define CSL_CPINTC_TYPE_REG14_TYPE_460_MASK (0x00001000u)
  26063. #define CSL_CPINTC_TYPE_REG14_TYPE_460_SHIFT (0x0000000Cu)
  26064. #define CSL_CPINTC_TYPE_REG14_TYPE_460_RESETVAL (0x00000000u)
  26065. #define CSL_CPINTC_TYPE_REG14_TYPE_461_MASK (0x00002000u)
  26066. #define CSL_CPINTC_TYPE_REG14_TYPE_461_SHIFT (0x0000000Du)
  26067. #define CSL_CPINTC_TYPE_REG14_TYPE_461_RESETVAL (0x00000000u)
  26068. #define CSL_CPINTC_TYPE_REG14_TYPE_462_MASK (0x00004000u)
  26069. #define CSL_CPINTC_TYPE_REG14_TYPE_462_SHIFT (0x0000000Eu)
  26070. #define CSL_CPINTC_TYPE_REG14_TYPE_462_RESETVAL (0x00000000u)
  26071. #define CSL_CPINTC_TYPE_REG14_TYPE_463_MASK (0x00008000u)
  26072. #define CSL_CPINTC_TYPE_REG14_TYPE_463_SHIFT (0x0000000Fu)
  26073. #define CSL_CPINTC_TYPE_REG14_TYPE_463_RESETVAL (0x00000000u)
  26074. #define CSL_CPINTC_TYPE_REG14_TYPE_464_MASK (0x00010000u)
  26075. #define CSL_CPINTC_TYPE_REG14_TYPE_464_SHIFT (0x00000010u)
  26076. #define CSL_CPINTC_TYPE_REG14_TYPE_464_RESETVAL (0x00000000u)
  26077. #define CSL_CPINTC_TYPE_REG14_TYPE_465_MASK (0x00020000u)
  26078. #define CSL_CPINTC_TYPE_REG14_TYPE_465_SHIFT (0x00000011u)
  26079. #define CSL_CPINTC_TYPE_REG14_TYPE_465_RESETVAL (0x00000000u)
  26080. #define CSL_CPINTC_TYPE_REG14_TYPE_466_MASK (0x00040000u)
  26081. #define CSL_CPINTC_TYPE_REG14_TYPE_466_SHIFT (0x00000012u)
  26082. #define CSL_CPINTC_TYPE_REG14_TYPE_466_RESETVAL (0x00000000u)
  26083. #define CSL_CPINTC_TYPE_REG14_TYPE_467_MASK (0x00080000u)
  26084. #define CSL_CPINTC_TYPE_REG14_TYPE_467_SHIFT (0x00000013u)
  26085. #define CSL_CPINTC_TYPE_REG14_TYPE_467_RESETVAL (0x00000000u)
  26086. #define CSL_CPINTC_TYPE_REG14_TYPE_468_MASK (0x00100000u)
  26087. #define CSL_CPINTC_TYPE_REG14_TYPE_468_SHIFT (0x00000014u)
  26088. #define CSL_CPINTC_TYPE_REG14_TYPE_468_RESETVAL (0x00000000u)
  26089. #define CSL_CPINTC_TYPE_REG14_TYPE_469_MASK (0x00200000u)
  26090. #define CSL_CPINTC_TYPE_REG14_TYPE_469_SHIFT (0x00000015u)
  26091. #define CSL_CPINTC_TYPE_REG14_TYPE_469_RESETVAL (0x00000000u)
  26092. #define CSL_CPINTC_TYPE_REG14_TYPE_470_MASK (0x00400000u)
  26093. #define CSL_CPINTC_TYPE_REG14_TYPE_470_SHIFT (0x00000016u)
  26094. #define CSL_CPINTC_TYPE_REG14_TYPE_470_RESETVAL (0x00000000u)
  26095. #define CSL_CPINTC_TYPE_REG14_TYPE_471_MASK (0x00800000u)
  26096. #define CSL_CPINTC_TYPE_REG14_TYPE_471_SHIFT (0x00000017u)
  26097. #define CSL_CPINTC_TYPE_REG14_TYPE_471_RESETVAL (0x00000000u)
  26098. #define CSL_CPINTC_TYPE_REG14_TYPE_472_MASK (0x01000000u)
  26099. #define CSL_CPINTC_TYPE_REG14_TYPE_472_SHIFT (0x00000018u)
  26100. #define CSL_CPINTC_TYPE_REG14_TYPE_472_RESETVAL (0x00000000u)
  26101. #define CSL_CPINTC_TYPE_REG14_TYPE_473_MASK (0x02000000u)
  26102. #define CSL_CPINTC_TYPE_REG14_TYPE_473_SHIFT (0x00000019u)
  26103. #define CSL_CPINTC_TYPE_REG14_TYPE_473_RESETVAL (0x00000000u)
  26104. #define CSL_CPINTC_TYPE_REG14_TYPE_474_MASK (0x04000000u)
  26105. #define CSL_CPINTC_TYPE_REG14_TYPE_474_SHIFT (0x0000001Au)
  26106. #define CSL_CPINTC_TYPE_REG14_TYPE_474_RESETVAL (0x00000000u)
  26107. #define CSL_CPINTC_TYPE_REG14_TYPE_475_MASK (0x08000000u)
  26108. #define CSL_CPINTC_TYPE_REG14_TYPE_475_SHIFT (0x0000001Bu)
  26109. #define CSL_CPINTC_TYPE_REG14_TYPE_475_RESETVAL (0x00000000u)
  26110. #define CSL_CPINTC_TYPE_REG14_TYPE_476_MASK (0x10000000u)
  26111. #define CSL_CPINTC_TYPE_REG14_TYPE_476_SHIFT (0x0000001Cu)
  26112. #define CSL_CPINTC_TYPE_REG14_TYPE_476_RESETVAL (0x00000000u)
  26113. #define CSL_CPINTC_TYPE_REG14_TYPE_477_MASK (0x20000000u)
  26114. #define CSL_CPINTC_TYPE_REG14_TYPE_477_SHIFT (0x0000001Du)
  26115. #define CSL_CPINTC_TYPE_REG14_TYPE_477_RESETVAL (0x00000000u)
  26116. #define CSL_CPINTC_TYPE_REG14_TYPE_478_MASK (0x40000000u)
  26117. #define CSL_CPINTC_TYPE_REG14_TYPE_478_SHIFT (0x0000001Eu)
  26118. #define CSL_CPINTC_TYPE_REG14_TYPE_478_RESETVAL (0x00000000u)
  26119. #define CSL_CPINTC_TYPE_REG14_TYPE_479_MASK (0x80000000u)
  26120. #define CSL_CPINTC_TYPE_REG14_TYPE_479_SHIFT (0x0000001Fu)
  26121. #define CSL_CPINTC_TYPE_REG14_TYPE_479_RESETVAL (0x00000000u)
  26122. #define CSL_CPINTC_TYPE_REG14_RESETVAL (0x00000000u)
  26123. /* type_reg15 */
  26124. #define CSL_CPINTC_TYPE_REG15_TYPE_480_MASK (0x00000001u)
  26125. #define CSL_CPINTC_TYPE_REG15_TYPE_480_SHIFT (0x00000000u)
  26126. #define CSL_CPINTC_TYPE_REG15_TYPE_480_RESETVAL (0x00000000u)
  26127. #define CSL_CPINTC_TYPE_REG15_TYPE_481_MASK (0x00000002u)
  26128. #define CSL_CPINTC_TYPE_REG15_TYPE_481_SHIFT (0x00000001u)
  26129. #define CSL_CPINTC_TYPE_REG15_TYPE_481_RESETVAL (0x00000000u)
  26130. #define CSL_CPINTC_TYPE_REG15_TYPE_482_MASK (0x00000004u)
  26131. #define CSL_CPINTC_TYPE_REG15_TYPE_482_SHIFT (0x00000002u)
  26132. #define CSL_CPINTC_TYPE_REG15_TYPE_482_RESETVAL (0x00000000u)
  26133. #define CSL_CPINTC_TYPE_REG15_TYPE_483_MASK (0x00000008u)
  26134. #define CSL_CPINTC_TYPE_REG15_TYPE_483_SHIFT (0x00000003u)
  26135. #define CSL_CPINTC_TYPE_REG15_TYPE_483_RESETVAL (0x00000000u)
  26136. #define CSL_CPINTC_TYPE_REG15_TYPE_484_MASK (0x00000010u)
  26137. #define CSL_CPINTC_TYPE_REG15_TYPE_484_SHIFT (0x00000004u)
  26138. #define CSL_CPINTC_TYPE_REG15_TYPE_484_RESETVAL (0x00000000u)
  26139. #define CSL_CPINTC_TYPE_REG15_TYPE_485_MASK (0x00000020u)
  26140. #define CSL_CPINTC_TYPE_REG15_TYPE_485_SHIFT (0x00000005u)
  26141. #define CSL_CPINTC_TYPE_REG15_TYPE_485_RESETVAL (0x00000000u)
  26142. #define CSL_CPINTC_TYPE_REG15_TYPE_486_MASK (0x00000040u)
  26143. #define CSL_CPINTC_TYPE_REG15_TYPE_486_SHIFT (0x00000006u)
  26144. #define CSL_CPINTC_TYPE_REG15_TYPE_486_RESETVAL (0x00000000u)
  26145. #define CSL_CPINTC_TYPE_REG15_TYPE_487_MASK (0x00000080u)
  26146. #define CSL_CPINTC_TYPE_REG15_TYPE_487_SHIFT (0x00000007u)
  26147. #define CSL_CPINTC_TYPE_REG15_TYPE_487_RESETVAL (0x00000000u)
  26148. #define CSL_CPINTC_TYPE_REG15_TYPE_488_MASK (0x00000100u)
  26149. #define CSL_CPINTC_TYPE_REG15_TYPE_488_SHIFT (0x00000008u)
  26150. #define CSL_CPINTC_TYPE_REG15_TYPE_488_RESETVAL (0x00000000u)
  26151. #define CSL_CPINTC_TYPE_REG15_TYPE_489_MASK (0x00000200u)
  26152. #define CSL_CPINTC_TYPE_REG15_TYPE_489_SHIFT (0x00000009u)
  26153. #define CSL_CPINTC_TYPE_REG15_TYPE_489_RESETVAL (0x00000000u)
  26154. #define CSL_CPINTC_TYPE_REG15_TYPE_490_MASK (0x00000400u)
  26155. #define CSL_CPINTC_TYPE_REG15_TYPE_490_SHIFT (0x0000000Au)
  26156. #define CSL_CPINTC_TYPE_REG15_TYPE_490_RESETVAL (0x00000000u)
  26157. #define CSL_CPINTC_TYPE_REG15_TYPE_491_MASK (0x00000800u)
  26158. #define CSL_CPINTC_TYPE_REG15_TYPE_491_SHIFT (0x0000000Bu)
  26159. #define CSL_CPINTC_TYPE_REG15_TYPE_491_RESETVAL (0x00000000u)
  26160. #define CSL_CPINTC_TYPE_REG15_TYPE_492_MASK (0x00001000u)
  26161. #define CSL_CPINTC_TYPE_REG15_TYPE_492_SHIFT (0x0000000Cu)
  26162. #define CSL_CPINTC_TYPE_REG15_TYPE_492_RESETVAL (0x00000000u)
  26163. #define CSL_CPINTC_TYPE_REG15_TYPE_493_MASK (0x00002000u)
  26164. #define CSL_CPINTC_TYPE_REG15_TYPE_493_SHIFT (0x0000000Du)
  26165. #define CSL_CPINTC_TYPE_REG15_TYPE_493_RESETVAL (0x00000000u)
  26166. #define CSL_CPINTC_TYPE_REG15_TYPE_494_MASK (0x00004000u)
  26167. #define CSL_CPINTC_TYPE_REG15_TYPE_494_SHIFT (0x0000000Eu)
  26168. #define CSL_CPINTC_TYPE_REG15_TYPE_494_RESETVAL (0x00000000u)
  26169. #define CSL_CPINTC_TYPE_REG15_TYPE_495_MASK (0x00008000u)
  26170. #define CSL_CPINTC_TYPE_REG15_TYPE_495_SHIFT (0x0000000Fu)
  26171. #define CSL_CPINTC_TYPE_REG15_TYPE_495_RESETVAL (0x00000000u)
  26172. #define CSL_CPINTC_TYPE_REG15_TYPE_496_MASK (0x00010000u)
  26173. #define CSL_CPINTC_TYPE_REG15_TYPE_496_SHIFT (0x00000010u)
  26174. #define CSL_CPINTC_TYPE_REG15_TYPE_496_RESETVAL (0x00000000u)
  26175. #define CSL_CPINTC_TYPE_REG15_TYPE_497_MASK (0x00020000u)
  26176. #define CSL_CPINTC_TYPE_REG15_TYPE_497_SHIFT (0x00000011u)
  26177. #define CSL_CPINTC_TYPE_REG15_TYPE_497_RESETVAL (0x00000000u)
  26178. #define CSL_CPINTC_TYPE_REG15_TYPE_498_MASK (0x00040000u)
  26179. #define CSL_CPINTC_TYPE_REG15_TYPE_498_SHIFT (0x00000012u)
  26180. #define CSL_CPINTC_TYPE_REG15_TYPE_498_RESETVAL (0x00000000u)
  26181. #define CSL_CPINTC_TYPE_REG15_TYPE_499_MASK (0x00080000u)
  26182. #define CSL_CPINTC_TYPE_REG15_TYPE_499_SHIFT (0x00000013u)
  26183. #define CSL_CPINTC_TYPE_REG15_TYPE_499_RESETVAL (0x00000000u)
  26184. #define CSL_CPINTC_TYPE_REG15_TYPE_500_MASK (0x00100000u)
  26185. #define CSL_CPINTC_TYPE_REG15_TYPE_500_SHIFT (0x00000014u)
  26186. #define CSL_CPINTC_TYPE_REG15_TYPE_500_RESETVAL (0x00000000u)
  26187. #define CSL_CPINTC_TYPE_REG15_TYPE_501_MASK (0x00200000u)
  26188. #define CSL_CPINTC_TYPE_REG15_TYPE_501_SHIFT (0x00000015u)
  26189. #define CSL_CPINTC_TYPE_REG15_TYPE_501_RESETVAL (0x00000000u)
  26190. #define CSL_CPINTC_TYPE_REG15_TYPE_502_MASK (0x00400000u)
  26191. #define CSL_CPINTC_TYPE_REG15_TYPE_502_SHIFT (0x00000016u)
  26192. #define CSL_CPINTC_TYPE_REG15_TYPE_502_RESETVAL (0x00000000u)
  26193. #define CSL_CPINTC_TYPE_REG15_TYPE_503_MASK (0x00800000u)
  26194. #define CSL_CPINTC_TYPE_REG15_TYPE_503_SHIFT (0x00000017u)
  26195. #define CSL_CPINTC_TYPE_REG15_TYPE_503_RESETVAL (0x00000000u)
  26196. #define CSL_CPINTC_TYPE_REG15_TYPE_504_MASK (0x01000000u)
  26197. #define CSL_CPINTC_TYPE_REG15_TYPE_504_SHIFT (0x00000018u)
  26198. #define CSL_CPINTC_TYPE_REG15_TYPE_504_RESETVAL (0x00000000u)
  26199. #define CSL_CPINTC_TYPE_REG15_TYPE_505_MASK (0x02000000u)
  26200. #define CSL_CPINTC_TYPE_REG15_TYPE_505_SHIFT (0x00000019u)
  26201. #define CSL_CPINTC_TYPE_REG15_TYPE_505_RESETVAL (0x00000000u)
  26202. #define CSL_CPINTC_TYPE_REG15_TYPE_506_MASK (0x04000000u)
  26203. #define CSL_CPINTC_TYPE_REG15_TYPE_506_SHIFT (0x0000001Au)
  26204. #define CSL_CPINTC_TYPE_REG15_TYPE_506_RESETVAL (0x00000000u)
  26205. #define CSL_CPINTC_TYPE_REG15_TYPE_507_MASK (0x08000000u)
  26206. #define CSL_CPINTC_TYPE_REG15_TYPE_507_SHIFT (0x0000001Bu)
  26207. #define CSL_CPINTC_TYPE_REG15_TYPE_507_RESETVAL (0x00000000u)
  26208. #define CSL_CPINTC_TYPE_REG15_TYPE_508_MASK (0x10000000u)
  26209. #define CSL_CPINTC_TYPE_REG15_TYPE_508_SHIFT (0x0000001Cu)
  26210. #define CSL_CPINTC_TYPE_REG15_TYPE_508_RESETVAL (0x00000000u)
  26211. #define CSL_CPINTC_TYPE_REG15_TYPE_509_MASK (0x20000000u)
  26212. #define CSL_CPINTC_TYPE_REG15_TYPE_509_SHIFT (0x0000001Du)
  26213. #define CSL_CPINTC_TYPE_REG15_TYPE_509_RESETVAL (0x00000000u)
  26214. #define CSL_CPINTC_TYPE_REG15_TYPE_510_MASK (0x40000000u)
  26215. #define CSL_CPINTC_TYPE_REG15_TYPE_510_SHIFT (0x0000001Eu)
  26216. #define CSL_CPINTC_TYPE_REG15_TYPE_510_RESETVAL (0x00000000u)
  26217. #define CSL_CPINTC_TYPE_REG15_TYPE_511_MASK (0x80000000u)
  26218. #define CSL_CPINTC_TYPE_REG15_TYPE_511_SHIFT (0x0000001Fu)
  26219. #define CSL_CPINTC_TYPE_REG15_TYPE_511_RESETVAL (0x00000000u)
  26220. #define CSL_CPINTC_TYPE_REG15_RESETVAL (0x00000000u)
  26221. /* type_reg16 */
  26222. #define CSL_CPINTC_TYPE_REG16_TYPE_512_MASK (0x00000001u)
  26223. #define CSL_CPINTC_TYPE_REG16_TYPE_512_SHIFT (0x00000000u)
  26224. #define CSL_CPINTC_TYPE_REG16_TYPE_512_RESETVAL (0x00000000u)
  26225. #define CSL_CPINTC_TYPE_REG16_TYPE_513_MASK (0x00000002u)
  26226. #define CSL_CPINTC_TYPE_REG16_TYPE_513_SHIFT (0x00000001u)
  26227. #define CSL_CPINTC_TYPE_REG16_TYPE_513_RESETVAL (0x00000000u)
  26228. #define CSL_CPINTC_TYPE_REG16_TYPE_514_MASK (0x00000004u)
  26229. #define CSL_CPINTC_TYPE_REG16_TYPE_514_SHIFT (0x00000002u)
  26230. #define CSL_CPINTC_TYPE_REG16_TYPE_514_RESETVAL (0x00000000u)
  26231. #define CSL_CPINTC_TYPE_REG16_TYPE_515_MASK (0x00000008u)
  26232. #define CSL_CPINTC_TYPE_REG16_TYPE_515_SHIFT (0x00000003u)
  26233. #define CSL_CPINTC_TYPE_REG16_TYPE_515_RESETVAL (0x00000000u)
  26234. #define CSL_CPINTC_TYPE_REG16_TYPE_516_MASK (0x00000010u)
  26235. #define CSL_CPINTC_TYPE_REG16_TYPE_516_SHIFT (0x00000004u)
  26236. #define CSL_CPINTC_TYPE_REG16_TYPE_516_RESETVAL (0x00000000u)
  26237. #define CSL_CPINTC_TYPE_REG16_TYPE_517_MASK (0x00000020u)
  26238. #define CSL_CPINTC_TYPE_REG16_TYPE_517_SHIFT (0x00000005u)
  26239. #define CSL_CPINTC_TYPE_REG16_TYPE_517_RESETVAL (0x00000000u)
  26240. #define CSL_CPINTC_TYPE_REG16_TYPE_518_MASK (0x00000040u)
  26241. #define CSL_CPINTC_TYPE_REG16_TYPE_518_SHIFT (0x00000006u)
  26242. #define CSL_CPINTC_TYPE_REG16_TYPE_518_RESETVAL (0x00000000u)
  26243. #define CSL_CPINTC_TYPE_REG16_TYPE_519_MASK (0x00000080u)
  26244. #define CSL_CPINTC_TYPE_REG16_TYPE_519_SHIFT (0x00000007u)
  26245. #define CSL_CPINTC_TYPE_REG16_TYPE_519_RESETVAL (0x00000000u)
  26246. #define CSL_CPINTC_TYPE_REG16_TYPE_520_MASK (0x00000100u)
  26247. #define CSL_CPINTC_TYPE_REG16_TYPE_520_SHIFT (0x00000008u)
  26248. #define CSL_CPINTC_TYPE_REG16_TYPE_520_RESETVAL (0x00000000u)
  26249. #define CSL_CPINTC_TYPE_REG16_TYPE_521_MASK (0x00000200u)
  26250. #define CSL_CPINTC_TYPE_REG16_TYPE_521_SHIFT (0x00000009u)
  26251. #define CSL_CPINTC_TYPE_REG16_TYPE_521_RESETVAL (0x00000000u)
  26252. #define CSL_CPINTC_TYPE_REG16_TYPE_522_MASK (0x00000400u)
  26253. #define CSL_CPINTC_TYPE_REG16_TYPE_522_SHIFT (0x0000000Au)
  26254. #define CSL_CPINTC_TYPE_REG16_TYPE_522_RESETVAL (0x00000000u)
  26255. #define CSL_CPINTC_TYPE_REG16_TYPE_523_MASK (0x00000800u)
  26256. #define CSL_CPINTC_TYPE_REG16_TYPE_523_SHIFT (0x0000000Bu)
  26257. #define CSL_CPINTC_TYPE_REG16_TYPE_523_RESETVAL (0x00000000u)
  26258. #define CSL_CPINTC_TYPE_REG16_TYPE_524_MASK (0x00001000u)
  26259. #define CSL_CPINTC_TYPE_REG16_TYPE_524_SHIFT (0x0000000Cu)
  26260. #define CSL_CPINTC_TYPE_REG16_TYPE_524_RESETVAL (0x00000000u)
  26261. #define CSL_CPINTC_TYPE_REG16_TYPE_525_MASK (0x00002000u)
  26262. #define CSL_CPINTC_TYPE_REG16_TYPE_525_SHIFT (0x0000000Du)
  26263. #define CSL_CPINTC_TYPE_REG16_TYPE_525_RESETVAL (0x00000000u)
  26264. #define CSL_CPINTC_TYPE_REG16_TYPE_526_MASK (0x00004000u)
  26265. #define CSL_CPINTC_TYPE_REG16_TYPE_526_SHIFT (0x0000000Eu)
  26266. #define CSL_CPINTC_TYPE_REG16_TYPE_526_RESETVAL (0x00000000u)
  26267. #define CSL_CPINTC_TYPE_REG16_TYPE_527_MASK (0x00008000u)
  26268. #define CSL_CPINTC_TYPE_REG16_TYPE_527_SHIFT (0x0000000Fu)
  26269. #define CSL_CPINTC_TYPE_REG16_TYPE_527_RESETVAL (0x00000000u)
  26270. #define CSL_CPINTC_TYPE_REG16_TYPE_528_MASK (0x00010000u)
  26271. #define CSL_CPINTC_TYPE_REG16_TYPE_528_SHIFT (0x00000010u)
  26272. #define CSL_CPINTC_TYPE_REG16_TYPE_528_RESETVAL (0x00000000u)
  26273. #define CSL_CPINTC_TYPE_REG16_TYPE_529_MASK (0x00020000u)
  26274. #define CSL_CPINTC_TYPE_REG16_TYPE_529_SHIFT (0x00000011u)
  26275. #define CSL_CPINTC_TYPE_REG16_TYPE_529_RESETVAL (0x00000000u)
  26276. #define CSL_CPINTC_TYPE_REG16_TYPE_530_MASK (0x00040000u)
  26277. #define CSL_CPINTC_TYPE_REG16_TYPE_530_SHIFT (0x00000012u)
  26278. #define CSL_CPINTC_TYPE_REG16_TYPE_530_RESETVAL (0x00000000u)
  26279. #define CSL_CPINTC_TYPE_REG16_TYPE_531_MASK (0x00080000u)
  26280. #define CSL_CPINTC_TYPE_REG16_TYPE_531_SHIFT (0x00000013u)
  26281. #define CSL_CPINTC_TYPE_REG16_TYPE_531_RESETVAL (0x00000000u)
  26282. #define CSL_CPINTC_TYPE_REG16_TYPE_532_MASK (0x00100000u)
  26283. #define CSL_CPINTC_TYPE_REG16_TYPE_532_SHIFT (0x00000014u)
  26284. #define CSL_CPINTC_TYPE_REG16_TYPE_532_RESETVAL (0x00000000u)
  26285. #define CSL_CPINTC_TYPE_REG16_TYPE_533_MASK (0x00200000u)
  26286. #define CSL_CPINTC_TYPE_REG16_TYPE_533_SHIFT (0x00000015u)
  26287. #define CSL_CPINTC_TYPE_REG16_TYPE_533_RESETVAL (0x00000000u)
  26288. #define CSL_CPINTC_TYPE_REG16_TYPE_534_MASK (0x00400000u)
  26289. #define CSL_CPINTC_TYPE_REG16_TYPE_534_SHIFT (0x00000016u)
  26290. #define CSL_CPINTC_TYPE_REG16_TYPE_534_RESETVAL (0x00000000u)
  26291. #define CSL_CPINTC_TYPE_REG16_TYPE_535_MASK (0x00800000u)
  26292. #define CSL_CPINTC_TYPE_REG16_TYPE_535_SHIFT (0x00000017u)
  26293. #define CSL_CPINTC_TYPE_REG16_TYPE_535_RESETVAL (0x00000000u)
  26294. #define CSL_CPINTC_TYPE_REG16_TYPE_536_MASK (0x01000000u)
  26295. #define CSL_CPINTC_TYPE_REG16_TYPE_536_SHIFT (0x00000018u)
  26296. #define CSL_CPINTC_TYPE_REG16_TYPE_536_RESETVAL (0x00000000u)
  26297. #define CSL_CPINTC_TYPE_REG16_TYPE_537_MASK (0x02000000u)
  26298. #define CSL_CPINTC_TYPE_REG16_TYPE_537_SHIFT (0x00000019u)
  26299. #define CSL_CPINTC_TYPE_REG16_TYPE_537_RESETVAL (0x00000000u)
  26300. #define CSL_CPINTC_TYPE_REG16_TYPE_538_MASK (0x04000000u)
  26301. #define CSL_CPINTC_TYPE_REG16_TYPE_538_SHIFT (0x0000001Au)
  26302. #define CSL_CPINTC_TYPE_REG16_TYPE_538_RESETVAL (0x00000000u)
  26303. #define CSL_CPINTC_TYPE_REG16_TYPE_539_MASK (0x08000000u)
  26304. #define CSL_CPINTC_TYPE_REG16_TYPE_539_SHIFT (0x0000001Bu)
  26305. #define CSL_CPINTC_TYPE_REG16_TYPE_539_RESETVAL (0x00000000u)
  26306. #define CSL_CPINTC_TYPE_REG16_TYPE_540_MASK (0x10000000u)
  26307. #define CSL_CPINTC_TYPE_REG16_TYPE_540_SHIFT (0x0000001Cu)
  26308. #define CSL_CPINTC_TYPE_REG16_TYPE_540_RESETVAL (0x00000000u)
  26309. #define CSL_CPINTC_TYPE_REG16_TYPE_541_MASK (0x20000000u)
  26310. #define CSL_CPINTC_TYPE_REG16_TYPE_541_SHIFT (0x0000001Du)
  26311. #define CSL_CPINTC_TYPE_REG16_TYPE_541_RESETVAL (0x00000000u)
  26312. #define CSL_CPINTC_TYPE_REG16_TYPE_542_MASK (0x40000000u)
  26313. #define CSL_CPINTC_TYPE_REG16_TYPE_542_SHIFT (0x0000001Eu)
  26314. #define CSL_CPINTC_TYPE_REG16_TYPE_542_RESETVAL (0x00000000u)
  26315. #define CSL_CPINTC_TYPE_REG16_TYPE_543_MASK (0x80000000u)
  26316. #define CSL_CPINTC_TYPE_REG16_TYPE_543_SHIFT (0x0000001Fu)
  26317. #define CSL_CPINTC_TYPE_REG16_TYPE_543_RESETVAL (0x00000000u)
  26318. #define CSL_CPINTC_TYPE_REG16_RESETVAL (0x00000000u)
  26319. /* type_reg17 */
  26320. #define CSL_CPINTC_TYPE_REG17_TYPE_544_MASK (0x00000001u)
  26321. #define CSL_CPINTC_TYPE_REG17_TYPE_544_SHIFT (0x00000000u)
  26322. #define CSL_CPINTC_TYPE_REG17_TYPE_544_RESETVAL (0x00000000u)
  26323. #define CSL_CPINTC_TYPE_REG17_TYPE_545_MASK (0x00000002u)
  26324. #define CSL_CPINTC_TYPE_REG17_TYPE_545_SHIFT (0x00000001u)
  26325. #define CSL_CPINTC_TYPE_REG17_TYPE_545_RESETVAL (0x00000000u)
  26326. #define CSL_CPINTC_TYPE_REG17_TYPE_546_MASK (0x00000004u)
  26327. #define CSL_CPINTC_TYPE_REG17_TYPE_546_SHIFT (0x00000002u)
  26328. #define CSL_CPINTC_TYPE_REG17_TYPE_546_RESETVAL (0x00000000u)
  26329. #define CSL_CPINTC_TYPE_REG17_TYPE_547_MASK (0x00000008u)
  26330. #define CSL_CPINTC_TYPE_REG17_TYPE_547_SHIFT (0x00000003u)
  26331. #define CSL_CPINTC_TYPE_REG17_TYPE_547_RESETVAL (0x00000000u)
  26332. #define CSL_CPINTC_TYPE_REG17_TYPE_548_MASK (0x00000010u)
  26333. #define CSL_CPINTC_TYPE_REG17_TYPE_548_SHIFT (0x00000004u)
  26334. #define CSL_CPINTC_TYPE_REG17_TYPE_548_RESETVAL (0x00000000u)
  26335. #define CSL_CPINTC_TYPE_REG17_TYPE_549_MASK (0x00000020u)
  26336. #define CSL_CPINTC_TYPE_REG17_TYPE_549_SHIFT (0x00000005u)
  26337. #define CSL_CPINTC_TYPE_REG17_TYPE_549_RESETVAL (0x00000000u)
  26338. #define CSL_CPINTC_TYPE_REG17_TYPE_550_MASK (0x00000040u)
  26339. #define CSL_CPINTC_TYPE_REG17_TYPE_550_SHIFT (0x00000006u)
  26340. #define CSL_CPINTC_TYPE_REG17_TYPE_550_RESETVAL (0x00000000u)
  26341. #define CSL_CPINTC_TYPE_REG17_TYPE_551_MASK (0x00000080u)
  26342. #define CSL_CPINTC_TYPE_REG17_TYPE_551_SHIFT (0x00000007u)
  26343. #define CSL_CPINTC_TYPE_REG17_TYPE_551_RESETVAL (0x00000000u)
  26344. #define CSL_CPINTC_TYPE_REG17_TYPE_552_MASK (0x00000100u)
  26345. #define CSL_CPINTC_TYPE_REG17_TYPE_552_SHIFT (0x00000008u)
  26346. #define CSL_CPINTC_TYPE_REG17_TYPE_552_RESETVAL (0x00000000u)
  26347. #define CSL_CPINTC_TYPE_REG17_TYPE_553_MASK (0x00000200u)
  26348. #define CSL_CPINTC_TYPE_REG17_TYPE_553_SHIFT (0x00000009u)
  26349. #define CSL_CPINTC_TYPE_REG17_TYPE_553_RESETVAL (0x00000000u)
  26350. #define CSL_CPINTC_TYPE_REG17_TYPE_554_MASK (0x00000400u)
  26351. #define CSL_CPINTC_TYPE_REG17_TYPE_554_SHIFT (0x0000000Au)
  26352. #define CSL_CPINTC_TYPE_REG17_TYPE_554_RESETVAL (0x00000000u)
  26353. #define CSL_CPINTC_TYPE_REG17_TYPE_555_MASK (0x00000800u)
  26354. #define CSL_CPINTC_TYPE_REG17_TYPE_555_SHIFT (0x0000000Bu)
  26355. #define CSL_CPINTC_TYPE_REG17_TYPE_555_RESETVAL (0x00000000u)
  26356. #define CSL_CPINTC_TYPE_REG17_TYPE_556_MASK (0x00001000u)
  26357. #define CSL_CPINTC_TYPE_REG17_TYPE_556_SHIFT (0x0000000Cu)
  26358. #define CSL_CPINTC_TYPE_REG17_TYPE_556_RESETVAL (0x00000000u)
  26359. #define CSL_CPINTC_TYPE_REG17_TYPE_557_MASK (0x00002000u)
  26360. #define CSL_CPINTC_TYPE_REG17_TYPE_557_SHIFT (0x0000000Du)
  26361. #define CSL_CPINTC_TYPE_REG17_TYPE_557_RESETVAL (0x00000000u)
  26362. #define CSL_CPINTC_TYPE_REG17_TYPE_558_MASK (0x00004000u)
  26363. #define CSL_CPINTC_TYPE_REG17_TYPE_558_SHIFT (0x0000000Eu)
  26364. #define CSL_CPINTC_TYPE_REG17_TYPE_558_RESETVAL (0x00000000u)
  26365. #define CSL_CPINTC_TYPE_REG17_TYPE_559_MASK (0x00008000u)
  26366. #define CSL_CPINTC_TYPE_REG17_TYPE_559_SHIFT (0x0000000Fu)
  26367. #define CSL_CPINTC_TYPE_REG17_TYPE_559_RESETVAL (0x00000000u)
  26368. #define CSL_CPINTC_TYPE_REG17_TYPE_560_MASK (0x00010000u)
  26369. #define CSL_CPINTC_TYPE_REG17_TYPE_560_SHIFT (0x00000010u)
  26370. #define CSL_CPINTC_TYPE_REG17_TYPE_560_RESETVAL (0x00000000u)
  26371. #define CSL_CPINTC_TYPE_REG17_TYPE_561_MASK (0x00020000u)
  26372. #define CSL_CPINTC_TYPE_REG17_TYPE_561_SHIFT (0x00000011u)
  26373. #define CSL_CPINTC_TYPE_REG17_TYPE_561_RESETVAL (0x00000000u)
  26374. #define CSL_CPINTC_TYPE_REG17_TYPE_562_MASK (0x00040000u)
  26375. #define CSL_CPINTC_TYPE_REG17_TYPE_562_SHIFT (0x00000012u)
  26376. #define CSL_CPINTC_TYPE_REG17_TYPE_562_RESETVAL (0x00000000u)
  26377. #define CSL_CPINTC_TYPE_REG17_TYPE_563_MASK (0x00080000u)
  26378. #define CSL_CPINTC_TYPE_REG17_TYPE_563_SHIFT (0x00000013u)
  26379. #define CSL_CPINTC_TYPE_REG17_TYPE_563_RESETVAL (0x00000000u)
  26380. #define CSL_CPINTC_TYPE_REG17_TYPE_564_MASK (0x00100000u)
  26381. #define CSL_CPINTC_TYPE_REG17_TYPE_564_SHIFT (0x00000014u)
  26382. #define CSL_CPINTC_TYPE_REG17_TYPE_564_RESETVAL (0x00000000u)
  26383. #define CSL_CPINTC_TYPE_REG17_TYPE_565_MASK (0x00200000u)
  26384. #define CSL_CPINTC_TYPE_REG17_TYPE_565_SHIFT (0x00000015u)
  26385. #define CSL_CPINTC_TYPE_REG17_TYPE_565_RESETVAL (0x00000000u)
  26386. #define CSL_CPINTC_TYPE_REG17_TYPE_566_MASK (0x00400000u)
  26387. #define CSL_CPINTC_TYPE_REG17_TYPE_566_SHIFT (0x00000016u)
  26388. #define CSL_CPINTC_TYPE_REG17_TYPE_566_RESETVAL (0x00000000u)
  26389. #define CSL_CPINTC_TYPE_REG17_TYPE_567_MASK (0x00800000u)
  26390. #define CSL_CPINTC_TYPE_REG17_TYPE_567_SHIFT (0x00000017u)
  26391. #define CSL_CPINTC_TYPE_REG17_TYPE_567_RESETVAL (0x00000000u)
  26392. #define CSL_CPINTC_TYPE_REG17_TYPE_568_MASK (0x01000000u)
  26393. #define CSL_CPINTC_TYPE_REG17_TYPE_568_SHIFT (0x00000018u)
  26394. #define CSL_CPINTC_TYPE_REG17_TYPE_568_RESETVAL (0x00000000u)
  26395. #define CSL_CPINTC_TYPE_REG17_TYPE_569_MASK (0x02000000u)
  26396. #define CSL_CPINTC_TYPE_REG17_TYPE_569_SHIFT (0x00000019u)
  26397. #define CSL_CPINTC_TYPE_REG17_TYPE_569_RESETVAL (0x00000000u)
  26398. #define CSL_CPINTC_TYPE_REG17_TYPE_570_MASK (0x04000000u)
  26399. #define CSL_CPINTC_TYPE_REG17_TYPE_570_SHIFT (0x0000001Au)
  26400. #define CSL_CPINTC_TYPE_REG17_TYPE_570_RESETVAL (0x00000000u)
  26401. #define CSL_CPINTC_TYPE_REG17_TYPE_571_MASK (0x08000000u)
  26402. #define CSL_CPINTC_TYPE_REG17_TYPE_571_SHIFT (0x0000001Bu)
  26403. #define CSL_CPINTC_TYPE_REG17_TYPE_571_RESETVAL (0x00000000u)
  26404. #define CSL_CPINTC_TYPE_REG17_TYPE_572_MASK (0x10000000u)
  26405. #define CSL_CPINTC_TYPE_REG17_TYPE_572_SHIFT (0x0000001Cu)
  26406. #define CSL_CPINTC_TYPE_REG17_TYPE_572_RESETVAL (0x00000000u)
  26407. #define CSL_CPINTC_TYPE_REG17_TYPE_573_MASK (0x20000000u)
  26408. #define CSL_CPINTC_TYPE_REG17_TYPE_573_SHIFT (0x0000001Du)
  26409. #define CSL_CPINTC_TYPE_REG17_TYPE_573_RESETVAL (0x00000000u)
  26410. #define CSL_CPINTC_TYPE_REG17_TYPE_574_MASK (0x40000000u)
  26411. #define CSL_CPINTC_TYPE_REG17_TYPE_574_SHIFT (0x0000001Eu)
  26412. #define CSL_CPINTC_TYPE_REG17_TYPE_574_RESETVAL (0x00000000u)
  26413. #define CSL_CPINTC_TYPE_REG17_TYPE_575_MASK (0x80000000u)
  26414. #define CSL_CPINTC_TYPE_REG17_TYPE_575_SHIFT (0x0000001Fu)
  26415. #define CSL_CPINTC_TYPE_REG17_TYPE_575_RESETVAL (0x00000000u)
  26416. #define CSL_CPINTC_TYPE_REG17_RESETVAL (0x00000000u)
  26417. /* type_reg18 */
  26418. #define CSL_CPINTC_TYPE_REG18_TYPE_576_MASK (0x00000001u)
  26419. #define CSL_CPINTC_TYPE_REG18_TYPE_576_SHIFT (0x00000000u)
  26420. #define CSL_CPINTC_TYPE_REG18_TYPE_576_RESETVAL (0x00000000u)
  26421. #define CSL_CPINTC_TYPE_REG18_TYPE_577_MASK (0x00000002u)
  26422. #define CSL_CPINTC_TYPE_REG18_TYPE_577_SHIFT (0x00000001u)
  26423. #define CSL_CPINTC_TYPE_REG18_TYPE_577_RESETVAL (0x00000000u)
  26424. #define CSL_CPINTC_TYPE_REG18_TYPE_578_MASK (0x00000004u)
  26425. #define CSL_CPINTC_TYPE_REG18_TYPE_578_SHIFT (0x00000002u)
  26426. #define CSL_CPINTC_TYPE_REG18_TYPE_578_RESETVAL (0x00000000u)
  26427. #define CSL_CPINTC_TYPE_REG18_TYPE_579_MASK (0x00000008u)
  26428. #define CSL_CPINTC_TYPE_REG18_TYPE_579_SHIFT (0x00000003u)
  26429. #define CSL_CPINTC_TYPE_REG18_TYPE_579_RESETVAL (0x00000000u)
  26430. #define CSL_CPINTC_TYPE_REG18_TYPE_580_MASK (0x00000010u)
  26431. #define CSL_CPINTC_TYPE_REG18_TYPE_580_SHIFT (0x00000004u)
  26432. #define CSL_CPINTC_TYPE_REG18_TYPE_580_RESETVAL (0x00000000u)
  26433. #define CSL_CPINTC_TYPE_REG18_TYPE_581_MASK (0x00000020u)
  26434. #define CSL_CPINTC_TYPE_REG18_TYPE_581_SHIFT (0x00000005u)
  26435. #define CSL_CPINTC_TYPE_REG18_TYPE_581_RESETVAL (0x00000000u)
  26436. #define CSL_CPINTC_TYPE_REG18_TYPE_582_MASK (0x00000040u)
  26437. #define CSL_CPINTC_TYPE_REG18_TYPE_582_SHIFT (0x00000006u)
  26438. #define CSL_CPINTC_TYPE_REG18_TYPE_582_RESETVAL (0x00000000u)
  26439. #define CSL_CPINTC_TYPE_REG18_TYPE_583_MASK (0x00000080u)
  26440. #define CSL_CPINTC_TYPE_REG18_TYPE_583_SHIFT (0x00000007u)
  26441. #define CSL_CPINTC_TYPE_REG18_TYPE_583_RESETVAL (0x00000000u)
  26442. #define CSL_CPINTC_TYPE_REG18_TYPE_584_MASK (0x00000100u)
  26443. #define CSL_CPINTC_TYPE_REG18_TYPE_584_SHIFT (0x00000008u)
  26444. #define CSL_CPINTC_TYPE_REG18_TYPE_584_RESETVAL (0x00000000u)
  26445. #define CSL_CPINTC_TYPE_REG18_TYPE_585_MASK (0x00000200u)
  26446. #define CSL_CPINTC_TYPE_REG18_TYPE_585_SHIFT (0x00000009u)
  26447. #define CSL_CPINTC_TYPE_REG18_TYPE_585_RESETVAL (0x00000000u)
  26448. #define CSL_CPINTC_TYPE_REG18_TYPE_586_MASK (0x00000400u)
  26449. #define CSL_CPINTC_TYPE_REG18_TYPE_586_SHIFT (0x0000000Au)
  26450. #define CSL_CPINTC_TYPE_REG18_TYPE_586_RESETVAL (0x00000000u)
  26451. #define CSL_CPINTC_TYPE_REG18_TYPE_587_MASK (0x00000800u)
  26452. #define CSL_CPINTC_TYPE_REG18_TYPE_587_SHIFT (0x0000000Bu)
  26453. #define CSL_CPINTC_TYPE_REG18_TYPE_587_RESETVAL (0x00000000u)
  26454. #define CSL_CPINTC_TYPE_REG18_TYPE_588_MASK (0x00001000u)
  26455. #define CSL_CPINTC_TYPE_REG18_TYPE_588_SHIFT (0x0000000Cu)
  26456. #define CSL_CPINTC_TYPE_REG18_TYPE_588_RESETVAL (0x00000000u)
  26457. #define CSL_CPINTC_TYPE_REG18_TYPE_589_MASK (0x00002000u)
  26458. #define CSL_CPINTC_TYPE_REG18_TYPE_589_SHIFT (0x0000000Du)
  26459. #define CSL_CPINTC_TYPE_REG18_TYPE_589_RESETVAL (0x00000000u)
  26460. #define CSL_CPINTC_TYPE_REG18_TYPE_590_MASK (0x00004000u)
  26461. #define CSL_CPINTC_TYPE_REG18_TYPE_590_SHIFT (0x0000000Eu)
  26462. #define CSL_CPINTC_TYPE_REG18_TYPE_590_RESETVAL (0x00000000u)
  26463. #define CSL_CPINTC_TYPE_REG18_TYPE_591_MASK (0x00008000u)
  26464. #define CSL_CPINTC_TYPE_REG18_TYPE_591_SHIFT (0x0000000Fu)
  26465. #define CSL_CPINTC_TYPE_REG18_TYPE_591_RESETVAL (0x00000000u)
  26466. #define CSL_CPINTC_TYPE_REG18_TYPE_592_MASK (0x00010000u)
  26467. #define CSL_CPINTC_TYPE_REG18_TYPE_592_SHIFT (0x00000010u)
  26468. #define CSL_CPINTC_TYPE_REG18_TYPE_592_RESETVAL (0x00000000u)
  26469. #define CSL_CPINTC_TYPE_REG18_TYPE_593_MASK (0x00020000u)
  26470. #define CSL_CPINTC_TYPE_REG18_TYPE_593_SHIFT (0x00000011u)
  26471. #define CSL_CPINTC_TYPE_REG18_TYPE_593_RESETVAL (0x00000000u)
  26472. #define CSL_CPINTC_TYPE_REG18_TYPE_594_MASK (0x00040000u)
  26473. #define CSL_CPINTC_TYPE_REG18_TYPE_594_SHIFT (0x00000012u)
  26474. #define CSL_CPINTC_TYPE_REG18_TYPE_594_RESETVAL (0x00000000u)
  26475. #define CSL_CPINTC_TYPE_REG18_TYPE_595_MASK (0x00080000u)
  26476. #define CSL_CPINTC_TYPE_REG18_TYPE_595_SHIFT (0x00000013u)
  26477. #define CSL_CPINTC_TYPE_REG18_TYPE_595_RESETVAL (0x00000000u)
  26478. #define CSL_CPINTC_TYPE_REG18_TYPE_596_MASK (0x00100000u)
  26479. #define CSL_CPINTC_TYPE_REG18_TYPE_596_SHIFT (0x00000014u)
  26480. #define CSL_CPINTC_TYPE_REG18_TYPE_596_RESETVAL (0x00000000u)
  26481. #define CSL_CPINTC_TYPE_REG18_TYPE_597_MASK (0x00200000u)
  26482. #define CSL_CPINTC_TYPE_REG18_TYPE_597_SHIFT (0x00000015u)
  26483. #define CSL_CPINTC_TYPE_REG18_TYPE_597_RESETVAL (0x00000000u)
  26484. #define CSL_CPINTC_TYPE_REG18_TYPE_598_MASK (0x00400000u)
  26485. #define CSL_CPINTC_TYPE_REG18_TYPE_598_SHIFT (0x00000016u)
  26486. #define CSL_CPINTC_TYPE_REG18_TYPE_598_RESETVAL (0x00000000u)
  26487. #define CSL_CPINTC_TYPE_REG18_TYPE_599_MASK (0x00800000u)
  26488. #define CSL_CPINTC_TYPE_REG18_TYPE_599_SHIFT (0x00000017u)
  26489. #define CSL_CPINTC_TYPE_REG18_TYPE_599_RESETVAL (0x00000000u)
  26490. #define CSL_CPINTC_TYPE_REG18_TYPE_600_MASK (0x01000000u)
  26491. #define CSL_CPINTC_TYPE_REG18_TYPE_600_SHIFT (0x00000018u)
  26492. #define CSL_CPINTC_TYPE_REG18_TYPE_600_RESETVAL (0x00000000u)
  26493. #define CSL_CPINTC_TYPE_REG18_TYPE_601_MASK (0x02000000u)
  26494. #define CSL_CPINTC_TYPE_REG18_TYPE_601_SHIFT (0x00000019u)
  26495. #define CSL_CPINTC_TYPE_REG18_TYPE_601_RESETVAL (0x00000000u)
  26496. #define CSL_CPINTC_TYPE_REG18_TYPE_602_MASK (0x04000000u)
  26497. #define CSL_CPINTC_TYPE_REG18_TYPE_602_SHIFT (0x0000001Au)
  26498. #define CSL_CPINTC_TYPE_REG18_TYPE_602_RESETVAL (0x00000000u)
  26499. #define CSL_CPINTC_TYPE_REG18_TYPE_603_MASK (0x08000000u)
  26500. #define CSL_CPINTC_TYPE_REG18_TYPE_603_SHIFT (0x0000001Bu)
  26501. #define CSL_CPINTC_TYPE_REG18_TYPE_603_RESETVAL (0x00000000u)
  26502. #define CSL_CPINTC_TYPE_REG18_TYPE_604_MASK (0x10000000u)
  26503. #define CSL_CPINTC_TYPE_REG18_TYPE_604_SHIFT (0x0000001Cu)
  26504. #define CSL_CPINTC_TYPE_REG18_TYPE_604_RESETVAL (0x00000000u)
  26505. #define CSL_CPINTC_TYPE_REG18_TYPE_605_MASK (0x20000000u)
  26506. #define CSL_CPINTC_TYPE_REG18_TYPE_605_SHIFT (0x0000001Du)
  26507. #define CSL_CPINTC_TYPE_REG18_TYPE_605_RESETVAL (0x00000000u)
  26508. #define CSL_CPINTC_TYPE_REG18_TYPE_606_MASK (0x40000000u)
  26509. #define CSL_CPINTC_TYPE_REG18_TYPE_606_SHIFT (0x0000001Eu)
  26510. #define CSL_CPINTC_TYPE_REG18_TYPE_606_RESETVAL (0x00000000u)
  26511. #define CSL_CPINTC_TYPE_REG18_TYPE_607_MASK (0x80000000u)
  26512. #define CSL_CPINTC_TYPE_REG18_TYPE_607_SHIFT (0x0000001Fu)
  26513. #define CSL_CPINTC_TYPE_REG18_TYPE_607_RESETVAL (0x00000000u)
  26514. #define CSL_CPINTC_TYPE_REG18_RESETVAL (0x00000000u)
  26515. /* type_reg19 */
  26516. #define CSL_CPINTC_TYPE_REG19_TYPE_608_MASK (0x00000001u)
  26517. #define CSL_CPINTC_TYPE_REG19_TYPE_608_SHIFT (0x00000000u)
  26518. #define CSL_CPINTC_TYPE_REG19_TYPE_608_RESETVAL (0x00000000u)
  26519. #define CSL_CPINTC_TYPE_REG19_TYPE_609_MASK (0x00000002u)
  26520. #define CSL_CPINTC_TYPE_REG19_TYPE_609_SHIFT (0x00000001u)
  26521. #define CSL_CPINTC_TYPE_REG19_TYPE_609_RESETVAL (0x00000000u)
  26522. #define CSL_CPINTC_TYPE_REG19_TYPE_610_MASK (0x00000004u)
  26523. #define CSL_CPINTC_TYPE_REG19_TYPE_610_SHIFT (0x00000002u)
  26524. #define CSL_CPINTC_TYPE_REG19_TYPE_610_RESETVAL (0x00000000u)
  26525. #define CSL_CPINTC_TYPE_REG19_TYPE_611_MASK (0x00000008u)
  26526. #define CSL_CPINTC_TYPE_REG19_TYPE_611_SHIFT (0x00000003u)
  26527. #define CSL_CPINTC_TYPE_REG19_TYPE_611_RESETVAL (0x00000000u)
  26528. #define CSL_CPINTC_TYPE_REG19_TYPE_612_MASK (0x00000010u)
  26529. #define CSL_CPINTC_TYPE_REG19_TYPE_612_SHIFT (0x00000004u)
  26530. #define CSL_CPINTC_TYPE_REG19_TYPE_612_RESETVAL (0x00000000u)
  26531. #define CSL_CPINTC_TYPE_REG19_TYPE_613_MASK (0x00000020u)
  26532. #define CSL_CPINTC_TYPE_REG19_TYPE_613_SHIFT (0x00000005u)
  26533. #define CSL_CPINTC_TYPE_REG19_TYPE_613_RESETVAL (0x00000000u)
  26534. #define CSL_CPINTC_TYPE_REG19_TYPE_614_MASK (0x00000040u)
  26535. #define CSL_CPINTC_TYPE_REG19_TYPE_614_SHIFT (0x00000006u)
  26536. #define CSL_CPINTC_TYPE_REG19_TYPE_614_RESETVAL (0x00000000u)
  26537. #define CSL_CPINTC_TYPE_REG19_TYPE_615_MASK (0x00000080u)
  26538. #define CSL_CPINTC_TYPE_REG19_TYPE_615_SHIFT (0x00000007u)
  26539. #define CSL_CPINTC_TYPE_REG19_TYPE_615_RESETVAL (0x00000000u)
  26540. #define CSL_CPINTC_TYPE_REG19_TYPE_616_MASK (0x00000100u)
  26541. #define CSL_CPINTC_TYPE_REG19_TYPE_616_SHIFT (0x00000008u)
  26542. #define CSL_CPINTC_TYPE_REG19_TYPE_616_RESETVAL (0x00000000u)
  26543. #define CSL_CPINTC_TYPE_REG19_TYPE_617_MASK (0x00000200u)
  26544. #define CSL_CPINTC_TYPE_REG19_TYPE_617_SHIFT (0x00000009u)
  26545. #define CSL_CPINTC_TYPE_REG19_TYPE_617_RESETVAL (0x00000000u)
  26546. #define CSL_CPINTC_TYPE_REG19_TYPE_618_MASK (0x00000400u)
  26547. #define CSL_CPINTC_TYPE_REG19_TYPE_618_SHIFT (0x0000000Au)
  26548. #define CSL_CPINTC_TYPE_REG19_TYPE_618_RESETVAL (0x00000000u)
  26549. #define CSL_CPINTC_TYPE_REG19_TYPE_619_MASK (0x00000800u)
  26550. #define CSL_CPINTC_TYPE_REG19_TYPE_619_SHIFT (0x0000000Bu)
  26551. #define CSL_CPINTC_TYPE_REG19_TYPE_619_RESETVAL (0x00000000u)
  26552. #define CSL_CPINTC_TYPE_REG19_TYPE_620_MASK (0x00001000u)
  26553. #define CSL_CPINTC_TYPE_REG19_TYPE_620_SHIFT (0x0000000Cu)
  26554. #define CSL_CPINTC_TYPE_REG19_TYPE_620_RESETVAL (0x00000000u)
  26555. #define CSL_CPINTC_TYPE_REG19_TYPE_621_MASK (0x00002000u)
  26556. #define CSL_CPINTC_TYPE_REG19_TYPE_621_SHIFT (0x0000000Du)
  26557. #define CSL_CPINTC_TYPE_REG19_TYPE_621_RESETVAL (0x00000000u)
  26558. #define CSL_CPINTC_TYPE_REG19_TYPE_622_MASK (0x00004000u)
  26559. #define CSL_CPINTC_TYPE_REG19_TYPE_622_SHIFT (0x0000000Eu)
  26560. #define CSL_CPINTC_TYPE_REG19_TYPE_622_RESETVAL (0x00000000u)
  26561. #define CSL_CPINTC_TYPE_REG19_TYPE_623_MASK (0x00008000u)
  26562. #define CSL_CPINTC_TYPE_REG19_TYPE_623_SHIFT (0x0000000Fu)
  26563. #define CSL_CPINTC_TYPE_REG19_TYPE_623_RESETVAL (0x00000000u)
  26564. #define CSL_CPINTC_TYPE_REG19_TYPE_624_MASK (0x00010000u)
  26565. #define CSL_CPINTC_TYPE_REG19_TYPE_624_SHIFT (0x00000010u)
  26566. #define CSL_CPINTC_TYPE_REG19_TYPE_624_RESETVAL (0x00000000u)
  26567. #define CSL_CPINTC_TYPE_REG19_TYPE_625_MASK (0x00020000u)
  26568. #define CSL_CPINTC_TYPE_REG19_TYPE_625_SHIFT (0x00000011u)
  26569. #define CSL_CPINTC_TYPE_REG19_TYPE_625_RESETVAL (0x00000000u)
  26570. #define CSL_CPINTC_TYPE_REG19_TYPE_626_MASK (0x00040000u)
  26571. #define CSL_CPINTC_TYPE_REG19_TYPE_626_SHIFT (0x00000012u)
  26572. #define CSL_CPINTC_TYPE_REG19_TYPE_626_RESETVAL (0x00000000u)
  26573. #define CSL_CPINTC_TYPE_REG19_TYPE_627_MASK (0x00080000u)
  26574. #define CSL_CPINTC_TYPE_REG19_TYPE_627_SHIFT (0x00000013u)
  26575. #define CSL_CPINTC_TYPE_REG19_TYPE_627_RESETVAL (0x00000000u)
  26576. #define CSL_CPINTC_TYPE_REG19_TYPE_628_MASK (0x00100000u)
  26577. #define CSL_CPINTC_TYPE_REG19_TYPE_628_SHIFT (0x00000014u)
  26578. #define CSL_CPINTC_TYPE_REG19_TYPE_628_RESETVAL (0x00000000u)
  26579. #define CSL_CPINTC_TYPE_REG19_TYPE_629_MASK (0x00200000u)
  26580. #define CSL_CPINTC_TYPE_REG19_TYPE_629_SHIFT (0x00000015u)
  26581. #define CSL_CPINTC_TYPE_REG19_TYPE_629_RESETVAL (0x00000000u)
  26582. #define CSL_CPINTC_TYPE_REG19_TYPE_630_MASK (0x00400000u)
  26583. #define CSL_CPINTC_TYPE_REG19_TYPE_630_SHIFT (0x00000016u)
  26584. #define CSL_CPINTC_TYPE_REG19_TYPE_630_RESETVAL (0x00000000u)
  26585. #define CSL_CPINTC_TYPE_REG19_TYPE_631_MASK (0x00800000u)
  26586. #define CSL_CPINTC_TYPE_REG19_TYPE_631_SHIFT (0x00000017u)
  26587. #define CSL_CPINTC_TYPE_REG19_TYPE_631_RESETVAL (0x00000000u)
  26588. #define CSL_CPINTC_TYPE_REG19_TYPE_632_MASK (0x01000000u)
  26589. #define CSL_CPINTC_TYPE_REG19_TYPE_632_SHIFT (0x00000018u)
  26590. #define CSL_CPINTC_TYPE_REG19_TYPE_632_RESETVAL (0x00000000u)
  26591. #define CSL_CPINTC_TYPE_REG19_TYPE_633_MASK (0x02000000u)
  26592. #define CSL_CPINTC_TYPE_REG19_TYPE_633_SHIFT (0x00000019u)
  26593. #define CSL_CPINTC_TYPE_REG19_TYPE_633_RESETVAL (0x00000000u)
  26594. #define CSL_CPINTC_TYPE_REG19_TYPE_634_MASK (0x04000000u)
  26595. #define CSL_CPINTC_TYPE_REG19_TYPE_634_SHIFT (0x0000001Au)
  26596. #define CSL_CPINTC_TYPE_REG19_TYPE_634_RESETVAL (0x00000000u)
  26597. #define CSL_CPINTC_TYPE_REG19_TYPE_635_MASK (0x08000000u)
  26598. #define CSL_CPINTC_TYPE_REG19_TYPE_635_SHIFT (0x0000001Bu)
  26599. #define CSL_CPINTC_TYPE_REG19_TYPE_635_RESETVAL (0x00000000u)
  26600. #define CSL_CPINTC_TYPE_REG19_TYPE_636_MASK (0x10000000u)
  26601. #define CSL_CPINTC_TYPE_REG19_TYPE_636_SHIFT (0x0000001Cu)
  26602. #define CSL_CPINTC_TYPE_REG19_TYPE_636_RESETVAL (0x00000000u)
  26603. #define CSL_CPINTC_TYPE_REG19_TYPE_637_MASK (0x20000000u)
  26604. #define CSL_CPINTC_TYPE_REG19_TYPE_637_SHIFT (0x0000001Du)
  26605. #define CSL_CPINTC_TYPE_REG19_TYPE_637_RESETVAL (0x00000000u)
  26606. #define CSL_CPINTC_TYPE_REG19_TYPE_638_MASK (0x40000000u)
  26607. #define CSL_CPINTC_TYPE_REG19_TYPE_638_SHIFT (0x0000001Eu)
  26608. #define CSL_CPINTC_TYPE_REG19_TYPE_638_RESETVAL (0x00000000u)
  26609. #define CSL_CPINTC_TYPE_REG19_TYPE_639_MASK (0x80000000u)
  26610. #define CSL_CPINTC_TYPE_REG19_TYPE_639_SHIFT (0x0000001Fu)
  26611. #define CSL_CPINTC_TYPE_REG19_TYPE_639_RESETVAL (0x00000000u)
  26612. #define CSL_CPINTC_TYPE_REG19_RESETVAL (0x00000000u)
  26613. /* type_reg20 */
  26614. #define CSL_CPINTC_TYPE_REG20_TYPE_640_MASK (0x00000001u)
  26615. #define CSL_CPINTC_TYPE_REG20_TYPE_640_SHIFT (0x00000000u)
  26616. #define CSL_CPINTC_TYPE_REG20_TYPE_640_RESETVAL (0x00000000u)
  26617. #define CSL_CPINTC_TYPE_REG20_TYPE_641_MASK (0x00000002u)
  26618. #define CSL_CPINTC_TYPE_REG20_TYPE_641_SHIFT (0x00000001u)
  26619. #define CSL_CPINTC_TYPE_REG20_TYPE_641_RESETVAL (0x00000000u)
  26620. #define CSL_CPINTC_TYPE_REG20_TYPE_642_MASK (0x00000004u)
  26621. #define CSL_CPINTC_TYPE_REG20_TYPE_642_SHIFT (0x00000002u)
  26622. #define CSL_CPINTC_TYPE_REG20_TYPE_642_RESETVAL (0x00000000u)
  26623. #define CSL_CPINTC_TYPE_REG20_TYPE_643_MASK (0x00000008u)
  26624. #define CSL_CPINTC_TYPE_REG20_TYPE_643_SHIFT (0x00000003u)
  26625. #define CSL_CPINTC_TYPE_REG20_TYPE_643_RESETVAL (0x00000000u)
  26626. #define CSL_CPINTC_TYPE_REG20_TYPE_644_MASK (0x00000010u)
  26627. #define CSL_CPINTC_TYPE_REG20_TYPE_644_SHIFT (0x00000004u)
  26628. #define CSL_CPINTC_TYPE_REG20_TYPE_644_RESETVAL (0x00000000u)
  26629. #define CSL_CPINTC_TYPE_REG20_TYPE_645_MASK (0x00000020u)
  26630. #define CSL_CPINTC_TYPE_REG20_TYPE_645_SHIFT (0x00000005u)
  26631. #define CSL_CPINTC_TYPE_REG20_TYPE_645_RESETVAL (0x00000000u)
  26632. #define CSL_CPINTC_TYPE_REG20_TYPE_646_MASK (0x00000040u)
  26633. #define CSL_CPINTC_TYPE_REG20_TYPE_646_SHIFT (0x00000006u)
  26634. #define CSL_CPINTC_TYPE_REG20_TYPE_646_RESETVAL (0x00000000u)
  26635. #define CSL_CPINTC_TYPE_REG20_TYPE_647_MASK (0x00000080u)
  26636. #define CSL_CPINTC_TYPE_REG20_TYPE_647_SHIFT (0x00000007u)
  26637. #define CSL_CPINTC_TYPE_REG20_TYPE_647_RESETVAL (0x00000000u)
  26638. #define CSL_CPINTC_TYPE_REG20_TYPE_648_MASK (0x00000100u)
  26639. #define CSL_CPINTC_TYPE_REG20_TYPE_648_SHIFT (0x00000008u)
  26640. #define CSL_CPINTC_TYPE_REG20_TYPE_648_RESETVAL (0x00000000u)
  26641. #define CSL_CPINTC_TYPE_REG20_TYPE_649_MASK (0x00000200u)
  26642. #define CSL_CPINTC_TYPE_REG20_TYPE_649_SHIFT (0x00000009u)
  26643. #define CSL_CPINTC_TYPE_REG20_TYPE_649_RESETVAL (0x00000000u)
  26644. #define CSL_CPINTC_TYPE_REG20_TYPE_650_MASK (0x00000400u)
  26645. #define CSL_CPINTC_TYPE_REG20_TYPE_650_SHIFT (0x0000000Au)
  26646. #define CSL_CPINTC_TYPE_REG20_TYPE_650_RESETVAL (0x00000000u)
  26647. #define CSL_CPINTC_TYPE_REG20_TYPE_651_MASK (0x00000800u)
  26648. #define CSL_CPINTC_TYPE_REG20_TYPE_651_SHIFT (0x0000000Bu)
  26649. #define CSL_CPINTC_TYPE_REG20_TYPE_651_RESETVAL (0x00000000u)
  26650. #define CSL_CPINTC_TYPE_REG20_TYPE_652_MASK (0x00001000u)
  26651. #define CSL_CPINTC_TYPE_REG20_TYPE_652_SHIFT (0x0000000Cu)
  26652. #define CSL_CPINTC_TYPE_REG20_TYPE_652_RESETVAL (0x00000000u)
  26653. #define CSL_CPINTC_TYPE_REG20_TYPE_653_MASK (0x00002000u)
  26654. #define CSL_CPINTC_TYPE_REG20_TYPE_653_SHIFT (0x0000000Du)
  26655. #define CSL_CPINTC_TYPE_REG20_TYPE_653_RESETVAL (0x00000000u)
  26656. #define CSL_CPINTC_TYPE_REG20_TYPE_654_MASK (0x00004000u)
  26657. #define CSL_CPINTC_TYPE_REG20_TYPE_654_SHIFT (0x0000000Eu)
  26658. #define CSL_CPINTC_TYPE_REG20_TYPE_654_RESETVAL (0x00000000u)
  26659. #define CSL_CPINTC_TYPE_REG20_TYPE_655_MASK (0x00008000u)
  26660. #define CSL_CPINTC_TYPE_REG20_TYPE_655_SHIFT (0x0000000Fu)
  26661. #define CSL_CPINTC_TYPE_REG20_TYPE_655_RESETVAL (0x00000000u)
  26662. #define CSL_CPINTC_TYPE_REG20_TYPE_656_MASK (0x00010000u)
  26663. #define CSL_CPINTC_TYPE_REG20_TYPE_656_SHIFT (0x00000010u)
  26664. #define CSL_CPINTC_TYPE_REG20_TYPE_656_RESETVAL (0x00000000u)
  26665. #define CSL_CPINTC_TYPE_REG20_TYPE_657_MASK (0x00020000u)
  26666. #define CSL_CPINTC_TYPE_REG20_TYPE_657_SHIFT (0x00000011u)
  26667. #define CSL_CPINTC_TYPE_REG20_TYPE_657_RESETVAL (0x00000000u)
  26668. #define CSL_CPINTC_TYPE_REG20_TYPE_658_MASK (0x00040000u)
  26669. #define CSL_CPINTC_TYPE_REG20_TYPE_658_SHIFT (0x00000012u)
  26670. #define CSL_CPINTC_TYPE_REG20_TYPE_658_RESETVAL (0x00000000u)
  26671. #define CSL_CPINTC_TYPE_REG20_TYPE_659_MASK (0x00080000u)
  26672. #define CSL_CPINTC_TYPE_REG20_TYPE_659_SHIFT (0x00000013u)
  26673. #define CSL_CPINTC_TYPE_REG20_TYPE_659_RESETVAL (0x00000000u)
  26674. #define CSL_CPINTC_TYPE_REG20_TYPE_660_MASK (0x00100000u)
  26675. #define CSL_CPINTC_TYPE_REG20_TYPE_660_SHIFT (0x00000014u)
  26676. #define CSL_CPINTC_TYPE_REG20_TYPE_660_RESETVAL (0x00000000u)
  26677. #define CSL_CPINTC_TYPE_REG20_TYPE_661_MASK (0x00200000u)
  26678. #define CSL_CPINTC_TYPE_REG20_TYPE_661_SHIFT (0x00000015u)
  26679. #define CSL_CPINTC_TYPE_REG20_TYPE_661_RESETVAL (0x00000000u)
  26680. #define CSL_CPINTC_TYPE_REG20_TYPE_662_MASK (0x00400000u)
  26681. #define CSL_CPINTC_TYPE_REG20_TYPE_662_SHIFT (0x00000016u)
  26682. #define CSL_CPINTC_TYPE_REG20_TYPE_662_RESETVAL (0x00000000u)
  26683. #define CSL_CPINTC_TYPE_REG20_TYPE_663_MASK (0x00800000u)
  26684. #define CSL_CPINTC_TYPE_REG20_TYPE_663_SHIFT (0x00000017u)
  26685. #define CSL_CPINTC_TYPE_REG20_TYPE_663_RESETVAL (0x00000000u)
  26686. #define CSL_CPINTC_TYPE_REG20_TYPE_664_MASK (0x01000000u)
  26687. #define CSL_CPINTC_TYPE_REG20_TYPE_664_SHIFT (0x00000018u)
  26688. #define CSL_CPINTC_TYPE_REG20_TYPE_664_RESETVAL (0x00000000u)
  26689. #define CSL_CPINTC_TYPE_REG20_TYPE_665_MASK (0x02000000u)
  26690. #define CSL_CPINTC_TYPE_REG20_TYPE_665_SHIFT (0x00000019u)
  26691. #define CSL_CPINTC_TYPE_REG20_TYPE_665_RESETVAL (0x00000000u)
  26692. #define CSL_CPINTC_TYPE_REG20_TYPE_666_MASK (0x04000000u)
  26693. #define CSL_CPINTC_TYPE_REG20_TYPE_666_SHIFT (0x0000001Au)
  26694. #define CSL_CPINTC_TYPE_REG20_TYPE_666_RESETVAL (0x00000000u)
  26695. #define CSL_CPINTC_TYPE_REG20_TYPE_667_MASK (0x08000000u)
  26696. #define CSL_CPINTC_TYPE_REG20_TYPE_667_SHIFT (0x0000001Bu)
  26697. #define CSL_CPINTC_TYPE_REG20_TYPE_667_RESETVAL (0x00000000u)
  26698. #define CSL_CPINTC_TYPE_REG20_TYPE_668_MASK (0x10000000u)
  26699. #define CSL_CPINTC_TYPE_REG20_TYPE_668_SHIFT (0x0000001Cu)
  26700. #define CSL_CPINTC_TYPE_REG20_TYPE_668_RESETVAL (0x00000000u)
  26701. #define CSL_CPINTC_TYPE_REG20_TYPE_669_MASK (0x20000000u)
  26702. #define CSL_CPINTC_TYPE_REG20_TYPE_669_SHIFT (0x0000001Du)
  26703. #define CSL_CPINTC_TYPE_REG20_TYPE_669_RESETVAL (0x00000000u)
  26704. #define CSL_CPINTC_TYPE_REG20_TYPE_670_MASK (0x40000000u)
  26705. #define CSL_CPINTC_TYPE_REG20_TYPE_670_SHIFT (0x0000001Eu)
  26706. #define CSL_CPINTC_TYPE_REG20_TYPE_670_RESETVAL (0x00000000u)
  26707. #define CSL_CPINTC_TYPE_REG20_TYPE_671_MASK (0x80000000u)
  26708. #define CSL_CPINTC_TYPE_REG20_TYPE_671_SHIFT (0x0000001Fu)
  26709. #define CSL_CPINTC_TYPE_REG20_TYPE_671_RESETVAL (0x00000000u)
  26710. #define CSL_CPINTC_TYPE_REG20_RESETVAL (0x00000000u)
  26711. /* type_reg21 */
  26712. #define CSL_CPINTC_TYPE_REG21_TYPE_672_MASK (0x00000001u)
  26713. #define CSL_CPINTC_TYPE_REG21_TYPE_672_SHIFT (0x00000000u)
  26714. #define CSL_CPINTC_TYPE_REG21_TYPE_672_RESETVAL (0x00000000u)
  26715. #define CSL_CPINTC_TYPE_REG21_TYPE_673_MASK (0x00000002u)
  26716. #define CSL_CPINTC_TYPE_REG21_TYPE_673_SHIFT (0x00000001u)
  26717. #define CSL_CPINTC_TYPE_REG21_TYPE_673_RESETVAL (0x00000000u)
  26718. #define CSL_CPINTC_TYPE_REG21_TYPE_674_MASK (0x00000004u)
  26719. #define CSL_CPINTC_TYPE_REG21_TYPE_674_SHIFT (0x00000002u)
  26720. #define CSL_CPINTC_TYPE_REG21_TYPE_674_RESETVAL (0x00000000u)
  26721. #define CSL_CPINTC_TYPE_REG21_TYPE_675_MASK (0x00000008u)
  26722. #define CSL_CPINTC_TYPE_REG21_TYPE_675_SHIFT (0x00000003u)
  26723. #define CSL_CPINTC_TYPE_REG21_TYPE_675_RESETVAL (0x00000000u)
  26724. #define CSL_CPINTC_TYPE_REG21_TYPE_676_MASK (0x00000010u)
  26725. #define CSL_CPINTC_TYPE_REG21_TYPE_676_SHIFT (0x00000004u)
  26726. #define CSL_CPINTC_TYPE_REG21_TYPE_676_RESETVAL (0x00000000u)
  26727. #define CSL_CPINTC_TYPE_REG21_TYPE_677_MASK (0x00000020u)
  26728. #define CSL_CPINTC_TYPE_REG21_TYPE_677_SHIFT (0x00000005u)
  26729. #define CSL_CPINTC_TYPE_REG21_TYPE_677_RESETVAL (0x00000000u)
  26730. #define CSL_CPINTC_TYPE_REG21_TYPE_678_MASK (0x00000040u)
  26731. #define CSL_CPINTC_TYPE_REG21_TYPE_678_SHIFT (0x00000006u)
  26732. #define CSL_CPINTC_TYPE_REG21_TYPE_678_RESETVAL (0x00000000u)
  26733. #define CSL_CPINTC_TYPE_REG21_TYPE_679_MASK (0x00000080u)
  26734. #define CSL_CPINTC_TYPE_REG21_TYPE_679_SHIFT (0x00000007u)
  26735. #define CSL_CPINTC_TYPE_REG21_TYPE_679_RESETVAL (0x00000000u)
  26736. #define CSL_CPINTC_TYPE_REG21_TYPE_680_MASK (0x00000100u)
  26737. #define CSL_CPINTC_TYPE_REG21_TYPE_680_SHIFT (0x00000008u)
  26738. #define CSL_CPINTC_TYPE_REG21_TYPE_680_RESETVAL (0x00000000u)
  26739. #define CSL_CPINTC_TYPE_REG21_TYPE_681_MASK (0x00000200u)
  26740. #define CSL_CPINTC_TYPE_REG21_TYPE_681_SHIFT (0x00000009u)
  26741. #define CSL_CPINTC_TYPE_REG21_TYPE_681_RESETVAL (0x00000000u)
  26742. #define CSL_CPINTC_TYPE_REG21_TYPE_682_MASK (0x00000400u)
  26743. #define CSL_CPINTC_TYPE_REG21_TYPE_682_SHIFT (0x0000000Au)
  26744. #define CSL_CPINTC_TYPE_REG21_TYPE_682_RESETVAL (0x00000000u)
  26745. #define CSL_CPINTC_TYPE_REG21_TYPE_683_MASK (0x00000800u)
  26746. #define CSL_CPINTC_TYPE_REG21_TYPE_683_SHIFT (0x0000000Bu)
  26747. #define CSL_CPINTC_TYPE_REG21_TYPE_683_RESETVAL (0x00000000u)
  26748. #define CSL_CPINTC_TYPE_REG21_TYPE_684_MASK (0x00001000u)
  26749. #define CSL_CPINTC_TYPE_REG21_TYPE_684_SHIFT (0x0000000Cu)
  26750. #define CSL_CPINTC_TYPE_REG21_TYPE_684_RESETVAL (0x00000000u)
  26751. #define CSL_CPINTC_TYPE_REG21_TYPE_685_MASK (0x00002000u)
  26752. #define CSL_CPINTC_TYPE_REG21_TYPE_685_SHIFT (0x0000000Du)
  26753. #define CSL_CPINTC_TYPE_REG21_TYPE_685_RESETVAL (0x00000000u)
  26754. #define CSL_CPINTC_TYPE_REG21_TYPE_686_MASK (0x00004000u)
  26755. #define CSL_CPINTC_TYPE_REG21_TYPE_686_SHIFT (0x0000000Eu)
  26756. #define CSL_CPINTC_TYPE_REG21_TYPE_686_RESETVAL (0x00000000u)
  26757. #define CSL_CPINTC_TYPE_REG21_TYPE_687_MASK (0x00008000u)
  26758. #define CSL_CPINTC_TYPE_REG21_TYPE_687_SHIFT (0x0000000Fu)
  26759. #define CSL_CPINTC_TYPE_REG21_TYPE_687_RESETVAL (0x00000000u)
  26760. #define CSL_CPINTC_TYPE_REG21_TYPE_688_MASK (0x00010000u)
  26761. #define CSL_CPINTC_TYPE_REG21_TYPE_688_SHIFT (0x00000010u)
  26762. #define CSL_CPINTC_TYPE_REG21_TYPE_688_RESETVAL (0x00000000u)
  26763. #define CSL_CPINTC_TYPE_REG21_TYPE_689_MASK (0x00020000u)
  26764. #define CSL_CPINTC_TYPE_REG21_TYPE_689_SHIFT (0x00000011u)
  26765. #define CSL_CPINTC_TYPE_REG21_TYPE_689_RESETVAL (0x00000000u)
  26766. #define CSL_CPINTC_TYPE_REG21_TYPE_690_MASK (0x00040000u)
  26767. #define CSL_CPINTC_TYPE_REG21_TYPE_690_SHIFT (0x00000012u)
  26768. #define CSL_CPINTC_TYPE_REG21_TYPE_690_RESETVAL (0x00000000u)
  26769. #define CSL_CPINTC_TYPE_REG21_TYPE_691_MASK (0x00080000u)
  26770. #define CSL_CPINTC_TYPE_REG21_TYPE_691_SHIFT (0x00000013u)
  26771. #define CSL_CPINTC_TYPE_REG21_TYPE_691_RESETVAL (0x00000000u)
  26772. #define CSL_CPINTC_TYPE_REG21_TYPE_692_MASK (0x00100000u)
  26773. #define CSL_CPINTC_TYPE_REG21_TYPE_692_SHIFT (0x00000014u)
  26774. #define CSL_CPINTC_TYPE_REG21_TYPE_692_RESETVAL (0x00000000u)
  26775. #define CSL_CPINTC_TYPE_REG21_TYPE_693_MASK (0x00200000u)
  26776. #define CSL_CPINTC_TYPE_REG21_TYPE_693_SHIFT (0x00000015u)
  26777. #define CSL_CPINTC_TYPE_REG21_TYPE_693_RESETVAL (0x00000000u)
  26778. #define CSL_CPINTC_TYPE_REG21_TYPE_694_MASK (0x00400000u)
  26779. #define CSL_CPINTC_TYPE_REG21_TYPE_694_SHIFT (0x00000016u)
  26780. #define CSL_CPINTC_TYPE_REG21_TYPE_694_RESETVAL (0x00000000u)
  26781. #define CSL_CPINTC_TYPE_REG21_TYPE_695_MASK (0x00800000u)
  26782. #define CSL_CPINTC_TYPE_REG21_TYPE_695_SHIFT (0x00000017u)
  26783. #define CSL_CPINTC_TYPE_REG21_TYPE_695_RESETVAL (0x00000000u)
  26784. #define CSL_CPINTC_TYPE_REG21_TYPE_696_MASK (0x01000000u)
  26785. #define CSL_CPINTC_TYPE_REG21_TYPE_696_SHIFT (0x00000018u)
  26786. #define CSL_CPINTC_TYPE_REG21_TYPE_696_RESETVAL (0x00000000u)
  26787. #define CSL_CPINTC_TYPE_REG21_TYPE_697_MASK (0x02000000u)
  26788. #define CSL_CPINTC_TYPE_REG21_TYPE_697_SHIFT (0x00000019u)
  26789. #define CSL_CPINTC_TYPE_REG21_TYPE_697_RESETVAL (0x00000000u)
  26790. #define CSL_CPINTC_TYPE_REG21_TYPE_698_MASK (0x04000000u)
  26791. #define CSL_CPINTC_TYPE_REG21_TYPE_698_SHIFT (0x0000001Au)
  26792. #define CSL_CPINTC_TYPE_REG21_TYPE_698_RESETVAL (0x00000000u)
  26793. #define CSL_CPINTC_TYPE_REG21_TYPE_699_MASK (0x08000000u)
  26794. #define CSL_CPINTC_TYPE_REG21_TYPE_699_SHIFT (0x0000001Bu)
  26795. #define CSL_CPINTC_TYPE_REG21_TYPE_699_RESETVAL (0x00000000u)
  26796. #define CSL_CPINTC_TYPE_REG21_TYPE_700_MASK (0x10000000u)
  26797. #define CSL_CPINTC_TYPE_REG21_TYPE_700_SHIFT (0x0000001Cu)
  26798. #define CSL_CPINTC_TYPE_REG21_TYPE_700_RESETVAL (0x00000000u)
  26799. #define CSL_CPINTC_TYPE_REG21_TYPE_701_MASK (0x20000000u)
  26800. #define CSL_CPINTC_TYPE_REG21_TYPE_701_SHIFT (0x0000001Du)
  26801. #define CSL_CPINTC_TYPE_REG21_TYPE_701_RESETVAL (0x00000000u)
  26802. #define CSL_CPINTC_TYPE_REG21_TYPE_702_MASK (0x40000000u)
  26803. #define CSL_CPINTC_TYPE_REG21_TYPE_702_SHIFT (0x0000001Eu)
  26804. #define CSL_CPINTC_TYPE_REG21_TYPE_702_RESETVAL (0x00000000u)
  26805. #define CSL_CPINTC_TYPE_REG21_TYPE_703_MASK (0x80000000u)
  26806. #define CSL_CPINTC_TYPE_REG21_TYPE_703_SHIFT (0x0000001Fu)
  26807. #define CSL_CPINTC_TYPE_REG21_TYPE_703_RESETVAL (0x00000000u)
  26808. #define CSL_CPINTC_TYPE_REG21_RESETVAL (0x00000000u)
  26809. /* type_reg22 */
  26810. #define CSL_CPINTC_TYPE_REG22_TYPE_704_MASK (0x00000001u)
  26811. #define CSL_CPINTC_TYPE_REG22_TYPE_704_SHIFT (0x00000000u)
  26812. #define CSL_CPINTC_TYPE_REG22_TYPE_704_RESETVAL (0x00000000u)
  26813. #define CSL_CPINTC_TYPE_REG22_TYPE_705_MASK (0x00000002u)
  26814. #define CSL_CPINTC_TYPE_REG22_TYPE_705_SHIFT (0x00000001u)
  26815. #define CSL_CPINTC_TYPE_REG22_TYPE_705_RESETVAL (0x00000000u)
  26816. #define CSL_CPINTC_TYPE_REG22_TYPE_706_MASK (0x00000004u)
  26817. #define CSL_CPINTC_TYPE_REG22_TYPE_706_SHIFT (0x00000002u)
  26818. #define CSL_CPINTC_TYPE_REG22_TYPE_706_RESETVAL (0x00000000u)
  26819. #define CSL_CPINTC_TYPE_REG22_TYPE_707_MASK (0x00000008u)
  26820. #define CSL_CPINTC_TYPE_REG22_TYPE_707_SHIFT (0x00000003u)
  26821. #define CSL_CPINTC_TYPE_REG22_TYPE_707_RESETVAL (0x00000000u)
  26822. #define CSL_CPINTC_TYPE_REG22_TYPE_708_MASK (0x00000010u)
  26823. #define CSL_CPINTC_TYPE_REG22_TYPE_708_SHIFT (0x00000004u)
  26824. #define CSL_CPINTC_TYPE_REG22_TYPE_708_RESETVAL (0x00000000u)
  26825. #define CSL_CPINTC_TYPE_REG22_TYPE_709_MASK (0x00000020u)
  26826. #define CSL_CPINTC_TYPE_REG22_TYPE_709_SHIFT (0x00000005u)
  26827. #define CSL_CPINTC_TYPE_REG22_TYPE_709_RESETVAL (0x00000000u)
  26828. #define CSL_CPINTC_TYPE_REG22_TYPE_710_MASK (0x00000040u)
  26829. #define CSL_CPINTC_TYPE_REG22_TYPE_710_SHIFT (0x00000006u)
  26830. #define CSL_CPINTC_TYPE_REG22_TYPE_710_RESETVAL (0x00000000u)
  26831. #define CSL_CPINTC_TYPE_REG22_TYPE_711_MASK (0x00000080u)
  26832. #define CSL_CPINTC_TYPE_REG22_TYPE_711_SHIFT (0x00000007u)
  26833. #define CSL_CPINTC_TYPE_REG22_TYPE_711_RESETVAL (0x00000000u)
  26834. #define CSL_CPINTC_TYPE_REG22_TYPE_712_MASK (0x00000100u)
  26835. #define CSL_CPINTC_TYPE_REG22_TYPE_712_SHIFT (0x00000008u)
  26836. #define CSL_CPINTC_TYPE_REG22_TYPE_712_RESETVAL (0x00000000u)
  26837. #define CSL_CPINTC_TYPE_REG22_TYPE_713_MASK (0x00000200u)
  26838. #define CSL_CPINTC_TYPE_REG22_TYPE_713_SHIFT (0x00000009u)
  26839. #define CSL_CPINTC_TYPE_REG22_TYPE_713_RESETVAL (0x00000000u)
  26840. #define CSL_CPINTC_TYPE_REG22_TYPE_714_MASK (0x00000400u)
  26841. #define CSL_CPINTC_TYPE_REG22_TYPE_714_SHIFT (0x0000000Au)
  26842. #define CSL_CPINTC_TYPE_REG22_TYPE_714_RESETVAL (0x00000000u)
  26843. #define CSL_CPINTC_TYPE_REG22_TYPE_715_MASK (0x00000800u)
  26844. #define CSL_CPINTC_TYPE_REG22_TYPE_715_SHIFT (0x0000000Bu)
  26845. #define CSL_CPINTC_TYPE_REG22_TYPE_715_RESETVAL (0x00000000u)
  26846. #define CSL_CPINTC_TYPE_REG22_TYPE_716_MASK (0x00001000u)
  26847. #define CSL_CPINTC_TYPE_REG22_TYPE_716_SHIFT (0x0000000Cu)
  26848. #define CSL_CPINTC_TYPE_REG22_TYPE_716_RESETVAL (0x00000000u)
  26849. #define CSL_CPINTC_TYPE_REG22_TYPE_717_MASK (0x00002000u)
  26850. #define CSL_CPINTC_TYPE_REG22_TYPE_717_SHIFT (0x0000000Du)
  26851. #define CSL_CPINTC_TYPE_REG22_TYPE_717_RESETVAL (0x00000000u)
  26852. #define CSL_CPINTC_TYPE_REG22_TYPE_718_MASK (0x00004000u)
  26853. #define CSL_CPINTC_TYPE_REG22_TYPE_718_SHIFT (0x0000000Eu)
  26854. #define CSL_CPINTC_TYPE_REG22_TYPE_718_RESETVAL (0x00000000u)
  26855. #define CSL_CPINTC_TYPE_REG22_TYPE_719_MASK (0x00008000u)
  26856. #define CSL_CPINTC_TYPE_REG22_TYPE_719_SHIFT (0x0000000Fu)
  26857. #define CSL_CPINTC_TYPE_REG22_TYPE_719_RESETVAL (0x00000000u)
  26858. #define CSL_CPINTC_TYPE_REG22_TYPE_720_MASK (0x00010000u)
  26859. #define CSL_CPINTC_TYPE_REG22_TYPE_720_SHIFT (0x00000010u)
  26860. #define CSL_CPINTC_TYPE_REG22_TYPE_720_RESETVAL (0x00000000u)
  26861. #define CSL_CPINTC_TYPE_REG22_TYPE_721_MASK (0x00020000u)
  26862. #define CSL_CPINTC_TYPE_REG22_TYPE_721_SHIFT (0x00000011u)
  26863. #define CSL_CPINTC_TYPE_REG22_TYPE_721_RESETVAL (0x00000000u)
  26864. #define CSL_CPINTC_TYPE_REG22_TYPE_722_MASK (0x00040000u)
  26865. #define CSL_CPINTC_TYPE_REG22_TYPE_722_SHIFT (0x00000012u)
  26866. #define CSL_CPINTC_TYPE_REG22_TYPE_722_RESETVAL (0x00000000u)
  26867. #define CSL_CPINTC_TYPE_REG22_TYPE_723_MASK (0x00080000u)
  26868. #define CSL_CPINTC_TYPE_REG22_TYPE_723_SHIFT (0x00000013u)
  26869. #define CSL_CPINTC_TYPE_REG22_TYPE_723_RESETVAL (0x00000000u)
  26870. #define CSL_CPINTC_TYPE_REG22_TYPE_724_MASK (0x00100000u)
  26871. #define CSL_CPINTC_TYPE_REG22_TYPE_724_SHIFT (0x00000014u)
  26872. #define CSL_CPINTC_TYPE_REG22_TYPE_724_RESETVAL (0x00000000u)
  26873. #define CSL_CPINTC_TYPE_REG22_TYPE_725_MASK (0x00200000u)
  26874. #define CSL_CPINTC_TYPE_REG22_TYPE_725_SHIFT (0x00000015u)
  26875. #define CSL_CPINTC_TYPE_REG22_TYPE_725_RESETVAL (0x00000000u)
  26876. #define CSL_CPINTC_TYPE_REG22_TYPE_726_MASK (0x00400000u)
  26877. #define CSL_CPINTC_TYPE_REG22_TYPE_726_SHIFT (0x00000016u)
  26878. #define CSL_CPINTC_TYPE_REG22_TYPE_726_RESETVAL (0x00000000u)
  26879. #define CSL_CPINTC_TYPE_REG22_TYPE_727_MASK (0x00800000u)
  26880. #define CSL_CPINTC_TYPE_REG22_TYPE_727_SHIFT (0x00000017u)
  26881. #define CSL_CPINTC_TYPE_REG22_TYPE_727_RESETVAL (0x00000000u)
  26882. #define CSL_CPINTC_TYPE_REG22_TYPE_728_MASK (0x01000000u)
  26883. #define CSL_CPINTC_TYPE_REG22_TYPE_728_SHIFT (0x00000018u)
  26884. #define CSL_CPINTC_TYPE_REG22_TYPE_728_RESETVAL (0x00000000u)
  26885. #define CSL_CPINTC_TYPE_REG22_TYPE_729_MASK (0x02000000u)
  26886. #define CSL_CPINTC_TYPE_REG22_TYPE_729_SHIFT (0x00000019u)
  26887. #define CSL_CPINTC_TYPE_REG22_TYPE_729_RESETVAL (0x00000000u)
  26888. #define CSL_CPINTC_TYPE_REG22_TYPE_730_MASK (0x04000000u)
  26889. #define CSL_CPINTC_TYPE_REG22_TYPE_730_SHIFT (0x0000001Au)
  26890. #define CSL_CPINTC_TYPE_REG22_TYPE_730_RESETVAL (0x00000000u)
  26891. #define CSL_CPINTC_TYPE_REG22_TYPE_731_MASK (0x08000000u)
  26892. #define CSL_CPINTC_TYPE_REG22_TYPE_731_SHIFT (0x0000001Bu)
  26893. #define CSL_CPINTC_TYPE_REG22_TYPE_731_RESETVAL (0x00000000u)
  26894. #define CSL_CPINTC_TYPE_REG22_TYPE_732_MASK (0x10000000u)
  26895. #define CSL_CPINTC_TYPE_REG22_TYPE_732_SHIFT (0x0000001Cu)
  26896. #define CSL_CPINTC_TYPE_REG22_TYPE_732_RESETVAL (0x00000000u)
  26897. #define CSL_CPINTC_TYPE_REG22_TYPE_733_MASK (0x20000000u)
  26898. #define CSL_CPINTC_TYPE_REG22_TYPE_733_SHIFT (0x0000001Du)
  26899. #define CSL_CPINTC_TYPE_REG22_TYPE_733_RESETVAL (0x00000000u)
  26900. #define CSL_CPINTC_TYPE_REG22_TYPE_734_MASK (0x40000000u)
  26901. #define CSL_CPINTC_TYPE_REG22_TYPE_734_SHIFT (0x0000001Eu)
  26902. #define CSL_CPINTC_TYPE_REG22_TYPE_734_RESETVAL (0x00000000u)
  26903. #define CSL_CPINTC_TYPE_REG22_TYPE_735_MASK (0x80000000u)
  26904. #define CSL_CPINTC_TYPE_REG22_TYPE_735_SHIFT (0x0000001Fu)
  26905. #define CSL_CPINTC_TYPE_REG22_TYPE_735_RESETVAL (0x00000000u)
  26906. #define CSL_CPINTC_TYPE_REG22_RESETVAL (0x00000000u)
  26907. /* type_reg23 */
  26908. #define CSL_CPINTC_TYPE_REG23_TYPE_736_MASK (0x00000001u)
  26909. #define CSL_CPINTC_TYPE_REG23_TYPE_736_SHIFT (0x00000000u)
  26910. #define CSL_CPINTC_TYPE_REG23_TYPE_736_RESETVAL (0x00000000u)
  26911. #define CSL_CPINTC_TYPE_REG23_TYPE_737_MASK (0x00000002u)
  26912. #define CSL_CPINTC_TYPE_REG23_TYPE_737_SHIFT (0x00000001u)
  26913. #define CSL_CPINTC_TYPE_REG23_TYPE_737_RESETVAL (0x00000000u)
  26914. #define CSL_CPINTC_TYPE_REG23_TYPE_738_MASK (0x00000004u)
  26915. #define CSL_CPINTC_TYPE_REG23_TYPE_738_SHIFT (0x00000002u)
  26916. #define CSL_CPINTC_TYPE_REG23_TYPE_738_RESETVAL (0x00000000u)
  26917. #define CSL_CPINTC_TYPE_REG23_TYPE_739_MASK (0x00000008u)
  26918. #define CSL_CPINTC_TYPE_REG23_TYPE_739_SHIFT (0x00000003u)
  26919. #define CSL_CPINTC_TYPE_REG23_TYPE_739_RESETVAL (0x00000000u)
  26920. #define CSL_CPINTC_TYPE_REG23_TYPE_740_MASK (0x00000010u)
  26921. #define CSL_CPINTC_TYPE_REG23_TYPE_740_SHIFT (0x00000004u)
  26922. #define CSL_CPINTC_TYPE_REG23_TYPE_740_RESETVAL (0x00000000u)
  26923. #define CSL_CPINTC_TYPE_REG23_TYPE_741_MASK (0x00000020u)
  26924. #define CSL_CPINTC_TYPE_REG23_TYPE_741_SHIFT (0x00000005u)
  26925. #define CSL_CPINTC_TYPE_REG23_TYPE_741_RESETVAL (0x00000000u)
  26926. #define CSL_CPINTC_TYPE_REG23_TYPE_742_MASK (0x00000040u)
  26927. #define CSL_CPINTC_TYPE_REG23_TYPE_742_SHIFT (0x00000006u)
  26928. #define CSL_CPINTC_TYPE_REG23_TYPE_742_RESETVAL (0x00000000u)
  26929. #define CSL_CPINTC_TYPE_REG23_TYPE_743_MASK (0x00000080u)
  26930. #define CSL_CPINTC_TYPE_REG23_TYPE_743_SHIFT (0x00000007u)
  26931. #define CSL_CPINTC_TYPE_REG23_TYPE_743_RESETVAL (0x00000000u)
  26932. #define CSL_CPINTC_TYPE_REG23_TYPE_744_MASK (0x00000100u)
  26933. #define CSL_CPINTC_TYPE_REG23_TYPE_744_SHIFT (0x00000008u)
  26934. #define CSL_CPINTC_TYPE_REG23_TYPE_744_RESETVAL (0x00000000u)
  26935. #define CSL_CPINTC_TYPE_REG23_TYPE_745_MASK (0x00000200u)
  26936. #define CSL_CPINTC_TYPE_REG23_TYPE_745_SHIFT (0x00000009u)
  26937. #define CSL_CPINTC_TYPE_REG23_TYPE_745_RESETVAL (0x00000000u)
  26938. #define CSL_CPINTC_TYPE_REG23_TYPE_746_MASK (0x00000400u)
  26939. #define CSL_CPINTC_TYPE_REG23_TYPE_746_SHIFT (0x0000000Au)
  26940. #define CSL_CPINTC_TYPE_REG23_TYPE_746_RESETVAL (0x00000000u)
  26941. #define CSL_CPINTC_TYPE_REG23_TYPE_747_MASK (0x00000800u)
  26942. #define CSL_CPINTC_TYPE_REG23_TYPE_747_SHIFT (0x0000000Bu)
  26943. #define CSL_CPINTC_TYPE_REG23_TYPE_747_RESETVAL (0x00000000u)
  26944. #define CSL_CPINTC_TYPE_REG23_TYPE_748_MASK (0x00001000u)
  26945. #define CSL_CPINTC_TYPE_REG23_TYPE_748_SHIFT (0x0000000Cu)
  26946. #define CSL_CPINTC_TYPE_REG23_TYPE_748_RESETVAL (0x00000000u)
  26947. #define CSL_CPINTC_TYPE_REG23_TYPE_749_MASK (0x00002000u)
  26948. #define CSL_CPINTC_TYPE_REG23_TYPE_749_SHIFT (0x0000000Du)
  26949. #define CSL_CPINTC_TYPE_REG23_TYPE_749_RESETVAL (0x00000000u)
  26950. #define CSL_CPINTC_TYPE_REG23_TYPE_750_MASK (0x00004000u)
  26951. #define CSL_CPINTC_TYPE_REG23_TYPE_750_SHIFT (0x0000000Eu)
  26952. #define CSL_CPINTC_TYPE_REG23_TYPE_750_RESETVAL (0x00000000u)
  26953. #define CSL_CPINTC_TYPE_REG23_TYPE_751_MASK (0x00008000u)
  26954. #define CSL_CPINTC_TYPE_REG23_TYPE_751_SHIFT (0x0000000Fu)
  26955. #define CSL_CPINTC_TYPE_REG23_TYPE_751_RESETVAL (0x00000000u)
  26956. #define CSL_CPINTC_TYPE_REG23_TYPE_752_MASK (0x00010000u)
  26957. #define CSL_CPINTC_TYPE_REG23_TYPE_752_SHIFT (0x00000010u)
  26958. #define CSL_CPINTC_TYPE_REG23_TYPE_752_RESETVAL (0x00000000u)
  26959. #define CSL_CPINTC_TYPE_REG23_TYPE_753_MASK (0x00020000u)
  26960. #define CSL_CPINTC_TYPE_REG23_TYPE_753_SHIFT (0x00000011u)
  26961. #define CSL_CPINTC_TYPE_REG23_TYPE_753_RESETVAL (0x00000000u)
  26962. #define CSL_CPINTC_TYPE_REG23_TYPE_754_MASK (0x00040000u)
  26963. #define CSL_CPINTC_TYPE_REG23_TYPE_754_SHIFT (0x00000012u)
  26964. #define CSL_CPINTC_TYPE_REG23_TYPE_754_RESETVAL (0x00000000u)
  26965. #define CSL_CPINTC_TYPE_REG23_TYPE_755_MASK (0x00080000u)
  26966. #define CSL_CPINTC_TYPE_REG23_TYPE_755_SHIFT (0x00000013u)
  26967. #define CSL_CPINTC_TYPE_REG23_TYPE_755_RESETVAL (0x00000000u)
  26968. #define CSL_CPINTC_TYPE_REG23_TYPE_756_MASK (0x00100000u)
  26969. #define CSL_CPINTC_TYPE_REG23_TYPE_756_SHIFT (0x00000014u)
  26970. #define CSL_CPINTC_TYPE_REG23_TYPE_756_RESETVAL (0x00000000u)
  26971. #define CSL_CPINTC_TYPE_REG23_TYPE_757_MASK (0x00200000u)
  26972. #define CSL_CPINTC_TYPE_REG23_TYPE_757_SHIFT (0x00000015u)
  26973. #define CSL_CPINTC_TYPE_REG23_TYPE_757_RESETVAL (0x00000000u)
  26974. #define CSL_CPINTC_TYPE_REG23_TYPE_758_MASK (0x00400000u)
  26975. #define CSL_CPINTC_TYPE_REG23_TYPE_758_SHIFT (0x00000016u)
  26976. #define CSL_CPINTC_TYPE_REG23_TYPE_758_RESETVAL (0x00000000u)
  26977. #define CSL_CPINTC_TYPE_REG23_TYPE_759_MASK (0x00800000u)
  26978. #define CSL_CPINTC_TYPE_REG23_TYPE_759_SHIFT (0x00000017u)
  26979. #define CSL_CPINTC_TYPE_REG23_TYPE_759_RESETVAL (0x00000000u)
  26980. #define CSL_CPINTC_TYPE_REG23_TYPE_760_MASK (0x01000000u)
  26981. #define CSL_CPINTC_TYPE_REG23_TYPE_760_SHIFT (0x00000018u)
  26982. #define CSL_CPINTC_TYPE_REG23_TYPE_760_RESETVAL (0x00000000u)
  26983. #define CSL_CPINTC_TYPE_REG23_TYPE_761_MASK (0x02000000u)
  26984. #define CSL_CPINTC_TYPE_REG23_TYPE_761_SHIFT (0x00000019u)
  26985. #define CSL_CPINTC_TYPE_REG23_TYPE_761_RESETVAL (0x00000000u)
  26986. #define CSL_CPINTC_TYPE_REG23_TYPE_762_MASK (0x04000000u)
  26987. #define CSL_CPINTC_TYPE_REG23_TYPE_762_SHIFT (0x0000001Au)
  26988. #define CSL_CPINTC_TYPE_REG23_TYPE_762_RESETVAL (0x00000000u)
  26989. #define CSL_CPINTC_TYPE_REG23_TYPE_763_MASK (0x08000000u)
  26990. #define CSL_CPINTC_TYPE_REG23_TYPE_763_SHIFT (0x0000001Bu)
  26991. #define CSL_CPINTC_TYPE_REG23_TYPE_763_RESETVAL (0x00000000u)
  26992. #define CSL_CPINTC_TYPE_REG23_TYPE_764_MASK (0x10000000u)
  26993. #define CSL_CPINTC_TYPE_REG23_TYPE_764_SHIFT (0x0000001Cu)
  26994. #define CSL_CPINTC_TYPE_REG23_TYPE_764_RESETVAL (0x00000000u)
  26995. #define CSL_CPINTC_TYPE_REG23_TYPE_765_MASK (0x20000000u)
  26996. #define CSL_CPINTC_TYPE_REG23_TYPE_765_SHIFT (0x0000001Du)
  26997. #define CSL_CPINTC_TYPE_REG23_TYPE_765_RESETVAL (0x00000000u)
  26998. #define CSL_CPINTC_TYPE_REG23_TYPE_766_MASK (0x40000000u)
  26999. #define CSL_CPINTC_TYPE_REG23_TYPE_766_SHIFT (0x0000001Eu)
  27000. #define CSL_CPINTC_TYPE_REG23_TYPE_766_RESETVAL (0x00000000u)
  27001. #define CSL_CPINTC_TYPE_REG23_TYPE_767_MASK (0x80000000u)
  27002. #define CSL_CPINTC_TYPE_REG23_TYPE_767_SHIFT (0x0000001Fu)
  27003. #define CSL_CPINTC_TYPE_REG23_TYPE_767_RESETVAL (0x00000000u)
  27004. #define CSL_CPINTC_TYPE_REG23_RESETVAL (0x00000000u)
  27005. /* type_reg24 */
  27006. #define CSL_CPINTC_TYPE_REG24_TYPE_768_MASK (0x00000001u)
  27007. #define CSL_CPINTC_TYPE_REG24_TYPE_768_SHIFT (0x00000000u)
  27008. #define CSL_CPINTC_TYPE_REG24_TYPE_768_RESETVAL (0x00000000u)
  27009. #define CSL_CPINTC_TYPE_REG24_TYPE_769_MASK (0x00000002u)
  27010. #define CSL_CPINTC_TYPE_REG24_TYPE_769_SHIFT (0x00000001u)
  27011. #define CSL_CPINTC_TYPE_REG24_TYPE_769_RESETVAL (0x00000000u)
  27012. #define CSL_CPINTC_TYPE_REG24_TYPE_770_MASK (0x00000004u)
  27013. #define CSL_CPINTC_TYPE_REG24_TYPE_770_SHIFT (0x00000002u)
  27014. #define CSL_CPINTC_TYPE_REG24_TYPE_770_RESETVAL (0x00000000u)
  27015. #define CSL_CPINTC_TYPE_REG24_TYPE_771_MASK (0x00000008u)
  27016. #define CSL_CPINTC_TYPE_REG24_TYPE_771_SHIFT (0x00000003u)
  27017. #define CSL_CPINTC_TYPE_REG24_TYPE_771_RESETVAL (0x00000000u)
  27018. #define CSL_CPINTC_TYPE_REG24_TYPE_772_MASK (0x00000010u)
  27019. #define CSL_CPINTC_TYPE_REG24_TYPE_772_SHIFT (0x00000004u)
  27020. #define CSL_CPINTC_TYPE_REG24_TYPE_772_RESETVAL (0x00000000u)
  27021. #define CSL_CPINTC_TYPE_REG24_TYPE_773_MASK (0x00000020u)
  27022. #define CSL_CPINTC_TYPE_REG24_TYPE_773_SHIFT (0x00000005u)
  27023. #define CSL_CPINTC_TYPE_REG24_TYPE_773_RESETVAL (0x00000000u)
  27024. #define CSL_CPINTC_TYPE_REG24_TYPE_774_MASK (0x00000040u)
  27025. #define CSL_CPINTC_TYPE_REG24_TYPE_774_SHIFT (0x00000006u)
  27026. #define CSL_CPINTC_TYPE_REG24_TYPE_774_RESETVAL (0x00000000u)
  27027. #define CSL_CPINTC_TYPE_REG24_TYPE_775_MASK (0x00000080u)
  27028. #define CSL_CPINTC_TYPE_REG24_TYPE_775_SHIFT (0x00000007u)
  27029. #define CSL_CPINTC_TYPE_REG24_TYPE_775_RESETVAL (0x00000000u)
  27030. #define CSL_CPINTC_TYPE_REG24_TYPE_776_MASK (0x00000100u)
  27031. #define CSL_CPINTC_TYPE_REG24_TYPE_776_SHIFT (0x00000008u)
  27032. #define CSL_CPINTC_TYPE_REG24_TYPE_776_RESETVAL (0x00000000u)
  27033. #define CSL_CPINTC_TYPE_REG24_TYPE_777_MASK (0x00000200u)
  27034. #define CSL_CPINTC_TYPE_REG24_TYPE_777_SHIFT (0x00000009u)
  27035. #define CSL_CPINTC_TYPE_REG24_TYPE_777_RESETVAL (0x00000000u)
  27036. #define CSL_CPINTC_TYPE_REG24_TYPE_778_MASK (0x00000400u)
  27037. #define CSL_CPINTC_TYPE_REG24_TYPE_778_SHIFT (0x0000000Au)
  27038. #define CSL_CPINTC_TYPE_REG24_TYPE_778_RESETVAL (0x00000000u)
  27039. #define CSL_CPINTC_TYPE_REG24_TYPE_779_MASK (0x00000800u)
  27040. #define CSL_CPINTC_TYPE_REG24_TYPE_779_SHIFT (0x0000000Bu)
  27041. #define CSL_CPINTC_TYPE_REG24_TYPE_779_RESETVAL (0x00000000u)
  27042. #define CSL_CPINTC_TYPE_REG24_TYPE_780_MASK (0x00001000u)
  27043. #define CSL_CPINTC_TYPE_REG24_TYPE_780_SHIFT (0x0000000Cu)
  27044. #define CSL_CPINTC_TYPE_REG24_TYPE_780_RESETVAL (0x00000000u)
  27045. #define CSL_CPINTC_TYPE_REG24_TYPE_781_MASK (0x00002000u)
  27046. #define CSL_CPINTC_TYPE_REG24_TYPE_781_SHIFT (0x0000000Du)
  27047. #define CSL_CPINTC_TYPE_REG24_TYPE_781_RESETVAL (0x00000000u)
  27048. #define CSL_CPINTC_TYPE_REG24_TYPE_782_MASK (0x00004000u)
  27049. #define CSL_CPINTC_TYPE_REG24_TYPE_782_SHIFT (0x0000000Eu)
  27050. #define CSL_CPINTC_TYPE_REG24_TYPE_782_RESETVAL (0x00000000u)
  27051. #define CSL_CPINTC_TYPE_REG24_TYPE_783_MASK (0x00008000u)
  27052. #define CSL_CPINTC_TYPE_REG24_TYPE_783_SHIFT (0x0000000Fu)
  27053. #define CSL_CPINTC_TYPE_REG24_TYPE_783_RESETVAL (0x00000000u)
  27054. #define CSL_CPINTC_TYPE_REG24_TYPE_784_MASK (0x00010000u)
  27055. #define CSL_CPINTC_TYPE_REG24_TYPE_784_SHIFT (0x00000010u)
  27056. #define CSL_CPINTC_TYPE_REG24_TYPE_784_RESETVAL (0x00000000u)
  27057. #define CSL_CPINTC_TYPE_REG24_TYPE_785_MASK (0x00020000u)
  27058. #define CSL_CPINTC_TYPE_REG24_TYPE_785_SHIFT (0x00000011u)
  27059. #define CSL_CPINTC_TYPE_REG24_TYPE_785_RESETVAL (0x00000000u)
  27060. #define CSL_CPINTC_TYPE_REG24_TYPE_786_MASK (0x00040000u)
  27061. #define CSL_CPINTC_TYPE_REG24_TYPE_786_SHIFT (0x00000012u)
  27062. #define CSL_CPINTC_TYPE_REG24_TYPE_786_RESETVAL (0x00000000u)
  27063. #define CSL_CPINTC_TYPE_REG24_TYPE_787_MASK (0x00080000u)
  27064. #define CSL_CPINTC_TYPE_REG24_TYPE_787_SHIFT (0x00000013u)
  27065. #define CSL_CPINTC_TYPE_REG24_TYPE_787_RESETVAL (0x00000000u)
  27066. #define CSL_CPINTC_TYPE_REG24_TYPE_788_MASK (0x00100000u)
  27067. #define CSL_CPINTC_TYPE_REG24_TYPE_788_SHIFT (0x00000014u)
  27068. #define CSL_CPINTC_TYPE_REG24_TYPE_788_RESETVAL (0x00000000u)
  27069. #define CSL_CPINTC_TYPE_REG24_TYPE_789_MASK (0x00200000u)
  27070. #define CSL_CPINTC_TYPE_REG24_TYPE_789_SHIFT (0x00000015u)
  27071. #define CSL_CPINTC_TYPE_REG24_TYPE_789_RESETVAL (0x00000000u)
  27072. #define CSL_CPINTC_TYPE_REG24_TYPE_790_MASK (0x00400000u)
  27073. #define CSL_CPINTC_TYPE_REG24_TYPE_790_SHIFT (0x00000016u)
  27074. #define CSL_CPINTC_TYPE_REG24_TYPE_790_RESETVAL (0x00000000u)
  27075. #define CSL_CPINTC_TYPE_REG24_TYPE_791_MASK (0x00800000u)
  27076. #define CSL_CPINTC_TYPE_REG24_TYPE_791_SHIFT (0x00000017u)
  27077. #define CSL_CPINTC_TYPE_REG24_TYPE_791_RESETVAL (0x00000000u)
  27078. #define CSL_CPINTC_TYPE_REG24_TYPE_792_MASK (0x01000000u)
  27079. #define CSL_CPINTC_TYPE_REG24_TYPE_792_SHIFT (0x00000018u)
  27080. #define CSL_CPINTC_TYPE_REG24_TYPE_792_RESETVAL (0x00000000u)
  27081. #define CSL_CPINTC_TYPE_REG24_TYPE_793_MASK (0x02000000u)
  27082. #define CSL_CPINTC_TYPE_REG24_TYPE_793_SHIFT (0x00000019u)
  27083. #define CSL_CPINTC_TYPE_REG24_TYPE_793_RESETVAL (0x00000000u)
  27084. #define CSL_CPINTC_TYPE_REG24_TYPE_794_MASK (0x04000000u)
  27085. #define CSL_CPINTC_TYPE_REG24_TYPE_794_SHIFT (0x0000001Au)
  27086. #define CSL_CPINTC_TYPE_REG24_TYPE_794_RESETVAL (0x00000000u)
  27087. #define CSL_CPINTC_TYPE_REG24_TYPE_795_MASK (0x08000000u)
  27088. #define CSL_CPINTC_TYPE_REG24_TYPE_795_SHIFT (0x0000001Bu)
  27089. #define CSL_CPINTC_TYPE_REG24_TYPE_795_RESETVAL (0x00000000u)
  27090. #define CSL_CPINTC_TYPE_REG24_TYPE_796_MASK (0x10000000u)
  27091. #define CSL_CPINTC_TYPE_REG24_TYPE_796_SHIFT (0x0000001Cu)
  27092. #define CSL_CPINTC_TYPE_REG24_TYPE_796_RESETVAL (0x00000000u)
  27093. #define CSL_CPINTC_TYPE_REG24_TYPE_797_MASK (0x20000000u)
  27094. #define CSL_CPINTC_TYPE_REG24_TYPE_797_SHIFT (0x0000001Du)
  27095. #define CSL_CPINTC_TYPE_REG24_TYPE_797_RESETVAL (0x00000000u)
  27096. #define CSL_CPINTC_TYPE_REG24_TYPE_798_MASK (0x40000000u)
  27097. #define CSL_CPINTC_TYPE_REG24_TYPE_798_SHIFT (0x0000001Eu)
  27098. #define CSL_CPINTC_TYPE_REG24_TYPE_798_RESETVAL (0x00000000u)
  27099. #define CSL_CPINTC_TYPE_REG24_TYPE_799_MASK (0x80000000u)
  27100. #define CSL_CPINTC_TYPE_REG24_TYPE_799_SHIFT (0x0000001Fu)
  27101. #define CSL_CPINTC_TYPE_REG24_TYPE_799_RESETVAL (0x00000000u)
  27102. #define CSL_CPINTC_TYPE_REG24_RESETVAL (0x00000000u)
  27103. /* type_reg25 */
  27104. #define CSL_CPINTC_TYPE_REG25_TYPE_800_MASK (0x00000001u)
  27105. #define CSL_CPINTC_TYPE_REG25_TYPE_800_SHIFT (0x00000000u)
  27106. #define CSL_CPINTC_TYPE_REG25_TYPE_800_RESETVAL (0x00000000u)
  27107. #define CSL_CPINTC_TYPE_REG25_TYPE_801_MASK (0x00000002u)
  27108. #define CSL_CPINTC_TYPE_REG25_TYPE_801_SHIFT (0x00000001u)
  27109. #define CSL_CPINTC_TYPE_REG25_TYPE_801_RESETVAL (0x00000000u)
  27110. #define CSL_CPINTC_TYPE_REG25_TYPE_802_MASK (0x00000004u)
  27111. #define CSL_CPINTC_TYPE_REG25_TYPE_802_SHIFT (0x00000002u)
  27112. #define CSL_CPINTC_TYPE_REG25_TYPE_802_RESETVAL (0x00000000u)
  27113. #define CSL_CPINTC_TYPE_REG25_TYPE_803_MASK (0x00000008u)
  27114. #define CSL_CPINTC_TYPE_REG25_TYPE_803_SHIFT (0x00000003u)
  27115. #define CSL_CPINTC_TYPE_REG25_TYPE_803_RESETVAL (0x00000000u)
  27116. #define CSL_CPINTC_TYPE_REG25_TYPE_804_MASK (0x00000010u)
  27117. #define CSL_CPINTC_TYPE_REG25_TYPE_804_SHIFT (0x00000004u)
  27118. #define CSL_CPINTC_TYPE_REG25_TYPE_804_RESETVAL (0x00000000u)
  27119. #define CSL_CPINTC_TYPE_REG25_TYPE_805_MASK (0x00000020u)
  27120. #define CSL_CPINTC_TYPE_REG25_TYPE_805_SHIFT (0x00000005u)
  27121. #define CSL_CPINTC_TYPE_REG25_TYPE_805_RESETVAL (0x00000000u)
  27122. #define CSL_CPINTC_TYPE_REG25_TYPE_806_MASK (0x00000040u)
  27123. #define CSL_CPINTC_TYPE_REG25_TYPE_806_SHIFT (0x00000006u)
  27124. #define CSL_CPINTC_TYPE_REG25_TYPE_806_RESETVAL (0x00000000u)
  27125. #define CSL_CPINTC_TYPE_REG25_TYPE_807_MASK (0x00000080u)
  27126. #define CSL_CPINTC_TYPE_REG25_TYPE_807_SHIFT (0x00000007u)
  27127. #define CSL_CPINTC_TYPE_REG25_TYPE_807_RESETVAL (0x00000000u)
  27128. #define CSL_CPINTC_TYPE_REG25_TYPE_808_MASK (0x00000100u)
  27129. #define CSL_CPINTC_TYPE_REG25_TYPE_808_SHIFT (0x00000008u)
  27130. #define CSL_CPINTC_TYPE_REG25_TYPE_808_RESETVAL (0x00000000u)
  27131. #define CSL_CPINTC_TYPE_REG25_TYPE_809_MASK (0x00000200u)
  27132. #define CSL_CPINTC_TYPE_REG25_TYPE_809_SHIFT (0x00000009u)
  27133. #define CSL_CPINTC_TYPE_REG25_TYPE_809_RESETVAL (0x00000000u)
  27134. #define CSL_CPINTC_TYPE_REG25_TYPE_810_MASK (0x00000400u)
  27135. #define CSL_CPINTC_TYPE_REG25_TYPE_810_SHIFT (0x0000000Au)
  27136. #define CSL_CPINTC_TYPE_REG25_TYPE_810_RESETVAL (0x00000000u)
  27137. #define CSL_CPINTC_TYPE_REG25_TYPE_811_MASK (0x00000800u)
  27138. #define CSL_CPINTC_TYPE_REG25_TYPE_811_SHIFT (0x0000000Bu)
  27139. #define CSL_CPINTC_TYPE_REG25_TYPE_811_RESETVAL (0x00000000u)
  27140. #define CSL_CPINTC_TYPE_REG25_TYPE_812_MASK (0x00001000u)
  27141. #define CSL_CPINTC_TYPE_REG25_TYPE_812_SHIFT (0x0000000Cu)
  27142. #define CSL_CPINTC_TYPE_REG25_TYPE_812_RESETVAL (0x00000000u)
  27143. #define CSL_CPINTC_TYPE_REG25_TYPE_813_MASK (0x00002000u)
  27144. #define CSL_CPINTC_TYPE_REG25_TYPE_813_SHIFT (0x0000000Du)
  27145. #define CSL_CPINTC_TYPE_REG25_TYPE_813_RESETVAL (0x00000000u)
  27146. #define CSL_CPINTC_TYPE_REG25_TYPE_814_MASK (0x00004000u)
  27147. #define CSL_CPINTC_TYPE_REG25_TYPE_814_SHIFT (0x0000000Eu)
  27148. #define CSL_CPINTC_TYPE_REG25_TYPE_814_RESETVAL (0x00000000u)
  27149. #define CSL_CPINTC_TYPE_REG25_TYPE_815_MASK (0x00008000u)
  27150. #define CSL_CPINTC_TYPE_REG25_TYPE_815_SHIFT (0x0000000Fu)
  27151. #define CSL_CPINTC_TYPE_REG25_TYPE_815_RESETVAL (0x00000000u)
  27152. #define CSL_CPINTC_TYPE_REG25_TYPE_816_MASK (0x00010000u)
  27153. #define CSL_CPINTC_TYPE_REG25_TYPE_816_SHIFT (0x00000010u)
  27154. #define CSL_CPINTC_TYPE_REG25_TYPE_816_RESETVAL (0x00000000u)
  27155. #define CSL_CPINTC_TYPE_REG25_TYPE_817_MASK (0x00020000u)
  27156. #define CSL_CPINTC_TYPE_REG25_TYPE_817_SHIFT (0x00000011u)
  27157. #define CSL_CPINTC_TYPE_REG25_TYPE_817_RESETVAL (0x00000000u)
  27158. #define CSL_CPINTC_TYPE_REG25_TYPE_818_MASK (0x00040000u)
  27159. #define CSL_CPINTC_TYPE_REG25_TYPE_818_SHIFT (0x00000012u)
  27160. #define CSL_CPINTC_TYPE_REG25_TYPE_818_RESETVAL (0x00000000u)
  27161. #define CSL_CPINTC_TYPE_REG25_TYPE_819_MASK (0x00080000u)
  27162. #define CSL_CPINTC_TYPE_REG25_TYPE_819_SHIFT (0x00000013u)
  27163. #define CSL_CPINTC_TYPE_REG25_TYPE_819_RESETVAL (0x00000000u)
  27164. #define CSL_CPINTC_TYPE_REG25_TYPE_820_MASK (0x00100000u)
  27165. #define CSL_CPINTC_TYPE_REG25_TYPE_820_SHIFT (0x00000014u)
  27166. #define CSL_CPINTC_TYPE_REG25_TYPE_820_RESETVAL (0x00000000u)
  27167. #define CSL_CPINTC_TYPE_REG25_TYPE_821_MASK (0x00200000u)
  27168. #define CSL_CPINTC_TYPE_REG25_TYPE_821_SHIFT (0x00000015u)
  27169. #define CSL_CPINTC_TYPE_REG25_TYPE_821_RESETVAL (0x00000000u)
  27170. #define CSL_CPINTC_TYPE_REG25_TYPE_822_MASK (0x00400000u)
  27171. #define CSL_CPINTC_TYPE_REG25_TYPE_822_SHIFT (0x00000016u)
  27172. #define CSL_CPINTC_TYPE_REG25_TYPE_822_RESETVAL (0x00000000u)
  27173. #define CSL_CPINTC_TYPE_REG25_TYPE_823_MASK (0x00800000u)
  27174. #define CSL_CPINTC_TYPE_REG25_TYPE_823_SHIFT (0x00000017u)
  27175. #define CSL_CPINTC_TYPE_REG25_TYPE_823_RESETVAL (0x00000000u)
  27176. #define CSL_CPINTC_TYPE_REG25_TYPE_824_MASK (0x01000000u)
  27177. #define CSL_CPINTC_TYPE_REG25_TYPE_824_SHIFT (0x00000018u)
  27178. #define CSL_CPINTC_TYPE_REG25_TYPE_824_RESETVAL (0x00000000u)
  27179. #define CSL_CPINTC_TYPE_REG25_TYPE_825_MASK (0x02000000u)
  27180. #define CSL_CPINTC_TYPE_REG25_TYPE_825_SHIFT (0x00000019u)
  27181. #define CSL_CPINTC_TYPE_REG25_TYPE_825_RESETVAL (0x00000000u)
  27182. #define CSL_CPINTC_TYPE_REG25_TYPE_826_MASK (0x04000000u)
  27183. #define CSL_CPINTC_TYPE_REG25_TYPE_826_SHIFT (0x0000001Au)
  27184. #define CSL_CPINTC_TYPE_REG25_TYPE_826_RESETVAL (0x00000000u)
  27185. #define CSL_CPINTC_TYPE_REG25_TYPE_827_MASK (0x08000000u)
  27186. #define CSL_CPINTC_TYPE_REG25_TYPE_827_SHIFT (0x0000001Bu)
  27187. #define CSL_CPINTC_TYPE_REG25_TYPE_827_RESETVAL (0x00000000u)
  27188. #define CSL_CPINTC_TYPE_REG25_TYPE_828_MASK (0x10000000u)
  27189. #define CSL_CPINTC_TYPE_REG25_TYPE_828_SHIFT (0x0000001Cu)
  27190. #define CSL_CPINTC_TYPE_REG25_TYPE_828_RESETVAL (0x00000000u)
  27191. #define CSL_CPINTC_TYPE_REG25_TYPE_829_MASK (0x20000000u)
  27192. #define CSL_CPINTC_TYPE_REG25_TYPE_829_SHIFT (0x0000001Du)
  27193. #define CSL_CPINTC_TYPE_REG25_TYPE_829_RESETVAL (0x00000000u)
  27194. #define CSL_CPINTC_TYPE_REG25_TYPE_830_MASK (0x40000000u)
  27195. #define CSL_CPINTC_TYPE_REG25_TYPE_830_SHIFT (0x0000001Eu)
  27196. #define CSL_CPINTC_TYPE_REG25_TYPE_830_RESETVAL (0x00000000u)
  27197. #define CSL_CPINTC_TYPE_REG25_TYPE_831_MASK (0x80000000u)
  27198. #define CSL_CPINTC_TYPE_REG25_TYPE_831_SHIFT (0x0000001Fu)
  27199. #define CSL_CPINTC_TYPE_REG25_TYPE_831_RESETVAL (0x00000000u)
  27200. #define CSL_CPINTC_TYPE_REG25_RESETVAL (0x00000000u)
  27201. /* type_reg26 */
  27202. #define CSL_CPINTC_TYPE_REG26_TYPE_832_MASK (0x00000001u)
  27203. #define CSL_CPINTC_TYPE_REG26_TYPE_832_SHIFT (0x00000000u)
  27204. #define CSL_CPINTC_TYPE_REG26_TYPE_832_RESETVAL (0x00000000u)
  27205. #define CSL_CPINTC_TYPE_REG26_TYPE_833_MASK (0x00000002u)
  27206. #define CSL_CPINTC_TYPE_REG26_TYPE_833_SHIFT (0x00000001u)
  27207. #define CSL_CPINTC_TYPE_REG26_TYPE_833_RESETVAL (0x00000000u)
  27208. #define CSL_CPINTC_TYPE_REG26_TYPE_834_MASK (0x00000004u)
  27209. #define CSL_CPINTC_TYPE_REG26_TYPE_834_SHIFT (0x00000002u)
  27210. #define CSL_CPINTC_TYPE_REG26_TYPE_834_RESETVAL (0x00000000u)
  27211. #define CSL_CPINTC_TYPE_REG26_TYPE_835_MASK (0x00000008u)
  27212. #define CSL_CPINTC_TYPE_REG26_TYPE_835_SHIFT (0x00000003u)
  27213. #define CSL_CPINTC_TYPE_REG26_TYPE_835_RESETVAL (0x00000000u)
  27214. #define CSL_CPINTC_TYPE_REG26_TYPE_836_MASK (0x00000010u)
  27215. #define CSL_CPINTC_TYPE_REG26_TYPE_836_SHIFT (0x00000004u)
  27216. #define CSL_CPINTC_TYPE_REG26_TYPE_836_RESETVAL (0x00000000u)
  27217. #define CSL_CPINTC_TYPE_REG26_TYPE_837_MASK (0x00000020u)
  27218. #define CSL_CPINTC_TYPE_REG26_TYPE_837_SHIFT (0x00000005u)
  27219. #define CSL_CPINTC_TYPE_REG26_TYPE_837_RESETVAL (0x00000000u)
  27220. #define CSL_CPINTC_TYPE_REG26_TYPE_838_MASK (0x00000040u)
  27221. #define CSL_CPINTC_TYPE_REG26_TYPE_838_SHIFT (0x00000006u)
  27222. #define CSL_CPINTC_TYPE_REG26_TYPE_838_RESETVAL (0x00000000u)
  27223. #define CSL_CPINTC_TYPE_REG26_TYPE_839_MASK (0x00000080u)
  27224. #define CSL_CPINTC_TYPE_REG26_TYPE_839_SHIFT (0x00000007u)
  27225. #define CSL_CPINTC_TYPE_REG26_TYPE_839_RESETVAL (0x00000000u)
  27226. #define CSL_CPINTC_TYPE_REG26_TYPE_840_MASK (0x00000100u)
  27227. #define CSL_CPINTC_TYPE_REG26_TYPE_840_SHIFT (0x00000008u)
  27228. #define CSL_CPINTC_TYPE_REG26_TYPE_840_RESETVAL (0x00000000u)
  27229. #define CSL_CPINTC_TYPE_REG26_TYPE_841_MASK (0x00000200u)
  27230. #define CSL_CPINTC_TYPE_REG26_TYPE_841_SHIFT (0x00000009u)
  27231. #define CSL_CPINTC_TYPE_REG26_TYPE_841_RESETVAL (0x00000000u)
  27232. #define CSL_CPINTC_TYPE_REG26_TYPE_842_MASK (0x00000400u)
  27233. #define CSL_CPINTC_TYPE_REG26_TYPE_842_SHIFT (0x0000000Au)
  27234. #define CSL_CPINTC_TYPE_REG26_TYPE_842_RESETVAL (0x00000000u)
  27235. #define CSL_CPINTC_TYPE_REG26_TYPE_843_MASK (0x00000800u)
  27236. #define CSL_CPINTC_TYPE_REG26_TYPE_843_SHIFT (0x0000000Bu)
  27237. #define CSL_CPINTC_TYPE_REG26_TYPE_843_RESETVAL (0x00000000u)
  27238. #define CSL_CPINTC_TYPE_REG26_TYPE_844_MASK (0x00001000u)
  27239. #define CSL_CPINTC_TYPE_REG26_TYPE_844_SHIFT (0x0000000Cu)
  27240. #define CSL_CPINTC_TYPE_REG26_TYPE_844_RESETVAL (0x00000000u)
  27241. #define CSL_CPINTC_TYPE_REG26_TYPE_845_MASK (0x00002000u)
  27242. #define CSL_CPINTC_TYPE_REG26_TYPE_845_SHIFT (0x0000000Du)
  27243. #define CSL_CPINTC_TYPE_REG26_TYPE_845_RESETVAL (0x00000000u)
  27244. #define CSL_CPINTC_TYPE_REG26_TYPE_846_MASK (0x00004000u)
  27245. #define CSL_CPINTC_TYPE_REG26_TYPE_846_SHIFT (0x0000000Eu)
  27246. #define CSL_CPINTC_TYPE_REG26_TYPE_846_RESETVAL (0x00000000u)
  27247. #define CSL_CPINTC_TYPE_REG26_TYPE_847_MASK (0x00008000u)
  27248. #define CSL_CPINTC_TYPE_REG26_TYPE_847_SHIFT (0x0000000Fu)
  27249. #define CSL_CPINTC_TYPE_REG26_TYPE_847_RESETVAL (0x00000000u)
  27250. #define CSL_CPINTC_TYPE_REG26_TYPE_848_MASK (0x00010000u)
  27251. #define CSL_CPINTC_TYPE_REG26_TYPE_848_SHIFT (0x00000010u)
  27252. #define CSL_CPINTC_TYPE_REG26_TYPE_848_RESETVAL (0x00000000u)
  27253. #define CSL_CPINTC_TYPE_REG26_TYPE_849_MASK (0x00020000u)
  27254. #define CSL_CPINTC_TYPE_REG26_TYPE_849_SHIFT (0x00000011u)
  27255. #define CSL_CPINTC_TYPE_REG26_TYPE_849_RESETVAL (0x00000000u)
  27256. #define CSL_CPINTC_TYPE_REG26_TYPE_850_MASK (0x00040000u)
  27257. #define CSL_CPINTC_TYPE_REG26_TYPE_850_SHIFT (0x00000012u)
  27258. #define CSL_CPINTC_TYPE_REG26_TYPE_850_RESETVAL (0x00000000u)
  27259. #define CSL_CPINTC_TYPE_REG26_TYPE_851_MASK (0x00080000u)
  27260. #define CSL_CPINTC_TYPE_REG26_TYPE_851_SHIFT (0x00000013u)
  27261. #define CSL_CPINTC_TYPE_REG26_TYPE_851_RESETVAL (0x00000000u)
  27262. #define CSL_CPINTC_TYPE_REG26_TYPE_852_MASK (0x00100000u)
  27263. #define CSL_CPINTC_TYPE_REG26_TYPE_852_SHIFT (0x00000014u)
  27264. #define CSL_CPINTC_TYPE_REG26_TYPE_852_RESETVAL (0x00000000u)
  27265. #define CSL_CPINTC_TYPE_REG26_TYPE_853_MASK (0x00200000u)
  27266. #define CSL_CPINTC_TYPE_REG26_TYPE_853_SHIFT (0x00000015u)
  27267. #define CSL_CPINTC_TYPE_REG26_TYPE_853_RESETVAL (0x00000000u)
  27268. #define CSL_CPINTC_TYPE_REG26_TYPE_854_MASK (0x00400000u)
  27269. #define CSL_CPINTC_TYPE_REG26_TYPE_854_SHIFT (0x00000016u)
  27270. #define CSL_CPINTC_TYPE_REG26_TYPE_854_RESETVAL (0x00000000u)
  27271. #define CSL_CPINTC_TYPE_REG26_TYPE_855_MASK (0x00800000u)
  27272. #define CSL_CPINTC_TYPE_REG26_TYPE_855_SHIFT (0x00000017u)
  27273. #define CSL_CPINTC_TYPE_REG26_TYPE_855_RESETVAL (0x00000000u)
  27274. #define CSL_CPINTC_TYPE_REG26_TYPE_856_MASK (0x01000000u)
  27275. #define CSL_CPINTC_TYPE_REG26_TYPE_856_SHIFT (0x00000018u)
  27276. #define CSL_CPINTC_TYPE_REG26_TYPE_856_RESETVAL (0x00000000u)
  27277. #define CSL_CPINTC_TYPE_REG26_TYPE_857_MASK (0x02000000u)
  27278. #define CSL_CPINTC_TYPE_REG26_TYPE_857_SHIFT (0x00000019u)
  27279. #define CSL_CPINTC_TYPE_REG26_TYPE_857_RESETVAL (0x00000000u)
  27280. #define CSL_CPINTC_TYPE_REG26_TYPE_858_MASK (0x04000000u)
  27281. #define CSL_CPINTC_TYPE_REG26_TYPE_858_SHIFT (0x0000001Au)
  27282. #define CSL_CPINTC_TYPE_REG26_TYPE_858_RESETVAL (0x00000000u)
  27283. #define CSL_CPINTC_TYPE_REG26_TYPE_859_MASK (0x08000000u)
  27284. #define CSL_CPINTC_TYPE_REG26_TYPE_859_SHIFT (0x0000001Bu)
  27285. #define CSL_CPINTC_TYPE_REG26_TYPE_859_RESETVAL (0x00000000u)
  27286. #define CSL_CPINTC_TYPE_REG26_TYPE_860_MASK (0x10000000u)
  27287. #define CSL_CPINTC_TYPE_REG26_TYPE_860_SHIFT (0x0000001Cu)
  27288. #define CSL_CPINTC_TYPE_REG26_TYPE_860_RESETVAL (0x00000000u)
  27289. #define CSL_CPINTC_TYPE_REG26_TYPE_861_MASK (0x20000000u)
  27290. #define CSL_CPINTC_TYPE_REG26_TYPE_861_SHIFT (0x0000001Du)
  27291. #define CSL_CPINTC_TYPE_REG26_TYPE_861_RESETVAL (0x00000000u)
  27292. #define CSL_CPINTC_TYPE_REG26_TYPE_862_MASK (0x40000000u)
  27293. #define CSL_CPINTC_TYPE_REG26_TYPE_862_SHIFT (0x0000001Eu)
  27294. #define CSL_CPINTC_TYPE_REG26_TYPE_862_RESETVAL (0x00000000u)
  27295. #define CSL_CPINTC_TYPE_REG26_TYPE_863_MASK (0x80000000u)
  27296. #define CSL_CPINTC_TYPE_REG26_TYPE_863_SHIFT (0x0000001Fu)
  27297. #define CSL_CPINTC_TYPE_REG26_TYPE_863_RESETVAL (0x00000000u)
  27298. #define CSL_CPINTC_TYPE_REG26_RESETVAL (0x00000000u)
  27299. /* type_reg27 */
  27300. #define CSL_CPINTC_TYPE_REG27_TYPE_864_MASK (0x00000001u)
  27301. #define CSL_CPINTC_TYPE_REG27_TYPE_864_SHIFT (0x00000000u)
  27302. #define CSL_CPINTC_TYPE_REG27_TYPE_864_RESETVAL (0x00000000u)
  27303. #define CSL_CPINTC_TYPE_REG27_TYPE_865_MASK (0x00000002u)
  27304. #define CSL_CPINTC_TYPE_REG27_TYPE_865_SHIFT (0x00000001u)
  27305. #define CSL_CPINTC_TYPE_REG27_TYPE_865_RESETVAL (0x00000000u)
  27306. #define CSL_CPINTC_TYPE_REG27_TYPE_866_MASK (0x00000004u)
  27307. #define CSL_CPINTC_TYPE_REG27_TYPE_866_SHIFT (0x00000002u)
  27308. #define CSL_CPINTC_TYPE_REG27_TYPE_866_RESETVAL (0x00000000u)
  27309. #define CSL_CPINTC_TYPE_REG27_TYPE_867_MASK (0x00000008u)
  27310. #define CSL_CPINTC_TYPE_REG27_TYPE_867_SHIFT (0x00000003u)
  27311. #define CSL_CPINTC_TYPE_REG27_TYPE_867_RESETVAL (0x00000000u)
  27312. #define CSL_CPINTC_TYPE_REG27_TYPE_868_MASK (0x00000010u)
  27313. #define CSL_CPINTC_TYPE_REG27_TYPE_868_SHIFT (0x00000004u)
  27314. #define CSL_CPINTC_TYPE_REG27_TYPE_868_RESETVAL (0x00000000u)
  27315. #define CSL_CPINTC_TYPE_REG27_TYPE_869_MASK (0x00000020u)
  27316. #define CSL_CPINTC_TYPE_REG27_TYPE_869_SHIFT (0x00000005u)
  27317. #define CSL_CPINTC_TYPE_REG27_TYPE_869_RESETVAL (0x00000000u)
  27318. #define CSL_CPINTC_TYPE_REG27_TYPE_870_MASK (0x00000040u)
  27319. #define CSL_CPINTC_TYPE_REG27_TYPE_870_SHIFT (0x00000006u)
  27320. #define CSL_CPINTC_TYPE_REG27_TYPE_870_RESETVAL (0x00000000u)
  27321. #define CSL_CPINTC_TYPE_REG27_TYPE_871_MASK (0x00000080u)
  27322. #define CSL_CPINTC_TYPE_REG27_TYPE_871_SHIFT (0x00000007u)
  27323. #define CSL_CPINTC_TYPE_REG27_TYPE_871_RESETVAL (0x00000000u)
  27324. #define CSL_CPINTC_TYPE_REG27_TYPE_872_MASK (0x00000100u)
  27325. #define CSL_CPINTC_TYPE_REG27_TYPE_872_SHIFT (0x00000008u)
  27326. #define CSL_CPINTC_TYPE_REG27_TYPE_872_RESETVAL (0x00000000u)
  27327. #define CSL_CPINTC_TYPE_REG27_TYPE_873_MASK (0x00000200u)
  27328. #define CSL_CPINTC_TYPE_REG27_TYPE_873_SHIFT (0x00000009u)
  27329. #define CSL_CPINTC_TYPE_REG27_TYPE_873_RESETVAL (0x00000000u)
  27330. #define CSL_CPINTC_TYPE_REG27_TYPE_874_MASK (0x00000400u)
  27331. #define CSL_CPINTC_TYPE_REG27_TYPE_874_SHIFT (0x0000000Au)
  27332. #define CSL_CPINTC_TYPE_REG27_TYPE_874_RESETVAL (0x00000000u)
  27333. #define CSL_CPINTC_TYPE_REG27_TYPE_875_MASK (0x00000800u)
  27334. #define CSL_CPINTC_TYPE_REG27_TYPE_875_SHIFT (0x0000000Bu)
  27335. #define CSL_CPINTC_TYPE_REG27_TYPE_875_RESETVAL (0x00000000u)
  27336. #define CSL_CPINTC_TYPE_REG27_TYPE_876_MASK (0x00001000u)
  27337. #define CSL_CPINTC_TYPE_REG27_TYPE_876_SHIFT (0x0000000Cu)
  27338. #define CSL_CPINTC_TYPE_REG27_TYPE_876_RESETVAL (0x00000000u)
  27339. #define CSL_CPINTC_TYPE_REG27_TYPE_877_MASK (0x00002000u)
  27340. #define CSL_CPINTC_TYPE_REG27_TYPE_877_SHIFT (0x0000000Du)
  27341. #define CSL_CPINTC_TYPE_REG27_TYPE_877_RESETVAL (0x00000000u)
  27342. #define CSL_CPINTC_TYPE_REG27_TYPE_878_MASK (0x00004000u)
  27343. #define CSL_CPINTC_TYPE_REG27_TYPE_878_SHIFT (0x0000000Eu)
  27344. #define CSL_CPINTC_TYPE_REG27_TYPE_878_RESETVAL (0x00000000u)
  27345. #define CSL_CPINTC_TYPE_REG27_TYPE_879_MASK (0x00008000u)
  27346. #define CSL_CPINTC_TYPE_REG27_TYPE_879_SHIFT (0x0000000Fu)
  27347. #define CSL_CPINTC_TYPE_REG27_TYPE_879_RESETVAL (0x00000000u)
  27348. #define CSL_CPINTC_TYPE_REG27_TYPE_880_MASK (0x00010000u)
  27349. #define CSL_CPINTC_TYPE_REG27_TYPE_880_SHIFT (0x00000010u)
  27350. #define CSL_CPINTC_TYPE_REG27_TYPE_880_RESETVAL (0x00000000u)
  27351. #define CSL_CPINTC_TYPE_REG27_TYPE_881_MASK (0x00020000u)
  27352. #define CSL_CPINTC_TYPE_REG27_TYPE_881_SHIFT (0x00000011u)
  27353. #define CSL_CPINTC_TYPE_REG27_TYPE_881_RESETVAL (0x00000000u)
  27354. #define CSL_CPINTC_TYPE_REG27_TYPE_882_MASK (0x00040000u)
  27355. #define CSL_CPINTC_TYPE_REG27_TYPE_882_SHIFT (0x00000012u)
  27356. #define CSL_CPINTC_TYPE_REG27_TYPE_882_RESETVAL (0x00000000u)
  27357. #define CSL_CPINTC_TYPE_REG27_TYPE_883_MASK (0x00080000u)
  27358. #define CSL_CPINTC_TYPE_REG27_TYPE_883_SHIFT (0x00000013u)
  27359. #define CSL_CPINTC_TYPE_REG27_TYPE_883_RESETVAL (0x00000000u)
  27360. #define CSL_CPINTC_TYPE_REG27_TYPE_884_MASK (0x00100000u)
  27361. #define CSL_CPINTC_TYPE_REG27_TYPE_884_SHIFT (0x00000014u)
  27362. #define CSL_CPINTC_TYPE_REG27_TYPE_884_RESETVAL (0x00000000u)
  27363. #define CSL_CPINTC_TYPE_REG27_TYPE_885_MASK (0x00200000u)
  27364. #define CSL_CPINTC_TYPE_REG27_TYPE_885_SHIFT (0x00000015u)
  27365. #define CSL_CPINTC_TYPE_REG27_TYPE_885_RESETVAL (0x00000000u)
  27366. #define CSL_CPINTC_TYPE_REG27_TYPE_886_MASK (0x00400000u)
  27367. #define CSL_CPINTC_TYPE_REG27_TYPE_886_SHIFT (0x00000016u)
  27368. #define CSL_CPINTC_TYPE_REG27_TYPE_886_RESETVAL (0x00000000u)
  27369. #define CSL_CPINTC_TYPE_REG27_TYPE_887_MASK (0x00800000u)
  27370. #define CSL_CPINTC_TYPE_REG27_TYPE_887_SHIFT (0x00000017u)
  27371. #define CSL_CPINTC_TYPE_REG27_TYPE_887_RESETVAL (0x00000000u)
  27372. #define CSL_CPINTC_TYPE_REG27_TYPE_888_MASK (0x01000000u)
  27373. #define CSL_CPINTC_TYPE_REG27_TYPE_888_SHIFT (0x00000018u)
  27374. #define CSL_CPINTC_TYPE_REG27_TYPE_888_RESETVAL (0x00000000u)
  27375. #define CSL_CPINTC_TYPE_REG27_TYPE_889_MASK (0x02000000u)
  27376. #define CSL_CPINTC_TYPE_REG27_TYPE_889_SHIFT (0x00000019u)
  27377. #define CSL_CPINTC_TYPE_REG27_TYPE_889_RESETVAL (0x00000000u)
  27378. #define CSL_CPINTC_TYPE_REG27_TYPE_890_MASK (0x04000000u)
  27379. #define CSL_CPINTC_TYPE_REG27_TYPE_890_SHIFT (0x0000001Au)
  27380. #define CSL_CPINTC_TYPE_REG27_TYPE_890_RESETVAL (0x00000000u)
  27381. #define CSL_CPINTC_TYPE_REG27_TYPE_891_MASK (0x08000000u)
  27382. #define CSL_CPINTC_TYPE_REG27_TYPE_891_SHIFT (0x0000001Bu)
  27383. #define CSL_CPINTC_TYPE_REG27_TYPE_891_RESETVAL (0x00000000u)
  27384. #define CSL_CPINTC_TYPE_REG27_TYPE_892_MASK (0x10000000u)
  27385. #define CSL_CPINTC_TYPE_REG27_TYPE_892_SHIFT (0x0000001Cu)
  27386. #define CSL_CPINTC_TYPE_REG27_TYPE_892_RESETVAL (0x00000000u)
  27387. #define CSL_CPINTC_TYPE_REG27_TYPE_893_MASK (0x20000000u)
  27388. #define CSL_CPINTC_TYPE_REG27_TYPE_893_SHIFT (0x0000001Du)
  27389. #define CSL_CPINTC_TYPE_REG27_TYPE_893_RESETVAL (0x00000000u)
  27390. #define CSL_CPINTC_TYPE_REG27_TYPE_894_MASK (0x40000000u)
  27391. #define CSL_CPINTC_TYPE_REG27_TYPE_894_SHIFT (0x0000001Eu)
  27392. #define CSL_CPINTC_TYPE_REG27_TYPE_894_RESETVAL (0x00000000u)
  27393. #define CSL_CPINTC_TYPE_REG27_TYPE_895_MASK (0x80000000u)
  27394. #define CSL_CPINTC_TYPE_REG27_TYPE_895_SHIFT (0x0000001Fu)
  27395. #define CSL_CPINTC_TYPE_REG27_TYPE_895_RESETVAL (0x00000000u)
  27396. #define CSL_CPINTC_TYPE_REG27_RESETVAL (0x00000000u)
  27397. /* type_reg28 */
  27398. #define CSL_CPINTC_TYPE_REG28_TYPE_896_MASK (0x00000001u)
  27399. #define CSL_CPINTC_TYPE_REG28_TYPE_896_SHIFT (0x00000000u)
  27400. #define CSL_CPINTC_TYPE_REG28_TYPE_896_RESETVAL (0x00000000u)
  27401. #define CSL_CPINTC_TYPE_REG28_TYPE_897_MASK (0x00000002u)
  27402. #define CSL_CPINTC_TYPE_REG28_TYPE_897_SHIFT (0x00000001u)
  27403. #define CSL_CPINTC_TYPE_REG28_TYPE_897_RESETVAL (0x00000000u)
  27404. #define CSL_CPINTC_TYPE_REG28_TYPE_898_MASK (0x00000004u)
  27405. #define CSL_CPINTC_TYPE_REG28_TYPE_898_SHIFT (0x00000002u)
  27406. #define CSL_CPINTC_TYPE_REG28_TYPE_898_RESETVAL (0x00000000u)
  27407. #define CSL_CPINTC_TYPE_REG28_TYPE_899_MASK (0x00000008u)
  27408. #define CSL_CPINTC_TYPE_REG28_TYPE_899_SHIFT (0x00000003u)
  27409. #define CSL_CPINTC_TYPE_REG28_TYPE_899_RESETVAL (0x00000000u)
  27410. #define CSL_CPINTC_TYPE_REG28_TYPE_900_MASK (0x00000010u)
  27411. #define CSL_CPINTC_TYPE_REG28_TYPE_900_SHIFT (0x00000004u)
  27412. #define CSL_CPINTC_TYPE_REG28_TYPE_900_RESETVAL (0x00000000u)
  27413. #define CSL_CPINTC_TYPE_REG28_TYPE_901_MASK (0x00000020u)
  27414. #define CSL_CPINTC_TYPE_REG28_TYPE_901_SHIFT (0x00000005u)
  27415. #define CSL_CPINTC_TYPE_REG28_TYPE_901_RESETVAL (0x00000000u)
  27416. #define CSL_CPINTC_TYPE_REG28_TYPE_902_MASK (0x00000040u)
  27417. #define CSL_CPINTC_TYPE_REG28_TYPE_902_SHIFT (0x00000006u)
  27418. #define CSL_CPINTC_TYPE_REG28_TYPE_902_RESETVAL (0x00000000u)
  27419. #define CSL_CPINTC_TYPE_REG28_TYPE_903_MASK (0x00000080u)
  27420. #define CSL_CPINTC_TYPE_REG28_TYPE_903_SHIFT (0x00000007u)
  27421. #define CSL_CPINTC_TYPE_REG28_TYPE_903_RESETVAL (0x00000000u)
  27422. #define CSL_CPINTC_TYPE_REG28_TYPE_904_MASK (0x00000100u)
  27423. #define CSL_CPINTC_TYPE_REG28_TYPE_904_SHIFT (0x00000008u)
  27424. #define CSL_CPINTC_TYPE_REG28_TYPE_904_RESETVAL (0x00000000u)
  27425. #define CSL_CPINTC_TYPE_REG28_TYPE_905_MASK (0x00000200u)
  27426. #define CSL_CPINTC_TYPE_REG28_TYPE_905_SHIFT (0x00000009u)
  27427. #define CSL_CPINTC_TYPE_REG28_TYPE_905_RESETVAL (0x00000000u)
  27428. #define CSL_CPINTC_TYPE_REG28_TYPE_906_MASK (0x00000400u)
  27429. #define CSL_CPINTC_TYPE_REG28_TYPE_906_SHIFT (0x0000000Au)
  27430. #define CSL_CPINTC_TYPE_REG28_TYPE_906_RESETVAL (0x00000000u)
  27431. #define CSL_CPINTC_TYPE_REG28_TYPE_907_MASK (0x00000800u)
  27432. #define CSL_CPINTC_TYPE_REG28_TYPE_907_SHIFT (0x0000000Bu)
  27433. #define CSL_CPINTC_TYPE_REG28_TYPE_907_RESETVAL (0x00000000u)
  27434. #define CSL_CPINTC_TYPE_REG28_TYPE_908_MASK (0x00001000u)
  27435. #define CSL_CPINTC_TYPE_REG28_TYPE_908_SHIFT (0x0000000Cu)
  27436. #define CSL_CPINTC_TYPE_REG28_TYPE_908_RESETVAL (0x00000000u)
  27437. #define CSL_CPINTC_TYPE_REG28_TYPE_909_MASK (0x00002000u)
  27438. #define CSL_CPINTC_TYPE_REG28_TYPE_909_SHIFT (0x0000000Du)
  27439. #define CSL_CPINTC_TYPE_REG28_TYPE_909_RESETVAL (0x00000000u)
  27440. #define CSL_CPINTC_TYPE_REG28_TYPE_910_MASK (0x00004000u)
  27441. #define CSL_CPINTC_TYPE_REG28_TYPE_910_SHIFT (0x0000000Eu)
  27442. #define CSL_CPINTC_TYPE_REG28_TYPE_910_RESETVAL (0x00000000u)
  27443. #define CSL_CPINTC_TYPE_REG28_TYPE_911_MASK (0x00008000u)
  27444. #define CSL_CPINTC_TYPE_REG28_TYPE_911_SHIFT (0x0000000Fu)
  27445. #define CSL_CPINTC_TYPE_REG28_TYPE_911_RESETVAL (0x00000000u)
  27446. #define CSL_CPINTC_TYPE_REG28_TYPE_912_MASK (0x00010000u)
  27447. #define CSL_CPINTC_TYPE_REG28_TYPE_912_SHIFT (0x00000010u)
  27448. #define CSL_CPINTC_TYPE_REG28_TYPE_912_RESETVAL (0x00000000u)
  27449. #define CSL_CPINTC_TYPE_REG28_TYPE_913_MASK (0x00020000u)
  27450. #define CSL_CPINTC_TYPE_REG28_TYPE_913_SHIFT (0x00000011u)
  27451. #define CSL_CPINTC_TYPE_REG28_TYPE_913_RESETVAL (0x00000000u)
  27452. #define CSL_CPINTC_TYPE_REG28_TYPE_914_MASK (0x00040000u)
  27453. #define CSL_CPINTC_TYPE_REG28_TYPE_914_SHIFT (0x00000012u)
  27454. #define CSL_CPINTC_TYPE_REG28_TYPE_914_RESETVAL (0x00000000u)
  27455. #define CSL_CPINTC_TYPE_REG28_TYPE_915_MASK (0x00080000u)
  27456. #define CSL_CPINTC_TYPE_REG28_TYPE_915_SHIFT (0x00000013u)
  27457. #define CSL_CPINTC_TYPE_REG28_TYPE_915_RESETVAL (0x00000000u)
  27458. #define CSL_CPINTC_TYPE_REG28_TYPE_916_MASK (0x00100000u)
  27459. #define CSL_CPINTC_TYPE_REG28_TYPE_916_SHIFT (0x00000014u)
  27460. #define CSL_CPINTC_TYPE_REG28_TYPE_916_RESETVAL (0x00000000u)
  27461. #define CSL_CPINTC_TYPE_REG28_TYPE_917_MASK (0x00200000u)
  27462. #define CSL_CPINTC_TYPE_REG28_TYPE_917_SHIFT (0x00000015u)
  27463. #define CSL_CPINTC_TYPE_REG28_TYPE_917_RESETVAL (0x00000000u)
  27464. #define CSL_CPINTC_TYPE_REG28_TYPE_918_MASK (0x00400000u)
  27465. #define CSL_CPINTC_TYPE_REG28_TYPE_918_SHIFT (0x00000016u)
  27466. #define CSL_CPINTC_TYPE_REG28_TYPE_918_RESETVAL (0x00000000u)
  27467. #define CSL_CPINTC_TYPE_REG28_TYPE_919_MASK (0x00800000u)
  27468. #define CSL_CPINTC_TYPE_REG28_TYPE_919_SHIFT (0x00000017u)
  27469. #define CSL_CPINTC_TYPE_REG28_TYPE_919_RESETVAL (0x00000000u)
  27470. #define CSL_CPINTC_TYPE_REG28_TYPE_920_MASK (0x01000000u)
  27471. #define CSL_CPINTC_TYPE_REG28_TYPE_920_SHIFT (0x00000018u)
  27472. #define CSL_CPINTC_TYPE_REG28_TYPE_920_RESETVAL (0x00000000u)
  27473. #define CSL_CPINTC_TYPE_REG28_TYPE_921_MASK (0x02000000u)
  27474. #define CSL_CPINTC_TYPE_REG28_TYPE_921_SHIFT (0x00000019u)
  27475. #define CSL_CPINTC_TYPE_REG28_TYPE_921_RESETVAL (0x00000000u)
  27476. #define CSL_CPINTC_TYPE_REG28_TYPE_922_MASK (0x04000000u)
  27477. #define CSL_CPINTC_TYPE_REG28_TYPE_922_SHIFT (0x0000001Au)
  27478. #define CSL_CPINTC_TYPE_REG28_TYPE_922_RESETVAL (0x00000000u)
  27479. #define CSL_CPINTC_TYPE_REG28_TYPE_923_MASK (0x08000000u)
  27480. #define CSL_CPINTC_TYPE_REG28_TYPE_923_SHIFT (0x0000001Bu)
  27481. #define CSL_CPINTC_TYPE_REG28_TYPE_923_RESETVAL (0x00000000u)
  27482. #define CSL_CPINTC_TYPE_REG28_TYPE_924_MASK (0x10000000u)
  27483. #define CSL_CPINTC_TYPE_REG28_TYPE_924_SHIFT (0x0000001Cu)
  27484. #define CSL_CPINTC_TYPE_REG28_TYPE_924_RESETVAL (0x00000000u)
  27485. #define CSL_CPINTC_TYPE_REG28_TYPE_925_MASK (0x20000000u)
  27486. #define CSL_CPINTC_TYPE_REG28_TYPE_925_SHIFT (0x0000001Du)
  27487. #define CSL_CPINTC_TYPE_REG28_TYPE_925_RESETVAL (0x00000000u)
  27488. #define CSL_CPINTC_TYPE_REG28_TYPE_926_MASK (0x40000000u)
  27489. #define CSL_CPINTC_TYPE_REG28_TYPE_926_SHIFT (0x0000001Eu)
  27490. #define CSL_CPINTC_TYPE_REG28_TYPE_926_RESETVAL (0x00000000u)
  27491. #define CSL_CPINTC_TYPE_REG28_TYPE_927_MASK (0x80000000u)
  27492. #define CSL_CPINTC_TYPE_REG28_TYPE_927_SHIFT (0x0000001Fu)
  27493. #define CSL_CPINTC_TYPE_REG28_TYPE_927_RESETVAL (0x00000000u)
  27494. #define CSL_CPINTC_TYPE_REG28_RESETVAL (0x00000000u)
  27495. /* type_reg29 */
  27496. #define CSL_CPINTC_TYPE_REG29_TYPE_928_MASK (0x00000001u)
  27497. #define CSL_CPINTC_TYPE_REG29_TYPE_928_SHIFT (0x00000000u)
  27498. #define CSL_CPINTC_TYPE_REG29_TYPE_928_RESETVAL (0x00000000u)
  27499. #define CSL_CPINTC_TYPE_REG29_TYPE_929_MASK (0x00000002u)
  27500. #define CSL_CPINTC_TYPE_REG29_TYPE_929_SHIFT (0x00000001u)
  27501. #define CSL_CPINTC_TYPE_REG29_TYPE_929_RESETVAL (0x00000000u)
  27502. #define CSL_CPINTC_TYPE_REG29_TYPE_930_MASK (0x00000004u)
  27503. #define CSL_CPINTC_TYPE_REG29_TYPE_930_SHIFT (0x00000002u)
  27504. #define CSL_CPINTC_TYPE_REG29_TYPE_930_RESETVAL (0x00000000u)
  27505. #define CSL_CPINTC_TYPE_REG29_TYPE_931_MASK (0x00000008u)
  27506. #define CSL_CPINTC_TYPE_REG29_TYPE_931_SHIFT (0x00000003u)
  27507. #define CSL_CPINTC_TYPE_REG29_TYPE_931_RESETVAL (0x00000000u)
  27508. #define CSL_CPINTC_TYPE_REG29_TYPE_932_MASK (0x00000010u)
  27509. #define CSL_CPINTC_TYPE_REG29_TYPE_932_SHIFT (0x00000004u)
  27510. #define CSL_CPINTC_TYPE_REG29_TYPE_932_RESETVAL (0x00000000u)
  27511. #define CSL_CPINTC_TYPE_REG29_TYPE_933_MASK (0x00000020u)
  27512. #define CSL_CPINTC_TYPE_REG29_TYPE_933_SHIFT (0x00000005u)
  27513. #define CSL_CPINTC_TYPE_REG29_TYPE_933_RESETVAL (0x00000000u)
  27514. #define CSL_CPINTC_TYPE_REG29_TYPE_934_MASK (0x00000040u)
  27515. #define CSL_CPINTC_TYPE_REG29_TYPE_934_SHIFT (0x00000006u)
  27516. #define CSL_CPINTC_TYPE_REG29_TYPE_934_RESETVAL (0x00000000u)
  27517. #define CSL_CPINTC_TYPE_REG29_TYPE_935_MASK (0x00000080u)
  27518. #define CSL_CPINTC_TYPE_REG29_TYPE_935_SHIFT (0x00000007u)
  27519. #define CSL_CPINTC_TYPE_REG29_TYPE_935_RESETVAL (0x00000000u)
  27520. #define CSL_CPINTC_TYPE_REG29_TYPE_936_MASK (0x00000100u)
  27521. #define CSL_CPINTC_TYPE_REG29_TYPE_936_SHIFT (0x00000008u)
  27522. #define CSL_CPINTC_TYPE_REG29_TYPE_936_RESETVAL (0x00000000u)
  27523. #define CSL_CPINTC_TYPE_REG29_TYPE_937_MASK (0x00000200u)
  27524. #define CSL_CPINTC_TYPE_REG29_TYPE_937_SHIFT (0x00000009u)
  27525. #define CSL_CPINTC_TYPE_REG29_TYPE_937_RESETVAL (0x00000000u)
  27526. #define CSL_CPINTC_TYPE_REG29_TYPE_938_MASK (0x00000400u)
  27527. #define CSL_CPINTC_TYPE_REG29_TYPE_938_SHIFT (0x0000000Au)
  27528. #define CSL_CPINTC_TYPE_REG29_TYPE_938_RESETVAL (0x00000000u)
  27529. #define CSL_CPINTC_TYPE_REG29_TYPE_939_MASK (0x00000800u)
  27530. #define CSL_CPINTC_TYPE_REG29_TYPE_939_SHIFT (0x0000000Bu)
  27531. #define CSL_CPINTC_TYPE_REG29_TYPE_939_RESETVAL (0x00000000u)
  27532. #define CSL_CPINTC_TYPE_REG29_TYPE_940_MASK (0x00001000u)
  27533. #define CSL_CPINTC_TYPE_REG29_TYPE_940_SHIFT (0x0000000Cu)
  27534. #define CSL_CPINTC_TYPE_REG29_TYPE_940_RESETVAL (0x00000000u)
  27535. #define CSL_CPINTC_TYPE_REG29_TYPE_941_MASK (0x00002000u)
  27536. #define CSL_CPINTC_TYPE_REG29_TYPE_941_SHIFT (0x0000000Du)
  27537. #define CSL_CPINTC_TYPE_REG29_TYPE_941_RESETVAL (0x00000000u)
  27538. #define CSL_CPINTC_TYPE_REG29_TYPE_942_MASK (0x00004000u)
  27539. #define CSL_CPINTC_TYPE_REG29_TYPE_942_SHIFT (0x0000000Eu)
  27540. #define CSL_CPINTC_TYPE_REG29_TYPE_942_RESETVAL (0x00000000u)
  27541. #define CSL_CPINTC_TYPE_REG29_TYPE_943_MASK (0x00008000u)
  27542. #define CSL_CPINTC_TYPE_REG29_TYPE_943_SHIFT (0x0000000Fu)
  27543. #define CSL_CPINTC_TYPE_REG29_TYPE_943_RESETVAL (0x00000000u)
  27544. #define CSL_CPINTC_TYPE_REG29_TYPE_944_MASK (0x00010000u)
  27545. #define CSL_CPINTC_TYPE_REG29_TYPE_944_SHIFT (0x00000010u)
  27546. #define CSL_CPINTC_TYPE_REG29_TYPE_944_RESETVAL (0x00000000u)
  27547. #define CSL_CPINTC_TYPE_REG29_TYPE_945_MASK (0x00020000u)
  27548. #define CSL_CPINTC_TYPE_REG29_TYPE_945_SHIFT (0x00000011u)
  27549. #define CSL_CPINTC_TYPE_REG29_TYPE_945_RESETVAL (0x00000000u)
  27550. #define CSL_CPINTC_TYPE_REG29_TYPE_946_MASK (0x00040000u)
  27551. #define CSL_CPINTC_TYPE_REG29_TYPE_946_SHIFT (0x00000012u)
  27552. #define CSL_CPINTC_TYPE_REG29_TYPE_946_RESETVAL (0x00000000u)
  27553. #define CSL_CPINTC_TYPE_REG29_TYPE_947_MASK (0x00080000u)
  27554. #define CSL_CPINTC_TYPE_REG29_TYPE_947_SHIFT (0x00000013u)
  27555. #define CSL_CPINTC_TYPE_REG29_TYPE_947_RESETVAL (0x00000000u)
  27556. #define CSL_CPINTC_TYPE_REG29_TYPE_948_MASK (0x00100000u)
  27557. #define CSL_CPINTC_TYPE_REG29_TYPE_948_SHIFT (0x00000014u)
  27558. #define CSL_CPINTC_TYPE_REG29_TYPE_948_RESETVAL (0x00000000u)
  27559. #define CSL_CPINTC_TYPE_REG29_TYPE_949_MASK (0x00200000u)
  27560. #define CSL_CPINTC_TYPE_REG29_TYPE_949_SHIFT (0x00000015u)
  27561. #define CSL_CPINTC_TYPE_REG29_TYPE_949_RESETVAL (0x00000000u)
  27562. #define CSL_CPINTC_TYPE_REG29_TYPE_950_MASK (0x00400000u)
  27563. #define CSL_CPINTC_TYPE_REG29_TYPE_950_SHIFT (0x00000016u)
  27564. #define CSL_CPINTC_TYPE_REG29_TYPE_950_RESETVAL (0x00000000u)
  27565. #define CSL_CPINTC_TYPE_REG29_TYPE_951_MASK (0x00800000u)
  27566. #define CSL_CPINTC_TYPE_REG29_TYPE_951_SHIFT (0x00000017u)
  27567. #define CSL_CPINTC_TYPE_REG29_TYPE_951_RESETVAL (0x00000000u)
  27568. #define CSL_CPINTC_TYPE_REG29_TYPE_952_MASK (0x01000000u)
  27569. #define CSL_CPINTC_TYPE_REG29_TYPE_952_SHIFT (0x00000018u)
  27570. #define CSL_CPINTC_TYPE_REG29_TYPE_952_RESETVAL (0x00000000u)
  27571. #define CSL_CPINTC_TYPE_REG29_TYPE_953_MASK (0x02000000u)
  27572. #define CSL_CPINTC_TYPE_REG29_TYPE_953_SHIFT (0x00000019u)
  27573. #define CSL_CPINTC_TYPE_REG29_TYPE_953_RESETVAL (0x00000000u)
  27574. #define CSL_CPINTC_TYPE_REG29_TYPE_954_MASK (0x04000000u)
  27575. #define CSL_CPINTC_TYPE_REG29_TYPE_954_SHIFT (0x0000001Au)
  27576. #define CSL_CPINTC_TYPE_REG29_TYPE_954_RESETVAL (0x00000000u)
  27577. #define CSL_CPINTC_TYPE_REG29_TYPE_955_MASK (0x08000000u)
  27578. #define CSL_CPINTC_TYPE_REG29_TYPE_955_SHIFT (0x0000001Bu)
  27579. #define CSL_CPINTC_TYPE_REG29_TYPE_955_RESETVAL (0x00000000u)
  27580. #define CSL_CPINTC_TYPE_REG29_TYPE_956_MASK (0x10000000u)
  27581. #define CSL_CPINTC_TYPE_REG29_TYPE_956_SHIFT (0x0000001Cu)
  27582. #define CSL_CPINTC_TYPE_REG29_TYPE_956_RESETVAL (0x00000000u)
  27583. #define CSL_CPINTC_TYPE_REG29_TYPE_957_MASK (0x20000000u)
  27584. #define CSL_CPINTC_TYPE_REG29_TYPE_957_SHIFT (0x0000001Du)
  27585. #define CSL_CPINTC_TYPE_REG29_TYPE_957_RESETVAL (0x00000000u)
  27586. #define CSL_CPINTC_TYPE_REG29_TYPE_958_MASK (0x40000000u)
  27587. #define CSL_CPINTC_TYPE_REG29_TYPE_958_SHIFT (0x0000001Eu)
  27588. #define CSL_CPINTC_TYPE_REG29_TYPE_958_RESETVAL (0x00000000u)
  27589. #define CSL_CPINTC_TYPE_REG29_TYPE_959_MASK (0x80000000u)
  27590. #define CSL_CPINTC_TYPE_REG29_TYPE_959_SHIFT (0x0000001Fu)
  27591. #define CSL_CPINTC_TYPE_REG29_TYPE_959_RESETVAL (0x00000000u)
  27592. #define CSL_CPINTC_TYPE_REG29_RESETVAL (0x00000000u)
  27593. /* type_reg30 */
  27594. #define CSL_CPINTC_TYPE_REG30_TYPE_960_MASK (0x00000001u)
  27595. #define CSL_CPINTC_TYPE_REG30_TYPE_960_SHIFT (0x00000000u)
  27596. #define CSL_CPINTC_TYPE_REG30_TYPE_960_RESETVAL (0x00000000u)
  27597. #define CSL_CPINTC_TYPE_REG30_TYPE_961_MASK (0x00000002u)
  27598. #define CSL_CPINTC_TYPE_REG30_TYPE_961_SHIFT (0x00000001u)
  27599. #define CSL_CPINTC_TYPE_REG30_TYPE_961_RESETVAL (0x00000000u)
  27600. #define CSL_CPINTC_TYPE_REG30_TYPE_962_MASK (0x00000004u)
  27601. #define CSL_CPINTC_TYPE_REG30_TYPE_962_SHIFT (0x00000002u)
  27602. #define CSL_CPINTC_TYPE_REG30_TYPE_962_RESETVAL (0x00000000u)
  27603. #define CSL_CPINTC_TYPE_REG30_TYPE_963_MASK (0x00000008u)
  27604. #define CSL_CPINTC_TYPE_REG30_TYPE_963_SHIFT (0x00000003u)
  27605. #define CSL_CPINTC_TYPE_REG30_TYPE_963_RESETVAL (0x00000000u)
  27606. #define CSL_CPINTC_TYPE_REG30_TYPE_964_MASK (0x00000010u)
  27607. #define CSL_CPINTC_TYPE_REG30_TYPE_964_SHIFT (0x00000004u)
  27608. #define CSL_CPINTC_TYPE_REG30_TYPE_964_RESETVAL (0x00000000u)
  27609. #define CSL_CPINTC_TYPE_REG30_TYPE_965_MASK (0x00000020u)
  27610. #define CSL_CPINTC_TYPE_REG30_TYPE_965_SHIFT (0x00000005u)
  27611. #define CSL_CPINTC_TYPE_REG30_TYPE_965_RESETVAL (0x00000000u)
  27612. #define CSL_CPINTC_TYPE_REG30_TYPE_966_MASK (0x00000040u)
  27613. #define CSL_CPINTC_TYPE_REG30_TYPE_966_SHIFT (0x00000006u)
  27614. #define CSL_CPINTC_TYPE_REG30_TYPE_966_RESETVAL (0x00000000u)
  27615. #define CSL_CPINTC_TYPE_REG30_TYPE_967_MASK (0x00000080u)
  27616. #define CSL_CPINTC_TYPE_REG30_TYPE_967_SHIFT (0x00000007u)
  27617. #define CSL_CPINTC_TYPE_REG30_TYPE_967_RESETVAL (0x00000000u)
  27618. #define CSL_CPINTC_TYPE_REG30_TYPE_968_MASK (0x00000100u)
  27619. #define CSL_CPINTC_TYPE_REG30_TYPE_968_SHIFT (0x00000008u)
  27620. #define CSL_CPINTC_TYPE_REG30_TYPE_968_RESETVAL (0x00000000u)
  27621. #define CSL_CPINTC_TYPE_REG30_TYPE_969_MASK (0x00000200u)
  27622. #define CSL_CPINTC_TYPE_REG30_TYPE_969_SHIFT (0x00000009u)
  27623. #define CSL_CPINTC_TYPE_REG30_TYPE_969_RESETVAL (0x00000000u)
  27624. #define CSL_CPINTC_TYPE_REG30_TYPE_970_MASK (0x00000400u)
  27625. #define CSL_CPINTC_TYPE_REG30_TYPE_970_SHIFT (0x0000000Au)
  27626. #define CSL_CPINTC_TYPE_REG30_TYPE_970_RESETVAL (0x00000000u)
  27627. #define CSL_CPINTC_TYPE_REG30_TYPE_971_MASK (0x00000800u)
  27628. #define CSL_CPINTC_TYPE_REG30_TYPE_971_SHIFT (0x0000000Bu)
  27629. #define CSL_CPINTC_TYPE_REG30_TYPE_971_RESETVAL (0x00000000u)
  27630. #define CSL_CPINTC_TYPE_REG30_TYPE_972_MASK (0x00001000u)
  27631. #define CSL_CPINTC_TYPE_REG30_TYPE_972_SHIFT (0x0000000Cu)
  27632. #define CSL_CPINTC_TYPE_REG30_TYPE_972_RESETVAL (0x00000000u)
  27633. #define CSL_CPINTC_TYPE_REG30_TYPE_973_MASK (0x00002000u)
  27634. #define CSL_CPINTC_TYPE_REG30_TYPE_973_SHIFT (0x0000000Du)
  27635. #define CSL_CPINTC_TYPE_REG30_TYPE_973_RESETVAL (0x00000000u)
  27636. #define CSL_CPINTC_TYPE_REG30_TYPE_974_MASK (0x00004000u)
  27637. #define CSL_CPINTC_TYPE_REG30_TYPE_974_SHIFT (0x0000000Eu)
  27638. #define CSL_CPINTC_TYPE_REG30_TYPE_974_RESETVAL (0x00000000u)
  27639. #define CSL_CPINTC_TYPE_REG30_TYPE_975_MASK (0x00008000u)
  27640. #define CSL_CPINTC_TYPE_REG30_TYPE_975_SHIFT (0x0000000Fu)
  27641. #define CSL_CPINTC_TYPE_REG30_TYPE_975_RESETVAL (0x00000000u)
  27642. #define CSL_CPINTC_TYPE_REG30_TYPE_976_MASK (0x00010000u)
  27643. #define CSL_CPINTC_TYPE_REG30_TYPE_976_SHIFT (0x00000010u)
  27644. #define CSL_CPINTC_TYPE_REG30_TYPE_976_RESETVAL (0x00000000u)
  27645. #define CSL_CPINTC_TYPE_REG30_TYPE_977_MASK (0x00020000u)
  27646. #define CSL_CPINTC_TYPE_REG30_TYPE_977_SHIFT (0x00000011u)
  27647. #define CSL_CPINTC_TYPE_REG30_TYPE_977_RESETVAL (0x00000000u)
  27648. #define CSL_CPINTC_TYPE_REG30_TYPE_978_MASK (0x00040000u)
  27649. #define CSL_CPINTC_TYPE_REG30_TYPE_978_SHIFT (0x00000012u)
  27650. #define CSL_CPINTC_TYPE_REG30_TYPE_978_RESETVAL (0x00000000u)
  27651. #define CSL_CPINTC_TYPE_REG30_TYPE_979_MASK (0x00080000u)
  27652. #define CSL_CPINTC_TYPE_REG30_TYPE_979_SHIFT (0x00000013u)
  27653. #define CSL_CPINTC_TYPE_REG30_TYPE_979_RESETVAL (0x00000000u)
  27654. #define CSL_CPINTC_TYPE_REG30_TYPE_980_MASK (0x00100000u)
  27655. #define CSL_CPINTC_TYPE_REG30_TYPE_980_SHIFT (0x00000014u)
  27656. #define CSL_CPINTC_TYPE_REG30_TYPE_980_RESETVAL (0x00000000u)
  27657. #define CSL_CPINTC_TYPE_REG30_TYPE_981_MASK (0x00200000u)
  27658. #define CSL_CPINTC_TYPE_REG30_TYPE_981_SHIFT (0x00000015u)
  27659. #define CSL_CPINTC_TYPE_REG30_TYPE_981_RESETVAL (0x00000000u)
  27660. #define CSL_CPINTC_TYPE_REG30_TYPE_982_MASK (0x00400000u)
  27661. #define CSL_CPINTC_TYPE_REG30_TYPE_982_SHIFT (0x00000016u)
  27662. #define CSL_CPINTC_TYPE_REG30_TYPE_982_RESETVAL (0x00000000u)
  27663. #define CSL_CPINTC_TYPE_REG30_TYPE_983_MASK (0x00800000u)
  27664. #define CSL_CPINTC_TYPE_REG30_TYPE_983_SHIFT (0x00000017u)
  27665. #define CSL_CPINTC_TYPE_REG30_TYPE_983_RESETVAL (0x00000000u)
  27666. #define CSL_CPINTC_TYPE_REG30_TYPE_984_MASK (0x01000000u)
  27667. #define CSL_CPINTC_TYPE_REG30_TYPE_984_SHIFT (0x00000018u)
  27668. #define CSL_CPINTC_TYPE_REG30_TYPE_984_RESETVAL (0x00000000u)
  27669. #define CSL_CPINTC_TYPE_REG30_TYPE_985_MASK (0x02000000u)
  27670. #define CSL_CPINTC_TYPE_REG30_TYPE_985_SHIFT (0x00000019u)
  27671. #define CSL_CPINTC_TYPE_REG30_TYPE_985_RESETVAL (0x00000000u)
  27672. #define CSL_CPINTC_TYPE_REG30_TYPE_986_MASK (0x04000000u)
  27673. #define CSL_CPINTC_TYPE_REG30_TYPE_986_SHIFT (0x0000001Au)
  27674. #define CSL_CPINTC_TYPE_REG30_TYPE_986_RESETVAL (0x00000000u)
  27675. #define CSL_CPINTC_TYPE_REG30_TYPE_987_MASK (0x08000000u)
  27676. #define CSL_CPINTC_TYPE_REG30_TYPE_987_SHIFT (0x0000001Bu)
  27677. #define CSL_CPINTC_TYPE_REG30_TYPE_987_RESETVAL (0x00000000u)
  27678. #define CSL_CPINTC_TYPE_REG30_TYPE_988_MASK (0x10000000u)
  27679. #define CSL_CPINTC_TYPE_REG30_TYPE_988_SHIFT (0x0000001Cu)
  27680. #define CSL_CPINTC_TYPE_REG30_TYPE_988_RESETVAL (0x00000000u)
  27681. #define CSL_CPINTC_TYPE_REG30_TYPE_989_MASK (0x20000000u)
  27682. #define CSL_CPINTC_TYPE_REG30_TYPE_989_SHIFT (0x0000001Du)
  27683. #define CSL_CPINTC_TYPE_REG30_TYPE_989_RESETVAL (0x00000000u)
  27684. #define CSL_CPINTC_TYPE_REG30_TYPE_990_MASK (0x40000000u)
  27685. #define CSL_CPINTC_TYPE_REG30_TYPE_990_SHIFT (0x0000001Eu)
  27686. #define CSL_CPINTC_TYPE_REG30_TYPE_990_RESETVAL (0x00000000u)
  27687. #define CSL_CPINTC_TYPE_REG30_TYPE_991_MASK (0x80000000u)
  27688. #define CSL_CPINTC_TYPE_REG30_TYPE_991_SHIFT (0x0000001Fu)
  27689. #define CSL_CPINTC_TYPE_REG30_TYPE_991_RESETVAL (0x00000000u)
  27690. #define CSL_CPINTC_TYPE_REG30_RESETVAL (0x00000000u)
  27691. /* type_reg31 */
  27692. #define CSL_CPINTC_TYPE_REG31_TYPE_992_MASK (0x00000001u)
  27693. #define CSL_CPINTC_TYPE_REG31_TYPE_992_SHIFT (0x00000000u)
  27694. #define CSL_CPINTC_TYPE_REG31_TYPE_992_RESETVAL (0x00000000u)
  27695. #define CSL_CPINTC_TYPE_REG31_TYPE_993_MASK (0x00000002u)
  27696. #define CSL_CPINTC_TYPE_REG31_TYPE_993_SHIFT (0x00000001u)
  27697. #define CSL_CPINTC_TYPE_REG31_TYPE_993_RESETVAL (0x00000000u)
  27698. #define CSL_CPINTC_TYPE_REG31_TYPE_994_MASK (0x00000004u)
  27699. #define CSL_CPINTC_TYPE_REG31_TYPE_994_SHIFT (0x00000002u)
  27700. #define CSL_CPINTC_TYPE_REG31_TYPE_994_RESETVAL (0x00000000u)
  27701. #define CSL_CPINTC_TYPE_REG31_TYPE_995_MASK (0x00000008u)
  27702. #define CSL_CPINTC_TYPE_REG31_TYPE_995_SHIFT (0x00000003u)
  27703. #define CSL_CPINTC_TYPE_REG31_TYPE_995_RESETVAL (0x00000000u)
  27704. #define CSL_CPINTC_TYPE_REG31_TYPE_996_MASK (0x00000010u)
  27705. #define CSL_CPINTC_TYPE_REG31_TYPE_996_SHIFT (0x00000004u)
  27706. #define CSL_CPINTC_TYPE_REG31_TYPE_996_RESETVAL (0x00000000u)
  27707. #define CSL_CPINTC_TYPE_REG31_TYPE_997_MASK (0x00000020u)
  27708. #define CSL_CPINTC_TYPE_REG31_TYPE_997_SHIFT (0x00000005u)
  27709. #define CSL_CPINTC_TYPE_REG31_TYPE_997_RESETVAL (0x00000000u)
  27710. #define CSL_CPINTC_TYPE_REG31_TYPE_998_MASK (0x00000040u)
  27711. #define CSL_CPINTC_TYPE_REG31_TYPE_998_SHIFT (0x00000006u)
  27712. #define CSL_CPINTC_TYPE_REG31_TYPE_998_RESETVAL (0x00000000u)
  27713. #define CSL_CPINTC_TYPE_REG31_TYPE_999_MASK (0x00000080u)
  27714. #define CSL_CPINTC_TYPE_REG31_TYPE_999_SHIFT (0x00000007u)
  27715. #define CSL_CPINTC_TYPE_REG31_TYPE_999_RESETVAL (0x00000000u)
  27716. #define CSL_CPINTC_TYPE_REG31_TYPE_1000_MASK (0x00000100u)
  27717. #define CSL_CPINTC_TYPE_REG31_TYPE_1000_SHIFT (0x00000008u)
  27718. #define CSL_CPINTC_TYPE_REG31_TYPE_1000_RESETVAL (0x00000000u)
  27719. #define CSL_CPINTC_TYPE_REG31_TYPE_1001_MASK (0x00000200u)
  27720. #define CSL_CPINTC_TYPE_REG31_TYPE_1001_SHIFT (0x00000009u)
  27721. #define CSL_CPINTC_TYPE_REG31_TYPE_1001_RESETVAL (0x00000000u)
  27722. #define CSL_CPINTC_TYPE_REG31_TYPE_1002_MASK (0x00000400u)
  27723. #define CSL_CPINTC_TYPE_REG31_TYPE_1002_SHIFT (0x0000000Au)
  27724. #define CSL_CPINTC_TYPE_REG31_TYPE_1002_RESETVAL (0x00000000u)
  27725. #define CSL_CPINTC_TYPE_REG31_TYPE_1003_MASK (0x00000800u)
  27726. #define CSL_CPINTC_TYPE_REG31_TYPE_1003_SHIFT (0x0000000Bu)
  27727. #define CSL_CPINTC_TYPE_REG31_TYPE_1003_RESETVAL (0x00000000u)
  27728. #define CSL_CPINTC_TYPE_REG31_TYPE_1004_MASK (0x00001000u)
  27729. #define CSL_CPINTC_TYPE_REG31_TYPE_1004_SHIFT (0x0000000Cu)
  27730. #define CSL_CPINTC_TYPE_REG31_TYPE_1004_RESETVAL (0x00000000u)
  27731. #define CSL_CPINTC_TYPE_REG31_TYPE_1005_MASK (0x00002000u)
  27732. #define CSL_CPINTC_TYPE_REG31_TYPE_1005_SHIFT (0x0000000Du)
  27733. #define CSL_CPINTC_TYPE_REG31_TYPE_1005_RESETVAL (0x00000000u)
  27734. #define CSL_CPINTC_TYPE_REG31_TYPE_1006_MASK (0x00004000u)
  27735. #define CSL_CPINTC_TYPE_REG31_TYPE_1006_SHIFT (0x0000000Eu)
  27736. #define CSL_CPINTC_TYPE_REG31_TYPE_1006_RESETVAL (0x00000000u)
  27737. #define CSL_CPINTC_TYPE_REG31_TYPE_1007_MASK (0x00008000u)
  27738. #define CSL_CPINTC_TYPE_REG31_TYPE_1007_SHIFT (0x0000000Fu)
  27739. #define CSL_CPINTC_TYPE_REG31_TYPE_1007_RESETVAL (0x00000000u)
  27740. #define CSL_CPINTC_TYPE_REG31_TYPE_1008_MASK (0x00010000u)
  27741. #define CSL_CPINTC_TYPE_REG31_TYPE_1008_SHIFT (0x00000010u)
  27742. #define CSL_CPINTC_TYPE_REG31_TYPE_1008_RESETVAL (0x00000000u)
  27743. #define CSL_CPINTC_TYPE_REG31_TYPE_1009_MASK (0x00020000u)
  27744. #define CSL_CPINTC_TYPE_REG31_TYPE_1009_SHIFT (0x00000011u)
  27745. #define CSL_CPINTC_TYPE_REG31_TYPE_1009_RESETVAL (0x00000000u)
  27746. #define CSL_CPINTC_TYPE_REG31_TYPE_1010_MASK (0x00040000u)
  27747. #define CSL_CPINTC_TYPE_REG31_TYPE_1010_SHIFT (0x00000012u)
  27748. #define CSL_CPINTC_TYPE_REG31_TYPE_1010_RESETVAL (0x00000000u)
  27749. #define CSL_CPINTC_TYPE_REG31_TYPE_1011_MASK (0x00080000u)
  27750. #define CSL_CPINTC_TYPE_REG31_TYPE_1011_SHIFT (0x00000013u)
  27751. #define CSL_CPINTC_TYPE_REG31_TYPE_1011_RESETVAL (0x00000000u)
  27752. #define CSL_CPINTC_TYPE_REG31_TYPE_1012_MASK (0x00100000u)
  27753. #define CSL_CPINTC_TYPE_REG31_TYPE_1012_SHIFT (0x00000014u)
  27754. #define CSL_CPINTC_TYPE_REG31_TYPE_1012_RESETVAL (0x00000000u)
  27755. #define CSL_CPINTC_TYPE_REG31_TYPE_1013_MASK (0x00200000u)
  27756. #define CSL_CPINTC_TYPE_REG31_TYPE_1013_SHIFT (0x00000015u)
  27757. #define CSL_CPINTC_TYPE_REG31_TYPE_1013_RESETVAL (0x00000000u)
  27758. #define CSL_CPINTC_TYPE_REG31_TYPE_1014_MASK (0x00400000u)
  27759. #define CSL_CPINTC_TYPE_REG31_TYPE_1014_SHIFT (0x00000016u)
  27760. #define CSL_CPINTC_TYPE_REG31_TYPE_1014_RESETVAL (0x00000000u)
  27761. #define CSL_CPINTC_TYPE_REG31_TYPE_1015_MASK (0x00800000u)
  27762. #define CSL_CPINTC_TYPE_REG31_TYPE_1015_SHIFT (0x00000017u)
  27763. #define CSL_CPINTC_TYPE_REG31_TYPE_1015_RESETVAL (0x00000000u)
  27764. #define CSL_CPINTC_TYPE_REG31_TYPE_1016_MASK (0x01000000u)
  27765. #define CSL_CPINTC_TYPE_REG31_TYPE_1016_SHIFT (0x00000018u)
  27766. #define CSL_CPINTC_TYPE_REG31_TYPE_1016_RESETVAL (0x00000000u)
  27767. #define CSL_CPINTC_TYPE_REG31_TYPE_1017_MASK (0x02000000u)
  27768. #define CSL_CPINTC_TYPE_REG31_TYPE_1017_SHIFT (0x00000019u)
  27769. #define CSL_CPINTC_TYPE_REG31_TYPE_1017_RESETVAL (0x00000000u)
  27770. #define CSL_CPINTC_TYPE_REG31_TYPE_1018_MASK (0x04000000u)
  27771. #define CSL_CPINTC_TYPE_REG31_TYPE_1018_SHIFT (0x0000001Au)
  27772. #define CSL_CPINTC_TYPE_REG31_TYPE_1018_RESETVAL (0x00000000u)
  27773. #define CSL_CPINTC_TYPE_REG31_TYPE_1019_MASK (0x08000000u)
  27774. #define CSL_CPINTC_TYPE_REG31_TYPE_1019_SHIFT (0x0000001Bu)
  27775. #define CSL_CPINTC_TYPE_REG31_TYPE_1019_RESETVAL (0x00000000u)
  27776. #define CSL_CPINTC_TYPE_REG31_TYPE_1020_MASK (0x10000000u)
  27777. #define CSL_CPINTC_TYPE_REG31_TYPE_1020_SHIFT (0x0000001Cu)
  27778. #define CSL_CPINTC_TYPE_REG31_TYPE_1020_RESETVAL (0x00000000u)
  27779. #define CSL_CPINTC_TYPE_REG31_TYPE_1021_MASK (0x20000000u)
  27780. #define CSL_CPINTC_TYPE_REG31_TYPE_1021_SHIFT (0x0000001Du)
  27781. #define CSL_CPINTC_TYPE_REG31_TYPE_1021_RESETVAL (0x00000000u)
  27782. #define CSL_CPINTC_TYPE_REG31_TYPE_1022_MASK (0x40000000u)
  27783. #define CSL_CPINTC_TYPE_REG31_TYPE_1022_SHIFT (0x0000001Eu)
  27784. #define CSL_CPINTC_TYPE_REG31_TYPE_1022_RESETVAL (0x00000000u)
  27785. #define CSL_CPINTC_TYPE_REG31_TYPE_1023_MASK (0x80000000u)
  27786. #define CSL_CPINTC_TYPE_REG31_TYPE_1023_SHIFT (0x0000001Fu)
  27787. #define CSL_CPINTC_TYPE_REG31_TYPE_1023_RESETVAL (0x00000000u)
  27788. #define CSL_CPINTC_TYPE_REG31_RESETVAL (0x00000000u)
  27789. /* dbg_select_reg0 */
  27790. #define CSL_CPINTC_DBG_SELECT_REG0_DBG_ENABLE0_MASK (0x80000000u)
  27791. #define CSL_CPINTC_DBG_SELECT_REG0_DBG_ENABLE0_SHIFT (0x0000001Fu)
  27792. #define CSL_CPINTC_DBG_SELECT_REG0_DBG_ENABLE0_RESETVAL (0x00000000u)
  27793. #define CSL_CPINTC_DBG_SELECT_REG0_DBG_SELECT0_MASK (0x00003FFFu)
  27794. #define CSL_CPINTC_DBG_SELECT_REG0_DBG_SELECT0_SHIFT (0x00000000u)
  27795. #define CSL_CPINTC_DBG_SELECT_REG0_DBG_SELECT0_RESETVAL (0x00000000u)
  27796. #define CSL_CPINTC_DBG_SELECT_REG0_RESETVAL (0x00000000u)
  27797. /* dbg_select_reg1 */
  27798. #define CSL_CPINTC_DBG_SELECT_REG1_DBG_ENABLE1_MASK (0x80000000u)
  27799. #define CSL_CPINTC_DBG_SELECT_REG1_DBG_ENABLE1_SHIFT (0x0000001Fu)
  27800. #define CSL_CPINTC_DBG_SELECT_REG1_DBG_ENABLE1_RESETVAL (0x00000000u)
  27801. #define CSL_CPINTC_DBG_SELECT_REG1_DBG_SELECT1_MASK (0x00003FFFu)
  27802. #define CSL_CPINTC_DBG_SELECT_REG1_DBG_SELECT1_SHIFT (0x00000000u)
  27803. #define CSL_CPINTC_DBG_SELECT_REG1_DBG_SELECT1_RESETVAL (0x00000000u)
  27804. #define CSL_CPINTC_DBG_SELECT_REG1_RESETVAL (0x00000000u)
  27805. /* dbg_select_reg2 */
  27806. #define CSL_CPINTC_DBG_SELECT_REG2_DBG_ENABLE2_MASK (0x80000000u)
  27807. #define CSL_CPINTC_DBG_SELECT_REG2_DBG_ENABLE2_SHIFT (0x0000001Fu)
  27808. #define CSL_CPINTC_DBG_SELECT_REG2_DBG_ENABLE2_RESETVAL (0x00000000u)
  27809. #define CSL_CPINTC_DBG_SELECT_REG2_DBG_SELECT2_MASK (0x00003FFFu)
  27810. #define CSL_CPINTC_DBG_SELECT_REG2_DBG_SELECT2_SHIFT (0x00000000u)
  27811. #define CSL_CPINTC_DBG_SELECT_REG2_DBG_SELECT2_RESETVAL (0x00000000u)
  27812. #define CSL_CPINTC_DBG_SELECT_REG2_RESETVAL (0x00000000u)
  27813. /* dbg_select_reg3 */
  27814. #define CSL_CPINTC_DBG_SELECT_REG3_DBG_ENABLE3_MASK (0x80000000u)
  27815. #define CSL_CPINTC_DBG_SELECT_REG3_DBG_ENABLE3_SHIFT (0x0000001Fu)
  27816. #define CSL_CPINTC_DBG_SELECT_REG3_DBG_ENABLE3_RESETVAL (0x00000000u)
  27817. #define CSL_CPINTC_DBG_SELECT_REG3_DBG_SELECT3_MASK (0x00003FFFu)
  27818. #define CSL_CPINTC_DBG_SELECT_REG3_DBG_SELECT3_SHIFT (0x00000000u)
  27819. #define CSL_CPINTC_DBG_SELECT_REG3_DBG_SELECT3_RESETVAL (0x00000000u)
  27820. #define CSL_CPINTC_DBG_SELECT_REG3_RESETVAL (0x00000000u)
  27821. /* dbg_select_reg4 */
  27822. #define CSL_CPINTC_DBG_SELECT_REG4_DBG_ENABLE4_MASK (0x80000000u)
  27823. #define CSL_CPINTC_DBG_SELECT_REG4_DBG_ENABLE4_SHIFT (0x0000001Fu)
  27824. #define CSL_CPINTC_DBG_SELECT_REG4_DBG_ENABLE4_RESETVAL (0x00000000u)
  27825. #define CSL_CPINTC_DBG_SELECT_REG4_DBG_SELECT4_MASK (0x00003FFFu)
  27826. #define CSL_CPINTC_DBG_SELECT_REG4_DBG_SELECT4_SHIFT (0x00000000u)
  27827. #define CSL_CPINTC_DBG_SELECT_REG4_DBG_SELECT4_RESETVAL (0x00000000u)
  27828. #define CSL_CPINTC_DBG_SELECT_REG4_RESETVAL (0x00000000u)
  27829. /* dbg_select_reg5 */
  27830. #define CSL_CPINTC_DBG_SELECT_REG5_DBG_ENABLE5_MASK (0x80000000u)
  27831. #define CSL_CPINTC_DBG_SELECT_REG5_DBG_ENABLE5_SHIFT (0x0000001Fu)
  27832. #define CSL_CPINTC_DBG_SELECT_REG5_DBG_ENABLE5_RESETVAL (0x00000000u)
  27833. #define CSL_CPINTC_DBG_SELECT_REG5_DBG_SELECT5_MASK (0x00003FFFu)
  27834. #define CSL_CPINTC_DBG_SELECT_REG5_DBG_SELECT5_SHIFT (0x00000000u)
  27835. #define CSL_CPINTC_DBG_SELECT_REG5_DBG_SELECT5_RESETVAL (0x00000000u)
  27836. #define CSL_CPINTC_DBG_SELECT_REG5_RESETVAL (0x00000000u)
  27837. /* dbg_select_reg6 */
  27838. #define CSL_CPINTC_DBG_SELECT_REG6_DBG_ENABLE6_MASK (0x80000000u)
  27839. #define CSL_CPINTC_DBG_SELECT_REG6_DBG_ENABLE6_SHIFT (0x0000001Fu)
  27840. #define CSL_CPINTC_DBG_SELECT_REG6_DBG_ENABLE6_RESETVAL (0x00000000u)
  27841. #define CSL_CPINTC_DBG_SELECT_REG6_DBG_SELECT6_MASK (0x00003FFFu)
  27842. #define CSL_CPINTC_DBG_SELECT_REG6_DBG_SELECT6_SHIFT (0x00000000u)
  27843. #define CSL_CPINTC_DBG_SELECT_REG6_DBG_SELECT6_RESETVAL (0x00000000u)
  27844. #define CSL_CPINTC_DBG_SELECT_REG6_RESETVAL (0x00000000u)
  27845. /* dbg_select_reg7 */
  27846. #define CSL_CPINTC_DBG_SELECT_REG7_DBG_ENABLE7_MASK (0x80000000u)
  27847. #define CSL_CPINTC_DBG_SELECT_REG7_DBG_ENABLE7_SHIFT (0x0000001Fu)
  27848. #define CSL_CPINTC_DBG_SELECT_REG7_DBG_ENABLE7_RESETVAL (0x00000000u)
  27849. #define CSL_CPINTC_DBG_SELECT_REG7_DBG_SELECT7_MASK (0x00003FFFu)
  27850. #define CSL_CPINTC_DBG_SELECT_REG7_DBG_SELECT7_SHIFT (0x00000000u)
  27851. #define CSL_CPINTC_DBG_SELECT_REG7_DBG_SELECT7_RESETVAL (0x00000000u)
  27852. #define CSL_CPINTC_DBG_SELECT_REG7_RESETVAL (0x00000000u)
  27853. /* dbg_select_reg8 */
  27854. #define CSL_CPINTC_DBG_SELECT_REG8_DBG_ENABLE8_MASK (0x80000000u)
  27855. #define CSL_CPINTC_DBG_SELECT_REG8_DBG_ENABLE8_SHIFT (0x0000001Fu)
  27856. #define CSL_CPINTC_DBG_SELECT_REG8_DBG_ENABLE8_RESETVAL (0x00000000u)
  27857. #define CSL_CPINTC_DBG_SELECT_REG8_DBG_SELECT8_MASK (0x00003FFFu)
  27858. #define CSL_CPINTC_DBG_SELECT_REG8_DBG_SELECT8_SHIFT (0x00000000u)
  27859. #define CSL_CPINTC_DBG_SELECT_REG8_DBG_SELECT8_RESETVAL (0x00000000u)
  27860. #define CSL_CPINTC_DBG_SELECT_REG8_RESETVAL (0x00000000u)
  27861. /* dbg_select_reg9 */
  27862. #define CSL_CPINTC_DBG_SELECT_REG9_DBG_ENABLE9_MASK (0x80000000u)
  27863. #define CSL_CPINTC_DBG_SELECT_REG9_DBG_ENABLE9_SHIFT (0x0000001Fu)
  27864. #define CSL_CPINTC_DBG_SELECT_REG9_DBG_ENABLE9_RESETVAL (0x00000000u)
  27865. #define CSL_CPINTC_DBG_SELECT_REG9_DBG_SELECT9_MASK (0x00003FFFu)
  27866. #define CSL_CPINTC_DBG_SELECT_REG9_DBG_SELECT9_SHIFT (0x00000000u)
  27867. #define CSL_CPINTC_DBG_SELECT_REG9_DBG_SELECT9_RESETVAL (0x00000000u)
  27868. #define CSL_CPINTC_DBG_SELECT_REG9_RESETVAL (0x00000000u)
  27869. /* dbg_select_reg10 */
  27870. #define CSL_CPINTC_DBG_SELECT_REG10_DBG_ENABLE10_MASK (0x80000000u)
  27871. #define CSL_CPINTC_DBG_SELECT_REG10_DBG_ENABLE10_SHIFT (0x0000001Fu)
  27872. #define CSL_CPINTC_DBG_SELECT_REG10_DBG_ENABLE10_RESETVAL (0x00000000u)
  27873. #define CSL_CPINTC_DBG_SELECT_REG10_DBG_SELECT10_MASK (0x00003FFFu)
  27874. #define CSL_CPINTC_DBG_SELECT_REG10_DBG_SELECT10_SHIFT (0x00000000u)
  27875. #define CSL_CPINTC_DBG_SELECT_REG10_DBG_SELECT10_RESETVAL (0x00000000u)
  27876. #define CSL_CPINTC_DBG_SELECT_REG10_RESETVAL (0x00000000u)
  27877. /* dbg_select_reg11 */
  27878. #define CSL_CPINTC_DBG_SELECT_REG11_DBG_ENABLE11_MASK (0x80000000u)
  27879. #define CSL_CPINTC_DBG_SELECT_REG11_DBG_ENABLE11_SHIFT (0x0000001Fu)
  27880. #define CSL_CPINTC_DBG_SELECT_REG11_DBG_ENABLE11_RESETVAL (0x00000000u)
  27881. #define CSL_CPINTC_DBG_SELECT_REG11_DBG_SELECT11_MASK (0x00003FFFu)
  27882. #define CSL_CPINTC_DBG_SELECT_REG11_DBG_SELECT11_SHIFT (0x00000000u)
  27883. #define CSL_CPINTC_DBG_SELECT_REG11_DBG_SELECT11_RESETVAL (0x00000000u)
  27884. #define CSL_CPINTC_DBG_SELECT_REG11_RESETVAL (0x00000000u)
  27885. /* dbg_select_reg12 */
  27886. #define CSL_CPINTC_DBG_SELECT_REG12_DBG_ENABLE12_MASK (0x80000000u)
  27887. #define CSL_CPINTC_DBG_SELECT_REG12_DBG_ENABLE12_SHIFT (0x0000001Fu)
  27888. #define CSL_CPINTC_DBG_SELECT_REG12_DBG_ENABLE12_RESETVAL (0x00000000u)
  27889. #define CSL_CPINTC_DBG_SELECT_REG12_DBG_SELECT12_MASK (0x00003FFFu)
  27890. #define CSL_CPINTC_DBG_SELECT_REG12_DBG_SELECT12_SHIFT (0x00000000u)
  27891. #define CSL_CPINTC_DBG_SELECT_REG12_DBG_SELECT12_RESETVAL (0x00000000u)
  27892. #define CSL_CPINTC_DBG_SELECT_REG12_RESETVAL (0x00000000u)
  27893. /* dbg_select_reg13 */
  27894. #define CSL_CPINTC_DBG_SELECT_REG13_DBG_ENABLE13_MASK (0x80000000u)
  27895. #define CSL_CPINTC_DBG_SELECT_REG13_DBG_ENABLE13_SHIFT (0x0000001Fu)
  27896. #define CSL_CPINTC_DBG_SELECT_REG13_DBG_ENABLE13_RESETVAL (0x00000000u)
  27897. #define CSL_CPINTC_DBG_SELECT_REG13_DBG_SELECT13_MASK (0x00003FFFu)
  27898. #define CSL_CPINTC_DBG_SELECT_REG13_DBG_SELECT13_SHIFT (0x00000000u)
  27899. #define CSL_CPINTC_DBG_SELECT_REG13_DBG_SELECT13_RESETVAL (0x00000000u)
  27900. #define CSL_CPINTC_DBG_SELECT_REG13_RESETVAL (0x00000000u)
  27901. /* dbg_select_reg14 */
  27902. #define CSL_CPINTC_DBG_SELECT_REG14_DBG_ENABLE14_MASK (0x80000000u)
  27903. #define CSL_CPINTC_DBG_SELECT_REG14_DBG_ENABLE14_SHIFT (0x0000001Fu)
  27904. #define CSL_CPINTC_DBG_SELECT_REG14_DBG_ENABLE14_RESETVAL (0x00000000u)
  27905. #define CSL_CPINTC_DBG_SELECT_REG14_DBG_SELECT14_MASK (0x00003FFFu)
  27906. #define CSL_CPINTC_DBG_SELECT_REG14_DBG_SELECT14_SHIFT (0x00000000u)
  27907. #define CSL_CPINTC_DBG_SELECT_REG14_DBG_SELECT14_RESETVAL (0x00000000u)
  27908. #define CSL_CPINTC_DBG_SELECT_REG14_RESETVAL (0x00000000u)
  27909. /* dbg_select_reg15 */
  27910. #define CSL_CPINTC_DBG_SELECT_REG15_DBG_ENABLE15_MASK (0x80000000u)
  27911. #define CSL_CPINTC_DBG_SELECT_REG15_DBG_ENABLE15_SHIFT (0x0000001Fu)
  27912. #define CSL_CPINTC_DBG_SELECT_REG15_DBG_ENABLE15_RESETVAL (0x00000000u)
  27913. #define CSL_CPINTC_DBG_SELECT_REG15_DBG_SELECT15_MASK (0x00003FFFu)
  27914. #define CSL_CPINTC_DBG_SELECT_REG15_DBG_SELECT15_SHIFT (0x00000000u)
  27915. #define CSL_CPINTC_DBG_SELECT_REG15_DBG_SELECT15_RESETVAL (0x00000000u)
  27916. #define CSL_CPINTC_DBG_SELECT_REG15_RESETVAL (0x00000000u)
  27917. /* dbg_select_reg16 */
  27918. #define CSL_CPINTC_DBG_SELECT_REG16_DBG_ENABLE16_MASK (0x80000000u)
  27919. #define CSL_CPINTC_DBG_SELECT_REG16_DBG_ENABLE16_SHIFT (0x0000001Fu)
  27920. #define CSL_CPINTC_DBG_SELECT_REG16_DBG_ENABLE16_RESETVAL (0x00000000u)
  27921. #define CSL_CPINTC_DBG_SELECT_REG16_DBG_SELECT16_MASK (0x00003FFFu)
  27922. #define CSL_CPINTC_DBG_SELECT_REG16_DBG_SELECT16_SHIFT (0x00000000u)
  27923. #define CSL_CPINTC_DBG_SELECT_REG16_DBG_SELECT16_RESETVAL (0x00000000u)
  27924. #define CSL_CPINTC_DBG_SELECT_REG16_RESETVAL (0x00000000u)
  27925. /* dbg_select_reg17 */
  27926. #define CSL_CPINTC_DBG_SELECT_REG17_DBG_ENABLE17_MASK (0x80000000u)
  27927. #define CSL_CPINTC_DBG_SELECT_REG17_DBG_ENABLE17_SHIFT (0x0000001Fu)
  27928. #define CSL_CPINTC_DBG_SELECT_REG17_DBG_ENABLE17_RESETVAL (0x00000000u)
  27929. #define CSL_CPINTC_DBG_SELECT_REG17_DBG_SELECT17_MASK (0x00003FFFu)
  27930. #define CSL_CPINTC_DBG_SELECT_REG17_DBG_SELECT17_SHIFT (0x00000000u)
  27931. #define CSL_CPINTC_DBG_SELECT_REG17_DBG_SELECT17_RESETVAL (0x00000000u)
  27932. #define CSL_CPINTC_DBG_SELECT_REG17_RESETVAL (0x00000000u)
  27933. /* dbg_select_reg18 */
  27934. #define CSL_CPINTC_DBG_SELECT_REG18_DBG_ENABLE18_MASK (0x80000000u)
  27935. #define CSL_CPINTC_DBG_SELECT_REG18_DBG_ENABLE18_SHIFT (0x0000001Fu)
  27936. #define CSL_CPINTC_DBG_SELECT_REG18_DBG_ENABLE18_RESETVAL (0x00000000u)
  27937. #define CSL_CPINTC_DBG_SELECT_REG18_DBG_SELECT18_MASK (0x00003FFFu)
  27938. #define CSL_CPINTC_DBG_SELECT_REG18_DBG_SELECT18_SHIFT (0x00000000u)
  27939. #define CSL_CPINTC_DBG_SELECT_REG18_DBG_SELECT18_RESETVAL (0x00000000u)
  27940. #define CSL_CPINTC_DBG_SELECT_REG18_RESETVAL (0x00000000u)
  27941. /* dbg_select_reg19 */
  27942. #define CSL_CPINTC_DBG_SELECT_REG19_DBG_ENABLE19_MASK (0x80000000u)
  27943. #define CSL_CPINTC_DBG_SELECT_REG19_DBG_ENABLE19_SHIFT (0x0000001Fu)
  27944. #define CSL_CPINTC_DBG_SELECT_REG19_DBG_ENABLE19_RESETVAL (0x00000000u)
  27945. #define CSL_CPINTC_DBG_SELECT_REG19_DBG_SELECT19_MASK (0x00003FFFu)
  27946. #define CSL_CPINTC_DBG_SELECT_REG19_DBG_SELECT19_SHIFT (0x00000000u)
  27947. #define CSL_CPINTC_DBG_SELECT_REG19_DBG_SELECT19_RESETVAL (0x00000000u)
  27948. #define CSL_CPINTC_DBG_SELECT_REG19_RESETVAL (0x00000000u)
  27949. /* dbg_select_reg20 */
  27950. #define CSL_CPINTC_DBG_SELECT_REG20_DBG_ENABLE20_MASK (0x80000000u)
  27951. #define CSL_CPINTC_DBG_SELECT_REG20_DBG_ENABLE20_SHIFT (0x0000001Fu)
  27952. #define CSL_CPINTC_DBG_SELECT_REG20_DBG_ENABLE20_RESETVAL (0x00000000u)
  27953. #define CSL_CPINTC_DBG_SELECT_REG20_DBG_SELECT20_MASK (0x00003FFFu)
  27954. #define CSL_CPINTC_DBG_SELECT_REG20_DBG_SELECT20_SHIFT (0x00000000u)
  27955. #define CSL_CPINTC_DBG_SELECT_REG20_DBG_SELECT20_RESETVAL (0x00000000u)
  27956. #define CSL_CPINTC_DBG_SELECT_REG20_RESETVAL (0x00000000u)
  27957. /* dbg_select_reg21 */
  27958. #define CSL_CPINTC_DBG_SELECT_REG21_DBG_ENABLE21_MASK (0x80000000u)
  27959. #define CSL_CPINTC_DBG_SELECT_REG21_DBG_ENABLE21_SHIFT (0x0000001Fu)
  27960. #define CSL_CPINTC_DBG_SELECT_REG21_DBG_ENABLE21_RESETVAL (0x00000000u)
  27961. #define CSL_CPINTC_DBG_SELECT_REG21_DBG_SELECT21_MASK (0x00003FFFu)
  27962. #define CSL_CPINTC_DBG_SELECT_REG21_DBG_SELECT21_SHIFT (0x00000000u)
  27963. #define CSL_CPINTC_DBG_SELECT_REG21_DBG_SELECT21_RESETVAL (0x00000000u)
  27964. #define CSL_CPINTC_DBG_SELECT_REG21_RESETVAL (0x00000000u)
  27965. /* dbg_select_reg22 */
  27966. #define CSL_CPINTC_DBG_SELECT_REG22_DBG_ENABLE22_MASK (0x80000000u)
  27967. #define CSL_CPINTC_DBG_SELECT_REG22_DBG_ENABLE22_SHIFT (0x0000001Fu)
  27968. #define CSL_CPINTC_DBG_SELECT_REG22_DBG_ENABLE22_RESETVAL (0x00000000u)
  27969. #define CSL_CPINTC_DBG_SELECT_REG22_DBG_SELECT22_MASK (0x00003FFFu)
  27970. #define CSL_CPINTC_DBG_SELECT_REG22_DBG_SELECT22_SHIFT (0x00000000u)
  27971. #define CSL_CPINTC_DBG_SELECT_REG22_DBG_SELECT22_RESETVAL (0x00000000u)
  27972. #define CSL_CPINTC_DBG_SELECT_REG22_RESETVAL (0x00000000u)
  27973. /* dbg_select_reg23 */
  27974. #define CSL_CPINTC_DBG_SELECT_REG23_DBG_ENABLE23_MASK (0x80000000u)
  27975. #define CSL_CPINTC_DBG_SELECT_REG23_DBG_ENABLE23_SHIFT (0x0000001Fu)
  27976. #define CSL_CPINTC_DBG_SELECT_REG23_DBG_ENABLE23_RESETVAL (0x00000000u)
  27977. #define CSL_CPINTC_DBG_SELECT_REG23_DBG_SELECT23_MASK (0x00003FFFu)
  27978. #define CSL_CPINTC_DBG_SELECT_REG23_DBG_SELECT23_SHIFT (0x00000000u)
  27979. #define CSL_CPINTC_DBG_SELECT_REG23_DBG_SELECT23_RESETVAL (0x00000000u)
  27980. #define CSL_CPINTC_DBG_SELECT_REG23_RESETVAL (0x00000000u)
  27981. /* dbg_select_reg24 */
  27982. #define CSL_CPINTC_DBG_SELECT_REG24_DBG_ENABLE24_MASK (0x80000000u)
  27983. #define CSL_CPINTC_DBG_SELECT_REG24_DBG_ENABLE24_SHIFT (0x0000001Fu)
  27984. #define CSL_CPINTC_DBG_SELECT_REG24_DBG_ENABLE24_RESETVAL (0x00000000u)
  27985. #define CSL_CPINTC_DBG_SELECT_REG24_DBG_SELECT24_MASK (0x00003FFFu)
  27986. #define CSL_CPINTC_DBG_SELECT_REG24_DBG_SELECT24_SHIFT (0x00000000u)
  27987. #define CSL_CPINTC_DBG_SELECT_REG24_DBG_SELECT24_RESETVAL (0x00000000u)
  27988. #define CSL_CPINTC_DBG_SELECT_REG24_RESETVAL (0x00000000u)
  27989. /* dbg_select_reg25 */
  27990. #define CSL_CPINTC_DBG_SELECT_REG25_DBG_ENABLE25_MASK (0x80000000u)
  27991. #define CSL_CPINTC_DBG_SELECT_REG25_DBG_ENABLE25_SHIFT (0x0000001Fu)
  27992. #define CSL_CPINTC_DBG_SELECT_REG25_DBG_ENABLE25_RESETVAL (0x00000000u)
  27993. #define CSL_CPINTC_DBG_SELECT_REG25_DBG_SELECT25_MASK (0x00003FFFu)
  27994. #define CSL_CPINTC_DBG_SELECT_REG25_DBG_SELECT25_SHIFT (0x00000000u)
  27995. #define CSL_CPINTC_DBG_SELECT_REG25_DBG_SELECT25_RESETVAL (0x00000000u)
  27996. #define CSL_CPINTC_DBG_SELECT_REG25_RESETVAL (0x00000000u)
  27997. /* dbg_select_reg26 */
  27998. #define CSL_CPINTC_DBG_SELECT_REG26_DBG_ENABLE26_MASK (0x80000000u)
  27999. #define CSL_CPINTC_DBG_SELECT_REG26_DBG_ENABLE26_SHIFT (0x0000001Fu)
  28000. #define CSL_CPINTC_DBG_SELECT_REG26_DBG_ENABLE26_RESETVAL (0x00000000u)
  28001. #define CSL_CPINTC_DBG_SELECT_REG26_DBG_SELECT26_MASK (0x00003FFFu)
  28002. #define CSL_CPINTC_DBG_SELECT_REG26_DBG_SELECT26_SHIFT (0x00000000u)
  28003. #define CSL_CPINTC_DBG_SELECT_REG26_DBG_SELECT26_RESETVAL (0x00000000u)
  28004. #define CSL_CPINTC_DBG_SELECT_REG26_RESETVAL (0x00000000u)
  28005. /* dbg_select_reg27 */
  28006. #define CSL_CPINTC_DBG_SELECT_REG27_DBG_ENABLE27_MASK (0x80000000u)
  28007. #define CSL_CPINTC_DBG_SELECT_REG27_DBG_ENABLE27_SHIFT (0x0000001Fu)
  28008. #define CSL_CPINTC_DBG_SELECT_REG27_DBG_ENABLE27_RESETVAL (0x00000000u)
  28009. #define CSL_CPINTC_DBG_SELECT_REG27_DBG_SELECT27_MASK (0x00003FFFu)
  28010. #define CSL_CPINTC_DBG_SELECT_REG27_DBG_SELECT27_SHIFT (0x00000000u)
  28011. #define CSL_CPINTC_DBG_SELECT_REG27_DBG_SELECT27_RESETVAL (0x00000000u)
  28012. #define CSL_CPINTC_DBG_SELECT_REG27_RESETVAL (0x00000000u)
  28013. /* dbg_select_reg28 */
  28014. #define CSL_CPINTC_DBG_SELECT_REG28_DBG_ENABLE28_MASK (0x80000000u)
  28015. #define CSL_CPINTC_DBG_SELECT_REG28_DBG_ENABLE28_SHIFT (0x0000001Fu)
  28016. #define CSL_CPINTC_DBG_SELECT_REG28_DBG_ENABLE28_RESETVAL (0x00000000u)
  28017. #define CSL_CPINTC_DBG_SELECT_REG28_DBG_SELECT28_MASK (0x00003FFFu)
  28018. #define CSL_CPINTC_DBG_SELECT_REG28_DBG_SELECT28_SHIFT (0x00000000u)
  28019. #define CSL_CPINTC_DBG_SELECT_REG28_DBG_SELECT28_RESETVAL (0x00000000u)
  28020. #define CSL_CPINTC_DBG_SELECT_REG28_RESETVAL (0x00000000u)
  28021. /* dbg_select_reg29 */
  28022. #define CSL_CPINTC_DBG_SELECT_REG29_DBG_ENABLE29_MASK (0x80000000u)
  28023. #define CSL_CPINTC_DBG_SELECT_REG29_DBG_ENABLE29_SHIFT (0x0000001Fu)
  28024. #define CSL_CPINTC_DBG_SELECT_REG29_DBG_ENABLE29_RESETVAL (0x00000000u)
  28025. #define CSL_CPINTC_DBG_SELECT_REG29_DBG_SELECT29_MASK (0x00003FFFu)
  28026. #define CSL_CPINTC_DBG_SELECT_REG29_DBG_SELECT29_SHIFT (0x00000000u)
  28027. #define CSL_CPINTC_DBG_SELECT_REG29_DBG_SELECT29_RESETVAL (0x00000000u)
  28028. #define CSL_CPINTC_DBG_SELECT_REG29_RESETVAL (0x00000000u)
  28029. /* dbg_select_reg30 */
  28030. #define CSL_CPINTC_DBG_SELECT_REG30_DBG_ENABLE30_MASK (0x80000000u)
  28031. #define CSL_CPINTC_DBG_SELECT_REG30_DBG_ENABLE30_SHIFT (0x0000001Fu)
  28032. #define CSL_CPINTC_DBG_SELECT_REG30_DBG_ENABLE30_RESETVAL (0x00000000u)
  28033. #define CSL_CPINTC_DBG_SELECT_REG30_DBG_SELECT30_MASK (0x00003FFFu)
  28034. #define CSL_CPINTC_DBG_SELECT_REG30_DBG_SELECT30_SHIFT (0x00000000u)
  28035. #define CSL_CPINTC_DBG_SELECT_REG30_DBG_SELECT30_RESETVAL (0x00000000u)
  28036. #define CSL_CPINTC_DBG_SELECT_REG30_RESETVAL (0x00000000u)
  28037. /* dbg_select_reg31 */
  28038. #define CSL_CPINTC_DBG_SELECT_REG31_DBG_ENABLE31_MASK (0x80000000u)
  28039. #define CSL_CPINTC_DBG_SELECT_REG31_DBG_ENABLE31_SHIFT (0x0000001Fu)
  28040. #define CSL_CPINTC_DBG_SELECT_REG31_DBG_ENABLE31_RESETVAL (0x00000000u)
  28041. #define CSL_CPINTC_DBG_SELECT_REG31_DBG_SELECT31_MASK (0x00003FFFu)
  28042. #define CSL_CPINTC_DBG_SELECT_REG31_DBG_SELECT31_SHIFT (0x00000000u)
  28043. #define CSL_CPINTC_DBG_SELECT_REG31_DBG_SELECT31_RESETVAL (0x00000000u)
  28044. #define CSL_CPINTC_DBG_SELECT_REG31_RESETVAL (0x00000000u)
  28045. /* dbg_select_reg32 */
  28046. #define CSL_CPINTC_DBG_SELECT_REG32_DBG_ENABLE32_MASK (0x80000000u)
  28047. #define CSL_CPINTC_DBG_SELECT_REG32_DBG_ENABLE32_SHIFT (0x0000001Fu)
  28048. #define CSL_CPINTC_DBG_SELECT_REG32_DBG_ENABLE32_RESETVAL (0x00000000u)
  28049. #define CSL_CPINTC_DBG_SELECT_REG32_DBG_SELECT32_MASK (0x00003FFFu)
  28050. #define CSL_CPINTC_DBG_SELECT_REG32_DBG_SELECT32_SHIFT (0x00000000u)
  28051. #define CSL_CPINTC_DBG_SELECT_REG32_DBG_SELECT32_RESETVAL (0x00000000u)
  28052. #define CSL_CPINTC_DBG_SELECT_REG32_RESETVAL (0x00000000u)
  28053. /* dbg_select_reg33 */
  28054. #define CSL_CPINTC_DBG_SELECT_REG33_DBG_ENABLE33_MASK (0x80000000u)
  28055. #define CSL_CPINTC_DBG_SELECT_REG33_DBG_ENABLE33_SHIFT (0x0000001Fu)
  28056. #define CSL_CPINTC_DBG_SELECT_REG33_DBG_ENABLE33_RESETVAL (0x00000000u)
  28057. #define CSL_CPINTC_DBG_SELECT_REG33_DBG_SELECT33_MASK (0x00003FFFu)
  28058. #define CSL_CPINTC_DBG_SELECT_REG33_DBG_SELECT33_SHIFT (0x00000000u)
  28059. #define CSL_CPINTC_DBG_SELECT_REG33_DBG_SELECT33_RESETVAL (0x00000000u)
  28060. #define CSL_CPINTC_DBG_SELECT_REG33_RESETVAL (0x00000000u)
  28061. /* dbg_select_reg34 */
  28062. #define CSL_CPINTC_DBG_SELECT_REG34_DBG_ENABLE34_MASK (0x80000000u)
  28063. #define CSL_CPINTC_DBG_SELECT_REG34_DBG_ENABLE34_SHIFT (0x0000001Fu)
  28064. #define CSL_CPINTC_DBG_SELECT_REG34_DBG_ENABLE34_RESETVAL (0x00000000u)
  28065. #define CSL_CPINTC_DBG_SELECT_REG34_DBG_SELECT34_MASK (0x00003FFFu)
  28066. #define CSL_CPINTC_DBG_SELECT_REG34_DBG_SELECT34_SHIFT (0x00000000u)
  28067. #define CSL_CPINTC_DBG_SELECT_REG34_DBG_SELECT34_RESETVAL (0x00000000u)
  28068. #define CSL_CPINTC_DBG_SELECT_REG34_RESETVAL (0x00000000u)
  28069. /* dbg_select_reg35 */
  28070. #define CSL_CPINTC_DBG_SELECT_REG35_DBG_ENABLE35_MASK (0x80000000u)
  28071. #define CSL_CPINTC_DBG_SELECT_REG35_DBG_ENABLE35_SHIFT (0x0000001Fu)
  28072. #define CSL_CPINTC_DBG_SELECT_REG35_DBG_ENABLE35_RESETVAL (0x00000000u)
  28073. #define CSL_CPINTC_DBG_SELECT_REG35_DBG_SELECT35_MASK (0x00003FFFu)
  28074. #define CSL_CPINTC_DBG_SELECT_REG35_DBG_SELECT35_SHIFT (0x00000000u)
  28075. #define CSL_CPINTC_DBG_SELECT_REG35_DBG_SELECT35_RESETVAL (0x00000000u)
  28076. #define CSL_CPINTC_DBG_SELECT_REG35_RESETVAL (0x00000000u)
  28077. /* dbg_select_reg36 */
  28078. #define CSL_CPINTC_DBG_SELECT_REG36_DBG_ENABLE36_MASK (0x80000000u)
  28079. #define CSL_CPINTC_DBG_SELECT_REG36_DBG_ENABLE36_SHIFT (0x0000001Fu)
  28080. #define CSL_CPINTC_DBG_SELECT_REG36_DBG_ENABLE36_RESETVAL (0x00000000u)
  28081. #define CSL_CPINTC_DBG_SELECT_REG36_DBG_SELECT36_MASK (0x00003FFFu)
  28082. #define CSL_CPINTC_DBG_SELECT_REG36_DBG_SELECT36_SHIFT (0x00000000u)
  28083. #define CSL_CPINTC_DBG_SELECT_REG36_DBG_SELECT36_RESETVAL (0x00000000u)
  28084. #define CSL_CPINTC_DBG_SELECT_REG36_RESETVAL (0x00000000u)
  28085. /* dbg_select_reg37 */
  28086. #define CSL_CPINTC_DBG_SELECT_REG37_DBG_ENABLE37_MASK (0x80000000u)
  28087. #define CSL_CPINTC_DBG_SELECT_REG37_DBG_ENABLE37_SHIFT (0x0000001Fu)
  28088. #define CSL_CPINTC_DBG_SELECT_REG37_DBG_ENABLE37_RESETVAL (0x00000000u)
  28089. #define CSL_CPINTC_DBG_SELECT_REG37_DBG_SELECT37_MASK (0x00003FFFu)
  28090. #define CSL_CPINTC_DBG_SELECT_REG37_DBG_SELECT37_SHIFT (0x00000000u)
  28091. #define CSL_CPINTC_DBG_SELECT_REG37_DBG_SELECT37_RESETVAL (0x00000000u)
  28092. #define CSL_CPINTC_DBG_SELECT_REG37_RESETVAL (0x00000000u)
  28093. /* dbg_select_reg38 */
  28094. #define CSL_CPINTC_DBG_SELECT_REG38_DBG_ENABLE38_MASK (0x80000000u)
  28095. #define CSL_CPINTC_DBG_SELECT_REG38_DBG_ENABLE38_SHIFT (0x0000001Fu)
  28096. #define CSL_CPINTC_DBG_SELECT_REG38_DBG_ENABLE38_RESETVAL (0x00000000u)
  28097. #define CSL_CPINTC_DBG_SELECT_REG38_DBG_SELECT38_MASK (0x00003FFFu)
  28098. #define CSL_CPINTC_DBG_SELECT_REG38_DBG_SELECT38_SHIFT (0x00000000u)
  28099. #define CSL_CPINTC_DBG_SELECT_REG38_DBG_SELECT38_RESETVAL (0x00000000u)
  28100. #define CSL_CPINTC_DBG_SELECT_REG38_RESETVAL (0x00000000u)
  28101. /* dbg_select_reg39 */
  28102. #define CSL_CPINTC_DBG_SELECT_REG39_DBG_ENABLE39_MASK (0x80000000u)
  28103. #define CSL_CPINTC_DBG_SELECT_REG39_DBG_ENABLE39_SHIFT (0x0000001Fu)
  28104. #define CSL_CPINTC_DBG_SELECT_REG39_DBG_ENABLE39_RESETVAL (0x00000000u)
  28105. #define CSL_CPINTC_DBG_SELECT_REG39_DBG_SELECT39_MASK (0x00003FFFu)
  28106. #define CSL_CPINTC_DBG_SELECT_REG39_DBG_SELECT39_SHIFT (0x00000000u)
  28107. #define CSL_CPINTC_DBG_SELECT_REG39_DBG_SELECT39_RESETVAL (0x00000000u)
  28108. #define CSL_CPINTC_DBG_SELECT_REG39_RESETVAL (0x00000000u)
  28109. /* dbg_select_reg40 */
  28110. #define CSL_CPINTC_DBG_SELECT_REG40_DBG_ENABLE40_MASK (0x80000000u)
  28111. #define CSL_CPINTC_DBG_SELECT_REG40_DBG_ENABLE40_SHIFT (0x0000001Fu)
  28112. #define CSL_CPINTC_DBG_SELECT_REG40_DBG_ENABLE40_RESETVAL (0x00000000u)
  28113. #define CSL_CPINTC_DBG_SELECT_REG40_DBG_SELECT40_MASK (0x00003FFFu)
  28114. #define CSL_CPINTC_DBG_SELECT_REG40_DBG_SELECT40_SHIFT (0x00000000u)
  28115. #define CSL_CPINTC_DBG_SELECT_REG40_DBG_SELECT40_RESETVAL (0x00000000u)
  28116. #define CSL_CPINTC_DBG_SELECT_REG40_RESETVAL (0x00000000u)
  28117. /* dbg_select_reg41 */
  28118. #define CSL_CPINTC_DBG_SELECT_REG41_DBG_ENABLE41_MASK (0x80000000u)
  28119. #define CSL_CPINTC_DBG_SELECT_REG41_DBG_ENABLE41_SHIFT (0x0000001Fu)
  28120. #define CSL_CPINTC_DBG_SELECT_REG41_DBG_ENABLE41_RESETVAL (0x00000000u)
  28121. #define CSL_CPINTC_DBG_SELECT_REG41_DBG_SELECT41_MASK (0x00003FFFu)
  28122. #define CSL_CPINTC_DBG_SELECT_REG41_DBG_SELECT41_SHIFT (0x00000000u)
  28123. #define CSL_CPINTC_DBG_SELECT_REG41_DBG_SELECT41_RESETVAL (0x00000000u)
  28124. #define CSL_CPINTC_DBG_SELECT_REG41_RESETVAL (0x00000000u)
  28125. /* dbg_select_reg42 */
  28126. #define CSL_CPINTC_DBG_SELECT_REG42_DBG_ENABLE42_MASK (0x80000000u)
  28127. #define CSL_CPINTC_DBG_SELECT_REG42_DBG_ENABLE42_SHIFT (0x0000001Fu)
  28128. #define CSL_CPINTC_DBG_SELECT_REG42_DBG_ENABLE42_RESETVAL (0x00000000u)
  28129. #define CSL_CPINTC_DBG_SELECT_REG42_DBG_SELECT42_MASK (0x00003FFFu)
  28130. #define CSL_CPINTC_DBG_SELECT_REG42_DBG_SELECT42_SHIFT (0x00000000u)
  28131. #define CSL_CPINTC_DBG_SELECT_REG42_DBG_SELECT42_RESETVAL (0x00000000u)
  28132. #define CSL_CPINTC_DBG_SELECT_REG42_RESETVAL (0x00000000u)
  28133. /* dbg_select_reg43 */
  28134. #define CSL_CPINTC_DBG_SELECT_REG43_DBG_ENABLE43_MASK (0x80000000u)
  28135. #define CSL_CPINTC_DBG_SELECT_REG43_DBG_ENABLE43_SHIFT (0x0000001Fu)
  28136. #define CSL_CPINTC_DBG_SELECT_REG43_DBG_ENABLE43_RESETVAL (0x00000000u)
  28137. #define CSL_CPINTC_DBG_SELECT_REG43_DBG_SELECT43_MASK (0x00003FFFu)
  28138. #define CSL_CPINTC_DBG_SELECT_REG43_DBG_SELECT43_SHIFT (0x00000000u)
  28139. #define CSL_CPINTC_DBG_SELECT_REG43_DBG_SELECT43_RESETVAL (0x00000000u)
  28140. #define CSL_CPINTC_DBG_SELECT_REG43_RESETVAL (0x00000000u)
  28141. /* dbg_select_reg44 */
  28142. #define CSL_CPINTC_DBG_SELECT_REG44_DBG_ENABLE44_MASK (0x80000000u)
  28143. #define CSL_CPINTC_DBG_SELECT_REG44_DBG_ENABLE44_SHIFT (0x0000001Fu)
  28144. #define CSL_CPINTC_DBG_SELECT_REG44_DBG_ENABLE44_RESETVAL (0x00000000u)
  28145. #define CSL_CPINTC_DBG_SELECT_REG44_DBG_SELECT44_MASK (0x00003FFFu)
  28146. #define CSL_CPINTC_DBG_SELECT_REG44_DBG_SELECT44_SHIFT (0x00000000u)
  28147. #define CSL_CPINTC_DBG_SELECT_REG44_DBG_SELECT44_RESETVAL (0x00000000u)
  28148. #define CSL_CPINTC_DBG_SELECT_REG44_RESETVAL (0x00000000u)
  28149. /* dbg_select_reg45 */
  28150. #define CSL_CPINTC_DBG_SELECT_REG45_DBG_ENABLE45_MASK (0x80000000u)
  28151. #define CSL_CPINTC_DBG_SELECT_REG45_DBG_ENABLE45_SHIFT (0x0000001Fu)
  28152. #define CSL_CPINTC_DBG_SELECT_REG45_DBG_ENABLE45_RESETVAL (0x00000000u)
  28153. #define CSL_CPINTC_DBG_SELECT_REG45_DBG_SELECT45_MASK (0x00003FFFu)
  28154. #define CSL_CPINTC_DBG_SELECT_REG45_DBG_SELECT45_SHIFT (0x00000000u)
  28155. #define CSL_CPINTC_DBG_SELECT_REG45_DBG_SELECT45_RESETVAL (0x00000000u)
  28156. #define CSL_CPINTC_DBG_SELECT_REG45_RESETVAL (0x00000000u)
  28157. /* dbg_select_reg46 */
  28158. #define CSL_CPINTC_DBG_SELECT_REG46_DBG_ENABLE46_MASK (0x80000000u)
  28159. #define CSL_CPINTC_DBG_SELECT_REG46_DBG_ENABLE46_SHIFT (0x0000001Fu)
  28160. #define CSL_CPINTC_DBG_SELECT_REG46_DBG_ENABLE46_RESETVAL (0x00000000u)
  28161. #define CSL_CPINTC_DBG_SELECT_REG46_DBG_SELECT46_MASK (0x00003FFFu)
  28162. #define CSL_CPINTC_DBG_SELECT_REG46_DBG_SELECT46_SHIFT (0x00000000u)
  28163. #define CSL_CPINTC_DBG_SELECT_REG46_DBG_SELECT46_RESETVAL (0x00000000u)
  28164. #define CSL_CPINTC_DBG_SELECT_REG46_RESETVAL (0x00000000u)
  28165. /* dbg_select_reg47 */
  28166. #define CSL_CPINTC_DBG_SELECT_REG47_DBG_ENABLE47_MASK (0x80000000u)
  28167. #define CSL_CPINTC_DBG_SELECT_REG47_DBG_ENABLE47_SHIFT (0x0000001Fu)
  28168. #define CSL_CPINTC_DBG_SELECT_REG47_DBG_ENABLE47_RESETVAL (0x00000000u)
  28169. #define CSL_CPINTC_DBG_SELECT_REG47_DBG_SELECT47_MASK (0x00003FFFu)
  28170. #define CSL_CPINTC_DBG_SELECT_REG47_DBG_SELECT47_SHIFT (0x00000000u)
  28171. #define CSL_CPINTC_DBG_SELECT_REG47_DBG_SELECT47_RESETVAL (0x00000000u)
  28172. #define CSL_CPINTC_DBG_SELECT_REG47_RESETVAL (0x00000000u)
  28173. /* dbg_select_reg48 */
  28174. #define CSL_CPINTC_DBG_SELECT_REG48_DBG_ENABLE48_MASK (0x80000000u)
  28175. #define CSL_CPINTC_DBG_SELECT_REG48_DBG_ENABLE48_SHIFT (0x0000001Fu)
  28176. #define CSL_CPINTC_DBG_SELECT_REG48_DBG_ENABLE48_RESETVAL (0x00000000u)
  28177. #define CSL_CPINTC_DBG_SELECT_REG48_DBG_SELECT48_MASK (0x00003FFFu)
  28178. #define CSL_CPINTC_DBG_SELECT_REG48_DBG_SELECT48_SHIFT (0x00000000u)
  28179. #define CSL_CPINTC_DBG_SELECT_REG48_DBG_SELECT48_RESETVAL (0x00000000u)
  28180. #define CSL_CPINTC_DBG_SELECT_REG48_RESETVAL (0x00000000u)
  28181. /* dbg_select_reg49 */
  28182. #define CSL_CPINTC_DBG_SELECT_REG49_DBG_ENABLE49_MASK (0x80000000u)
  28183. #define CSL_CPINTC_DBG_SELECT_REG49_DBG_ENABLE49_SHIFT (0x0000001Fu)
  28184. #define CSL_CPINTC_DBG_SELECT_REG49_DBG_ENABLE49_RESETVAL (0x00000000u)
  28185. #define CSL_CPINTC_DBG_SELECT_REG49_DBG_SELECT49_MASK (0x00003FFFu)
  28186. #define CSL_CPINTC_DBG_SELECT_REG49_DBG_SELECT49_SHIFT (0x00000000u)
  28187. #define CSL_CPINTC_DBG_SELECT_REG49_DBG_SELECT49_RESETVAL (0x00000000u)
  28188. #define CSL_CPINTC_DBG_SELECT_REG49_RESETVAL (0x00000000u)
  28189. /* dbg_select_reg50 */
  28190. #define CSL_CPINTC_DBG_SELECT_REG50_DBG_ENABLE50_MASK (0x80000000u)
  28191. #define CSL_CPINTC_DBG_SELECT_REG50_DBG_ENABLE50_SHIFT (0x0000001Fu)
  28192. #define CSL_CPINTC_DBG_SELECT_REG50_DBG_ENABLE50_RESETVAL (0x00000000u)
  28193. #define CSL_CPINTC_DBG_SELECT_REG50_DBG_SELECT50_MASK (0x00003FFFu)
  28194. #define CSL_CPINTC_DBG_SELECT_REG50_DBG_SELECT50_SHIFT (0x00000000u)
  28195. #define CSL_CPINTC_DBG_SELECT_REG50_DBG_SELECT50_RESETVAL (0x00000000u)
  28196. #define CSL_CPINTC_DBG_SELECT_REG50_RESETVAL (0x00000000u)
  28197. /* dbg_select_reg51 */
  28198. #define CSL_CPINTC_DBG_SELECT_REG51_DBG_ENABLE51_MASK (0x80000000u)
  28199. #define CSL_CPINTC_DBG_SELECT_REG51_DBG_ENABLE51_SHIFT (0x0000001Fu)
  28200. #define CSL_CPINTC_DBG_SELECT_REG51_DBG_ENABLE51_RESETVAL (0x00000000u)
  28201. #define CSL_CPINTC_DBG_SELECT_REG51_DBG_SELECT51_MASK (0x00003FFFu)
  28202. #define CSL_CPINTC_DBG_SELECT_REG51_DBG_SELECT51_SHIFT (0x00000000u)
  28203. #define CSL_CPINTC_DBG_SELECT_REG51_DBG_SELECT51_RESETVAL (0x00000000u)
  28204. #define CSL_CPINTC_DBG_SELECT_REG51_RESETVAL (0x00000000u)
  28205. /* dbg_select_reg52 */
  28206. #define CSL_CPINTC_DBG_SELECT_REG52_DBG_ENABLE52_MASK (0x80000000u)
  28207. #define CSL_CPINTC_DBG_SELECT_REG52_DBG_ENABLE52_SHIFT (0x0000001Fu)
  28208. #define CSL_CPINTC_DBG_SELECT_REG52_DBG_ENABLE52_RESETVAL (0x00000000u)
  28209. #define CSL_CPINTC_DBG_SELECT_REG52_DBG_SELECT52_MASK (0x00003FFFu)
  28210. #define CSL_CPINTC_DBG_SELECT_REG52_DBG_SELECT52_SHIFT (0x00000000u)
  28211. #define CSL_CPINTC_DBG_SELECT_REG52_DBG_SELECT52_RESETVAL (0x00000000u)
  28212. #define CSL_CPINTC_DBG_SELECT_REG52_RESETVAL (0x00000000u)
  28213. /* dbg_select_reg53 */
  28214. #define CSL_CPINTC_DBG_SELECT_REG53_DBG_ENABLE53_MASK (0x80000000u)
  28215. #define CSL_CPINTC_DBG_SELECT_REG53_DBG_ENABLE53_SHIFT (0x0000001Fu)
  28216. #define CSL_CPINTC_DBG_SELECT_REG53_DBG_ENABLE53_RESETVAL (0x00000000u)
  28217. #define CSL_CPINTC_DBG_SELECT_REG53_DBG_SELECT53_MASK (0x00003FFFu)
  28218. #define CSL_CPINTC_DBG_SELECT_REG53_DBG_SELECT53_SHIFT (0x00000000u)
  28219. #define CSL_CPINTC_DBG_SELECT_REG53_DBG_SELECT53_RESETVAL (0x00000000u)
  28220. #define CSL_CPINTC_DBG_SELECT_REG53_RESETVAL (0x00000000u)
  28221. /* dbg_select_reg54 */
  28222. #define CSL_CPINTC_DBG_SELECT_REG54_DBG_ENABLE54_MASK (0x80000000u)
  28223. #define CSL_CPINTC_DBG_SELECT_REG54_DBG_ENABLE54_SHIFT (0x0000001Fu)
  28224. #define CSL_CPINTC_DBG_SELECT_REG54_DBG_ENABLE54_RESETVAL (0x00000000u)
  28225. #define CSL_CPINTC_DBG_SELECT_REG54_DBG_SELECT54_MASK (0x00003FFFu)
  28226. #define CSL_CPINTC_DBG_SELECT_REG54_DBG_SELECT54_SHIFT (0x00000000u)
  28227. #define CSL_CPINTC_DBG_SELECT_REG54_DBG_SELECT54_RESETVAL (0x00000000u)
  28228. #define CSL_CPINTC_DBG_SELECT_REG54_RESETVAL (0x00000000u)
  28229. /* dbg_select_reg55 */
  28230. #define CSL_CPINTC_DBG_SELECT_REG55_DBG_ENABLE55_MASK (0x80000000u)
  28231. #define CSL_CPINTC_DBG_SELECT_REG55_DBG_ENABLE55_SHIFT (0x0000001Fu)
  28232. #define CSL_CPINTC_DBG_SELECT_REG55_DBG_ENABLE55_RESETVAL (0x00000000u)
  28233. #define CSL_CPINTC_DBG_SELECT_REG55_DBG_SELECT55_MASK (0x00003FFFu)
  28234. #define CSL_CPINTC_DBG_SELECT_REG55_DBG_SELECT55_SHIFT (0x00000000u)
  28235. #define CSL_CPINTC_DBG_SELECT_REG55_DBG_SELECT55_RESETVAL (0x00000000u)
  28236. #define CSL_CPINTC_DBG_SELECT_REG55_RESETVAL (0x00000000u)
  28237. /* dbg_select_reg56 */
  28238. #define CSL_CPINTC_DBG_SELECT_REG56_DBG_ENABLE56_MASK (0x80000000u)
  28239. #define CSL_CPINTC_DBG_SELECT_REG56_DBG_ENABLE56_SHIFT (0x0000001Fu)
  28240. #define CSL_CPINTC_DBG_SELECT_REG56_DBG_ENABLE56_RESETVAL (0x00000000u)
  28241. #define CSL_CPINTC_DBG_SELECT_REG56_DBG_SELECT56_MASK (0x00003FFFu)
  28242. #define CSL_CPINTC_DBG_SELECT_REG56_DBG_SELECT56_SHIFT (0x00000000u)
  28243. #define CSL_CPINTC_DBG_SELECT_REG56_DBG_SELECT56_RESETVAL (0x00000000u)
  28244. #define CSL_CPINTC_DBG_SELECT_REG56_RESETVAL (0x00000000u)
  28245. /* dbg_select_reg57 */
  28246. #define CSL_CPINTC_DBG_SELECT_REG57_DBG_ENABLE57_MASK (0x80000000u)
  28247. #define CSL_CPINTC_DBG_SELECT_REG57_DBG_ENABLE57_SHIFT (0x0000001Fu)
  28248. #define CSL_CPINTC_DBG_SELECT_REG57_DBG_ENABLE57_RESETVAL (0x00000000u)
  28249. #define CSL_CPINTC_DBG_SELECT_REG57_DBG_SELECT57_MASK (0x00003FFFu)
  28250. #define CSL_CPINTC_DBG_SELECT_REG57_DBG_SELECT57_SHIFT (0x00000000u)
  28251. #define CSL_CPINTC_DBG_SELECT_REG57_DBG_SELECT57_RESETVAL (0x00000000u)
  28252. #define CSL_CPINTC_DBG_SELECT_REG57_RESETVAL (0x00000000u)
  28253. /* dbg_select_reg58 */
  28254. #define CSL_CPINTC_DBG_SELECT_REG58_DBG_ENABLE58_MASK (0x80000000u)
  28255. #define CSL_CPINTC_DBG_SELECT_REG58_DBG_ENABLE58_SHIFT (0x0000001Fu)
  28256. #define CSL_CPINTC_DBG_SELECT_REG58_DBG_ENABLE58_RESETVAL (0x00000000u)
  28257. #define CSL_CPINTC_DBG_SELECT_REG58_DBG_SELECT58_MASK (0x00003FFFu)
  28258. #define CSL_CPINTC_DBG_SELECT_REG58_DBG_SELECT58_SHIFT (0x00000000u)
  28259. #define CSL_CPINTC_DBG_SELECT_REG58_DBG_SELECT58_RESETVAL (0x00000000u)
  28260. #define CSL_CPINTC_DBG_SELECT_REG58_RESETVAL (0x00000000u)
  28261. /* dbg_select_reg59 */
  28262. #define CSL_CPINTC_DBG_SELECT_REG59_DBG_ENABLE59_MASK (0x80000000u)
  28263. #define CSL_CPINTC_DBG_SELECT_REG59_DBG_ENABLE59_SHIFT (0x0000001Fu)
  28264. #define CSL_CPINTC_DBG_SELECT_REG59_DBG_ENABLE59_RESETVAL (0x00000000u)
  28265. #define CSL_CPINTC_DBG_SELECT_REG59_DBG_SELECT59_MASK (0x00003FFFu)
  28266. #define CSL_CPINTC_DBG_SELECT_REG59_DBG_SELECT59_SHIFT (0x00000000u)
  28267. #define CSL_CPINTC_DBG_SELECT_REG59_DBG_SELECT59_RESETVAL (0x00000000u)
  28268. #define CSL_CPINTC_DBG_SELECT_REG59_RESETVAL (0x00000000u)
  28269. /* dbg_select_reg60 */
  28270. #define CSL_CPINTC_DBG_SELECT_REG60_DBG_ENABLE60_MASK (0x80000000u)
  28271. #define CSL_CPINTC_DBG_SELECT_REG60_DBG_ENABLE60_SHIFT (0x0000001Fu)
  28272. #define CSL_CPINTC_DBG_SELECT_REG60_DBG_ENABLE60_RESETVAL (0x00000000u)
  28273. #define CSL_CPINTC_DBG_SELECT_REG60_DBG_SELECT60_MASK (0x00003FFFu)
  28274. #define CSL_CPINTC_DBG_SELECT_REG60_DBG_SELECT60_SHIFT (0x00000000u)
  28275. #define CSL_CPINTC_DBG_SELECT_REG60_DBG_SELECT60_RESETVAL (0x00000000u)
  28276. #define CSL_CPINTC_DBG_SELECT_REG60_RESETVAL (0x00000000u)
  28277. /* dbg_select_reg61 */
  28278. #define CSL_CPINTC_DBG_SELECT_REG61_DBG_ENABLE61_MASK (0x80000000u)
  28279. #define CSL_CPINTC_DBG_SELECT_REG61_DBG_ENABLE61_SHIFT (0x0000001Fu)
  28280. #define CSL_CPINTC_DBG_SELECT_REG61_DBG_ENABLE61_RESETVAL (0x00000000u)
  28281. #define CSL_CPINTC_DBG_SELECT_REG61_DBG_SELECT61_MASK (0x00003FFFu)
  28282. #define CSL_CPINTC_DBG_SELECT_REG61_DBG_SELECT61_SHIFT (0x00000000u)
  28283. #define CSL_CPINTC_DBG_SELECT_REG61_DBG_SELECT61_RESETVAL (0x00000000u)
  28284. #define CSL_CPINTC_DBG_SELECT_REG61_RESETVAL (0x00000000u)
  28285. /* dbg_select_reg62 */
  28286. #define CSL_CPINTC_DBG_SELECT_REG62_DBG_ENABLE62_MASK (0x80000000u)
  28287. #define CSL_CPINTC_DBG_SELECT_REG62_DBG_ENABLE62_SHIFT (0x0000001Fu)
  28288. #define CSL_CPINTC_DBG_SELECT_REG62_DBG_ENABLE62_RESETVAL (0x00000000u)
  28289. #define CSL_CPINTC_DBG_SELECT_REG62_DBG_SELECT62_MASK (0x00003FFFu)
  28290. #define CSL_CPINTC_DBG_SELECT_REG62_DBG_SELECT62_SHIFT (0x00000000u)
  28291. #define CSL_CPINTC_DBG_SELECT_REG62_DBG_SELECT62_RESETVAL (0x00000000u)
  28292. #define CSL_CPINTC_DBG_SELECT_REG62_RESETVAL (0x00000000u)
  28293. /* dbg_select_reg63 */
  28294. #define CSL_CPINTC_DBG_SELECT_REG63_DBG_ENABLE63_MASK (0x80000000u)
  28295. #define CSL_CPINTC_DBG_SELECT_REG63_DBG_ENABLE63_SHIFT (0x0000001Fu)
  28296. #define CSL_CPINTC_DBG_SELECT_REG63_DBG_ENABLE63_RESETVAL (0x00000000u)
  28297. #define CSL_CPINTC_DBG_SELECT_REG63_DBG_SELECT63_MASK (0x00003FFFu)
  28298. #define CSL_CPINTC_DBG_SELECT_REG63_DBG_SELECT63_SHIFT (0x00000000u)
  28299. #define CSL_CPINTC_DBG_SELECT_REG63_DBG_SELECT63_RESETVAL (0x00000000u)
  28300. #define CSL_CPINTC_DBG_SELECT_REG63_RESETVAL (0x00000000u)
  28301. /* secure_enable_reg0 */
  28302. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_0_MASK (0x00000001u)
  28303. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_0_SHIFT (0x00000000u)
  28304. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_0_RESETVAL (0x00000000u)
  28305. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_1_MASK (0x00000002u)
  28306. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_1_SHIFT (0x00000001u)
  28307. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_1_RESETVAL (0x00000000u)
  28308. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_2_MASK (0x00000004u)
  28309. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_2_SHIFT (0x00000002u)
  28310. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_2_RESETVAL (0x00000000u)
  28311. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_3_MASK (0x00000008u)
  28312. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_3_SHIFT (0x00000003u)
  28313. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_3_RESETVAL (0x00000000u)
  28314. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_4_MASK (0x00000010u)
  28315. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_4_SHIFT (0x00000004u)
  28316. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_4_RESETVAL (0x00000000u)
  28317. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_5_MASK (0x00000020u)
  28318. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_5_SHIFT (0x00000005u)
  28319. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_5_RESETVAL (0x00000000u)
  28320. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_6_MASK (0x00000040u)
  28321. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_6_SHIFT (0x00000006u)
  28322. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_6_RESETVAL (0x00000000u)
  28323. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_7_MASK (0x00000080u)
  28324. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_7_SHIFT (0x00000007u)
  28325. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_7_RESETVAL (0x00000000u)
  28326. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_8_MASK (0x00000100u)
  28327. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_8_SHIFT (0x00000008u)
  28328. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_8_RESETVAL (0x00000000u)
  28329. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_9_MASK (0x00000200u)
  28330. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_9_SHIFT (0x00000009u)
  28331. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_9_RESETVAL (0x00000000u)
  28332. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_10_MASK (0x00000400u)
  28333. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_10_SHIFT (0x0000000Au)
  28334. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_10_RESETVAL (0x00000000u)
  28335. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_11_MASK (0x00000800u)
  28336. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_11_SHIFT (0x0000000Bu)
  28337. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_11_RESETVAL (0x00000000u)
  28338. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_12_MASK (0x00001000u)
  28339. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_12_SHIFT (0x0000000Cu)
  28340. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_12_RESETVAL (0x00000000u)
  28341. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_13_MASK (0x00002000u)
  28342. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_13_SHIFT (0x0000000Du)
  28343. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_13_RESETVAL (0x00000000u)
  28344. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_14_MASK (0x00004000u)
  28345. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_14_SHIFT (0x0000000Eu)
  28346. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_14_RESETVAL (0x00000000u)
  28347. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_15_MASK (0x00008000u)
  28348. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_15_SHIFT (0x0000000Fu)
  28349. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_15_RESETVAL (0x00000000u)
  28350. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_16_MASK (0x00010000u)
  28351. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_16_SHIFT (0x00000010u)
  28352. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_16_RESETVAL (0x00000000u)
  28353. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_17_MASK (0x00020000u)
  28354. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_17_SHIFT (0x00000011u)
  28355. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_17_RESETVAL (0x00000000u)
  28356. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_18_MASK (0x00040000u)
  28357. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_18_SHIFT (0x00000012u)
  28358. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_18_RESETVAL (0x00000000u)
  28359. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_19_MASK (0x00080000u)
  28360. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_19_SHIFT (0x00000013u)
  28361. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_19_RESETVAL (0x00000000u)
  28362. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_20_MASK (0x00100000u)
  28363. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_20_SHIFT (0x00000014u)
  28364. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_20_RESETVAL (0x00000000u)
  28365. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_21_MASK (0x00200000u)
  28366. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_21_SHIFT (0x00000015u)
  28367. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_21_RESETVAL (0x00000000u)
  28368. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_22_MASK (0x00400000u)
  28369. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_22_SHIFT (0x00000016u)
  28370. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_22_RESETVAL (0x00000000u)
  28371. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_23_MASK (0x00800000u)
  28372. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_23_SHIFT (0x00000017u)
  28373. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_23_RESETVAL (0x00000000u)
  28374. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_24_MASK (0x01000000u)
  28375. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_24_SHIFT (0x00000018u)
  28376. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_24_RESETVAL (0x00000000u)
  28377. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_25_MASK (0x02000000u)
  28378. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_25_SHIFT (0x00000019u)
  28379. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_25_RESETVAL (0x00000000u)
  28380. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_26_MASK (0x04000000u)
  28381. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_26_SHIFT (0x0000001Au)
  28382. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_26_RESETVAL (0x00000000u)
  28383. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_27_MASK (0x08000000u)
  28384. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_27_SHIFT (0x0000001Bu)
  28385. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_27_RESETVAL (0x00000000u)
  28386. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_28_MASK (0x10000000u)
  28387. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_28_SHIFT (0x0000001Cu)
  28388. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_28_RESETVAL (0x00000000u)
  28389. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_29_MASK (0x20000000u)
  28390. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_29_SHIFT (0x0000001Du)
  28391. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_29_RESETVAL (0x00000000u)
  28392. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_30_MASK (0x40000000u)
  28393. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_30_SHIFT (0x0000001Eu)
  28394. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_30_RESETVAL (0x00000000u)
  28395. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_31_MASK (0x80000000u)
  28396. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_31_SHIFT (0x0000001Fu)
  28397. #define CSL_CPINTC_SECURE_ENABLE_REG0_SECURE_ENABLE_31_RESETVAL (0x00000000u)
  28398. #define CSL_CPINTC_SECURE_ENABLE_REG0_RESETVAL (0x00000000u)
  28399. /* secure_enable_reg1 */
  28400. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_32_MASK (0x00000001u)
  28401. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_32_SHIFT (0x00000000u)
  28402. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_32_RESETVAL (0x00000000u)
  28403. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_33_MASK (0x00000002u)
  28404. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_33_SHIFT (0x00000001u)
  28405. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_33_RESETVAL (0x00000000u)
  28406. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_34_MASK (0x00000004u)
  28407. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_34_SHIFT (0x00000002u)
  28408. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_34_RESETVAL (0x00000000u)
  28409. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_35_MASK (0x00000008u)
  28410. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_35_SHIFT (0x00000003u)
  28411. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_35_RESETVAL (0x00000000u)
  28412. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_36_MASK (0x00000010u)
  28413. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_36_SHIFT (0x00000004u)
  28414. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_36_RESETVAL (0x00000000u)
  28415. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_37_MASK (0x00000020u)
  28416. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_37_SHIFT (0x00000005u)
  28417. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_37_RESETVAL (0x00000000u)
  28418. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_38_MASK (0x00000040u)
  28419. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_38_SHIFT (0x00000006u)
  28420. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_38_RESETVAL (0x00000000u)
  28421. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_39_MASK (0x00000080u)
  28422. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_39_SHIFT (0x00000007u)
  28423. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_39_RESETVAL (0x00000000u)
  28424. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_40_MASK (0x00000100u)
  28425. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_40_SHIFT (0x00000008u)
  28426. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_40_RESETVAL (0x00000000u)
  28427. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_41_MASK (0x00000200u)
  28428. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_41_SHIFT (0x00000009u)
  28429. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_41_RESETVAL (0x00000000u)
  28430. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_42_MASK (0x00000400u)
  28431. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_42_SHIFT (0x0000000Au)
  28432. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_42_RESETVAL (0x00000000u)
  28433. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_43_MASK (0x00000800u)
  28434. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_43_SHIFT (0x0000000Bu)
  28435. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_43_RESETVAL (0x00000000u)
  28436. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_44_MASK (0x00001000u)
  28437. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_44_SHIFT (0x0000000Cu)
  28438. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_44_RESETVAL (0x00000000u)
  28439. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_45_MASK (0x00002000u)
  28440. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_45_SHIFT (0x0000000Du)
  28441. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_45_RESETVAL (0x00000000u)
  28442. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_46_MASK (0x00004000u)
  28443. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_46_SHIFT (0x0000000Eu)
  28444. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_46_RESETVAL (0x00000000u)
  28445. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_47_MASK (0x00008000u)
  28446. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_47_SHIFT (0x0000000Fu)
  28447. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_47_RESETVAL (0x00000000u)
  28448. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_48_MASK (0x00010000u)
  28449. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_48_SHIFT (0x00000010u)
  28450. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_48_RESETVAL (0x00000000u)
  28451. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_49_MASK (0x00020000u)
  28452. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_49_SHIFT (0x00000011u)
  28453. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_49_RESETVAL (0x00000000u)
  28454. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_50_MASK (0x00040000u)
  28455. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_50_SHIFT (0x00000012u)
  28456. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_50_RESETVAL (0x00000000u)
  28457. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_51_MASK (0x00080000u)
  28458. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_51_SHIFT (0x00000013u)
  28459. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_51_RESETVAL (0x00000000u)
  28460. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_52_MASK (0x00100000u)
  28461. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_52_SHIFT (0x00000014u)
  28462. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_52_RESETVAL (0x00000000u)
  28463. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_53_MASK (0x00200000u)
  28464. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_53_SHIFT (0x00000015u)
  28465. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_53_RESETVAL (0x00000000u)
  28466. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_54_MASK (0x00400000u)
  28467. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_54_SHIFT (0x00000016u)
  28468. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_54_RESETVAL (0x00000000u)
  28469. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_55_MASK (0x00800000u)
  28470. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_55_SHIFT (0x00000017u)
  28471. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_55_RESETVAL (0x00000000u)
  28472. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_56_MASK (0x01000000u)
  28473. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_56_SHIFT (0x00000018u)
  28474. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_56_RESETVAL (0x00000000u)
  28475. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_57_MASK (0x02000000u)
  28476. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_57_SHIFT (0x00000019u)
  28477. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_57_RESETVAL (0x00000000u)
  28478. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_58_MASK (0x04000000u)
  28479. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_58_SHIFT (0x0000001Au)
  28480. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_58_RESETVAL (0x00000000u)
  28481. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_59_MASK (0x08000000u)
  28482. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_59_SHIFT (0x0000001Bu)
  28483. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_59_RESETVAL (0x00000000u)
  28484. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_60_MASK (0x10000000u)
  28485. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_60_SHIFT (0x0000001Cu)
  28486. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_60_RESETVAL (0x00000000u)
  28487. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_61_MASK (0x20000000u)
  28488. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_61_SHIFT (0x0000001Du)
  28489. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_61_RESETVAL (0x00000000u)
  28490. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_62_MASK (0x40000000u)
  28491. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_62_SHIFT (0x0000001Eu)
  28492. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_62_RESETVAL (0x00000000u)
  28493. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_63_MASK (0x80000000u)
  28494. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_63_SHIFT (0x0000001Fu)
  28495. #define CSL_CPINTC_SECURE_ENABLE_REG1_SECURE_ENABLE_63_RESETVAL (0x00000000u)
  28496. #define CSL_CPINTC_SECURE_ENABLE_REG1_RESETVAL (0x00000000u)
  28497. /* secure_enable_reg2 */
  28498. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_64_MASK (0x00000001u)
  28499. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_64_SHIFT (0x00000000u)
  28500. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_64_RESETVAL (0x00000000u)
  28501. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_65_MASK (0x00000002u)
  28502. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_65_SHIFT (0x00000001u)
  28503. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_65_RESETVAL (0x00000000u)
  28504. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_66_MASK (0x00000004u)
  28505. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_66_SHIFT (0x00000002u)
  28506. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_66_RESETVAL (0x00000000u)
  28507. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_67_MASK (0x00000008u)
  28508. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_67_SHIFT (0x00000003u)
  28509. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_67_RESETVAL (0x00000000u)
  28510. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_68_MASK (0x00000010u)
  28511. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_68_SHIFT (0x00000004u)
  28512. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_68_RESETVAL (0x00000000u)
  28513. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_69_MASK (0x00000020u)
  28514. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_69_SHIFT (0x00000005u)
  28515. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_69_RESETVAL (0x00000000u)
  28516. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_70_MASK (0x00000040u)
  28517. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_70_SHIFT (0x00000006u)
  28518. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_70_RESETVAL (0x00000000u)
  28519. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_71_MASK (0x00000080u)
  28520. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_71_SHIFT (0x00000007u)
  28521. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_71_RESETVAL (0x00000000u)
  28522. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_72_MASK (0x00000100u)
  28523. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_72_SHIFT (0x00000008u)
  28524. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_72_RESETVAL (0x00000000u)
  28525. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_73_MASK (0x00000200u)
  28526. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_73_SHIFT (0x00000009u)
  28527. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_73_RESETVAL (0x00000000u)
  28528. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_74_MASK (0x00000400u)
  28529. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_74_SHIFT (0x0000000Au)
  28530. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_74_RESETVAL (0x00000000u)
  28531. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_75_MASK (0x00000800u)
  28532. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_75_SHIFT (0x0000000Bu)
  28533. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_75_RESETVAL (0x00000000u)
  28534. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_76_MASK (0x00001000u)
  28535. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_76_SHIFT (0x0000000Cu)
  28536. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_76_RESETVAL (0x00000000u)
  28537. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_77_MASK (0x00002000u)
  28538. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_77_SHIFT (0x0000000Du)
  28539. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_77_RESETVAL (0x00000000u)
  28540. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_78_MASK (0x00004000u)
  28541. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_78_SHIFT (0x0000000Eu)
  28542. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_78_RESETVAL (0x00000000u)
  28543. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_79_MASK (0x00008000u)
  28544. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_79_SHIFT (0x0000000Fu)
  28545. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_79_RESETVAL (0x00000000u)
  28546. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_80_MASK (0x00010000u)
  28547. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_80_SHIFT (0x00000010u)
  28548. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_80_RESETVAL (0x00000000u)
  28549. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_81_MASK (0x00020000u)
  28550. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_81_SHIFT (0x00000011u)
  28551. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_81_RESETVAL (0x00000000u)
  28552. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_82_MASK (0x00040000u)
  28553. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_82_SHIFT (0x00000012u)
  28554. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_82_RESETVAL (0x00000000u)
  28555. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_83_MASK (0x00080000u)
  28556. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_83_SHIFT (0x00000013u)
  28557. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_83_RESETVAL (0x00000000u)
  28558. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_84_MASK (0x00100000u)
  28559. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_84_SHIFT (0x00000014u)
  28560. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_84_RESETVAL (0x00000000u)
  28561. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_85_MASK (0x00200000u)
  28562. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_85_SHIFT (0x00000015u)
  28563. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_85_RESETVAL (0x00000000u)
  28564. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_86_MASK (0x00400000u)
  28565. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_86_SHIFT (0x00000016u)
  28566. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_86_RESETVAL (0x00000000u)
  28567. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_87_MASK (0x00800000u)
  28568. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_87_SHIFT (0x00000017u)
  28569. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_87_RESETVAL (0x00000000u)
  28570. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_88_MASK (0x01000000u)
  28571. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_88_SHIFT (0x00000018u)
  28572. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_88_RESETVAL (0x00000000u)
  28573. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_89_MASK (0x02000000u)
  28574. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_89_SHIFT (0x00000019u)
  28575. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_89_RESETVAL (0x00000000u)
  28576. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_90_MASK (0x04000000u)
  28577. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_90_SHIFT (0x0000001Au)
  28578. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_90_RESETVAL (0x00000000u)
  28579. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_91_MASK (0x08000000u)
  28580. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_91_SHIFT (0x0000001Bu)
  28581. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_91_RESETVAL (0x00000000u)
  28582. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_92_MASK (0x10000000u)
  28583. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_92_SHIFT (0x0000001Cu)
  28584. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_92_RESETVAL (0x00000000u)
  28585. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_93_MASK (0x20000000u)
  28586. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_93_SHIFT (0x0000001Du)
  28587. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_93_RESETVAL (0x00000000u)
  28588. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_94_MASK (0x40000000u)
  28589. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_94_SHIFT (0x0000001Eu)
  28590. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_94_RESETVAL (0x00000000u)
  28591. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_95_MASK (0x80000000u)
  28592. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_95_SHIFT (0x0000001Fu)
  28593. #define CSL_CPINTC_SECURE_ENABLE_REG2_SECURE_ENABLE_95_RESETVAL (0x00000000u)
  28594. #define CSL_CPINTC_SECURE_ENABLE_REG2_RESETVAL (0x00000000u)
  28595. /* secure_enable_reg3 */
  28596. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_96_MASK (0x00000001u)
  28597. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_96_SHIFT (0x00000000u)
  28598. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_96_RESETVAL (0x00000000u)
  28599. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_97_MASK (0x00000002u)
  28600. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_97_SHIFT (0x00000001u)
  28601. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_97_RESETVAL (0x00000000u)
  28602. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_98_MASK (0x00000004u)
  28603. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_98_SHIFT (0x00000002u)
  28604. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_98_RESETVAL (0x00000000u)
  28605. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_99_MASK (0x00000008u)
  28606. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_99_SHIFT (0x00000003u)
  28607. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_99_RESETVAL (0x00000000u)
  28608. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_100_MASK (0x00000010u)
  28609. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_100_SHIFT (0x00000004u)
  28610. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_100_RESETVAL (0x00000000u)
  28611. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_101_MASK (0x00000020u)
  28612. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_101_SHIFT (0x00000005u)
  28613. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_101_RESETVAL (0x00000000u)
  28614. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_102_MASK (0x00000040u)
  28615. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_102_SHIFT (0x00000006u)
  28616. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_102_RESETVAL (0x00000000u)
  28617. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_103_MASK (0x00000080u)
  28618. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_103_SHIFT (0x00000007u)
  28619. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_103_RESETVAL (0x00000000u)
  28620. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_104_MASK (0x00000100u)
  28621. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_104_SHIFT (0x00000008u)
  28622. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_104_RESETVAL (0x00000000u)
  28623. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_105_MASK (0x00000200u)
  28624. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_105_SHIFT (0x00000009u)
  28625. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_105_RESETVAL (0x00000000u)
  28626. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_106_MASK (0x00000400u)
  28627. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_106_SHIFT (0x0000000Au)
  28628. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_106_RESETVAL (0x00000000u)
  28629. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_107_MASK (0x00000800u)
  28630. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_107_SHIFT (0x0000000Bu)
  28631. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_107_RESETVAL (0x00000000u)
  28632. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_108_MASK (0x00001000u)
  28633. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_108_SHIFT (0x0000000Cu)
  28634. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_108_RESETVAL (0x00000000u)
  28635. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_109_MASK (0x00002000u)
  28636. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_109_SHIFT (0x0000000Du)
  28637. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_109_RESETVAL (0x00000000u)
  28638. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_110_MASK (0x00004000u)
  28639. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_110_SHIFT (0x0000000Eu)
  28640. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_110_RESETVAL (0x00000000u)
  28641. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_111_MASK (0x00008000u)
  28642. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_111_SHIFT (0x0000000Fu)
  28643. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_111_RESETVAL (0x00000000u)
  28644. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_112_MASK (0x00010000u)
  28645. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_112_SHIFT (0x00000010u)
  28646. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_112_RESETVAL (0x00000000u)
  28647. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_113_MASK (0x00020000u)
  28648. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_113_SHIFT (0x00000011u)
  28649. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_113_RESETVAL (0x00000000u)
  28650. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_114_MASK (0x00040000u)
  28651. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_114_SHIFT (0x00000012u)
  28652. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_114_RESETVAL (0x00000000u)
  28653. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_115_MASK (0x00080000u)
  28654. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_115_SHIFT (0x00000013u)
  28655. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_115_RESETVAL (0x00000000u)
  28656. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_116_MASK (0x00100000u)
  28657. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_116_SHIFT (0x00000014u)
  28658. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_116_RESETVAL (0x00000000u)
  28659. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_117_MASK (0x00200000u)
  28660. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_117_SHIFT (0x00000015u)
  28661. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_117_RESETVAL (0x00000000u)
  28662. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_118_MASK (0x00400000u)
  28663. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_118_SHIFT (0x00000016u)
  28664. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_118_RESETVAL (0x00000000u)
  28665. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_119_MASK (0x00800000u)
  28666. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_119_SHIFT (0x00000017u)
  28667. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_119_RESETVAL (0x00000000u)
  28668. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_120_MASK (0x01000000u)
  28669. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_120_SHIFT (0x00000018u)
  28670. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_120_RESETVAL (0x00000000u)
  28671. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_121_MASK (0x02000000u)
  28672. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_121_SHIFT (0x00000019u)
  28673. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_121_RESETVAL (0x00000000u)
  28674. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_122_MASK (0x04000000u)
  28675. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_122_SHIFT (0x0000001Au)
  28676. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_122_RESETVAL (0x00000000u)
  28677. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_123_MASK (0x08000000u)
  28678. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_123_SHIFT (0x0000001Bu)
  28679. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_123_RESETVAL (0x00000000u)
  28680. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_124_MASK (0x10000000u)
  28681. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_124_SHIFT (0x0000001Cu)
  28682. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_124_RESETVAL (0x00000000u)
  28683. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_125_MASK (0x20000000u)
  28684. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_125_SHIFT (0x0000001Du)
  28685. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_125_RESETVAL (0x00000000u)
  28686. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_126_MASK (0x40000000u)
  28687. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_126_SHIFT (0x0000001Eu)
  28688. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_126_RESETVAL (0x00000000u)
  28689. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_127_MASK (0x80000000u)
  28690. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_127_SHIFT (0x0000001Fu)
  28691. #define CSL_CPINTC_SECURE_ENABLE_REG3_SECURE_ENABLE_127_RESETVAL (0x00000000u)
  28692. #define CSL_CPINTC_SECURE_ENABLE_REG3_RESETVAL (0x00000000u)
  28693. /* secure_enable_reg4 */
  28694. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_128_MASK (0x00000001u)
  28695. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_128_SHIFT (0x00000000u)
  28696. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_128_RESETVAL (0x00000000u)
  28697. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_129_MASK (0x00000002u)
  28698. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_129_SHIFT (0x00000001u)
  28699. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_129_RESETVAL (0x00000000u)
  28700. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_130_MASK (0x00000004u)
  28701. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_130_SHIFT (0x00000002u)
  28702. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_130_RESETVAL (0x00000000u)
  28703. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_131_MASK (0x00000008u)
  28704. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_131_SHIFT (0x00000003u)
  28705. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_131_RESETVAL (0x00000000u)
  28706. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_132_MASK (0x00000010u)
  28707. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_132_SHIFT (0x00000004u)
  28708. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_132_RESETVAL (0x00000000u)
  28709. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_133_MASK (0x00000020u)
  28710. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_133_SHIFT (0x00000005u)
  28711. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_133_RESETVAL (0x00000000u)
  28712. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_134_MASK (0x00000040u)
  28713. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_134_SHIFT (0x00000006u)
  28714. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_134_RESETVAL (0x00000000u)
  28715. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_135_MASK (0x00000080u)
  28716. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_135_SHIFT (0x00000007u)
  28717. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_135_RESETVAL (0x00000000u)
  28718. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_136_MASK (0x00000100u)
  28719. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_136_SHIFT (0x00000008u)
  28720. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_136_RESETVAL (0x00000000u)
  28721. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_137_MASK (0x00000200u)
  28722. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_137_SHIFT (0x00000009u)
  28723. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_137_RESETVAL (0x00000000u)
  28724. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_138_MASK (0x00000400u)
  28725. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_138_SHIFT (0x0000000Au)
  28726. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_138_RESETVAL (0x00000000u)
  28727. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_139_MASK (0x00000800u)
  28728. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_139_SHIFT (0x0000000Bu)
  28729. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_139_RESETVAL (0x00000000u)
  28730. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_140_MASK (0x00001000u)
  28731. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_140_SHIFT (0x0000000Cu)
  28732. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_140_RESETVAL (0x00000000u)
  28733. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_141_MASK (0x00002000u)
  28734. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_141_SHIFT (0x0000000Du)
  28735. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_141_RESETVAL (0x00000000u)
  28736. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_142_MASK (0x00004000u)
  28737. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_142_SHIFT (0x0000000Eu)
  28738. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_142_RESETVAL (0x00000000u)
  28739. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_143_MASK (0x00008000u)
  28740. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_143_SHIFT (0x0000000Fu)
  28741. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_143_RESETVAL (0x00000000u)
  28742. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_144_MASK (0x00010000u)
  28743. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_144_SHIFT (0x00000010u)
  28744. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_144_RESETVAL (0x00000000u)
  28745. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_145_MASK (0x00020000u)
  28746. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_145_SHIFT (0x00000011u)
  28747. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_145_RESETVAL (0x00000000u)
  28748. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_146_MASK (0x00040000u)
  28749. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_146_SHIFT (0x00000012u)
  28750. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_146_RESETVAL (0x00000000u)
  28751. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_147_MASK (0x00080000u)
  28752. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_147_SHIFT (0x00000013u)
  28753. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_147_RESETVAL (0x00000000u)
  28754. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_148_MASK (0x00100000u)
  28755. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_148_SHIFT (0x00000014u)
  28756. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_148_RESETVAL (0x00000000u)
  28757. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_149_MASK (0x00200000u)
  28758. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_149_SHIFT (0x00000015u)
  28759. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_149_RESETVAL (0x00000000u)
  28760. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_150_MASK (0x00400000u)
  28761. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_150_SHIFT (0x00000016u)
  28762. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_150_RESETVAL (0x00000000u)
  28763. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_151_MASK (0x00800000u)
  28764. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_151_SHIFT (0x00000017u)
  28765. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_151_RESETVAL (0x00000000u)
  28766. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_152_MASK (0x01000000u)
  28767. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_152_SHIFT (0x00000018u)
  28768. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_152_RESETVAL (0x00000000u)
  28769. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_153_MASK (0x02000000u)
  28770. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_153_SHIFT (0x00000019u)
  28771. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_153_RESETVAL (0x00000000u)
  28772. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_154_MASK (0x04000000u)
  28773. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_154_SHIFT (0x0000001Au)
  28774. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_154_RESETVAL (0x00000000u)
  28775. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_155_MASK (0x08000000u)
  28776. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_155_SHIFT (0x0000001Bu)
  28777. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_155_RESETVAL (0x00000000u)
  28778. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_156_MASK (0x10000000u)
  28779. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_156_SHIFT (0x0000001Cu)
  28780. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_156_RESETVAL (0x00000000u)
  28781. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_157_MASK (0x20000000u)
  28782. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_157_SHIFT (0x0000001Du)
  28783. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_157_RESETVAL (0x00000000u)
  28784. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_158_MASK (0x40000000u)
  28785. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_158_SHIFT (0x0000001Eu)
  28786. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_158_RESETVAL (0x00000000u)
  28787. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_159_MASK (0x80000000u)
  28788. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_159_SHIFT (0x0000001Fu)
  28789. #define CSL_CPINTC_SECURE_ENABLE_REG4_SECURE_ENABLE_159_RESETVAL (0x00000000u)
  28790. #define CSL_CPINTC_SECURE_ENABLE_REG4_RESETVAL (0x00000000u)
  28791. /* secure_enable_reg5 */
  28792. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_160_MASK (0x00000001u)
  28793. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_160_SHIFT (0x00000000u)
  28794. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_160_RESETVAL (0x00000000u)
  28795. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_161_MASK (0x00000002u)
  28796. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_161_SHIFT (0x00000001u)
  28797. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_161_RESETVAL (0x00000000u)
  28798. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_162_MASK (0x00000004u)
  28799. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_162_SHIFT (0x00000002u)
  28800. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_162_RESETVAL (0x00000000u)
  28801. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_163_MASK (0x00000008u)
  28802. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_163_SHIFT (0x00000003u)
  28803. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_163_RESETVAL (0x00000000u)
  28804. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_164_MASK (0x00000010u)
  28805. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_164_SHIFT (0x00000004u)
  28806. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_164_RESETVAL (0x00000000u)
  28807. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_165_MASK (0x00000020u)
  28808. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_165_SHIFT (0x00000005u)
  28809. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_165_RESETVAL (0x00000000u)
  28810. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_166_MASK (0x00000040u)
  28811. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_166_SHIFT (0x00000006u)
  28812. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_166_RESETVAL (0x00000000u)
  28813. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_167_MASK (0x00000080u)
  28814. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_167_SHIFT (0x00000007u)
  28815. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_167_RESETVAL (0x00000000u)
  28816. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_168_MASK (0x00000100u)
  28817. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_168_SHIFT (0x00000008u)
  28818. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_168_RESETVAL (0x00000000u)
  28819. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_169_MASK (0x00000200u)
  28820. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_169_SHIFT (0x00000009u)
  28821. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_169_RESETVAL (0x00000000u)
  28822. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_170_MASK (0x00000400u)
  28823. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_170_SHIFT (0x0000000Au)
  28824. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_170_RESETVAL (0x00000000u)
  28825. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_171_MASK (0x00000800u)
  28826. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_171_SHIFT (0x0000000Bu)
  28827. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_171_RESETVAL (0x00000000u)
  28828. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_172_MASK (0x00001000u)
  28829. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_172_SHIFT (0x0000000Cu)
  28830. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_172_RESETVAL (0x00000000u)
  28831. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_173_MASK (0x00002000u)
  28832. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_173_SHIFT (0x0000000Du)
  28833. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_173_RESETVAL (0x00000000u)
  28834. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_174_MASK (0x00004000u)
  28835. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_174_SHIFT (0x0000000Eu)
  28836. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_174_RESETVAL (0x00000000u)
  28837. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_175_MASK (0x00008000u)
  28838. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_175_SHIFT (0x0000000Fu)
  28839. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_175_RESETVAL (0x00000000u)
  28840. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_176_MASK (0x00010000u)
  28841. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_176_SHIFT (0x00000010u)
  28842. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_176_RESETVAL (0x00000000u)
  28843. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_177_MASK (0x00020000u)
  28844. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_177_SHIFT (0x00000011u)
  28845. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_177_RESETVAL (0x00000000u)
  28846. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_178_MASK (0x00040000u)
  28847. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_178_SHIFT (0x00000012u)
  28848. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_178_RESETVAL (0x00000000u)
  28849. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_179_MASK (0x00080000u)
  28850. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_179_SHIFT (0x00000013u)
  28851. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_179_RESETVAL (0x00000000u)
  28852. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_180_MASK (0x00100000u)
  28853. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_180_SHIFT (0x00000014u)
  28854. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_180_RESETVAL (0x00000000u)
  28855. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_181_MASK (0x00200000u)
  28856. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_181_SHIFT (0x00000015u)
  28857. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_181_RESETVAL (0x00000000u)
  28858. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_182_MASK (0x00400000u)
  28859. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_182_SHIFT (0x00000016u)
  28860. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_182_RESETVAL (0x00000000u)
  28861. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_183_MASK (0x00800000u)
  28862. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_183_SHIFT (0x00000017u)
  28863. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_183_RESETVAL (0x00000000u)
  28864. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_184_MASK (0x01000000u)
  28865. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_184_SHIFT (0x00000018u)
  28866. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_184_RESETVAL (0x00000000u)
  28867. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_185_MASK (0x02000000u)
  28868. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_185_SHIFT (0x00000019u)
  28869. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_185_RESETVAL (0x00000000u)
  28870. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_186_MASK (0x04000000u)
  28871. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_186_SHIFT (0x0000001Au)
  28872. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_186_RESETVAL (0x00000000u)
  28873. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_187_MASK (0x08000000u)
  28874. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_187_SHIFT (0x0000001Bu)
  28875. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_187_RESETVAL (0x00000000u)
  28876. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_188_MASK (0x10000000u)
  28877. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_188_SHIFT (0x0000001Cu)
  28878. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_188_RESETVAL (0x00000000u)
  28879. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_189_MASK (0x20000000u)
  28880. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_189_SHIFT (0x0000001Du)
  28881. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_189_RESETVAL (0x00000000u)
  28882. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_190_MASK (0x40000000u)
  28883. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_190_SHIFT (0x0000001Eu)
  28884. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_190_RESETVAL (0x00000000u)
  28885. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_191_MASK (0x80000000u)
  28886. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_191_SHIFT (0x0000001Fu)
  28887. #define CSL_CPINTC_SECURE_ENABLE_REG5_SECURE_ENABLE_191_RESETVAL (0x00000000u)
  28888. #define CSL_CPINTC_SECURE_ENABLE_REG5_RESETVAL (0x00000000u)
  28889. /* secure_enable_reg6 */
  28890. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_192_MASK (0x00000001u)
  28891. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_192_SHIFT (0x00000000u)
  28892. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_192_RESETVAL (0x00000000u)
  28893. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_193_MASK (0x00000002u)
  28894. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_193_SHIFT (0x00000001u)
  28895. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_193_RESETVAL (0x00000000u)
  28896. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_194_MASK (0x00000004u)
  28897. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_194_SHIFT (0x00000002u)
  28898. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_194_RESETVAL (0x00000000u)
  28899. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_195_MASK (0x00000008u)
  28900. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_195_SHIFT (0x00000003u)
  28901. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_195_RESETVAL (0x00000000u)
  28902. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_196_MASK (0x00000010u)
  28903. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_196_SHIFT (0x00000004u)
  28904. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_196_RESETVAL (0x00000000u)
  28905. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_197_MASK (0x00000020u)
  28906. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_197_SHIFT (0x00000005u)
  28907. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_197_RESETVAL (0x00000000u)
  28908. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_198_MASK (0x00000040u)
  28909. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_198_SHIFT (0x00000006u)
  28910. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_198_RESETVAL (0x00000000u)
  28911. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_199_MASK (0x00000080u)
  28912. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_199_SHIFT (0x00000007u)
  28913. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_199_RESETVAL (0x00000000u)
  28914. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_200_MASK (0x00000100u)
  28915. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_200_SHIFT (0x00000008u)
  28916. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_200_RESETVAL (0x00000000u)
  28917. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_201_MASK (0x00000200u)
  28918. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_201_SHIFT (0x00000009u)
  28919. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_201_RESETVAL (0x00000000u)
  28920. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_202_MASK (0x00000400u)
  28921. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_202_SHIFT (0x0000000Au)
  28922. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_202_RESETVAL (0x00000000u)
  28923. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_203_MASK (0x00000800u)
  28924. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_203_SHIFT (0x0000000Bu)
  28925. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_203_RESETVAL (0x00000000u)
  28926. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_204_MASK (0x00001000u)
  28927. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_204_SHIFT (0x0000000Cu)
  28928. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_204_RESETVAL (0x00000000u)
  28929. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_205_MASK (0x00002000u)
  28930. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_205_SHIFT (0x0000000Du)
  28931. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_205_RESETVAL (0x00000000u)
  28932. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_206_MASK (0x00004000u)
  28933. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_206_SHIFT (0x0000000Eu)
  28934. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_206_RESETVAL (0x00000000u)
  28935. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_207_MASK (0x00008000u)
  28936. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_207_SHIFT (0x0000000Fu)
  28937. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_207_RESETVAL (0x00000000u)
  28938. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_208_MASK (0x00010000u)
  28939. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_208_SHIFT (0x00000010u)
  28940. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_208_RESETVAL (0x00000000u)
  28941. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_209_MASK (0x00020000u)
  28942. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_209_SHIFT (0x00000011u)
  28943. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_209_RESETVAL (0x00000000u)
  28944. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_210_MASK (0x00040000u)
  28945. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_210_SHIFT (0x00000012u)
  28946. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_210_RESETVAL (0x00000000u)
  28947. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_211_MASK (0x00080000u)
  28948. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_211_SHIFT (0x00000013u)
  28949. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_211_RESETVAL (0x00000000u)
  28950. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_212_MASK (0x00100000u)
  28951. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_212_SHIFT (0x00000014u)
  28952. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_212_RESETVAL (0x00000000u)
  28953. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_213_MASK (0x00200000u)
  28954. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_213_SHIFT (0x00000015u)
  28955. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_213_RESETVAL (0x00000000u)
  28956. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_214_MASK (0x00400000u)
  28957. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_214_SHIFT (0x00000016u)
  28958. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_214_RESETVAL (0x00000000u)
  28959. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_215_MASK (0x00800000u)
  28960. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_215_SHIFT (0x00000017u)
  28961. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_215_RESETVAL (0x00000000u)
  28962. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_216_MASK (0x01000000u)
  28963. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_216_SHIFT (0x00000018u)
  28964. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_216_RESETVAL (0x00000000u)
  28965. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_217_MASK (0x02000000u)
  28966. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_217_SHIFT (0x00000019u)
  28967. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_217_RESETVAL (0x00000000u)
  28968. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_218_MASK (0x04000000u)
  28969. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_218_SHIFT (0x0000001Au)
  28970. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_218_RESETVAL (0x00000000u)
  28971. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_219_MASK (0x08000000u)
  28972. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_219_SHIFT (0x0000001Bu)
  28973. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_219_RESETVAL (0x00000000u)
  28974. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_220_MASK (0x10000000u)
  28975. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_220_SHIFT (0x0000001Cu)
  28976. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_220_RESETVAL (0x00000000u)
  28977. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_221_MASK (0x20000000u)
  28978. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_221_SHIFT (0x0000001Du)
  28979. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_221_RESETVAL (0x00000000u)
  28980. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_222_MASK (0x40000000u)
  28981. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_222_SHIFT (0x0000001Eu)
  28982. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_222_RESETVAL (0x00000000u)
  28983. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_223_MASK (0x80000000u)
  28984. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_223_SHIFT (0x0000001Fu)
  28985. #define CSL_CPINTC_SECURE_ENABLE_REG6_SECURE_ENABLE_223_RESETVAL (0x00000000u)
  28986. #define CSL_CPINTC_SECURE_ENABLE_REG6_RESETVAL (0x00000000u)
  28987. /* secure_enable_reg7 */
  28988. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_224_MASK (0x00000001u)
  28989. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_224_SHIFT (0x00000000u)
  28990. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_224_RESETVAL (0x00000000u)
  28991. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_225_MASK (0x00000002u)
  28992. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_225_SHIFT (0x00000001u)
  28993. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_225_RESETVAL (0x00000000u)
  28994. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_226_MASK (0x00000004u)
  28995. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_226_SHIFT (0x00000002u)
  28996. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_226_RESETVAL (0x00000000u)
  28997. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_227_MASK (0x00000008u)
  28998. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_227_SHIFT (0x00000003u)
  28999. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_227_RESETVAL (0x00000000u)
  29000. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_228_MASK (0x00000010u)
  29001. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_228_SHIFT (0x00000004u)
  29002. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_228_RESETVAL (0x00000000u)
  29003. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_229_MASK (0x00000020u)
  29004. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_229_SHIFT (0x00000005u)
  29005. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_229_RESETVAL (0x00000000u)
  29006. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_230_MASK (0x00000040u)
  29007. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_230_SHIFT (0x00000006u)
  29008. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_230_RESETVAL (0x00000000u)
  29009. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_231_MASK (0x00000080u)
  29010. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_231_SHIFT (0x00000007u)
  29011. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_231_RESETVAL (0x00000000u)
  29012. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_232_MASK (0x00000100u)
  29013. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_232_SHIFT (0x00000008u)
  29014. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_232_RESETVAL (0x00000000u)
  29015. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_233_MASK (0x00000200u)
  29016. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_233_SHIFT (0x00000009u)
  29017. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_233_RESETVAL (0x00000000u)
  29018. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_234_MASK (0x00000400u)
  29019. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_234_SHIFT (0x0000000Au)
  29020. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_234_RESETVAL (0x00000000u)
  29021. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_235_MASK (0x00000800u)
  29022. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_235_SHIFT (0x0000000Bu)
  29023. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_235_RESETVAL (0x00000000u)
  29024. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_236_MASK (0x00001000u)
  29025. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_236_SHIFT (0x0000000Cu)
  29026. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_236_RESETVAL (0x00000000u)
  29027. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_237_MASK (0x00002000u)
  29028. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_237_SHIFT (0x0000000Du)
  29029. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_237_RESETVAL (0x00000000u)
  29030. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_238_MASK (0x00004000u)
  29031. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_238_SHIFT (0x0000000Eu)
  29032. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_238_RESETVAL (0x00000000u)
  29033. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_239_MASK (0x00008000u)
  29034. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_239_SHIFT (0x0000000Fu)
  29035. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_239_RESETVAL (0x00000000u)
  29036. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_240_MASK (0x00010000u)
  29037. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_240_SHIFT (0x00000010u)
  29038. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_240_RESETVAL (0x00000000u)
  29039. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_241_MASK (0x00020000u)
  29040. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_241_SHIFT (0x00000011u)
  29041. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_241_RESETVAL (0x00000000u)
  29042. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_242_MASK (0x00040000u)
  29043. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_242_SHIFT (0x00000012u)
  29044. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_242_RESETVAL (0x00000000u)
  29045. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_243_MASK (0x00080000u)
  29046. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_243_SHIFT (0x00000013u)
  29047. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_243_RESETVAL (0x00000000u)
  29048. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_244_MASK (0x00100000u)
  29049. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_244_SHIFT (0x00000014u)
  29050. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_244_RESETVAL (0x00000000u)
  29051. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_245_MASK (0x00200000u)
  29052. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_245_SHIFT (0x00000015u)
  29053. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_245_RESETVAL (0x00000000u)
  29054. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_246_MASK (0x00400000u)
  29055. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_246_SHIFT (0x00000016u)
  29056. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_246_RESETVAL (0x00000000u)
  29057. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_247_MASK (0x00800000u)
  29058. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_247_SHIFT (0x00000017u)
  29059. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_247_RESETVAL (0x00000000u)
  29060. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_248_MASK (0x01000000u)
  29061. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_248_SHIFT (0x00000018u)
  29062. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_248_RESETVAL (0x00000000u)
  29063. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_249_MASK (0x02000000u)
  29064. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_249_SHIFT (0x00000019u)
  29065. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_249_RESETVAL (0x00000000u)
  29066. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_250_MASK (0x04000000u)
  29067. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_250_SHIFT (0x0000001Au)
  29068. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_250_RESETVAL (0x00000000u)
  29069. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_251_MASK (0x08000000u)
  29070. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_251_SHIFT (0x0000001Bu)
  29071. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_251_RESETVAL (0x00000000u)
  29072. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_252_MASK (0x10000000u)
  29073. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_252_SHIFT (0x0000001Cu)
  29074. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_252_RESETVAL (0x00000000u)
  29075. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_253_MASK (0x20000000u)
  29076. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_253_SHIFT (0x0000001Du)
  29077. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_253_RESETVAL (0x00000000u)
  29078. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_254_MASK (0x40000000u)
  29079. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_254_SHIFT (0x0000001Eu)
  29080. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_254_RESETVAL (0x00000000u)
  29081. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_255_MASK (0x80000000u)
  29082. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_255_SHIFT (0x0000001Fu)
  29083. #define CSL_CPINTC_SECURE_ENABLE_REG7_SECURE_ENABLE_255_RESETVAL (0x00000000u)
  29084. #define CSL_CPINTC_SECURE_ENABLE_REG7_RESETVAL (0x00000000u)
  29085. /* secure_enable_reg8 */
  29086. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_256_MASK (0x00000001u)
  29087. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_256_SHIFT (0x00000000u)
  29088. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_256_RESETVAL (0x00000000u)
  29089. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_257_MASK (0x00000002u)
  29090. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_257_SHIFT (0x00000001u)
  29091. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_257_RESETVAL (0x00000000u)
  29092. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_258_MASK (0x00000004u)
  29093. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_258_SHIFT (0x00000002u)
  29094. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_258_RESETVAL (0x00000000u)
  29095. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_259_MASK (0x00000008u)
  29096. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_259_SHIFT (0x00000003u)
  29097. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_259_RESETVAL (0x00000000u)
  29098. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_260_MASK (0x00000010u)
  29099. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_260_SHIFT (0x00000004u)
  29100. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_260_RESETVAL (0x00000000u)
  29101. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_261_MASK (0x00000020u)
  29102. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_261_SHIFT (0x00000005u)
  29103. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_261_RESETVAL (0x00000000u)
  29104. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_262_MASK (0x00000040u)
  29105. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_262_SHIFT (0x00000006u)
  29106. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_262_RESETVAL (0x00000000u)
  29107. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_263_MASK (0x00000080u)
  29108. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_263_SHIFT (0x00000007u)
  29109. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_263_RESETVAL (0x00000000u)
  29110. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_264_MASK (0x00000100u)
  29111. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_264_SHIFT (0x00000008u)
  29112. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_264_RESETVAL (0x00000000u)
  29113. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_265_MASK (0x00000200u)
  29114. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_265_SHIFT (0x00000009u)
  29115. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_265_RESETVAL (0x00000000u)
  29116. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_266_MASK (0x00000400u)
  29117. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_266_SHIFT (0x0000000Au)
  29118. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_266_RESETVAL (0x00000000u)
  29119. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_267_MASK (0x00000800u)
  29120. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_267_SHIFT (0x0000000Bu)
  29121. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_267_RESETVAL (0x00000000u)
  29122. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_268_MASK (0x00001000u)
  29123. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_268_SHIFT (0x0000000Cu)
  29124. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_268_RESETVAL (0x00000000u)
  29125. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_269_MASK (0x00002000u)
  29126. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_269_SHIFT (0x0000000Du)
  29127. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_269_RESETVAL (0x00000000u)
  29128. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_270_MASK (0x00004000u)
  29129. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_270_SHIFT (0x0000000Eu)
  29130. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_270_RESETVAL (0x00000000u)
  29131. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_271_MASK (0x00008000u)
  29132. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_271_SHIFT (0x0000000Fu)
  29133. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_271_RESETVAL (0x00000000u)
  29134. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_272_MASK (0x00010000u)
  29135. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_272_SHIFT (0x00000010u)
  29136. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_272_RESETVAL (0x00000000u)
  29137. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_273_MASK (0x00020000u)
  29138. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_273_SHIFT (0x00000011u)
  29139. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_273_RESETVAL (0x00000000u)
  29140. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_274_MASK (0x00040000u)
  29141. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_274_SHIFT (0x00000012u)
  29142. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_274_RESETVAL (0x00000000u)
  29143. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_275_MASK (0x00080000u)
  29144. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_275_SHIFT (0x00000013u)
  29145. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_275_RESETVAL (0x00000000u)
  29146. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_276_MASK (0x00100000u)
  29147. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_276_SHIFT (0x00000014u)
  29148. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_276_RESETVAL (0x00000000u)
  29149. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_277_MASK (0x00200000u)
  29150. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_277_SHIFT (0x00000015u)
  29151. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_277_RESETVAL (0x00000000u)
  29152. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_278_MASK (0x00400000u)
  29153. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_278_SHIFT (0x00000016u)
  29154. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_278_RESETVAL (0x00000000u)
  29155. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_279_MASK (0x00800000u)
  29156. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_279_SHIFT (0x00000017u)
  29157. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_279_RESETVAL (0x00000000u)
  29158. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_280_MASK (0x01000000u)
  29159. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_280_SHIFT (0x00000018u)
  29160. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_280_RESETVAL (0x00000000u)
  29161. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_281_MASK (0x02000000u)
  29162. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_281_SHIFT (0x00000019u)
  29163. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_281_RESETVAL (0x00000000u)
  29164. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_282_MASK (0x04000000u)
  29165. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_282_SHIFT (0x0000001Au)
  29166. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_282_RESETVAL (0x00000000u)
  29167. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_283_MASK (0x08000000u)
  29168. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_283_SHIFT (0x0000001Bu)
  29169. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_283_RESETVAL (0x00000000u)
  29170. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_284_MASK (0x10000000u)
  29171. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_284_SHIFT (0x0000001Cu)
  29172. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_284_RESETVAL (0x00000000u)
  29173. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_285_MASK (0x20000000u)
  29174. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_285_SHIFT (0x0000001Du)
  29175. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_285_RESETVAL (0x00000000u)
  29176. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_286_MASK (0x40000000u)
  29177. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_286_SHIFT (0x0000001Eu)
  29178. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_286_RESETVAL (0x00000000u)
  29179. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_287_MASK (0x80000000u)
  29180. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_287_SHIFT (0x0000001Fu)
  29181. #define CSL_CPINTC_SECURE_ENABLE_REG8_SECURE_ENABLE_287_RESETVAL (0x00000000u)
  29182. #define CSL_CPINTC_SECURE_ENABLE_REG8_RESETVAL (0x00000000u)
  29183. /* secure_enable_reg9 */
  29184. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_288_MASK (0x00000001u)
  29185. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_288_SHIFT (0x00000000u)
  29186. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_288_RESETVAL (0x00000000u)
  29187. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_289_MASK (0x00000002u)
  29188. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_289_SHIFT (0x00000001u)
  29189. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_289_RESETVAL (0x00000000u)
  29190. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_290_MASK (0x00000004u)
  29191. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_290_SHIFT (0x00000002u)
  29192. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_290_RESETVAL (0x00000000u)
  29193. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_291_MASK (0x00000008u)
  29194. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_291_SHIFT (0x00000003u)
  29195. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_291_RESETVAL (0x00000000u)
  29196. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_292_MASK (0x00000010u)
  29197. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_292_SHIFT (0x00000004u)
  29198. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_292_RESETVAL (0x00000000u)
  29199. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_293_MASK (0x00000020u)
  29200. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_293_SHIFT (0x00000005u)
  29201. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_293_RESETVAL (0x00000000u)
  29202. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_294_MASK (0x00000040u)
  29203. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_294_SHIFT (0x00000006u)
  29204. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_294_RESETVAL (0x00000000u)
  29205. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_295_MASK (0x00000080u)
  29206. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_295_SHIFT (0x00000007u)
  29207. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_295_RESETVAL (0x00000000u)
  29208. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_296_MASK (0x00000100u)
  29209. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_296_SHIFT (0x00000008u)
  29210. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_296_RESETVAL (0x00000000u)
  29211. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_297_MASK (0x00000200u)
  29212. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_297_SHIFT (0x00000009u)
  29213. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_297_RESETVAL (0x00000000u)
  29214. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_298_MASK (0x00000400u)
  29215. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_298_SHIFT (0x0000000Au)
  29216. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_298_RESETVAL (0x00000000u)
  29217. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_299_MASK (0x00000800u)
  29218. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_299_SHIFT (0x0000000Bu)
  29219. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_299_RESETVAL (0x00000000u)
  29220. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_300_MASK (0x00001000u)
  29221. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_300_SHIFT (0x0000000Cu)
  29222. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_300_RESETVAL (0x00000000u)
  29223. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_301_MASK (0x00002000u)
  29224. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_301_SHIFT (0x0000000Du)
  29225. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_301_RESETVAL (0x00000000u)
  29226. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_302_MASK (0x00004000u)
  29227. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_302_SHIFT (0x0000000Eu)
  29228. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_302_RESETVAL (0x00000000u)
  29229. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_303_MASK (0x00008000u)
  29230. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_303_SHIFT (0x0000000Fu)
  29231. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_303_RESETVAL (0x00000000u)
  29232. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_304_MASK (0x00010000u)
  29233. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_304_SHIFT (0x00000010u)
  29234. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_304_RESETVAL (0x00000000u)
  29235. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_305_MASK (0x00020000u)
  29236. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_305_SHIFT (0x00000011u)
  29237. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_305_RESETVAL (0x00000000u)
  29238. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_306_MASK (0x00040000u)
  29239. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_306_SHIFT (0x00000012u)
  29240. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_306_RESETVAL (0x00000000u)
  29241. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_307_MASK (0x00080000u)
  29242. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_307_SHIFT (0x00000013u)
  29243. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_307_RESETVAL (0x00000000u)
  29244. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_308_MASK (0x00100000u)
  29245. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_308_SHIFT (0x00000014u)
  29246. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_308_RESETVAL (0x00000000u)
  29247. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_309_MASK (0x00200000u)
  29248. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_309_SHIFT (0x00000015u)
  29249. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_309_RESETVAL (0x00000000u)
  29250. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_310_MASK (0x00400000u)
  29251. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_310_SHIFT (0x00000016u)
  29252. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_310_RESETVAL (0x00000000u)
  29253. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_311_MASK (0x00800000u)
  29254. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_311_SHIFT (0x00000017u)
  29255. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_311_RESETVAL (0x00000000u)
  29256. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_312_MASK (0x01000000u)
  29257. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_312_SHIFT (0x00000018u)
  29258. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_312_RESETVAL (0x00000000u)
  29259. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_313_MASK (0x02000000u)
  29260. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_313_SHIFT (0x00000019u)
  29261. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_313_RESETVAL (0x00000000u)
  29262. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_314_MASK (0x04000000u)
  29263. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_314_SHIFT (0x0000001Au)
  29264. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_314_RESETVAL (0x00000000u)
  29265. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_315_MASK (0x08000000u)
  29266. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_315_SHIFT (0x0000001Bu)
  29267. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_315_RESETVAL (0x00000000u)
  29268. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_316_MASK (0x10000000u)
  29269. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_316_SHIFT (0x0000001Cu)
  29270. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_316_RESETVAL (0x00000000u)
  29271. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_317_MASK (0x20000000u)
  29272. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_317_SHIFT (0x0000001Du)
  29273. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_317_RESETVAL (0x00000000u)
  29274. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_318_MASK (0x40000000u)
  29275. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_318_SHIFT (0x0000001Eu)
  29276. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_318_RESETVAL (0x00000000u)
  29277. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_319_MASK (0x80000000u)
  29278. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_319_SHIFT (0x0000001Fu)
  29279. #define CSL_CPINTC_SECURE_ENABLE_REG9_SECURE_ENABLE_319_RESETVAL (0x00000000u)
  29280. #define CSL_CPINTC_SECURE_ENABLE_REG9_RESETVAL (0x00000000u)
  29281. /* secure_enable_reg10 */
  29282. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_320_MASK (0x00000001u)
  29283. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_320_SHIFT (0x00000000u)
  29284. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_320_RESETVAL (0x00000000u)
  29285. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_321_MASK (0x00000002u)
  29286. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_321_SHIFT (0x00000001u)
  29287. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_321_RESETVAL (0x00000000u)
  29288. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_322_MASK (0x00000004u)
  29289. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_322_SHIFT (0x00000002u)
  29290. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_322_RESETVAL (0x00000000u)
  29291. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_323_MASK (0x00000008u)
  29292. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_323_SHIFT (0x00000003u)
  29293. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_323_RESETVAL (0x00000000u)
  29294. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_324_MASK (0x00000010u)
  29295. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_324_SHIFT (0x00000004u)
  29296. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_324_RESETVAL (0x00000000u)
  29297. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_325_MASK (0x00000020u)
  29298. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_325_SHIFT (0x00000005u)
  29299. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_325_RESETVAL (0x00000000u)
  29300. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_326_MASK (0x00000040u)
  29301. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_326_SHIFT (0x00000006u)
  29302. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_326_RESETVAL (0x00000000u)
  29303. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_327_MASK (0x00000080u)
  29304. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_327_SHIFT (0x00000007u)
  29305. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_327_RESETVAL (0x00000000u)
  29306. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_328_MASK (0x00000100u)
  29307. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_328_SHIFT (0x00000008u)
  29308. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_328_RESETVAL (0x00000000u)
  29309. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_329_MASK (0x00000200u)
  29310. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_329_SHIFT (0x00000009u)
  29311. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_329_RESETVAL (0x00000000u)
  29312. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_330_MASK (0x00000400u)
  29313. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_330_SHIFT (0x0000000Au)
  29314. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_330_RESETVAL (0x00000000u)
  29315. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_331_MASK (0x00000800u)
  29316. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_331_SHIFT (0x0000000Bu)
  29317. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_331_RESETVAL (0x00000000u)
  29318. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_332_MASK (0x00001000u)
  29319. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_332_SHIFT (0x0000000Cu)
  29320. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_332_RESETVAL (0x00000000u)
  29321. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_333_MASK (0x00002000u)
  29322. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_333_SHIFT (0x0000000Du)
  29323. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_333_RESETVAL (0x00000000u)
  29324. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_334_MASK (0x00004000u)
  29325. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_334_SHIFT (0x0000000Eu)
  29326. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_334_RESETVAL (0x00000000u)
  29327. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_335_MASK (0x00008000u)
  29328. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_335_SHIFT (0x0000000Fu)
  29329. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_335_RESETVAL (0x00000000u)
  29330. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_336_MASK (0x00010000u)
  29331. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_336_SHIFT (0x00000010u)
  29332. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_336_RESETVAL (0x00000000u)
  29333. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_337_MASK (0x00020000u)
  29334. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_337_SHIFT (0x00000011u)
  29335. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_337_RESETVAL (0x00000000u)
  29336. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_338_MASK (0x00040000u)
  29337. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_338_SHIFT (0x00000012u)
  29338. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_338_RESETVAL (0x00000000u)
  29339. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_339_MASK (0x00080000u)
  29340. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_339_SHIFT (0x00000013u)
  29341. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_339_RESETVAL (0x00000000u)
  29342. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_340_MASK (0x00100000u)
  29343. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_340_SHIFT (0x00000014u)
  29344. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_340_RESETVAL (0x00000000u)
  29345. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_341_MASK (0x00200000u)
  29346. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_341_SHIFT (0x00000015u)
  29347. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_341_RESETVAL (0x00000000u)
  29348. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_342_MASK (0x00400000u)
  29349. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_342_SHIFT (0x00000016u)
  29350. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_342_RESETVAL (0x00000000u)
  29351. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_343_MASK (0x00800000u)
  29352. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_343_SHIFT (0x00000017u)
  29353. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_343_RESETVAL (0x00000000u)
  29354. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_344_MASK (0x01000000u)
  29355. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_344_SHIFT (0x00000018u)
  29356. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_344_RESETVAL (0x00000000u)
  29357. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_345_MASK (0x02000000u)
  29358. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_345_SHIFT (0x00000019u)
  29359. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_345_RESETVAL (0x00000000u)
  29360. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_346_MASK (0x04000000u)
  29361. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_346_SHIFT (0x0000001Au)
  29362. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_346_RESETVAL (0x00000000u)
  29363. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_347_MASK (0x08000000u)
  29364. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_347_SHIFT (0x0000001Bu)
  29365. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_347_RESETVAL (0x00000000u)
  29366. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_348_MASK (0x10000000u)
  29367. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_348_SHIFT (0x0000001Cu)
  29368. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_348_RESETVAL (0x00000000u)
  29369. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_349_MASK (0x20000000u)
  29370. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_349_SHIFT (0x0000001Du)
  29371. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_349_RESETVAL (0x00000000u)
  29372. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_350_MASK (0x40000000u)
  29373. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_350_SHIFT (0x0000001Eu)
  29374. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_350_RESETVAL (0x00000000u)
  29375. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_351_MASK (0x80000000u)
  29376. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_351_SHIFT (0x0000001Fu)
  29377. #define CSL_CPINTC_SECURE_ENABLE_REG10_SECURE_ENABLE_351_RESETVAL (0x00000000u)
  29378. #define CSL_CPINTC_SECURE_ENABLE_REG10_RESETVAL (0x00000000u)
  29379. /* secure_enable_reg11 */
  29380. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_352_MASK (0x00000001u)
  29381. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_352_SHIFT (0x00000000u)
  29382. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_352_RESETVAL (0x00000000u)
  29383. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_353_MASK (0x00000002u)
  29384. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_353_SHIFT (0x00000001u)
  29385. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_353_RESETVAL (0x00000000u)
  29386. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_354_MASK (0x00000004u)
  29387. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_354_SHIFT (0x00000002u)
  29388. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_354_RESETVAL (0x00000000u)
  29389. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_355_MASK (0x00000008u)
  29390. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_355_SHIFT (0x00000003u)
  29391. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_355_RESETVAL (0x00000000u)
  29392. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_356_MASK (0x00000010u)
  29393. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_356_SHIFT (0x00000004u)
  29394. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_356_RESETVAL (0x00000000u)
  29395. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_357_MASK (0x00000020u)
  29396. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_357_SHIFT (0x00000005u)
  29397. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_357_RESETVAL (0x00000000u)
  29398. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_358_MASK (0x00000040u)
  29399. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_358_SHIFT (0x00000006u)
  29400. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_358_RESETVAL (0x00000000u)
  29401. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_359_MASK (0x00000080u)
  29402. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_359_SHIFT (0x00000007u)
  29403. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_359_RESETVAL (0x00000000u)
  29404. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_360_MASK (0x00000100u)
  29405. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_360_SHIFT (0x00000008u)
  29406. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_360_RESETVAL (0x00000000u)
  29407. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_361_MASK (0x00000200u)
  29408. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_361_SHIFT (0x00000009u)
  29409. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_361_RESETVAL (0x00000000u)
  29410. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_362_MASK (0x00000400u)
  29411. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_362_SHIFT (0x0000000Au)
  29412. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_362_RESETVAL (0x00000000u)
  29413. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_363_MASK (0x00000800u)
  29414. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_363_SHIFT (0x0000000Bu)
  29415. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_363_RESETVAL (0x00000000u)
  29416. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_364_MASK (0x00001000u)
  29417. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_364_SHIFT (0x0000000Cu)
  29418. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_364_RESETVAL (0x00000000u)
  29419. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_365_MASK (0x00002000u)
  29420. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_365_SHIFT (0x0000000Du)
  29421. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_365_RESETVAL (0x00000000u)
  29422. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_366_MASK (0x00004000u)
  29423. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_366_SHIFT (0x0000000Eu)
  29424. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_366_RESETVAL (0x00000000u)
  29425. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_367_MASK (0x00008000u)
  29426. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_367_SHIFT (0x0000000Fu)
  29427. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_367_RESETVAL (0x00000000u)
  29428. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_368_MASK (0x00010000u)
  29429. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_368_SHIFT (0x00000010u)
  29430. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_368_RESETVAL (0x00000000u)
  29431. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_369_MASK (0x00020000u)
  29432. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_369_SHIFT (0x00000011u)
  29433. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_369_RESETVAL (0x00000000u)
  29434. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_370_MASK (0x00040000u)
  29435. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_370_SHIFT (0x00000012u)
  29436. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_370_RESETVAL (0x00000000u)
  29437. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_371_MASK (0x00080000u)
  29438. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_371_SHIFT (0x00000013u)
  29439. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_371_RESETVAL (0x00000000u)
  29440. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_372_MASK (0x00100000u)
  29441. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_372_SHIFT (0x00000014u)
  29442. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_372_RESETVAL (0x00000000u)
  29443. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_373_MASK (0x00200000u)
  29444. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_373_SHIFT (0x00000015u)
  29445. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_373_RESETVAL (0x00000000u)
  29446. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_374_MASK (0x00400000u)
  29447. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_374_SHIFT (0x00000016u)
  29448. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_374_RESETVAL (0x00000000u)
  29449. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_375_MASK (0x00800000u)
  29450. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_375_SHIFT (0x00000017u)
  29451. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_375_RESETVAL (0x00000000u)
  29452. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_376_MASK (0x01000000u)
  29453. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_376_SHIFT (0x00000018u)
  29454. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_376_RESETVAL (0x00000000u)
  29455. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_377_MASK (0x02000000u)
  29456. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_377_SHIFT (0x00000019u)
  29457. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_377_RESETVAL (0x00000000u)
  29458. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_378_MASK (0x04000000u)
  29459. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_378_SHIFT (0x0000001Au)
  29460. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_378_RESETVAL (0x00000000u)
  29461. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_379_MASK (0x08000000u)
  29462. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_379_SHIFT (0x0000001Bu)
  29463. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_379_RESETVAL (0x00000000u)
  29464. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_380_MASK (0x10000000u)
  29465. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_380_SHIFT (0x0000001Cu)
  29466. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_380_RESETVAL (0x00000000u)
  29467. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_381_MASK (0x20000000u)
  29468. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_381_SHIFT (0x0000001Du)
  29469. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_381_RESETVAL (0x00000000u)
  29470. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_382_MASK (0x40000000u)
  29471. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_382_SHIFT (0x0000001Eu)
  29472. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_382_RESETVAL (0x00000000u)
  29473. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_383_MASK (0x80000000u)
  29474. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_383_SHIFT (0x0000001Fu)
  29475. #define CSL_CPINTC_SECURE_ENABLE_REG11_SECURE_ENABLE_383_RESETVAL (0x00000000u)
  29476. #define CSL_CPINTC_SECURE_ENABLE_REG11_RESETVAL (0x00000000u)
  29477. /* secure_enable_reg12 */
  29478. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_384_MASK (0x00000001u)
  29479. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_384_SHIFT (0x00000000u)
  29480. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_384_RESETVAL (0x00000000u)
  29481. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_385_MASK (0x00000002u)
  29482. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_385_SHIFT (0x00000001u)
  29483. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_385_RESETVAL (0x00000000u)
  29484. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_386_MASK (0x00000004u)
  29485. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_386_SHIFT (0x00000002u)
  29486. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_386_RESETVAL (0x00000000u)
  29487. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_387_MASK (0x00000008u)
  29488. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_387_SHIFT (0x00000003u)
  29489. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_387_RESETVAL (0x00000000u)
  29490. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_388_MASK (0x00000010u)
  29491. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_388_SHIFT (0x00000004u)
  29492. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_388_RESETVAL (0x00000000u)
  29493. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_389_MASK (0x00000020u)
  29494. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_389_SHIFT (0x00000005u)
  29495. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_389_RESETVAL (0x00000000u)
  29496. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_390_MASK (0x00000040u)
  29497. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_390_SHIFT (0x00000006u)
  29498. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_390_RESETVAL (0x00000000u)
  29499. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_391_MASK (0x00000080u)
  29500. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_391_SHIFT (0x00000007u)
  29501. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_391_RESETVAL (0x00000000u)
  29502. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_392_MASK (0x00000100u)
  29503. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_392_SHIFT (0x00000008u)
  29504. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_392_RESETVAL (0x00000000u)
  29505. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_393_MASK (0x00000200u)
  29506. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_393_SHIFT (0x00000009u)
  29507. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_393_RESETVAL (0x00000000u)
  29508. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_394_MASK (0x00000400u)
  29509. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_394_SHIFT (0x0000000Au)
  29510. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_394_RESETVAL (0x00000000u)
  29511. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_395_MASK (0x00000800u)
  29512. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_395_SHIFT (0x0000000Bu)
  29513. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_395_RESETVAL (0x00000000u)
  29514. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_396_MASK (0x00001000u)
  29515. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_396_SHIFT (0x0000000Cu)
  29516. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_396_RESETVAL (0x00000000u)
  29517. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_397_MASK (0x00002000u)
  29518. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_397_SHIFT (0x0000000Du)
  29519. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_397_RESETVAL (0x00000000u)
  29520. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_398_MASK (0x00004000u)
  29521. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_398_SHIFT (0x0000000Eu)
  29522. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_398_RESETVAL (0x00000000u)
  29523. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_399_MASK (0x00008000u)
  29524. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_399_SHIFT (0x0000000Fu)
  29525. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_399_RESETVAL (0x00000000u)
  29526. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_400_MASK (0x00010000u)
  29527. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_400_SHIFT (0x00000010u)
  29528. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_400_RESETVAL (0x00000000u)
  29529. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_401_MASK (0x00020000u)
  29530. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_401_SHIFT (0x00000011u)
  29531. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_401_RESETVAL (0x00000000u)
  29532. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_402_MASK (0x00040000u)
  29533. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_402_SHIFT (0x00000012u)
  29534. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_402_RESETVAL (0x00000000u)
  29535. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_403_MASK (0x00080000u)
  29536. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_403_SHIFT (0x00000013u)
  29537. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_403_RESETVAL (0x00000000u)
  29538. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_404_MASK (0x00100000u)
  29539. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_404_SHIFT (0x00000014u)
  29540. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_404_RESETVAL (0x00000000u)
  29541. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_405_MASK (0x00200000u)
  29542. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_405_SHIFT (0x00000015u)
  29543. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_405_RESETVAL (0x00000000u)
  29544. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_406_MASK (0x00400000u)
  29545. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_406_SHIFT (0x00000016u)
  29546. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_406_RESETVAL (0x00000000u)
  29547. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_407_MASK (0x00800000u)
  29548. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_407_SHIFT (0x00000017u)
  29549. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_407_RESETVAL (0x00000000u)
  29550. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_408_MASK (0x01000000u)
  29551. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_408_SHIFT (0x00000018u)
  29552. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_408_RESETVAL (0x00000000u)
  29553. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_409_MASK (0x02000000u)
  29554. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_409_SHIFT (0x00000019u)
  29555. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_409_RESETVAL (0x00000000u)
  29556. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_410_MASK (0x04000000u)
  29557. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_410_SHIFT (0x0000001Au)
  29558. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_410_RESETVAL (0x00000000u)
  29559. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_411_MASK (0x08000000u)
  29560. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_411_SHIFT (0x0000001Bu)
  29561. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_411_RESETVAL (0x00000000u)
  29562. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_412_MASK (0x10000000u)
  29563. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_412_SHIFT (0x0000001Cu)
  29564. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_412_RESETVAL (0x00000000u)
  29565. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_413_MASK (0x20000000u)
  29566. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_413_SHIFT (0x0000001Du)
  29567. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_413_RESETVAL (0x00000000u)
  29568. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_414_MASK (0x40000000u)
  29569. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_414_SHIFT (0x0000001Eu)
  29570. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_414_RESETVAL (0x00000000u)
  29571. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_415_MASK (0x80000000u)
  29572. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_415_SHIFT (0x0000001Fu)
  29573. #define CSL_CPINTC_SECURE_ENABLE_REG12_SECURE_ENABLE_415_RESETVAL (0x00000000u)
  29574. #define CSL_CPINTC_SECURE_ENABLE_REG12_RESETVAL (0x00000000u)
  29575. /* secure_enable_reg13 */
  29576. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_416_MASK (0x00000001u)
  29577. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_416_SHIFT (0x00000000u)
  29578. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_416_RESETVAL (0x00000000u)
  29579. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_417_MASK (0x00000002u)
  29580. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_417_SHIFT (0x00000001u)
  29581. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_417_RESETVAL (0x00000000u)
  29582. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_418_MASK (0x00000004u)
  29583. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_418_SHIFT (0x00000002u)
  29584. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_418_RESETVAL (0x00000000u)
  29585. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_419_MASK (0x00000008u)
  29586. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_419_SHIFT (0x00000003u)
  29587. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_419_RESETVAL (0x00000000u)
  29588. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_420_MASK (0x00000010u)
  29589. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_420_SHIFT (0x00000004u)
  29590. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_420_RESETVAL (0x00000000u)
  29591. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_421_MASK (0x00000020u)
  29592. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_421_SHIFT (0x00000005u)
  29593. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_421_RESETVAL (0x00000000u)
  29594. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_422_MASK (0x00000040u)
  29595. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_422_SHIFT (0x00000006u)
  29596. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_422_RESETVAL (0x00000000u)
  29597. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_423_MASK (0x00000080u)
  29598. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_423_SHIFT (0x00000007u)
  29599. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_423_RESETVAL (0x00000000u)
  29600. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_424_MASK (0x00000100u)
  29601. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_424_SHIFT (0x00000008u)
  29602. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_424_RESETVAL (0x00000000u)
  29603. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_425_MASK (0x00000200u)
  29604. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_425_SHIFT (0x00000009u)
  29605. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_425_RESETVAL (0x00000000u)
  29606. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_426_MASK (0x00000400u)
  29607. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_426_SHIFT (0x0000000Au)
  29608. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_426_RESETVAL (0x00000000u)
  29609. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_427_MASK (0x00000800u)
  29610. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_427_SHIFT (0x0000000Bu)
  29611. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_427_RESETVAL (0x00000000u)
  29612. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_428_MASK (0x00001000u)
  29613. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_428_SHIFT (0x0000000Cu)
  29614. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_428_RESETVAL (0x00000000u)
  29615. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_429_MASK (0x00002000u)
  29616. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_429_SHIFT (0x0000000Du)
  29617. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_429_RESETVAL (0x00000000u)
  29618. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_430_MASK (0x00004000u)
  29619. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_430_SHIFT (0x0000000Eu)
  29620. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_430_RESETVAL (0x00000000u)
  29621. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_431_MASK (0x00008000u)
  29622. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_431_SHIFT (0x0000000Fu)
  29623. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_431_RESETVAL (0x00000000u)
  29624. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_432_MASK (0x00010000u)
  29625. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_432_SHIFT (0x00000010u)
  29626. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_432_RESETVAL (0x00000000u)
  29627. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_433_MASK (0x00020000u)
  29628. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_433_SHIFT (0x00000011u)
  29629. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_433_RESETVAL (0x00000000u)
  29630. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_434_MASK (0x00040000u)
  29631. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_434_SHIFT (0x00000012u)
  29632. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_434_RESETVAL (0x00000000u)
  29633. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_435_MASK (0x00080000u)
  29634. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_435_SHIFT (0x00000013u)
  29635. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_435_RESETVAL (0x00000000u)
  29636. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_436_MASK (0x00100000u)
  29637. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_436_SHIFT (0x00000014u)
  29638. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_436_RESETVAL (0x00000000u)
  29639. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_437_MASK (0x00200000u)
  29640. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_437_SHIFT (0x00000015u)
  29641. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_437_RESETVAL (0x00000000u)
  29642. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_438_MASK (0x00400000u)
  29643. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_438_SHIFT (0x00000016u)
  29644. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_438_RESETVAL (0x00000000u)
  29645. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_439_MASK (0x00800000u)
  29646. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_439_SHIFT (0x00000017u)
  29647. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_439_RESETVAL (0x00000000u)
  29648. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_440_MASK (0x01000000u)
  29649. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_440_SHIFT (0x00000018u)
  29650. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_440_RESETVAL (0x00000000u)
  29651. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_441_MASK (0x02000000u)
  29652. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_441_SHIFT (0x00000019u)
  29653. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_441_RESETVAL (0x00000000u)
  29654. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_442_MASK (0x04000000u)
  29655. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_442_SHIFT (0x0000001Au)
  29656. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_442_RESETVAL (0x00000000u)
  29657. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_443_MASK (0x08000000u)
  29658. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_443_SHIFT (0x0000001Bu)
  29659. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_443_RESETVAL (0x00000000u)
  29660. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_444_MASK (0x10000000u)
  29661. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_444_SHIFT (0x0000001Cu)
  29662. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_444_RESETVAL (0x00000000u)
  29663. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_445_MASK (0x20000000u)
  29664. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_445_SHIFT (0x0000001Du)
  29665. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_445_RESETVAL (0x00000000u)
  29666. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_446_MASK (0x40000000u)
  29667. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_446_SHIFT (0x0000001Eu)
  29668. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_446_RESETVAL (0x00000000u)
  29669. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_447_MASK (0x80000000u)
  29670. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_447_SHIFT (0x0000001Fu)
  29671. #define CSL_CPINTC_SECURE_ENABLE_REG13_SECURE_ENABLE_447_RESETVAL (0x00000000u)
  29672. #define CSL_CPINTC_SECURE_ENABLE_REG13_RESETVAL (0x00000000u)
  29673. /* secure_enable_reg14 */
  29674. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_448_MASK (0x00000001u)
  29675. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_448_SHIFT (0x00000000u)
  29676. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_448_RESETVAL (0x00000000u)
  29677. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_449_MASK (0x00000002u)
  29678. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_449_SHIFT (0x00000001u)
  29679. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_449_RESETVAL (0x00000000u)
  29680. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_450_MASK (0x00000004u)
  29681. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_450_SHIFT (0x00000002u)
  29682. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_450_RESETVAL (0x00000000u)
  29683. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_451_MASK (0x00000008u)
  29684. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_451_SHIFT (0x00000003u)
  29685. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_451_RESETVAL (0x00000000u)
  29686. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_452_MASK (0x00000010u)
  29687. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_452_SHIFT (0x00000004u)
  29688. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_452_RESETVAL (0x00000000u)
  29689. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_453_MASK (0x00000020u)
  29690. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_453_SHIFT (0x00000005u)
  29691. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_453_RESETVAL (0x00000000u)
  29692. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_454_MASK (0x00000040u)
  29693. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_454_SHIFT (0x00000006u)
  29694. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_454_RESETVAL (0x00000000u)
  29695. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_455_MASK (0x00000080u)
  29696. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_455_SHIFT (0x00000007u)
  29697. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_455_RESETVAL (0x00000000u)
  29698. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_456_MASK (0x00000100u)
  29699. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_456_SHIFT (0x00000008u)
  29700. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_456_RESETVAL (0x00000000u)
  29701. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_457_MASK (0x00000200u)
  29702. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_457_SHIFT (0x00000009u)
  29703. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_457_RESETVAL (0x00000000u)
  29704. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_458_MASK (0x00000400u)
  29705. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_458_SHIFT (0x0000000Au)
  29706. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_458_RESETVAL (0x00000000u)
  29707. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_459_MASK (0x00000800u)
  29708. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_459_SHIFT (0x0000000Bu)
  29709. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_459_RESETVAL (0x00000000u)
  29710. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_460_MASK (0x00001000u)
  29711. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_460_SHIFT (0x0000000Cu)
  29712. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_460_RESETVAL (0x00000000u)
  29713. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_461_MASK (0x00002000u)
  29714. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_461_SHIFT (0x0000000Du)
  29715. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_461_RESETVAL (0x00000000u)
  29716. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_462_MASK (0x00004000u)
  29717. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_462_SHIFT (0x0000000Eu)
  29718. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_462_RESETVAL (0x00000000u)
  29719. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_463_MASK (0x00008000u)
  29720. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_463_SHIFT (0x0000000Fu)
  29721. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_463_RESETVAL (0x00000000u)
  29722. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_464_MASK (0x00010000u)
  29723. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_464_SHIFT (0x00000010u)
  29724. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_464_RESETVAL (0x00000000u)
  29725. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_465_MASK (0x00020000u)
  29726. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_465_SHIFT (0x00000011u)
  29727. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_465_RESETVAL (0x00000000u)
  29728. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_466_MASK (0x00040000u)
  29729. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_466_SHIFT (0x00000012u)
  29730. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_466_RESETVAL (0x00000000u)
  29731. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_467_MASK (0x00080000u)
  29732. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_467_SHIFT (0x00000013u)
  29733. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_467_RESETVAL (0x00000000u)
  29734. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_468_MASK (0x00100000u)
  29735. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_468_SHIFT (0x00000014u)
  29736. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_468_RESETVAL (0x00000000u)
  29737. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_469_MASK (0x00200000u)
  29738. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_469_SHIFT (0x00000015u)
  29739. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_469_RESETVAL (0x00000000u)
  29740. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_470_MASK (0x00400000u)
  29741. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_470_SHIFT (0x00000016u)
  29742. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_470_RESETVAL (0x00000000u)
  29743. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_471_MASK (0x00800000u)
  29744. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_471_SHIFT (0x00000017u)
  29745. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_471_RESETVAL (0x00000000u)
  29746. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_472_MASK (0x01000000u)
  29747. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_472_SHIFT (0x00000018u)
  29748. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_472_RESETVAL (0x00000000u)
  29749. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_473_MASK (0x02000000u)
  29750. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_473_SHIFT (0x00000019u)
  29751. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_473_RESETVAL (0x00000000u)
  29752. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_474_MASK (0x04000000u)
  29753. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_474_SHIFT (0x0000001Au)
  29754. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_474_RESETVAL (0x00000000u)
  29755. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_475_MASK (0x08000000u)
  29756. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_475_SHIFT (0x0000001Bu)
  29757. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_475_RESETVAL (0x00000000u)
  29758. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_476_MASK (0x10000000u)
  29759. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_476_SHIFT (0x0000001Cu)
  29760. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_476_RESETVAL (0x00000000u)
  29761. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_477_MASK (0x20000000u)
  29762. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_477_SHIFT (0x0000001Du)
  29763. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_477_RESETVAL (0x00000000u)
  29764. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_478_MASK (0x40000000u)
  29765. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_478_SHIFT (0x0000001Eu)
  29766. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_478_RESETVAL (0x00000000u)
  29767. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_479_MASK (0x80000000u)
  29768. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_479_SHIFT (0x0000001Fu)
  29769. #define CSL_CPINTC_SECURE_ENABLE_REG14_SECURE_ENABLE_479_RESETVAL (0x00000000u)
  29770. #define CSL_CPINTC_SECURE_ENABLE_REG14_RESETVAL (0x00000000u)
  29771. /* secure_enable_reg15 */
  29772. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_480_MASK (0x00000001u)
  29773. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_480_SHIFT (0x00000000u)
  29774. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_480_RESETVAL (0x00000000u)
  29775. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_481_MASK (0x00000002u)
  29776. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_481_SHIFT (0x00000001u)
  29777. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_481_RESETVAL (0x00000000u)
  29778. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_482_MASK (0x00000004u)
  29779. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_482_SHIFT (0x00000002u)
  29780. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_482_RESETVAL (0x00000000u)
  29781. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_483_MASK (0x00000008u)
  29782. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_483_SHIFT (0x00000003u)
  29783. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_483_RESETVAL (0x00000000u)
  29784. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_484_MASK (0x00000010u)
  29785. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_484_SHIFT (0x00000004u)
  29786. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_484_RESETVAL (0x00000000u)
  29787. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_485_MASK (0x00000020u)
  29788. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_485_SHIFT (0x00000005u)
  29789. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_485_RESETVAL (0x00000000u)
  29790. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_486_MASK (0x00000040u)
  29791. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_486_SHIFT (0x00000006u)
  29792. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_486_RESETVAL (0x00000000u)
  29793. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_487_MASK (0x00000080u)
  29794. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_487_SHIFT (0x00000007u)
  29795. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_487_RESETVAL (0x00000000u)
  29796. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_488_MASK (0x00000100u)
  29797. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_488_SHIFT (0x00000008u)
  29798. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_488_RESETVAL (0x00000000u)
  29799. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_489_MASK (0x00000200u)
  29800. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_489_SHIFT (0x00000009u)
  29801. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_489_RESETVAL (0x00000000u)
  29802. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_490_MASK (0x00000400u)
  29803. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_490_SHIFT (0x0000000Au)
  29804. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_490_RESETVAL (0x00000000u)
  29805. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_491_MASK (0x00000800u)
  29806. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_491_SHIFT (0x0000000Bu)
  29807. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_491_RESETVAL (0x00000000u)
  29808. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_492_MASK (0x00001000u)
  29809. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_492_SHIFT (0x0000000Cu)
  29810. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_492_RESETVAL (0x00000000u)
  29811. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_493_MASK (0x00002000u)
  29812. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_493_SHIFT (0x0000000Du)
  29813. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_493_RESETVAL (0x00000000u)
  29814. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_494_MASK (0x00004000u)
  29815. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_494_SHIFT (0x0000000Eu)
  29816. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_494_RESETVAL (0x00000000u)
  29817. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_495_MASK (0x00008000u)
  29818. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_495_SHIFT (0x0000000Fu)
  29819. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_495_RESETVAL (0x00000000u)
  29820. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_496_MASK (0x00010000u)
  29821. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_496_SHIFT (0x00000010u)
  29822. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_496_RESETVAL (0x00000000u)
  29823. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_497_MASK (0x00020000u)
  29824. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_497_SHIFT (0x00000011u)
  29825. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_497_RESETVAL (0x00000000u)
  29826. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_498_MASK (0x00040000u)
  29827. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_498_SHIFT (0x00000012u)
  29828. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_498_RESETVAL (0x00000000u)
  29829. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_499_MASK (0x00080000u)
  29830. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_499_SHIFT (0x00000013u)
  29831. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_499_RESETVAL (0x00000000u)
  29832. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_500_MASK (0x00100000u)
  29833. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_500_SHIFT (0x00000014u)
  29834. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_500_RESETVAL (0x00000000u)
  29835. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_501_MASK (0x00200000u)
  29836. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_501_SHIFT (0x00000015u)
  29837. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_501_RESETVAL (0x00000000u)
  29838. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_502_MASK (0x00400000u)
  29839. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_502_SHIFT (0x00000016u)
  29840. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_502_RESETVAL (0x00000000u)
  29841. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_503_MASK (0x00800000u)
  29842. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_503_SHIFT (0x00000017u)
  29843. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_503_RESETVAL (0x00000000u)
  29844. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_504_MASK (0x01000000u)
  29845. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_504_SHIFT (0x00000018u)
  29846. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_504_RESETVAL (0x00000000u)
  29847. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_505_MASK (0x02000000u)
  29848. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_505_SHIFT (0x00000019u)
  29849. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_505_RESETVAL (0x00000000u)
  29850. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_506_MASK (0x04000000u)
  29851. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_506_SHIFT (0x0000001Au)
  29852. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_506_RESETVAL (0x00000000u)
  29853. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_507_MASK (0x08000000u)
  29854. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_507_SHIFT (0x0000001Bu)
  29855. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_507_RESETVAL (0x00000000u)
  29856. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_508_MASK (0x10000000u)
  29857. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_508_SHIFT (0x0000001Cu)
  29858. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_508_RESETVAL (0x00000000u)
  29859. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_509_MASK (0x20000000u)
  29860. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_509_SHIFT (0x0000001Du)
  29861. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_509_RESETVAL (0x00000000u)
  29862. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_510_MASK (0x40000000u)
  29863. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_510_SHIFT (0x0000001Eu)
  29864. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_510_RESETVAL (0x00000000u)
  29865. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_511_MASK (0x80000000u)
  29866. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_511_SHIFT (0x0000001Fu)
  29867. #define CSL_CPINTC_SECURE_ENABLE_REG15_SECURE_ENABLE_511_RESETVAL (0x00000000u)
  29868. #define CSL_CPINTC_SECURE_ENABLE_REG15_RESETVAL (0x00000000u)
  29869. /* secure_enable_reg16 */
  29870. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_512_MASK (0x00000001u)
  29871. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_512_SHIFT (0x00000000u)
  29872. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_512_RESETVAL (0x00000000u)
  29873. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_513_MASK (0x00000002u)
  29874. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_513_SHIFT (0x00000001u)
  29875. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_513_RESETVAL (0x00000000u)
  29876. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_514_MASK (0x00000004u)
  29877. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_514_SHIFT (0x00000002u)
  29878. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_514_RESETVAL (0x00000000u)
  29879. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_515_MASK (0x00000008u)
  29880. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_515_SHIFT (0x00000003u)
  29881. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_515_RESETVAL (0x00000000u)
  29882. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_516_MASK (0x00000010u)
  29883. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_516_SHIFT (0x00000004u)
  29884. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_516_RESETVAL (0x00000000u)
  29885. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_517_MASK (0x00000020u)
  29886. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_517_SHIFT (0x00000005u)
  29887. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_517_RESETVAL (0x00000000u)
  29888. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_518_MASK (0x00000040u)
  29889. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_518_SHIFT (0x00000006u)
  29890. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_518_RESETVAL (0x00000000u)
  29891. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_519_MASK (0x00000080u)
  29892. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_519_SHIFT (0x00000007u)
  29893. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_519_RESETVAL (0x00000000u)
  29894. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_520_MASK (0x00000100u)
  29895. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_520_SHIFT (0x00000008u)
  29896. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_520_RESETVAL (0x00000000u)
  29897. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_521_MASK (0x00000200u)
  29898. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_521_SHIFT (0x00000009u)
  29899. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_521_RESETVAL (0x00000000u)
  29900. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_522_MASK (0x00000400u)
  29901. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_522_SHIFT (0x0000000Au)
  29902. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_522_RESETVAL (0x00000000u)
  29903. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_523_MASK (0x00000800u)
  29904. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_523_SHIFT (0x0000000Bu)
  29905. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_523_RESETVAL (0x00000000u)
  29906. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_524_MASK (0x00001000u)
  29907. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_524_SHIFT (0x0000000Cu)
  29908. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_524_RESETVAL (0x00000000u)
  29909. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_525_MASK (0x00002000u)
  29910. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_525_SHIFT (0x0000000Du)
  29911. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_525_RESETVAL (0x00000000u)
  29912. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_526_MASK (0x00004000u)
  29913. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_526_SHIFT (0x0000000Eu)
  29914. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_526_RESETVAL (0x00000000u)
  29915. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_527_MASK (0x00008000u)
  29916. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_527_SHIFT (0x0000000Fu)
  29917. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_527_RESETVAL (0x00000000u)
  29918. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_528_MASK (0x00010000u)
  29919. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_528_SHIFT (0x00000010u)
  29920. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_528_RESETVAL (0x00000000u)
  29921. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_529_MASK (0x00020000u)
  29922. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_529_SHIFT (0x00000011u)
  29923. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_529_RESETVAL (0x00000000u)
  29924. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_530_MASK (0x00040000u)
  29925. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_530_SHIFT (0x00000012u)
  29926. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_530_RESETVAL (0x00000000u)
  29927. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_531_MASK (0x00080000u)
  29928. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_531_SHIFT (0x00000013u)
  29929. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_531_RESETVAL (0x00000000u)
  29930. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_532_MASK (0x00100000u)
  29931. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_532_SHIFT (0x00000014u)
  29932. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_532_RESETVAL (0x00000000u)
  29933. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_533_MASK (0x00200000u)
  29934. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_533_SHIFT (0x00000015u)
  29935. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_533_RESETVAL (0x00000000u)
  29936. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_534_MASK (0x00400000u)
  29937. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_534_SHIFT (0x00000016u)
  29938. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_534_RESETVAL (0x00000000u)
  29939. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_535_MASK (0x00800000u)
  29940. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_535_SHIFT (0x00000017u)
  29941. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_535_RESETVAL (0x00000000u)
  29942. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_536_MASK (0x01000000u)
  29943. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_536_SHIFT (0x00000018u)
  29944. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_536_RESETVAL (0x00000000u)
  29945. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_537_MASK (0x02000000u)
  29946. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_537_SHIFT (0x00000019u)
  29947. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_537_RESETVAL (0x00000000u)
  29948. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_538_MASK (0x04000000u)
  29949. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_538_SHIFT (0x0000001Au)
  29950. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_538_RESETVAL (0x00000000u)
  29951. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_539_MASK (0x08000000u)
  29952. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_539_SHIFT (0x0000001Bu)
  29953. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_539_RESETVAL (0x00000000u)
  29954. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_540_MASK (0x10000000u)
  29955. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_540_SHIFT (0x0000001Cu)
  29956. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_540_RESETVAL (0x00000000u)
  29957. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_541_MASK (0x20000000u)
  29958. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_541_SHIFT (0x0000001Du)
  29959. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_541_RESETVAL (0x00000000u)
  29960. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_542_MASK (0x40000000u)
  29961. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_542_SHIFT (0x0000001Eu)
  29962. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_542_RESETVAL (0x00000000u)
  29963. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_543_MASK (0x80000000u)
  29964. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_543_SHIFT (0x0000001Fu)
  29965. #define CSL_CPINTC_SECURE_ENABLE_REG16_SECURE_ENABLE_543_RESETVAL (0x00000000u)
  29966. #define CSL_CPINTC_SECURE_ENABLE_REG16_RESETVAL (0x00000000u)
  29967. /* secure_enable_reg17 */
  29968. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_544_MASK (0x00000001u)
  29969. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_544_SHIFT (0x00000000u)
  29970. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_544_RESETVAL (0x00000000u)
  29971. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_545_MASK (0x00000002u)
  29972. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_545_SHIFT (0x00000001u)
  29973. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_545_RESETVAL (0x00000000u)
  29974. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_546_MASK (0x00000004u)
  29975. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_546_SHIFT (0x00000002u)
  29976. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_546_RESETVAL (0x00000000u)
  29977. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_547_MASK (0x00000008u)
  29978. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_547_SHIFT (0x00000003u)
  29979. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_547_RESETVAL (0x00000000u)
  29980. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_548_MASK (0x00000010u)
  29981. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_548_SHIFT (0x00000004u)
  29982. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_548_RESETVAL (0x00000000u)
  29983. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_549_MASK (0x00000020u)
  29984. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_549_SHIFT (0x00000005u)
  29985. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_549_RESETVAL (0x00000000u)
  29986. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_550_MASK (0x00000040u)
  29987. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_550_SHIFT (0x00000006u)
  29988. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_550_RESETVAL (0x00000000u)
  29989. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_551_MASK (0x00000080u)
  29990. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_551_SHIFT (0x00000007u)
  29991. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_551_RESETVAL (0x00000000u)
  29992. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_552_MASK (0x00000100u)
  29993. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_552_SHIFT (0x00000008u)
  29994. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_552_RESETVAL (0x00000000u)
  29995. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_553_MASK (0x00000200u)
  29996. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_553_SHIFT (0x00000009u)
  29997. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_553_RESETVAL (0x00000000u)
  29998. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_554_MASK (0x00000400u)
  29999. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_554_SHIFT (0x0000000Au)
  30000. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_554_RESETVAL (0x00000000u)
  30001. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_555_MASK (0x00000800u)
  30002. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_555_SHIFT (0x0000000Bu)
  30003. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_555_RESETVAL (0x00000000u)
  30004. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_556_MASK (0x00001000u)
  30005. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_556_SHIFT (0x0000000Cu)
  30006. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_556_RESETVAL (0x00000000u)
  30007. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_557_MASK (0x00002000u)
  30008. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_557_SHIFT (0x0000000Du)
  30009. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_557_RESETVAL (0x00000000u)
  30010. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_558_MASK (0x00004000u)
  30011. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_558_SHIFT (0x0000000Eu)
  30012. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_558_RESETVAL (0x00000000u)
  30013. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_559_MASK (0x00008000u)
  30014. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_559_SHIFT (0x0000000Fu)
  30015. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_559_RESETVAL (0x00000000u)
  30016. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_560_MASK (0x00010000u)
  30017. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_560_SHIFT (0x00000010u)
  30018. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_560_RESETVAL (0x00000000u)
  30019. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_561_MASK (0x00020000u)
  30020. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_561_SHIFT (0x00000011u)
  30021. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_561_RESETVAL (0x00000000u)
  30022. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_562_MASK (0x00040000u)
  30023. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_562_SHIFT (0x00000012u)
  30024. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_562_RESETVAL (0x00000000u)
  30025. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_563_MASK (0x00080000u)
  30026. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_563_SHIFT (0x00000013u)
  30027. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_563_RESETVAL (0x00000000u)
  30028. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_564_MASK (0x00100000u)
  30029. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_564_SHIFT (0x00000014u)
  30030. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_564_RESETVAL (0x00000000u)
  30031. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_565_MASK (0x00200000u)
  30032. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_565_SHIFT (0x00000015u)
  30033. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_565_RESETVAL (0x00000000u)
  30034. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_566_MASK (0x00400000u)
  30035. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_566_SHIFT (0x00000016u)
  30036. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_566_RESETVAL (0x00000000u)
  30037. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_567_MASK (0x00800000u)
  30038. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_567_SHIFT (0x00000017u)
  30039. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_567_RESETVAL (0x00000000u)
  30040. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_568_MASK (0x01000000u)
  30041. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_568_SHIFT (0x00000018u)
  30042. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_568_RESETVAL (0x00000000u)
  30043. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_569_MASK (0x02000000u)
  30044. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_569_SHIFT (0x00000019u)
  30045. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_569_RESETVAL (0x00000000u)
  30046. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_570_MASK (0x04000000u)
  30047. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_570_SHIFT (0x0000001Au)
  30048. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_570_RESETVAL (0x00000000u)
  30049. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_571_MASK (0x08000000u)
  30050. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_571_SHIFT (0x0000001Bu)
  30051. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_571_RESETVAL (0x00000000u)
  30052. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_572_MASK (0x10000000u)
  30053. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_572_SHIFT (0x0000001Cu)
  30054. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_572_RESETVAL (0x00000000u)
  30055. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_573_MASK (0x20000000u)
  30056. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_573_SHIFT (0x0000001Du)
  30057. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_573_RESETVAL (0x00000000u)
  30058. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_574_MASK (0x40000000u)
  30059. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_574_SHIFT (0x0000001Eu)
  30060. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_574_RESETVAL (0x00000000u)
  30061. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_575_MASK (0x80000000u)
  30062. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_575_SHIFT (0x0000001Fu)
  30063. #define CSL_CPINTC_SECURE_ENABLE_REG17_SECURE_ENABLE_575_RESETVAL (0x00000000u)
  30064. #define CSL_CPINTC_SECURE_ENABLE_REG17_RESETVAL (0x00000000u)
  30065. /* secure_enable_reg18 */
  30066. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_576_MASK (0x00000001u)
  30067. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_576_SHIFT (0x00000000u)
  30068. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_576_RESETVAL (0x00000000u)
  30069. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_577_MASK (0x00000002u)
  30070. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_577_SHIFT (0x00000001u)
  30071. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_577_RESETVAL (0x00000000u)
  30072. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_578_MASK (0x00000004u)
  30073. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_578_SHIFT (0x00000002u)
  30074. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_578_RESETVAL (0x00000000u)
  30075. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_579_MASK (0x00000008u)
  30076. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_579_SHIFT (0x00000003u)
  30077. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_579_RESETVAL (0x00000000u)
  30078. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_580_MASK (0x00000010u)
  30079. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_580_SHIFT (0x00000004u)
  30080. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_580_RESETVAL (0x00000000u)
  30081. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_581_MASK (0x00000020u)
  30082. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_581_SHIFT (0x00000005u)
  30083. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_581_RESETVAL (0x00000000u)
  30084. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_582_MASK (0x00000040u)
  30085. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_582_SHIFT (0x00000006u)
  30086. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_582_RESETVAL (0x00000000u)
  30087. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_583_MASK (0x00000080u)
  30088. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_583_SHIFT (0x00000007u)
  30089. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_583_RESETVAL (0x00000000u)
  30090. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_584_MASK (0x00000100u)
  30091. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_584_SHIFT (0x00000008u)
  30092. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_584_RESETVAL (0x00000000u)
  30093. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_585_MASK (0x00000200u)
  30094. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_585_SHIFT (0x00000009u)
  30095. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_585_RESETVAL (0x00000000u)
  30096. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_586_MASK (0x00000400u)
  30097. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_586_SHIFT (0x0000000Au)
  30098. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_586_RESETVAL (0x00000000u)
  30099. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_587_MASK (0x00000800u)
  30100. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_587_SHIFT (0x0000000Bu)
  30101. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_587_RESETVAL (0x00000000u)
  30102. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_588_MASK (0x00001000u)
  30103. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_588_SHIFT (0x0000000Cu)
  30104. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_588_RESETVAL (0x00000000u)
  30105. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_589_MASK (0x00002000u)
  30106. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_589_SHIFT (0x0000000Du)
  30107. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_589_RESETVAL (0x00000000u)
  30108. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_590_MASK (0x00004000u)
  30109. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_590_SHIFT (0x0000000Eu)
  30110. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_590_RESETVAL (0x00000000u)
  30111. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_591_MASK (0x00008000u)
  30112. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_591_SHIFT (0x0000000Fu)
  30113. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_591_RESETVAL (0x00000000u)
  30114. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_592_MASK (0x00010000u)
  30115. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_592_SHIFT (0x00000010u)
  30116. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_592_RESETVAL (0x00000000u)
  30117. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_593_MASK (0x00020000u)
  30118. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_593_SHIFT (0x00000011u)
  30119. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_593_RESETVAL (0x00000000u)
  30120. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_594_MASK (0x00040000u)
  30121. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_594_SHIFT (0x00000012u)
  30122. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_594_RESETVAL (0x00000000u)
  30123. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_595_MASK (0x00080000u)
  30124. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_595_SHIFT (0x00000013u)
  30125. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_595_RESETVAL (0x00000000u)
  30126. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_596_MASK (0x00100000u)
  30127. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_596_SHIFT (0x00000014u)
  30128. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_596_RESETVAL (0x00000000u)
  30129. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_597_MASK (0x00200000u)
  30130. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_597_SHIFT (0x00000015u)
  30131. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_597_RESETVAL (0x00000000u)
  30132. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_598_MASK (0x00400000u)
  30133. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_598_SHIFT (0x00000016u)
  30134. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_598_RESETVAL (0x00000000u)
  30135. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_599_MASK (0x00800000u)
  30136. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_599_SHIFT (0x00000017u)
  30137. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_599_RESETVAL (0x00000000u)
  30138. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_600_MASK (0x01000000u)
  30139. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_600_SHIFT (0x00000018u)
  30140. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_600_RESETVAL (0x00000000u)
  30141. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_601_MASK (0x02000000u)
  30142. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_601_SHIFT (0x00000019u)
  30143. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_601_RESETVAL (0x00000000u)
  30144. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_602_MASK (0x04000000u)
  30145. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_602_SHIFT (0x0000001Au)
  30146. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_602_RESETVAL (0x00000000u)
  30147. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_603_MASK (0x08000000u)
  30148. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_603_SHIFT (0x0000001Bu)
  30149. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_603_RESETVAL (0x00000000u)
  30150. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_604_MASK (0x10000000u)
  30151. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_604_SHIFT (0x0000001Cu)
  30152. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_604_RESETVAL (0x00000000u)
  30153. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_605_MASK (0x20000000u)
  30154. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_605_SHIFT (0x0000001Du)
  30155. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_605_RESETVAL (0x00000000u)
  30156. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_606_MASK (0x40000000u)
  30157. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_606_SHIFT (0x0000001Eu)
  30158. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_606_RESETVAL (0x00000000u)
  30159. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_607_MASK (0x80000000u)
  30160. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_607_SHIFT (0x0000001Fu)
  30161. #define CSL_CPINTC_SECURE_ENABLE_REG18_SECURE_ENABLE_607_RESETVAL (0x00000000u)
  30162. #define CSL_CPINTC_SECURE_ENABLE_REG18_RESETVAL (0x00000000u)
  30163. /* secure_enable_reg19 */
  30164. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_608_MASK (0x00000001u)
  30165. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_608_SHIFT (0x00000000u)
  30166. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_608_RESETVAL (0x00000000u)
  30167. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_609_MASK (0x00000002u)
  30168. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_609_SHIFT (0x00000001u)
  30169. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_609_RESETVAL (0x00000000u)
  30170. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_610_MASK (0x00000004u)
  30171. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_610_SHIFT (0x00000002u)
  30172. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_610_RESETVAL (0x00000000u)
  30173. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_611_MASK (0x00000008u)
  30174. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_611_SHIFT (0x00000003u)
  30175. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_611_RESETVAL (0x00000000u)
  30176. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_612_MASK (0x00000010u)
  30177. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_612_SHIFT (0x00000004u)
  30178. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_612_RESETVAL (0x00000000u)
  30179. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_613_MASK (0x00000020u)
  30180. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_613_SHIFT (0x00000005u)
  30181. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_613_RESETVAL (0x00000000u)
  30182. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_614_MASK (0x00000040u)
  30183. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_614_SHIFT (0x00000006u)
  30184. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_614_RESETVAL (0x00000000u)
  30185. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_615_MASK (0x00000080u)
  30186. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_615_SHIFT (0x00000007u)
  30187. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_615_RESETVAL (0x00000000u)
  30188. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_616_MASK (0x00000100u)
  30189. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_616_SHIFT (0x00000008u)
  30190. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_616_RESETVAL (0x00000000u)
  30191. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_617_MASK (0x00000200u)
  30192. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_617_SHIFT (0x00000009u)
  30193. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_617_RESETVAL (0x00000000u)
  30194. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_618_MASK (0x00000400u)
  30195. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_618_SHIFT (0x0000000Au)
  30196. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_618_RESETVAL (0x00000000u)
  30197. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_619_MASK (0x00000800u)
  30198. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_619_SHIFT (0x0000000Bu)
  30199. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_619_RESETVAL (0x00000000u)
  30200. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_620_MASK (0x00001000u)
  30201. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_620_SHIFT (0x0000000Cu)
  30202. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_620_RESETVAL (0x00000000u)
  30203. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_621_MASK (0x00002000u)
  30204. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_621_SHIFT (0x0000000Du)
  30205. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_621_RESETVAL (0x00000000u)
  30206. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_622_MASK (0x00004000u)
  30207. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_622_SHIFT (0x0000000Eu)
  30208. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_622_RESETVAL (0x00000000u)
  30209. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_623_MASK (0x00008000u)
  30210. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_623_SHIFT (0x0000000Fu)
  30211. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_623_RESETVAL (0x00000000u)
  30212. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_624_MASK (0x00010000u)
  30213. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_624_SHIFT (0x00000010u)
  30214. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_624_RESETVAL (0x00000000u)
  30215. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_625_MASK (0x00020000u)
  30216. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_625_SHIFT (0x00000011u)
  30217. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_625_RESETVAL (0x00000000u)
  30218. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_626_MASK (0x00040000u)
  30219. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_626_SHIFT (0x00000012u)
  30220. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_626_RESETVAL (0x00000000u)
  30221. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_627_MASK (0x00080000u)
  30222. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_627_SHIFT (0x00000013u)
  30223. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_627_RESETVAL (0x00000000u)
  30224. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_628_MASK (0x00100000u)
  30225. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_628_SHIFT (0x00000014u)
  30226. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_628_RESETVAL (0x00000000u)
  30227. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_629_MASK (0x00200000u)
  30228. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_629_SHIFT (0x00000015u)
  30229. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_629_RESETVAL (0x00000000u)
  30230. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_630_MASK (0x00400000u)
  30231. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_630_SHIFT (0x00000016u)
  30232. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_630_RESETVAL (0x00000000u)
  30233. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_631_MASK (0x00800000u)
  30234. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_631_SHIFT (0x00000017u)
  30235. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_631_RESETVAL (0x00000000u)
  30236. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_632_MASK (0x01000000u)
  30237. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_632_SHIFT (0x00000018u)
  30238. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_632_RESETVAL (0x00000000u)
  30239. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_633_MASK (0x02000000u)
  30240. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_633_SHIFT (0x00000019u)
  30241. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_633_RESETVAL (0x00000000u)
  30242. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_634_MASK (0x04000000u)
  30243. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_634_SHIFT (0x0000001Au)
  30244. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_634_RESETVAL (0x00000000u)
  30245. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_635_MASK (0x08000000u)
  30246. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_635_SHIFT (0x0000001Bu)
  30247. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_635_RESETVAL (0x00000000u)
  30248. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_636_MASK (0x10000000u)
  30249. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_636_SHIFT (0x0000001Cu)
  30250. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_636_RESETVAL (0x00000000u)
  30251. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_637_MASK (0x20000000u)
  30252. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_637_SHIFT (0x0000001Du)
  30253. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_637_RESETVAL (0x00000000u)
  30254. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_638_MASK (0x40000000u)
  30255. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_638_SHIFT (0x0000001Eu)
  30256. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_638_RESETVAL (0x00000000u)
  30257. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_639_MASK (0x80000000u)
  30258. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_639_SHIFT (0x0000001Fu)
  30259. #define CSL_CPINTC_SECURE_ENABLE_REG19_SECURE_ENABLE_639_RESETVAL (0x00000000u)
  30260. #define CSL_CPINTC_SECURE_ENABLE_REG19_RESETVAL (0x00000000u)
  30261. /* secure_enable_reg20 */
  30262. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_640_MASK (0x00000001u)
  30263. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_640_SHIFT (0x00000000u)
  30264. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_640_RESETVAL (0x00000000u)
  30265. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_641_MASK (0x00000002u)
  30266. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_641_SHIFT (0x00000001u)
  30267. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_641_RESETVAL (0x00000000u)
  30268. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_642_MASK (0x00000004u)
  30269. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_642_SHIFT (0x00000002u)
  30270. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_642_RESETVAL (0x00000000u)
  30271. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_643_MASK (0x00000008u)
  30272. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_643_SHIFT (0x00000003u)
  30273. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_643_RESETVAL (0x00000000u)
  30274. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_644_MASK (0x00000010u)
  30275. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_644_SHIFT (0x00000004u)
  30276. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_644_RESETVAL (0x00000000u)
  30277. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_645_MASK (0x00000020u)
  30278. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_645_SHIFT (0x00000005u)
  30279. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_645_RESETVAL (0x00000000u)
  30280. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_646_MASK (0x00000040u)
  30281. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_646_SHIFT (0x00000006u)
  30282. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_646_RESETVAL (0x00000000u)
  30283. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_647_MASK (0x00000080u)
  30284. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_647_SHIFT (0x00000007u)
  30285. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_647_RESETVAL (0x00000000u)
  30286. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_648_MASK (0x00000100u)
  30287. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_648_SHIFT (0x00000008u)
  30288. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_648_RESETVAL (0x00000000u)
  30289. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_649_MASK (0x00000200u)
  30290. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_649_SHIFT (0x00000009u)
  30291. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_649_RESETVAL (0x00000000u)
  30292. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_650_MASK (0x00000400u)
  30293. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_650_SHIFT (0x0000000Au)
  30294. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_650_RESETVAL (0x00000000u)
  30295. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_651_MASK (0x00000800u)
  30296. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_651_SHIFT (0x0000000Bu)
  30297. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_651_RESETVAL (0x00000000u)
  30298. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_652_MASK (0x00001000u)
  30299. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_652_SHIFT (0x0000000Cu)
  30300. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_652_RESETVAL (0x00000000u)
  30301. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_653_MASK (0x00002000u)
  30302. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_653_SHIFT (0x0000000Du)
  30303. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_653_RESETVAL (0x00000000u)
  30304. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_654_MASK (0x00004000u)
  30305. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_654_SHIFT (0x0000000Eu)
  30306. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_654_RESETVAL (0x00000000u)
  30307. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_655_MASK (0x00008000u)
  30308. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_655_SHIFT (0x0000000Fu)
  30309. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_655_RESETVAL (0x00000000u)
  30310. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_656_MASK (0x00010000u)
  30311. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_656_SHIFT (0x00000010u)
  30312. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_656_RESETVAL (0x00000000u)
  30313. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_657_MASK (0x00020000u)
  30314. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_657_SHIFT (0x00000011u)
  30315. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_657_RESETVAL (0x00000000u)
  30316. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_658_MASK (0x00040000u)
  30317. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_658_SHIFT (0x00000012u)
  30318. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_658_RESETVAL (0x00000000u)
  30319. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_659_MASK (0x00080000u)
  30320. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_659_SHIFT (0x00000013u)
  30321. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_659_RESETVAL (0x00000000u)
  30322. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_660_MASK (0x00100000u)
  30323. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_660_SHIFT (0x00000014u)
  30324. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_660_RESETVAL (0x00000000u)
  30325. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_661_MASK (0x00200000u)
  30326. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_661_SHIFT (0x00000015u)
  30327. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_661_RESETVAL (0x00000000u)
  30328. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_662_MASK (0x00400000u)
  30329. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_662_SHIFT (0x00000016u)
  30330. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_662_RESETVAL (0x00000000u)
  30331. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_663_MASK (0x00800000u)
  30332. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_663_SHIFT (0x00000017u)
  30333. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_663_RESETVAL (0x00000000u)
  30334. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_664_MASK (0x01000000u)
  30335. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_664_SHIFT (0x00000018u)
  30336. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_664_RESETVAL (0x00000000u)
  30337. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_665_MASK (0x02000000u)
  30338. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_665_SHIFT (0x00000019u)
  30339. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_665_RESETVAL (0x00000000u)
  30340. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_666_MASK (0x04000000u)
  30341. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_666_SHIFT (0x0000001Au)
  30342. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_666_RESETVAL (0x00000000u)
  30343. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_667_MASK (0x08000000u)
  30344. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_667_SHIFT (0x0000001Bu)
  30345. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_667_RESETVAL (0x00000000u)
  30346. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_668_MASK (0x10000000u)
  30347. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_668_SHIFT (0x0000001Cu)
  30348. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_668_RESETVAL (0x00000000u)
  30349. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_669_MASK (0x20000000u)
  30350. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_669_SHIFT (0x0000001Du)
  30351. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_669_RESETVAL (0x00000000u)
  30352. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_670_MASK (0x40000000u)
  30353. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_670_SHIFT (0x0000001Eu)
  30354. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_670_RESETVAL (0x00000000u)
  30355. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_671_MASK (0x80000000u)
  30356. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_671_SHIFT (0x0000001Fu)
  30357. #define CSL_CPINTC_SECURE_ENABLE_REG20_SECURE_ENABLE_671_RESETVAL (0x00000000u)
  30358. #define CSL_CPINTC_SECURE_ENABLE_REG20_RESETVAL (0x00000000u)
  30359. /* secure_enable_reg21 */
  30360. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_672_MASK (0x00000001u)
  30361. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_672_SHIFT (0x00000000u)
  30362. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_672_RESETVAL (0x00000000u)
  30363. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_673_MASK (0x00000002u)
  30364. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_673_SHIFT (0x00000001u)
  30365. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_673_RESETVAL (0x00000000u)
  30366. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_674_MASK (0x00000004u)
  30367. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_674_SHIFT (0x00000002u)
  30368. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_674_RESETVAL (0x00000000u)
  30369. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_675_MASK (0x00000008u)
  30370. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_675_SHIFT (0x00000003u)
  30371. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_675_RESETVAL (0x00000000u)
  30372. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_676_MASK (0x00000010u)
  30373. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_676_SHIFT (0x00000004u)
  30374. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_676_RESETVAL (0x00000000u)
  30375. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_677_MASK (0x00000020u)
  30376. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_677_SHIFT (0x00000005u)
  30377. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_677_RESETVAL (0x00000000u)
  30378. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_678_MASK (0x00000040u)
  30379. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_678_SHIFT (0x00000006u)
  30380. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_678_RESETVAL (0x00000000u)
  30381. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_679_MASK (0x00000080u)
  30382. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_679_SHIFT (0x00000007u)
  30383. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_679_RESETVAL (0x00000000u)
  30384. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_680_MASK (0x00000100u)
  30385. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_680_SHIFT (0x00000008u)
  30386. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_680_RESETVAL (0x00000000u)
  30387. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_681_MASK (0x00000200u)
  30388. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_681_SHIFT (0x00000009u)
  30389. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_681_RESETVAL (0x00000000u)
  30390. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_682_MASK (0x00000400u)
  30391. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_682_SHIFT (0x0000000Au)
  30392. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_682_RESETVAL (0x00000000u)
  30393. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_683_MASK (0x00000800u)
  30394. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_683_SHIFT (0x0000000Bu)
  30395. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_683_RESETVAL (0x00000000u)
  30396. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_684_MASK (0x00001000u)
  30397. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_684_SHIFT (0x0000000Cu)
  30398. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_684_RESETVAL (0x00000000u)
  30399. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_685_MASK (0x00002000u)
  30400. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_685_SHIFT (0x0000000Du)
  30401. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_685_RESETVAL (0x00000000u)
  30402. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_686_MASK (0x00004000u)
  30403. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_686_SHIFT (0x0000000Eu)
  30404. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_686_RESETVAL (0x00000000u)
  30405. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_687_MASK (0x00008000u)
  30406. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_687_SHIFT (0x0000000Fu)
  30407. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_687_RESETVAL (0x00000000u)
  30408. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_688_MASK (0x00010000u)
  30409. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_688_SHIFT (0x00000010u)
  30410. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_688_RESETVAL (0x00000000u)
  30411. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_689_MASK (0x00020000u)
  30412. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_689_SHIFT (0x00000011u)
  30413. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_689_RESETVAL (0x00000000u)
  30414. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_690_MASK (0x00040000u)
  30415. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_690_SHIFT (0x00000012u)
  30416. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_690_RESETVAL (0x00000000u)
  30417. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_691_MASK (0x00080000u)
  30418. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_691_SHIFT (0x00000013u)
  30419. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_691_RESETVAL (0x00000000u)
  30420. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_692_MASK (0x00100000u)
  30421. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_692_SHIFT (0x00000014u)
  30422. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_692_RESETVAL (0x00000000u)
  30423. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_693_MASK (0x00200000u)
  30424. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_693_SHIFT (0x00000015u)
  30425. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_693_RESETVAL (0x00000000u)
  30426. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_694_MASK (0x00400000u)
  30427. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_694_SHIFT (0x00000016u)
  30428. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_694_RESETVAL (0x00000000u)
  30429. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_695_MASK (0x00800000u)
  30430. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_695_SHIFT (0x00000017u)
  30431. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_695_RESETVAL (0x00000000u)
  30432. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_696_MASK (0x01000000u)
  30433. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_696_SHIFT (0x00000018u)
  30434. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_696_RESETVAL (0x00000000u)
  30435. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_697_MASK (0x02000000u)
  30436. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_697_SHIFT (0x00000019u)
  30437. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_697_RESETVAL (0x00000000u)
  30438. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_698_MASK (0x04000000u)
  30439. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_698_SHIFT (0x0000001Au)
  30440. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_698_RESETVAL (0x00000000u)
  30441. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_699_MASK (0x08000000u)
  30442. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_699_SHIFT (0x0000001Bu)
  30443. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_699_RESETVAL (0x00000000u)
  30444. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_700_MASK (0x10000000u)
  30445. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_700_SHIFT (0x0000001Cu)
  30446. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_700_RESETVAL (0x00000000u)
  30447. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_701_MASK (0x20000000u)
  30448. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_701_SHIFT (0x0000001Du)
  30449. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_701_RESETVAL (0x00000000u)
  30450. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_702_MASK (0x40000000u)
  30451. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_702_SHIFT (0x0000001Eu)
  30452. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_702_RESETVAL (0x00000000u)
  30453. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_703_MASK (0x80000000u)
  30454. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_703_SHIFT (0x0000001Fu)
  30455. #define CSL_CPINTC_SECURE_ENABLE_REG21_SECURE_ENABLE_703_RESETVAL (0x00000000u)
  30456. #define CSL_CPINTC_SECURE_ENABLE_REG21_RESETVAL (0x00000000u)
  30457. /* secure_enable_reg22 */
  30458. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_704_MASK (0x00000001u)
  30459. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_704_SHIFT (0x00000000u)
  30460. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_704_RESETVAL (0x00000000u)
  30461. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_705_MASK (0x00000002u)
  30462. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_705_SHIFT (0x00000001u)
  30463. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_705_RESETVAL (0x00000000u)
  30464. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_706_MASK (0x00000004u)
  30465. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_706_SHIFT (0x00000002u)
  30466. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_706_RESETVAL (0x00000000u)
  30467. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_707_MASK (0x00000008u)
  30468. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_707_SHIFT (0x00000003u)
  30469. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_707_RESETVAL (0x00000000u)
  30470. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_708_MASK (0x00000010u)
  30471. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_708_SHIFT (0x00000004u)
  30472. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_708_RESETVAL (0x00000000u)
  30473. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_709_MASK (0x00000020u)
  30474. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_709_SHIFT (0x00000005u)
  30475. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_709_RESETVAL (0x00000000u)
  30476. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_710_MASK (0x00000040u)
  30477. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_710_SHIFT (0x00000006u)
  30478. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_710_RESETVAL (0x00000000u)
  30479. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_711_MASK (0x00000080u)
  30480. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_711_SHIFT (0x00000007u)
  30481. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_711_RESETVAL (0x00000000u)
  30482. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_712_MASK (0x00000100u)
  30483. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_712_SHIFT (0x00000008u)
  30484. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_712_RESETVAL (0x00000000u)
  30485. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_713_MASK (0x00000200u)
  30486. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_713_SHIFT (0x00000009u)
  30487. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_713_RESETVAL (0x00000000u)
  30488. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_714_MASK (0x00000400u)
  30489. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_714_SHIFT (0x0000000Au)
  30490. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_714_RESETVAL (0x00000000u)
  30491. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_715_MASK (0x00000800u)
  30492. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_715_SHIFT (0x0000000Bu)
  30493. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_715_RESETVAL (0x00000000u)
  30494. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_716_MASK (0x00001000u)
  30495. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_716_SHIFT (0x0000000Cu)
  30496. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_716_RESETVAL (0x00000000u)
  30497. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_717_MASK (0x00002000u)
  30498. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_717_SHIFT (0x0000000Du)
  30499. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_717_RESETVAL (0x00000000u)
  30500. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_718_MASK (0x00004000u)
  30501. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_718_SHIFT (0x0000000Eu)
  30502. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_718_RESETVAL (0x00000000u)
  30503. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_719_MASK (0x00008000u)
  30504. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_719_SHIFT (0x0000000Fu)
  30505. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_719_RESETVAL (0x00000000u)
  30506. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_720_MASK (0x00010000u)
  30507. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_720_SHIFT (0x00000010u)
  30508. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_720_RESETVAL (0x00000000u)
  30509. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_721_MASK (0x00020000u)
  30510. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_721_SHIFT (0x00000011u)
  30511. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_721_RESETVAL (0x00000000u)
  30512. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_722_MASK (0x00040000u)
  30513. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_722_SHIFT (0x00000012u)
  30514. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_722_RESETVAL (0x00000000u)
  30515. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_723_MASK (0x00080000u)
  30516. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_723_SHIFT (0x00000013u)
  30517. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_723_RESETVAL (0x00000000u)
  30518. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_724_MASK (0x00100000u)
  30519. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_724_SHIFT (0x00000014u)
  30520. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_724_RESETVAL (0x00000000u)
  30521. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_725_MASK (0x00200000u)
  30522. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_725_SHIFT (0x00000015u)
  30523. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_725_RESETVAL (0x00000000u)
  30524. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_726_MASK (0x00400000u)
  30525. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_726_SHIFT (0x00000016u)
  30526. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_726_RESETVAL (0x00000000u)
  30527. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_727_MASK (0x00800000u)
  30528. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_727_SHIFT (0x00000017u)
  30529. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_727_RESETVAL (0x00000000u)
  30530. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_728_MASK (0x01000000u)
  30531. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_728_SHIFT (0x00000018u)
  30532. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_728_RESETVAL (0x00000000u)
  30533. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_729_MASK (0x02000000u)
  30534. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_729_SHIFT (0x00000019u)
  30535. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_729_RESETVAL (0x00000000u)
  30536. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_730_MASK (0x04000000u)
  30537. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_730_SHIFT (0x0000001Au)
  30538. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_730_RESETVAL (0x00000000u)
  30539. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_731_MASK (0x08000000u)
  30540. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_731_SHIFT (0x0000001Bu)
  30541. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_731_RESETVAL (0x00000000u)
  30542. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_732_MASK (0x10000000u)
  30543. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_732_SHIFT (0x0000001Cu)
  30544. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_732_RESETVAL (0x00000000u)
  30545. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_733_MASK (0x20000000u)
  30546. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_733_SHIFT (0x0000001Du)
  30547. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_733_RESETVAL (0x00000000u)
  30548. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_734_MASK (0x40000000u)
  30549. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_734_SHIFT (0x0000001Eu)
  30550. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_734_RESETVAL (0x00000000u)
  30551. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_735_MASK (0x80000000u)
  30552. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_735_SHIFT (0x0000001Fu)
  30553. #define CSL_CPINTC_SECURE_ENABLE_REG22_SECURE_ENABLE_735_RESETVAL (0x00000000u)
  30554. #define CSL_CPINTC_SECURE_ENABLE_REG22_RESETVAL (0x00000000u)
  30555. /* secure_enable_reg23 */
  30556. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_736_MASK (0x00000001u)
  30557. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_736_SHIFT (0x00000000u)
  30558. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_736_RESETVAL (0x00000000u)
  30559. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_737_MASK (0x00000002u)
  30560. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_737_SHIFT (0x00000001u)
  30561. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_737_RESETVAL (0x00000000u)
  30562. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_738_MASK (0x00000004u)
  30563. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_738_SHIFT (0x00000002u)
  30564. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_738_RESETVAL (0x00000000u)
  30565. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_739_MASK (0x00000008u)
  30566. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_739_SHIFT (0x00000003u)
  30567. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_739_RESETVAL (0x00000000u)
  30568. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_740_MASK (0x00000010u)
  30569. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_740_SHIFT (0x00000004u)
  30570. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_740_RESETVAL (0x00000000u)
  30571. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_741_MASK (0x00000020u)
  30572. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_741_SHIFT (0x00000005u)
  30573. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_741_RESETVAL (0x00000000u)
  30574. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_742_MASK (0x00000040u)
  30575. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_742_SHIFT (0x00000006u)
  30576. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_742_RESETVAL (0x00000000u)
  30577. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_743_MASK (0x00000080u)
  30578. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_743_SHIFT (0x00000007u)
  30579. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_743_RESETVAL (0x00000000u)
  30580. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_744_MASK (0x00000100u)
  30581. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_744_SHIFT (0x00000008u)
  30582. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_744_RESETVAL (0x00000000u)
  30583. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_745_MASK (0x00000200u)
  30584. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_745_SHIFT (0x00000009u)
  30585. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_745_RESETVAL (0x00000000u)
  30586. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_746_MASK (0x00000400u)
  30587. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_746_SHIFT (0x0000000Au)
  30588. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_746_RESETVAL (0x00000000u)
  30589. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_747_MASK (0x00000800u)
  30590. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_747_SHIFT (0x0000000Bu)
  30591. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_747_RESETVAL (0x00000000u)
  30592. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_748_MASK (0x00001000u)
  30593. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_748_SHIFT (0x0000000Cu)
  30594. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_748_RESETVAL (0x00000000u)
  30595. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_749_MASK (0x00002000u)
  30596. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_749_SHIFT (0x0000000Du)
  30597. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_749_RESETVAL (0x00000000u)
  30598. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_750_MASK (0x00004000u)
  30599. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_750_SHIFT (0x0000000Eu)
  30600. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_750_RESETVAL (0x00000000u)
  30601. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_751_MASK (0x00008000u)
  30602. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_751_SHIFT (0x0000000Fu)
  30603. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_751_RESETVAL (0x00000000u)
  30604. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_752_MASK (0x00010000u)
  30605. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_752_SHIFT (0x00000010u)
  30606. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_752_RESETVAL (0x00000000u)
  30607. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_753_MASK (0x00020000u)
  30608. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_753_SHIFT (0x00000011u)
  30609. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_753_RESETVAL (0x00000000u)
  30610. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_754_MASK (0x00040000u)
  30611. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_754_SHIFT (0x00000012u)
  30612. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_754_RESETVAL (0x00000000u)
  30613. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_755_MASK (0x00080000u)
  30614. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_755_SHIFT (0x00000013u)
  30615. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_755_RESETVAL (0x00000000u)
  30616. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_756_MASK (0x00100000u)
  30617. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_756_SHIFT (0x00000014u)
  30618. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_756_RESETVAL (0x00000000u)
  30619. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_757_MASK (0x00200000u)
  30620. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_757_SHIFT (0x00000015u)
  30621. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_757_RESETVAL (0x00000000u)
  30622. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_758_MASK (0x00400000u)
  30623. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_758_SHIFT (0x00000016u)
  30624. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_758_RESETVAL (0x00000000u)
  30625. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_759_MASK (0x00800000u)
  30626. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_759_SHIFT (0x00000017u)
  30627. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_759_RESETVAL (0x00000000u)
  30628. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_760_MASK (0x01000000u)
  30629. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_760_SHIFT (0x00000018u)
  30630. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_760_RESETVAL (0x00000000u)
  30631. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_761_MASK (0x02000000u)
  30632. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_761_SHIFT (0x00000019u)
  30633. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_761_RESETVAL (0x00000000u)
  30634. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_762_MASK (0x04000000u)
  30635. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_762_SHIFT (0x0000001Au)
  30636. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_762_RESETVAL (0x00000000u)
  30637. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_763_MASK (0x08000000u)
  30638. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_763_SHIFT (0x0000001Bu)
  30639. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_763_RESETVAL (0x00000000u)
  30640. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_764_MASK (0x10000000u)
  30641. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_764_SHIFT (0x0000001Cu)
  30642. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_764_RESETVAL (0x00000000u)
  30643. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_765_MASK (0x20000000u)
  30644. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_765_SHIFT (0x0000001Du)
  30645. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_765_RESETVAL (0x00000000u)
  30646. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_766_MASK (0x40000000u)
  30647. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_766_SHIFT (0x0000001Eu)
  30648. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_766_RESETVAL (0x00000000u)
  30649. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_767_MASK (0x80000000u)
  30650. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_767_SHIFT (0x0000001Fu)
  30651. #define CSL_CPINTC_SECURE_ENABLE_REG23_SECURE_ENABLE_767_RESETVAL (0x00000000u)
  30652. #define CSL_CPINTC_SECURE_ENABLE_REG23_RESETVAL (0x00000000u)
  30653. /* secure_enable_reg24 */
  30654. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_768_MASK (0x00000001u)
  30655. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_768_SHIFT (0x00000000u)
  30656. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_768_RESETVAL (0x00000000u)
  30657. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_769_MASK (0x00000002u)
  30658. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_769_SHIFT (0x00000001u)
  30659. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_769_RESETVAL (0x00000000u)
  30660. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_770_MASK (0x00000004u)
  30661. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_770_SHIFT (0x00000002u)
  30662. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_770_RESETVAL (0x00000000u)
  30663. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_771_MASK (0x00000008u)
  30664. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_771_SHIFT (0x00000003u)
  30665. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_771_RESETVAL (0x00000000u)
  30666. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_772_MASK (0x00000010u)
  30667. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_772_SHIFT (0x00000004u)
  30668. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_772_RESETVAL (0x00000000u)
  30669. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_773_MASK (0x00000020u)
  30670. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_773_SHIFT (0x00000005u)
  30671. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_773_RESETVAL (0x00000000u)
  30672. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_774_MASK (0x00000040u)
  30673. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_774_SHIFT (0x00000006u)
  30674. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_774_RESETVAL (0x00000000u)
  30675. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_775_MASK (0x00000080u)
  30676. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_775_SHIFT (0x00000007u)
  30677. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_775_RESETVAL (0x00000000u)
  30678. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_776_MASK (0x00000100u)
  30679. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_776_SHIFT (0x00000008u)
  30680. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_776_RESETVAL (0x00000000u)
  30681. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_777_MASK (0x00000200u)
  30682. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_777_SHIFT (0x00000009u)
  30683. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_777_RESETVAL (0x00000000u)
  30684. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_778_MASK (0x00000400u)
  30685. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_778_SHIFT (0x0000000Au)
  30686. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_778_RESETVAL (0x00000000u)
  30687. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_779_MASK (0x00000800u)
  30688. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_779_SHIFT (0x0000000Bu)
  30689. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_779_RESETVAL (0x00000000u)
  30690. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_780_MASK (0x00001000u)
  30691. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_780_SHIFT (0x0000000Cu)
  30692. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_780_RESETVAL (0x00000000u)
  30693. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_781_MASK (0x00002000u)
  30694. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_781_SHIFT (0x0000000Du)
  30695. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_781_RESETVAL (0x00000000u)
  30696. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_782_MASK (0x00004000u)
  30697. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_782_SHIFT (0x0000000Eu)
  30698. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_782_RESETVAL (0x00000000u)
  30699. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_783_MASK (0x00008000u)
  30700. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_783_SHIFT (0x0000000Fu)
  30701. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_783_RESETVAL (0x00000000u)
  30702. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_784_MASK (0x00010000u)
  30703. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_784_SHIFT (0x00000010u)
  30704. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_784_RESETVAL (0x00000000u)
  30705. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_785_MASK (0x00020000u)
  30706. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_785_SHIFT (0x00000011u)
  30707. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_785_RESETVAL (0x00000000u)
  30708. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_786_MASK (0x00040000u)
  30709. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_786_SHIFT (0x00000012u)
  30710. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_786_RESETVAL (0x00000000u)
  30711. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_787_MASK (0x00080000u)
  30712. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_787_SHIFT (0x00000013u)
  30713. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_787_RESETVAL (0x00000000u)
  30714. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_788_MASK (0x00100000u)
  30715. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_788_SHIFT (0x00000014u)
  30716. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_788_RESETVAL (0x00000000u)
  30717. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_789_MASK (0x00200000u)
  30718. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_789_SHIFT (0x00000015u)
  30719. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_789_RESETVAL (0x00000000u)
  30720. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_790_MASK (0x00400000u)
  30721. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_790_SHIFT (0x00000016u)
  30722. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_790_RESETVAL (0x00000000u)
  30723. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_791_MASK (0x00800000u)
  30724. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_791_SHIFT (0x00000017u)
  30725. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_791_RESETVAL (0x00000000u)
  30726. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_792_MASK (0x01000000u)
  30727. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_792_SHIFT (0x00000018u)
  30728. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_792_RESETVAL (0x00000000u)
  30729. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_793_MASK (0x02000000u)
  30730. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_793_SHIFT (0x00000019u)
  30731. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_793_RESETVAL (0x00000000u)
  30732. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_794_MASK (0x04000000u)
  30733. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_794_SHIFT (0x0000001Au)
  30734. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_794_RESETVAL (0x00000000u)
  30735. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_795_MASK (0x08000000u)
  30736. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_795_SHIFT (0x0000001Bu)
  30737. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_795_RESETVAL (0x00000000u)
  30738. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_796_MASK (0x10000000u)
  30739. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_796_SHIFT (0x0000001Cu)
  30740. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_796_RESETVAL (0x00000000u)
  30741. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_797_MASK (0x20000000u)
  30742. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_797_SHIFT (0x0000001Du)
  30743. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_797_RESETVAL (0x00000000u)
  30744. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_798_MASK (0x40000000u)
  30745. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_798_SHIFT (0x0000001Eu)
  30746. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_798_RESETVAL (0x00000000u)
  30747. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_799_MASK (0x80000000u)
  30748. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_799_SHIFT (0x0000001Fu)
  30749. #define CSL_CPINTC_SECURE_ENABLE_REG24_SECURE_ENABLE_799_RESETVAL (0x00000000u)
  30750. #define CSL_CPINTC_SECURE_ENABLE_REG24_RESETVAL (0x00000000u)
  30751. /* secure_enable_reg25 */
  30752. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_800_MASK (0x00000001u)
  30753. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_800_SHIFT (0x00000000u)
  30754. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_800_RESETVAL (0x00000000u)
  30755. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_801_MASK (0x00000002u)
  30756. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_801_SHIFT (0x00000001u)
  30757. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_801_RESETVAL (0x00000000u)
  30758. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_802_MASK (0x00000004u)
  30759. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_802_SHIFT (0x00000002u)
  30760. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_802_RESETVAL (0x00000000u)
  30761. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_803_MASK (0x00000008u)
  30762. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_803_SHIFT (0x00000003u)
  30763. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_803_RESETVAL (0x00000000u)
  30764. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_804_MASK (0x00000010u)
  30765. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_804_SHIFT (0x00000004u)
  30766. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_804_RESETVAL (0x00000000u)
  30767. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_805_MASK (0x00000020u)
  30768. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_805_SHIFT (0x00000005u)
  30769. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_805_RESETVAL (0x00000000u)
  30770. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_806_MASK (0x00000040u)
  30771. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_806_SHIFT (0x00000006u)
  30772. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_806_RESETVAL (0x00000000u)
  30773. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_807_MASK (0x00000080u)
  30774. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_807_SHIFT (0x00000007u)
  30775. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_807_RESETVAL (0x00000000u)
  30776. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_808_MASK (0x00000100u)
  30777. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_808_SHIFT (0x00000008u)
  30778. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_808_RESETVAL (0x00000000u)
  30779. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_809_MASK (0x00000200u)
  30780. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_809_SHIFT (0x00000009u)
  30781. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_809_RESETVAL (0x00000000u)
  30782. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_810_MASK (0x00000400u)
  30783. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_810_SHIFT (0x0000000Au)
  30784. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_810_RESETVAL (0x00000000u)
  30785. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_811_MASK (0x00000800u)
  30786. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_811_SHIFT (0x0000000Bu)
  30787. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_811_RESETVAL (0x00000000u)
  30788. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_812_MASK (0x00001000u)
  30789. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_812_SHIFT (0x0000000Cu)
  30790. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_812_RESETVAL (0x00000000u)
  30791. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_813_MASK (0x00002000u)
  30792. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_813_SHIFT (0x0000000Du)
  30793. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_813_RESETVAL (0x00000000u)
  30794. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_814_MASK (0x00004000u)
  30795. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_814_SHIFT (0x0000000Eu)
  30796. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_814_RESETVAL (0x00000000u)
  30797. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_815_MASK (0x00008000u)
  30798. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_815_SHIFT (0x0000000Fu)
  30799. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_815_RESETVAL (0x00000000u)
  30800. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_816_MASK (0x00010000u)
  30801. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_816_SHIFT (0x00000010u)
  30802. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_816_RESETVAL (0x00000000u)
  30803. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_817_MASK (0x00020000u)
  30804. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_817_SHIFT (0x00000011u)
  30805. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_817_RESETVAL (0x00000000u)
  30806. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_818_MASK (0x00040000u)
  30807. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_818_SHIFT (0x00000012u)
  30808. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_818_RESETVAL (0x00000000u)
  30809. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_819_MASK (0x00080000u)
  30810. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_819_SHIFT (0x00000013u)
  30811. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_819_RESETVAL (0x00000000u)
  30812. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_820_MASK (0x00100000u)
  30813. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_820_SHIFT (0x00000014u)
  30814. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_820_RESETVAL (0x00000000u)
  30815. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_821_MASK (0x00200000u)
  30816. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_821_SHIFT (0x00000015u)
  30817. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_821_RESETVAL (0x00000000u)
  30818. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_822_MASK (0x00400000u)
  30819. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_822_SHIFT (0x00000016u)
  30820. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_822_RESETVAL (0x00000000u)
  30821. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_823_MASK (0x00800000u)
  30822. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_823_SHIFT (0x00000017u)
  30823. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_823_RESETVAL (0x00000000u)
  30824. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_824_MASK (0x01000000u)
  30825. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_824_SHIFT (0x00000018u)
  30826. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_824_RESETVAL (0x00000000u)
  30827. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_825_MASK (0x02000000u)
  30828. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_825_SHIFT (0x00000019u)
  30829. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_825_RESETVAL (0x00000000u)
  30830. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_826_MASK (0x04000000u)
  30831. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_826_SHIFT (0x0000001Au)
  30832. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_826_RESETVAL (0x00000000u)
  30833. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_827_MASK (0x08000000u)
  30834. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_827_SHIFT (0x0000001Bu)
  30835. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_827_RESETVAL (0x00000000u)
  30836. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_828_MASK (0x10000000u)
  30837. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_828_SHIFT (0x0000001Cu)
  30838. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_828_RESETVAL (0x00000000u)
  30839. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_829_MASK (0x20000000u)
  30840. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_829_SHIFT (0x0000001Du)
  30841. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_829_RESETVAL (0x00000000u)
  30842. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_830_MASK (0x40000000u)
  30843. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_830_SHIFT (0x0000001Eu)
  30844. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_830_RESETVAL (0x00000000u)
  30845. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_831_MASK (0x80000000u)
  30846. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_831_SHIFT (0x0000001Fu)
  30847. #define CSL_CPINTC_SECURE_ENABLE_REG25_SECURE_ENABLE_831_RESETVAL (0x00000000u)
  30848. #define CSL_CPINTC_SECURE_ENABLE_REG25_RESETVAL (0x00000000u)
  30849. /* secure_enable_reg26 */
  30850. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_832_MASK (0x00000001u)
  30851. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_832_SHIFT (0x00000000u)
  30852. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_832_RESETVAL (0x00000000u)
  30853. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_833_MASK (0x00000002u)
  30854. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_833_SHIFT (0x00000001u)
  30855. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_833_RESETVAL (0x00000000u)
  30856. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_834_MASK (0x00000004u)
  30857. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_834_SHIFT (0x00000002u)
  30858. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_834_RESETVAL (0x00000000u)
  30859. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_835_MASK (0x00000008u)
  30860. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_835_SHIFT (0x00000003u)
  30861. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_835_RESETVAL (0x00000000u)
  30862. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_836_MASK (0x00000010u)
  30863. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_836_SHIFT (0x00000004u)
  30864. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_836_RESETVAL (0x00000000u)
  30865. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_837_MASK (0x00000020u)
  30866. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_837_SHIFT (0x00000005u)
  30867. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_837_RESETVAL (0x00000000u)
  30868. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_838_MASK (0x00000040u)
  30869. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_838_SHIFT (0x00000006u)
  30870. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_838_RESETVAL (0x00000000u)
  30871. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_839_MASK (0x00000080u)
  30872. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_839_SHIFT (0x00000007u)
  30873. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_839_RESETVAL (0x00000000u)
  30874. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_840_MASK (0x00000100u)
  30875. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_840_SHIFT (0x00000008u)
  30876. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_840_RESETVAL (0x00000000u)
  30877. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_841_MASK (0x00000200u)
  30878. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_841_SHIFT (0x00000009u)
  30879. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_841_RESETVAL (0x00000000u)
  30880. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_842_MASK (0x00000400u)
  30881. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_842_SHIFT (0x0000000Au)
  30882. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_842_RESETVAL (0x00000000u)
  30883. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_843_MASK (0x00000800u)
  30884. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_843_SHIFT (0x0000000Bu)
  30885. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_843_RESETVAL (0x00000000u)
  30886. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_844_MASK (0x00001000u)
  30887. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_844_SHIFT (0x0000000Cu)
  30888. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_844_RESETVAL (0x00000000u)
  30889. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_845_MASK (0x00002000u)
  30890. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_845_SHIFT (0x0000000Du)
  30891. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_845_RESETVAL (0x00000000u)
  30892. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_846_MASK (0x00004000u)
  30893. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_846_SHIFT (0x0000000Eu)
  30894. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_846_RESETVAL (0x00000000u)
  30895. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_847_MASK (0x00008000u)
  30896. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_847_SHIFT (0x0000000Fu)
  30897. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_847_RESETVAL (0x00000000u)
  30898. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_848_MASK (0x00010000u)
  30899. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_848_SHIFT (0x00000010u)
  30900. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_848_RESETVAL (0x00000000u)
  30901. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_849_MASK (0x00020000u)
  30902. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_849_SHIFT (0x00000011u)
  30903. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_849_RESETVAL (0x00000000u)
  30904. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_850_MASK (0x00040000u)
  30905. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_850_SHIFT (0x00000012u)
  30906. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_850_RESETVAL (0x00000000u)
  30907. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_851_MASK (0x00080000u)
  30908. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_851_SHIFT (0x00000013u)
  30909. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_851_RESETVAL (0x00000000u)
  30910. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_852_MASK (0x00100000u)
  30911. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_852_SHIFT (0x00000014u)
  30912. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_852_RESETVAL (0x00000000u)
  30913. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_853_MASK (0x00200000u)
  30914. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_853_SHIFT (0x00000015u)
  30915. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_853_RESETVAL (0x00000000u)
  30916. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_854_MASK (0x00400000u)
  30917. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_854_SHIFT (0x00000016u)
  30918. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_854_RESETVAL (0x00000000u)
  30919. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_855_MASK (0x00800000u)
  30920. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_855_SHIFT (0x00000017u)
  30921. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_855_RESETVAL (0x00000000u)
  30922. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_856_MASK (0x01000000u)
  30923. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_856_SHIFT (0x00000018u)
  30924. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_856_RESETVAL (0x00000000u)
  30925. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_857_MASK (0x02000000u)
  30926. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_857_SHIFT (0x00000019u)
  30927. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_857_RESETVAL (0x00000000u)
  30928. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_858_MASK (0x04000000u)
  30929. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_858_SHIFT (0x0000001Au)
  30930. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_858_RESETVAL (0x00000000u)
  30931. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_859_MASK (0x08000000u)
  30932. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_859_SHIFT (0x0000001Bu)
  30933. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_859_RESETVAL (0x00000000u)
  30934. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_860_MASK (0x10000000u)
  30935. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_860_SHIFT (0x0000001Cu)
  30936. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_860_RESETVAL (0x00000000u)
  30937. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_861_MASK (0x20000000u)
  30938. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_861_SHIFT (0x0000001Du)
  30939. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_861_RESETVAL (0x00000000u)
  30940. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_862_MASK (0x40000000u)
  30941. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_862_SHIFT (0x0000001Eu)
  30942. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_862_RESETVAL (0x00000000u)
  30943. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_863_MASK (0x80000000u)
  30944. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_863_SHIFT (0x0000001Fu)
  30945. #define CSL_CPINTC_SECURE_ENABLE_REG26_SECURE_ENABLE_863_RESETVAL (0x00000000u)
  30946. #define CSL_CPINTC_SECURE_ENABLE_REG26_RESETVAL (0x00000000u)
  30947. /* secure_enable_reg27 */
  30948. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_864_MASK (0x00000001u)
  30949. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_864_SHIFT (0x00000000u)
  30950. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_864_RESETVAL (0x00000000u)
  30951. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_865_MASK (0x00000002u)
  30952. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_865_SHIFT (0x00000001u)
  30953. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_865_RESETVAL (0x00000000u)
  30954. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_866_MASK (0x00000004u)
  30955. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_866_SHIFT (0x00000002u)
  30956. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_866_RESETVAL (0x00000000u)
  30957. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_867_MASK (0x00000008u)
  30958. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_867_SHIFT (0x00000003u)
  30959. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_867_RESETVAL (0x00000000u)
  30960. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_868_MASK (0x00000010u)
  30961. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_868_SHIFT (0x00000004u)
  30962. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_868_RESETVAL (0x00000000u)
  30963. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_869_MASK (0x00000020u)
  30964. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_869_SHIFT (0x00000005u)
  30965. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_869_RESETVAL (0x00000000u)
  30966. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_870_MASK (0x00000040u)
  30967. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_870_SHIFT (0x00000006u)
  30968. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_870_RESETVAL (0x00000000u)
  30969. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_871_MASK (0x00000080u)
  30970. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_871_SHIFT (0x00000007u)
  30971. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_871_RESETVAL (0x00000000u)
  30972. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_872_MASK (0x00000100u)
  30973. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_872_SHIFT (0x00000008u)
  30974. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_872_RESETVAL (0x00000000u)
  30975. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_873_MASK (0x00000200u)
  30976. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_873_SHIFT (0x00000009u)
  30977. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_873_RESETVAL (0x00000000u)
  30978. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_874_MASK (0x00000400u)
  30979. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_874_SHIFT (0x0000000Au)
  30980. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_874_RESETVAL (0x00000000u)
  30981. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_875_MASK (0x00000800u)
  30982. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_875_SHIFT (0x0000000Bu)
  30983. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_875_RESETVAL (0x00000000u)
  30984. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_876_MASK (0x00001000u)
  30985. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_876_SHIFT (0x0000000Cu)
  30986. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_876_RESETVAL (0x00000000u)
  30987. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_877_MASK (0x00002000u)
  30988. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_877_SHIFT (0x0000000Du)
  30989. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_877_RESETVAL (0x00000000u)
  30990. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_878_MASK (0x00004000u)
  30991. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_878_SHIFT (0x0000000Eu)
  30992. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_878_RESETVAL (0x00000000u)
  30993. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_879_MASK (0x00008000u)
  30994. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_879_SHIFT (0x0000000Fu)
  30995. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_879_RESETVAL (0x00000000u)
  30996. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_880_MASK (0x00010000u)
  30997. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_880_SHIFT (0x00000010u)
  30998. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_880_RESETVAL (0x00000000u)
  30999. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_881_MASK (0x00020000u)
  31000. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_881_SHIFT (0x00000011u)
  31001. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_881_RESETVAL (0x00000000u)
  31002. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_882_MASK (0x00040000u)
  31003. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_882_SHIFT (0x00000012u)
  31004. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_882_RESETVAL (0x00000000u)
  31005. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_883_MASK (0x00080000u)
  31006. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_883_SHIFT (0x00000013u)
  31007. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_883_RESETVAL (0x00000000u)
  31008. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_884_MASK (0x00100000u)
  31009. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_884_SHIFT (0x00000014u)
  31010. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_884_RESETVAL (0x00000000u)
  31011. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_885_MASK (0x00200000u)
  31012. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_885_SHIFT (0x00000015u)
  31013. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_885_RESETVAL (0x00000000u)
  31014. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_886_MASK (0x00400000u)
  31015. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_886_SHIFT (0x00000016u)
  31016. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_886_RESETVAL (0x00000000u)
  31017. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_887_MASK (0x00800000u)
  31018. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_887_SHIFT (0x00000017u)
  31019. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_887_RESETVAL (0x00000000u)
  31020. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_888_MASK (0x01000000u)
  31021. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_888_SHIFT (0x00000018u)
  31022. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_888_RESETVAL (0x00000000u)
  31023. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_889_MASK (0x02000000u)
  31024. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_889_SHIFT (0x00000019u)
  31025. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_889_RESETVAL (0x00000000u)
  31026. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_890_MASK (0x04000000u)
  31027. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_890_SHIFT (0x0000001Au)
  31028. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_890_RESETVAL (0x00000000u)
  31029. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_891_MASK (0x08000000u)
  31030. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_891_SHIFT (0x0000001Bu)
  31031. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_891_RESETVAL (0x00000000u)
  31032. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_892_MASK (0x10000000u)
  31033. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_892_SHIFT (0x0000001Cu)
  31034. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_892_RESETVAL (0x00000000u)
  31035. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_893_MASK (0x20000000u)
  31036. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_893_SHIFT (0x0000001Du)
  31037. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_893_RESETVAL (0x00000000u)
  31038. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_894_MASK (0x40000000u)
  31039. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_894_SHIFT (0x0000001Eu)
  31040. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_894_RESETVAL (0x00000000u)
  31041. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_895_MASK (0x80000000u)
  31042. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_895_SHIFT (0x0000001Fu)
  31043. #define CSL_CPINTC_SECURE_ENABLE_REG27_SECURE_ENABLE_895_RESETVAL (0x00000000u)
  31044. #define CSL_CPINTC_SECURE_ENABLE_REG27_RESETVAL (0x00000000u)
  31045. /* secure_enable_reg28 */
  31046. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_896_MASK (0x00000001u)
  31047. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_896_SHIFT (0x00000000u)
  31048. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_896_RESETVAL (0x00000000u)
  31049. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_897_MASK (0x00000002u)
  31050. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_897_SHIFT (0x00000001u)
  31051. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_897_RESETVAL (0x00000000u)
  31052. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_898_MASK (0x00000004u)
  31053. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_898_SHIFT (0x00000002u)
  31054. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_898_RESETVAL (0x00000000u)
  31055. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_899_MASK (0x00000008u)
  31056. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_899_SHIFT (0x00000003u)
  31057. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_899_RESETVAL (0x00000000u)
  31058. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_900_MASK (0x00000010u)
  31059. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_900_SHIFT (0x00000004u)
  31060. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_900_RESETVAL (0x00000000u)
  31061. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_901_MASK (0x00000020u)
  31062. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_901_SHIFT (0x00000005u)
  31063. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_901_RESETVAL (0x00000000u)
  31064. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_902_MASK (0x00000040u)
  31065. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_902_SHIFT (0x00000006u)
  31066. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_902_RESETVAL (0x00000000u)
  31067. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_903_MASK (0x00000080u)
  31068. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_903_SHIFT (0x00000007u)
  31069. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_903_RESETVAL (0x00000000u)
  31070. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_904_MASK (0x00000100u)
  31071. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_904_SHIFT (0x00000008u)
  31072. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_904_RESETVAL (0x00000000u)
  31073. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_905_MASK (0x00000200u)
  31074. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_905_SHIFT (0x00000009u)
  31075. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_905_RESETVAL (0x00000000u)
  31076. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_906_MASK (0x00000400u)
  31077. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_906_SHIFT (0x0000000Au)
  31078. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_906_RESETVAL (0x00000000u)
  31079. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_907_MASK (0x00000800u)
  31080. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_907_SHIFT (0x0000000Bu)
  31081. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_907_RESETVAL (0x00000000u)
  31082. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_908_MASK (0x00001000u)
  31083. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_908_SHIFT (0x0000000Cu)
  31084. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_908_RESETVAL (0x00000000u)
  31085. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_909_MASK (0x00002000u)
  31086. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_909_SHIFT (0x0000000Du)
  31087. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_909_RESETVAL (0x00000000u)
  31088. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_910_MASK (0x00004000u)
  31089. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_910_SHIFT (0x0000000Eu)
  31090. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_910_RESETVAL (0x00000000u)
  31091. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_911_MASK (0x00008000u)
  31092. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_911_SHIFT (0x0000000Fu)
  31093. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_911_RESETVAL (0x00000000u)
  31094. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_912_MASK (0x00010000u)
  31095. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_912_SHIFT (0x00000010u)
  31096. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_912_RESETVAL (0x00000000u)
  31097. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_913_MASK (0x00020000u)
  31098. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_913_SHIFT (0x00000011u)
  31099. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_913_RESETVAL (0x00000000u)
  31100. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_914_MASK (0x00040000u)
  31101. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_914_SHIFT (0x00000012u)
  31102. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_914_RESETVAL (0x00000000u)
  31103. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_915_MASK (0x00080000u)
  31104. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_915_SHIFT (0x00000013u)
  31105. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_915_RESETVAL (0x00000000u)
  31106. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_916_MASK (0x00100000u)
  31107. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_916_SHIFT (0x00000014u)
  31108. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_916_RESETVAL (0x00000000u)
  31109. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_917_MASK (0x00200000u)
  31110. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_917_SHIFT (0x00000015u)
  31111. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_917_RESETVAL (0x00000000u)
  31112. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_918_MASK (0x00400000u)
  31113. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_918_SHIFT (0x00000016u)
  31114. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_918_RESETVAL (0x00000000u)
  31115. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_919_MASK (0x00800000u)
  31116. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_919_SHIFT (0x00000017u)
  31117. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_919_RESETVAL (0x00000000u)
  31118. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_920_MASK (0x01000000u)
  31119. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_920_SHIFT (0x00000018u)
  31120. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_920_RESETVAL (0x00000000u)
  31121. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_921_MASK (0x02000000u)
  31122. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_921_SHIFT (0x00000019u)
  31123. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_921_RESETVAL (0x00000000u)
  31124. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_922_MASK (0x04000000u)
  31125. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_922_SHIFT (0x0000001Au)
  31126. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_922_RESETVAL (0x00000000u)
  31127. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_923_MASK (0x08000000u)
  31128. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_923_SHIFT (0x0000001Bu)
  31129. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_923_RESETVAL (0x00000000u)
  31130. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_924_MASK (0x10000000u)
  31131. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_924_SHIFT (0x0000001Cu)
  31132. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_924_RESETVAL (0x00000000u)
  31133. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_925_MASK (0x20000000u)
  31134. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_925_SHIFT (0x0000001Du)
  31135. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_925_RESETVAL (0x00000000u)
  31136. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_926_MASK (0x40000000u)
  31137. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_926_SHIFT (0x0000001Eu)
  31138. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_926_RESETVAL (0x00000000u)
  31139. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_927_MASK (0x80000000u)
  31140. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_927_SHIFT (0x0000001Fu)
  31141. #define CSL_CPINTC_SECURE_ENABLE_REG28_SECURE_ENABLE_927_RESETVAL (0x00000000u)
  31142. #define CSL_CPINTC_SECURE_ENABLE_REG28_RESETVAL (0x00000000u)
  31143. /* secure_enable_reg29 */
  31144. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_928_MASK (0x00000001u)
  31145. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_928_SHIFT (0x00000000u)
  31146. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_928_RESETVAL (0x00000000u)
  31147. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_929_MASK (0x00000002u)
  31148. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_929_SHIFT (0x00000001u)
  31149. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_929_RESETVAL (0x00000000u)
  31150. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_930_MASK (0x00000004u)
  31151. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_930_SHIFT (0x00000002u)
  31152. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_930_RESETVAL (0x00000000u)
  31153. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_931_MASK (0x00000008u)
  31154. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_931_SHIFT (0x00000003u)
  31155. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_931_RESETVAL (0x00000000u)
  31156. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_932_MASK (0x00000010u)
  31157. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_932_SHIFT (0x00000004u)
  31158. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_932_RESETVAL (0x00000000u)
  31159. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_933_MASK (0x00000020u)
  31160. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_933_SHIFT (0x00000005u)
  31161. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_933_RESETVAL (0x00000000u)
  31162. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_934_MASK (0x00000040u)
  31163. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_934_SHIFT (0x00000006u)
  31164. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_934_RESETVAL (0x00000000u)
  31165. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_935_MASK (0x00000080u)
  31166. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_935_SHIFT (0x00000007u)
  31167. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_935_RESETVAL (0x00000000u)
  31168. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_936_MASK (0x00000100u)
  31169. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_936_SHIFT (0x00000008u)
  31170. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_936_RESETVAL (0x00000000u)
  31171. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_937_MASK (0x00000200u)
  31172. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_937_SHIFT (0x00000009u)
  31173. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_937_RESETVAL (0x00000000u)
  31174. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_938_MASK (0x00000400u)
  31175. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_938_SHIFT (0x0000000Au)
  31176. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_938_RESETVAL (0x00000000u)
  31177. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_939_MASK (0x00000800u)
  31178. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_939_SHIFT (0x0000000Bu)
  31179. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_939_RESETVAL (0x00000000u)
  31180. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_940_MASK (0x00001000u)
  31181. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_940_SHIFT (0x0000000Cu)
  31182. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_940_RESETVAL (0x00000000u)
  31183. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_941_MASK (0x00002000u)
  31184. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_941_SHIFT (0x0000000Du)
  31185. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_941_RESETVAL (0x00000000u)
  31186. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_942_MASK (0x00004000u)
  31187. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_942_SHIFT (0x0000000Eu)
  31188. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_942_RESETVAL (0x00000000u)
  31189. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_943_MASK (0x00008000u)
  31190. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_943_SHIFT (0x0000000Fu)
  31191. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_943_RESETVAL (0x00000000u)
  31192. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_944_MASK (0x00010000u)
  31193. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_944_SHIFT (0x00000010u)
  31194. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_944_RESETVAL (0x00000000u)
  31195. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_945_MASK (0x00020000u)
  31196. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_945_SHIFT (0x00000011u)
  31197. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_945_RESETVAL (0x00000000u)
  31198. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_946_MASK (0x00040000u)
  31199. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_946_SHIFT (0x00000012u)
  31200. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_946_RESETVAL (0x00000000u)
  31201. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_947_MASK (0x00080000u)
  31202. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_947_SHIFT (0x00000013u)
  31203. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_947_RESETVAL (0x00000000u)
  31204. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_948_MASK (0x00100000u)
  31205. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_948_SHIFT (0x00000014u)
  31206. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_948_RESETVAL (0x00000000u)
  31207. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_949_MASK (0x00200000u)
  31208. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_949_SHIFT (0x00000015u)
  31209. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_949_RESETVAL (0x00000000u)
  31210. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_950_MASK (0x00400000u)
  31211. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_950_SHIFT (0x00000016u)
  31212. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_950_RESETVAL (0x00000000u)
  31213. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_951_MASK (0x00800000u)
  31214. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_951_SHIFT (0x00000017u)
  31215. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_951_RESETVAL (0x00000000u)
  31216. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_952_MASK (0x01000000u)
  31217. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_952_SHIFT (0x00000018u)
  31218. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_952_RESETVAL (0x00000000u)
  31219. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_953_MASK (0x02000000u)
  31220. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_953_SHIFT (0x00000019u)
  31221. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_953_RESETVAL (0x00000000u)
  31222. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_954_MASK (0x04000000u)
  31223. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_954_SHIFT (0x0000001Au)
  31224. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_954_RESETVAL (0x00000000u)
  31225. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_955_MASK (0x08000000u)
  31226. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_955_SHIFT (0x0000001Bu)
  31227. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_955_RESETVAL (0x00000000u)
  31228. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_956_MASK (0x10000000u)
  31229. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_956_SHIFT (0x0000001Cu)
  31230. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_956_RESETVAL (0x00000000u)
  31231. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_957_MASK (0x20000000u)
  31232. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_957_SHIFT (0x0000001Du)
  31233. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_957_RESETVAL (0x00000000u)
  31234. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_958_MASK (0x40000000u)
  31235. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_958_SHIFT (0x0000001Eu)
  31236. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_958_RESETVAL (0x00000000u)
  31237. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_959_MASK (0x80000000u)
  31238. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_959_SHIFT (0x0000001Fu)
  31239. #define CSL_CPINTC_SECURE_ENABLE_REG29_SECURE_ENABLE_959_RESETVAL (0x00000000u)
  31240. #define CSL_CPINTC_SECURE_ENABLE_REG29_RESETVAL (0x00000000u)
  31241. /* secure_enable_reg30 */
  31242. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_960_MASK (0x00000001u)
  31243. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_960_SHIFT (0x00000000u)
  31244. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_960_RESETVAL (0x00000000u)
  31245. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_961_MASK (0x00000002u)
  31246. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_961_SHIFT (0x00000001u)
  31247. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_961_RESETVAL (0x00000000u)
  31248. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_962_MASK (0x00000004u)
  31249. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_962_SHIFT (0x00000002u)
  31250. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_962_RESETVAL (0x00000000u)
  31251. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_963_MASK (0x00000008u)
  31252. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_963_SHIFT (0x00000003u)
  31253. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_963_RESETVAL (0x00000000u)
  31254. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_964_MASK (0x00000010u)
  31255. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_964_SHIFT (0x00000004u)
  31256. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_964_RESETVAL (0x00000000u)
  31257. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_965_MASK (0x00000020u)
  31258. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_965_SHIFT (0x00000005u)
  31259. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_965_RESETVAL (0x00000000u)
  31260. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_966_MASK (0x00000040u)
  31261. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_966_SHIFT (0x00000006u)
  31262. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_966_RESETVAL (0x00000000u)
  31263. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_967_MASK (0x00000080u)
  31264. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_967_SHIFT (0x00000007u)
  31265. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_967_RESETVAL (0x00000000u)
  31266. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_968_MASK (0x00000100u)
  31267. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_968_SHIFT (0x00000008u)
  31268. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_968_RESETVAL (0x00000000u)
  31269. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_969_MASK (0x00000200u)
  31270. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_969_SHIFT (0x00000009u)
  31271. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_969_RESETVAL (0x00000000u)
  31272. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_970_MASK (0x00000400u)
  31273. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_970_SHIFT (0x0000000Au)
  31274. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_970_RESETVAL (0x00000000u)
  31275. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_971_MASK (0x00000800u)
  31276. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_971_SHIFT (0x0000000Bu)
  31277. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_971_RESETVAL (0x00000000u)
  31278. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_972_MASK (0x00001000u)
  31279. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_972_SHIFT (0x0000000Cu)
  31280. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_972_RESETVAL (0x00000000u)
  31281. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_973_MASK (0x00002000u)
  31282. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_973_SHIFT (0x0000000Du)
  31283. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_973_RESETVAL (0x00000000u)
  31284. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_974_MASK (0x00004000u)
  31285. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_974_SHIFT (0x0000000Eu)
  31286. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_974_RESETVAL (0x00000000u)
  31287. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_975_MASK (0x00008000u)
  31288. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_975_SHIFT (0x0000000Fu)
  31289. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_975_RESETVAL (0x00000000u)
  31290. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_976_MASK (0x00010000u)
  31291. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_976_SHIFT (0x00000010u)
  31292. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_976_RESETVAL (0x00000000u)
  31293. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_977_MASK (0x00020000u)
  31294. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_977_SHIFT (0x00000011u)
  31295. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_977_RESETVAL (0x00000000u)
  31296. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_978_MASK (0x00040000u)
  31297. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_978_SHIFT (0x00000012u)
  31298. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_978_RESETVAL (0x00000000u)
  31299. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_979_MASK (0x00080000u)
  31300. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_979_SHIFT (0x00000013u)
  31301. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_979_RESETVAL (0x00000000u)
  31302. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_980_MASK (0x00100000u)
  31303. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_980_SHIFT (0x00000014u)
  31304. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_980_RESETVAL (0x00000000u)
  31305. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_981_MASK (0x00200000u)
  31306. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_981_SHIFT (0x00000015u)
  31307. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_981_RESETVAL (0x00000000u)
  31308. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_982_MASK (0x00400000u)
  31309. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_982_SHIFT (0x00000016u)
  31310. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_982_RESETVAL (0x00000000u)
  31311. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_983_MASK (0x00800000u)
  31312. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_983_SHIFT (0x00000017u)
  31313. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_983_RESETVAL (0x00000000u)
  31314. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_984_MASK (0x01000000u)
  31315. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_984_SHIFT (0x00000018u)
  31316. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_984_RESETVAL (0x00000000u)
  31317. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_985_MASK (0x02000000u)
  31318. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_985_SHIFT (0x00000019u)
  31319. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_985_RESETVAL (0x00000000u)
  31320. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_986_MASK (0x04000000u)
  31321. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_986_SHIFT (0x0000001Au)
  31322. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_986_RESETVAL (0x00000000u)
  31323. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_987_MASK (0x08000000u)
  31324. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_987_SHIFT (0x0000001Bu)
  31325. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_987_RESETVAL (0x00000000u)
  31326. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_988_MASK (0x10000000u)
  31327. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_988_SHIFT (0x0000001Cu)
  31328. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_988_RESETVAL (0x00000000u)
  31329. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_989_MASK (0x20000000u)
  31330. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_989_SHIFT (0x0000001Du)
  31331. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_989_RESETVAL (0x00000000u)
  31332. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_990_MASK (0x40000000u)
  31333. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_990_SHIFT (0x0000001Eu)
  31334. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_990_RESETVAL (0x00000000u)
  31335. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_991_MASK (0x80000000u)
  31336. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_991_SHIFT (0x0000001Fu)
  31337. #define CSL_CPINTC_SECURE_ENABLE_REG30_SECURE_ENABLE_991_RESETVAL (0x00000000u)
  31338. #define CSL_CPINTC_SECURE_ENABLE_REG30_RESETVAL (0x00000000u)
  31339. /* secure_enable_reg31 */
  31340. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_992_MASK (0x00000001u)
  31341. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_992_SHIFT (0x00000000u)
  31342. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_992_RESETVAL (0x00000000u)
  31343. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_993_MASK (0x00000002u)
  31344. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_993_SHIFT (0x00000001u)
  31345. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_993_RESETVAL (0x00000000u)
  31346. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_994_MASK (0x00000004u)
  31347. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_994_SHIFT (0x00000002u)
  31348. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_994_RESETVAL (0x00000000u)
  31349. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_995_MASK (0x00000008u)
  31350. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_995_SHIFT (0x00000003u)
  31351. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_995_RESETVAL (0x00000000u)
  31352. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_996_MASK (0x00000010u)
  31353. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_996_SHIFT (0x00000004u)
  31354. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_996_RESETVAL (0x00000000u)
  31355. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_997_MASK (0x00000020u)
  31356. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_997_SHIFT (0x00000005u)
  31357. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_997_RESETVAL (0x00000000u)
  31358. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_998_MASK (0x00000040u)
  31359. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_998_SHIFT (0x00000006u)
  31360. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_998_RESETVAL (0x00000000u)
  31361. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_999_MASK (0x00000080u)
  31362. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_999_SHIFT (0x00000007u)
  31363. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_999_RESETVAL (0x00000000u)
  31364. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1000_MASK (0x00000100u)
  31365. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1000_SHIFT (0x00000008u)
  31366. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1000_RESETVAL (0x00000000u)
  31367. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1001_MASK (0x00000200u)
  31368. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1001_SHIFT (0x00000009u)
  31369. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1001_RESETVAL (0x00000000u)
  31370. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1002_MASK (0x00000400u)
  31371. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1002_SHIFT (0x0000000Au)
  31372. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1002_RESETVAL (0x00000000u)
  31373. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1003_MASK (0x00000800u)
  31374. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1003_SHIFT (0x0000000Bu)
  31375. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1003_RESETVAL (0x00000000u)
  31376. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1004_MASK (0x00001000u)
  31377. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1004_SHIFT (0x0000000Cu)
  31378. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1004_RESETVAL (0x00000000u)
  31379. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1005_MASK (0x00002000u)
  31380. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1005_SHIFT (0x0000000Du)
  31381. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1005_RESETVAL (0x00000000u)
  31382. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1006_MASK (0x00004000u)
  31383. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1006_SHIFT (0x0000000Eu)
  31384. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1006_RESETVAL (0x00000000u)
  31385. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1007_MASK (0x00008000u)
  31386. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1007_SHIFT (0x0000000Fu)
  31387. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1007_RESETVAL (0x00000000u)
  31388. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1008_MASK (0x00010000u)
  31389. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1008_SHIFT (0x00000010u)
  31390. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1008_RESETVAL (0x00000000u)
  31391. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1009_MASK (0x00020000u)
  31392. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1009_SHIFT (0x00000011u)
  31393. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1009_RESETVAL (0x00000000u)
  31394. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1010_MASK (0x00040000u)
  31395. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1010_SHIFT (0x00000012u)
  31396. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1010_RESETVAL (0x00000000u)
  31397. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1011_MASK (0x00080000u)
  31398. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1011_SHIFT (0x00000013u)
  31399. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1011_RESETVAL (0x00000000u)
  31400. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1012_MASK (0x00100000u)
  31401. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1012_SHIFT (0x00000014u)
  31402. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1012_RESETVAL (0x00000000u)
  31403. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1013_MASK (0x00200000u)
  31404. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1013_SHIFT (0x00000015u)
  31405. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1013_RESETVAL (0x00000000u)
  31406. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1014_MASK (0x00400000u)
  31407. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1014_SHIFT (0x00000016u)
  31408. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1014_RESETVAL (0x00000000u)
  31409. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1015_MASK (0x00800000u)
  31410. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1015_SHIFT (0x00000017u)
  31411. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1015_RESETVAL (0x00000000u)
  31412. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1016_MASK (0x01000000u)
  31413. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1016_SHIFT (0x00000018u)
  31414. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1016_RESETVAL (0x00000000u)
  31415. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1017_MASK (0x02000000u)
  31416. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1017_SHIFT (0x00000019u)
  31417. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1017_RESETVAL (0x00000000u)
  31418. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1018_MASK (0x04000000u)
  31419. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1018_SHIFT (0x0000001Au)
  31420. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1018_RESETVAL (0x00000000u)
  31421. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1019_MASK (0x08000000u)
  31422. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1019_SHIFT (0x0000001Bu)
  31423. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1019_RESETVAL (0x00000000u)
  31424. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1020_MASK (0x10000000u)
  31425. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1020_SHIFT (0x0000001Cu)
  31426. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1020_RESETVAL (0x00000000u)
  31427. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1021_MASK (0x20000000u)
  31428. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1021_SHIFT (0x0000001Du)
  31429. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1021_RESETVAL (0x00000000u)
  31430. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1022_MASK (0x40000000u)
  31431. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1022_SHIFT (0x0000001Eu)
  31432. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1022_RESETVAL (0x00000000u)
  31433. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1023_MASK (0x80000000u)
  31434. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1023_SHIFT (0x0000001Fu)
  31435. #define CSL_CPINTC_SECURE_ENABLE_REG31_SECURE_ENABLE_1023_RESETVAL (0x00000000u)
  31436. #define CSL_CPINTC_SECURE_ENABLE_REG31_RESETVAL (0x00000000u)
  31437. /* secure_enable_clr_reg0 */
  31438. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_0_CLR_MASK (0x00000001u)
  31439. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_0_CLR_SHIFT (0x00000000u)
  31440. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_0_CLR_RESETVAL (0x00000000u)
  31441. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_1_CLR_MASK (0x00000002u)
  31442. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_1_CLR_SHIFT (0x00000001u)
  31443. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_1_CLR_RESETVAL (0x00000000u)
  31444. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_2_CLR_MASK (0x00000004u)
  31445. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_2_CLR_SHIFT (0x00000002u)
  31446. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_2_CLR_RESETVAL (0x00000000u)
  31447. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_3_CLR_MASK (0x00000008u)
  31448. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_3_CLR_SHIFT (0x00000003u)
  31449. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_3_CLR_RESETVAL (0x00000000u)
  31450. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_4_CLR_MASK (0x00000010u)
  31451. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_4_CLR_SHIFT (0x00000004u)
  31452. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_4_CLR_RESETVAL (0x00000000u)
  31453. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_5_CLR_MASK (0x00000020u)
  31454. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_5_CLR_SHIFT (0x00000005u)
  31455. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_5_CLR_RESETVAL (0x00000000u)
  31456. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_6_CLR_MASK (0x00000040u)
  31457. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_6_CLR_SHIFT (0x00000006u)
  31458. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_6_CLR_RESETVAL (0x00000000u)
  31459. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_7_CLR_MASK (0x00000080u)
  31460. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_7_CLR_SHIFT (0x00000007u)
  31461. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_7_CLR_RESETVAL (0x00000000u)
  31462. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_8_CLR_MASK (0x00000100u)
  31463. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_8_CLR_SHIFT (0x00000008u)
  31464. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_8_CLR_RESETVAL (0x00000000u)
  31465. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_9_CLR_MASK (0x00000200u)
  31466. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_9_CLR_SHIFT (0x00000009u)
  31467. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_9_CLR_RESETVAL (0x00000000u)
  31468. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_10_CLR_MASK (0x00000400u)
  31469. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_10_CLR_SHIFT (0x0000000Au)
  31470. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_10_CLR_RESETVAL (0x00000000u)
  31471. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_11_CLR_MASK (0x00000800u)
  31472. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_11_CLR_SHIFT (0x0000000Bu)
  31473. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_11_CLR_RESETVAL (0x00000000u)
  31474. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_12_CLR_MASK (0x00001000u)
  31475. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_12_CLR_SHIFT (0x0000000Cu)
  31476. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_12_CLR_RESETVAL (0x00000000u)
  31477. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_13_CLR_MASK (0x00002000u)
  31478. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_13_CLR_SHIFT (0x0000000Du)
  31479. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_13_CLR_RESETVAL (0x00000000u)
  31480. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_14_CLR_MASK (0x00004000u)
  31481. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_14_CLR_SHIFT (0x0000000Eu)
  31482. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_14_CLR_RESETVAL (0x00000000u)
  31483. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_15_CLR_MASK (0x00008000u)
  31484. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_15_CLR_SHIFT (0x0000000Fu)
  31485. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_15_CLR_RESETVAL (0x00000000u)
  31486. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_16_CLR_MASK (0x00010000u)
  31487. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_16_CLR_SHIFT (0x00000010u)
  31488. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_16_CLR_RESETVAL (0x00000000u)
  31489. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_17_CLR_MASK (0x00020000u)
  31490. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_17_CLR_SHIFT (0x00000011u)
  31491. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_17_CLR_RESETVAL (0x00000000u)
  31492. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_18_CLR_MASK (0x00040000u)
  31493. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_18_CLR_SHIFT (0x00000012u)
  31494. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_18_CLR_RESETVAL (0x00000000u)
  31495. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_19_CLR_MASK (0x00080000u)
  31496. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_19_CLR_SHIFT (0x00000013u)
  31497. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_19_CLR_RESETVAL (0x00000000u)
  31498. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_20_CLR_MASK (0x00100000u)
  31499. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_20_CLR_SHIFT (0x00000014u)
  31500. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_20_CLR_RESETVAL (0x00000000u)
  31501. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_21_CLR_MASK (0x00200000u)
  31502. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_21_CLR_SHIFT (0x00000015u)
  31503. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_21_CLR_RESETVAL (0x00000000u)
  31504. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_22_CLR_MASK (0x00400000u)
  31505. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_22_CLR_SHIFT (0x00000016u)
  31506. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_22_CLR_RESETVAL (0x00000000u)
  31507. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_23_CLR_MASK (0x00800000u)
  31508. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_23_CLR_SHIFT (0x00000017u)
  31509. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_23_CLR_RESETVAL (0x00000000u)
  31510. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_24_CLR_MASK (0x01000000u)
  31511. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_24_CLR_SHIFT (0x00000018u)
  31512. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_24_CLR_RESETVAL (0x00000000u)
  31513. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_25_CLR_MASK (0x02000000u)
  31514. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_25_CLR_SHIFT (0x00000019u)
  31515. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_25_CLR_RESETVAL (0x00000000u)
  31516. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_26_CLR_MASK (0x04000000u)
  31517. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_26_CLR_SHIFT (0x0000001Au)
  31518. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_26_CLR_RESETVAL (0x00000000u)
  31519. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_27_CLR_MASK (0x08000000u)
  31520. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_27_CLR_SHIFT (0x0000001Bu)
  31521. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_27_CLR_RESETVAL (0x00000000u)
  31522. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_28_CLR_MASK (0x10000000u)
  31523. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_28_CLR_SHIFT (0x0000001Cu)
  31524. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_28_CLR_RESETVAL (0x00000000u)
  31525. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_29_CLR_MASK (0x20000000u)
  31526. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_29_CLR_SHIFT (0x0000001Du)
  31527. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_29_CLR_RESETVAL (0x00000000u)
  31528. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_30_CLR_MASK (0x40000000u)
  31529. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_30_CLR_SHIFT (0x0000001Eu)
  31530. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_30_CLR_RESETVAL (0x00000000u)
  31531. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_31_CLR_MASK (0x80000000u)
  31532. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_31_CLR_SHIFT (0x0000001Fu)
  31533. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_SECURE_ENABLE_31_CLR_RESETVAL (0x00000000u)
  31534. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG0_RESETVAL (0x00000000u)
  31535. /* secure_enable_clr_reg1 */
  31536. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_32_CLR_MASK (0x00000001u)
  31537. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_32_CLR_SHIFT (0x00000000u)
  31538. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_32_CLR_RESETVAL (0x00000000u)
  31539. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_33_CLR_MASK (0x00000002u)
  31540. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_33_CLR_SHIFT (0x00000001u)
  31541. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_33_CLR_RESETVAL (0x00000000u)
  31542. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_34_CLR_MASK (0x00000004u)
  31543. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_34_CLR_SHIFT (0x00000002u)
  31544. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_34_CLR_RESETVAL (0x00000000u)
  31545. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_35_CLR_MASK (0x00000008u)
  31546. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_35_CLR_SHIFT (0x00000003u)
  31547. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_35_CLR_RESETVAL (0x00000000u)
  31548. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_36_CLR_MASK (0x00000010u)
  31549. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_36_CLR_SHIFT (0x00000004u)
  31550. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_36_CLR_RESETVAL (0x00000000u)
  31551. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_37_CLR_MASK (0x00000020u)
  31552. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_37_CLR_SHIFT (0x00000005u)
  31553. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_37_CLR_RESETVAL (0x00000000u)
  31554. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_38_CLR_MASK (0x00000040u)
  31555. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_38_CLR_SHIFT (0x00000006u)
  31556. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_38_CLR_RESETVAL (0x00000000u)
  31557. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_39_CLR_MASK (0x00000080u)
  31558. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_39_CLR_SHIFT (0x00000007u)
  31559. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_39_CLR_RESETVAL (0x00000000u)
  31560. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_40_CLR_MASK (0x00000100u)
  31561. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_40_CLR_SHIFT (0x00000008u)
  31562. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_40_CLR_RESETVAL (0x00000000u)
  31563. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_41_CLR_MASK (0x00000200u)
  31564. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_41_CLR_SHIFT (0x00000009u)
  31565. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_41_CLR_RESETVAL (0x00000000u)
  31566. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_42_CLR_MASK (0x00000400u)
  31567. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_42_CLR_SHIFT (0x0000000Au)
  31568. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_42_CLR_RESETVAL (0x00000000u)
  31569. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_43_CLR_MASK (0x00000800u)
  31570. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_43_CLR_SHIFT (0x0000000Bu)
  31571. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_43_CLR_RESETVAL (0x00000000u)
  31572. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_44_CLR_MASK (0x00001000u)
  31573. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_44_CLR_SHIFT (0x0000000Cu)
  31574. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_44_CLR_RESETVAL (0x00000000u)
  31575. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_45_CLR_MASK (0x00002000u)
  31576. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_45_CLR_SHIFT (0x0000000Du)
  31577. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_45_CLR_RESETVAL (0x00000000u)
  31578. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_46_CLR_MASK (0x00004000u)
  31579. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_46_CLR_SHIFT (0x0000000Eu)
  31580. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_46_CLR_RESETVAL (0x00000000u)
  31581. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_47_CLR_MASK (0x00008000u)
  31582. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_47_CLR_SHIFT (0x0000000Fu)
  31583. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_47_CLR_RESETVAL (0x00000000u)
  31584. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_48_CLR_MASK (0x00010000u)
  31585. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_48_CLR_SHIFT (0x00000010u)
  31586. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_48_CLR_RESETVAL (0x00000000u)
  31587. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_49_CLR_MASK (0x00020000u)
  31588. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_49_CLR_SHIFT (0x00000011u)
  31589. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_49_CLR_RESETVAL (0x00000000u)
  31590. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_50_CLR_MASK (0x00040000u)
  31591. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_50_CLR_SHIFT (0x00000012u)
  31592. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_50_CLR_RESETVAL (0x00000000u)
  31593. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_51_CLR_MASK (0x00080000u)
  31594. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_51_CLR_SHIFT (0x00000013u)
  31595. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_51_CLR_RESETVAL (0x00000000u)
  31596. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_52_CLR_MASK (0x00100000u)
  31597. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_52_CLR_SHIFT (0x00000014u)
  31598. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_52_CLR_RESETVAL (0x00000000u)
  31599. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_53_CLR_MASK (0x00200000u)
  31600. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_53_CLR_SHIFT (0x00000015u)
  31601. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_53_CLR_RESETVAL (0x00000000u)
  31602. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_54_CLR_MASK (0x00400000u)
  31603. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_54_CLR_SHIFT (0x00000016u)
  31604. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_54_CLR_RESETVAL (0x00000000u)
  31605. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_55_CLR_MASK (0x00800000u)
  31606. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_55_CLR_SHIFT (0x00000017u)
  31607. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_55_CLR_RESETVAL (0x00000000u)
  31608. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_56_CLR_MASK (0x01000000u)
  31609. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_56_CLR_SHIFT (0x00000018u)
  31610. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_56_CLR_RESETVAL (0x00000000u)
  31611. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_57_CLR_MASK (0x02000000u)
  31612. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_57_CLR_SHIFT (0x00000019u)
  31613. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_57_CLR_RESETVAL (0x00000000u)
  31614. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_58_CLR_MASK (0x04000000u)
  31615. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_58_CLR_SHIFT (0x0000001Au)
  31616. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_58_CLR_RESETVAL (0x00000000u)
  31617. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_59_CLR_MASK (0x08000000u)
  31618. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_59_CLR_SHIFT (0x0000001Bu)
  31619. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_59_CLR_RESETVAL (0x00000000u)
  31620. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_60_CLR_MASK (0x10000000u)
  31621. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_60_CLR_SHIFT (0x0000001Cu)
  31622. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_60_CLR_RESETVAL (0x00000000u)
  31623. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_61_CLR_MASK (0x20000000u)
  31624. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_61_CLR_SHIFT (0x0000001Du)
  31625. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_61_CLR_RESETVAL (0x00000000u)
  31626. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_62_CLR_MASK (0x40000000u)
  31627. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_62_CLR_SHIFT (0x0000001Eu)
  31628. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_62_CLR_RESETVAL (0x00000000u)
  31629. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_63_CLR_MASK (0x80000000u)
  31630. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_63_CLR_SHIFT (0x0000001Fu)
  31631. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_SECURE_ENABLE_63_CLR_RESETVAL (0x00000000u)
  31632. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG1_RESETVAL (0x00000000u)
  31633. /* secure_enable_clr_reg2 */
  31634. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_64_CLR_MASK (0x00000001u)
  31635. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_64_CLR_SHIFT (0x00000000u)
  31636. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_64_CLR_RESETVAL (0x00000000u)
  31637. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_65_CLR_MASK (0x00000002u)
  31638. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_65_CLR_SHIFT (0x00000001u)
  31639. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_65_CLR_RESETVAL (0x00000000u)
  31640. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_66_CLR_MASK (0x00000004u)
  31641. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_66_CLR_SHIFT (0x00000002u)
  31642. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_66_CLR_RESETVAL (0x00000000u)
  31643. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_67_CLR_MASK (0x00000008u)
  31644. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_67_CLR_SHIFT (0x00000003u)
  31645. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_67_CLR_RESETVAL (0x00000000u)
  31646. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_68_CLR_MASK (0x00000010u)
  31647. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_68_CLR_SHIFT (0x00000004u)
  31648. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_68_CLR_RESETVAL (0x00000000u)
  31649. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_69_CLR_MASK (0x00000020u)
  31650. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_69_CLR_SHIFT (0x00000005u)
  31651. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_69_CLR_RESETVAL (0x00000000u)
  31652. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_70_CLR_MASK (0x00000040u)
  31653. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_70_CLR_SHIFT (0x00000006u)
  31654. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_70_CLR_RESETVAL (0x00000000u)
  31655. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_71_CLR_MASK (0x00000080u)
  31656. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_71_CLR_SHIFT (0x00000007u)
  31657. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_71_CLR_RESETVAL (0x00000000u)
  31658. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_72_CLR_MASK (0x00000100u)
  31659. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_72_CLR_SHIFT (0x00000008u)
  31660. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_72_CLR_RESETVAL (0x00000000u)
  31661. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_73_CLR_MASK (0x00000200u)
  31662. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_73_CLR_SHIFT (0x00000009u)
  31663. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_73_CLR_RESETVAL (0x00000000u)
  31664. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_74_CLR_MASK (0x00000400u)
  31665. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_74_CLR_SHIFT (0x0000000Au)
  31666. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_74_CLR_RESETVAL (0x00000000u)
  31667. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_75_CLR_MASK (0x00000800u)
  31668. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_75_CLR_SHIFT (0x0000000Bu)
  31669. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_75_CLR_RESETVAL (0x00000000u)
  31670. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_76_CLR_MASK (0x00001000u)
  31671. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_76_CLR_SHIFT (0x0000000Cu)
  31672. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_76_CLR_RESETVAL (0x00000000u)
  31673. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_77_CLR_MASK (0x00002000u)
  31674. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_77_CLR_SHIFT (0x0000000Du)
  31675. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_77_CLR_RESETVAL (0x00000000u)
  31676. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_78_CLR_MASK (0x00004000u)
  31677. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_78_CLR_SHIFT (0x0000000Eu)
  31678. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_78_CLR_RESETVAL (0x00000000u)
  31679. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_79_CLR_MASK (0x00008000u)
  31680. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_79_CLR_SHIFT (0x0000000Fu)
  31681. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_79_CLR_RESETVAL (0x00000000u)
  31682. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_80_CLR_MASK (0x00010000u)
  31683. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_80_CLR_SHIFT (0x00000010u)
  31684. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_80_CLR_RESETVAL (0x00000000u)
  31685. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_81_CLR_MASK (0x00020000u)
  31686. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_81_CLR_SHIFT (0x00000011u)
  31687. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_81_CLR_RESETVAL (0x00000000u)
  31688. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_82_CLR_MASK (0x00040000u)
  31689. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_82_CLR_SHIFT (0x00000012u)
  31690. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_82_CLR_RESETVAL (0x00000000u)
  31691. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_83_CLR_MASK (0x00080000u)
  31692. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_83_CLR_SHIFT (0x00000013u)
  31693. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_83_CLR_RESETVAL (0x00000000u)
  31694. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_84_CLR_MASK (0x00100000u)
  31695. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_84_CLR_SHIFT (0x00000014u)
  31696. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_84_CLR_RESETVAL (0x00000000u)
  31697. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_85_CLR_MASK (0x00200000u)
  31698. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_85_CLR_SHIFT (0x00000015u)
  31699. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_85_CLR_RESETVAL (0x00000000u)
  31700. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_86_CLR_MASK (0x00400000u)
  31701. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_86_CLR_SHIFT (0x00000016u)
  31702. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_86_CLR_RESETVAL (0x00000000u)
  31703. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_87_CLR_MASK (0x00800000u)
  31704. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_87_CLR_SHIFT (0x00000017u)
  31705. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_87_CLR_RESETVAL (0x00000000u)
  31706. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_88_CLR_MASK (0x01000000u)
  31707. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_88_CLR_SHIFT (0x00000018u)
  31708. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_88_CLR_RESETVAL (0x00000000u)
  31709. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_89_CLR_MASK (0x02000000u)
  31710. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_89_CLR_SHIFT (0x00000019u)
  31711. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_89_CLR_RESETVAL (0x00000000u)
  31712. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_90_CLR_MASK (0x04000000u)
  31713. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_90_CLR_SHIFT (0x0000001Au)
  31714. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_90_CLR_RESETVAL (0x00000000u)
  31715. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_91_CLR_MASK (0x08000000u)
  31716. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_91_CLR_SHIFT (0x0000001Bu)
  31717. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_91_CLR_RESETVAL (0x00000000u)
  31718. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_92_CLR_MASK (0x10000000u)
  31719. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_92_CLR_SHIFT (0x0000001Cu)
  31720. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_92_CLR_RESETVAL (0x00000000u)
  31721. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_93_CLR_MASK (0x20000000u)
  31722. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_93_CLR_SHIFT (0x0000001Du)
  31723. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_93_CLR_RESETVAL (0x00000000u)
  31724. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_94_CLR_MASK (0x40000000u)
  31725. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_94_CLR_SHIFT (0x0000001Eu)
  31726. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_94_CLR_RESETVAL (0x00000000u)
  31727. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_95_CLR_MASK (0x80000000u)
  31728. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_95_CLR_SHIFT (0x0000001Fu)
  31729. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_SECURE_ENABLE_95_CLR_RESETVAL (0x00000000u)
  31730. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG2_RESETVAL (0x00000000u)
  31731. /* secure_enable_clr_reg3 */
  31732. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_96_CLR_MASK (0x00000001u)
  31733. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_96_CLR_SHIFT (0x00000000u)
  31734. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_96_CLR_RESETVAL (0x00000000u)
  31735. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_97_CLR_MASK (0x00000002u)
  31736. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_97_CLR_SHIFT (0x00000001u)
  31737. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_97_CLR_RESETVAL (0x00000000u)
  31738. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_98_CLR_MASK (0x00000004u)
  31739. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_98_CLR_SHIFT (0x00000002u)
  31740. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_98_CLR_RESETVAL (0x00000000u)
  31741. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_99_CLR_MASK (0x00000008u)
  31742. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_99_CLR_SHIFT (0x00000003u)
  31743. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_99_CLR_RESETVAL (0x00000000u)
  31744. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_100_CLR_MASK (0x00000010u)
  31745. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_100_CLR_SHIFT (0x00000004u)
  31746. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_100_CLR_RESETVAL (0x00000000u)
  31747. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_101_CLR_MASK (0x00000020u)
  31748. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_101_CLR_SHIFT (0x00000005u)
  31749. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_101_CLR_RESETVAL (0x00000000u)
  31750. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_102_CLR_MASK (0x00000040u)
  31751. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_102_CLR_SHIFT (0x00000006u)
  31752. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_102_CLR_RESETVAL (0x00000000u)
  31753. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_103_CLR_MASK (0x00000080u)
  31754. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_103_CLR_SHIFT (0x00000007u)
  31755. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_103_CLR_RESETVAL (0x00000000u)
  31756. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_104_CLR_MASK (0x00000100u)
  31757. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_104_CLR_SHIFT (0x00000008u)
  31758. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_104_CLR_RESETVAL (0x00000000u)
  31759. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_105_CLR_MASK (0x00000200u)
  31760. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_105_CLR_SHIFT (0x00000009u)
  31761. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_105_CLR_RESETVAL (0x00000000u)
  31762. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_106_CLR_MASK (0x00000400u)
  31763. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_106_CLR_SHIFT (0x0000000Au)
  31764. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_106_CLR_RESETVAL (0x00000000u)
  31765. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_107_CLR_MASK (0x00000800u)
  31766. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_107_CLR_SHIFT (0x0000000Bu)
  31767. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_107_CLR_RESETVAL (0x00000000u)
  31768. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_108_CLR_MASK (0x00001000u)
  31769. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_108_CLR_SHIFT (0x0000000Cu)
  31770. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_108_CLR_RESETVAL (0x00000000u)
  31771. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_109_CLR_MASK (0x00002000u)
  31772. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_109_CLR_SHIFT (0x0000000Du)
  31773. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_109_CLR_RESETVAL (0x00000000u)
  31774. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_110_CLR_MASK (0x00004000u)
  31775. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_110_CLR_SHIFT (0x0000000Eu)
  31776. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_110_CLR_RESETVAL (0x00000000u)
  31777. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_111_CLR_MASK (0x00008000u)
  31778. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_111_CLR_SHIFT (0x0000000Fu)
  31779. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_111_CLR_RESETVAL (0x00000000u)
  31780. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_112_CLR_MASK (0x00010000u)
  31781. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_112_CLR_SHIFT (0x00000010u)
  31782. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_112_CLR_RESETVAL (0x00000000u)
  31783. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_113_CLR_MASK (0x00020000u)
  31784. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_113_CLR_SHIFT (0x00000011u)
  31785. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_113_CLR_RESETVAL (0x00000000u)
  31786. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_114_CLR_MASK (0x00040000u)
  31787. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_114_CLR_SHIFT (0x00000012u)
  31788. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_114_CLR_RESETVAL (0x00000000u)
  31789. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_115_CLR_MASK (0x00080000u)
  31790. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_115_CLR_SHIFT (0x00000013u)
  31791. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_115_CLR_RESETVAL (0x00000000u)
  31792. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_116_CLR_MASK (0x00100000u)
  31793. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_116_CLR_SHIFT (0x00000014u)
  31794. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_116_CLR_RESETVAL (0x00000000u)
  31795. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_117_CLR_MASK (0x00200000u)
  31796. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_117_CLR_SHIFT (0x00000015u)
  31797. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_117_CLR_RESETVAL (0x00000000u)
  31798. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_118_CLR_MASK (0x00400000u)
  31799. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_118_CLR_SHIFT (0x00000016u)
  31800. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_118_CLR_RESETVAL (0x00000000u)
  31801. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_119_CLR_MASK (0x00800000u)
  31802. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_119_CLR_SHIFT (0x00000017u)
  31803. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_119_CLR_RESETVAL (0x00000000u)
  31804. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_120_CLR_MASK (0x01000000u)
  31805. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_120_CLR_SHIFT (0x00000018u)
  31806. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_120_CLR_RESETVAL (0x00000000u)
  31807. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_121_CLR_MASK (0x02000000u)
  31808. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_121_CLR_SHIFT (0x00000019u)
  31809. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_121_CLR_RESETVAL (0x00000000u)
  31810. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_122_CLR_MASK (0x04000000u)
  31811. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_122_CLR_SHIFT (0x0000001Au)
  31812. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_122_CLR_RESETVAL (0x00000000u)
  31813. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_123_CLR_MASK (0x08000000u)
  31814. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_123_CLR_SHIFT (0x0000001Bu)
  31815. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_123_CLR_RESETVAL (0x00000000u)
  31816. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_124_CLR_MASK (0x10000000u)
  31817. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_124_CLR_SHIFT (0x0000001Cu)
  31818. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_124_CLR_RESETVAL (0x00000000u)
  31819. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_125_CLR_MASK (0x20000000u)
  31820. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_125_CLR_SHIFT (0x0000001Du)
  31821. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_125_CLR_RESETVAL (0x00000000u)
  31822. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_126_CLR_MASK (0x40000000u)
  31823. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_126_CLR_SHIFT (0x0000001Eu)
  31824. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_126_CLR_RESETVAL (0x00000000u)
  31825. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_127_CLR_MASK (0x80000000u)
  31826. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_127_CLR_SHIFT (0x0000001Fu)
  31827. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_SECURE_ENABLE_127_CLR_RESETVAL (0x00000000u)
  31828. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG3_RESETVAL (0x00000000u)
  31829. /* secure_enable_clr_reg4 */
  31830. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_128_CLR_MASK (0x00000001u)
  31831. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_128_CLR_SHIFT (0x00000000u)
  31832. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_128_CLR_RESETVAL (0x00000000u)
  31833. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_129_CLR_MASK (0x00000002u)
  31834. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_129_CLR_SHIFT (0x00000001u)
  31835. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_129_CLR_RESETVAL (0x00000000u)
  31836. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_130_CLR_MASK (0x00000004u)
  31837. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_130_CLR_SHIFT (0x00000002u)
  31838. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_130_CLR_RESETVAL (0x00000000u)
  31839. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_131_CLR_MASK (0x00000008u)
  31840. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_131_CLR_SHIFT (0x00000003u)
  31841. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_131_CLR_RESETVAL (0x00000000u)
  31842. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_132_CLR_MASK (0x00000010u)
  31843. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_132_CLR_SHIFT (0x00000004u)
  31844. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_132_CLR_RESETVAL (0x00000000u)
  31845. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_133_CLR_MASK (0x00000020u)
  31846. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_133_CLR_SHIFT (0x00000005u)
  31847. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_133_CLR_RESETVAL (0x00000000u)
  31848. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_134_CLR_MASK (0x00000040u)
  31849. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_134_CLR_SHIFT (0x00000006u)
  31850. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_134_CLR_RESETVAL (0x00000000u)
  31851. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_135_CLR_MASK (0x00000080u)
  31852. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_135_CLR_SHIFT (0x00000007u)
  31853. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_135_CLR_RESETVAL (0x00000000u)
  31854. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_136_CLR_MASK (0x00000100u)
  31855. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_136_CLR_SHIFT (0x00000008u)
  31856. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_136_CLR_RESETVAL (0x00000000u)
  31857. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_137_CLR_MASK (0x00000200u)
  31858. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_137_CLR_SHIFT (0x00000009u)
  31859. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_137_CLR_RESETVAL (0x00000000u)
  31860. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_138_CLR_MASK (0x00000400u)
  31861. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_138_CLR_SHIFT (0x0000000Au)
  31862. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_138_CLR_RESETVAL (0x00000000u)
  31863. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_139_CLR_MASK (0x00000800u)
  31864. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_139_CLR_SHIFT (0x0000000Bu)
  31865. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_139_CLR_RESETVAL (0x00000000u)
  31866. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_140_CLR_MASK (0x00001000u)
  31867. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_140_CLR_SHIFT (0x0000000Cu)
  31868. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_140_CLR_RESETVAL (0x00000000u)
  31869. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_141_CLR_MASK (0x00002000u)
  31870. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_141_CLR_SHIFT (0x0000000Du)
  31871. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_141_CLR_RESETVAL (0x00000000u)
  31872. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_142_CLR_MASK (0x00004000u)
  31873. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_142_CLR_SHIFT (0x0000000Eu)
  31874. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_142_CLR_RESETVAL (0x00000000u)
  31875. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_143_CLR_MASK (0x00008000u)
  31876. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_143_CLR_SHIFT (0x0000000Fu)
  31877. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_143_CLR_RESETVAL (0x00000000u)
  31878. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_144_CLR_MASK (0x00010000u)
  31879. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_144_CLR_SHIFT (0x00000010u)
  31880. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_144_CLR_RESETVAL (0x00000000u)
  31881. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_145_CLR_MASK (0x00020000u)
  31882. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_145_CLR_SHIFT (0x00000011u)
  31883. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_145_CLR_RESETVAL (0x00000000u)
  31884. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_146_CLR_MASK (0x00040000u)
  31885. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_146_CLR_SHIFT (0x00000012u)
  31886. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_146_CLR_RESETVAL (0x00000000u)
  31887. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_147_CLR_MASK (0x00080000u)
  31888. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_147_CLR_SHIFT (0x00000013u)
  31889. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_147_CLR_RESETVAL (0x00000000u)
  31890. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_148_CLR_MASK (0x00100000u)
  31891. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_148_CLR_SHIFT (0x00000014u)
  31892. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_148_CLR_RESETVAL (0x00000000u)
  31893. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_149_CLR_MASK (0x00200000u)
  31894. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_149_CLR_SHIFT (0x00000015u)
  31895. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_149_CLR_RESETVAL (0x00000000u)
  31896. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_150_CLR_MASK (0x00400000u)
  31897. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_150_CLR_SHIFT (0x00000016u)
  31898. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_150_CLR_RESETVAL (0x00000000u)
  31899. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_151_CLR_MASK (0x00800000u)
  31900. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_151_CLR_SHIFT (0x00000017u)
  31901. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_151_CLR_RESETVAL (0x00000000u)
  31902. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_152_CLR_MASK (0x01000000u)
  31903. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_152_CLR_SHIFT (0x00000018u)
  31904. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_152_CLR_RESETVAL (0x00000000u)
  31905. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_153_CLR_MASK (0x02000000u)
  31906. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_153_CLR_SHIFT (0x00000019u)
  31907. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_153_CLR_RESETVAL (0x00000000u)
  31908. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_154_CLR_MASK (0x04000000u)
  31909. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_154_CLR_SHIFT (0x0000001Au)
  31910. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_154_CLR_RESETVAL (0x00000000u)
  31911. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_155_CLR_MASK (0x08000000u)
  31912. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_155_CLR_SHIFT (0x0000001Bu)
  31913. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_155_CLR_RESETVAL (0x00000000u)
  31914. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_156_CLR_MASK (0x10000000u)
  31915. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_156_CLR_SHIFT (0x0000001Cu)
  31916. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_156_CLR_RESETVAL (0x00000000u)
  31917. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_157_CLR_MASK (0x20000000u)
  31918. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_157_CLR_SHIFT (0x0000001Du)
  31919. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_157_CLR_RESETVAL (0x00000000u)
  31920. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_158_CLR_MASK (0x40000000u)
  31921. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_158_CLR_SHIFT (0x0000001Eu)
  31922. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_158_CLR_RESETVAL (0x00000000u)
  31923. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_159_CLR_MASK (0x80000000u)
  31924. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_159_CLR_SHIFT (0x0000001Fu)
  31925. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_SECURE_ENABLE_159_CLR_RESETVAL (0x00000000u)
  31926. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG4_RESETVAL (0x00000000u)
  31927. /* secure_enable_clr_reg5 */
  31928. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_160_CLR_MASK (0x00000001u)
  31929. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_160_CLR_SHIFT (0x00000000u)
  31930. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_160_CLR_RESETVAL (0x00000000u)
  31931. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_161_CLR_MASK (0x00000002u)
  31932. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_161_CLR_SHIFT (0x00000001u)
  31933. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_161_CLR_RESETVAL (0x00000000u)
  31934. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_162_CLR_MASK (0x00000004u)
  31935. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_162_CLR_SHIFT (0x00000002u)
  31936. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_162_CLR_RESETVAL (0x00000000u)
  31937. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_163_CLR_MASK (0x00000008u)
  31938. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_163_CLR_SHIFT (0x00000003u)
  31939. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_163_CLR_RESETVAL (0x00000000u)
  31940. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_164_CLR_MASK (0x00000010u)
  31941. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_164_CLR_SHIFT (0x00000004u)
  31942. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_164_CLR_RESETVAL (0x00000000u)
  31943. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_165_CLR_MASK (0x00000020u)
  31944. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_165_CLR_SHIFT (0x00000005u)
  31945. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_165_CLR_RESETVAL (0x00000000u)
  31946. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_166_CLR_MASK (0x00000040u)
  31947. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_166_CLR_SHIFT (0x00000006u)
  31948. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_166_CLR_RESETVAL (0x00000000u)
  31949. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_167_CLR_MASK (0x00000080u)
  31950. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_167_CLR_SHIFT (0x00000007u)
  31951. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_167_CLR_RESETVAL (0x00000000u)
  31952. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_168_CLR_MASK (0x00000100u)
  31953. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_168_CLR_SHIFT (0x00000008u)
  31954. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_168_CLR_RESETVAL (0x00000000u)
  31955. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_169_CLR_MASK (0x00000200u)
  31956. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_169_CLR_SHIFT (0x00000009u)
  31957. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_169_CLR_RESETVAL (0x00000000u)
  31958. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_170_CLR_MASK (0x00000400u)
  31959. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_170_CLR_SHIFT (0x0000000Au)
  31960. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_170_CLR_RESETVAL (0x00000000u)
  31961. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_171_CLR_MASK (0x00000800u)
  31962. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_171_CLR_SHIFT (0x0000000Bu)
  31963. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_171_CLR_RESETVAL (0x00000000u)
  31964. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_172_CLR_MASK (0x00001000u)
  31965. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_172_CLR_SHIFT (0x0000000Cu)
  31966. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_172_CLR_RESETVAL (0x00000000u)
  31967. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_173_CLR_MASK (0x00002000u)
  31968. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_173_CLR_SHIFT (0x0000000Du)
  31969. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_173_CLR_RESETVAL (0x00000000u)
  31970. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_174_CLR_MASK (0x00004000u)
  31971. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_174_CLR_SHIFT (0x0000000Eu)
  31972. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_174_CLR_RESETVAL (0x00000000u)
  31973. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_175_CLR_MASK (0x00008000u)
  31974. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_175_CLR_SHIFT (0x0000000Fu)
  31975. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_175_CLR_RESETVAL (0x00000000u)
  31976. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_176_CLR_MASK (0x00010000u)
  31977. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_176_CLR_SHIFT (0x00000010u)
  31978. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_176_CLR_RESETVAL (0x00000000u)
  31979. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_177_CLR_MASK (0x00020000u)
  31980. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_177_CLR_SHIFT (0x00000011u)
  31981. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_177_CLR_RESETVAL (0x00000000u)
  31982. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_178_CLR_MASK (0x00040000u)
  31983. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_178_CLR_SHIFT (0x00000012u)
  31984. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_178_CLR_RESETVAL (0x00000000u)
  31985. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_179_CLR_MASK (0x00080000u)
  31986. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_179_CLR_SHIFT (0x00000013u)
  31987. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_179_CLR_RESETVAL (0x00000000u)
  31988. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_180_CLR_MASK (0x00100000u)
  31989. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_180_CLR_SHIFT (0x00000014u)
  31990. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_180_CLR_RESETVAL (0x00000000u)
  31991. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_181_CLR_MASK (0x00200000u)
  31992. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_181_CLR_SHIFT (0x00000015u)
  31993. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_181_CLR_RESETVAL (0x00000000u)
  31994. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_182_CLR_MASK (0x00400000u)
  31995. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_182_CLR_SHIFT (0x00000016u)
  31996. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_182_CLR_RESETVAL (0x00000000u)
  31997. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_183_CLR_MASK (0x00800000u)
  31998. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_183_CLR_SHIFT (0x00000017u)
  31999. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_183_CLR_RESETVAL (0x00000000u)
  32000. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_184_CLR_MASK (0x01000000u)
  32001. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_184_CLR_SHIFT (0x00000018u)
  32002. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_184_CLR_RESETVAL (0x00000000u)
  32003. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_185_CLR_MASK (0x02000000u)
  32004. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_185_CLR_SHIFT (0x00000019u)
  32005. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_185_CLR_RESETVAL (0x00000000u)
  32006. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_186_CLR_MASK (0x04000000u)
  32007. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_186_CLR_SHIFT (0x0000001Au)
  32008. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_186_CLR_RESETVAL (0x00000000u)
  32009. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_187_CLR_MASK (0x08000000u)
  32010. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_187_CLR_SHIFT (0x0000001Bu)
  32011. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_187_CLR_RESETVAL (0x00000000u)
  32012. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_188_CLR_MASK (0x10000000u)
  32013. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_188_CLR_SHIFT (0x0000001Cu)
  32014. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_188_CLR_RESETVAL (0x00000000u)
  32015. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_189_CLR_MASK (0x20000000u)
  32016. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_189_CLR_SHIFT (0x0000001Du)
  32017. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_189_CLR_RESETVAL (0x00000000u)
  32018. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_190_CLR_MASK (0x40000000u)
  32019. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_190_CLR_SHIFT (0x0000001Eu)
  32020. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_190_CLR_RESETVAL (0x00000000u)
  32021. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_191_CLR_MASK (0x80000000u)
  32022. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_191_CLR_SHIFT (0x0000001Fu)
  32023. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_SECURE_ENABLE_191_CLR_RESETVAL (0x00000000u)
  32024. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG5_RESETVAL (0x00000000u)
  32025. /* secure_enable_clr_reg6 */
  32026. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_192_CLR_MASK (0x00000001u)
  32027. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_192_CLR_SHIFT (0x00000000u)
  32028. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_192_CLR_RESETVAL (0x00000000u)
  32029. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_193_CLR_MASK (0x00000002u)
  32030. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_193_CLR_SHIFT (0x00000001u)
  32031. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_193_CLR_RESETVAL (0x00000000u)
  32032. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_194_CLR_MASK (0x00000004u)
  32033. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_194_CLR_SHIFT (0x00000002u)
  32034. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_194_CLR_RESETVAL (0x00000000u)
  32035. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_195_CLR_MASK (0x00000008u)
  32036. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_195_CLR_SHIFT (0x00000003u)
  32037. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_195_CLR_RESETVAL (0x00000000u)
  32038. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_196_CLR_MASK (0x00000010u)
  32039. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_196_CLR_SHIFT (0x00000004u)
  32040. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_196_CLR_RESETVAL (0x00000000u)
  32041. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_197_CLR_MASK (0x00000020u)
  32042. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_197_CLR_SHIFT (0x00000005u)
  32043. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_197_CLR_RESETVAL (0x00000000u)
  32044. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_198_CLR_MASK (0x00000040u)
  32045. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_198_CLR_SHIFT (0x00000006u)
  32046. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_198_CLR_RESETVAL (0x00000000u)
  32047. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_199_CLR_MASK (0x00000080u)
  32048. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_199_CLR_SHIFT (0x00000007u)
  32049. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_199_CLR_RESETVAL (0x00000000u)
  32050. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_200_CLR_MASK (0x00000100u)
  32051. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_200_CLR_SHIFT (0x00000008u)
  32052. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_200_CLR_RESETVAL (0x00000000u)
  32053. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_201_CLR_MASK (0x00000200u)
  32054. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_201_CLR_SHIFT (0x00000009u)
  32055. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_201_CLR_RESETVAL (0x00000000u)
  32056. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_202_CLR_MASK (0x00000400u)
  32057. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_202_CLR_SHIFT (0x0000000Au)
  32058. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_202_CLR_RESETVAL (0x00000000u)
  32059. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_203_CLR_MASK (0x00000800u)
  32060. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_203_CLR_SHIFT (0x0000000Bu)
  32061. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_203_CLR_RESETVAL (0x00000000u)
  32062. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_204_CLR_MASK (0x00001000u)
  32063. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_204_CLR_SHIFT (0x0000000Cu)
  32064. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_204_CLR_RESETVAL (0x00000000u)
  32065. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_205_CLR_MASK (0x00002000u)
  32066. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_205_CLR_SHIFT (0x0000000Du)
  32067. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_205_CLR_RESETVAL (0x00000000u)
  32068. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_206_CLR_MASK (0x00004000u)
  32069. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_206_CLR_SHIFT (0x0000000Eu)
  32070. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_206_CLR_RESETVAL (0x00000000u)
  32071. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_207_CLR_MASK (0x00008000u)
  32072. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_207_CLR_SHIFT (0x0000000Fu)
  32073. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_207_CLR_RESETVAL (0x00000000u)
  32074. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_208_CLR_MASK (0x00010000u)
  32075. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_208_CLR_SHIFT (0x00000010u)
  32076. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_208_CLR_RESETVAL (0x00000000u)
  32077. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_209_CLR_MASK (0x00020000u)
  32078. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_209_CLR_SHIFT (0x00000011u)
  32079. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_209_CLR_RESETVAL (0x00000000u)
  32080. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_210_CLR_MASK (0x00040000u)
  32081. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_210_CLR_SHIFT (0x00000012u)
  32082. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_210_CLR_RESETVAL (0x00000000u)
  32083. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_211_CLR_MASK (0x00080000u)
  32084. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_211_CLR_SHIFT (0x00000013u)
  32085. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_211_CLR_RESETVAL (0x00000000u)
  32086. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_212_CLR_MASK (0x00100000u)
  32087. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_212_CLR_SHIFT (0x00000014u)
  32088. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_212_CLR_RESETVAL (0x00000000u)
  32089. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_213_CLR_MASK (0x00200000u)
  32090. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_213_CLR_SHIFT (0x00000015u)
  32091. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_213_CLR_RESETVAL (0x00000000u)
  32092. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_214_CLR_MASK (0x00400000u)
  32093. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_214_CLR_SHIFT (0x00000016u)
  32094. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_214_CLR_RESETVAL (0x00000000u)
  32095. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_215_CLR_MASK (0x00800000u)
  32096. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_215_CLR_SHIFT (0x00000017u)
  32097. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_215_CLR_RESETVAL (0x00000000u)
  32098. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_216_CLR_MASK (0x01000000u)
  32099. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_216_CLR_SHIFT (0x00000018u)
  32100. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_216_CLR_RESETVAL (0x00000000u)
  32101. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_217_CLR_MASK (0x02000000u)
  32102. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_217_CLR_SHIFT (0x00000019u)
  32103. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_217_CLR_RESETVAL (0x00000000u)
  32104. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_218_CLR_MASK (0x04000000u)
  32105. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_218_CLR_SHIFT (0x0000001Au)
  32106. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_218_CLR_RESETVAL (0x00000000u)
  32107. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_219_CLR_MASK (0x08000000u)
  32108. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_219_CLR_SHIFT (0x0000001Bu)
  32109. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_219_CLR_RESETVAL (0x00000000u)
  32110. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_220_CLR_MASK (0x10000000u)
  32111. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_220_CLR_SHIFT (0x0000001Cu)
  32112. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_220_CLR_RESETVAL (0x00000000u)
  32113. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_221_CLR_MASK (0x20000000u)
  32114. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_221_CLR_SHIFT (0x0000001Du)
  32115. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_221_CLR_RESETVAL (0x00000000u)
  32116. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_222_CLR_MASK (0x40000000u)
  32117. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_222_CLR_SHIFT (0x0000001Eu)
  32118. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_222_CLR_RESETVAL (0x00000000u)
  32119. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_223_CLR_MASK (0x80000000u)
  32120. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_223_CLR_SHIFT (0x0000001Fu)
  32121. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_SECURE_ENABLE_223_CLR_RESETVAL (0x00000000u)
  32122. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG6_RESETVAL (0x00000000u)
  32123. /* secure_enable_clr_reg7 */
  32124. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_224_CLR_MASK (0x00000001u)
  32125. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_224_CLR_SHIFT (0x00000000u)
  32126. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_224_CLR_RESETVAL (0x00000000u)
  32127. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_225_CLR_MASK (0x00000002u)
  32128. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_225_CLR_SHIFT (0x00000001u)
  32129. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_225_CLR_RESETVAL (0x00000000u)
  32130. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_226_CLR_MASK (0x00000004u)
  32131. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_226_CLR_SHIFT (0x00000002u)
  32132. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_226_CLR_RESETVAL (0x00000000u)
  32133. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_227_CLR_MASK (0x00000008u)
  32134. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_227_CLR_SHIFT (0x00000003u)
  32135. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_227_CLR_RESETVAL (0x00000000u)
  32136. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_228_CLR_MASK (0x00000010u)
  32137. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_228_CLR_SHIFT (0x00000004u)
  32138. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_228_CLR_RESETVAL (0x00000000u)
  32139. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_229_CLR_MASK (0x00000020u)
  32140. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_229_CLR_SHIFT (0x00000005u)
  32141. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_229_CLR_RESETVAL (0x00000000u)
  32142. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_230_CLR_MASK (0x00000040u)
  32143. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_230_CLR_SHIFT (0x00000006u)
  32144. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_230_CLR_RESETVAL (0x00000000u)
  32145. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_231_CLR_MASK (0x00000080u)
  32146. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_231_CLR_SHIFT (0x00000007u)
  32147. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_231_CLR_RESETVAL (0x00000000u)
  32148. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_232_CLR_MASK (0x00000100u)
  32149. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_232_CLR_SHIFT (0x00000008u)
  32150. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_232_CLR_RESETVAL (0x00000000u)
  32151. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_233_CLR_MASK (0x00000200u)
  32152. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_233_CLR_SHIFT (0x00000009u)
  32153. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_233_CLR_RESETVAL (0x00000000u)
  32154. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_234_CLR_MASK (0x00000400u)
  32155. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_234_CLR_SHIFT (0x0000000Au)
  32156. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_234_CLR_RESETVAL (0x00000000u)
  32157. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_235_CLR_MASK (0x00000800u)
  32158. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_235_CLR_SHIFT (0x0000000Bu)
  32159. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_235_CLR_RESETVAL (0x00000000u)
  32160. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_236_CLR_MASK (0x00001000u)
  32161. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_236_CLR_SHIFT (0x0000000Cu)
  32162. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_236_CLR_RESETVAL (0x00000000u)
  32163. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_237_CLR_MASK (0x00002000u)
  32164. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_237_CLR_SHIFT (0x0000000Du)
  32165. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_237_CLR_RESETVAL (0x00000000u)
  32166. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_238_CLR_MASK (0x00004000u)
  32167. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_238_CLR_SHIFT (0x0000000Eu)
  32168. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_238_CLR_RESETVAL (0x00000000u)
  32169. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_239_CLR_MASK (0x00008000u)
  32170. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_239_CLR_SHIFT (0x0000000Fu)
  32171. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_239_CLR_RESETVAL (0x00000000u)
  32172. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_240_CLR_MASK (0x00010000u)
  32173. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_240_CLR_SHIFT (0x00000010u)
  32174. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_240_CLR_RESETVAL (0x00000000u)
  32175. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_241_CLR_MASK (0x00020000u)
  32176. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_241_CLR_SHIFT (0x00000011u)
  32177. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_241_CLR_RESETVAL (0x00000000u)
  32178. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_242_CLR_MASK (0x00040000u)
  32179. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_242_CLR_SHIFT (0x00000012u)
  32180. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_242_CLR_RESETVAL (0x00000000u)
  32181. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_243_CLR_MASK (0x00080000u)
  32182. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_243_CLR_SHIFT (0x00000013u)
  32183. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_243_CLR_RESETVAL (0x00000000u)
  32184. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_244_CLR_MASK (0x00100000u)
  32185. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_244_CLR_SHIFT (0x00000014u)
  32186. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_244_CLR_RESETVAL (0x00000000u)
  32187. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_245_CLR_MASK (0x00200000u)
  32188. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_245_CLR_SHIFT (0x00000015u)
  32189. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_245_CLR_RESETVAL (0x00000000u)
  32190. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_246_CLR_MASK (0x00400000u)
  32191. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_246_CLR_SHIFT (0x00000016u)
  32192. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_246_CLR_RESETVAL (0x00000000u)
  32193. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_247_CLR_MASK (0x00800000u)
  32194. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_247_CLR_SHIFT (0x00000017u)
  32195. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_247_CLR_RESETVAL (0x00000000u)
  32196. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_248_CLR_MASK (0x01000000u)
  32197. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_248_CLR_SHIFT (0x00000018u)
  32198. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_248_CLR_RESETVAL (0x00000000u)
  32199. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_249_CLR_MASK (0x02000000u)
  32200. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_249_CLR_SHIFT (0x00000019u)
  32201. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_249_CLR_RESETVAL (0x00000000u)
  32202. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_250_CLR_MASK (0x04000000u)
  32203. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_250_CLR_SHIFT (0x0000001Au)
  32204. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_250_CLR_RESETVAL (0x00000000u)
  32205. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_251_CLR_MASK (0x08000000u)
  32206. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_251_CLR_SHIFT (0x0000001Bu)
  32207. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_251_CLR_RESETVAL (0x00000000u)
  32208. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_252_CLR_MASK (0x10000000u)
  32209. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_252_CLR_SHIFT (0x0000001Cu)
  32210. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_252_CLR_RESETVAL (0x00000000u)
  32211. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_253_CLR_MASK (0x20000000u)
  32212. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_253_CLR_SHIFT (0x0000001Du)
  32213. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_253_CLR_RESETVAL (0x00000000u)
  32214. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_254_CLR_MASK (0x40000000u)
  32215. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_254_CLR_SHIFT (0x0000001Eu)
  32216. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_254_CLR_RESETVAL (0x00000000u)
  32217. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_255_CLR_MASK (0x80000000u)
  32218. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_255_CLR_SHIFT (0x0000001Fu)
  32219. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_SECURE_ENABLE_255_CLR_RESETVAL (0x00000000u)
  32220. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG7_RESETVAL (0x00000000u)
  32221. /* secure_enable_clr_reg8 */
  32222. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_256_CLR_MASK (0x00000001u)
  32223. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_256_CLR_SHIFT (0x00000000u)
  32224. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_256_CLR_RESETVAL (0x00000000u)
  32225. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_257_CLR_MASK (0x00000002u)
  32226. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_257_CLR_SHIFT (0x00000001u)
  32227. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_257_CLR_RESETVAL (0x00000000u)
  32228. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_258_CLR_MASK (0x00000004u)
  32229. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_258_CLR_SHIFT (0x00000002u)
  32230. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_258_CLR_RESETVAL (0x00000000u)
  32231. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_259_CLR_MASK (0x00000008u)
  32232. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_259_CLR_SHIFT (0x00000003u)
  32233. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_259_CLR_RESETVAL (0x00000000u)
  32234. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_260_CLR_MASK (0x00000010u)
  32235. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_260_CLR_SHIFT (0x00000004u)
  32236. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_260_CLR_RESETVAL (0x00000000u)
  32237. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_261_CLR_MASK (0x00000020u)
  32238. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_261_CLR_SHIFT (0x00000005u)
  32239. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_261_CLR_RESETVAL (0x00000000u)
  32240. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_262_CLR_MASK (0x00000040u)
  32241. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_262_CLR_SHIFT (0x00000006u)
  32242. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_262_CLR_RESETVAL (0x00000000u)
  32243. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_263_CLR_MASK (0x00000080u)
  32244. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_263_CLR_SHIFT (0x00000007u)
  32245. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_263_CLR_RESETVAL (0x00000000u)
  32246. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_264_CLR_MASK (0x00000100u)
  32247. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_264_CLR_SHIFT (0x00000008u)
  32248. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_264_CLR_RESETVAL (0x00000000u)
  32249. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_265_CLR_MASK (0x00000200u)
  32250. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_265_CLR_SHIFT (0x00000009u)
  32251. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_265_CLR_RESETVAL (0x00000000u)
  32252. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_266_CLR_MASK (0x00000400u)
  32253. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_266_CLR_SHIFT (0x0000000Au)
  32254. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_266_CLR_RESETVAL (0x00000000u)
  32255. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_267_CLR_MASK (0x00000800u)
  32256. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_267_CLR_SHIFT (0x0000000Bu)
  32257. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_267_CLR_RESETVAL (0x00000000u)
  32258. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_268_CLR_MASK (0x00001000u)
  32259. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_268_CLR_SHIFT (0x0000000Cu)
  32260. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_268_CLR_RESETVAL (0x00000000u)
  32261. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_269_CLR_MASK (0x00002000u)
  32262. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_269_CLR_SHIFT (0x0000000Du)
  32263. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_269_CLR_RESETVAL (0x00000000u)
  32264. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_270_CLR_MASK (0x00004000u)
  32265. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_270_CLR_SHIFT (0x0000000Eu)
  32266. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_270_CLR_RESETVAL (0x00000000u)
  32267. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_271_CLR_MASK (0x00008000u)
  32268. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_271_CLR_SHIFT (0x0000000Fu)
  32269. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_271_CLR_RESETVAL (0x00000000u)
  32270. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_272_CLR_MASK (0x00010000u)
  32271. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_272_CLR_SHIFT (0x00000010u)
  32272. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_272_CLR_RESETVAL (0x00000000u)
  32273. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_273_CLR_MASK (0x00020000u)
  32274. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_273_CLR_SHIFT (0x00000011u)
  32275. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_273_CLR_RESETVAL (0x00000000u)
  32276. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_274_CLR_MASK (0x00040000u)
  32277. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_274_CLR_SHIFT (0x00000012u)
  32278. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_274_CLR_RESETVAL (0x00000000u)
  32279. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_275_CLR_MASK (0x00080000u)
  32280. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_275_CLR_SHIFT (0x00000013u)
  32281. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_275_CLR_RESETVAL (0x00000000u)
  32282. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_276_CLR_MASK (0x00100000u)
  32283. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_276_CLR_SHIFT (0x00000014u)
  32284. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_276_CLR_RESETVAL (0x00000000u)
  32285. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_277_CLR_MASK (0x00200000u)
  32286. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_277_CLR_SHIFT (0x00000015u)
  32287. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_277_CLR_RESETVAL (0x00000000u)
  32288. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_278_CLR_MASK (0x00400000u)
  32289. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_278_CLR_SHIFT (0x00000016u)
  32290. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_278_CLR_RESETVAL (0x00000000u)
  32291. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_279_CLR_MASK (0x00800000u)
  32292. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_279_CLR_SHIFT (0x00000017u)
  32293. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_279_CLR_RESETVAL (0x00000000u)
  32294. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_280_CLR_MASK (0x01000000u)
  32295. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_280_CLR_SHIFT (0x00000018u)
  32296. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_280_CLR_RESETVAL (0x00000000u)
  32297. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_281_CLR_MASK (0x02000000u)
  32298. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_281_CLR_SHIFT (0x00000019u)
  32299. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_281_CLR_RESETVAL (0x00000000u)
  32300. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_282_CLR_MASK (0x04000000u)
  32301. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_282_CLR_SHIFT (0x0000001Au)
  32302. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_282_CLR_RESETVAL (0x00000000u)
  32303. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_283_CLR_MASK (0x08000000u)
  32304. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_283_CLR_SHIFT (0x0000001Bu)
  32305. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_283_CLR_RESETVAL (0x00000000u)
  32306. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_284_CLR_MASK (0x10000000u)
  32307. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_284_CLR_SHIFT (0x0000001Cu)
  32308. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_284_CLR_RESETVAL (0x00000000u)
  32309. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_285_CLR_MASK (0x20000000u)
  32310. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_285_CLR_SHIFT (0x0000001Du)
  32311. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_285_CLR_RESETVAL (0x00000000u)
  32312. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_286_CLR_MASK (0x40000000u)
  32313. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_286_CLR_SHIFT (0x0000001Eu)
  32314. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_286_CLR_RESETVAL (0x00000000u)
  32315. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_287_CLR_MASK (0x80000000u)
  32316. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_287_CLR_SHIFT (0x0000001Fu)
  32317. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_SECURE_ENABLE_287_CLR_RESETVAL (0x00000000u)
  32318. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG8_RESETVAL (0x00000000u)
  32319. /* secure_enable_clr_reg9 */
  32320. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_288_CLR_MASK (0x00000001u)
  32321. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_288_CLR_SHIFT (0x00000000u)
  32322. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_288_CLR_RESETVAL (0x00000000u)
  32323. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_289_CLR_MASK (0x00000002u)
  32324. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_289_CLR_SHIFT (0x00000001u)
  32325. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_289_CLR_RESETVAL (0x00000000u)
  32326. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_290_CLR_MASK (0x00000004u)
  32327. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_290_CLR_SHIFT (0x00000002u)
  32328. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_290_CLR_RESETVAL (0x00000000u)
  32329. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_291_CLR_MASK (0x00000008u)
  32330. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_291_CLR_SHIFT (0x00000003u)
  32331. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_291_CLR_RESETVAL (0x00000000u)
  32332. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_292_CLR_MASK (0x00000010u)
  32333. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_292_CLR_SHIFT (0x00000004u)
  32334. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_292_CLR_RESETVAL (0x00000000u)
  32335. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_293_CLR_MASK (0x00000020u)
  32336. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_293_CLR_SHIFT (0x00000005u)
  32337. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_293_CLR_RESETVAL (0x00000000u)
  32338. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_294_CLR_MASK (0x00000040u)
  32339. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_294_CLR_SHIFT (0x00000006u)
  32340. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_294_CLR_RESETVAL (0x00000000u)
  32341. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_295_CLR_MASK (0x00000080u)
  32342. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_295_CLR_SHIFT (0x00000007u)
  32343. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_295_CLR_RESETVAL (0x00000000u)
  32344. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_296_CLR_MASK (0x00000100u)
  32345. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_296_CLR_SHIFT (0x00000008u)
  32346. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_296_CLR_RESETVAL (0x00000000u)
  32347. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_297_CLR_MASK (0x00000200u)
  32348. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_297_CLR_SHIFT (0x00000009u)
  32349. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_297_CLR_RESETVAL (0x00000000u)
  32350. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_298_CLR_MASK (0x00000400u)
  32351. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_298_CLR_SHIFT (0x0000000Au)
  32352. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_298_CLR_RESETVAL (0x00000000u)
  32353. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_299_CLR_MASK (0x00000800u)
  32354. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_299_CLR_SHIFT (0x0000000Bu)
  32355. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_299_CLR_RESETVAL (0x00000000u)
  32356. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_300_CLR_MASK (0x00001000u)
  32357. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_300_CLR_SHIFT (0x0000000Cu)
  32358. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_300_CLR_RESETVAL (0x00000000u)
  32359. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_301_CLR_MASK (0x00002000u)
  32360. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_301_CLR_SHIFT (0x0000000Du)
  32361. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_301_CLR_RESETVAL (0x00000000u)
  32362. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_302_CLR_MASK (0x00004000u)
  32363. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_302_CLR_SHIFT (0x0000000Eu)
  32364. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_302_CLR_RESETVAL (0x00000000u)
  32365. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_303_CLR_MASK (0x00008000u)
  32366. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_303_CLR_SHIFT (0x0000000Fu)
  32367. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_303_CLR_RESETVAL (0x00000000u)
  32368. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_304_CLR_MASK (0x00010000u)
  32369. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_304_CLR_SHIFT (0x00000010u)
  32370. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_304_CLR_RESETVAL (0x00000000u)
  32371. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_305_CLR_MASK (0x00020000u)
  32372. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_305_CLR_SHIFT (0x00000011u)
  32373. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_305_CLR_RESETVAL (0x00000000u)
  32374. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_306_CLR_MASK (0x00040000u)
  32375. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_306_CLR_SHIFT (0x00000012u)
  32376. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_306_CLR_RESETVAL (0x00000000u)
  32377. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_307_CLR_MASK (0x00080000u)
  32378. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_307_CLR_SHIFT (0x00000013u)
  32379. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_307_CLR_RESETVAL (0x00000000u)
  32380. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_308_CLR_MASK (0x00100000u)
  32381. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_308_CLR_SHIFT (0x00000014u)
  32382. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_308_CLR_RESETVAL (0x00000000u)
  32383. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_309_CLR_MASK (0x00200000u)
  32384. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_309_CLR_SHIFT (0x00000015u)
  32385. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_309_CLR_RESETVAL (0x00000000u)
  32386. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_310_CLR_MASK (0x00400000u)
  32387. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_310_CLR_SHIFT (0x00000016u)
  32388. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_310_CLR_RESETVAL (0x00000000u)
  32389. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_311_CLR_MASK (0x00800000u)
  32390. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_311_CLR_SHIFT (0x00000017u)
  32391. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_311_CLR_RESETVAL (0x00000000u)
  32392. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_312_CLR_MASK (0x01000000u)
  32393. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_312_CLR_SHIFT (0x00000018u)
  32394. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_312_CLR_RESETVAL (0x00000000u)
  32395. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_313_CLR_MASK (0x02000000u)
  32396. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_313_CLR_SHIFT (0x00000019u)
  32397. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_313_CLR_RESETVAL (0x00000000u)
  32398. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_314_CLR_MASK (0x04000000u)
  32399. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_314_CLR_SHIFT (0x0000001Au)
  32400. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_314_CLR_RESETVAL (0x00000000u)
  32401. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_315_CLR_MASK (0x08000000u)
  32402. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_315_CLR_SHIFT (0x0000001Bu)
  32403. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_315_CLR_RESETVAL (0x00000000u)
  32404. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_316_CLR_MASK (0x10000000u)
  32405. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_316_CLR_SHIFT (0x0000001Cu)
  32406. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_316_CLR_RESETVAL (0x00000000u)
  32407. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_317_CLR_MASK (0x20000000u)
  32408. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_317_CLR_SHIFT (0x0000001Du)
  32409. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_317_CLR_RESETVAL (0x00000000u)
  32410. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_318_CLR_MASK (0x40000000u)
  32411. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_318_CLR_SHIFT (0x0000001Eu)
  32412. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_318_CLR_RESETVAL (0x00000000u)
  32413. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_319_CLR_MASK (0x80000000u)
  32414. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_319_CLR_SHIFT (0x0000001Fu)
  32415. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_SECURE_ENABLE_319_CLR_RESETVAL (0x00000000u)
  32416. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG9_RESETVAL (0x00000000u)
  32417. /* secure_enable_clr_reg10 */
  32418. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_320_CLR_MASK (0x00000001u)
  32419. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_320_CLR_SHIFT (0x00000000u)
  32420. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_320_CLR_RESETVAL (0x00000000u)
  32421. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_321_CLR_MASK (0x00000002u)
  32422. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_321_CLR_SHIFT (0x00000001u)
  32423. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_321_CLR_RESETVAL (0x00000000u)
  32424. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_322_CLR_MASK (0x00000004u)
  32425. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_322_CLR_SHIFT (0x00000002u)
  32426. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_322_CLR_RESETVAL (0x00000000u)
  32427. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_323_CLR_MASK (0x00000008u)
  32428. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_323_CLR_SHIFT (0x00000003u)
  32429. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_323_CLR_RESETVAL (0x00000000u)
  32430. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_324_CLR_MASK (0x00000010u)
  32431. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_324_CLR_SHIFT (0x00000004u)
  32432. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_324_CLR_RESETVAL (0x00000000u)
  32433. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_325_CLR_MASK (0x00000020u)
  32434. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_325_CLR_SHIFT (0x00000005u)
  32435. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_325_CLR_RESETVAL (0x00000000u)
  32436. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_326_CLR_MASK (0x00000040u)
  32437. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_326_CLR_SHIFT (0x00000006u)
  32438. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_326_CLR_RESETVAL (0x00000000u)
  32439. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_327_CLR_MASK (0x00000080u)
  32440. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_327_CLR_SHIFT (0x00000007u)
  32441. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_327_CLR_RESETVAL (0x00000000u)
  32442. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_328_CLR_MASK (0x00000100u)
  32443. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_328_CLR_SHIFT (0x00000008u)
  32444. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_328_CLR_RESETVAL (0x00000000u)
  32445. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_329_CLR_MASK (0x00000200u)
  32446. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_329_CLR_SHIFT (0x00000009u)
  32447. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_329_CLR_RESETVAL (0x00000000u)
  32448. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_330_CLR_MASK (0x00000400u)
  32449. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_330_CLR_SHIFT (0x0000000Au)
  32450. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_330_CLR_RESETVAL (0x00000000u)
  32451. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_331_CLR_MASK (0x00000800u)
  32452. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_331_CLR_SHIFT (0x0000000Bu)
  32453. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_331_CLR_RESETVAL (0x00000000u)
  32454. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_332_CLR_MASK (0x00001000u)
  32455. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_332_CLR_SHIFT (0x0000000Cu)
  32456. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_332_CLR_RESETVAL (0x00000000u)
  32457. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_333_CLR_MASK (0x00002000u)
  32458. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_333_CLR_SHIFT (0x0000000Du)
  32459. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_333_CLR_RESETVAL (0x00000000u)
  32460. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_334_CLR_MASK (0x00004000u)
  32461. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_334_CLR_SHIFT (0x0000000Eu)
  32462. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_334_CLR_RESETVAL (0x00000000u)
  32463. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_335_CLR_MASK (0x00008000u)
  32464. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_335_CLR_SHIFT (0x0000000Fu)
  32465. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_335_CLR_RESETVAL (0x00000000u)
  32466. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_336_CLR_MASK (0x00010000u)
  32467. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_336_CLR_SHIFT (0x00000010u)
  32468. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_336_CLR_RESETVAL (0x00000000u)
  32469. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_337_CLR_MASK (0x00020000u)
  32470. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_337_CLR_SHIFT (0x00000011u)
  32471. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_337_CLR_RESETVAL (0x00000000u)
  32472. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_338_CLR_MASK (0x00040000u)
  32473. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_338_CLR_SHIFT (0x00000012u)
  32474. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_338_CLR_RESETVAL (0x00000000u)
  32475. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_339_CLR_MASK (0x00080000u)
  32476. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_339_CLR_SHIFT (0x00000013u)
  32477. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_339_CLR_RESETVAL (0x00000000u)
  32478. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_340_CLR_MASK (0x00100000u)
  32479. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_340_CLR_SHIFT (0x00000014u)
  32480. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_340_CLR_RESETVAL (0x00000000u)
  32481. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_341_CLR_MASK (0x00200000u)
  32482. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_341_CLR_SHIFT (0x00000015u)
  32483. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_341_CLR_RESETVAL (0x00000000u)
  32484. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_342_CLR_MASK (0x00400000u)
  32485. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_342_CLR_SHIFT (0x00000016u)
  32486. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_342_CLR_RESETVAL (0x00000000u)
  32487. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_343_CLR_MASK (0x00800000u)
  32488. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_343_CLR_SHIFT (0x00000017u)
  32489. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_343_CLR_RESETVAL (0x00000000u)
  32490. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_344_CLR_MASK (0x01000000u)
  32491. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_344_CLR_SHIFT (0x00000018u)
  32492. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_344_CLR_RESETVAL (0x00000000u)
  32493. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_345_CLR_MASK (0x02000000u)
  32494. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_345_CLR_SHIFT (0x00000019u)
  32495. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_345_CLR_RESETVAL (0x00000000u)
  32496. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_346_CLR_MASK (0x04000000u)
  32497. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_346_CLR_SHIFT (0x0000001Au)
  32498. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_346_CLR_RESETVAL (0x00000000u)
  32499. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_347_CLR_MASK (0x08000000u)
  32500. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_347_CLR_SHIFT (0x0000001Bu)
  32501. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_347_CLR_RESETVAL (0x00000000u)
  32502. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_348_CLR_MASK (0x10000000u)
  32503. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_348_CLR_SHIFT (0x0000001Cu)
  32504. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_348_CLR_RESETVAL (0x00000000u)
  32505. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_349_CLR_MASK (0x20000000u)
  32506. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_349_CLR_SHIFT (0x0000001Du)
  32507. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_349_CLR_RESETVAL (0x00000000u)
  32508. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_350_CLR_MASK (0x40000000u)
  32509. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_350_CLR_SHIFT (0x0000001Eu)
  32510. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_350_CLR_RESETVAL (0x00000000u)
  32511. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_351_CLR_MASK (0x80000000u)
  32512. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_351_CLR_SHIFT (0x0000001Fu)
  32513. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_SECURE_ENABLE_351_CLR_RESETVAL (0x00000000u)
  32514. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG10_RESETVAL (0x00000000u)
  32515. /* secure_enable_clr_reg11 */
  32516. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_352_CLR_MASK (0x00000001u)
  32517. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_352_CLR_SHIFT (0x00000000u)
  32518. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_352_CLR_RESETVAL (0x00000000u)
  32519. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_353_CLR_MASK (0x00000002u)
  32520. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_353_CLR_SHIFT (0x00000001u)
  32521. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_353_CLR_RESETVAL (0x00000000u)
  32522. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_354_CLR_MASK (0x00000004u)
  32523. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_354_CLR_SHIFT (0x00000002u)
  32524. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_354_CLR_RESETVAL (0x00000000u)
  32525. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_355_CLR_MASK (0x00000008u)
  32526. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_355_CLR_SHIFT (0x00000003u)
  32527. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_355_CLR_RESETVAL (0x00000000u)
  32528. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_356_CLR_MASK (0x00000010u)
  32529. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_356_CLR_SHIFT (0x00000004u)
  32530. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_356_CLR_RESETVAL (0x00000000u)
  32531. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_357_CLR_MASK (0x00000020u)
  32532. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_357_CLR_SHIFT (0x00000005u)
  32533. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_357_CLR_RESETVAL (0x00000000u)
  32534. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_358_CLR_MASK (0x00000040u)
  32535. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_358_CLR_SHIFT (0x00000006u)
  32536. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_358_CLR_RESETVAL (0x00000000u)
  32537. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_359_CLR_MASK (0x00000080u)
  32538. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_359_CLR_SHIFT (0x00000007u)
  32539. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_359_CLR_RESETVAL (0x00000000u)
  32540. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_360_CLR_MASK (0x00000100u)
  32541. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_360_CLR_SHIFT (0x00000008u)
  32542. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_360_CLR_RESETVAL (0x00000000u)
  32543. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_361_CLR_MASK (0x00000200u)
  32544. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_361_CLR_SHIFT (0x00000009u)
  32545. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_361_CLR_RESETVAL (0x00000000u)
  32546. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_362_CLR_MASK (0x00000400u)
  32547. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_362_CLR_SHIFT (0x0000000Au)
  32548. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_362_CLR_RESETVAL (0x00000000u)
  32549. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_363_CLR_MASK (0x00000800u)
  32550. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_363_CLR_SHIFT (0x0000000Bu)
  32551. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_363_CLR_RESETVAL (0x00000000u)
  32552. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_364_CLR_MASK (0x00001000u)
  32553. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_364_CLR_SHIFT (0x0000000Cu)
  32554. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_364_CLR_RESETVAL (0x00000000u)
  32555. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_365_CLR_MASK (0x00002000u)
  32556. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_365_CLR_SHIFT (0x0000000Du)
  32557. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_365_CLR_RESETVAL (0x00000000u)
  32558. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_366_CLR_MASK (0x00004000u)
  32559. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_366_CLR_SHIFT (0x0000000Eu)
  32560. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_366_CLR_RESETVAL (0x00000000u)
  32561. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_367_CLR_MASK (0x00008000u)
  32562. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_367_CLR_SHIFT (0x0000000Fu)
  32563. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_367_CLR_RESETVAL (0x00000000u)
  32564. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_368_CLR_MASK (0x00010000u)
  32565. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_368_CLR_SHIFT (0x00000010u)
  32566. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_368_CLR_RESETVAL (0x00000000u)
  32567. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_369_CLR_MASK (0x00020000u)
  32568. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_369_CLR_SHIFT (0x00000011u)
  32569. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_369_CLR_RESETVAL (0x00000000u)
  32570. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_370_CLR_MASK (0x00040000u)
  32571. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_370_CLR_SHIFT (0x00000012u)
  32572. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_370_CLR_RESETVAL (0x00000000u)
  32573. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_371_CLR_MASK (0x00080000u)
  32574. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_371_CLR_SHIFT (0x00000013u)
  32575. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_371_CLR_RESETVAL (0x00000000u)
  32576. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_372_CLR_MASK (0x00100000u)
  32577. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_372_CLR_SHIFT (0x00000014u)
  32578. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_372_CLR_RESETVAL (0x00000000u)
  32579. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_373_CLR_MASK (0x00200000u)
  32580. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_373_CLR_SHIFT (0x00000015u)
  32581. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_373_CLR_RESETVAL (0x00000000u)
  32582. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_374_CLR_MASK (0x00400000u)
  32583. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_374_CLR_SHIFT (0x00000016u)
  32584. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_374_CLR_RESETVAL (0x00000000u)
  32585. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_375_CLR_MASK (0x00800000u)
  32586. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_375_CLR_SHIFT (0x00000017u)
  32587. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_375_CLR_RESETVAL (0x00000000u)
  32588. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_376_CLR_MASK (0x01000000u)
  32589. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_376_CLR_SHIFT (0x00000018u)
  32590. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_376_CLR_RESETVAL (0x00000000u)
  32591. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_377_CLR_MASK (0x02000000u)
  32592. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_377_CLR_SHIFT (0x00000019u)
  32593. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_377_CLR_RESETVAL (0x00000000u)
  32594. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_378_CLR_MASK (0x04000000u)
  32595. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_378_CLR_SHIFT (0x0000001Au)
  32596. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_378_CLR_RESETVAL (0x00000000u)
  32597. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_379_CLR_MASK (0x08000000u)
  32598. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_379_CLR_SHIFT (0x0000001Bu)
  32599. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_379_CLR_RESETVAL (0x00000000u)
  32600. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_380_CLR_MASK (0x10000000u)
  32601. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_380_CLR_SHIFT (0x0000001Cu)
  32602. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_380_CLR_RESETVAL (0x00000000u)
  32603. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_381_CLR_MASK (0x20000000u)
  32604. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_381_CLR_SHIFT (0x0000001Du)
  32605. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_381_CLR_RESETVAL (0x00000000u)
  32606. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_382_CLR_MASK (0x40000000u)
  32607. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_382_CLR_SHIFT (0x0000001Eu)
  32608. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_382_CLR_RESETVAL (0x00000000u)
  32609. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_383_CLR_MASK (0x80000000u)
  32610. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_383_CLR_SHIFT (0x0000001Fu)
  32611. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_SECURE_ENABLE_383_CLR_RESETVAL (0x00000000u)
  32612. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG11_RESETVAL (0x00000000u)
  32613. /* secure_enable_clr_reg12 */
  32614. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_384_CLR_MASK (0x00000001u)
  32615. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_384_CLR_SHIFT (0x00000000u)
  32616. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_384_CLR_RESETVAL (0x00000000u)
  32617. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_385_CLR_MASK (0x00000002u)
  32618. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_385_CLR_SHIFT (0x00000001u)
  32619. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_385_CLR_RESETVAL (0x00000000u)
  32620. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_386_CLR_MASK (0x00000004u)
  32621. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_386_CLR_SHIFT (0x00000002u)
  32622. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_386_CLR_RESETVAL (0x00000000u)
  32623. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_387_CLR_MASK (0x00000008u)
  32624. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_387_CLR_SHIFT (0x00000003u)
  32625. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_387_CLR_RESETVAL (0x00000000u)
  32626. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_388_CLR_MASK (0x00000010u)
  32627. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_388_CLR_SHIFT (0x00000004u)
  32628. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_388_CLR_RESETVAL (0x00000000u)
  32629. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_389_CLR_MASK (0x00000020u)
  32630. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_389_CLR_SHIFT (0x00000005u)
  32631. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_389_CLR_RESETVAL (0x00000000u)
  32632. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_390_CLR_MASK (0x00000040u)
  32633. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_390_CLR_SHIFT (0x00000006u)
  32634. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_390_CLR_RESETVAL (0x00000000u)
  32635. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_391_CLR_MASK (0x00000080u)
  32636. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_391_CLR_SHIFT (0x00000007u)
  32637. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_391_CLR_RESETVAL (0x00000000u)
  32638. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_392_CLR_MASK (0x00000100u)
  32639. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_392_CLR_SHIFT (0x00000008u)
  32640. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_392_CLR_RESETVAL (0x00000000u)
  32641. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_393_CLR_MASK (0x00000200u)
  32642. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_393_CLR_SHIFT (0x00000009u)
  32643. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_393_CLR_RESETVAL (0x00000000u)
  32644. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_394_CLR_MASK (0x00000400u)
  32645. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_394_CLR_SHIFT (0x0000000Au)
  32646. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_394_CLR_RESETVAL (0x00000000u)
  32647. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_395_CLR_MASK (0x00000800u)
  32648. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_395_CLR_SHIFT (0x0000000Bu)
  32649. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_395_CLR_RESETVAL (0x00000000u)
  32650. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_396_CLR_MASK (0x00001000u)
  32651. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_396_CLR_SHIFT (0x0000000Cu)
  32652. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_396_CLR_RESETVAL (0x00000000u)
  32653. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_397_CLR_MASK (0x00002000u)
  32654. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_397_CLR_SHIFT (0x0000000Du)
  32655. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_397_CLR_RESETVAL (0x00000000u)
  32656. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_398_CLR_MASK (0x00004000u)
  32657. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_398_CLR_SHIFT (0x0000000Eu)
  32658. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_398_CLR_RESETVAL (0x00000000u)
  32659. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_399_CLR_MASK (0x00008000u)
  32660. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_399_CLR_SHIFT (0x0000000Fu)
  32661. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_399_CLR_RESETVAL (0x00000000u)
  32662. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_400_CLR_MASK (0x00010000u)
  32663. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_400_CLR_SHIFT (0x00000010u)
  32664. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_400_CLR_RESETVAL (0x00000000u)
  32665. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_401_CLR_MASK (0x00020000u)
  32666. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_401_CLR_SHIFT (0x00000011u)
  32667. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_401_CLR_RESETVAL (0x00000000u)
  32668. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_402_CLR_MASK (0x00040000u)
  32669. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_402_CLR_SHIFT (0x00000012u)
  32670. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_402_CLR_RESETVAL (0x00000000u)
  32671. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_403_CLR_MASK (0x00080000u)
  32672. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_403_CLR_SHIFT (0x00000013u)
  32673. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_403_CLR_RESETVAL (0x00000000u)
  32674. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_404_CLR_MASK (0x00100000u)
  32675. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_404_CLR_SHIFT (0x00000014u)
  32676. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_404_CLR_RESETVAL (0x00000000u)
  32677. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_405_CLR_MASK (0x00200000u)
  32678. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_405_CLR_SHIFT (0x00000015u)
  32679. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_405_CLR_RESETVAL (0x00000000u)
  32680. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_406_CLR_MASK (0x00400000u)
  32681. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_406_CLR_SHIFT (0x00000016u)
  32682. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_406_CLR_RESETVAL (0x00000000u)
  32683. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_407_CLR_MASK (0x00800000u)
  32684. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_407_CLR_SHIFT (0x00000017u)
  32685. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_407_CLR_RESETVAL (0x00000000u)
  32686. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_408_CLR_MASK (0x01000000u)
  32687. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_408_CLR_SHIFT (0x00000018u)
  32688. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_408_CLR_RESETVAL (0x00000000u)
  32689. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_409_CLR_MASK (0x02000000u)
  32690. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_409_CLR_SHIFT (0x00000019u)
  32691. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_409_CLR_RESETVAL (0x00000000u)
  32692. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_410_CLR_MASK (0x04000000u)
  32693. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_410_CLR_SHIFT (0x0000001Au)
  32694. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_410_CLR_RESETVAL (0x00000000u)
  32695. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_411_CLR_MASK (0x08000000u)
  32696. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_411_CLR_SHIFT (0x0000001Bu)
  32697. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_411_CLR_RESETVAL (0x00000000u)
  32698. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_412_CLR_MASK (0x10000000u)
  32699. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_412_CLR_SHIFT (0x0000001Cu)
  32700. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_412_CLR_RESETVAL (0x00000000u)
  32701. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_413_CLR_MASK (0x20000000u)
  32702. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_413_CLR_SHIFT (0x0000001Du)
  32703. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_413_CLR_RESETVAL (0x00000000u)
  32704. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_414_CLR_MASK (0x40000000u)
  32705. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_414_CLR_SHIFT (0x0000001Eu)
  32706. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_414_CLR_RESETVAL (0x00000000u)
  32707. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_415_CLR_MASK (0x80000000u)
  32708. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_415_CLR_SHIFT (0x0000001Fu)
  32709. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_SECURE_ENABLE_415_CLR_RESETVAL (0x00000000u)
  32710. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG12_RESETVAL (0x00000000u)
  32711. /* secure_enable_clr_reg13 */
  32712. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_416_CLR_MASK (0x00000001u)
  32713. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_416_CLR_SHIFT (0x00000000u)
  32714. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_416_CLR_RESETVAL (0x00000000u)
  32715. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_417_CLR_MASK (0x00000002u)
  32716. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_417_CLR_SHIFT (0x00000001u)
  32717. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_417_CLR_RESETVAL (0x00000000u)
  32718. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_418_CLR_MASK (0x00000004u)
  32719. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_418_CLR_SHIFT (0x00000002u)
  32720. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_418_CLR_RESETVAL (0x00000000u)
  32721. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_419_CLR_MASK (0x00000008u)
  32722. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_419_CLR_SHIFT (0x00000003u)
  32723. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_419_CLR_RESETVAL (0x00000000u)
  32724. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_420_CLR_MASK (0x00000010u)
  32725. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_420_CLR_SHIFT (0x00000004u)
  32726. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_420_CLR_RESETVAL (0x00000000u)
  32727. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_421_CLR_MASK (0x00000020u)
  32728. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_421_CLR_SHIFT (0x00000005u)
  32729. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_421_CLR_RESETVAL (0x00000000u)
  32730. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_422_CLR_MASK (0x00000040u)
  32731. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_422_CLR_SHIFT (0x00000006u)
  32732. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_422_CLR_RESETVAL (0x00000000u)
  32733. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_423_CLR_MASK (0x00000080u)
  32734. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_423_CLR_SHIFT (0x00000007u)
  32735. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_423_CLR_RESETVAL (0x00000000u)
  32736. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_424_CLR_MASK (0x00000100u)
  32737. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_424_CLR_SHIFT (0x00000008u)
  32738. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_424_CLR_RESETVAL (0x00000000u)
  32739. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_425_CLR_MASK (0x00000200u)
  32740. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_425_CLR_SHIFT (0x00000009u)
  32741. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_425_CLR_RESETVAL (0x00000000u)
  32742. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_426_CLR_MASK (0x00000400u)
  32743. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_426_CLR_SHIFT (0x0000000Au)
  32744. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_426_CLR_RESETVAL (0x00000000u)
  32745. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_427_CLR_MASK (0x00000800u)
  32746. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_427_CLR_SHIFT (0x0000000Bu)
  32747. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_427_CLR_RESETVAL (0x00000000u)
  32748. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_428_CLR_MASK (0x00001000u)
  32749. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_428_CLR_SHIFT (0x0000000Cu)
  32750. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_428_CLR_RESETVAL (0x00000000u)
  32751. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_429_CLR_MASK (0x00002000u)
  32752. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_429_CLR_SHIFT (0x0000000Du)
  32753. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_429_CLR_RESETVAL (0x00000000u)
  32754. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_430_CLR_MASK (0x00004000u)
  32755. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_430_CLR_SHIFT (0x0000000Eu)
  32756. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_430_CLR_RESETVAL (0x00000000u)
  32757. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_431_CLR_MASK (0x00008000u)
  32758. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_431_CLR_SHIFT (0x0000000Fu)
  32759. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_431_CLR_RESETVAL (0x00000000u)
  32760. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_432_CLR_MASK (0x00010000u)
  32761. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_432_CLR_SHIFT (0x00000010u)
  32762. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_432_CLR_RESETVAL (0x00000000u)
  32763. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_433_CLR_MASK (0x00020000u)
  32764. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_433_CLR_SHIFT (0x00000011u)
  32765. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_433_CLR_RESETVAL (0x00000000u)
  32766. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_434_CLR_MASK (0x00040000u)
  32767. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_434_CLR_SHIFT (0x00000012u)
  32768. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_434_CLR_RESETVAL (0x00000000u)
  32769. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_435_CLR_MASK (0x00080000u)
  32770. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_435_CLR_SHIFT (0x00000013u)
  32771. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_435_CLR_RESETVAL (0x00000000u)
  32772. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_436_CLR_MASK (0x00100000u)
  32773. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_436_CLR_SHIFT (0x00000014u)
  32774. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_436_CLR_RESETVAL (0x00000000u)
  32775. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_437_CLR_MASK (0x00200000u)
  32776. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_437_CLR_SHIFT (0x00000015u)
  32777. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_437_CLR_RESETVAL (0x00000000u)
  32778. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_438_CLR_MASK (0x00400000u)
  32779. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_438_CLR_SHIFT (0x00000016u)
  32780. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_438_CLR_RESETVAL (0x00000000u)
  32781. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_439_CLR_MASK (0x00800000u)
  32782. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_439_CLR_SHIFT (0x00000017u)
  32783. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_439_CLR_RESETVAL (0x00000000u)
  32784. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_440_CLR_MASK (0x01000000u)
  32785. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_440_CLR_SHIFT (0x00000018u)
  32786. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_440_CLR_RESETVAL (0x00000000u)
  32787. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_441_CLR_MASK (0x02000000u)
  32788. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_441_CLR_SHIFT (0x00000019u)
  32789. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_441_CLR_RESETVAL (0x00000000u)
  32790. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_442_CLR_MASK (0x04000000u)
  32791. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_442_CLR_SHIFT (0x0000001Au)
  32792. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_442_CLR_RESETVAL (0x00000000u)
  32793. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_443_CLR_MASK (0x08000000u)
  32794. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_443_CLR_SHIFT (0x0000001Bu)
  32795. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_443_CLR_RESETVAL (0x00000000u)
  32796. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_444_CLR_MASK (0x10000000u)
  32797. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_444_CLR_SHIFT (0x0000001Cu)
  32798. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_444_CLR_RESETVAL (0x00000000u)
  32799. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_445_CLR_MASK (0x20000000u)
  32800. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_445_CLR_SHIFT (0x0000001Du)
  32801. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_445_CLR_RESETVAL (0x00000000u)
  32802. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_446_CLR_MASK (0x40000000u)
  32803. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_446_CLR_SHIFT (0x0000001Eu)
  32804. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_446_CLR_RESETVAL (0x00000000u)
  32805. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_447_CLR_MASK (0x80000000u)
  32806. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_447_CLR_SHIFT (0x0000001Fu)
  32807. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_SECURE_ENABLE_447_CLR_RESETVAL (0x00000000u)
  32808. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG13_RESETVAL (0x00000000u)
  32809. /* secure_enable_clr_reg14 */
  32810. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_448_CLR_MASK (0x00000001u)
  32811. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_448_CLR_SHIFT (0x00000000u)
  32812. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_448_CLR_RESETVAL (0x00000000u)
  32813. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_449_CLR_MASK (0x00000002u)
  32814. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_449_CLR_SHIFT (0x00000001u)
  32815. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_449_CLR_RESETVAL (0x00000000u)
  32816. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_450_CLR_MASK (0x00000004u)
  32817. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_450_CLR_SHIFT (0x00000002u)
  32818. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_450_CLR_RESETVAL (0x00000000u)
  32819. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_451_CLR_MASK (0x00000008u)
  32820. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_451_CLR_SHIFT (0x00000003u)
  32821. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_451_CLR_RESETVAL (0x00000000u)
  32822. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_452_CLR_MASK (0x00000010u)
  32823. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_452_CLR_SHIFT (0x00000004u)
  32824. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_452_CLR_RESETVAL (0x00000000u)
  32825. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_453_CLR_MASK (0x00000020u)
  32826. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_453_CLR_SHIFT (0x00000005u)
  32827. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_453_CLR_RESETVAL (0x00000000u)
  32828. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_454_CLR_MASK (0x00000040u)
  32829. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_454_CLR_SHIFT (0x00000006u)
  32830. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_454_CLR_RESETVAL (0x00000000u)
  32831. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_455_CLR_MASK (0x00000080u)
  32832. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_455_CLR_SHIFT (0x00000007u)
  32833. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_455_CLR_RESETVAL (0x00000000u)
  32834. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_456_CLR_MASK (0x00000100u)
  32835. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_456_CLR_SHIFT (0x00000008u)
  32836. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_456_CLR_RESETVAL (0x00000000u)
  32837. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_457_CLR_MASK (0x00000200u)
  32838. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_457_CLR_SHIFT (0x00000009u)
  32839. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_457_CLR_RESETVAL (0x00000000u)
  32840. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_458_CLR_MASK (0x00000400u)
  32841. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_458_CLR_SHIFT (0x0000000Au)
  32842. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_458_CLR_RESETVAL (0x00000000u)
  32843. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_459_CLR_MASK (0x00000800u)
  32844. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_459_CLR_SHIFT (0x0000000Bu)
  32845. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_459_CLR_RESETVAL (0x00000000u)
  32846. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_460_CLR_MASK (0x00001000u)
  32847. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_460_CLR_SHIFT (0x0000000Cu)
  32848. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_460_CLR_RESETVAL (0x00000000u)
  32849. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_461_CLR_MASK (0x00002000u)
  32850. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_461_CLR_SHIFT (0x0000000Du)
  32851. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_461_CLR_RESETVAL (0x00000000u)
  32852. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_462_CLR_MASK (0x00004000u)
  32853. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_462_CLR_SHIFT (0x0000000Eu)
  32854. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_462_CLR_RESETVAL (0x00000000u)
  32855. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_463_CLR_MASK (0x00008000u)
  32856. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_463_CLR_SHIFT (0x0000000Fu)
  32857. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_463_CLR_RESETVAL (0x00000000u)
  32858. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_464_CLR_MASK (0x00010000u)
  32859. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_464_CLR_SHIFT (0x00000010u)
  32860. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_464_CLR_RESETVAL (0x00000000u)
  32861. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_465_CLR_MASK (0x00020000u)
  32862. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_465_CLR_SHIFT (0x00000011u)
  32863. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_465_CLR_RESETVAL (0x00000000u)
  32864. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_466_CLR_MASK (0x00040000u)
  32865. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_466_CLR_SHIFT (0x00000012u)
  32866. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_466_CLR_RESETVAL (0x00000000u)
  32867. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_467_CLR_MASK (0x00080000u)
  32868. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_467_CLR_SHIFT (0x00000013u)
  32869. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_467_CLR_RESETVAL (0x00000000u)
  32870. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_468_CLR_MASK (0x00100000u)
  32871. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_468_CLR_SHIFT (0x00000014u)
  32872. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_468_CLR_RESETVAL (0x00000000u)
  32873. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_469_CLR_MASK (0x00200000u)
  32874. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_469_CLR_SHIFT (0x00000015u)
  32875. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_469_CLR_RESETVAL (0x00000000u)
  32876. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_470_CLR_MASK (0x00400000u)
  32877. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_470_CLR_SHIFT (0x00000016u)
  32878. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_470_CLR_RESETVAL (0x00000000u)
  32879. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_471_CLR_MASK (0x00800000u)
  32880. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_471_CLR_SHIFT (0x00000017u)
  32881. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_471_CLR_RESETVAL (0x00000000u)
  32882. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_472_CLR_MASK (0x01000000u)
  32883. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_472_CLR_SHIFT (0x00000018u)
  32884. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_472_CLR_RESETVAL (0x00000000u)
  32885. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_473_CLR_MASK (0x02000000u)
  32886. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_473_CLR_SHIFT (0x00000019u)
  32887. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_473_CLR_RESETVAL (0x00000000u)
  32888. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_474_CLR_MASK (0x04000000u)
  32889. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_474_CLR_SHIFT (0x0000001Au)
  32890. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_474_CLR_RESETVAL (0x00000000u)
  32891. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_475_CLR_MASK (0x08000000u)
  32892. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_475_CLR_SHIFT (0x0000001Bu)
  32893. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_475_CLR_RESETVAL (0x00000000u)
  32894. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_476_CLR_MASK (0x10000000u)
  32895. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_476_CLR_SHIFT (0x0000001Cu)
  32896. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_476_CLR_RESETVAL (0x00000000u)
  32897. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_477_CLR_MASK (0x20000000u)
  32898. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_477_CLR_SHIFT (0x0000001Du)
  32899. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_477_CLR_RESETVAL (0x00000000u)
  32900. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_478_CLR_MASK (0x40000000u)
  32901. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_478_CLR_SHIFT (0x0000001Eu)
  32902. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_478_CLR_RESETVAL (0x00000000u)
  32903. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_479_CLR_MASK (0x80000000u)
  32904. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_479_CLR_SHIFT (0x0000001Fu)
  32905. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_SECURE_ENABLE_479_CLR_RESETVAL (0x00000000u)
  32906. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG14_RESETVAL (0x00000000u)
  32907. /* secure_enable_clr_reg15 */
  32908. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_480_CLR_MASK (0x00000001u)
  32909. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_480_CLR_SHIFT (0x00000000u)
  32910. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_480_CLR_RESETVAL (0x00000000u)
  32911. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_481_CLR_MASK (0x00000002u)
  32912. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_481_CLR_SHIFT (0x00000001u)
  32913. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_481_CLR_RESETVAL (0x00000000u)
  32914. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_482_CLR_MASK (0x00000004u)
  32915. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_482_CLR_SHIFT (0x00000002u)
  32916. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_482_CLR_RESETVAL (0x00000000u)
  32917. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_483_CLR_MASK (0x00000008u)
  32918. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_483_CLR_SHIFT (0x00000003u)
  32919. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_483_CLR_RESETVAL (0x00000000u)
  32920. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_484_CLR_MASK (0x00000010u)
  32921. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_484_CLR_SHIFT (0x00000004u)
  32922. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_484_CLR_RESETVAL (0x00000000u)
  32923. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_485_CLR_MASK (0x00000020u)
  32924. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_485_CLR_SHIFT (0x00000005u)
  32925. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_485_CLR_RESETVAL (0x00000000u)
  32926. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_486_CLR_MASK (0x00000040u)
  32927. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_486_CLR_SHIFT (0x00000006u)
  32928. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_486_CLR_RESETVAL (0x00000000u)
  32929. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_487_CLR_MASK (0x00000080u)
  32930. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_487_CLR_SHIFT (0x00000007u)
  32931. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_487_CLR_RESETVAL (0x00000000u)
  32932. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_488_CLR_MASK (0x00000100u)
  32933. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_488_CLR_SHIFT (0x00000008u)
  32934. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_488_CLR_RESETVAL (0x00000000u)
  32935. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_489_CLR_MASK (0x00000200u)
  32936. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_489_CLR_SHIFT (0x00000009u)
  32937. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_489_CLR_RESETVAL (0x00000000u)
  32938. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_490_CLR_MASK (0x00000400u)
  32939. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_490_CLR_SHIFT (0x0000000Au)
  32940. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_490_CLR_RESETVAL (0x00000000u)
  32941. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_491_CLR_MASK (0x00000800u)
  32942. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_491_CLR_SHIFT (0x0000000Bu)
  32943. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_491_CLR_RESETVAL (0x00000000u)
  32944. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_492_CLR_MASK (0x00001000u)
  32945. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_492_CLR_SHIFT (0x0000000Cu)
  32946. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_492_CLR_RESETVAL (0x00000000u)
  32947. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_493_CLR_MASK (0x00002000u)
  32948. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_493_CLR_SHIFT (0x0000000Du)
  32949. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_493_CLR_RESETVAL (0x00000000u)
  32950. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_494_CLR_MASK (0x00004000u)
  32951. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_494_CLR_SHIFT (0x0000000Eu)
  32952. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_494_CLR_RESETVAL (0x00000000u)
  32953. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_495_CLR_MASK (0x00008000u)
  32954. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_495_CLR_SHIFT (0x0000000Fu)
  32955. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_495_CLR_RESETVAL (0x00000000u)
  32956. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_496_CLR_MASK (0x00010000u)
  32957. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_496_CLR_SHIFT (0x00000010u)
  32958. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_496_CLR_RESETVAL (0x00000000u)
  32959. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_497_CLR_MASK (0x00020000u)
  32960. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_497_CLR_SHIFT (0x00000011u)
  32961. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_497_CLR_RESETVAL (0x00000000u)
  32962. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_498_CLR_MASK (0x00040000u)
  32963. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_498_CLR_SHIFT (0x00000012u)
  32964. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_498_CLR_RESETVAL (0x00000000u)
  32965. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_499_CLR_MASK (0x00080000u)
  32966. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_499_CLR_SHIFT (0x00000013u)
  32967. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_499_CLR_RESETVAL (0x00000000u)
  32968. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_500_CLR_MASK (0x00100000u)
  32969. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_500_CLR_SHIFT (0x00000014u)
  32970. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_500_CLR_RESETVAL (0x00000000u)
  32971. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_501_CLR_MASK (0x00200000u)
  32972. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_501_CLR_SHIFT (0x00000015u)
  32973. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_501_CLR_RESETVAL (0x00000000u)
  32974. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_502_CLR_MASK (0x00400000u)
  32975. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_502_CLR_SHIFT (0x00000016u)
  32976. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_502_CLR_RESETVAL (0x00000000u)
  32977. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_503_CLR_MASK (0x00800000u)
  32978. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_503_CLR_SHIFT (0x00000017u)
  32979. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_503_CLR_RESETVAL (0x00000000u)
  32980. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_504_CLR_MASK (0x01000000u)
  32981. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_504_CLR_SHIFT (0x00000018u)
  32982. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_504_CLR_RESETVAL (0x00000000u)
  32983. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_505_CLR_MASK (0x02000000u)
  32984. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_505_CLR_SHIFT (0x00000019u)
  32985. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_505_CLR_RESETVAL (0x00000000u)
  32986. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_506_CLR_MASK (0x04000000u)
  32987. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_506_CLR_SHIFT (0x0000001Au)
  32988. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_506_CLR_RESETVAL (0x00000000u)
  32989. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_507_CLR_MASK (0x08000000u)
  32990. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_507_CLR_SHIFT (0x0000001Bu)
  32991. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_507_CLR_RESETVAL (0x00000000u)
  32992. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_508_CLR_MASK (0x10000000u)
  32993. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_508_CLR_SHIFT (0x0000001Cu)
  32994. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_508_CLR_RESETVAL (0x00000000u)
  32995. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_509_CLR_MASK (0x20000000u)
  32996. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_509_CLR_SHIFT (0x0000001Du)
  32997. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_509_CLR_RESETVAL (0x00000000u)
  32998. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_510_CLR_MASK (0x40000000u)
  32999. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_510_CLR_SHIFT (0x0000001Eu)
  33000. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_510_CLR_RESETVAL (0x00000000u)
  33001. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_511_CLR_MASK (0x80000000u)
  33002. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_511_CLR_SHIFT (0x0000001Fu)
  33003. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_SECURE_ENABLE_511_CLR_RESETVAL (0x00000000u)
  33004. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG15_RESETVAL (0x00000000u)
  33005. /* secure_enable_clr_reg16 */
  33006. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_512_CLR_MASK (0x00000001u)
  33007. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_512_CLR_SHIFT (0x00000000u)
  33008. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_512_CLR_RESETVAL (0x00000000u)
  33009. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_513_CLR_MASK (0x00000002u)
  33010. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_513_CLR_SHIFT (0x00000001u)
  33011. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_513_CLR_RESETVAL (0x00000000u)
  33012. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_514_CLR_MASK (0x00000004u)
  33013. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_514_CLR_SHIFT (0x00000002u)
  33014. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_514_CLR_RESETVAL (0x00000000u)
  33015. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_515_CLR_MASK (0x00000008u)
  33016. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_515_CLR_SHIFT (0x00000003u)
  33017. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_515_CLR_RESETVAL (0x00000000u)
  33018. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_516_CLR_MASK (0x00000010u)
  33019. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_516_CLR_SHIFT (0x00000004u)
  33020. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_516_CLR_RESETVAL (0x00000000u)
  33021. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_517_CLR_MASK (0x00000020u)
  33022. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_517_CLR_SHIFT (0x00000005u)
  33023. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_517_CLR_RESETVAL (0x00000000u)
  33024. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_518_CLR_MASK (0x00000040u)
  33025. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_518_CLR_SHIFT (0x00000006u)
  33026. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_518_CLR_RESETVAL (0x00000000u)
  33027. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_519_CLR_MASK (0x00000080u)
  33028. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_519_CLR_SHIFT (0x00000007u)
  33029. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_519_CLR_RESETVAL (0x00000000u)
  33030. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_520_CLR_MASK (0x00000100u)
  33031. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_520_CLR_SHIFT (0x00000008u)
  33032. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_520_CLR_RESETVAL (0x00000000u)
  33033. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_521_CLR_MASK (0x00000200u)
  33034. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_521_CLR_SHIFT (0x00000009u)
  33035. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_521_CLR_RESETVAL (0x00000000u)
  33036. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_522_CLR_MASK (0x00000400u)
  33037. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_522_CLR_SHIFT (0x0000000Au)
  33038. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_522_CLR_RESETVAL (0x00000000u)
  33039. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_523_CLR_MASK (0x00000800u)
  33040. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_523_CLR_SHIFT (0x0000000Bu)
  33041. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_523_CLR_RESETVAL (0x00000000u)
  33042. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_524_CLR_MASK (0x00001000u)
  33043. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_524_CLR_SHIFT (0x0000000Cu)
  33044. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_524_CLR_RESETVAL (0x00000000u)
  33045. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_525_CLR_MASK (0x00002000u)
  33046. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_525_CLR_SHIFT (0x0000000Du)
  33047. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_525_CLR_RESETVAL (0x00000000u)
  33048. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_526_CLR_MASK (0x00004000u)
  33049. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_526_CLR_SHIFT (0x0000000Eu)
  33050. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_526_CLR_RESETVAL (0x00000000u)
  33051. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_527_CLR_MASK (0x00008000u)
  33052. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_527_CLR_SHIFT (0x0000000Fu)
  33053. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_527_CLR_RESETVAL (0x00000000u)
  33054. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_528_CLR_MASK (0x00010000u)
  33055. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_528_CLR_SHIFT (0x00000010u)
  33056. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_528_CLR_RESETVAL (0x00000000u)
  33057. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_529_CLR_MASK (0x00020000u)
  33058. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_529_CLR_SHIFT (0x00000011u)
  33059. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_529_CLR_RESETVAL (0x00000000u)
  33060. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_530_CLR_MASK (0x00040000u)
  33061. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_530_CLR_SHIFT (0x00000012u)
  33062. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_530_CLR_RESETVAL (0x00000000u)
  33063. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_531_CLR_MASK (0x00080000u)
  33064. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_531_CLR_SHIFT (0x00000013u)
  33065. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_531_CLR_RESETVAL (0x00000000u)
  33066. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_532_CLR_MASK (0x00100000u)
  33067. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_532_CLR_SHIFT (0x00000014u)
  33068. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_532_CLR_RESETVAL (0x00000000u)
  33069. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_533_CLR_MASK (0x00200000u)
  33070. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_533_CLR_SHIFT (0x00000015u)
  33071. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_533_CLR_RESETVAL (0x00000000u)
  33072. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_534_CLR_MASK (0x00400000u)
  33073. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_534_CLR_SHIFT (0x00000016u)
  33074. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_534_CLR_RESETVAL (0x00000000u)
  33075. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_535_CLR_MASK (0x00800000u)
  33076. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_535_CLR_SHIFT (0x00000017u)
  33077. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_535_CLR_RESETVAL (0x00000000u)
  33078. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_536_CLR_MASK (0x01000000u)
  33079. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_536_CLR_SHIFT (0x00000018u)
  33080. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_536_CLR_RESETVAL (0x00000000u)
  33081. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_537_CLR_MASK (0x02000000u)
  33082. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_537_CLR_SHIFT (0x00000019u)
  33083. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_537_CLR_RESETVAL (0x00000000u)
  33084. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_538_CLR_MASK (0x04000000u)
  33085. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_538_CLR_SHIFT (0x0000001Au)
  33086. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_538_CLR_RESETVAL (0x00000000u)
  33087. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_539_CLR_MASK (0x08000000u)
  33088. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_539_CLR_SHIFT (0x0000001Bu)
  33089. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_539_CLR_RESETVAL (0x00000000u)
  33090. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_540_CLR_MASK (0x10000000u)
  33091. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_540_CLR_SHIFT (0x0000001Cu)
  33092. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_540_CLR_RESETVAL (0x00000000u)
  33093. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_541_CLR_MASK (0x20000000u)
  33094. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_541_CLR_SHIFT (0x0000001Du)
  33095. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_541_CLR_RESETVAL (0x00000000u)
  33096. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_542_CLR_MASK (0x40000000u)
  33097. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_542_CLR_SHIFT (0x0000001Eu)
  33098. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_542_CLR_RESETVAL (0x00000000u)
  33099. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_543_CLR_MASK (0x80000000u)
  33100. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_543_CLR_SHIFT (0x0000001Fu)
  33101. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_SECURE_ENABLE_543_CLR_RESETVAL (0x00000000u)
  33102. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG16_RESETVAL (0x00000000u)
  33103. /* secure_enable_clr_reg17 */
  33104. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_544_CLR_MASK (0x00000001u)
  33105. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_544_CLR_SHIFT (0x00000000u)
  33106. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_544_CLR_RESETVAL (0x00000000u)
  33107. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_545_CLR_MASK (0x00000002u)
  33108. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_545_CLR_SHIFT (0x00000001u)
  33109. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_545_CLR_RESETVAL (0x00000000u)
  33110. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_546_CLR_MASK (0x00000004u)
  33111. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_546_CLR_SHIFT (0x00000002u)
  33112. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_546_CLR_RESETVAL (0x00000000u)
  33113. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_547_CLR_MASK (0x00000008u)
  33114. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_547_CLR_SHIFT (0x00000003u)
  33115. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_547_CLR_RESETVAL (0x00000000u)
  33116. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_548_CLR_MASK (0x00000010u)
  33117. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_548_CLR_SHIFT (0x00000004u)
  33118. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_548_CLR_RESETVAL (0x00000000u)
  33119. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_549_CLR_MASK (0x00000020u)
  33120. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_549_CLR_SHIFT (0x00000005u)
  33121. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_549_CLR_RESETVAL (0x00000000u)
  33122. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_550_CLR_MASK (0x00000040u)
  33123. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_550_CLR_SHIFT (0x00000006u)
  33124. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_550_CLR_RESETVAL (0x00000000u)
  33125. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_551_CLR_MASK (0x00000080u)
  33126. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_551_CLR_SHIFT (0x00000007u)
  33127. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_551_CLR_RESETVAL (0x00000000u)
  33128. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_552_CLR_MASK (0x00000100u)
  33129. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_552_CLR_SHIFT (0x00000008u)
  33130. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_552_CLR_RESETVAL (0x00000000u)
  33131. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_553_CLR_MASK (0x00000200u)
  33132. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_553_CLR_SHIFT (0x00000009u)
  33133. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_553_CLR_RESETVAL (0x00000000u)
  33134. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_554_CLR_MASK (0x00000400u)
  33135. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_554_CLR_SHIFT (0x0000000Au)
  33136. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_554_CLR_RESETVAL (0x00000000u)
  33137. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_555_CLR_MASK (0x00000800u)
  33138. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_555_CLR_SHIFT (0x0000000Bu)
  33139. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_555_CLR_RESETVAL (0x00000000u)
  33140. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_556_CLR_MASK (0x00001000u)
  33141. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_556_CLR_SHIFT (0x0000000Cu)
  33142. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_556_CLR_RESETVAL (0x00000000u)
  33143. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_557_CLR_MASK (0x00002000u)
  33144. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_557_CLR_SHIFT (0x0000000Du)
  33145. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_557_CLR_RESETVAL (0x00000000u)
  33146. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_558_CLR_MASK (0x00004000u)
  33147. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_558_CLR_SHIFT (0x0000000Eu)
  33148. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_558_CLR_RESETVAL (0x00000000u)
  33149. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_559_CLR_MASK (0x00008000u)
  33150. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_559_CLR_SHIFT (0x0000000Fu)
  33151. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_559_CLR_RESETVAL (0x00000000u)
  33152. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_560_CLR_MASK (0x00010000u)
  33153. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_560_CLR_SHIFT (0x00000010u)
  33154. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_560_CLR_RESETVAL (0x00000000u)
  33155. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_561_CLR_MASK (0x00020000u)
  33156. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_561_CLR_SHIFT (0x00000011u)
  33157. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_561_CLR_RESETVAL (0x00000000u)
  33158. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_562_CLR_MASK (0x00040000u)
  33159. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_562_CLR_SHIFT (0x00000012u)
  33160. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_562_CLR_RESETVAL (0x00000000u)
  33161. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_563_CLR_MASK (0x00080000u)
  33162. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_563_CLR_SHIFT (0x00000013u)
  33163. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_563_CLR_RESETVAL (0x00000000u)
  33164. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_564_CLR_MASK (0x00100000u)
  33165. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_564_CLR_SHIFT (0x00000014u)
  33166. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_564_CLR_RESETVAL (0x00000000u)
  33167. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_565_CLR_MASK (0x00200000u)
  33168. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_565_CLR_SHIFT (0x00000015u)
  33169. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_565_CLR_RESETVAL (0x00000000u)
  33170. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_566_CLR_MASK (0x00400000u)
  33171. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_566_CLR_SHIFT (0x00000016u)
  33172. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_566_CLR_RESETVAL (0x00000000u)
  33173. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_567_CLR_MASK (0x00800000u)
  33174. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_567_CLR_SHIFT (0x00000017u)
  33175. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_567_CLR_RESETVAL (0x00000000u)
  33176. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_568_CLR_MASK (0x01000000u)
  33177. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_568_CLR_SHIFT (0x00000018u)
  33178. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_568_CLR_RESETVAL (0x00000000u)
  33179. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_569_CLR_MASK (0x02000000u)
  33180. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_569_CLR_SHIFT (0x00000019u)
  33181. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_569_CLR_RESETVAL (0x00000000u)
  33182. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_570_CLR_MASK (0x04000000u)
  33183. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_570_CLR_SHIFT (0x0000001Au)
  33184. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_570_CLR_RESETVAL (0x00000000u)
  33185. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_571_CLR_MASK (0x08000000u)
  33186. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_571_CLR_SHIFT (0x0000001Bu)
  33187. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_571_CLR_RESETVAL (0x00000000u)
  33188. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_572_CLR_MASK (0x10000000u)
  33189. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_572_CLR_SHIFT (0x0000001Cu)
  33190. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_572_CLR_RESETVAL (0x00000000u)
  33191. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_573_CLR_MASK (0x20000000u)
  33192. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_573_CLR_SHIFT (0x0000001Du)
  33193. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_573_CLR_RESETVAL (0x00000000u)
  33194. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_574_CLR_MASK (0x40000000u)
  33195. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_574_CLR_SHIFT (0x0000001Eu)
  33196. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_574_CLR_RESETVAL (0x00000000u)
  33197. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_575_CLR_MASK (0x80000000u)
  33198. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_575_CLR_SHIFT (0x0000001Fu)
  33199. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_SECURE_ENABLE_575_CLR_RESETVAL (0x00000000u)
  33200. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG17_RESETVAL (0x00000000u)
  33201. /* secure_enable_clr_reg18 */
  33202. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_576_CLR_MASK (0x00000001u)
  33203. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_576_CLR_SHIFT (0x00000000u)
  33204. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_576_CLR_RESETVAL (0x00000000u)
  33205. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_577_CLR_MASK (0x00000002u)
  33206. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_577_CLR_SHIFT (0x00000001u)
  33207. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_577_CLR_RESETVAL (0x00000000u)
  33208. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_578_CLR_MASK (0x00000004u)
  33209. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_578_CLR_SHIFT (0x00000002u)
  33210. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_578_CLR_RESETVAL (0x00000000u)
  33211. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_579_CLR_MASK (0x00000008u)
  33212. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_579_CLR_SHIFT (0x00000003u)
  33213. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_579_CLR_RESETVAL (0x00000000u)
  33214. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_580_CLR_MASK (0x00000010u)
  33215. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_580_CLR_SHIFT (0x00000004u)
  33216. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_580_CLR_RESETVAL (0x00000000u)
  33217. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_581_CLR_MASK (0x00000020u)
  33218. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_581_CLR_SHIFT (0x00000005u)
  33219. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_581_CLR_RESETVAL (0x00000000u)
  33220. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_582_CLR_MASK (0x00000040u)
  33221. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_582_CLR_SHIFT (0x00000006u)
  33222. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_582_CLR_RESETVAL (0x00000000u)
  33223. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_583_CLR_MASK (0x00000080u)
  33224. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_583_CLR_SHIFT (0x00000007u)
  33225. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_583_CLR_RESETVAL (0x00000000u)
  33226. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_584_CLR_MASK (0x00000100u)
  33227. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_584_CLR_SHIFT (0x00000008u)
  33228. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_584_CLR_RESETVAL (0x00000000u)
  33229. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_585_CLR_MASK (0x00000200u)
  33230. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_585_CLR_SHIFT (0x00000009u)
  33231. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_585_CLR_RESETVAL (0x00000000u)
  33232. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_586_CLR_MASK (0x00000400u)
  33233. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_586_CLR_SHIFT (0x0000000Au)
  33234. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_586_CLR_RESETVAL (0x00000000u)
  33235. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_587_CLR_MASK (0x00000800u)
  33236. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_587_CLR_SHIFT (0x0000000Bu)
  33237. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_587_CLR_RESETVAL (0x00000000u)
  33238. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_588_CLR_MASK (0x00001000u)
  33239. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_588_CLR_SHIFT (0x0000000Cu)
  33240. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_588_CLR_RESETVAL (0x00000000u)
  33241. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_589_CLR_MASK (0x00002000u)
  33242. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_589_CLR_SHIFT (0x0000000Du)
  33243. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_589_CLR_RESETVAL (0x00000000u)
  33244. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_590_CLR_MASK (0x00004000u)
  33245. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_590_CLR_SHIFT (0x0000000Eu)
  33246. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_590_CLR_RESETVAL (0x00000000u)
  33247. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_591_CLR_MASK (0x00008000u)
  33248. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_591_CLR_SHIFT (0x0000000Fu)
  33249. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_591_CLR_RESETVAL (0x00000000u)
  33250. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_592_CLR_MASK (0x00010000u)
  33251. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_592_CLR_SHIFT (0x00000010u)
  33252. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_592_CLR_RESETVAL (0x00000000u)
  33253. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_593_CLR_MASK (0x00020000u)
  33254. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_593_CLR_SHIFT (0x00000011u)
  33255. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_593_CLR_RESETVAL (0x00000000u)
  33256. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_594_CLR_MASK (0x00040000u)
  33257. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_594_CLR_SHIFT (0x00000012u)
  33258. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_594_CLR_RESETVAL (0x00000000u)
  33259. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_595_CLR_MASK (0x00080000u)
  33260. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_595_CLR_SHIFT (0x00000013u)
  33261. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_595_CLR_RESETVAL (0x00000000u)
  33262. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_596_CLR_MASK (0x00100000u)
  33263. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_596_CLR_SHIFT (0x00000014u)
  33264. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_596_CLR_RESETVAL (0x00000000u)
  33265. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_597_CLR_MASK (0x00200000u)
  33266. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_597_CLR_SHIFT (0x00000015u)
  33267. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_597_CLR_RESETVAL (0x00000000u)
  33268. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_598_CLR_MASK (0x00400000u)
  33269. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_598_CLR_SHIFT (0x00000016u)
  33270. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_598_CLR_RESETVAL (0x00000000u)
  33271. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_599_CLR_MASK (0x00800000u)
  33272. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_599_CLR_SHIFT (0x00000017u)
  33273. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_599_CLR_RESETVAL (0x00000000u)
  33274. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_600_CLR_MASK (0x01000000u)
  33275. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_600_CLR_SHIFT (0x00000018u)
  33276. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_600_CLR_RESETVAL (0x00000000u)
  33277. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_601_CLR_MASK (0x02000000u)
  33278. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_601_CLR_SHIFT (0x00000019u)
  33279. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_601_CLR_RESETVAL (0x00000000u)
  33280. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_602_CLR_MASK (0x04000000u)
  33281. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_602_CLR_SHIFT (0x0000001Au)
  33282. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_602_CLR_RESETVAL (0x00000000u)
  33283. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_603_CLR_MASK (0x08000000u)
  33284. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_603_CLR_SHIFT (0x0000001Bu)
  33285. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_603_CLR_RESETVAL (0x00000000u)
  33286. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_604_CLR_MASK (0x10000000u)
  33287. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_604_CLR_SHIFT (0x0000001Cu)
  33288. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_604_CLR_RESETVAL (0x00000000u)
  33289. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_605_CLR_MASK (0x20000000u)
  33290. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_605_CLR_SHIFT (0x0000001Du)
  33291. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_605_CLR_RESETVAL (0x00000000u)
  33292. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_606_CLR_MASK (0x40000000u)
  33293. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_606_CLR_SHIFT (0x0000001Eu)
  33294. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_606_CLR_RESETVAL (0x00000000u)
  33295. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_607_CLR_MASK (0x80000000u)
  33296. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_607_CLR_SHIFT (0x0000001Fu)
  33297. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_SECURE_ENABLE_607_CLR_RESETVAL (0x00000000u)
  33298. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG18_RESETVAL (0x00000000u)
  33299. /* secure_enable_clr_reg19 */
  33300. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_608_CLR_MASK (0x00000001u)
  33301. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_608_CLR_SHIFT (0x00000000u)
  33302. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_608_CLR_RESETVAL (0x00000000u)
  33303. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_609_CLR_MASK (0x00000002u)
  33304. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_609_CLR_SHIFT (0x00000001u)
  33305. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_609_CLR_RESETVAL (0x00000000u)
  33306. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_610_CLR_MASK (0x00000004u)
  33307. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_610_CLR_SHIFT (0x00000002u)
  33308. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_610_CLR_RESETVAL (0x00000000u)
  33309. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_611_CLR_MASK (0x00000008u)
  33310. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_611_CLR_SHIFT (0x00000003u)
  33311. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_611_CLR_RESETVAL (0x00000000u)
  33312. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_612_CLR_MASK (0x00000010u)
  33313. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_612_CLR_SHIFT (0x00000004u)
  33314. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_612_CLR_RESETVAL (0x00000000u)
  33315. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_613_CLR_MASK (0x00000020u)
  33316. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_613_CLR_SHIFT (0x00000005u)
  33317. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_613_CLR_RESETVAL (0x00000000u)
  33318. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_614_CLR_MASK (0x00000040u)
  33319. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_614_CLR_SHIFT (0x00000006u)
  33320. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_614_CLR_RESETVAL (0x00000000u)
  33321. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_615_CLR_MASK (0x00000080u)
  33322. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_615_CLR_SHIFT (0x00000007u)
  33323. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_615_CLR_RESETVAL (0x00000000u)
  33324. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_616_CLR_MASK (0x00000100u)
  33325. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_616_CLR_SHIFT (0x00000008u)
  33326. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_616_CLR_RESETVAL (0x00000000u)
  33327. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_617_CLR_MASK (0x00000200u)
  33328. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_617_CLR_SHIFT (0x00000009u)
  33329. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_617_CLR_RESETVAL (0x00000000u)
  33330. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_618_CLR_MASK (0x00000400u)
  33331. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_618_CLR_SHIFT (0x0000000Au)
  33332. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_618_CLR_RESETVAL (0x00000000u)
  33333. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_619_CLR_MASK (0x00000800u)
  33334. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_619_CLR_SHIFT (0x0000000Bu)
  33335. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_619_CLR_RESETVAL (0x00000000u)
  33336. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_620_CLR_MASK (0x00001000u)
  33337. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_620_CLR_SHIFT (0x0000000Cu)
  33338. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_620_CLR_RESETVAL (0x00000000u)
  33339. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_621_CLR_MASK (0x00002000u)
  33340. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_621_CLR_SHIFT (0x0000000Du)
  33341. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_621_CLR_RESETVAL (0x00000000u)
  33342. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_622_CLR_MASK (0x00004000u)
  33343. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_622_CLR_SHIFT (0x0000000Eu)
  33344. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_622_CLR_RESETVAL (0x00000000u)
  33345. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_623_CLR_MASK (0x00008000u)
  33346. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_623_CLR_SHIFT (0x0000000Fu)
  33347. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_623_CLR_RESETVAL (0x00000000u)
  33348. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_624_CLR_MASK (0x00010000u)
  33349. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_624_CLR_SHIFT (0x00000010u)
  33350. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_624_CLR_RESETVAL (0x00000000u)
  33351. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_625_CLR_MASK (0x00020000u)
  33352. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_625_CLR_SHIFT (0x00000011u)
  33353. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_625_CLR_RESETVAL (0x00000000u)
  33354. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_626_CLR_MASK (0x00040000u)
  33355. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_626_CLR_SHIFT (0x00000012u)
  33356. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_626_CLR_RESETVAL (0x00000000u)
  33357. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_627_CLR_MASK (0x00080000u)
  33358. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_627_CLR_SHIFT (0x00000013u)
  33359. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_627_CLR_RESETVAL (0x00000000u)
  33360. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_628_CLR_MASK (0x00100000u)
  33361. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_628_CLR_SHIFT (0x00000014u)
  33362. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_628_CLR_RESETVAL (0x00000000u)
  33363. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_629_CLR_MASK (0x00200000u)
  33364. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_629_CLR_SHIFT (0x00000015u)
  33365. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_629_CLR_RESETVAL (0x00000000u)
  33366. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_630_CLR_MASK (0x00400000u)
  33367. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_630_CLR_SHIFT (0x00000016u)
  33368. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_630_CLR_RESETVAL (0x00000000u)
  33369. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_631_CLR_MASK (0x00800000u)
  33370. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_631_CLR_SHIFT (0x00000017u)
  33371. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_631_CLR_RESETVAL (0x00000000u)
  33372. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_632_CLR_MASK (0x01000000u)
  33373. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_632_CLR_SHIFT (0x00000018u)
  33374. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_632_CLR_RESETVAL (0x00000000u)
  33375. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_633_CLR_MASK (0x02000000u)
  33376. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_633_CLR_SHIFT (0x00000019u)
  33377. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_633_CLR_RESETVAL (0x00000000u)
  33378. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_634_CLR_MASK (0x04000000u)
  33379. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_634_CLR_SHIFT (0x0000001Au)
  33380. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_634_CLR_RESETVAL (0x00000000u)
  33381. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_635_CLR_MASK (0x08000000u)
  33382. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_635_CLR_SHIFT (0x0000001Bu)
  33383. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_635_CLR_RESETVAL (0x00000000u)
  33384. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_636_CLR_MASK (0x10000000u)
  33385. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_636_CLR_SHIFT (0x0000001Cu)
  33386. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_636_CLR_RESETVAL (0x00000000u)
  33387. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_637_CLR_MASK (0x20000000u)
  33388. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_637_CLR_SHIFT (0x0000001Du)
  33389. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_637_CLR_RESETVAL (0x00000000u)
  33390. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_638_CLR_MASK (0x40000000u)
  33391. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_638_CLR_SHIFT (0x0000001Eu)
  33392. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_638_CLR_RESETVAL (0x00000000u)
  33393. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_639_CLR_MASK (0x80000000u)
  33394. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_639_CLR_SHIFT (0x0000001Fu)
  33395. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_SECURE_ENABLE_639_CLR_RESETVAL (0x00000000u)
  33396. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG19_RESETVAL (0x00000000u)
  33397. /* secure_enable_clr_reg20 */
  33398. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_640_CLR_MASK (0x00000001u)
  33399. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_640_CLR_SHIFT (0x00000000u)
  33400. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_640_CLR_RESETVAL (0x00000000u)
  33401. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_641_CLR_MASK (0x00000002u)
  33402. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_641_CLR_SHIFT (0x00000001u)
  33403. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_641_CLR_RESETVAL (0x00000000u)
  33404. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_642_CLR_MASK (0x00000004u)
  33405. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_642_CLR_SHIFT (0x00000002u)
  33406. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_642_CLR_RESETVAL (0x00000000u)
  33407. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_643_CLR_MASK (0x00000008u)
  33408. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_643_CLR_SHIFT (0x00000003u)
  33409. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_643_CLR_RESETVAL (0x00000000u)
  33410. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_644_CLR_MASK (0x00000010u)
  33411. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_644_CLR_SHIFT (0x00000004u)
  33412. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_644_CLR_RESETVAL (0x00000000u)
  33413. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_645_CLR_MASK (0x00000020u)
  33414. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_645_CLR_SHIFT (0x00000005u)
  33415. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_645_CLR_RESETVAL (0x00000000u)
  33416. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_646_CLR_MASK (0x00000040u)
  33417. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_646_CLR_SHIFT (0x00000006u)
  33418. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_646_CLR_RESETVAL (0x00000000u)
  33419. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_647_CLR_MASK (0x00000080u)
  33420. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_647_CLR_SHIFT (0x00000007u)
  33421. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_647_CLR_RESETVAL (0x00000000u)
  33422. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_648_CLR_MASK (0x00000100u)
  33423. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_648_CLR_SHIFT (0x00000008u)
  33424. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_648_CLR_RESETVAL (0x00000000u)
  33425. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_649_CLR_MASK (0x00000200u)
  33426. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_649_CLR_SHIFT (0x00000009u)
  33427. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_649_CLR_RESETVAL (0x00000000u)
  33428. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_650_CLR_MASK (0x00000400u)
  33429. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_650_CLR_SHIFT (0x0000000Au)
  33430. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_650_CLR_RESETVAL (0x00000000u)
  33431. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_651_CLR_MASK (0x00000800u)
  33432. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_651_CLR_SHIFT (0x0000000Bu)
  33433. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_651_CLR_RESETVAL (0x00000000u)
  33434. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_652_CLR_MASK (0x00001000u)
  33435. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_652_CLR_SHIFT (0x0000000Cu)
  33436. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_652_CLR_RESETVAL (0x00000000u)
  33437. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_653_CLR_MASK (0x00002000u)
  33438. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_653_CLR_SHIFT (0x0000000Du)
  33439. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_653_CLR_RESETVAL (0x00000000u)
  33440. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_654_CLR_MASK (0x00004000u)
  33441. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_654_CLR_SHIFT (0x0000000Eu)
  33442. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_654_CLR_RESETVAL (0x00000000u)
  33443. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_655_CLR_MASK (0x00008000u)
  33444. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_655_CLR_SHIFT (0x0000000Fu)
  33445. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_655_CLR_RESETVAL (0x00000000u)
  33446. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_656_CLR_MASK (0x00010000u)
  33447. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_656_CLR_SHIFT (0x00000010u)
  33448. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_656_CLR_RESETVAL (0x00000000u)
  33449. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_657_CLR_MASK (0x00020000u)
  33450. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_657_CLR_SHIFT (0x00000011u)
  33451. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_657_CLR_RESETVAL (0x00000000u)
  33452. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_658_CLR_MASK (0x00040000u)
  33453. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_658_CLR_SHIFT (0x00000012u)
  33454. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_658_CLR_RESETVAL (0x00000000u)
  33455. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_659_CLR_MASK (0x00080000u)
  33456. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_659_CLR_SHIFT (0x00000013u)
  33457. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_659_CLR_RESETVAL (0x00000000u)
  33458. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_660_CLR_MASK (0x00100000u)
  33459. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_660_CLR_SHIFT (0x00000014u)
  33460. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_660_CLR_RESETVAL (0x00000000u)
  33461. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_661_CLR_MASK (0x00200000u)
  33462. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_661_CLR_SHIFT (0x00000015u)
  33463. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_661_CLR_RESETVAL (0x00000000u)
  33464. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_662_CLR_MASK (0x00400000u)
  33465. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_662_CLR_SHIFT (0x00000016u)
  33466. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_662_CLR_RESETVAL (0x00000000u)
  33467. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_663_CLR_MASK (0x00800000u)
  33468. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_663_CLR_SHIFT (0x00000017u)
  33469. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_663_CLR_RESETVAL (0x00000000u)
  33470. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_664_CLR_MASK (0x01000000u)
  33471. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_664_CLR_SHIFT (0x00000018u)
  33472. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_664_CLR_RESETVAL (0x00000000u)
  33473. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_665_CLR_MASK (0x02000000u)
  33474. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_665_CLR_SHIFT (0x00000019u)
  33475. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_665_CLR_RESETVAL (0x00000000u)
  33476. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_666_CLR_MASK (0x04000000u)
  33477. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_666_CLR_SHIFT (0x0000001Au)
  33478. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_666_CLR_RESETVAL (0x00000000u)
  33479. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_667_CLR_MASK (0x08000000u)
  33480. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_667_CLR_SHIFT (0x0000001Bu)
  33481. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_667_CLR_RESETVAL (0x00000000u)
  33482. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_668_CLR_MASK (0x10000000u)
  33483. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_668_CLR_SHIFT (0x0000001Cu)
  33484. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_668_CLR_RESETVAL (0x00000000u)
  33485. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_669_CLR_MASK (0x20000000u)
  33486. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_669_CLR_SHIFT (0x0000001Du)
  33487. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_669_CLR_RESETVAL (0x00000000u)
  33488. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_670_CLR_MASK (0x40000000u)
  33489. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_670_CLR_SHIFT (0x0000001Eu)
  33490. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_670_CLR_RESETVAL (0x00000000u)
  33491. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_671_CLR_MASK (0x80000000u)
  33492. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_671_CLR_SHIFT (0x0000001Fu)
  33493. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_SECURE_ENABLE_671_CLR_RESETVAL (0x00000000u)
  33494. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG20_RESETVAL (0x00000000u)
  33495. /* secure_enable_clr_reg21 */
  33496. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_672_CLR_MASK (0x00000001u)
  33497. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_672_CLR_SHIFT (0x00000000u)
  33498. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_672_CLR_RESETVAL (0x00000000u)
  33499. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_673_CLR_MASK (0x00000002u)
  33500. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_673_CLR_SHIFT (0x00000001u)
  33501. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_673_CLR_RESETVAL (0x00000000u)
  33502. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_674_CLR_MASK (0x00000004u)
  33503. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_674_CLR_SHIFT (0x00000002u)
  33504. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_674_CLR_RESETVAL (0x00000000u)
  33505. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_675_CLR_MASK (0x00000008u)
  33506. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_675_CLR_SHIFT (0x00000003u)
  33507. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_675_CLR_RESETVAL (0x00000000u)
  33508. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_676_CLR_MASK (0x00000010u)
  33509. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_676_CLR_SHIFT (0x00000004u)
  33510. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_676_CLR_RESETVAL (0x00000000u)
  33511. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_677_CLR_MASK (0x00000020u)
  33512. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_677_CLR_SHIFT (0x00000005u)
  33513. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_677_CLR_RESETVAL (0x00000000u)
  33514. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_678_CLR_MASK (0x00000040u)
  33515. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_678_CLR_SHIFT (0x00000006u)
  33516. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_678_CLR_RESETVAL (0x00000000u)
  33517. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_679_CLR_MASK (0x00000080u)
  33518. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_679_CLR_SHIFT (0x00000007u)
  33519. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_679_CLR_RESETVAL (0x00000000u)
  33520. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_680_CLR_MASK (0x00000100u)
  33521. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_680_CLR_SHIFT (0x00000008u)
  33522. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_680_CLR_RESETVAL (0x00000000u)
  33523. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_681_CLR_MASK (0x00000200u)
  33524. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_681_CLR_SHIFT (0x00000009u)
  33525. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_681_CLR_RESETVAL (0x00000000u)
  33526. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_682_CLR_MASK (0x00000400u)
  33527. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_682_CLR_SHIFT (0x0000000Au)
  33528. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_682_CLR_RESETVAL (0x00000000u)
  33529. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_683_CLR_MASK (0x00000800u)
  33530. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_683_CLR_SHIFT (0x0000000Bu)
  33531. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_683_CLR_RESETVAL (0x00000000u)
  33532. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_684_CLR_MASK (0x00001000u)
  33533. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_684_CLR_SHIFT (0x0000000Cu)
  33534. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_684_CLR_RESETVAL (0x00000000u)
  33535. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_685_CLR_MASK (0x00002000u)
  33536. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_685_CLR_SHIFT (0x0000000Du)
  33537. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_685_CLR_RESETVAL (0x00000000u)
  33538. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_686_CLR_MASK (0x00004000u)
  33539. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_686_CLR_SHIFT (0x0000000Eu)
  33540. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_686_CLR_RESETVAL (0x00000000u)
  33541. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_687_CLR_MASK (0x00008000u)
  33542. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_687_CLR_SHIFT (0x0000000Fu)
  33543. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_687_CLR_RESETVAL (0x00000000u)
  33544. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_688_CLR_MASK (0x00010000u)
  33545. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_688_CLR_SHIFT (0x00000010u)
  33546. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_688_CLR_RESETVAL (0x00000000u)
  33547. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_689_CLR_MASK (0x00020000u)
  33548. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_689_CLR_SHIFT (0x00000011u)
  33549. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_689_CLR_RESETVAL (0x00000000u)
  33550. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_690_CLR_MASK (0x00040000u)
  33551. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_690_CLR_SHIFT (0x00000012u)
  33552. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_690_CLR_RESETVAL (0x00000000u)
  33553. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_691_CLR_MASK (0x00080000u)
  33554. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_691_CLR_SHIFT (0x00000013u)
  33555. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_691_CLR_RESETVAL (0x00000000u)
  33556. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_692_CLR_MASK (0x00100000u)
  33557. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_692_CLR_SHIFT (0x00000014u)
  33558. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_692_CLR_RESETVAL (0x00000000u)
  33559. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_693_CLR_MASK (0x00200000u)
  33560. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_693_CLR_SHIFT (0x00000015u)
  33561. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_693_CLR_RESETVAL (0x00000000u)
  33562. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_694_CLR_MASK (0x00400000u)
  33563. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_694_CLR_SHIFT (0x00000016u)
  33564. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_694_CLR_RESETVAL (0x00000000u)
  33565. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_695_CLR_MASK (0x00800000u)
  33566. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_695_CLR_SHIFT (0x00000017u)
  33567. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_695_CLR_RESETVAL (0x00000000u)
  33568. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_696_CLR_MASK (0x01000000u)
  33569. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_696_CLR_SHIFT (0x00000018u)
  33570. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_696_CLR_RESETVAL (0x00000000u)
  33571. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_697_CLR_MASK (0x02000000u)
  33572. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_697_CLR_SHIFT (0x00000019u)
  33573. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_697_CLR_RESETVAL (0x00000000u)
  33574. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_698_CLR_MASK (0x04000000u)
  33575. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_698_CLR_SHIFT (0x0000001Au)
  33576. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_698_CLR_RESETVAL (0x00000000u)
  33577. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_699_CLR_MASK (0x08000000u)
  33578. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_699_CLR_SHIFT (0x0000001Bu)
  33579. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_699_CLR_RESETVAL (0x00000000u)
  33580. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_700_CLR_MASK (0x10000000u)
  33581. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_700_CLR_SHIFT (0x0000001Cu)
  33582. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_700_CLR_RESETVAL (0x00000000u)
  33583. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_701_CLR_MASK (0x20000000u)
  33584. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_701_CLR_SHIFT (0x0000001Du)
  33585. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_701_CLR_RESETVAL (0x00000000u)
  33586. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_702_CLR_MASK (0x40000000u)
  33587. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_702_CLR_SHIFT (0x0000001Eu)
  33588. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_702_CLR_RESETVAL (0x00000000u)
  33589. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_703_CLR_MASK (0x80000000u)
  33590. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_703_CLR_SHIFT (0x0000001Fu)
  33591. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_SECURE_ENABLE_703_CLR_RESETVAL (0x00000000u)
  33592. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG21_RESETVAL (0x00000000u)
  33593. /* secure_enable_clr_reg22 */
  33594. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_704_CLR_MASK (0x00000001u)
  33595. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_704_CLR_SHIFT (0x00000000u)
  33596. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_704_CLR_RESETVAL (0x00000000u)
  33597. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_705_CLR_MASK (0x00000002u)
  33598. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_705_CLR_SHIFT (0x00000001u)
  33599. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_705_CLR_RESETVAL (0x00000000u)
  33600. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_706_CLR_MASK (0x00000004u)
  33601. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_706_CLR_SHIFT (0x00000002u)
  33602. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_706_CLR_RESETVAL (0x00000000u)
  33603. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_707_CLR_MASK (0x00000008u)
  33604. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_707_CLR_SHIFT (0x00000003u)
  33605. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_707_CLR_RESETVAL (0x00000000u)
  33606. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_708_CLR_MASK (0x00000010u)
  33607. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_708_CLR_SHIFT (0x00000004u)
  33608. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_708_CLR_RESETVAL (0x00000000u)
  33609. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_709_CLR_MASK (0x00000020u)
  33610. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_709_CLR_SHIFT (0x00000005u)
  33611. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_709_CLR_RESETVAL (0x00000000u)
  33612. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_710_CLR_MASK (0x00000040u)
  33613. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_710_CLR_SHIFT (0x00000006u)
  33614. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_710_CLR_RESETVAL (0x00000000u)
  33615. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_711_CLR_MASK (0x00000080u)
  33616. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_711_CLR_SHIFT (0x00000007u)
  33617. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_711_CLR_RESETVAL (0x00000000u)
  33618. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_712_CLR_MASK (0x00000100u)
  33619. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_712_CLR_SHIFT (0x00000008u)
  33620. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_712_CLR_RESETVAL (0x00000000u)
  33621. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_713_CLR_MASK (0x00000200u)
  33622. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_713_CLR_SHIFT (0x00000009u)
  33623. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_713_CLR_RESETVAL (0x00000000u)
  33624. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_714_CLR_MASK (0x00000400u)
  33625. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_714_CLR_SHIFT (0x0000000Au)
  33626. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_714_CLR_RESETVAL (0x00000000u)
  33627. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_715_CLR_MASK (0x00000800u)
  33628. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_715_CLR_SHIFT (0x0000000Bu)
  33629. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_715_CLR_RESETVAL (0x00000000u)
  33630. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_716_CLR_MASK (0x00001000u)
  33631. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_716_CLR_SHIFT (0x0000000Cu)
  33632. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_716_CLR_RESETVAL (0x00000000u)
  33633. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_717_CLR_MASK (0x00002000u)
  33634. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_717_CLR_SHIFT (0x0000000Du)
  33635. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_717_CLR_RESETVAL (0x00000000u)
  33636. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_718_CLR_MASK (0x00004000u)
  33637. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_718_CLR_SHIFT (0x0000000Eu)
  33638. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_718_CLR_RESETVAL (0x00000000u)
  33639. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_719_CLR_MASK (0x00008000u)
  33640. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_719_CLR_SHIFT (0x0000000Fu)
  33641. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_719_CLR_RESETVAL (0x00000000u)
  33642. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_720_CLR_MASK (0x00010000u)
  33643. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_720_CLR_SHIFT (0x00000010u)
  33644. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_720_CLR_RESETVAL (0x00000000u)
  33645. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_721_CLR_MASK (0x00020000u)
  33646. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_721_CLR_SHIFT (0x00000011u)
  33647. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_721_CLR_RESETVAL (0x00000000u)
  33648. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_722_CLR_MASK (0x00040000u)
  33649. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_722_CLR_SHIFT (0x00000012u)
  33650. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_722_CLR_RESETVAL (0x00000000u)
  33651. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_723_CLR_MASK (0x00080000u)
  33652. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_723_CLR_SHIFT (0x00000013u)
  33653. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_723_CLR_RESETVAL (0x00000000u)
  33654. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_724_CLR_MASK (0x00100000u)
  33655. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_724_CLR_SHIFT (0x00000014u)
  33656. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_724_CLR_RESETVAL (0x00000000u)
  33657. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_725_CLR_MASK (0x00200000u)
  33658. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_725_CLR_SHIFT (0x00000015u)
  33659. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_725_CLR_RESETVAL (0x00000000u)
  33660. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_726_CLR_MASK (0x00400000u)
  33661. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_726_CLR_SHIFT (0x00000016u)
  33662. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_726_CLR_RESETVAL (0x00000000u)
  33663. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_727_CLR_MASK (0x00800000u)
  33664. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_727_CLR_SHIFT (0x00000017u)
  33665. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_727_CLR_RESETVAL (0x00000000u)
  33666. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_728_CLR_MASK (0x01000000u)
  33667. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_728_CLR_SHIFT (0x00000018u)
  33668. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_728_CLR_RESETVAL (0x00000000u)
  33669. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_729_CLR_MASK (0x02000000u)
  33670. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_729_CLR_SHIFT (0x00000019u)
  33671. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_729_CLR_RESETVAL (0x00000000u)
  33672. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_730_CLR_MASK (0x04000000u)
  33673. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_730_CLR_SHIFT (0x0000001Au)
  33674. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_730_CLR_RESETVAL (0x00000000u)
  33675. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_731_CLR_MASK (0x08000000u)
  33676. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_731_CLR_SHIFT (0x0000001Bu)
  33677. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_731_CLR_RESETVAL (0x00000000u)
  33678. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_732_CLR_MASK (0x10000000u)
  33679. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_732_CLR_SHIFT (0x0000001Cu)
  33680. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_732_CLR_RESETVAL (0x00000000u)
  33681. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_733_CLR_MASK (0x20000000u)
  33682. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_733_CLR_SHIFT (0x0000001Du)
  33683. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_733_CLR_RESETVAL (0x00000000u)
  33684. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_734_CLR_MASK (0x40000000u)
  33685. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_734_CLR_SHIFT (0x0000001Eu)
  33686. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_734_CLR_RESETVAL (0x00000000u)
  33687. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_735_CLR_MASK (0x80000000u)
  33688. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_735_CLR_SHIFT (0x0000001Fu)
  33689. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_SECURE_ENABLE_735_CLR_RESETVAL (0x00000000u)
  33690. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG22_RESETVAL (0x00000000u)
  33691. /* secure_enable_clr_reg23 */
  33692. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_736_CLR_MASK (0x00000001u)
  33693. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_736_CLR_SHIFT (0x00000000u)
  33694. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_736_CLR_RESETVAL (0x00000000u)
  33695. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_737_CLR_MASK (0x00000002u)
  33696. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_737_CLR_SHIFT (0x00000001u)
  33697. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_737_CLR_RESETVAL (0x00000000u)
  33698. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_738_CLR_MASK (0x00000004u)
  33699. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_738_CLR_SHIFT (0x00000002u)
  33700. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_738_CLR_RESETVAL (0x00000000u)
  33701. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_739_CLR_MASK (0x00000008u)
  33702. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_739_CLR_SHIFT (0x00000003u)
  33703. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_739_CLR_RESETVAL (0x00000000u)
  33704. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_740_CLR_MASK (0x00000010u)
  33705. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_740_CLR_SHIFT (0x00000004u)
  33706. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_740_CLR_RESETVAL (0x00000000u)
  33707. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_741_CLR_MASK (0x00000020u)
  33708. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_741_CLR_SHIFT (0x00000005u)
  33709. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_741_CLR_RESETVAL (0x00000000u)
  33710. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_742_CLR_MASK (0x00000040u)
  33711. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_742_CLR_SHIFT (0x00000006u)
  33712. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_742_CLR_RESETVAL (0x00000000u)
  33713. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_743_CLR_MASK (0x00000080u)
  33714. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_743_CLR_SHIFT (0x00000007u)
  33715. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_743_CLR_RESETVAL (0x00000000u)
  33716. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_744_CLR_MASK (0x00000100u)
  33717. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_744_CLR_SHIFT (0x00000008u)
  33718. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_744_CLR_RESETVAL (0x00000000u)
  33719. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_745_CLR_MASK (0x00000200u)
  33720. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_745_CLR_SHIFT (0x00000009u)
  33721. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_745_CLR_RESETVAL (0x00000000u)
  33722. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_746_CLR_MASK (0x00000400u)
  33723. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_746_CLR_SHIFT (0x0000000Au)
  33724. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_746_CLR_RESETVAL (0x00000000u)
  33725. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_747_CLR_MASK (0x00000800u)
  33726. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_747_CLR_SHIFT (0x0000000Bu)
  33727. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_747_CLR_RESETVAL (0x00000000u)
  33728. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_748_CLR_MASK (0x00001000u)
  33729. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_748_CLR_SHIFT (0x0000000Cu)
  33730. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_748_CLR_RESETVAL (0x00000000u)
  33731. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_749_CLR_MASK (0x00002000u)
  33732. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_749_CLR_SHIFT (0x0000000Du)
  33733. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_749_CLR_RESETVAL (0x00000000u)
  33734. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_750_CLR_MASK (0x00004000u)
  33735. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_750_CLR_SHIFT (0x0000000Eu)
  33736. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_750_CLR_RESETVAL (0x00000000u)
  33737. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_751_CLR_MASK (0x00008000u)
  33738. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_751_CLR_SHIFT (0x0000000Fu)
  33739. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_751_CLR_RESETVAL (0x00000000u)
  33740. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_752_CLR_MASK (0x00010000u)
  33741. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_752_CLR_SHIFT (0x00000010u)
  33742. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_752_CLR_RESETVAL (0x00000000u)
  33743. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_753_CLR_MASK (0x00020000u)
  33744. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_753_CLR_SHIFT (0x00000011u)
  33745. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_753_CLR_RESETVAL (0x00000000u)
  33746. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_754_CLR_MASK (0x00040000u)
  33747. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_754_CLR_SHIFT (0x00000012u)
  33748. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_754_CLR_RESETVAL (0x00000000u)
  33749. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_755_CLR_MASK (0x00080000u)
  33750. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_755_CLR_SHIFT (0x00000013u)
  33751. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_755_CLR_RESETVAL (0x00000000u)
  33752. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_756_CLR_MASK (0x00100000u)
  33753. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_756_CLR_SHIFT (0x00000014u)
  33754. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_756_CLR_RESETVAL (0x00000000u)
  33755. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_757_CLR_MASK (0x00200000u)
  33756. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_757_CLR_SHIFT (0x00000015u)
  33757. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_757_CLR_RESETVAL (0x00000000u)
  33758. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_758_CLR_MASK (0x00400000u)
  33759. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_758_CLR_SHIFT (0x00000016u)
  33760. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_758_CLR_RESETVAL (0x00000000u)
  33761. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_759_CLR_MASK (0x00800000u)
  33762. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_759_CLR_SHIFT (0x00000017u)
  33763. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_759_CLR_RESETVAL (0x00000000u)
  33764. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_760_CLR_MASK (0x01000000u)
  33765. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_760_CLR_SHIFT (0x00000018u)
  33766. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_760_CLR_RESETVAL (0x00000000u)
  33767. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_761_CLR_MASK (0x02000000u)
  33768. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_761_CLR_SHIFT (0x00000019u)
  33769. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_761_CLR_RESETVAL (0x00000000u)
  33770. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_762_CLR_MASK (0x04000000u)
  33771. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_762_CLR_SHIFT (0x0000001Au)
  33772. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_762_CLR_RESETVAL (0x00000000u)
  33773. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_763_CLR_MASK (0x08000000u)
  33774. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_763_CLR_SHIFT (0x0000001Bu)
  33775. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_763_CLR_RESETVAL (0x00000000u)
  33776. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_764_CLR_MASK (0x10000000u)
  33777. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_764_CLR_SHIFT (0x0000001Cu)
  33778. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_764_CLR_RESETVAL (0x00000000u)
  33779. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_765_CLR_MASK (0x20000000u)
  33780. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_765_CLR_SHIFT (0x0000001Du)
  33781. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_765_CLR_RESETVAL (0x00000000u)
  33782. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_766_CLR_MASK (0x40000000u)
  33783. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_766_CLR_SHIFT (0x0000001Eu)
  33784. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_766_CLR_RESETVAL (0x00000000u)
  33785. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_767_CLR_MASK (0x80000000u)
  33786. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_767_CLR_SHIFT (0x0000001Fu)
  33787. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_SECURE_ENABLE_767_CLR_RESETVAL (0x00000000u)
  33788. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG23_RESETVAL (0x00000000u)
  33789. /* secure_enable_clr_reg24 */
  33790. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_768_CLR_MASK (0x00000001u)
  33791. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_768_CLR_SHIFT (0x00000000u)
  33792. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_768_CLR_RESETVAL (0x00000000u)
  33793. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_769_CLR_MASK (0x00000002u)
  33794. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_769_CLR_SHIFT (0x00000001u)
  33795. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_769_CLR_RESETVAL (0x00000000u)
  33796. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_770_CLR_MASK (0x00000004u)
  33797. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_770_CLR_SHIFT (0x00000002u)
  33798. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_770_CLR_RESETVAL (0x00000000u)
  33799. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_771_CLR_MASK (0x00000008u)
  33800. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_771_CLR_SHIFT (0x00000003u)
  33801. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_771_CLR_RESETVAL (0x00000000u)
  33802. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_772_CLR_MASK (0x00000010u)
  33803. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_772_CLR_SHIFT (0x00000004u)
  33804. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_772_CLR_RESETVAL (0x00000000u)
  33805. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_773_CLR_MASK (0x00000020u)
  33806. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_773_CLR_SHIFT (0x00000005u)
  33807. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_773_CLR_RESETVAL (0x00000000u)
  33808. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_774_CLR_MASK (0x00000040u)
  33809. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_774_CLR_SHIFT (0x00000006u)
  33810. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_774_CLR_RESETVAL (0x00000000u)
  33811. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_775_CLR_MASK (0x00000080u)
  33812. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_775_CLR_SHIFT (0x00000007u)
  33813. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_775_CLR_RESETVAL (0x00000000u)
  33814. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_776_CLR_MASK (0x00000100u)
  33815. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_776_CLR_SHIFT (0x00000008u)
  33816. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_776_CLR_RESETVAL (0x00000000u)
  33817. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_777_CLR_MASK (0x00000200u)
  33818. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_777_CLR_SHIFT (0x00000009u)
  33819. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_777_CLR_RESETVAL (0x00000000u)
  33820. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_778_CLR_MASK (0x00000400u)
  33821. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_778_CLR_SHIFT (0x0000000Au)
  33822. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_778_CLR_RESETVAL (0x00000000u)
  33823. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_779_CLR_MASK (0x00000800u)
  33824. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_779_CLR_SHIFT (0x0000000Bu)
  33825. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_779_CLR_RESETVAL (0x00000000u)
  33826. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_780_CLR_MASK (0x00001000u)
  33827. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_780_CLR_SHIFT (0x0000000Cu)
  33828. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_780_CLR_RESETVAL (0x00000000u)
  33829. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_781_CLR_MASK (0x00002000u)
  33830. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_781_CLR_SHIFT (0x0000000Du)
  33831. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_781_CLR_RESETVAL (0x00000000u)
  33832. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_782_CLR_MASK (0x00004000u)
  33833. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_782_CLR_SHIFT (0x0000000Eu)
  33834. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_782_CLR_RESETVAL (0x00000000u)
  33835. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_783_CLR_MASK (0x00008000u)
  33836. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_783_CLR_SHIFT (0x0000000Fu)
  33837. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_783_CLR_RESETVAL (0x00000000u)
  33838. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_784_CLR_MASK (0x00010000u)
  33839. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_784_CLR_SHIFT (0x00000010u)
  33840. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_784_CLR_RESETVAL (0x00000000u)
  33841. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_785_CLR_MASK (0x00020000u)
  33842. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_785_CLR_SHIFT (0x00000011u)
  33843. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_785_CLR_RESETVAL (0x00000000u)
  33844. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_786_CLR_MASK (0x00040000u)
  33845. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_786_CLR_SHIFT (0x00000012u)
  33846. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_786_CLR_RESETVAL (0x00000000u)
  33847. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_787_CLR_MASK (0x00080000u)
  33848. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_787_CLR_SHIFT (0x00000013u)
  33849. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_787_CLR_RESETVAL (0x00000000u)
  33850. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_788_CLR_MASK (0x00100000u)
  33851. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_788_CLR_SHIFT (0x00000014u)
  33852. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_788_CLR_RESETVAL (0x00000000u)
  33853. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_789_CLR_MASK (0x00200000u)
  33854. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_789_CLR_SHIFT (0x00000015u)
  33855. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_789_CLR_RESETVAL (0x00000000u)
  33856. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_790_CLR_MASK (0x00400000u)
  33857. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_790_CLR_SHIFT (0x00000016u)
  33858. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_790_CLR_RESETVAL (0x00000000u)
  33859. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_791_CLR_MASK (0x00800000u)
  33860. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_791_CLR_SHIFT (0x00000017u)
  33861. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_791_CLR_RESETVAL (0x00000000u)
  33862. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_792_CLR_MASK (0x01000000u)
  33863. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_792_CLR_SHIFT (0x00000018u)
  33864. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_792_CLR_RESETVAL (0x00000000u)
  33865. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_793_CLR_MASK (0x02000000u)
  33866. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_793_CLR_SHIFT (0x00000019u)
  33867. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_793_CLR_RESETVAL (0x00000000u)
  33868. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_794_CLR_MASK (0x04000000u)
  33869. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_794_CLR_SHIFT (0x0000001Au)
  33870. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_794_CLR_RESETVAL (0x00000000u)
  33871. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_795_CLR_MASK (0x08000000u)
  33872. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_795_CLR_SHIFT (0x0000001Bu)
  33873. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_795_CLR_RESETVAL (0x00000000u)
  33874. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_796_CLR_MASK (0x10000000u)
  33875. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_796_CLR_SHIFT (0x0000001Cu)
  33876. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_796_CLR_RESETVAL (0x00000000u)
  33877. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_797_CLR_MASK (0x20000000u)
  33878. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_797_CLR_SHIFT (0x0000001Du)
  33879. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_797_CLR_RESETVAL (0x00000000u)
  33880. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_798_CLR_MASK (0x40000000u)
  33881. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_798_CLR_SHIFT (0x0000001Eu)
  33882. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_798_CLR_RESETVAL (0x00000000u)
  33883. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_799_CLR_MASK (0x80000000u)
  33884. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_799_CLR_SHIFT (0x0000001Fu)
  33885. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_SECURE_ENABLE_799_CLR_RESETVAL (0x00000000u)
  33886. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG24_RESETVAL (0x00000000u)
  33887. /* secure_enable_clr_reg25 */
  33888. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_800_CLR_MASK (0x00000001u)
  33889. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_800_CLR_SHIFT (0x00000000u)
  33890. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_800_CLR_RESETVAL (0x00000000u)
  33891. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_801_CLR_MASK (0x00000002u)
  33892. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_801_CLR_SHIFT (0x00000001u)
  33893. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_801_CLR_RESETVAL (0x00000000u)
  33894. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_802_CLR_MASK (0x00000004u)
  33895. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_802_CLR_SHIFT (0x00000002u)
  33896. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_802_CLR_RESETVAL (0x00000000u)
  33897. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_803_CLR_MASK (0x00000008u)
  33898. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_803_CLR_SHIFT (0x00000003u)
  33899. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_803_CLR_RESETVAL (0x00000000u)
  33900. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_804_CLR_MASK (0x00000010u)
  33901. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_804_CLR_SHIFT (0x00000004u)
  33902. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_804_CLR_RESETVAL (0x00000000u)
  33903. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_805_CLR_MASK (0x00000020u)
  33904. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_805_CLR_SHIFT (0x00000005u)
  33905. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_805_CLR_RESETVAL (0x00000000u)
  33906. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_806_CLR_MASK (0x00000040u)
  33907. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_806_CLR_SHIFT (0x00000006u)
  33908. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_806_CLR_RESETVAL (0x00000000u)
  33909. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_807_CLR_MASK (0x00000080u)
  33910. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_807_CLR_SHIFT (0x00000007u)
  33911. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_807_CLR_RESETVAL (0x00000000u)
  33912. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_808_CLR_MASK (0x00000100u)
  33913. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_808_CLR_SHIFT (0x00000008u)
  33914. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_808_CLR_RESETVAL (0x00000000u)
  33915. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_809_CLR_MASK (0x00000200u)
  33916. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_809_CLR_SHIFT (0x00000009u)
  33917. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_809_CLR_RESETVAL (0x00000000u)
  33918. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_810_CLR_MASK (0x00000400u)
  33919. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_810_CLR_SHIFT (0x0000000Au)
  33920. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_810_CLR_RESETVAL (0x00000000u)
  33921. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_811_CLR_MASK (0x00000800u)
  33922. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_811_CLR_SHIFT (0x0000000Bu)
  33923. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_811_CLR_RESETVAL (0x00000000u)
  33924. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_812_CLR_MASK (0x00001000u)
  33925. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_812_CLR_SHIFT (0x0000000Cu)
  33926. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_812_CLR_RESETVAL (0x00000000u)
  33927. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_813_CLR_MASK (0x00002000u)
  33928. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_813_CLR_SHIFT (0x0000000Du)
  33929. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_813_CLR_RESETVAL (0x00000000u)
  33930. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_814_CLR_MASK (0x00004000u)
  33931. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_814_CLR_SHIFT (0x0000000Eu)
  33932. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_814_CLR_RESETVAL (0x00000000u)
  33933. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_815_CLR_MASK (0x00008000u)
  33934. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_815_CLR_SHIFT (0x0000000Fu)
  33935. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_815_CLR_RESETVAL (0x00000000u)
  33936. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_816_CLR_MASK (0x00010000u)
  33937. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_816_CLR_SHIFT (0x00000010u)
  33938. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_816_CLR_RESETVAL (0x00000000u)
  33939. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_817_CLR_MASK (0x00020000u)
  33940. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_817_CLR_SHIFT (0x00000011u)
  33941. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_817_CLR_RESETVAL (0x00000000u)
  33942. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_818_CLR_MASK (0x00040000u)
  33943. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_818_CLR_SHIFT (0x00000012u)
  33944. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_818_CLR_RESETVAL (0x00000000u)
  33945. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_819_CLR_MASK (0x00080000u)
  33946. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_819_CLR_SHIFT (0x00000013u)
  33947. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_819_CLR_RESETVAL (0x00000000u)
  33948. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_820_CLR_MASK (0x00100000u)
  33949. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_820_CLR_SHIFT (0x00000014u)
  33950. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_820_CLR_RESETVAL (0x00000000u)
  33951. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_821_CLR_MASK (0x00200000u)
  33952. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_821_CLR_SHIFT (0x00000015u)
  33953. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_821_CLR_RESETVAL (0x00000000u)
  33954. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_822_CLR_MASK (0x00400000u)
  33955. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_822_CLR_SHIFT (0x00000016u)
  33956. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_822_CLR_RESETVAL (0x00000000u)
  33957. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_823_CLR_MASK (0x00800000u)
  33958. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_823_CLR_SHIFT (0x00000017u)
  33959. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_823_CLR_RESETVAL (0x00000000u)
  33960. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_824_CLR_MASK (0x01000000u)
  33961. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_824_CLR_SHIFT (0x00000018u)
  33962. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_824_CLR_RESETVAL (0x00000000u)
  33963. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_825_CLR_MASK (0x02000000u)
  33964. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_825_CLR_SHIFT (0x00000019u)
  33965. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_825_CLR_RESETVAL (0x00000000u)
  33966. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_826_CLR_MASK (0x04000000u)
  33967. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_826_CLR_SHIFT (0x0000001Au)
  33968. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_826_CLR_RESETVAL (0x00000000u)
  33969. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_827_CLR_MASK (0x08000000u)
  33970. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_827_CLR_SHIFT (0x0000001Bu)
  33971. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_827_CLR_RESETVAL (0x00000000u)
  33972. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_828_CLR_MASK (0x10000000u)
  33973. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_828_CLR_SHIFT (0x0000001Cu)
  33974. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_828_CLR_RESETVAL (0x00000000u)
  33975. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_829_CLR_MASK (0x20000000u)
  33976. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_829_CLR_SHIFT (0x0000001Du)
  33977. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_829_CLR_RESETVAL (0x00000000u)
  33978. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_830_CLR_MASK (0x40000000u)
  33979. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_830_CLR_SHIFT (0x0000001Eu)
  33980. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_830_CLR_RESETVAL (0x00000000u)
  33981. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_831_CLR_MASK (0x80000000u)
  33982. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_831_CLR_SHIFT (0x0000001Fu)
  33983. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_SECURE_ENABLE_831_CLR_RESETVAL (0x00000000u)
  33984. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG25_RESETVAL (0x00000000u)
  33985. /* secure_enable_clr_reg26 */
  33986. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_832_CLR_MASK (0x00000001u)
  33987. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_832_CLR_SHIFT (0x00000000u)
  33988. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_832_CLR_RESETVAL (0x00000000u)
  33989. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_833_CLR_MASK (0x00000002u)
  33990. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_833_CLR_SHIFT (0x00000001u)
  33991. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_833_CLR_RESETVAL (0x00000000u)
  33992. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_834_CLR_MASK (0x00000004u)
  33993. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_834_CLR_SHIFT (0x00000002u)
  33994. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_834_CLR_RESETVAL (0x00000000u)
  33995. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_835_CLR_MASK (0x00000008u)
  33996. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_835_CLR_SHIFT (0x00000003u)
  33997. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_835_CLR_RESETVAL (0x00000000u)
  33998. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_836_CLR_MASK (0x00000010u)
  33999. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_836_CLR_SHIFT (0x00000004u)
  34000. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_836_CLR_RESETVAL (0x00000000u)
  34001. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_837_CLR_MASK (0x00000020u)
  34002. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_837_CLR_SHIFT (0x00000005u)
  34003. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_837_CLR_RESETVAL (0x00000000u)
  34004. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_838_CLR_MASK (0x00000040u)
  34005. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_838_CLR_SHIFT (0x00000006u)
  34006. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_838_CLR_RESETVAL (0x00000000u)
  34007. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_839_CLR_MASK (0x00000080u)
  34008. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_839_CLR_SHIFT (0x00000007u)
  34009. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_839_CLR_RESETVAL (0x00000000u)
  34010. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_840_CLR_MASK (0x00000100u)
  34011. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_840_CLR_SHIFT (0x00000008u)
  34012. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_840_CLR_RESETVAL (0x00000000u)
  34013. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_841_CLR_MASK (0x00000200u)
  34014. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_841_CLR_SHIFT (0x00000009u)
  34015. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_841_CLR_RESETVAL (0x00000000u)
  34016. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_842_CLR_MASK (0x00000400u)
  34017. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_842_CLR_SHIFT (0x0000000Au)
  34018. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_842_CLR_RESETVAL (0x00000000u)
  34019. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_843_CLR_MASK (0x00000800u)
  34020. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_843_CLR_SHIFT (0x0000000Bu)
  34021. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_843_CLR_RESETVAL (0x00000000u)
  34022. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_844_CLR_MASK (0x00001000u)
  34023. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_844_CLR_SHIFT (0x0000000Cu)
  34024. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_844_CLR_RESETVAL (0x00000000u)
  34025. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_845_CLR_MASK (0x00002000u)
  34026. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_845_CLR_SHIFT (0x0000000Du)
  34027. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_845_CLR_RESETVAL (0x00000000u)
  34028. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_846_CLR_MASK (0x00004000u)
  34029. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_846_CLR_SHIFT (0x0000000Eu)
  34030. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_846_CLR_RESETVAL (0x00000000u)
  34031. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_847_CLR_MASK (0x00008000u)
  34032. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_847_CLR_SHIFT (0x0000000Fu)
  34033. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_847_CLR_RESETVAL (0x00000000u)
  34034. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_848_CLR_MASK (0x00010000u)
  34035. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_848_CLR_SHIFT (0x00000010u)
  34036. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_848_CLR_RESETVAL (0x00000000u)
  34037. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_849_CLR_MASK (0x00020000u)
  34038. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_849_CLR_SHIFT (0x00000011u)
  34039. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_849_CLR_RESETVAL (0x00000000u)
  34040. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_850_CLR_MASK (0x00040000u)
  34041. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_850_CLR_SHIFT (0x00000012u)
  34042. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_850_CLR_RESETVAL (0x00000000u)
  34043. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_851_CLR_MASK (0x00080000u)
  34044. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_851_CLR_SHIFT (0x00000013u)
  34045. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_851_CLR_RESETVAL (0x00000000u)
  34046. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_852_CLR_MASK (0x00100000u)
  34047. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_852_CLR_SHIFT (0x00000014u)
  34048. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_852_CLR_RESETVAL (0x00000000u)
  34049. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_853_CLR_MASK (0x00200000u)
  34050. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_853_CLR_SHIFT (0x00000015u)
  34051. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_853_CLR_RESETVAL (0x00000000u)
  34052. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_854_CLR_MASK (0x00400000u)
  34053. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_854_CLR_SHIFT (0x00000016u)
  34054. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_854_CLR_RESETVAL (0x00000000u)
  34055. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_855_CLR_MASK (0x00800000u)
  34056. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_855_CLR_SHIFT (0x00000017u)
  34057. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_855_CLR_RESETVAL (0x00000000u)
  34058. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_856_CLR_MASK (0x01000000u)
  34059. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_856_CLR_SHIFT (0x00000018u)
  34060. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_856_CLR_RESETVAL (0x00000000u)
  34061. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_857_CLR_MASK (0x02000000u)
  34062. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_857_CLR_SHIFT (0x00000019u)
  34063. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_857_CLR_RESETVAL (0x00000000u)
  34064. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_858_CLR_MASK (0x04000000u)
  34065. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_858_CLR_SHIFT (0x0000001Au)
  34066. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_858_CLR_RESETVAL (0x00000000u)
  34067. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_859_CLR_MASK (0x08000000u)
  34068. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_859_CLR_SHIFT (0x0000001Bu)
  34069. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_859_CLR_RESETVAL (0x00000000u)
  34070. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_860_CLR_MASK (0x10000000u)
  34071. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_860_CLR_SHIFT (0x0000001Cu)
  34072. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_860_CLR_RESETVAL (0x00000000u)
  34073. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_861_CLR_MASK (0x20000000u)
  34074. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_861_CLR_SHIFT (0x0000001Du)
  34075. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_861_CLR_RESETVAL (0x00000000u)
  34076. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_862_CLR_MASK (0x40000000u)
  34077. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_862_CLR_SHIFT (0x0000001Eu)
  34078. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_862_CLR_RESETVAL (0x00000000u)
  34079. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_863_CLR_MASK (0x80000000u)
  34080. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_863_CLR_SHIFT (0x0000001Fu)
  34081. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_SECURE_ENABLE_863_CLR_RESETVAL (0x00000000u)
  34082. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG26_RESETVAL (0x00000000u)
  34083. /* secure_enable_clr_reg27 */
  34084. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_864_CLR_MASK (0x00000001u)
  34085. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_864_CLR_SHIFT (0x00000000u)
  34086. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_864_CLR_RESETVAL (0x00000000u)
  34087. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_865_CLR_MASK (0x00000002u)
  34088. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_865_CLR_SHIFT (0x00000001u)
  34089. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_865_CLR_RESETVAL (0x00000000u)
  34090. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_866_CLR_MASK (0x00000004u)
  34091. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_866_CLR_SHIFT (0x00000002u)
  34092. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_866_CLR_RESETVAL (0x00000000u)
  34093. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_867_CLR_MASK (0x00000008u)
  34094. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_867_CLR_SHIFT (0x00000003u)
  34095. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_867_CLR_RESETVAL (0x00000000u)
  34096. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_868_CLR_MASK (0x00000010u)
  34097. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_868_CLR_SHIFT (0x00000004u)
  34098. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_868_CLR_RESETVAL (0x00000000u)
  34099. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_869_CLR_MASK (0x00000020u)
  34100. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_869_CLR_SHIFT (0x00000005u)
  34101. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_869_CLR_RESETVAL (0x00000000u)
  34102. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_870_CLR_MASK (0x00000040u)
  34103. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_870_CLR_SHIFT (0x00000006u)
  34104. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_870_CLR_RESETVAL (0x00000000u)
  34105. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_871_CLR_MASK (0x00000080u)
  34106. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_871_CLR_SHIFT (0x00000007u)
  34107. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_871_CLR_RESETVAL (0x00000000u)
  34108. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_872_CLR_MASK (0x00000100u)
  34109. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_872_CLR_SHIFT (0x00000008u)
  34110. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_872_CLR_RESETVAL (0x00000000u)
  34111. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_873_CLR_MASK (0x00000200u)
  34112. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_873_CLR_SHIFT (0x00000009u)
  34113. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_873_CLR_RESETVAL (0x00000000u)
  34114. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_874_CLR_MASK (0x00000400u)
  34115. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_874_CLR_SHIFT (0x0000000Au)
  34116. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_874_CLR_RESETVAL (0x00000000u)
  34117. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_875_CLR_MASK (0x00000800u)
  34118. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_875_CLR_SHIFT (0x0000000Bu)
  34119. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_875_CLR_RESETVAL (0x00000000u)
  34120. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_876_CLR_MASK (0x00001000u)
  34121. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_876_CLR_SHIFT (0x0000000Cu)
  34122. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_876_CLR_RESETVAL (0x00000000u)
  34123. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_877_CLR_MASK (0x00002000u)
  34124. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_877_CLR_SHIFT (0x0000000Du)
  34125. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_877_CLR_RESETVAL (0x00000000u)
  34126. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_878_CLR_MASK (0x00004000u)
  34127. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_878_CLR_SHIFT (0x0000000Eu)
  34128. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_878_CLR_RESETVAL (0x00000000u)
  34129. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_879_CLR_MASK (0x00008000u)
  34130. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_879_CLR_SHIFT (0x0000000Fu)
  34131. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_879_CLR_RESETVAL (0x00000000u)
  34132. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_880_CLR_MASK (0x00010000u)
  34133. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_880_CLR_SHIFT (0x00000010u)
  34134. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_880_CLR_RESETVAL (0x00000000u)
  34135. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_881_CLR_MASK (0x00020000u)
  34136. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_881_CLR_SHIFT (0x00000011u)
  34137. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_881_CLR_RESETVAL (0x00000000u)
  34138. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_882_CLR_MASK (0x00040000u)
  34139. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_882_CLR_SHIFT (0x00000012u)
  34140. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_882_CLR_RESETVAL (0x00000000u)
  34141. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_883_CLR_MASK (0x00080000u)
  34142. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_883_CLR_SHIFT (0x00000013u)
  34143. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_883_CLR_RESETVAL (0x00000000u)
  34144. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_884_CLR_MASK (0x00100000u)
  34145. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_884_CLR_SHIFT (0x00000014u)
  34146. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_884_CLR_RESETVAL (0x00000000u)
  34147. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_885_CLR_MASK (0x00200000u)
  34148. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_885_CLR_SHIFT (0x00000015u)
  34149. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_885_CLR_RESETVAL (0x00000000u)
  34150. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_886_CLR_MASK (0x00400000u)
  34151. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_886_CLR_SHIFT (0x00000016u)
  34152. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_886_CLR_RESETVAL (0x00000000u)
  34153. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_887_CLR_MASK (0x00800000u)
  34154. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_887_CLR_SHIFT (0x00000017u)
  34155. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_887_CLR_RESETVAL (0x00000000u)
  34156. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_888_CLR_MASK (0x01000000u)
  34157. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_888_CLR_SHIFT (0x00000018u)
  34158. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_888_CLR_RESETVAL (0x00000000u)
  34159. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_889_CLR_MASK (0x02000000u)
  34160. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_889_CLR_SHIFT (0x00000019u)
  34161. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_889_CLR_RESETVAL (0x00000000u)
  34162. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_890_CLR_MASK (0x04000000u)
  34163. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_890_CLR_SHIFT (0x0000001Au)
  34164. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_890_CLR_RESETVAL (0x00000000u)
  34165. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_891_CLR_MASK (0x08000000u)
  34166. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_891_CLR_SHIFT (0x0000001Bu)
  34167. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_891_CLR_RESETVAL (0x00000000u)
  34168. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_892_CLR_MASK (0x10000000u)
  34169. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_892_CLR_SHIFT (0x0000001Cu)
  34170. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_892_CLR_RESETVAL (0x00000000u)
  34171. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_893_CLR_MASK (0x20000000u)
  34172. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_893_CLR_SHIFT (0x0000001Du)
  34173. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_893_CLR_RESETVAL (0x00000000u)
  34174. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_894_CLR_MASK (0x40000000u)
  34175. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_894_CLR_SHIFT (0x0000001Eu)
  34176. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_894_CLR_RESETVAL (0x00000000u)
  34177. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_895_CLR_MASK (0x80000000u)
  34178. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_895_CLR_SHIFT (0x0000001Fu)
  34179. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_SECURE_ENABLE_895_CLR_RESETVAL (0x00000000u)
  34180. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG27_RESETVAL (0x00000000u)
  34181. /* secure_enable_clr_reg28 */
  34182. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_896_CLR_MASK (0x00000001u)
  34183. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_896_CLR_SHIFT (0x00000000u)
  34184. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_896_CLR_RESETVAL (0x00000000u)
  34185. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_897_CLR_MASK (0x00000002u)
  34186. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_897_CLR_SHIFT (0x00000001u)
  34187. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_897_CLR_RESETVAL (0x00000000u)
  34188. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_898_CLR_MASK (0x00000004u)
  34189. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_898_CLR_SHIFT (0x00000002u)
  34190. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_898_CLR_RESETVAL (0x00000000u)
  34191. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_899_CLR_MASK (0x00000008u)
  34192. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_899_CLR_SHIFT (0x00000003u)
  34193. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_899_CLR_RESETVAL (0x00000000u)
  34194. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_900_CLR_MASK (0x00000010u)
  34195. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_900_CLR_SHIFT (0x00000004u)
  34196. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_900_CLR_RESETVAL (0x00000000u)
  34197. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_901_CLR_MASK (0x00000020u)
  34198. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_901_CLR_SHIFT (0x00000005u)
  34199. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_901_CLR_RESETVAL (0x00000000u)
  34200. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_902_CLR_MASK (0x00000040u)
  34201. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_902_CLR_SHIFT (0x00000006u)
  34202. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_902_CLR_RESETVAL (0x00000000u)
  34203. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_903_CLR_MASK (0x00000080u)
  34204. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_903_CLR_SHIFT (0x00000007u)
  34205. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_903_CLR_RESETVAL (0x00000000u)
  34206. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_904_CLR_MASK (0x00000100u)
  34207. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_904_CLR_SHIFT (0x00000008u)
  34208. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_904_CLR_RESETVAL (0x00000000u)
  34209. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_905_CLR_MASK (0x00000200u)
  34210. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_905_CLR_SHIFT (0x00000009u)
  34211. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_905_CLR_RESETVAL (0x00000000u)
  34212. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_906_CLR_MASK (0x00000400u)
  34213. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_906_CLR_SHIFT (0x0000000Au)
  34214. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_906_CLR_RESETVAL (0x00000000u)
  34215. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_907_CLR_MASK (0x00000800u)
  34216. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_907_CLR_SHIFT (0x0000000Bu)
  34217. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_907_CLR_RESETVAL (0x00000000u)
  34218. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_908_CLR_MASK (0x00001000u)
  34219. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_908_CLR_SHIFT (0x0000000Cu)
  34220. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_908_CLR_RESETVAL (0x00000000u)
  34221. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_909_CLR_MASK (0x00002000u)
  34222. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_909_CLR_SHIFT (0x0000000Du)
  34223. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_909_CLR_RESETVAL (0x00000000u)
  34224. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_910_CLR_MASK (0x00004000u)
  34225. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_910_CLR_SHIFT (0x0000000Eu)
  34226. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_910_CLR_RESETVAL (0x00000000u)
  34227. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_911_CLR_MASK (0x00008000u)
  34228. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_911_CLR_SHIFT (0x0000000Fu)
  34229. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_911_CLR_RESETVAL (0x00000000u)
  34230. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_912_CLR_MASK (0x00010000u)
  34231. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_912_CLR_SHIFT (0x00000010u)
  34232. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_912_CLR_RESETVAL (0x00000000u)
  34233. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_913_CLR_MASK (0x00020000u)
  34234. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_913_CLR_SHIFT (0x00000011u)
  34235. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_913_CLR_RESETVAL (0x00000000u)
  34236. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_914_CLR_MASK (0x00040000u)
  34237. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_914_CLR_SHIFT (0x00000012u)
  34238. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_914_CLR_RESETVAL (0x00000000u)
  34239. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_915_CLR_MASK (0x00080000u)
  34240. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_915_CLR_SHIFT (0x00000013u)
  34241. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_915_CLR_RESETVAL (0x00000000u)
  34242. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_916_CLR_MASK (0x00100000u)
  34243. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_916_CLR_SHIFT (0x00000014u)
  34244. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_916_CLR_RESETVAL (0x00000000u)
  34245. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_917_CLR_MASK (0x00200000u)
  34246. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_917_CLR_SHIFT (0x00000015u)
  34247. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_917_CLR_RESETVAL (0x00000000u)
  34248. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_918_CLR_MASK (0x00400000u)
  34249. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_918_CLR_SHIFT (0x00000016u)
  34250. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_918_CLR_RESETVAL (0x00000000u)
  34251. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_919_CLR_MASK (0x00800000u)
  34252. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_919_CLR_SHIFT (0x00000017u)
  34253. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_919_CLR_RESETVAL (0x00000000u)
  34254. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_920_CLR_MASK (0x01000000u)
  34255. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_920_CLR_SHIFT (0x00000018u)
  34256. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_920_CLR_RESETVAL (0x00000000u)
  34257. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_921_CLR_MASK (0x02000000u)
  34258. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_921_CLR_SHIFT (0x00000019u)
  34259. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_921_CLR_RESETVAL (0x00000000u)
  34260. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_922_CLR_MASK (0x04000000u)
  34261. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_922_CLR_SHIFT (0x0000001Au)
  34262. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_922_CLR_RESETVAL (0x00000000u)
  34263. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_923_CLR_MASK (0x08000000u)
  34264. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_923_CLR_SHIFT (0x0000001Bu)
  34265. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_923_CLR_RESETVAL (0x00000000u)
  34266. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_924_CLR_MASK (0x10000000u)
  34267. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_924_CLR_SHIFT (0x0000001Cu)
  34268. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_924_CLR_RESETVAL (0x00000000u)
  34269. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_925_CLR_MASK (0x20000000u)
  34270. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_925_CLR_SHIFT (0x0000001Du)
  34271. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_925_CLR_RESETVAL (0x00000000u)
  34272. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_926_CLR_MASK (0x40000000u)
  34273. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_926_CLR_SHIFT (0x0000001Eu)
  34274. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_926_CLR_RESETVAL (0x00000000u)
  34275. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_927_CLR_MASK (0x80000000u)
  34276. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_927_CLR_SHIFT (0x0000001Fu)
  34277. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_SECURE_ENABLE_927_CLR_RESETVAL (0x00000000u)
  34278. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG28_RESETVAL (0x00000000u)
  34279. /* secure_enable_clr_reg29 */
  34280. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_928_CLR_MASK (0x00000001u)
  34281. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_928_CLR_SHIFT (0x00000000u)
  34282. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_928_CLR_RESETVAL (0x00000000u)
  34283. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_929_CLR_MASK (0x00000002u)
  34284. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_929_CLR_SHIFT (0x00000001u)
  34285. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_929_CLR_RESETVAL (0x00000000u)
  34286. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_930_CLR_MASK (0x00000004u)
  34287. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_930_CLR_SHIFT (0x00000002u)
  34288. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_930_CLR_RESETVAL (0x00000000u)
  34289. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_931_CLR_MASK (0x00000008u)
  34290. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_931_CLR_SHIFT (0x00000003u)
  34291. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_931_CLR_RESETVAL (0x00000000u)
  34292. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_932_CLR_MASK (0x00000010u)
  34293. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_932_CLR_SHIFT (0x00000004u)
  34294. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_932_CLR_RESETVAL (0x00000000u)
  34295. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_933_CLR_MASK (0x00000020u)
  34296. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_933_CLR_SHIFT (0x00000005u)
  34297. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_933_CLR_RESETVAL (0x00000000u)
  34298. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_934_CLR_MASK (0x00000040u)
  34299. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_934_CLR_SHIFT (0x00000006u)
  34300. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_934_CLR_RESETVAL (0x00000000u)
  34301. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_935_CLR_MASK (0x00000080u)
  34302. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_935_CLR_SHIFT (0x00000007u)
  34303. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_935_CLR_RESETVAL (0x00000000u)
  34304. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_936_CLR_MASK (0x00000100u)
  34305. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_936_CLR_SHIFT (0x00000008u)
  34306. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_936_CLR_RESETVAL (0x00000000u)
  34307. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_937_CLR_MASK (0x00000200u)
  34308. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_937_CLR_SHIFT (0x00000009u)
  34309. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_937_CLR_RESETVAL (0x00000000u)
  34310. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_938_CLR_MASK (0x00000400u)
  34311. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_938_CLR_SHIFT (0x0000000Au)
  34312. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_938_CLR_RESETVAL (0x00000000u)
  34313. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_939_CLR_MASK (0x00000800u)
  34314. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_939_CLR_SHIFT (0x0000000Bu)
  34315. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_939_CLR_RESETVAL (0x00000000u)
  34316. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_940_CLR_MASK (0x00001000u)
  34317. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_940_CLR_SHIFT (0x0000000Cu)
  34318. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_940_CLR_RESETVAL (0x00000000u)
  34319. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_941_CLR_MASK (0x00002000u)
  34320. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_941_CLR_SHIFT (0x0000000Du)
  34321. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_941_CLR_RESETVAL (0x00000000u)
  34322. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_942_CLR_MASK (0x00004000u)
  34323. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_942_CLR_SHIFT (0x0000000Eu)
  34324. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_942_CLR_RESETVAL (0x00000000u)
  34325. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_943_CLR_MASK (0x00008000u)
  34326. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_943_CLR_SHIFT (0x0000000Fu)
  34327. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_943_CLR_RESETVAL (0x00000000u)
  34328. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_944_CLR_MASK (0x00010000u)
  34329. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_944_CLR_SHIFT (0x00000010u)
  34330. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_944_CLR_RESETVAL (0x00000000u)
  34331. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_945_CLR_MASK (0x00020000u)
  34332. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_945_CLR_SHIFT (0x00000011u)
  34333. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_945_CLR_RESETVAL (0x00000000u)
  34334. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_946_CLR_MASK (0x00040000u)
  34335. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_946_CLR_SHIFT (0x00000012u)
  34336. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_946_CLR_RESETVAL (0x00000000u)
  34337. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_947_CLR_MASK (0x00080000u)
  34338. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_947_CLR_SHIFT (0x00000013u)
  34339. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_947_CLR_RESETVAL (0x00000000u)
  34340. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_948_CLR_MASK (0x00100000u)
  34341. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_948_CLR_SHIFT (0x00000014u)
  34342. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_948_CLR_RESETVAL (0x00000000u)
  34343. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_949_CLR_MASK (0x00200000u)
  34344. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_949_CLR_SHIFT (0x00000015u)
  34345. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_949_CLR_RESETVAL (0x00000000u)
  34346. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_950_CLR_MASK (0x00400000u)
  34347. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_950_CLR_SHIFT (0x00000016u)
  34348. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_950_CLR_RESETVAL (0x00000000u)
  34349. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_951_CLR_MASK (0x00800000u)
  34350. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_951_CLR_SHIFT (0x00000017u)
  34351. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_951_CLR_RESETVAL (0x00000000u)
  34352. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_952_CLR_MASK (0x01000000u)
  34353. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_952_CLR_SHIFT (0x00000018u)
  34354. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_952_CLR_RESETVAL (0x00000000u)
  34355. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_953_CLR_MASK (0x02000000u)
  34356. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_953_CLR_SHIFT (0x00000019u)
  34357. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_953_CLR_RESETVAL (0x00000000u)
  34358. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_954_CLR_MASK (0x04000000u)
  34359. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_954_CLR_SHIFT (0x0000001Au)
  34360. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_954_CLR_RESETVAL (0x00000000u)
  34361. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_955_CLR_MASK (0x08000000u)
  34362. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_955_CLR_SHIFT (0x0000001Bu)
  34363. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_955_CLR_RESETVAL (0x00000000u)
  34364. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_956_CLR_MASK (0x10000000u)
  34365. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_956_CLR_SHIFT (0x0000001Cu)
  34366. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_956_CLR_RESETVAL (0x00000000u)
  34367. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_957_CLR_MASK (0x20000000u)
  34368. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_957_CLR_SHIFT (0x0000001Du)
  34369. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_957_CLR_RESETVAL (0x00000000u)
  34370. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_958_CLR_MASK (0x40000000u)
  34371. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_958_CLR_SHIFT (0x0000001Eu)
  34372. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_958_CLR_RESETVAL (0x00000000u)
  34373. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_959_CLR_MASK (0x80000000u)
  34374. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_959_CLR_SHIFT (0x0000001Fu)
  34375. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_SECURE_ENABLE_959_CLR_RESETVAL (0x00000000u)
  34376. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG29_RESETVAL (0x00000000u)
  34377. /* secure_enable_clr_reg30 */
  34378. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_960_CLR_MASK (0x00000001u)
  34379. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_960_CLR_SHIFT (0x00000000u)
  34380. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_960_CLR_RESETVAL (0x00000000u)
  34381. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_961_CLR_MASK (0x00000002u)
  34382. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_961_CLR_SHIFT (0x00000001u)
  34383. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_961_CLR_RESETVAL (0x00000000u)
  34384. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_962_CLR_MASK (0x00000004u)
  34385. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_962_CLR_SHIFT (0x00000002u)
  34386. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_962_CLR_RESETVAL (0x00000000u)
  34387. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_963_CLR_MASK (0x00000008u)
  34388. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_963_CLR_SHIFT (0x00000003u)
  34389. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_963_CLR_RESETVAL (0x00000000u)
  34390. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_964_CLR_MASK (0x00000010u)
  34391. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_964_CLR_SHIFT (0x00000004u)
  34392. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_964_CLR_RESETVAL (0x00000000u)
  34393. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_965_CLR_MASK (0x00000020u)
  34394. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_965_CLR_SHIFT (0x00000005u)
  34395. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_965_CLR_RESETVAL (0x00000000u)
  34396. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_966_CLR_MASK (0x00000040u)
  34397. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_966_CLR_SHIFT (0x00000006u)
  34398. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_966_CLR_RESETVAL (0x00000000u)
  34399. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_967_CLR_MASK (0x00000080u)
  34400. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_967_CLR_SHIFT (0x00000007u)
  34401. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_967_CLR_RESETVAL (0x00000000u)
  34402. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_968_CLR_MASK (0x00000100u)
  34403. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_968_CLR_SHIFT (0x00000008u)
  34404. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_968_CLR_RESETVAL (0x00000000u)
  34405. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_969_CLR_MASK (0x00000200u)
  34406. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_969_CLR_SHIFT (0x00000009u)
  34407. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_969_CLR_RESETVAL (0x00000000u)
  34408. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_970_CLR_MASK (0x00000400u)
  34409. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_970_CLR_SHIFT (0x0000000Au)
  34410. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_970_CLR_RESETVAL (0x00000000u)
  34411. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_971_CLR_MASK (0x00000800u)
  34412. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_971_CLR_SHIFT (0x0000000Bu)
  34413. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_971_CLR_RESETVAL (0x00000000u)
  34414. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_972_CLR_MASK (0x00001000u)
  34415. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_972_CLR_SHIFT (0x0000000Cu)
  34416. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_972_CLR_RESETVAL (0x00000000u)
  34417. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_973_CLR_MASK (0x00002000u)
  34418. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_973_CLR_SHIFT (0x0000000Du)
  34419. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_973_CLR_RESETVAL (0x00000000u)
  34420. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_974_CLR_MASK (0x00004000u)
  34421. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_974_CLR_SHIFT (0x0000000Eu)
  34422. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_974_CLR_RESETVAL (0x00000000u)
  34423. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_975_CLR_MASK (0x00008000u)
  34424. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_975_CLR_SHIFT (0x0000000Fu)
  34425. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_975_CLR_RESETVAL (0x00000000u)
  34426. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_976_CLR_MASK (0x00010000u)
  34427. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_976_CLR_SHIFT (0x00000010u)
  34428. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_976_CLR_RESETVAL (0x00000000u)
  34429. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_977_CLR_MASK (0x00020000u)
  34430. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_977_CLR_SHIFT (0x00000011u)
  34431. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_977_CLR_RESETVAL (0x00000000u)
  34432. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_978_CLR_MASK (0x00040000u)
  34433. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_978_CLR_SHIFT (0x00000012u)
  34434. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_978_CLR_RESETVAL (0x00000000u)
  34435. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_979_CLR_MASK (0x00080000u)
  34436. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_979_CLR_SHIFT (0x00000013u)
  34437. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_979_CLR_RESETVAL (0x00000000u)
  34438. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_980_CLR_MASK (0x00100000u)
  34439. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_980_CLR_SHIFT (0x00000014u)
  34440. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_980_CLR_RESETVAL (0x00000000u)
  34441. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_981_CLR_MASK (0x00200000u)
  34442. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_981_CLR_SHIFT (0x00000015u)
  34443. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_981_CLR_RESETVAL (0x00000000u)
  34444. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_982_CLR_MASK (0x00400000u)
  34445. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_982_CLR_SHIFT (0x00000016u)
  34446. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_982_CLR_RESETVAL (0x00000000u)
  34447. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_983_CLR_MASK (0x00800000u)
  34448. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_983_CLR_SHIFT (0x00000017u)
  34449. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_983_CLR_RESETVAL (0x00000000u)
  34450. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_984_CLR_MASK (0x01000000u)
  34451. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_984_CLR_SHIFT (0x00000018u)
  34452. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_984_CLR_RESETVAL (0x00000000u)
  34453. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_985_CLR_MASK (0x02000000u)
  34454. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_985_CLR_SHIFT (0x00000019u)
  34455. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_985_CLR_RESETVAL (0x00000000u)
  34456. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_986_CLR_MASK (0x04000000u)
  34457. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_986_CLR_SHIFT (0x0000001Au)
  34458. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_986_CLR_RESETVAL (0x00000000u)
  34459. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_987_CLR_MASK (0x08000000u)
  34460. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_987_CLR_SHIFT (0x0000001Bu)
  34461. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_987_CLR_RESETVAL (0x00000000u)
  34462. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_988_CLR_MASK (0x10000000u)
  34463. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_988_CLR_SHIFT (0x0000001Cu)
  34464. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_988_CLR_RESETVAL (0x00000000u)
  34465. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_989_CLR_MASK (0x20000000u)
  34466. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_989_CLR_SHIFT (0x0000001Du)
  34467. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_989_CLR_RESETVAL (0x00000000u)
  34468. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_990_CLR_MASK (0x40000000u)
  34469. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_990_CLR_SHIFT (0x0000001Eu)
  34470. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_990_CLR_RESETVAL (0x00000000u)
  34471. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_991_CLR_MASK (0x80000000u)
  34472. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_991_CLR_SHIFT (0x0000001Fu)
  34473. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_SECURE_ENABLE_991_CLR_RESETVAL (0x00000000u)
  34474. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG30_RESETVAL (0x00000000u)
  34475. /* secure_enable_clr_reg31 */
  34476. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_992_CLR_MASK (0x00000001u)
  34477. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_992_CLR_SHIFT (0x00000000u)
  34478. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_992_CLR_RESETVAL (0x00000000u)
  34479. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_993_CLR_MASK (0x00000002u)
  34480. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_993_CLR_SHIFT (0x00000001u)
  34481. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_993_CLR_RESETVAL (0x00000000u)
  34482. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_994_CLR_MASK (0x00000004u)
  34483. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_994_CLR_SHIFT (0x00000002u)
  34484. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_994_CLR_RESETVAL (0x00000000u)
  34485. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_995_CLR_MASK (0x00000008u)
  34486. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_995_CLR_SHIFT (0x00000003u)
  34487. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_995_CLR_RESETVAL (0x00000000u)
  34488. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_996_CLR_MASK (0x00000010u)
  34489. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_996_CLR_SHIFT (0x00000004u)
  34490. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_996_CLR_RESETVAL (0x00000000u)
  34491. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_997_CLR_MASK (0x00000020u)
  34492. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_997_CLR_SHIFT (0x00000005u)
  34493. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_997_CLR_RESETVAL (0x00000000u)
  34494. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_998_CLR_MASK (0x00000040u)
  34495. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_998_CLR_SHIFT (0x00000006u)
  34496. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_998_CLR_RESETVAL (0x00000000u)
  34497. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_999_CLR_MASK (0x00000080u)
  34498. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_999_CLR_SHIFT (0x00000007u)
  34499. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_999_CLR_RESETVAL (0x00000000u)
  34500. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1000_CLR_MASK (0x00000100u)
  34501. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1000_CLR_SHIFT (0x00000008u)
  34502. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1000_CLR_RESETVAL (0x00000000u)
  34503. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1001_CLR_MASK (0x00000200u)
  34504. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1001_CLR_SHIFT (0x00000009u)
  34505. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1001_CLR_RESETVAL (0x00000000u)
  34506. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1002_CLR_MASK (0x00000400u)
  34507. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1002_CLR_SHIFT (0x0000000Au)
  34508. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1002_CLR_RESETVAL (0x00000000u)
  34509. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1003_CLR_MASK (0x00000800u)
  34510. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1003_CLR_SHIFT (0x0000000Bu)
  34511. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1003_CLR_RESETVAL (0x00000000u)
  34512. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1004_CLR_MASK (0x00001000u)
  34513. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1004_CLR_SHIFT (0x0000000Cu)
  34514. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1004_CLR_RESETVAL (0x00000000u)
  34515. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1005_CLR_MASK (0x00002000u)
  34516. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1005_CLR_SHIFT (0x0000000Du)
  34517. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1005_CLR_RESETVAL (0x00000000u)
  34518. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1006_CLR_MASK (0x00004000u)
  34519. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1006_CLR_SHIFT (0x0000000Eu)
  34520. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1006_CLR_RESETVAL (0x00000000u)
  34521. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1007_CLR_MASK (0x00008000u)
  34522. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1007_CLR_SHIFT (0x0000000Fu)
  34523. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1007_CLR_RESETVAL (0x00000000u)
  34524. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1008_CLR_MASK (0x00010000u)
  34525. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1008_CLR_SHIFT (0x00000010u)
  34526. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1008_CLR_RESETVAL (0x00000000u)
  34527. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1009_CLR_MASK (0x00020000u)
  34528. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1009_CLR_SHIFT (0x00000011u)
  34529. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1009_CLR_RESETVAL (0x00000000u)
  34530. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1010_CLR_MASK (0x00040000u)
  34531. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1010_CLR_SHIFT (0x00000012u)
  34532. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1010_CLR_RESETVAL (0x00000000u)
  34533. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1011_CLR_MASK (0x00080000u)
  34534. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1011_CLR_SHIFT (0x00000013u)
  34535. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1011_CLR_RESETVAL (0x00000000u)
  34536. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1012_CLR_MASK (0x00100000u)
  34537. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1012_CLR_SHIFT (0x00000014u)
  34538. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1012_CLR_RESETVAL (0x00000000u)
  34539. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1013_CLR_MASK (0x00200000u)
  34540. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1013_CLR_SHIFT (0x00000015u)
  34541. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1013_CLR_RESETVAL (0x00000000u)
  34542. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1014_CLR_MASK (0x00400000u)
  34543. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1014_CLR_SHIFT (0x00000016u)
  34544. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1014_CLR_RESETVAL (0x00000000u)
  34545. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1015_CLR_MASK (0x00800000u)
  34546. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1015_CLR_SHIFT (0x00000017u)
  34547. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1015_CLR_RESETVAL (0x00000000u)
  34548. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1016_CLR_MASK (0x01000000u)
  34549. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1016_CLR_SHIFT (0x00000018u)
  34550. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1016_CLR_RESETVAL (0x00000000u)
  34551. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1017_CLR_MASK (0x02000000u)
  34552. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1017_CLR_SHIFT (0x00000019u)
  34553. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1017_CLR_RESETVAL (0x00000000u)
  34554. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1018_CLR_MASK (0x04000000u)
  34555. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1018_CLR_SHIFT (0x0000001Au)
  34556. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1018_CLR_RESETVAL (0x00000000u)
  34557. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1019_CLR_MASK (0x08000000u)
  34558. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1019_CLR_SHIFT (0x0000001Bu)
  34559. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1019_CLR_RESETVAL (0x00000000u)
  34560. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1020_CLR_MASK (0x10000000u)
  34561. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1020_CLR_SHIFT (0x0000001Cu)
  34562. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1020_CLR_RESETVAL (0x00000000u)
  34563. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1021_CLR_MASK (0x20000000u)
  34564. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1021_CLR_SHIFT (0x0000001Du)
  34565. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1021_CLR_RESETVAL (0x00000000u)
  34566. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1022_CLR_MASK (0x40000000u)
  34567. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1022_CLR_SHIFT (0x0000001Eu)
  34568. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1022_CLR_RESETVAL (0x00000000u)
  34569. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1023_CLR_MASK (0x80000000u)
  34570. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1023_CLR_SHIFT (0x0000001Fu)
  34571. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_SECURE_ENABLE_1023_CLR_RESETVAL (0x00000000u)
  34572. #define CSL_CPINTC_SECURE_ENABLE_CLR_REG31_RESETVAL (0x00000000u)
  34573. /* nest_level_reg0 */
  34574. #define CSL_CPINTC_NEST_LEVEL_REG0_NEST_HINT_0_MASK (0x000001FFu)
  34575. #define CSL_CPINTC_NEST_LEVEL_REG0_NEST_HINT_0_SHIFT (0x00000000u)
  34576. #define CSL_CPINTC_NEST_LEVEL_REG0_NEST_HINT_0_RESETVAL (0x00000100u)
  34577. #define CSL_CPINTC_NEST_LEVEL_REG0_RESETVAL (0x00000100u)
  34578. /* nest_level_reg1 */
  34579. #define CSL_CPINTC_NEST_LEVEL_REG1_NEST_HINT_1_MASK (0x000001FFu)
  34580. #define CSL_CPINTC_NEST_LEVEL_REG1_NEST_HINT_1_SHIFT (0x00000000u)
  34581. #define CSL_CPINTC_NEST_LEVEL_REG1_NEST_HINT_1_RESETVAL (0x00000100u)
  34582. #define CSL_CPINTC_NEST_LEVEL_REG1_RESETVAL (0x00000100u)
  34583. /* nest_level_reg2 */
  34584. #define CSL_CPINTC_NEST_LEVEL_REG2_NEST_HINT_2_MASK (0x000001FFu)
  34585. #define CSL_CPINTC_NEST_LEVEL_REG2_NEST_HINT_2_SHIFT (0x00000000u)
  34586. #define CSL_CPINTC_NEST_LEVEL_REG2_NEST_HINT_2_RESETVAL (0x00000100u)
  34587. #define CSL_CPINTC_NEST_LEVEL_REG2_RESETVAL (0x00000100u)
  34588. /* nest_level_reg3 */
  34589. #define CSL_CPINTC_NEST_LEVEL_REG3_NEST_HINT_3_MASK (0x000001FFu)
  34590. #define CSL_CPINTC_NEST_LEVEL_REG3_NEST_HINT_3_SHIFT (0x00000000u)
  34591. #define CSL_CPINTC_NEST_LEVEL_REG3_NEST_HINT_3_RESETVAL (0x00000100u)
  34592. #define CSL_CPINTC_NEST_LEVEL_REG3_RESETVAL (0x00000100u)
  34593. /* nest_level_reg4 */
  34594. #define CSL_CPINTC_NEST_LEVEL_REG4_NEST_HINT_4_MASK (0x000001FFu)
  34595. #define CSL_CPINTC_NEST_LEVEL_REG4_NEST_HINT_4_SHIFT (0x00000000u)
  34596. #define CSL_CPINTC_NEST_LEVEL_REG4_NEST_HINT_4_RESETVAL (0x00000100u)
  34597. #define CSL_CPINTC_NEST_LEVEL_REG4_RESETVAL (0x00000100u)
  34598. /* nest_level_reg5 */
  34599. #define CSL_CPINTC_NEST_LEVEL_REG5_NEST_HINT_5_MASK (0x000001FFu)
  34600. #define CSL_CPINTC_NEST_LEVEL_REG5_NEST_HINT_5_SHIFT (0x00000000u)
  34601. #define CSL_CPINTC_NEST_LEVEL_REG5_NEST_HINT_5_RESETVAL (0x00000100u)
  34602. #define CSL_CPINTC_NEST_LEVEL_REG5_RESETVAL (0x00000100u)
  34603. /* nest_level_reg6 */
  34604. #define CSL_CPINTC_NEST_LEVEL_REG6_NEST_HINT_6_MASK (0x000001FFu)
  34605. #define CSL_CPINTC_NEST_LEVEL_REG6_NEST_HINT_6_SHIFT (0x00000000u)
  34606. #define CSL_CPINTC_NEST_LEVEL_REG6_NEST_HINT_6_RESETVAL (0x00000100u)
  34607. #define CSL_CPINTC_NEST_LEVEL_REG6_RESETVAL (0x00000100u)
  34608. /* nest_level_reg7 */
  34609. #define CSL_CPINTC_NEST_LEVEL_REG7_NEST_HINT_7_MASK (0x000001FFu)
  34610. #define CSL_CPINTC_NEST_LEVEL_REG7_NEST_HINT_7_SHIFT (0x00000000u)
  34611. #define CSL_CPINTC_NEST_LEVEL_REG7_NEST_HINT_7_RESETVAL (0x00000100u)
  34612. #define CSL_CPINTC_NEST_LEVEL_REG7_RESETVAL (0x00000100u)
  34613. /* nest_level_reg8 */
  34614. #define CSL_CPINTC_NEST_LEVEL_REG8_NEST_HINT_8_MASK (0x000001FFu)
  34615. #define CSL_CPINTC_NEST_LEVEL_REG8_NEST_HINT_8_SHIFT (0x00000000u)
  34616. #define CSL_CPINTC_NEST_LEVEL_REG8_NEST_HINT_8_RESETVAL (0x00000100u)
  34617. #define CSL_CPINTC_NEST_LEVEL_REG8_RESETVAL (0x00000100u)
  34618. /* nest_level_reg9 */
  34619. #define CSL_CPINTC_NEST_LEVEL_REG9_NEST_HINT_9_MASK (0x000001FFu)
  34620. #define CSL_CPINTC_NEST_LEVEL_REG9_NEST_HINT_9_SHIFT (0x00000000u)
  34621. #define CSL_CPINTC_NEST_LEVEL_REG9_NEST_HINT_9_RESETVAL (0x00000100u)
  34622. #define CSL_CPINTC_NEST_LEVEL_REG9_RESETVAL (0x00000100u)
  34623. /* nest_level_reg10 */
  34624. #define CSL_CPINTC_NEST_LEVEL_REG10_NEST_HINT_10_MASK (0x000001FFu)
  34625. #define CSL_CPINTC_NEST_LEVEL_REG10_NEST_HINT_10_SHIFT (0x00000000u)
  34626. #define CSL_CPINTC_NEST_LEVEL_REG10_NEST_HINT_10_RESETVAL (0x00000100u)
  34627. #define CSL_CPINTC_NEST_LEVEL_REG10_RESETVAL (0x00000100u)
  34628. /* nest_level_reg11 */
  34629. #define CSL_CPINTC_NEST_LEVEL_REG11_NEST_HINT_11_MASK (0x000001FFu)
  34630. #define CSL_CPINTC_NEST_LEVEL_REG11_NEST_HINT_11_SHIFT (0x00000000u)
  34631. #define CSL_CPINTC_NEST_LEVEL_REG11_NEST_HINT_11_RESETVAL (0x00000100u)
  34632. #define CSL_CPINTC_NEST_LEVEL_REG11_RESETVAL (0x00000100u)
  34633. /* nest_level_reg12 */
  34634. #define CSL_CPINTC_NEST_LEVEL_REG12_NEST_HINT_12_MASK (0x000001FFu)
  34635. #define CSL_CPINTC_NEST_LEVEL_REG12_NEST_HINT_12_SHIFT (0x00000000u)
  34636. #define CSL_CPINTC_NEST_LEVEL_REG12_NEST_HINT_12_RESETVAL (0x00000100u)
  34637. #define CSL_CPINTC_NEST_LEVEL_REG12_RESETVAL (0x00000100u)
  34638. /* nest_level_reg13 */
  34639. #define CSL_CPINTC_NEST_LEVEL_REG13_NEST_HINT_13_MASK (0x000001FFu)
  34640. #define CSL_CPINTC_NEST_LEVEL_REG13_NEST_HINT_13_SHIFT (0x00000000u)
  34641. #define CSL_CPINTC_NEST_LEVEL_REG13_NEST_HINT_13_RESETVAL (0x00000100u)
  34642. #define CSL_CPINTC_NEST_LEVEL_REG13_RESETVAL (0x00000100u)
  34643. /* nest_level_reg14 */
  34644. #define CSL_CPINTC_NEST_LEVEL_REG14_NEST_HINT_14_MASK (0x000001FFu)
  34645. #define CSL_CPINTC_NEST_LEVEL_REG14_NEST_HINT_14_SHIFT (0x00000000u)
  34646. #define CSL_CPINTC_NEST_LEVEL_REG14_NEST_HINT_14_RESETVAL (0x00000100u)
  34647. #define CSL_CPINTC_NEST_LEVEL_REG14_RESETVAL (0x00000100u)
  34648. /* nest_level_reg15 */
  34649. #define CSL_CPINTC_NEST_LEVEL_REG15_NEST_HINT_15_MASK (0x000001FFu)
  34650. #define CSL_CPINTC_NEST_LEVEL_REG15_NEST_HINT_15_SHIFT (0x00000000u)
  34651. #define CSL_CPINTC_NEST_LEVEL_REG15_NEST_HINT_15_RESETVAL (0x00000100u)
  34652. #define CSL_CPINTC_NEST_LEVEL_REG15_RESETVAL (0x00000100u)
  34653. /* nest_level_reg16 */
  34654. #define CSL_CPINTC_NEST_LEVEL_REG16_NEST_HINT_16_MASK (0x000001FFu)
  34655. #define CSL_CPINTC_NEST_LEVEL_REG16_NEST_HINT_16_SHIFT (0x00000000u)
  34656. #define CSL_CPINTC_NEST_LEVEL_REG16_NEST_HINT_16_RESETVAL (0x00000100u)
  34657. #define CSL_CPINTC_NEST_LEVEL_REG16_RESETVAL (0x00000100u)
  34658. /* nest_level_reg17 */
  34659. #define CSL_CPINTC_NEST_LEVEL_REG17_NEST_HINT_17_MASK (0x000001FFu)
  34660. #define CSL_CPINTC_NEST_LEVEL_REG17_NEST_HINT_17_SHIFT (0x00000000u)
  34661. #define CSL_CPINTC_NEST_LEVEL_REG17_NEST_HINT_17_RESETVAL (0x00000100u)
  34662. #define CSL_CPINTC_NEST_LEVEL_REG17_RESETVAL (0x00000100u)
  34663. /* nest_level_reg18 */
  34664. #define CSL_CPINTC_NEST_LEVEL_REG18_NEST_HINT_18_MASK (0x000001FFu)
  34665. #define CSL_CPINTC_NEST_LEVEL_REG18_NEST_HINT_18_SHIFT (0x00000000u)
  34666. #define CSL_CPINTC_NEST_LEVEL_REG18_NEST_HINT_18_RESETVAL (0x00000100u)
  34667. #define CSL_CPINTC_NEST_LEVEL_REG18_RESETVAL (0x00000100u)
  34668. /* nest_level_reg19 */
  34669. #define CSL_CPINTC_NEST_LEVEL_REG19_NEST_HINT_19_MASK (0x000001FFu)
  34670. #define CSL_CPINTC_NEST_LEVEL_REG19_NEST_HINT_19_SHIFT (0x00000000u)
  34671. #define CSL_CPINTC_NEST_LEVEL_REG19_NEST_HINT_19_RESETVAL (0x00000100u)
  34672. #define CSL_CPINTC_NEST_LEVEL_REG19_RESETVAL (0x00000100u)
  34673. /* nest_level_reg20 */
  34674. #define CSL_CPINTC_NEST_LEVEL_REG20_NEST_HINT_20_MASK (0x000001FFu)
  34675. #define CSL_CPINTC_NEST_LEVEL_REG20_NEST_HINT_20_SHIFT (0x00000000u)
  34676. #define CSL_CPINTC_NEST_LEVEL_REG20_NEST_HINT_20_RESETVAL (0x00000100u)
  34677. #define CSL_CPINTC_NEST_LEVEL_REG20_RESETVAL (0x00000100u)
  34678. /* nest_level_reg21 */
  34679. #define CSL_CPINTC_NEST_LEVEL_REG21_NEST_HINT_21_MASK (0x000001FFu)
  34680. #define CSL_CPINTC_NEST_LEVEL_REG21_NEST_HINT_21_SHIFT (0x00000000u)
  34681. #define CSL_CPINTC_NEST_LEVEL_REG21_NEST_HINT_21_RESETVAL (0x00000100u)
  34682. #define CSL_CPINTC_NEST_LEVEL_REG21_RESETVAL (0x00000100u)
  34683. /* nest_level_reg22 */
  34684. #define CSL_CPINTC_NEST_LEVEL_REG22_NEST_HINT_22_MASK (0x000001FFu)
  34685. #define CSL_CPINTC_NEST_LEVEL_REG22_NEST_HINT_22_SHIFT (0x00000000u)
  34686. #define CSL_CPINTC_NEST_LEVEL_REG22_NEST_HINT_22_RESETVAL (0x00000100u)
  34687. #define CSL_CPINTC_NEST_LEVEL_REG22_RESETVAL (0x00000100u)
  34688. /* nest_level_reg23 */
  34689. #define CSL_CPINTC_NEST_LEVEL_REG23_NEST_HINT_23_MASK (0x000001FFu)
  34690. #define CSL_CPINTC_NEST_LEVEL_REG23_NEST_HINT_23_SHIFT (0x00000000u)
  34691. #define CSL_CPINTC_NEST_LEVEL_REG23_NEST_HINT_23_RESETVAL (0x00000100u)
  34692. #define CSL_CPINTC_NEST_LEVEL_REG23_RESETVAL (0x00000100u)
  34693. /* nest_level_reg24 */
  34694. #define CSL_CPINTC_NEST_LEVEL_REG24_NEST_HINT_24_MASK (0x000001FFu)
  34695. #define CSL_CPINTC_NEST_LEVEL_REG24_NEST_HINT_24_SHIFT (0x00000000u)
  34696. #define CSL_CPINTC_NEST_LEVEL_REG24_NEST_HINT_24_RESETVAL (0x00000100u)
  34697. #define CSL_CPINTC_NEST_LEVEL_REG24_RESETVAL (0x00000100u)
  34698. /* nest_level_reg25 */
  34699. #define CSL_CPINTC_NEST_LEVEL_REG25_NEST_HINT_25_MASK (0x000001FFu)
  34700. #define CSL_CPINTC_NEST_LEVEL_REG25_NEST_HINT_25_SHIFT (0x00000000u)
  34701. #define CSL_CPINTC_NEST_LEVEL_REG25_NEST_HINT_25_RESETVAL (0x00000100u)
  34702. #define CSL_CPINTC_NEST_LEVEL_REG25_RESETVAL (0x00000100u)
  34703. /* nest_level_reg26 */
  34704. #define CSL_CPINTC_NEST_LEVEL_REG26_NEST_HINT_26_MASK (0x000001FFu)
  34705. #define CSL_CPINTC_NEST_LEVEL_REG26_NEST_HINT_26_SHIFT (0x00000000u)
  34706. #define CSL_CPINTC_NEST_LEVEL_REG26_NEST_HINT_26_RESETVAL (0x00000100u)
  34707. #define CSL_CPINTC_NEST_LEVEL_REG26_RESETVAL (0x00000100u)
  34708. /* nest_level_reg27 */
  34709. #define CSL_CPINTC_NEST_LEVEL_REG27_NEST_HINT_27_MASK (0x000001FFu)
  34710. #define CSL_CPINTC_NEST_LEVEL_REG27_NEST_HINT_27_SHIFT (0x00000000u)
  34711. #define CSL_CPINTC_NEST_LEVEL_REG27_NEST_HINT_27_RESETVAL (0x00000100u)
  34712. #define CSL_CPINTC_NEST_LEVEL_REG27_RESETVAL (0x00000100u)
  34713. /* nest_level_reg28 */
  34714. #define CSL_CPINTC_NEST_LEVEL_REG28_NEST_HINT_28_MASK (0x000001FFu)
  34715. #define CSL_CPINTC_NEST_LEVEL_REG28_NEST_HINT_28_SHIFT (0x00000000u)
  34716. #define CSL_CPINTC_NEST_LEVEL_REG28_NEST_HINT_28_RESETVAL (0x00000100u)
  34717. #define CSL_CPINTC_NEST_LEVEL_REG28_RESETVAL (0x00000100u)
  34718. /* nest_level_reg29 */
  34719. #define CSL_CPINTC_NEST_LEVEL_REG29_NEST_HINT_29_MASK (0x000001FFu)
  34720. #define CSL_CPINTC_NEST_LEVEL_REG29_NEST_HINT_29_SHIFT (0x00000000u)
  34721. #define CSL_CPINTC_NEST_LEVEL_REG29_NEST_HINT_29_RESETVAL (0x00000100u)
  34722. #define CSL_CPINTC_NEST_LEVEL_REG29_RESETVAL (0x00000100u)
  34723. /* nest_level_reg30 */
  34724. #define CSL_CPINTC_NEST_LEVEL_REG30_NEST_HINT_30_MASK (0x000001FFu)
  34725. #define CSL_CPINTC_NEST_LEVEL_REG30_NEST_HINT_30_SHIFT (0x00000000u)
  34726. #define CSL_CPINTC_NEST_LEVEL_REG30_NEST_HINT_30_RESETVAL (0x00000100u)
  34727. #define CSL_CPINTC_NEST_LEVEL_REG30_RESETVAL (0x00000100u)
  34728. /* nest_level_reg31 */
  34729. #define CSL_CPINTC_NEST_LEVEL_REG31_NEST_HINT_31_MASK (0x000001FFu)
  34730. #define CSL_CPINTC_NEST_LEVEL_REG31_NEST_HINT_31_SHIFT (0x00000000u)
  34731. #define CSL_CPINTC_NEST_LEVEL_REG31_NEST_HINT_31_RESETVAL (0x00000100u)
  34732. #define CSL_CPINTC_NEST_LEVEL_REG31_RESETVAL (0x00000100u)
  34733. /* nest_level_reg32 */
  34734. #define CSL_CPINTC_NEST_LEVEL_REG32_NEST_HINT_32_MASK (0x000001FFu)
  34735. #define CSL_CPINTC_NEST_LEVEL_REG32_NEST_HINT_32_SHIFT (0x00000000u)
  34736. #define CSL_CPINTC_NEST_LEVEL_REG32_NEST_HINT_32_RESETVAL (0x00000100u)
  34737. #define CSL_CPINTC_NEST_LEVEL_REG32_RESETVAL (0x00000100u)
  34738. /* nest_level_reg33 */
  34739. #define CSL_CPINTC_NEST_LEVEL_REG33_NEST_HINT_33_MASK (0x000001FFu)
  34740. #define CSL_CPINTC_NEST_LEVEL_REG33_NEST_HINT_33_SHIFT (0x00000000u)
  34741. #define CSL_CPINTC_NEST_LEVEL_REG33_NEST_HINT_33_RESETVAL (0x00000100u)
  34742. #define CSL_CPINTC_NEST_LEVEL_REG33_RESETVAL (0x00000100u)
  34743. /* nest_level_reg34 */
  34744. #define CSL_CPINTC_NEST_LEVEL_REG34_NEST_HINT_34_MASK (0x000001FFu)
  34745. #define CSL_CPINTC_NEST_LEVEL_REG34_NEST_HINT_34_SHIFT (0x00000000u)
  34746. #define CSL_CPINTC_NEST_LEVEL_REG34_NEST_HINT_34_RESETVAL (0x00000100u)
  34747. #define CSL_CPINTC_NEST_LEVEL_REG34_RESETVAL (0x00000100u)
  34748. /* nest_level_reg35 */
  34749. #define CSL_CPINTC_NEST_LEVEL_REG35_NEST_HINT_35_MASK (0x000001FFu)
  34750. #define CSL_CPINTC_NEST_LEVEL_REG35_NEST_HINT_35_SHIFT (0x00000000u)
  34751. #define CSL_CPINTC_NEST_LEVEL_REG35_NEST_HINT_35_RESETVAL (0x00000100u)
  34752. #define CSL_CPINTC_NEST_LEVEL_REG35_RESETVAL (0x00000100u)
  34753. /* nest_level_reg36 */
  34754. #define CSL_CPINTC_NEST_LEVEL_REG36_NEST_HINT_36_MASK (0x000001FFu)
  34755. #define CSL_CPINTC_NEST_LEVEL_REG36_NEST_HINT_36_SHIFT (0x00000000u)
  34756. #define CSL_CPINTC_NEST_LEVEL_REG36_NEST_HINT_36_RESETVAL (0x00000100u)
  34757. #define CSL_CPINTC_NEST_LEVEL_REG36_RESETVAL (0x00000100u)
  34758. /* nest_level_reg37 */
  34759. #define CSL_CPINTC_NEST_LEVEL_REG37_NEST_HINT_37_MASK (0x000001FFu)
  34760. #define CSL_CPINTC_NEST_LEVEL_REG37_NEST_HINT_37_SHIFT (0x00000000u)
  34761. #define CSL_CPINTC_NEST_LEVEL_REG37_NEST_HINT_37_RESETVAL (0x00000100u)
  34762. #define CSL_CPINTC_NEST_LEVEL_REG37_RESETVAL (0x00000100u)
  34763. /* nest_level_reg38 */
  34764. #define CSL_CPINTC_NEST_LEVEL_REG38_NEST_HINT_38_MASK (0x000001FFu)
  34765. #define CSL_CPINTC_NEST_LEVEL_REG38_NEST_HINT_38_SHIFT (0x00000000u)
  34766. #define CSL_CPINTC_NEST_LEVEL_REG38_NEST_HINT_38_RESETVAL (0x00000100u)
  34767. #define CSL_CPINTC_NEST_LEVEL_REG38_RESETVAL (0x00000100u)
  34768. /* nest_level_reg39 */
  34769. #define CSL_CPINTC_NEST_LEVEL_REG39_NEST_HINT_39_MASK (0x000001FFu)
  34770. #define CSL_CPINTC_NEST_LEVEL_REG39_NEST_HINT_39_SHIFT (0x00000000u)
  34771. #define CSL_CPINTC_NEST_LEVEL_REG39_NEST_HINT_39_RESETVAL (0x00000100u)
  34772. #define CSL_CPINTC_NEST_LEVEL_REG39_RESETVAL (0x00000100u)
  34773. /* nest_level_reg40 */
  34774. #define CSL_CPINTC_NEST_LEVEL_REG40_NEST_HINT_40_MASK (0x000001FFu)
  34775. #define CSL_CPINTC_NEST_LEVEL_REG40_NEST_HINT_40_SHIFT (0x00000000u)
  34776. #define CSL_CPINTC_NEST_LEVEL_REG40_NEST_HINT_40_RESETVAL (0x00000100u)
  34777. #define CSL_CPINTC_NEST_LEVEL_REG40_RESETVAL (0x00000100u)
  34778. /* nest_level_reg41 */
  34779. #define CSL_CPINTC_NEST_LEVEL_REG41_NEST_HINT_41_MASK (0x000001FFu)
  34780. #define CSL_CPINTC_NEST_LEVEL_REG41_NEST_HINT_41_SHIFT (0x00000000u)
  34781. #define CSL_CPINTC_NEST_LEVEL_REG41_NEST_HINT_41_RESETVAL (0x00000100u)
  34782. #define CSL_CPINTC_NEST_LEVEL_REG41_RESETVAL (0x00000100u)
  34783. /* nest_level_reg42 */
  34784. #define CSL_CPINTC_NEST_LEVEL_REG42_NEST_HINT_42_MASK (0x000001FFu)
  34785. #define CSL_CPINTC_NEST_LEVEL_REG42_NEST_HINT_42_SHIFT (0x00000000u)
  34786. #define CSL_CPINTC_NEST_LEVEL_REG42_NEST_HINT_42_RESETVAL (0x00000100u)
  34787. #define CSL_CPINTC_NEST_LEVEL_REG42_RESETVAL (0x00000100u)
  34788. /* nest_level_reg43 */
  34789. #define CSL_CPINTC_NEST_LEVEL_REG43_NEST_HINT_43_MASK (0x000001FFu)
  34790. #define CSL_CPINTC_NEST_LEVEL_REG43_NEST_HINT_43_SHIFT (0x00000000u)
  34791. #define CSL_CPINTC_NEST_LEVEL_REG43_NEST_HINT_43_RESETVAL (0x00000100u)
  34792. #define CSL_CPINTC_NEST_LEVEL_REG43_RESETVAL (0x00000100u)
  34793. /* nest_level_reg44 */
  34794. #define CSL_CPINTC_NEST_LEVEL_REG44_NEST_HINT_44_MASK (0x000001FFu)
  34795. #define CSL_CPINTC_NEST_LEVEL_REG44_NEST_HINT_44_SHIFT (0x00000000u)
  34796. #define CSL_CPINTC_NEST_LEVEL_REG44_NEST_HINT_44_RESETVAL (0x00000100u)
  34797. #define CSL_CPINTC_NEST_LEVEL_REG44_RESETVAL (0x00000100u)
  34798. /* nest_level_reg45 */
  34799. #define CSL_CPINTC_NEST_LEVEL_REG45_NEST_HINT_45_MASK (0x000001FFu)
  34800. #define CSL_CPINTC_NEST_LEVEL_REG45_NEST_HINT_45_SHIFT (0x00000000u)
  34801. #define CSL_CPINTC_NEST_LEVEL_REG45_NEST_HINT_45_RESETVAL (0x00000100u)
  34802. #define CSL_CPINTC_NEST_LEVEL_REG45_RESETVAL (0x00000100u)
  34803. /* nest_level_reg46 */
  34804. #define CSL_CPINTC_NEST_LEVEL_REG46_NEST_HINT_46_MASK (0x000001FFu)
  34805. #define CSL_CPINTC_NEST_LEVEL_REG46_NEST_HINT_46_SHIFT (0x00000000u)
  34806. #define CSL_CPINTC_NEST_LEVEL_REG46_NEST_HINT_46_RESETVAL (0x00000100u)
  34807. #define CSL_CPINTC_NEST_LEVEL_REG46_RESETVAL (0x00000100u)
  34808. /* nest_level_reg47 */
  34809. #define CSL_CPINTC_NEST_LEVEL_REG47_NEST_HINT_47_MASK (0x000001FFu)
  34810. #define CSL_CPINTC_NEST_LEVEL_REG47_NEST_HINT_47_SHIFT (0x00000000u)
  34811. #define CSL_CPINTC_NEST_LEVEL_REG47_NEST_HINT_47_RESETVAL (0x00000100u)
  34812. #define CSL_CPINTC_NEST_LEVEL_REG47_RESETVAL (0x00000100u)
  34813. /* nest_level_reg48 */
  34814. #define CSL_CPINTC_NEST_LEVEL_REG48_NEST_HINT_48_MASK (0x000001FFu)
  34815. #define CSL_CPINTC_NEST_LEVEL_REG48_NEST_HINT_48_SHIFT (0x00000000u)
  34816. #define CSL_CPINTC_NEST_LEVEL_REG48_NEST_HINT_48_RESETVAL (0x00000100u)
  34817. #define CSL_CPINTC_NEST_LEVEL_REG48_RESETVAL (0x00000100u)
  34818. /* nest_level_reg49 */
  34819. #define CSL_CPINTC_NEST_LEVEL_REG49_NEST_HINT_49_MASK (0x000001FFu)
  34820. #define CSL_CPINTC_NEST_LEVEL_REG49_NEST_HINT_49_SHIFT (0x00000000u)
  34821. #define CSL_CPINTC_NEST_LEVEL_REG49_NEST_HINT_49_RESETVAL (0x00000100u)
  34822. #define CSL_CPINTC_NEST_LEVEL_REG49_RESETVAL (0x00000100u)
  34823. /* nest_level_reg50 */
  34824. #define CSL_CPINTC_NEST_LEVEL_REG50_NEST_HINT_50_MASK (0x000001FFu)
  34825. #define CSL_CPINTC_NEST_LEVEL_REG50_NEST_HINT_50_SHIFT (0x00000000u)
  34826. #define CSL_CPINTC_NEST_LEVEL_REG50_NEST_HINT_50_RESETVAL (0x00000100u)
  34827. #define CSL_CPINTC_NEST_LEVEL_REG50_RESETVAL (0x00000100u)
  34828. /* nest_level_reg51 */
  34829. #define CSL_CPINTC_NEST_LEVEL_REG51_NEST_HINT_51_MASK (0x000001FFu)
  34830. #define CSL_CPINTC_NEST_LEVEL_REG51_NEST_HINT_51_SHIFT (0x00000000u)
  34831. #define CSL_CPINTC_NEST_LEVEL_REG51_NEST_HINT_51_RESETVAL (0x00000100u)
  34832. #define CSL_CPINTC_NEST_LEVEL_REG51_RESETVAL (0x00000100u)
  34833. /* nest_level_reg52 */
  34834. #define CSL_CPINTC_NEST_LEVEL_REG52_NEST_HINT_52_MASK (0x000001FFu)
  34835. #define CSL_CPINTC_NEST_LEVEL_REG52_NEST_HINT_52_SHIFT (0x00000000u)
  34836. #define CSL_CPINTC_NEST_LEVEL_REG52_NEST_HINT_52_RESETVAL (0x00000100u)
  34837. #define CSL_CPINTC_NEST_LEVEL_REG52_RESETVAL (0x00000100u)
  34838. /* nest_level_reg53 */
  34839. #define CSL_CPINTC_NEST_LEVEL_REG53_NEST_HINT_53_MASK (0x000001FFu)
  34840. #define CSL_CPINTC_NEST_LEVEL_REG53_NEST_HINT_53_SHIFT (0x00000000u)
  34841. #define CSL_CPINTC_NEST_LEVEL_REG53_NEST_HINT_53_RESETVAL (0x00000100u)
  34842. #define CSL_CPINTC_NEST_LEVEL_REG53_RESETVAL (0x00000100u)
  34843. /* nest_level_reg54 */
  34844. #define CSL_CPINTC_NEST_LEVEL_REG54_NEST_HINT_54_MASK (0x000001FFu)
  34845. #define CSL_CPINTC_NEST_LEVEL_REG54_NEST_HINT_54_SHIFT (0x00000000u)
  34846. #define CSL_CPINTC_NEST_LEVEL_REG54_NEST_HINT_54_RESETVAL (0x00000100u)
  34847. #define CSL_CPINTC_NEST_LEVEL_REG54_RESETVAL (0x00000100u)
  34848. /* nest_level_reg55 */
  34849. #define CSL_CPINTC_NEST_LEVEL_REG55_NEST_HINT_55_MASK (0x000001FFu)
  34850. #define CSL_CPINTC_NEST_LEVEL_REG55_NEST_HINT_55_SHIFT (0x00000000u)
  34851. #define CSL_CPINTC_NEST_LEVEL_REG55_NEST_HINT_55_RESETVAL (0x00000100u)
  34852. #define CSL_CPINTC_NEST_LEVEL_REG55_RESETVAL (0x00000100u)
  34853. /* nest_level_reg56 */
  34854. #define CSL_CPINTC_NEST_LEVEL_REG56_NEST_HINT_56_MASK (0x000001FFu)
  34855. #define CSL_CPINTC_NEST_LEVEL_REG56_NEST_HINT_56_SHIFT (0x00000000u)
  34856. #define CSL_CPINTC_NEST_LEVEL_REG56_NEST_HINT_56_RESETVAL (0x00000100u)
  34857. #define CSL_CPINTC_NEST_LEVEL_REG56_RESETVAL (0x00000100u)
  34858. /* nest_level_reg57 */
  34859. #define CSL_CPINTC_NEST_LEVEL_REG57_NEST_HINT_57_MASK (0x000001FFu)
  34860. #define CSL_CPINTC_NEST_LEVEL_REG57_NEST_HINT_57_SHIFT (0x00000000u)
  34861. #define CSL_CPINTC_NEST_LEVEL_REG57_NEST_HINT_57_RESETVAL (0x00000100u)
  34862. #define CSL_CPINTC_NEST_LEVEL_REG57_RESETVAL (0x00000100u)
  34863. /* nest_level_reg58 */
  34864. #define CSL_CPINTC_NEST_LEVEL_REG58_NEST_HINT_58_MASK (0x000001FFu)
  34865. #define CSL_CPINTC_NEST_LEVEL_REG58_NEST_HINT_58_SHIFT (0x00000000u)
  34866. #define CSL_CPINTC_NEST_LEVEL_REG58_NEST_HINT_58_RESETVAL (0x00000100u)
  34867. #define CSL_CPINTC_NEST_LEVEL_REG58_RESETVAL (0x00000100u)
  34868. /* nest_level_reg59 */
  34869. #define CSL_CPINTC_NEST_LEVEL_REG59_NEST_HINT_59_MASK (0x000001FFu)
  34870. #define CSL_CPINTC_NEST_LEVEL_REG59_NEST_HINT_59_SHIFT (0x00000000u)
  34871. #define CSL_CPINTC_NEST_LEVEL_REG59_NEST_HINT_59_RESETVAL (0x00000100u)
  34872. #define CSL_CPINTC_NEST_LEVEL_REG59_RESETVAL (0x00000100u)
  34873. /* nest_level_reg60 */
  34874. #define CSL_CPINTC_NEST_LEVEL_REG60_NEST_HINT_60_MASK (0x000001FFu)
  34875. #define CSL_CPINTC_NEST_LEVEL_REG60_NEST_HINT_60_SHIFT (0x00000000u)
  34876. #define CSL_CPINTC_NEST_LEVEL_REG60_NEST_HINT_60_RESETVAL (0x00000100u)
  34877. #define CSL_CPINTC_NEST_LEVEL_REG60_RESETVAL (0x00000100u)
  34878. /* nest_level_reg61 */
  34879. #define CSL_CPINTC_NEST_LEVEL_REG61_NEST_HINT_61_MASK (0x000001FFu)
  34880. #define CSL_CPINTC_NEST_LEVEL_REG61_NEST_HINT_61_SHIFT (0x00000000u)
  34881. #define CSL_CPINTC_NEST_LEVEL_REG61_NEST_HINT_61_RESETVAL (0x00000100u)
  34882. #define CSL_CPINTC_NEST_LEVEL_REG61_RESETVAL (0x00000100u)
  34883. /* nest_level_reg62 */
  34884. #define CSL_CPINTC_NEST_LEVEL_REG62_NEST_HINT_62_MASK (0x000001FFu)
  34885. #define CSL_CPINTC_NEST_LEVEL_REG62_NEST_HINT_62_SHIFT (0x00000000u)
  34886. #define CSL_CPINTC_NEST_LEVEL_REG62_NEST_HINT_62_RESETVAL (0x00000100u)
  34887. #define CSL_CPINTC_NEST_LEVEL_REG62_RESETVAL (0x00000100u)
  34888. /* nest_level_reg63 */
  34889. #define CSL_CPINTC_NEST_LEVEL_REG63_NEST_HINT_63_MASK (0x000001FFu)
  34890. #define CSL_CPINTC_NEST_LEVEL_REG63_NEST_HINT_63_SHIFT (0x00000000u)
  34891. #define CSL_CPINTC_NEST_LEVEL_REG63_NEST_HINT_63_RESETVAL (0x00000100u)
  34892. #define CSL_CPINTC_NEST_LEVEL_REG63_RESETVAL (0x00000100u)
  34893. /* nest_level_reg64 */
  34894. #define CSL_CPINTC_NEST_LEVEL_REG64_NEST_HINT_64_MASK (0x000001FFu)
  34895. #define CSL_CPINTC_NEST_LEVEL_REG64_NEST_HINT_64_SHIFT (0x00000000u)
  34896. #define CSL_CPINTC_NEST_LEVEL_REG64_NEST_HINT_64_RESETVAL (0x00000100u)
  34897. #define CSL_CPINTC_NEST_LEVEL_REG64_RESETVAL (0x00000100u)
  34898. /* nest_level_reg65 */
  34899. #define CSL_CPINTC_NEST_LEVEL_REG65_NEST_HINT_65_MASK (0x000001FFu)
  34900. #define CSL_CPINTC_NEST_LEVEL_REG65_NEST_HINT_65_SHIFT (0x00000000u)
  34901. #define CSL_CPINTC_NEST_LEVEL_REG65_NEST_HINT_65_RESETVAL (0x00000100u)
  34902. #define CSL_CPINTC_NEST_LEVEL_REG65_RESETVAL (0x00000100u)
  34903. /* nest_level_reg66 */
  34904. #define CSL_CPINTC_NEST_LEVEL_REG66_NEST_HINT_66_MASK (0x000001FFu)
  34905. #define CSL_CPINTC_NEST_LEVEL_REG66_NEST_HINT_66_SHIFT (0x00000000u)
  34906. #define CSL_CPINTC_NEST_LEVEL_REG66_NEST_HINT_66_RESETVAL (0x00000100u)
  34907. #define CSL_CPINTC_NEST_LEVEL_REG66_RESETVAL (0x00000100u)
  34908. /* nest_level_reg67 */
  34909. #define CSL_CPINTC_NEST_LEVEL_REG67_NEST_HINT_67_MASK (0x000001FFu)
  34910. #define CSL_CPINTC_NEST_LEVEL_REG67_NEST_HINT_67_SHIFT (0x00000000u)
  34911. #define CSL_CPINTC_NEST_LEVEL_REG67_NEST_HINT_67_RESETVAL (0x00000100u)
  34912. #define CSL_CPINTC_NEST_LEVEL_REG67_RESETVAL (0x00000100u)
  34913. /* nest_level_reg68 */
  34914. #define CSL_CPINTC_NEST_LEVEL_REG68_NEST_HINT_68_MASK (0x000001FFu)
  34915. #define CSL_CPINTC_NEST_LEVEL_REG68_NEST_HINT_68_SHIFT (0x00000000u)
  34916. #define CSL_CPINTC_NEST_LEVEL_REG68_NEST_HINT_68_RESETVAL (0x00000100u)
  34917. #define CSL_CPINTC_NEST_LEVEL_REG68_RESETVAL (0x00000100u)
  34918. /* nest_level_reg69 */
  34919. #define CSL_CPINTC_NEST_LEVEL_REG69_NEST_HINT_69_MASK (0x000001FFu)
  34920. #define CSL_CPINTC_NEST_LEVEL_REG69_NEST_HINT_69_SHIFT (0x00000000u)
  34921. #define CSL_CPINTC_NEST_LEVEL_REG69_NEST_HINT_69_RESETVAL (0x00000100u)
  34922. #define CSL_CPINTC_NEST_LEVEL_REG69_RESETVAL (0x00000100u)
  34923. /* nest_level_reg70 */
  34924. #define CSL_CPINTC_NEST_LEVEL_REG70_NEST_HINT_70_MASK (0x000001FFu)
  34925. #define CSL_CPINTC_NEST_LEVEL_REG70_NEST_HINT_70_SHIFT (0x00000000u)
  34926. #define CSL_CPINTC_NEST_LEVEL_REG70_NEST_HINT_70_RESETVAL (0x00000100u)
  34927. #define CSL_CPINTC_NEST_LEVEL_REG70_RESETVAL (0x00000100u)
  34928. /* nest_level_reg71 */
  34929. #define CSL_CPINTC_NEST_LEVEL_REG71_NEST_HINT_71_MASK (0x000001FFu)
  34930. #define CSL_CPINTC_NEST_LEVEL_REG71_NEST_HINT_71_SHIFT (0x00000000u)
  34931. #define CSL_CPINTC_NEST_LEVEL_REG71_NEST_HINT_71_RESETVAL (0x00000100u)
  34932. #define CSL_CPINTC_NEST_LEVEL_REG71_RESETVAL (0x00000100u)
  34933. /* nest_level_reg72 */
  34934. #define CSL_CPINTC_NEST_LEVEL_REG72_NEST_HINT_72_MASK (0x000001FFu)
  34935. #define CSL_CPINTC_NEST_LEVEL_REG72_NEST_HINT_72_SHIFT (0x00000000u)
  34936. #define CSL_CPINTC_NEST_LEVEL_REG72_NEST_HINT_72_RESETVAL (0x00000100u)
  34937. #define CSL_CPINTC_NEST_LEVEL_REG72_RESETVAL (0x00000100u)
  34938. /* nest_level_reg73 */
  34939. #define CSL_CPINTC_NEST_LEVEL_REG73_NEST_HINT_73_MASK (0x000001FFu)
  34940. #define CSL_CPINTC_NEST_LEVEL_REG73_NEST_HINT_73_SHIFT (0x00000000u)
  34941. #define CSL_CPINTC_NEST_LEVEL_REG73_NEST_HINT_73_RESETVAL (0x00000100u)
  34942. #define CSL_CPINTC_NEST_LEVEL_REG73_RESETVAL (0x00000100u)
  34943. /* nest_level_reg74 */
  34944. #define CSL_CPINTC_NEST_LEVEL_REG74_NEST_HINT_74_MASK (0x000001FFu)
  34945. #define CSL_CPINTC_NEST_LEVEL_REG74_NEST_HINT_74_SHIFT (0x00000000u)
  34946. #define CSL_CPINTC_NEST_LEVEL_REG74_NEST_HINT_74_RESETVAL (0x00000100u)
  34947. #define CSL_CPINTC_NEST_LEVEL_REG74_RESETVAL (0x00000100u)
  34948. /* nest_level_reg75 */
  34949. #define CSL_CPINTC_NEST_LEVEL_REG75_NEST_HINT_75_MASK (0x000001FFu)
  34950. #define CSL_CPINTC_NEST_LEVEL_REG75_NEST_HINT_75_SHIFT (0x00000000u)
  34951. #define CSL_CPINTC_NEST_LEVEL_REG75_NEST_HINT_75_RESETVAL (0x00000100u)
  34952. #define CSL_CPINTC_NEST_LEVEL_REG75_RESETVAL (0x00000100u)
  34953. /* nest_level_reg76 */
  34954. #define CSL_CPINTC_NEST_LEVEL_REG76_NEST_HINT_76_MASK (0x000001FFu)
  34955. #define CSL_CPINTC_NEST_LEVEL_REG76_NEST_HINT_76_SHIFT (0x00000000u)
  34956. #define CSL_CPINTC_NEST_LEVEL_REG76_NEST_HINT_76_RESETVAL (0x00000100u)
  34957. #define CSL_CPINTC_NEST_LEVEL_REG76_RESETVAL (0x00000100u)
  34958. /* nest_level_reg77 */
  34959. #define CSL_CPINTC_NEST_LEVEL_REG77_NEST_HINT_77_MASK (0x000001FFu)
  34960. #define CSL_CPINTC_NEST_LEVEL_REG77_NEST_HINT_77_SHIFT (0x00000000u)
  34961. #define CSL_CPINTC_NEST_LEVEL_REG77_NEST_HINT_77_RESETVAL (0x00000100u)
  34962. #define CSL_CPINTC_NEST_LEVEL_REG77_RESETVAL (0x00000100u)
  34963. /* nest_level_reg78 */
  34964. #define CSL_CPINTC_NEST_LEVEL_REG78_NEST_HINT_78_MASK (0x000001FFu)
  34965. #define CSL_CPINTC_NEST_LEVEL_REG78_NEST_HINT_78_SHIFT (0x00000000u)
  34966. #define CSL_CPINTC_NEST_LEVEL_REG78_NEST_HINT_78_RESETVAL (0x00000100u)
  34967. #define CSL_CPINTC_NEST_LEVEL_REG78_RESETVAL (0x00000100u)
  34968. /* nest_level_reg79 */
  34969. #define CSL_CPINTC_NEST_LEVEL_REG79_NEST_HINT_79_MASK (0x000001FFu)
  34970. #define CSL_CPINTC_NEST_LEVEL_REG79_NEST_HINT_79_SHIFT (0x00000000u)
  34971. #define CSL_CPINTC_NEST_LEVEL_REG79_NEST_HINT_79_RESETVAL (0x00000100u)
  34972. #define CSL_CPINTC_NEST_LEVEL_REG79_RESETVAL (0x00000100u)
  34973. /* nest_level_reg80 */
  34974. #define CSL_CPINTC_NEST_LEVEL_REG80_NEST_HINT_80_MASK (0x000001FFu)
  34975. #define CSL_CPINTC_NEST_LEVEL_REG80_NEST_HINT_80_SHIFT (0x00000000u)
  34976. #define CSL_CPINTC_NEST_LEVEL_REG80_NEST_HINT_80_RESETVAL (0x00000100u)
  34977. #define CSL_CPINTC_NEST_LEVEL_REG80_RESETVAL (0x00000100u)
  34978. /* nest_level_reg81 */
  34979. #define CSL_CPINTC_NEST_LEVEL_REG81_NEST_HINT_81_MASK (0x000001FFu)
  34980. #define CSL_CPINTC_NEST_LEVEL_REG81_NEST_HINT_81_SHIFT (0x00000000u)
  34981. #define CSL_CPINTC_NEST_LEVEL_REG81_NEST_HINT_81_RESETVAL (0x00000100u)
  34982. #define CSL_CPINTC_NEST_LEVEL_REG81_RESETVAL (0x00000100u)
  34983. /* nest_level_reg82 */
  34984. #define CSL_CPINTC_NEST_LEVEL_REG82_NEST_HINT_82_MASK (0x000001FFu)
  34985. #define CSL_CPINTC_NEST_LEVEL_REG82_NEST_HINT_82_SHIFT (0x00000000u)
  34986. #define CSL_CPINTC_NEST_LEVEL_REG82_NEST_HINT_82_RESETVAL (0x00000100u)
  34987. #define CSL_CPINTC_NEST_LEVEL_REG82_RESETVAL (0x00000100u)
  34988. /* nest_level_reg83 */
  34989. #define CSL_CPINTC_NEST_LEVEL_REG83_NEST_HINT_83_MASK (0x000001FFu)
  34990. #define CSL_CPINTC_NEST_LEVEL_REG83_NEST_HINT_83_SHIFT (0x00000000u)
  34991. #define CSL_CPINTC_NEST_LEVEL_REG83_NEST_HINT_83_RESETVAL (0x00000100u)
  34992. #define CSL_CPINTC_NEST_LEVEL_REG83_RESETVAL (0x00000100u)
  34993. /* nest_level_reg84 */
  34994. #define CSL_CPINTC_NEST_LEVEL_REG84_NEST_HINT_84_MASK (0x000001FFu)
  34995. #define CSL_CPINTC_NEST_LEVEL_REG84_NEST_HINT_84_SHIFT (0x00000000u)
  34996. #define CSL_CPINTC_NEST_LEVEL_REG84_NEST_HINT_84_RESETVAL (0x00000100u)
  34997. #define CSL_CPINTC_NEST_LEVEL_REG84_RESETVAL (0x00000100u)
  34998. /* nest_level_reg85 */
  34999. #define CSL_CPINTC_NEST_LEVEL_REG85_NEST_HINT_85_MASK (0x000001FFu)
  35000. #define CSL_CPINTC_NEST_LEVEL_REG85_NEST_HINT_85_SHIFT (0x00000000u)
  35001. #define CSL_CPINTC_NEST_LEVEL_REG85_NEST_HINT_85_RESETVAL (0x00000100u)
  35002. #define CSL_CPINTC_NEST_LEVEL_REG85_RESETVAL (0x00000100u)
  35003. /* nest_level_reg86 */
  35004. #define CSL_CPINTC_NEST_LEVEL_REG86_NEST_HINT_86_MASK (0x000001FFu)
  35005. #define CSL_CPINTC_NEST_LEVEL_REG86_NEST_HINT_86_SHIFT (0x00000000u)
  35006. #define CSL_CPINTC_NEST_LEVEL_REG86_NEST_HINT_86_RESETVAL (0x00000100u)
  35007. #define CSL_CPINTC_NEST_LEVEL_REG86_RESETVAL (0x00000100u)
  35008. /* nest_level_reg87 */
  35009. #define CSL_CPINTC_NEST_LEVEL_REG87_NEST_HINT_87_MASK (0x000001FFu)
  35010. #define CSL_CPINTC_NEST_LEVEL_REG87_NEST_HINT_87_SHIFT (0x00000000u)
  35011. #define CSL_CPINTC_NEST_LEVEL_REG87_NEST_HINT_87_RESETVAL (0x00000100u)
  35012. #define CSL_CPINTC_NEST_LEVEL_REG87_RESETVAL (0x00000100u)
  35013. /* nest_level_reg88 */
  35014. #define CSL_CPINTC_NEST_LEVEL_REG88_NEST_HINT_88_MASK (0x000001FFu)
  35015. #define CSL_CPINTC_NEST_LEVEL_REG88_NEST_HINT_88_SHIFT (0x00000000u)
  35016. #define CSL_CPINTC_NEST_LEVEL_REG88_NEST_HINT_88_RESETVAL (0x00000100u)
  35017. #define CSL_CPINTC_NEST_LEVEL_REG88_RESETVAL (0x00000100u)
  35018. /* nest_level_reg89 */
  35019. #define CSL_CPINTC_NEST_LEVEL_REG89_NEST_HINT_89_MASK (0x000001FFu)
  35020. #define CSL_CPINTC_NEST_LEVEL_REG89_NEST_HINT_89_SHIFT (0x00000000u)
  35021. #define CSL_CPINTC_NEST_LEVEL_REG89_NEST_HINT_89_RESETVAL (0x00000100u)
  35022. #define CSL_CPINTC_NEST_LEVEL_REG89_RESETVAL (0x00000100u)
  35023. /* nest_level_reg90 */
  35024. #define CSL_CPINTC_NEST_LEVEL_REG90_NEST_HINT_90_MASK (0x000001FFu)
  35025. #define CSL_CPINTC_NEST_LEVEL_REG90_NEST_HINT_90_SHIFT (0x00000000u)
  35026. #define CSL_CPINTC_NEST_LEVEL_REG90_NEST_HINT_90_RESETVAL (0x00000100u)
  35027. #define CSL_CPINTC_NEST_LEVEL_REG90_RESETVAL (0x00000100u)
  35028. /* nest_level_reg91 */
  35029. #define CSL_CPINTC_NEST_LEVEL_REG91_NEST_HINT_91_MASK (0x000001FFu)
  35030. #define CSL_CPINTC_NEST_LEVEL_REG91_NEST_HINT_91_SHIFT (0x00000000u)
  35031. #define CSL_CPINTC_NEST_LEVEL_REG91_NEST_HINT_91_RESETVAL (0x00000100u)
  35032. #define CSL_CPINTC_NEST_LEVEL_REG91_RESETVAL (0x00000100u)
  35033. /* nest_level_reg92 */
  35034. #define CSL_CPINTC_NEST_LEVEL_REG92_NEST_HINT_92_MASK (0x000001FFu)
  35035. #define CSL_CPINTC_NEST_LEVEL_REG92_NEST_HINT_92_SHIFT (0x00000000u)
  35036. #define CSL_CPINTC_NEST_LEVEL_REG92_NEST_HINT_92_RESETVAL (0x00000100u)
  35037. #define CSL_CPINTC_NEST_LEVEL_REG92_RESETVAL (0x00000100u)
  35038. /* nest_level_reg93 */
  35039. #define CSL_CPINTC_NEST_LEVEL_REG93_NEST_HINT_93_MASK (0x000001FFu)
  35040. #define CSL_CPINTC_NEST_LEVEL_REG93_NEST_HINT_93_SHIFT (0x00000000u)
  35041. #define CSL_CPINTC_NEST_LEVEL_REG93_NEST_HINT_93_RESETVAL (0x00000100u)
  35042. #define CSL_CPINTC_NEST_LEVEL_REG93_RESETVAL (0x00000100u)
  35043. /* nest_level_reg94 */
  35044. #define CSL_CPINTC_NEST_LEVEL_REG94_NEST_HINT_94_MASK (0x000001FFu)
  35045. #define CSL_CPINTC_NEST_LEVEL_REG94_NEST_HINT_94_SHIFT (0x00000000u)
  35046. #define CSL_CPINTC_NEST_LEVEL_REG94_NEST_HINT_94_RESETVAL (0x00000100u)
  35047. #define CSL_CPINTC_NEST_LEVEL_REG94_RESETVAL (0x00000100u)
  35048. /* nest_level_reg95 */
  35049. #define CSL_CPINTC_NEST_LEVEL_REG95_NEST_HINT_95_MASK (0x000001FFu)
  35050. #define CSL_CPINTC_NEST_LEVEL_REG95_NEST_HINT_95_SHIFT (0x00000000u)
  35051. #define CSL_CPINTC_NEST_LEVEL_REG95_NEST_HINT_95_RESETVAL (0x00000100u)
  35052. #define CSL_CPINTC_NEST_LEVEL_REG95_RESETVAL (0x00000100u)
  35053. /* nest_level_reg96 */
  35054. #define CSL_CPINTC_NEST_LEVEL_REG96_NEST_HINT_96_MASK (0x000001FFu)
  35055. #define CSL_CPINTC_NEST_LEVEL_REG96_NEST_HINT_96_SHIFT (0x00000000u)
  35056. #define CSL_CPINTC_NEST_LEVEL_REG96_NEST_HINT_96_RESETVAL (0x00000100u)
  35057. #define CSL_CPINTC_NEST_LEVEL_REG96_RESETVAL (0x00000100u)
  35058. /* nest_level_reg97 */
  35059. #define CSL_CPINTC_NEST_LEVEL_REG97_NEST_HINT_97_MASK (0x000001FFu)
  35060. #define CSL_CPINTC_NEST_LEVEL_REG97_NEST_HINT_97_SHIFT (0x00000000u)
  35061. #define CSL_CPINTC_NEST_LEVEL_REG97_NEST_HINT_97_RESETVAL (0x00000100u)
  35062. #define CSL_CPINTC_NEST_LEVEL_REG97_RESETVAL (0x00000100u)
  35063. /* nest_level_reg98 */
  35064. #define CSL_CPINTC_NEST_LEVEL_REG98_NEST_HINT_98_MASK (0x000001FFu)
  35065. #define CSL_CPINTC_NEST_LEVEL_REG98_NEST_HINT_98_SHIFT (0x00000000u)
  35066. #define CSL_CPINTC_NEST_LEVEL_REG98_NEST_HINT_98_RESETVAL (0x00000100u)
  35067. #define CSL_CPINTC_NEST_LEVEL_REG98_RESETVAL (0x00000100u)
  35068. /* nest_level_reg99 */
  35069. #define CSL_CPINTC_NEST_LEVEL_REG99_NEST_HINT_99_MASK (0x000001FFu)
  35070. #define CSL_CPINTC_NEST_LEVEL_REG99_NEST_HINT_99_SHIFT (0x00000000u)
  35071. #define CSL_CPINTC_NEST_LEVEL_REG99_NEST_HINT_99_RESETVAL (0x00000100u)
  35072. #define CSL_CPINTC_NEST_LEVEL_REG99_RESETVAL (0x00000100u)
  35073. /* nest_level_reg100 */
  35074. #define CSL_CPINTC_NEST_LEVEL_REG100_NEST_HINT_100_MASK (0x000001FFu)
  35075. #define CSL_CPINTC_NEST_LEVEL_REG100_NEST_HINT_100_SHIFT (0x00000000u)
  35076. #define CSL_CPINTC_NEST_LEVEL_REG100_NEST_HINT_100_RESETVAL (0x00000100u)
  35077. #define CSL_CPINTC_NEST_LEVEL_REG100_RESETVAL (0x00000100u)
  35078. /* nest_level_reg101 */
  35079. #define CSL_CPINTC_NEST_LEVEL_REG101_NEST_HINT_101_MASK (0x000001FFu)
  35080. #define CSL_CPINTC_NEST_LEVEL_REG101_NEST_HINT_101_SHIFT (0x00000000u)
  35081. #define CSL_CPINTC_NEST_LEVEL_REG101_NEST_HINT_101_RESETVAL (0x00000100u)
  35082. #define CSL_CPINTC_NEST_LEVEL_REG101_RESETVAL (0x00000100u)
  35083. /* nest_level_reg102 */
  35084. #define CSL_CPINTC_NEST_LEVEL_REG102_NEST_HINT_102_MASK (0x000001FFu)
  35085. #define CSL_CPINTC_NEST_LEVEL_REG102_NEST_HINT_102_SHIFT (0x00000000u)
  35086. #define CSL_CPINTC_NEST_LEVEL_REG102_NEST_HINT_102_RESETVAL (0x00000100u)
  35087. #define CSL_CPINTC_NEST_LEVEL_REG102_RESETVAL (0x00000100u)
  35088. /* nest_level_reg103 */
  35089. #define CSL_CPINTC_NEST_LEVEL_REG103_NEST_HINT_103_MASK (0x000001FFu)
  35090. #define CSL_CPINTC_NEST_LEVEL_REG103_NEST_HINT_103_SHIFT (0x00000000u)
  35091. #define CSL_CPINTC_NEST_LEVEL_REG103_NEST_HINT_103_RESETVAL (0x00000100u)
  35092. #define CSL_CPINTC_NEST_LEVEL_REG103_RESETVAL (0x00000100u)
  35093. /* nest_level_reg104 */
  35094. #define CSL_CPINTC_NEST_LEVEL_REG104_NEST_HINT_104_MASK (0x000001FFu)
  35095. #define CSL_CPINTC_NEST_LEVEL_REG104_NEST_HINT_104_SHIFT (0x00000000u)
  35096. #define CSL_CPINTC_NEST_LEVEL_REG104_NEST_HINT_104_RESETVAL (0x00000100u)
  35097. #define CSL_CPINTC_NEST_LEVEL_REG104_RESETVAL (0x00000100u)
  35098. /* nest_level_reg105 */
  35099. #define CSL_CPINTC_NEST_LEVEL_REG105_NEST_HINT_105_MASK (0x000001FFu)
  35100. #define CSL_CPINTC_NEST_LEVEL_REG105_NEST_HINT_105_SHIFT (0x00000000u)
  35101. #define CSL_CPINTC_NEST_LEVEL_REG105_NEST_HINT_105_RESETVAL (0x00000100u)
  35102. #define CSL_CPINTC_NEST_LEVEL_REG105_RESETVAL (0x00000100u)
  35103. /* nest_level_reg106 */
  35104. #define CSL_CPINTC_NEST_LEVEL_REG106_NEST_HINT_106_MASK (0x000001FFu)
  35105. #define CSL_CPINTC_NEST_LEVEL_REG106_NEST_HINT_106_SHIFT (0x00000000u)
  35106. #define CSL_CPINTC_NEST_LEVEL_REG106_NEST_HINT_106_RESETVAL (0x00000100u)
  35107. #define CSL_CPINTC_NEST_LEVEL_REG106_RESETVAL (0x00000100u)
  35108. /* nest_level_reg107 */
  35109. #define CSL_CPINTC_NEST_LEVEL_REG107_NEST_HINT_107_MASK (0x000001FFu)
  35110. #define CSL_CPINTC_NEST_LEVEL_REG107_NEST_HINT_107_SHIFT (0x00000000u)
  35111. #define CSL_CPINTC_NEST_LEVEL_REG107_NEST_HINT_107_RESETVAL (0x00000100u)
  35112. #define CSL_CPINTC_NEST_LEVEL_REG107_RESETVAL (0x00000100u)
  35113. /* nest_level_reg108 */
  35114. #define CSL_CPINTC_NEST_LEVEL_REG108_NEST_HINT_108_MASK (0x000001FFu)
  35115. #define CSL_CPINTC_NEST_LEVEL_REG108_NEST_HINT_108_SHIFT (0x00000000u)
  35116. #define CSL_CPINTC_NEST_LEVEL_REG108_NEST_HINT_108_RESETVAL (0x00000100u)
  35117. #define CSL_CPINTC_NEST_LEVEL_REG108_RESETVAL (0x00000100u)
  35118. /* nest_level_reg109 */
  35119. #define CSL_CPINTC_NEST_LEVEL_REG109_NEST_HINT_109_MASK (0x000001FFu)
  35120. #define CSL_CPINTC_NEST_LEVEL_REG109_NEST_HINT_109_SHIFT (0x00000000u)
  35121. #define CSL_CPINTC_NEST_LEVEL_REG109_NEST_HINT_109_RESETVAL (0x00000100u)
  35122. #define CSL_CPINTC_NEST_LEVEL_REG109_RESETVAL (0x00000100u)
  35123. /* nest_level_reg110 */
  35124. #define CSL_CPINTC_NEST_LEVEL_REG110_NEST_HINT_110_MASK (0x000001FFu)
  35125. #define CSL_CPINTC_NEST_LEVEL_REG110_NEST_HINT_110_SHIFT (0x00000000u)
  35126. #define CSL_CPINTC_NEST_LEVEL_REG110_NEST_HINT_110_RESETVAL (0x00000100u)
  35127. #define CSL_CPINTC_NEST_LEVEL_REG110_RESETVAL (0x00000100u)
  35128. /* nest_level_reg111 */
  35129. #define CSL_CPINTC_NEST_LEVEL_REG111_NEST_HINT_111_MASK (0x000001FFu)
  35130. #define CSL_CPINTC_NEST_LEVEL_REG111_NEST_HINT_111_SHIFT (0x00000000u)
  35131. #define CSL_CPINTC_NEST_LEVEL_REG111_NEST_HINT_111_RESETVAL (0x00000100u)
  35132. #define CSL_CPINTC_NEST_LEVEL_REG111_RESETVAL (0x00000100u)
  35133. /* nest_level_reg112 */
  35134. #define CSL_CPINTC_NEST_LEVEL_REG112_NEST_HINT_112_MASK (0x000001FFu)
  35135. #define CSL_CPINTC_NEST_LEVEL_REG112_NEST_HINT_112_SHIFT (0x00000000u)
  35136. #define CSL_CPINTC_NEST_LEVEL_REG112_NEST_HINT_112_RESETVAL (0x00000100u)
  35137. #define CSL_CPINTC_NEST_LEVEL_REG112_RESETVAL (0x00000100u)
  35138. /* nest_level_reg113 */
  35139. #define CSL_CPINTC_NEST_LEVEL_REG113_NEST_HINT_113_MASK (0x000001FFu)
  35140. #define CSL_CPINTC_NEST_LEVEL_REG113_NEST_HINT_113_SHIFT (0x00000000u)
  35141. #define CSL_CPINTC_NEST_LEVEL_REG113_NEST_HINT_113_RESETVAL (0x00000100u)
  35142. #define CSL_CPINTC_NEST_LEVEL_REG113_RESETVAL (0x00000100u)
  35143. /* nest_level_reg114 */
  35144. #define CSL_CPINTC_NEST_LEVEL_REG114_NEST_HINT_114_MASK (0x000001FFu)
  35145. #define CSL_CPINTC_NEST_LEVEL_REG114_NEST_HINT_114_SHIFT (0x00000000u)
  35146. #define CSL_CPINTC_NEST_LEVEL_REG114_NEST_HINT_114_RESETVAL (0x00000100u)
  35147. #define CSL_CPINTC_NEST_LEVEL_REG114_RESETVAL (0x00000100u)
  35148. /* nest_level_reg115 */
  35149. #define CSL_CPINTC_NEST_LEVEL_REG115_NEST_HINT_115_MASK (0x000001FFu)
  35150. #define CSL_CPINTC_NEST_LEVEL_REG115_NEST_HINT_115_SHIFT (0x00000000u)
  35151. #define CSL_CPINTC_NEST_LEVEL_REG115_NEST_HINT_115_RESETVAL (0x00000100u)
  35152. #define CSL_CPINTC_NEST_LEVEL_REG115_RESETVAL (0x00000100u)
  35153. /* nest_level_reg116 */
  35154. #define CSL_CPINTC_NEST_LEVEL_REG116_NEST_HINT_116_MASK (0x000001FFu)
  35155. #define CSL_CPINTC_NEST_LEVEL_REG116_NEST_HINT_116_SHIFT (0x00000000u)
  35156. #define CSL_CPINTC_NEST_LEVEL_REG116_NEST_HINT_116_RESETVAL (0x00000100u)
  35157. #define CSL_CPINTC_NEST_LEVEL_REG116_RESETVAL (0x00000100u)
  35158. /* nest_level_reg117 */
  35159. #define CSL_CPINTC_NEST_LEVEL_REG117_NEST_HINT_117_MASK (0x000001FFu)
  35160. #define CSL_CPINTC_NEST_LEVEL_REG117_NEST_HINT_117_SHIFT (0x00000000u)
  35161. #define CSL_CPINTC_NEST_LEVEL_REG117_NEST_HINT_117_RESETVAL (0x00000100u)
  35162. #define CSL_CPINTC_NEST_LEVEL_REG117_RESETVAL (0x00000100u)
  35163. /* nest_level_reg118 */
  35164. #define CSL_CPINTC_NEST_LEVEL_REG118_NEST_HINT_118_MASK (0x000001FFu)
  35165. #define CSL_CPINTC_NEST_LEVEL_REG118_NEST_HINT_118_SHIFT (0x00000000u)
  35166. #define CSL_CPINTC_NEST_LEVEL_REG118_NEST_HINT_118_RESETVAL (0x00000100u)
  35167. #define CSL_CPINTC_NEST_LEVEL_REG118_RESETVAL (0x00000100u)
  35168. /* nest_level_reg119 */
  35169. #define CSL_CPINTC_NEST_LEVEL_REG119_NEST_HINT_119_MASK (0x000001FFu)
  35170. #define CSL_CPINTC_NEST_LEVEL_REG119_NEST_HINT_119_SHIFT (0x00000000u)
  35171. #define CSL_CPINTC_NEST_LEVEL_REG119_NEST_HINT_119_RESETVAL (0x00000100u)
  35172. #define CSL_CPINTC_NEST_LEVEL_REG119_RESETVAL (0x00000100u)
  35173. /* nest_level_reg120 */
  35174. #define CSL_CPINTC_NEST_LEVEL_REG120_NEST_HINT_120_MASK (0x000001FFu)
  35175. #define CSL_CPINTC_NEST_LEVEL_REG120_NEST_HINT_120_SHIFT (0x00000000u)
  35176. #define CSL_CPINTC_NEST_LEVEL_REG120_NEST_HINT_120_RESETVAL (0x00000100u)
  35177. #define CSL_CPINTC_NEST_LEVEL_REG120_RESETVAL (0x00000100u)
  35178. /* nest_level_reg121 */
  35179. #define CSL_CPINTC_NEST_LEVEL_REG121_NEST_HINT_121_MASK (0x000001FFu)
  35180. #define CSL_CPINTC_NEST_LEVEL_REG121_NEST_HINT_121_SHIFT (0x00000000u)
  35181. #define CSL_CPINTC_NEST_LEVEL_REG121_NEST_HINT_121_RESETVAL (0x00000100u)
  35182. #define CSL_CPINTC_NEST_LEVEL_REG121_RESETVAL (0x00000100u)
  35183. /* nest_level_reg122 */
  35184. #define CSL_CPINTC_NEST_LEVEL_REG122_NEST_HINT_122_MASK (0x000001FFu)
  35185. #define CSL_CPINTC_NEST_LEVEL_REG122_NEST_HINT_122_SHIFT (0x00000000u)
  35186. #define CSL_CPINTC_NEST_LEVEL_REG122_NEST_HINT_122_RESETVAL (0x00000100u)
  35187. #define CSL_CPINTC_NEST_LEVEL_REG122_RESETVAL (0x00000100u)
  35188. /* nest_level_reg123 */
  35189. #define CSL_CPINTC_NEST_LEVEL_REG123_NEST_HINT_123_MASK (0x000001FFu)
  35190. #define CSL_CPINTC_NEST_LEVEL_REG123_NEST_HINT_123_SHIFT (0x00000000u)
  35191. #define CSL_CPINTC_NEST_LEVEL_REG123_NEST_HINT_123_RESETVAL (0x00000100u)
  35192. #define CSL_CPINTC_NEST_LEVEL_REG123_RESETVAL (0x00000100u)
  35193. /* nest_level_reg124 */
  35194. #define CSL_CPINTC_NEST_LEVEL_REG124_NEST_HINT_124_MASK (0x000001FFu)
  35195. #define CSL_CPINTC_NEST_LEVEL_REG124_NEST_HINT_124_SHIFT (0x00000000u)
  35196. #define CSL_CPINTC_NEST_LEVEL_REG124_NEST_HINT_124_RESETVAL (0x00000100u)
  35197. #define CSL_CPINTC_NEST_LEVEL_REG124_RESETVAL (0x00000100u)
  35198. /* nest_level_reg125 */
  35199. #define CSL_CPINTC_NEST_LEVEL_REG125_NEST_HINT_125_MASK (0x000001FFu)
  35200. #define CSL_CPINTC_NEST_LEVEL_REG125_NEST_HINT_125_SHIFT (0x00000000u)
  35201. #define CSL_CPINTC_NEST_LEVEL_REG125_NEST_HINT_125_RESETVAL (0x00000100u)
  35202. #define CSL_CPINTC_NEST_LEVEL_REG125_RESETVAL (0x00000100u)
  35203. /* nest_level_reg126 */
  35204. #define CSL_CPINTC_NEST_LEVEL_REG126_NEST_HINT_126_MASK (0x000001FFu)
  35205. #define CSL_CPINTC_NEST_LEVEL_REG126_NEST_HINT_126_SHIFT (0x00000000u)
  35206. #define CSL_CPINTC_NEST_LEVEL_REG126_NEST_HINT_126_RESETVAL (0x00000100u)
  35207. #define CSL_CPINTC_NEST_LEVEL_REG126_RESETVAL (0x00000100u)
  35208. /* nest_level_reg127 */
  35209. #define CSL_CPINTC_NEST_LEVEL_REG127_NEST_HINT_127_MASK (0x000001FFu)
  35210. #define CSL_CPINTC_NEST_LEVEL_REG127_NEST_HINT_127_SHIFT (0x00000000u)
  35211. #define CSL_CPINTC_NEST_LEVEL_REG127_NEST_HINT_127_RESETVAL (0x00000100u)
  35212. #define CSL_CPINTC_NEST_LEVEL_REG127_RESETVAL (0x00000100u)
  35213. /* nest_level_reg128 */
  35214. #define CSL_CPINTC_NEST_LEVEL_REG128_NEST_HINT_128_MASK (0x000001FFu)
  35215. #define CSL_CPINTC_NEST_LEVEL_REG128_NEST_HINT_128_SHIFT (0x00000000u)
  35216. #define CSL_CPINTC_NEST_LEVEL_REG128_NEST_HINT_128_RESETVAL (0x00000100u)
  35217. #define CSL_CPINTC_NEST_LEVEL_REG128_RESETVAL (0x00000100u)
  35218. /* nest_level_reg129 */
  35219. #define CSL_CPINTC_NEST_LEVEL_REG129_NEST_HINT_129_MASK (0x000001FFu)
  35220. #define CSL_CPINTC_NEST_LEVEL_REG129_NEST_HINT_129_SHIFT (0x00000000u)
  35221. #define CSL_CPINTC_NEST_LEVEL_REG129_NEST_HINT_129_RESETVAL (0x00000100u)
  35222. #define CSL_CPINTC_NEST_LEVEL_REG129_RESETVAL (0x00000100u)
  35223. /* nest_level_reg130 */
  35224. #define CSL_CPINTC_NEST_LEVEL_REG130_NEST_HINT_130_MASK (0x000001FFu)
  35225. #define CSL_CPINTC_NEST_LEVEL_REG130_NEST_HINT_130_SHIFT (0x00000000u)
  35226. #define CSL_CPINTC_NEST_LEVEL_REG130_NEST_HINT_130_RESETVAL (0x00000100u)
  35227. #define CSL_CPINTC_NEST_LEVEL_REG130_RESETVAL (0x00000100u)
  35228. /* nest_level_reg131 */
  35229. #define CSL_CPINTC_NEST_LEVEL_REG131_NEST_HINT_131_MASK (0x000001FFu)
  35230. #define CSL_CPINTC_NEST_LEVEL_REG131_NEST_HINT_131_SHIFT (0x00000000u)
  35231. #define CSL_CPINTC_NEST_LEVEL_REG131_NEST_HINT_131_RESETVAL (0x00000100u)
  35232. #define CSL_CPINTC_NEST_LEVEL_REG131_RESETVAL (0x00000100u)
  35233. /* nest_level_reg132 */
  35234. #define CSL_CPINTC_NEST_LEVEL_REG132_NEST_HINT_132_MASK (0x000001FFu)
  35235. #define CSL_CPINTC_NEST_LEVEL_REG132_NEST_HINT_132_SHIFT (0x00000000u)
  35236. #define CSL_CPINTC_NEST_LEVEL_REG132_NEST_HINT_132_RESETVAL (0x00000100u)
  35237. #define CSL_CPINTC_NEST_LEVEL_REG132_RESETVAL (0x00000100u)
  35238. /* nest_level_reg133 */
  35239. #define CSL_CPINTC_NEST_LEVEL_REG133_NEST_HINT_133_MASK (0x000001FFu)
  35240. #define CSL_CPINTC_NEST_LEVEL_REG133_NEST_HINT_133_SHIFT (0x00000000u)
  35241. #define CSL_CPINTC_NEST_LEVEL_REG133_NEST_HINT_133_RESETVAL (0x00000100u)
  35242. #define CSL_CPINTC_NEST_LEVEL_REG133_RESETVAL (0x00000100u)
  35243. /* nest_level_reg134 */
  35244. #define CSL_CPINTC_NEST_LEVEL_REG134_NEST_HINT_134_MASK (0x000001FFu)
  35245. #define CSL_CPINTC_NEST_LEVEL_REG134_NEST_HINT_134_SHIFT (0x00000000u)
  35246. #define CSL_CPINTC_NEST_LEVEL_REG134_NEST_HINT_134_RESETVAL (0x00000100u)
  35247. #define CSL_CPINTC_NEST_LEVEL_REG134_RESETVAL (0x00000100u)
  35248. /* nest_level_reg135 */
  35249. #define CSL_CPINTC_NEST_LEVEL_REG135_NEST_HINT_135_MASK (0x000001FFu)
  35250. #define CSL_CPINTC_NEST_LEVEL_REG135_NEST_HINT_135_SHIFT (0x00000000u)
  35251. #define CSL_CPINTC_NEST_LEVEL_REG135_NEST_HINT_135_RESETVAL (0x00000100u)
  35252. #define CSL_CPINTC_NEST_LEVEL_REG135_RESETVAL (0x00000100u)
  35253. /* nest_level_reg136 */
  35254. #define CSL_CPINTC_NEST_LEVEL_REG136_NEST_HINT_136_MASK (0x000001FFu)
  35255. #define CSL_CPINTC_NEST_LEVEL_REG136_NEST_HINT_136_SHIFT (0x00000000u)
  35256. #define CSL_CPINTC_NEST_LEVEL_REG136_NEST_HINT_136_RESETVAL (0x00000100u)
  35257. #define CSL_CPINTC_NEST_LEVEL_REG136_RESETVAL (0x00000100u)
  35258. /* nest_level_reg137 */
  35259. #define CSL_CPINTC_NEST_LEVEL_REG137_NEST_HINT_137_MASK (0x000001FFu)
  35260. #define CSL_CPINTC_NEST_LEVEL_REG137_NEST_HINT_137_SHIFT (0x00000000u)
  35261. #define CSL_CPINTC_NEST_LEVEL_REG137_NEST_HINT_137_RESETVAL (0x00000100u)
  35262. #define CSL_CPINTC_NEST_LEVEL_REG137_RESETVAL (0x00000100u)
  35263. /* nest_level_reg138 */
  35264. #define CSL_CPINTC_NEST_LEVEL_REG138_NEST_HINT_138_MASK (0x000001FFu)
  35265. #define CSL_CPINTC_NEST_LEVEL_REG138_NEST_HINT_138_SHIFT (0x00000000u)
  35266. #define CSL_CPINTC_NEST_LEVEL_REG138_NEST_HINT_138_RESETVAL (0x00000100u)
  35267. #define CSL_CPINTC_NEST_LEVEL_REG138_RESETVAL (0x00000100u)
  35268. /* nest_level_reg139 */
  35269. #define CSL_CPINTC_NEST_LEVEL_REG139_NEST_HINT_139_MASK (0x000001FFu)
  35270. #define CSL_CPINTC_NEST_LEVEL_REG139_NEST_HINT_139_SHIFT (0x00000000u)
  35271. #define CSL_CPINTC_NEST_LEVEL_REG139_NEST_HINT_139_RESETVAL (0x00000100u)
  35272. #define CSL_CPINTC_NEST_LEVEL_REG139_RESETVAL (0x00000100u)
  35273. /* nest_level_reg140 */
  35274. #define CSL_CPINTC_NEST_LEVEL_REG140_NEST_HINT_140_MASK (0x000001FFu)
  35275. #define CSL_CPINTC_NEST_LEVEL_REG140_NEST_HINT_140_SHIFT (0x00000000u)
  35276. #define CSL_CPINTC_NEST_LEVEL_REG140_NEST_HINT_140_RESETVAL (0x00000100u)
  35277. #define CSL_CPINTC_NEST_LEVEL_REG140_RESETVAL (0x00000100u)
  35278. /* nest_level_reg141 */
  35279. #define CSL_CPINTC_NEST_LEVEL_REG141_NEST_HINT_141_MASK (0x000001FFu)
  35280. #define CSL_CPINTC_NEST_LEVEL_REG141_NEST_HINT_141_SHIFT (0x00000000u)
  35281. #define CSL_CPINTC_NEST_LEVEL_REG141_NEST_HINT_141_RESETVAL (0x00000100u)
  35282. #define CSL_CPINTC_NEST_LEVEL_REG141_RESETVAL (0x00000100u)
  35283. /* nest_level_reg142 */
  35284. #define CSL_CPINTC_NEST_LEVEL_REG142_NEST_HINT_142_MASK (0x000001FFu)
  35285. #define CSL_CPINTC_NEST_LEVEL_REG142_NEST_HINT_142_SHIFT (0x00000000u)
  35286. #define CSL_CPINTC_NEST_LEVEL_REG142_NEST_HINT_142_RESETVAL (0x00000100u)
  35287. #define CSL_CPINTC_NEST_LEVEL_REG142_RESETVAL (0x00000100u)
  35288. /* nest_level_reg143 */
  35289. #define CSL_CPINTC_NEST_LEVEL_REG143_NEST_HINT_143_MASK (0x000001FFu)
  35290. #define CSL_CPINTC_NEST_LEVEL_REG143_NEST_HINT_143_SHIFT (0x00000000u)
  35291. #define CSL_CPINTC_NEST_LEVEL_REG143_NEST_HINT_143_RESETVAL (0x00000100u)
  35292. #define CSL_CPINTC_NEST_LEVEL_REG143_RESETVAL (0x00000100u)
  35293. /* nest_level_reg144 */
  35294. #define CSL_CPINTC_NEST_LEVEL_REG144_NEST_HINT_144_MASK (0x000001FFu)
  35295. #define CSL_CPINTC_NEST_LEVEL_REG144_NEST_HINT_144_SHIFT (0x00000000u)
  35296. #define CSL_CPINTC_NEST_LEVEL_REG144_NEST_HINT_144_RESETVAL (0x00000100u)
  35297. #define CSL_CPINTC_NEST_LEVEL_REG144_RESETVAL (0x00000100u)
  35298. /* nest_level_reg145 */
  35299. #define CSL_CPINTC_NEST_LEVEL_REG145_NEST_HINT_145_MASK (0x000001FFu)
  35300. #define CSL_CPINTC_NEST_LEVEL_REG145_NEST_HINT_145_SHIFT (0x00000000u)
  35301. #define CSL_CPINTC_NEST_LEVEL_REG145_NEST_HINT_145_RESETVAL (0x00000100u)
  35302. #define CSL_CPINTC_NEST_LEVEL_REG145_RESETVAL (0x00000100u)
  35303. /* nest_level_reg146 */
  35304. #define CSL_CPINTC_NEST_LEVEL_REG146_NEST_HINT_146_MASK (0x000001FFu)
  35305. #define CSL_CPINTC_NEST_LEVEL_REG146_NEST_HINT_146_SHIFT (0x00000000u)
  35306. #define CSL_CPINTC_NEST_LEVEL_REG146_NEST_HINT_146_RESETVAL (0x00000100u)
  35307. #define CSL_CPINTC_NEST_LEVEL_REG146_RESETVAL (0x00000100u)
  35308. /* nest_level_reg147 */
  35309. #define CSL_CPINTC_NEST_LEVEL_REG147_NEST_HINT_147_MASK (0x000001FFu)
  35310. #define CSL_CPINTC_NEST_LEVEL_REG147_NEST_HINT_147_SHIFT (0x00000000u)
  35311. #define CSL_CPINTC_NEST_LEVEL_REG147_NEST_HINT_147_RESETVAL (0x00000100u)
  35312. #define CSL_CPINTC_NEST_LEVEL_REG147_RESETVAL (0x00000100u)
  35313. /* nest_level_reg148 */
  35314. #define CSL_CPINTC_NEST_LEVEL_REG148_NEST_HINT_148_MASK (0x000001FFu)
  35315. #define CSL_CPINTC_NEST_LEVEL_REG148_NEST_HINT_148_SHIFT (0x00000000u)
  35316. #define CSL_CPINTC_NEST_LEVEL_REG148_NEST_HINT_148_RESETVAL (0x00000100u)
  35317. #define CSL_CPINTC_NEST_LEVEL_REG148_RESETVAL (0x00000100u)
  35318. /* nest_level_reg149 */
  35319. #define CSL_CPINTC_NEST_LEVEL_REG149_NEST_HINT_149_MASK (0x000001FFu)
  35320. #define CSL_CPINTC_NEST_LEVEL_REG149_NEST_HINT_149_SHIFT (0x00000000u)
  35321. #define CSL_CPINTC_NEST_LEVEL_REG149_NEST_HINT_149_RESETVAL (0x00000100u)
  35322. #define CSL_CPINTC_NEST_LEVEL_REG149_RESETVAL (0x00000100u)
  35323. /* nest_level_reg150 */
  35324. #define CSL_CPINTC_NEST_LEVEL_REG150_NEST_HINT_150_MASK (0x000001FFu)
  35325. #define CSL_CPINTC_NEST_LEVEL_REG150_NEST_HINT_150_SHIFT (0x00000000u)
  35326. #define CSL_CPINTC_NEST_LEVEL_REG150_NEST_HINT_150_RESETVAL (0x00000100u)
  35327. #define CSL_CPINTC_NEST_LEVEL_REG150_RESETVAL (0x00000100u)
  35328. /* nest_level_reg151 */
  35329. #define CSL_CPINTC_NEST_LEVEL_REG151_NEST_HINT_151_MASK (0x000001FFu)
  35330. #define CSL_CPINTC_NEST_LEVEL_REG151_NEST_HINT_151_SHIFT (0x00000000u)
  35331. #define CSL_CPINTC_NEST_LEVEL_REG151_NEST_HINT_151_RESETVAL (0x00000100u)
  35332. #define CSL_CPINTC_NEST_LEVEL_REG151_RESETVAL (0x00000100u)
  35333. /* nest_level_reg152 */
  35334. #define CSL_CPINTC_NEST_LEVEL_REG152_NEST_HINT_152_MASK (0x000001FFu)
  35335. #define CSL_CPINTC_NEST_LEVEL_REG152_NEST_HINT_152_SHIFT (0x00000000u)
  35336. #define CSL_CPINTC_NEST_LEVEL_REG152_NEST_HINT_152_RESETVAL (0x00000100u)
  35337. #define CSL_CPINTC_NEST_LEVEL_REG152_RESETVAL (0x00000100u)
  35338. /* nest_level_reg153 */
  35339. #define CSL_CPINTC_NEST_LEVEL_REG153_NEST_HINT_153_MASK (0x000001FFu)
  35340. #define CSL_CPINTC_NEST_LEVEL_REG153_NEST_HINT_153_SHIFT (0x00000000u)
  35341. #define CSL_CPINTC_NEST_LEVEL_REG153_NEST_HINT_153_RESETVAL (0x00000100u)
  35342. #define CSL_CPINTC_NEST_LEVEL_REG153_RESETVAL (0x00000100u)
  35343. /* nest_level_reg154 */
  35344. #define CSL_CPINTC_NEST_LEVEL_REG154_NEST_HINT_154_MASK (0x000001FFu)
  35345. #define CSL_CPINTC_NEST_LEVEL_REG154_NEST_HINT_154_SHIFT (0x00000000u)
  35346. #define CSL_CPINTC_NEST_LEVEL_REG154_NEST_HINT_154_RESETVAL (0x00000100u)
  35347. #define CSL_CPINTC_NEST_LEVEL_REG154_RESETVAL (0x00000100u)
  35348. /* nest_level_reg155 */
  35349. #define CSL_CPINTC_NEST_LEVEL_REG155_NEST_HINT_155_MASK (0x000001FFu)
  35350. #define CSL_CPINTC_NEST_LEVEL_REG155_NEST_HINT_155_SHIFT (0x00000000u)
  35351. #define CSL_CPINTC_NEST_LEVEL_REG155_NEST_HINT_155_RESETVAL (0x00000100u)
  35352. #define CSL_CPINTC_NEST_LEVEL_REG155_RESETVAL (0x00000100u)
  35353. /* nest_level_reg156 */
  35354. #define CSL_CPINTC_NEST_LEVEL_REG156_NEST_HINT_156_MASK (0x000001FFu)
  35355. #define CSL_CPINTC_NEST_LEVEL_REG156_NEST_HINT_156_SHIFT (0x00000000u)
  35356. #define CSL_CPINTC_NEST_LEVEL_REG156_NEST_HINT_156_RESETVAL (0x00000100u)
  35357. #define CSL_CPINTC_NEST_LEVEL_REG156_RESETVAL (0x00000100u)
  35358. /* nest_level_reg157 */
  35359. #define CSL_CPINTC_NEST_LEVEL_REG157_NEST_HINT_157_MASK (0x000001FFu)
  35360. #define CSL_CPINTC_NEST_LEVEL_REG157_NEST_HINT_157_SHIFT (0x00000000u)
  35361. #define CSL_CPINTC_NEST_LEVEL_REG157_NEST_HINT_157_RESETVAL (0x00000100u)
  35362. #define CSL_CPINTC_NEST_LEVEL_REG157_RESETVAL (0x00000100u)
  35363. /* nest_level_reg158 */
  35364. #define CSL_CPINTC_NEST_LEVEL_REG158_NEST_HINT_158_MASK (0x000001FFu)
  35365. #define CSL_CPINTC_NEST_LEVEL_REG158_NEST_HINT_158_SHIFT (0x00000000u)
  35366. #define CSL_CPINTC_NEST_LEVEL_REG158_NEST_HINT_158_RESETVAL (0x00000100u)
  35367. #define CSL_CPINTC_NEST_LEVEL_REG158_RESETVAL (0x00000100u)
  35368. /* nest_level_reg159 */
  35369. #define CSL_CPINTC_NEST_LEVEL_REG159_NEST_HINT_159_MASK (0x000001FFu)
  35370. #define CSL_CPINTC_NEST_LEVEL_REG159_NEST_HINT_159_SHIFT (0x00000000u)
  35371. #define CSL_CPINTC_NEST_LEVEL_REG159_NEST_HINT_159_RESETVAL (0x00000100u)
  35372. #define CSL_CPINTC_NEST_LEVEL_REG159_RESETVAL (0x00000100u)
  35373. /* nest_level_reg160 */
  35374. #define CSL_CPINTC_NEST_LEVEL_REG160_NEST_HINT_160_MASK (0x000001FFu)
  35375. #define CSL_CPINTC_NEST_LEVEL_REG160_NEST_HINT_160_SHIFT (0x00000000u)
  35376. #define CSL_CPINTC_NEST_LEVEL_REG160_NEST_HINT_160_RESETVAL (0x00000100u)
  35377. #define CSL_CPINTC_NEST_LEVEL_REG160_RESETVAL (0x00000100u)
  35378. /* nest_level_reg161 */
  35379. #define CSL_CPINTC_NEST_LEVEL_REG161_NEST_HINT_161_MASK (0x000001FFu)
  35380. #define CSL_CPINTC_NEST_LEVEL_REG161_NEST_HINT_161_SHIFT (0x00000000u)
  35381. #define CSL_CPINTC_NEST_LEVEL_REG161_NEST_HINT_161_RESETVAL (0x00000100u)
  35382. #define CSL_CPINTC_NEST_LEVEL_REG161_RESETVAL (0x00000100u)
  35383. /* nest_level_reg162 */
  35384. #define CSL_CPINTC_NEST_LEVEL_REG162_NEST_HINT_162_MASK (0x000001FFu)
  35385. #define CSL_CPINTC_NEST_LEVEL_REG162_NEST_HINT_162_SHIFT (0x00000000u)
  35386. #define CSL_CPINTC_NEST_LEVEL_REG162_NEST_HINT_162_RESETVAL (0x00000100u)
  35387. #define CSL_CPINTC_NEST_LEVEL_REG162_RESETVAL (0x00000100u)
  35388. /* nest_level_reg163 */
  35389. #define CSL_CPINTC_NEST_LEVEL_REG163_NEST_HINT_163_MASK (0x000001FFu)
  35390. #define CSL_CPINTC_NEST_LEVEL_REG163_NEST_HINT_163_SHIFT (0x00000000u)
  35391. #define CSL_CPINTC_NEST_LEVEL_REG163_NEST_HINT_163_RESETVAL (0x00000100u)
  35392. #define CSL_CPINTC_NEST_LEVEL_REG163_RESETVAL (0x00000100u)
  35393. /* nest_level_reg164 */
  35394. #define CSL_CPINTC_NEST_LEVEL_REG164_NEST_HINT_164_MASK (0x000001FFu)
  35395. #define CSL_CPINTC_NEST_LEVEL_REG164_NEST_HINT_164_SHIFT (0x00000000u)
  35396. #define CSL_CPINTC_NEST_LEVEL_REG164_NEST_HINT_164_RESETVAL (0x00000100u)
  35397. #define CSL_CPINTC_NEST_LEVEL_REG164_RESETVAL (0x00000100u)
  35398. /* nest_level_reg165 */
  35399. #define CSL_CPINTC_NEST_LEVEL_REG165_NEST_HINT_165_MASK (0x000001FFu)
  35400. #define CSL_CPINTC_NEST_LEVEL_REG165_NEST_HINT_165_SHIFT (0x00000000u)
  35401. #define CSL_CPINTC_NEST_LEVEL_REG165_NEST_HINT_165_RESETVAL (0x00000100u)
  35402. #define CSL_CPINTC_NEST_LEVEL_REG165_RESETVAL (0x00000100u)
  35403. /* nest_level_reg166 */
  35404. #define CSL_CPINTC_NEST_LEVEL_REG166_NEST_HINT_166_MASK (0x000001FFu)
  35405. #define CSL_CPINTC_NEST_LEVEL_REG166_NEST_HINT_166_SHIFT (0x00000000u)
  35406. #define CSL_CPINTC_NEST_LEVEL_REG166_NEST_HINT_166_RESETVAL (0x00000100u)
  35407. #define CSL_CPINTC_NEST_LEVEL_REG166_RESETVAL (0x00000100u)
  35408. /* nest_level_reg167 */
  35409. #define CSL_CPINTC_NEST_LEVEL_REG167_NEST_HINT_167_MASK (0x000001FFu)
  35410. #define CSL_CPINTC_NEST_LEVEL_REG167_NEST_HINT_167_SHIFT (0x00000000u)
  35411. #define CSL_CPINTC_NEST_LEVEL_REG167_NEST_HINT_167_RESETVAL (0x00000100u)
  35412. #define CSL_CPINTC_NEST_LEVEL_REG167_RESETVAL (0x00000100u)
  35413. /* nest_level_reg168 */
  35414. #define CSL_CPINTC_NEST_LEVEL_REG168_NEST_HINT_168_MASK (0x000001FFu)
  35415. #define CSL_CPINTC_NEST_LEVEL_REG168_NEST_HINT_168_SHIFT (0x00000000u)
  35416. #define CSL_CPINTC_NEST_LEVEL_REG168_NEST_HINT_168_RESETVAL (0x00000100u)
  35417. #define CSL_CPINTC_NEST_LEVEL_REG168_RESETVAL (0x00000100u)
  35418. /* nest_level_reg169 */
  35419. #define CSL_CPINTC_NEST_LEVEL_REG169_NEST_HINT_169_MASK (0x000001FFu)
  35420. #define CSL_CPINTC_NEST_LEVEL_REG169_NEST_HINT_169_SHIFT (0x00000000u)
  35421. #define CSL_CPINTC_NEST_LEVEL_REG169_NEST_HINT_169_RESETVAL (0x00000100u)
  35422. #define CSL_CPINTC_NEST_LEVEL_REG169_RESETVAL (0x00000100u)
  35423. /* nest_level_reg170 */
  35424. #define CSL_CPINTC_NEST_LEVEL_REG170_NEST_HINT_170_MASK (0x000001FFu)
  35425. #define CSL_CPINTC_NEST_LEVEL_REG170_NEST_HINT_170_SHIFT (0x00000000u)
  35426. #define CSL_CPINTC_NEST_LEVEL_REG170_NEST_HINT_170_RESETVAL (0x00000100u)
  35427. #define CSL_CPINTC_NEST_LEVEL_REG170_RESETVAL (0x00000100u)
  35428. /* nest_level_reg171 */
  35429. #define CSL_CPINTC_NEST_LEVEL_REG171_NEST_HINT_171_MASK (0x000001FFu)
  35430. #define CSL_CPINTC_NEST_LEVEL_REG171_NEST_HINT_171_SHIFT (0x00000000u)
  35431. #define CSL_CPINTC_NEST_LEVEL_REG171_NEST_HINT_171_RESETVAL (0x00000100u)
  35432. #define CSL_CPINTC_NEST_LEVEL_REG171_RESETVAL (0x00000100u)
  35433. /* nest_level_reg172 */
  35434. #define CSL_CPINTC_NEST_LEVEL_REG172_NEST_HINT_172_MASK (0x000001FFu)
  35435. #define CSL_CPINTC_NEST_LEVEL_REG172_NEST_HINT_172_SHIFT (0x00000000u)
  35436. #define CSL_CPINTC_NEST_LEVEL_REG172_NEST_HINT_172_RESETVAL (0x00000100u)
  35437. #define CSL_CPINTC_NEST_LEVEL_REG172_RESETVAL (0x00000100u)
  35438. /* nest_level_reg173 */
  35439. #define CSL_CPINTC_NEST_LEVEL_REG173_NEST_HINT_173_MASK (0x000001FFu)
  35440. #define CSL_CPINTC_NEST_LEVEL_REG173_NEST_HINT_173_SHIFT (0x00000000u)
  35441. #define CSL_CPINTC_NEST_LEVEL_REG173_NEST_HINT_173_RESETVAL (0x00000100u)
  35442. #define CSL_CPINTC_NEST_LEVEL_REG173_RESETVAL (0x00000100u)
  35443. /* nest_level_reg174 */
  35444. #define CSL_CPINTC_NEST_LEVEL_REG174_NEST_HINT_174_MASK (0x000001FFu)
  35445. #define CSL_CPINTC_NEST_LEVEL_REG174_NEST_HINT_174_SHIFT (0x00000000u)
  35446. #define CSL_CPINTC_NEST_LEVEL_REG174_NEST_HINT_174_RESETVAL (0x00000100u)
  35447. #define CSL_CPINTC_NEST_LEVEL_REG174_RESETVAL (0x00000100u)
  35448. /* nest_level_reg175 */
  35449. #define CSL_CPINTC_NEST_LEVEL_REG175_NEST_HINT_175_MASK (0x000001FFu)
  35450. #define CSL_CPINTC_NEST_LEVEL_REG175_NEST_HINT_175_SHIFT (0x00000000u)
  35451. #define CSL_CPINTC_NEST_LEVEL_REG175_NEST_HINT_175_RESETVAL (0x00000100u)
  35452. #define CSL_CPINTC_NEST_LEVEL_REG175_RESETVAL (0x00000100u)
  35453. /* nest_level_reg176 */
  35454. #define CSL_CPINTC_NEST_LEVEL_REG176_NEST_HINT_176_MASK (0x000001FFu)
  35455. #define CSL_CPINTC_NEST_LEVEL_REG176_NEST_HINT_176_SHIFT (0x00000000u)
  35456. #define CSL_CPINTC_NEST_LEVEL_REG176_NEST_HINT_176_RESETVAL (0x00000100u)
  35457. #define CSL_CPINTC_NEST_LEVEL_REG176_RESETVAL (0x00000100u)
  35458. /* nest_level_reg177 */
  35459. #define CSL_CPINTC_NEST_LEVEL_REG177_NEST_HINT_177_MASK (0x000001FFu)
  35460. #define CSL_CPINTC_NEST_LEVEL_REG177_NEST_HINT_177_SHIFT (0x00000000u)
  35461. #define CSL_CPINTC_NEST_LEVEL_REG177_NEST_HINT_177_RESETVAL (0x00000100u)
  35462. #define CSL_CPINTC_NEST_LEVEL_REG177_RESETVAL (0x00000100u)
  35463. /* nest_level_reg178 */
  35464. #define CSL_CPINTC_NEST_LEVEL_REG178_NEST_HINT_178_MASK (0x000001FFu)
  35465. #define CSL_CPINTC_NEST_LEVEL_REG178_NEST_HINT_178_SHIFT (0x00000000u)
  35466. #define CSL_CPINTC_NEST_LEVEL_REG178_NEST_HINT_178_RESETVAL (0x00000100u)
  35467. #define CSL_CPINTC_NEST_LEVEL_REG178_RESETVAL (0x00000100u)
  35468. /* nest_level_reg179 */
  35469. #define CSL_CPINTC_NEST_LEVEL_REG179_NEST_HINT_179_MASK (0x000001FFu)
  35470. #define CSL_CPINTC_NEST_LEVEL_REG179_NEST_HINT_179_SHIFT (0x00000000u)
  35471. #define CSL_CPINTC_NEST_LEVEL_REG179_NEST_HINT_179_RESETVAL (0x00000100u)
  35472. #define CSL_CPINTC_NEST_LEVEL_REG179_RESETVAL (0x00000100u)
  35473. /* nest_level_reg180 */
  35474. #define CSL_CPINTC_NEST_LEVEL_REG180_NEST_HINT_180_MASK (0x000001FFu)
  35475. #define CSL_CPINTC_NEST_LEVEL_REG180_NEST_HINT_180_SHIFT (0x00000000u)
  35476. #define CSL_CPINTC_NEST_LEVEL_REG180_NEST_HINT_180_RESETVAL (0x00000100u)
  35477. #define CSL_CPINTC_NEST_LEVEL_REG180_RESETVAL (0x00000100u)
  35478. /* nest_level_reg181 */
  35479. #define CSL_CPINTC_NEST_LEVEL_REG181_NEST_HINT_181_MASK (0x000001FFu)
  35480. #define CSL_CPINTC_NEST_LEVEL_REG181_NEST_HINT_181_SHIFT (0x00000000u)
  35481. #define CSL_CPINTC_NEST_LEVEL_REG181_NEST_HINT_181_RESETVAL (0x00000100u)
  35482. #define CSL_CPINTC_NEST_LEVEL_REG181_RESETVAL (0x00000100u)
  35483. /* nest_level_reg182 */
  35484. #define CSL_CPINTC_NEST_LEVEL_REG182_NEST_HINT_182_MASK (0x000001FFu)
  35485. #define CSL_CPINTC_NEST_LEVEL_REG182_NEST_HINT_182_SHIFT (0x00000000u)
  35486. #define CSL_CPINTC_NEST_LEVEL_REG182_NEST_HINT_182_RESETVAL (0x00000100u)
  35487. #define CSL_CPINTC_NEST_LEVEL_REG182_RESETVAL (0x00000100u)
  35488. /* nest_level_reg183 */
  35489. #define CSL_CPINTC_NEST_LEVEL_REG183_NEST_HINT_183_MASK (0x000001FFu)
  35490. #define CSL_CPINTC_NEST_LEVEL_REG183_NEST_HINT_183_SHIFT (0x00000000u)
  35491. #define CSL_CPINTC_NEST_LEVEL_REG183_NEST_HINT_183_RESETVAL (0x00000100u)
  35492. #define CSL_CPINTC_NEST_LEVEL_REG183_RESETVAL (0x00000100u)
  35493. /* nest_level_reg184 */
  35494. #define CSL_CPINTC_NEST_LEVEL_REG184_NEST_HINT_184_MASK (0x000001FFu)
  35495. #define CSL_CPINTC_NEST_LEVEL_REG184_NEST_HINT_184_SHIFT (0x00000000u)
  35496. #define CSL_CPINTC_NEST_LEVEL_REG184_NEST_HINT_184_RESETVAL (0x00000100u)
  35497. #define CSL_CPINTC_NEST_LEVEL_REG184_RESETVAL (0x00000100u)
  35498. /* nest_level_reg185 */
  35499. #define CSL_CPINTC_NEST_LEVEL_REG185_NEST_HINT_185_MASK (0x000001FFu)
  35500. #define CSL_CPINTC_NEST_LEVEL_REG185_NEST_HINT_185_SHIFT (0x00000000u)
  35501. #define CSL_CPINTC_NEST_LEVEL_REG185_NEST_HINT_185_RESETVAL (0x00000100u)
  35502. #define CSL_CPINTC_NEST_LEVEL_REG185_RESETVAL (0x00000100u)
  35503. /* nest_level_reg186 */
  35504. #define CSL_CPINTC_NEST_LEVEL_REG186_NEST_HINT_186_MASK (0x000001FFu)
  35505. #define CSL_CPINTC_NEST_LEVEL_REG186_NEST_HINT_186_SHIFT (0x00000000u)
  35506. #define CSL_CPINTC_NEST_LEVEL_REG186_NEST_HINT_186_RESETVAL (0x00000100u)
  35507. #define CSL_CPINTC_NEST_LEVEL_REG186_RESETVAL (0x00000100u)
  35508. /* nest_level_reg187 */
  35509. #define CSL_CPINTC_NEST_LEVEL_REG187_NEST_HINT_187_MASK (0x000001FFu)
  35510. #define CSL_CPINTC_NEST_LEVEL_REG187_NEST_HINT_187_SHIFT (0x00000000u)
  35511. #define CSL_CPINTC_NEST_LEVEL_REG187_NEST_HINT_187_RESETVAL (0x00000100u)
  35512. #define CSL_CPINTC_NEST_LEVEL_REG187_RESETVAL (0x00000100u)
  35513. /* nest_level_reg188 */
  35514. #define CSL_CPINTC_NEST_LEVEL_REG188_NEST_HINT_188_MASK (0x000001FFu)
  35515. #define CSL_CPINTC_NEST_LEVEL_REG188_NEST_HINT_188_SHIFT (0x00000000u)
  35516. #define CSL_CPINTC_NEST_LEVEL_REG188_NEST_HINT_188_RESETVAL (0x00000100u)
  35517. #define CSL_CPINTC_NEST_LEVEL_REG188_RESETVAL (0x00000100u)
  35518. /* nest_level_reg189 */
  35519. #define CSL_CPINTC_NEST_LEVEL_REG189_NEST_HINT_189_MASK (0x000001FFu)
  35520. #define CSL_CPINTC_NEST_LEVEL_REG189_NEST_HINT_189_SHIFT (0x00000000u)
  35521. #define CSL_CPINTC_NEST_LEVEL_REG189_NEST_HINT_189_RESETVAL (0x00000100u)
  35522. #define CSL_CPINTC_NEST_LEVEL_REG189_RESETVAL (0x00000100u)
  35523. /* nest_level_reg190 */
  35524. #define CSL_CPINTC_NEST_LEVEL_REG190_NEST_HINT_190_MASK (0x000001FFu)
  35525. #define CSL_CPINTC_NEST_LEVEL_REG190_NEST_HINT_190_SHIFT (0x00000000u)
  35526. #define CSL_CPINTC_NEST_LEVEL_REG190_NEST_HINT_190_RESETVAL (0x00000100u)
  35527. #define CSL_CPINTC_NEST_LEVEL_REG190_RESETVAL (0x00000100u)
  35528. /* nest_level_reg191 */
  35529. #define CSL_CPINTC_NEST_LEVEL_REG191_NEST_HINT_191_MASK (0x000001FFu)
  35530. #define CSL_CPINTC_NEST_LEVEL_REG191_NEST_HINT_191_SHIFT (0x00000000u)
  35531. #define CSL_CPINTC_NEST_LEVEL_REG191_NEST_HINT_191_RESETVAL (0x00000100u)
  35532. #define CSL_CPINTC_NEST_LEVEL_REG191_RESETVAL (0x00000100u)
  35533. /* nest_level_reg192 */
  35534. #define CSL_CPINTC_NEST_LEVEL_REG192_NEST_HINT_192_MASK (0x000001FFu)
  35535. #define CSL_CPINTC_NEST_LEVEL_REG192_NEST_HINT_192_SHIFT (0x00000000u)
  35536. #define CSL_CPINTC_NEST_LEVEL_REG192_NEST_HINT_192_RESETVAL (0x00000100u)
  35537. #define CSL_CPINTC_NEST_LEVEL_REG192_RESETVAL (0x00000100u)
  35538. /* nest_level_reg193 */
  35539. #define CSL_CPINTC_NEST_LEVEL_REG193_NEST_HINT_193_MASK (0x000001FFu)
  35540. #define CSL_CPINTC_NEST_LEVEL_REG193_NEST_HINT_193_SHIFT (0x00000000u)
  35541. #define CSL_CPINTC_NEST_LEVEL_REG193_NEST_HINT_193_RESETVAL (0x00000100u)
  35542. #define CSL_CPINTC_NEST_LEVEL_REG193_RESETVAL (0x00000100u)
  35543. /* nest_level_reg194 */
  35544. #define CSL_CPINTC_NEST_LEVEL_REG194_NEST_HINT_194_MASK (0x000001FFu)
  35545. #define CSL_CPINTC_NEST_LEVEL_REG194_NEST_HINT_194_SHIFT (0x00000000u)
  35546. #define CSL_CPINTC_NEST_LEVEL_REG194_NEST_HINT_194_RESETVAL (0x00000100u)
  35547. #define CSL_CPINTC_NEST_LEVEL_REG194_RESETVAL (0x00000100u)
  35548. /* nest_level_reg195 */
  35549. #define CSL_CPINTC_NEST_LEVEL_REG195_NEST_HINT_195_MASK (0x000001FFu)
  35550. #define CSL_CPINTC_NEST_LEVEL_REG195_NEST_HINT_195_SHIFT (0x00000000u)
  35551. #define CSL_CPINTC_NEST_LEVEL_REG195_NEST_HINT_195_RESETVAL (0x00000100u)
  35552. #define CSL_CPINTC_NEST_LEVEL_REG195_RESETVAL (0x00000100u)
  35553. /* nest_level_reg196 */
  35554. #define CSL_CPINTC_NEST_LEVEL_REG196_NEST_HINT_196_MASK (0x000001FFu)
  35555. #define CSL_CPINTC_NEST_LEVEL_REG196_NEST_HINT_196_SHIFT (0x00000000u)
  35556. #define CSL_CPINTC_NEST_LEVEL_REG196_NEST_HINT_196_RESETVAL (0x00000100u)
  35557. #define CSL_CPINTC_NEST_LEVEL_REG196_RESETVAL (0x00000100u)
  35558. /* nest_level_reg197 */
  35559. #define CSL_CPINTC_NEST_LEVEL_REG197_NEST_HINT_197_MASK (0x000001FFu)
  35560. #define CSL_CPINTC_NEST_LEVEL_REG197_NEST_HINT_197_SHIFT (0x00000000u)
  35561. #define CSL_CPINTC_NEST_LEVEL_REG197_NEST_HINT_197_RESETVAL (0x00000100u)
  35562. #define CSL_CPINTC_NEST_LEVEL_REG197_RESETVAL (0x00000100u)
  35563. /* nest_level_reg198 */
  35564. #define CSL_CPINTC_NEST_LEVEL_REG198_NEST_HINT_198_MASK (0x000001FFu)
  35565. #define CSL_CPINTC_NEST_LEVEL_REG198_NEST_HINT_198_SHIFT (0x00000000u)
  35566. #define CSL_CPINTC_NEST_LEVEL_REG198_NEST_HINT_198_RESETVAL (0x00000100u)
  35567. #define CSL_CPINTC_NEST_LEVEL_REG198_RESETVAL (0x00000100u)
  35568. /* nest_level_reg199 */
  35569. #define CSL_CPINTC_NEST_LEVEL_REG199_NEST_HINT_199_MASK (0x000001FFu)
  35570. #define CSL_CPINTC_NEST_LEVEL_REG199_NEST_HINT_199_SHIFT (0x00000000u)
  35571. #define CSL_CPINTC_NEST_LEVEL_REG199_NEST_HINT_199_RESETVAL (0x00000100u)
  35572. #define CSL_CPINTC_NEST_LEVEL_REG199_RESETVAL (0x00000100u)
  35573. /* nest_level_reg200 */
  35574. #define CSL_CPINTC_NEST_LEVEL_REG200_NEST_HINT_200_MASK (0x000001FFu)
  35575. #define CSL_CPINTC_NEST_LEVEL_REG200_NEST_HINT_200_SHIFT (0x00000000u)
  35576. #define CSL_CPINTC_NEST_LEVEL_REG200_NEST_HINT_200_RESETVAL (0x00000100u)
  35577. #define CSL_CPINTC_NEST_LEVEL_REG200_RESETVAL (0x00000100u)
  35578. /* nest_level_reg201 */
  35579. #define CSL_CPINTC_NEST_LEVEL_REG201_NEST_HINT_201_MASK (0x000001FFu)
  35580. #define CSL_CPINTC_NEST_LEVEL_REG201_NEST_HINT_201_SHIFT (0x00000000u)
  35581. #define CSL_CPINTC_NEST_LEVEL_REG201_NEST_HINT_201_RESETVAL (0x00000100u)
  35582. #define CSL_CPINTC_NEST_LEVEL_REG201_RESETVAL (0x00000100u)
  35583. /* nest_level_reg202 */
  35584. #define CSL_CPINTC_NEST_LEVEL_REG202_NEST_HINT_202_MASK (0x000001FFu)
  35585. #define CSL_CPINTC_NEST_LEVEL_REG202_NEST_HINT_202_SHIFT (0x00000000u)
  35586. #define CSL_CPINTC_NEST_LEVEL_REG202_NEST_HINT_202_RESETVAL (0x00000100u)
  35587. #define CSL_CPINTC_NEST_LEVEL_REG202_RESETVAL (0x00000100u)
  35588. /* nest_level_reg203 */
  35589. #define CSL_CPINTC_NEST_LEVEL_REG203_NEST_HINT_203_MASK (0x000001FFu)
  35590. #define CSL_CPINTC_NEST_LEVEL_REG203_NEST_HINT_203_SHIFT (0x00000000u)
  35591. #define CSL_CPINTC_NEST_LEVEL_REG203_NEST_HINT_203_RESETVAL (0x00000100u)
  35592. #define CSL_CPINTC_NEST_LEVEL_REG203_RESETVAL (0x00000100u)
  35593. /* nest_level_reg204 */
  35594. #define CSL_CPINTC_NEST_LEVEL_REG204_NEST_HINT_204_MASK (0x000001FFu)
  35595. #define CSL_CPINTC_NEST_LEVEL_REG204_NEST_HINT_204_SHIFT (0x00000000u)
  35596. #define CSL_CPINTC_NEST_LEVEL_REG204_NEST_HINT_204_RESETVAL (0x00000100u)
  35597. #define CSL_CPINTC_NEST_LEVEL_REG204_RESETVAL (0x00000100u)
  35598. /* nest_level_reg205 */
  35599. #define CSL_CPINTC_NEST_LEVEL_REG205_NEST_HINT_205_MASK (0x000001FFu)
  35600. #define CSL_CPINTC_NEST_LEVEL_REG205_NEST_HINT_205_SHIFT (0x00000000u)
  35601. #define CSL_CPINTC_NEST_LEVEL_REG205_NEST_HINT_205_RESETVAL (0x00000100u)
  35602. #define CSL_CPINTC_NEST_LEVEL_REG205_RESETVAL (0x00000100u)
  35603. /* nest_level_reg206 */
  35604. #define CSL_CPINTC_NEST_LEVEL_REG206_NEST_HINT_206_MASK (0x000001FFu)
  35605. #define CSL_CPINTC_NEST_LEVEL_REG206_NEST_HINT_206_SHIFT (0x00000000u)
  35606. #define CSL_CPINTC_NEST_LEVEL_REG206_NEST_HINT_206_RESETVAL (0x00000100u)
  35607. #define CSL_CPINTC_NEST_LEVEL_REG206_RESETVAL (0x00000100u)
  35608. /* nest_level_reg207 */
  35609. #define CSL_CPINTC_NEST_LEVEL_REG207_NEST_HINT_207_MASK (0x000001FFu)
  35610. #define CSL_CPINTC_NEST_LEVEL_REG207_NEST_HINT_207_SHIFT (0x00000000u)
  35611. #define CSL_CPINTC_NEST_LEVEL_REG207_NEST_HINT_207_RESETVAL (0x00000100u)
  35612. #define CSL_CPINTC_NEST_LEVEL_REG207_RESETVAL (0x00000100u)
  35613. /* nest_level_reg208 */
  35614. #define CSL_CPINTC_NEST_LEVEL_REG208_NEST_HINT_208_MASK (0x000001FFu)
  35615. #define CSL_CPINTC_NEST_LEVEL_REG208_NEST_HINT_208_SHIFT (0x00000000u)
  35616. #define CSL_CPINTC_NEST_LEVEL_REG208_NEST_HINT_208_RESETVAL (0x00000100u)
  35617. #define CSL_CPINTC_NEST_LEVEL_REG208_RESETVAL (0x00000100u)
  35618. /* nest_level_reg209 */
  35619. #define CSL_CPINTC_NEST_LEVEL_REG209_NEST_HINT_209_MASK (0x000001FFu)
  35620. #define CSL_CPINTC_NEST_LEVEL_REG209_NEST_HINT_209_SHIFT (0x00000000u)
  35621. #define CSL_CPINTC_NEST_LEVEL_REG209_NEST_HINT_209_RESETVAL (0x00000100u)
  35622. #define CSL_CPINTC_NEST_LEVEL_REG209_RESETVAL (0x00000100u)
  35623. /* nest_level_reg210 */
  35624. #define CSL_CPINTC_NEST_LEVEL_REG210_NEST_HINT_210_MASK (0x000001FFu)
  35625. #define CSL_CPINTC_NEST_LEVEL_REG210_NEST_HINT_210_SHIFT (0x00000000u)
  35626. #define CSL_CPINTC_NEST_LEVEL_REG210_NEST_HINT_210_RESETVAL (0x00000100u)
  35627. #define CSL_CPINTC_NEST_LEVEL_REG210_RESETVAL (0x00000100u)
  35628. /* nest_level_reg211 */
  35629. #define CSL_CPINTC_NEST_LEVEL_REG211_NEST_HINT_211_MASK (0x000001FFu)
  35630. #define CSL_CPINTC_NEST_LEVEL_REG211_NEST_HINT_211_SHIFT (0x00000000u)
  35631. #define CSL_CPINTC_NEST_LEVEL_REG211_NEST_HINT_211_RESETVAL (0x00000100u)
  35632. #define CSL_CPINTC_NEST_LEVEL_REG211_RESETVAL (0x00000100u)
  35633. /* nest_level_reg212 */
  35634. #define CSL_CPINTC_NEST_LEVEL_REG212_NEST_HINT_212_MASK (0x000001FFu)
  35635. #define CSL_CPINTC_NEST_LEVEL_REG212_NEST_HINT_212_SHIFT (0x00000000u)
  35636. #define CSL_CPINTC_NEST_LEVEL_REG212_NEST_HINT_212_RESETVAL (0x00000100u)
  35637. #define CSL_CPINTC_NEST_LEVEL_REG212_RESETVAL (0x00000100u)
  35638. /* nest_level_reg213 */
  35639. #define CSL_CPINTC_NEST_LEVEL_REG213_NEST_HINT_213_MASK (0x000001FFu)
  35640. #define CSL_CPINTC_NEST_LEVEL_REG213_NEST_HINT_213_SHIFT (0x00000000u)
  35641. #define CSL_CPINTC_NEST_LEVEL_REG213_NEST_HINT_213_RESETVAL (0x00000100u)
  35642. #define CSL_CPINTC_NEST_LEVEL_REG213_RESETVAL (0x00000100u)
  35643. /* nest_level_reg214 */
  35644. #define CSL_CPINTC_NEST_LEVEL_REG214_NEST_HINT_214_MASK (0x000001FFu)
  35645. #define CSL_CPINTC_NEST_LEVEL_REG214_NEST_HINT_214_SHIFT (0x00000000u)
  35646. #define CSL_CPINTC_NEST_LEVEL_REG214_NEST_HINT_214_RESETVAL (0x00000100u)
  35647. #define CSL_CPINTC_NEST_LEVEL_REG214_RESETVAL (0x00000100u)
  35648. /* nest_level_reg215 */
  35649. #define CSL_CPINTC_NEST_LEVEL_REG215_NEST_HINT_215_MASK (0x000001FFu)
  35650. #define CSL_CPINTC_NEST_LEVEL_REG215_NEST_HINT_215_SHIFT (0x00000000u)
  35651. #define CSL_CPINTC_NEST_LEVEL_REG215_NEST_HINT_215_RESETVAL (0x00000100u)
  35652. #define CSL_CPINTC_NEST_LEVEL_REG215_RESETVAL (0x00000100u)
  35653. /* nest_level_reg216 */
  35654. #define CSL_CPINTC_NEST_LEVEL_REG216_NEST_HINT_216_MASK (0x000001FFu)
  35655. #define CSL_CPINTC_NEST_LEVEL_REG216_NEST_HINT_216_SHIFT (0x00000000u)
  35656. #define CSL_CPINTC_NEST_LEVEL_REG216_NEST_HINT_216_RESETVAL (0x00000100u)
  35657. #define CSL_CPINTC_NEST_LEVEL_REG216_RESETVAL (0x00000100u)
  35658. /* nest_level_reg217 */
  35659. #define CSL_CPINTC_NEST_LEVEL_REG217_NEST_HINT_217_MASK (0x000001FFu)
  35660. #define CSL_CPINTC_NEST_LEVEL_REG217_NEST_HINT_217_SHIFT (0x00000000u)
  35661. #define CSL_CPINTC_NEST_LEVEL_REG217_NEST_HINT_217_RESETVAL (0x00000100u)
  35662. #define CSL_CPINTC_NEST_LEVEL_REG217_RESETVAL (0x00000100u)
  35663. /* nest_level_reg218 */
  35664. #define CSL_CPINTC_NEST_LEVEL_REG218_NEST_HINT_218_MASK (0x000001FFu)
  35665. #define CSL_CPINTC_NEST_LEVEL_REG218_NEST_HINT_218_SHIFT (0x00000000u)
  35666. #define CSL_CPINTC_NEST_LEVEL_REG218_NEST_HINT_218_RESETVAL (0x00000100u)
  35667. #define CSL_CPINTC_NEST_LEVEL_REG218_RESETVAL (0x00000100u)
  35668. /* nest_level_reg219 */
  35669. #define CSL_CPINTC_NEST_LEVEL_REG219_NEST_HINT_219_MASK (0x000001FFu)
  35670. #define CSL_CPINTC_NEST_LEVEL_REG219_NEST_HINT_219_SHIFT (0x00000000u)
  35671. #define CSL_CPINTC_NEST_LEVEL_REG219_NEST_HINT_219_RESETVAL (0x00000100u)
  35672. #define CSL_CPINTC_NEST_LEVEL_REG219_RESETVAL (0x00000100u)
  35673. /* nest_level_reg220 */
  35674. #define CSL_CPINTC_NEST_LEVEL_REG220_NEST_HINT_220_MASK (0x000001FFu)
  35675. #define CSL_CPINTC_NEST_LEVEL_REG220_NEST_HINT_220_SHIFT (0x00000000u)
  35676. #define CSL_CPINTC_NEST_LEVEL_REG220_NEST_HINT_220_RESETVAL (0x00000100u)
  35677. #define CSL_CPINTC_NEST_LEVEL_REG220_RESETVAL (0x00000100u)
  35678. /* nest_level_reg221 */
  35679. #define CSL_CPINTC_NEST_LEVEL_REG221_NEST_HINT_221_MASK (0x000001FFu)
  35680. #define CSL_CPINTC_NEST_LEVEL_REG221_NEST_HINT_221_SHIFT (0x00000000u)
  35681. #define CSL_CPINTC_NEST_LEVEL_REG221_NEST_HINT_221_RESETVAL (0x00000100u)
  35682. #define CSL_CPINTC_NEST_LEVEL_REG221_RESETVAL (0x00000100u)
  35683. /* nest_level_reg222 */
  35684. #define CSL_CPINTC_NEST_LEVEL_REG222_NEST_HINT_222_MASK (0x000001FFu)
  35685. #define CSL_CPINTC_NEST_LEVEL_REG222_NEST_HINT_222_SHIFT (0x00000000u)
  35686. #define CSL_CPINTC_NEST_LEVEL_REG222_NEST_HINT_222_RESETVAL (0x00000100u)
  35687. #define CSL_CPINTC_NEST_LEVEL_REG222_RESETVAL (0x00000100u)
  35688. /* nest_level_reg223 */
  35689. #define CSL_CPINTC_NEST_LEVEL_REG223_NEST_HINT_223_MASK (0x000001FFu)
  35690. #define CSL_CPINTC_NEST_LEVEL_REG223_NEST_HINT_223_SHIFT (0x00000000u)
  35691. #define CSL_CPINTC_NEST_LEVEL_REG223_NEST_HINT_223_RESETVAL (0x00000100u)
  35692. #define CSL_CPINTC_NEST_LEVEL_REG223_RESETVAL (0x00000100u)
  35693. /* nest_level_reg224 */
  35694. #define CSL_CPINTC_NEST_LEVEL_REG224_NEST_HINT_224_MASK (0x000001FFu)
  35695. #define CSL_CPINTC_NEST_LEVEL_REG224_NEST_HINT_224_SHIFT (0x00000000u)
  35696. #define CSL_CPINTC_NEST_LEVEL_REG224_NEST_HINT_224_RESETVAL (0x00000100u)
  35697. #define CSL_CPINTC_NEST_LEVEL_REG224_RESETVAL (0x00000100u)
  35698. /* nest_level_reg225 */
  35699. #define CSL_CPINTC_NEST_LEVEL_REG225_NEST_HINT_225_MASK (0x000001FFu)
  35700. #define CSL_CPINTC_NEST_LEVEL_REG225_NEST_HINT_225_SHIFT (0x00000000u)
  35701. #define CSL_CPINTC_NEST_LEVEL_REG225_NEST_HINT_225_RESETVAL (0x00000100u)
  35702. #define CSL_CPINTC_NEST_LEVEL_REG225_RESETVAL (0x00000100u)
  35703. /* nest_level_reg226 */
  35704. #define CSL_CPINTC_NEST_LEVEL_REG226_NEST_HINT_226_MASK (0x000001FFu)
  35705. #define CSL_CPINTC_NEST_LEVEL_REG226_NEST_HINT_226_SHIFT (0x00000000u)
  35706. #define CSL_CPINTC_NEST_LEVEL_REG226_NEST_HINT_226_RESETVAL (0x00000100u)
  35707. #define CSL_CPINTC_NEST_LEVEL_REG226_RESETVAL (0x00000100u)
  35708. /* nest_level_reg227 */
  35709. #define CSL_CPINTC_NEST_LEVEL_REG227_NEST_HINT_227_MASK (0x000001FFu)
  35710. #define CSL_CPINTC_NEST_LEVEL_REG227_NEST_HINT_227_SHIFT (0x00000000u)
  35711. #define CSL_CPINTC_NEST_LEVEL_REG227_NEST_HINT_227_RESETVAL (0x00000100u)
  35712. #define CSL_CPINTC_NEST_LEVEL_REG227_RESETVAL (0x00000100u)
  35713. /* nest_level_reg228 */
  35714. #define CSL_CPINTC_NEST_LEVEL_REG228_NEST_HINT_228_MASK (0x000001FFu)
  35715. #define CSL_CPINTC_NEST_LEVEL_REG228_NEST_HINT_228_SHIFT (0x00000000u)
  35716. #define CSL_CPINTC_NEST_LEVEL_REG228_NEST_HINT_228_RESETVAL (0x00000100u)
  35717. #define CSL_CPINTC_NEST_LEVEL_REG228_RESETVAL (0x00000100u)
  35718. /* nest_level_reg229 */
  35719. #define CSL_CPINTC_NEST_LEVEL_REG229_NEST_HINT_229_MASK (0x000001FFu)
  35720. #define CSL_CPINTC_NEST_LEVEL_REG229_NEST_HINT_229_SHIFT (0x00000000u)
  35721. #define CSL_CPINTC_NEST_LEVEL_REG229_NEST_HINT_229_RESETVAL (0x00000100u)
  35722. #define CSL_CPINTC_NEST_LEVEL_REG229_RESETVAL (0x00000100u)
  35723. /* nest_level_reg230 */
  35724. #define CSL_CPINTC_NEST_LEVEL_REG230_NEST_HINT_230_MASK (0x000001FFu)
  35725. #define CSL_CPINTC_NEST_LEVEL_REG230_NEST_HINT_230_SHIFT (0x00000000u)
  35726. #define CSL_CPINTC_NEST_LEVEL_REG230_NEST_HINT_230_RESETVAL (0x00000100u)
  35727. #define CSL_CPINTC_NEST_LEVEL_REG230_RESETVAL (0x00000100u)
  35728. /* nest_level_reg231 */
  35729. #define CSL_CPINTC_NEST_LEVEL_REG231_NEST_HINT_231_MASK (0x000001FFu)
  35730. #define CSL_CPINTC_NEST_LEVEL_REG231_NEST_HINT_231_SHIFT (0x00000000u)
  35731. #define CSL_CPINTC_NEST_LEVEL_REG231_NEST_HINT_231_RESETVAL (0x00000100u)
  35732. #define CSL_CPINTC_NEST_LEVEL_REG231_RESETVAL (0x00000100u)
  35733. /* nest_level_reg232 */
  35734. #define CSL_CPINTC_NEST_LEVEL_REG232_NEST_HINT_232_MASK (0x000001FFu)
  35735. #define CSL_CPINTC_NEST_LEVEL_REG232_NEST_HINT_232_SHIFT (0x00000000u)
  35736. #define CSL_CPINTC_NEST_LEVEL_REG232_NEST_HINT_232_RESETVAL (0x00000100u)
  35737. #define CSL_CPINTC_NEST_LEVEL_REG232_RESETVAL (0x00000100u)
  35738. /* nest_level_reg233 */
  35739. #define CSL_CPINTC_NEST_LEVEL_REG233_NEST_HINT_233_MASK (0x000001FFu)
  35740. #define CSL_CPINTC_NEST_LEVEL_REG233_NEST_HINT_233_SHIFT (0x00000000u)
  35741. #define CSL_CPINTC_NEST_LEVEL_REG233_NEST_HINT_233_RESETVAL (0x00000100u)
  35742. #define CSL_CPINTC_NEST_LEVEL_REG233_RESETVAL (0x00000100u)
  35743. /* nest_level_reg234 */
  35744. #define CSL_CPINTC_NEST_LEVEL_REG234_NEST_HINT_234_MASK (0x000001FFu)
  35745. #define CSL_CPINTC_NEST_LEVEL_REG234_NEST_HINT_234_SHIFT (0x00000000u)
  35746. #define CSL_CPINTC_NEST_LEVEL_REG234_NEST_HINT_234_RESETVAL (0x00000100u)
  35747. #define CSL_CPINTC_NEST_LEVEL_REG234_RESETVAL (0x00000100u)
  35748. /* nest_level_reg235 */
  35749. #define CSL_CPINTC_NEST_LEVEL_REG235_NEST_HINT_235_MASK (0x000001FFu)
  35750. #define CSL_CPINTC_NEST_LEVEL_REG235_NEST_HINT_235_SHIFT (0x00000000u)
  35751. #define CSL_CPINTC_NEST_LEVEL_REG235_NEST_HINT_235_RESETVAL (0x00000100u)
  35752. #define CSL_CPINTC_NEST_LEVEL_REG235_RESETVAL (0x00000100u)
  35753. /* nest_level_reg236 */
  35754. #define CSL_CPINTC_NEST_LEVEL_REG236_NEST_HINT_236_MASK (0x000001FFu)
  35755. #define CSL_CPINTC_NEST_LEVEL_REG236_NEST_HINT_236_SHIFT (0x00000000u)
  35756. #define CSL_CPINTC_NEST_LEVEL_REG236_NEST_HINT_236_RESETVAL (0x00000100u)
  35757. #define CSL_CPINTC_NEST_LEVEL_REG236_RESETVAL (0x00000100u)
  35758. /* nest_level_reg237 */
  35759. #define CSL_CPINTC_NEST_LEVEL_REG237_NEST_HINT_237_MASK (0x000001FFu)
  35760. #define CSL_CPINTC_NEST_LEVEL_REG237_NEST_HINT_237_SHIFT (0x00000000u)
  35761. #define CSL_CPINTC_NEST_LEVEL_REG237_NEST_HINT_237_RESETVAL (0x00000100u)
  35762. #define CSL_CPINTC_NEST_LEVEL_REG237_RESETVAL (0x00000100u)
  35763. /* nest_level_reg238 */
  35764. #define CSL_CPINTC_NEST_LEVEL_REG238_NEST_HINT_238_MASK (0x000001FFu)
  35765. #define CSL_CPINTC_NEST_LEVEL_REG238_NEST_HINT_238_SHIFT (0x00000000u)
  35766. #define CSL_CPINTC_NEST_LEVEL_REG238_NEST_HINT_238_RESETVAL (0x00000100u)
  35767. #define CSL_CPINTC_NEST_LEVEL_REG238_RESETVAL (0x00000100u)
  35768. /* nest_level_reg239 */
  35769. #define CSL_CPINTC_NEST_LEVEL_REG239_NEST_HINT_239_MASK (0x000001FFu)
  35770. #define CSL_CPINTC_NEST_LEVEL_REG239_NEST_HINT_239_SHIFT (0x00000000u)
  35771. #define CSL_CPINTC_NEST_LEVEL_REG239_NEST_HINT_239_RESETVAL (0x00000100u)
  35772. #define CSL_CPINTC_NEST_LEVEL_REG239_RESETVAL (0x00000100u)
  35773. /* nest_level_reg240 */
  35774. #define CSL_CPINTC_NEST_LEVEL_REG240_NEST_HINT_240_MASK (0x000001FFu)
  35775. #define CSL_CPINTC_NEST_LEVEL_REG240_NEST_HINT_240_SHIFT (0x00000000u)
  35776. #define CSL_CPINTC_NEST_LEVEL_REG240_NEST_HINT_240_RESETVAL (0x00000100u)
  35777. #define CSL_CPINTC_NEST_LEVEL_REG240_RESETVAL (0x00000100u)
  35778. /* nest_level_reg241 */
  35779. #define CSL_CPINTC_NEST_LEVEL_REG241_NEST_HINT_241_MASK (0x000001FFu)
  35780. #define CSL_CPINTC_NEST_LEVEL_REG241_NEST_HINT_241_SHIFT (0x00000000u)
  35781. #define CSL_CPINTC_NEST_LEVEL_REG241_NEST_HINT_241_RESETVAL (0x00000100u)
  35782. #define CSL_CPINTC_NEST_LEVEL_REG241_RESETVAL (0x00000100u)
  35783. /* nest_level_reg242 */
  35784. #define CSL_CPINTC_NEST_LEVEL_REG242_NEST_HINT_242_MASK (0x000001FFu)
  35785. #define CSL_CPINTC_NEST_LEVEL_REG242_NEST_HINT_242_SHIFT (0x00000000u)
  35786. #define CSL_CPINTC_NEST_LEVEL_REG242_NEST_HINT_242_RESETVAL (0x00000100u)
  35787. #define CSL_CPINTC_NEST_LEVEL_REG242_RESETVAL (0x00000100u)
  35788. /* nest_level_reg243 */
  35789. #define CSL_CPINTC_NEST_LEVEL_REG243_NEST_HINT_243_MASK (0x000001FFu)
  35790. #define CSL_CPINTC_NEST_LEVEL_REG243_NEST_HINT_243_SHIFT (0x00000000u)
  35791. #define CSL_CPINTC_NEST_LEVEL_REG243_NEST_HINT_243_RESETVAL (0x00000100u)
  35792. #define CSL_CPINTC_NEST_LEVEL_REG243_RESETVAL (0x00000100u)
  35793. /* nest_level_reg244 */
  35794. #define CSL_CPINTC_NEST_LEVEL_REG244_NEST_HINT_244_MASK (0x000001FFu)
  35795. #define CSL_CPINTC_NEST_LEVEL_REG244_NEST_HINT_244_SHIFT (0x00000000u)
  35796. #define CSL_CPINTC_NEST_LEVEL_REG244_NEST_HINT_244_RESETVAL (0x00000100u)
  35797. #define CSL_CPINTC_NEST_LEVEL_REG244_RESETVAL (0x00000100u)
  35798. /* nest_level_reg245 */
  35799. #define CSL_CPINTC_NEST_LEVEL_REG245_NEST_HINT_245_MASK (0x000001FFu)
  35800. #define CSL_CPINTC_NEST_LEVEL_REG245_NEST_HINT_245_SHIFT (0x00000000u)
  35801. #define CSL_CPINTC_NEST_LEVEL_REG245_NEST_HINT_245_RESETVAL (0x00000100u)
  35802. #define CSL_CPINTC_NEST_LEVEL_REG245_RESETVAL (0x00000100u)
  35803. /* nest_level_reg246 */
  35804. #define CSL_CPINTC_NEST_LEVEL_REG246_NEST_HINT_246_MASK (0x000001FFu)
  35805. #define CSL_CPINTC_NEST_LEVEL_REG246_NEST_HINT_246_SHIFT (0x00000000u)
  35806. #define CSL_CPINTC_NEST_LEVEL_REG246_NEST_HINT_246_RESETVAL (0x00000100u)
  35807. #define CSL_CPINTC_NEST_LEVEL_REG246_RESETVAL (0x00000100u)
  35808. /* nest_level_reg247 */
  35809. #define CSL_CPINTC_NEST_LEVEL_REG247_NEST_HINT_247_MASK (0x000001FFu)
  35810. #define CSL_CPINTC_NEST_LEVEL_REG247_NEST_HINT_247_SHIFT (0x00000000u)
  35811. #define CSL_CPINTC_NEST_LEVEL_REG247_NEST_HINT_247_RESETVAL (0x00000100u)
  35812. #define CSL_CPINTC_NEST_LEVEL_REG247_RESETVAL (0x00000100u)
  35813. /* nest_level_reg248 */
  35814. #define CSL_CPINTC_NEST_LEVEL_REG248_NEST_HINT_248_MASK (0x000001FFu)
  35815. #define CSL_CPINTC_NEST_LEVEL_REG248_NEST_HINT_248_SHIFT (0x00000000u)
  35816. #define CSL_CPINTC_NEST_LEVEL_REG248_NEST_HINT_248_RESETVAL (0x00000100u)
  35817. #define CSL_CPINTC_NEST_LEVEL_REG248_RESETVAL (0x00000100u)
  35818. /* nest_level_reg249 */
  35819. #define CSL_CPINTC_NEST_LEVEL_REG249_NEST_HINT_249_MASK (0x000001FFu)
  35820. #define CSL_CPINTC_NEST_LEVEL_REG249_NEST_HINT_249_SHIFT (0x00000000u)
  35821. #define CSL_CPINTC_NEST_LEVEL_REG249_NEST_HINT_249_RESETVAL (0x00000100u)
  35822. #define CSL_CPINTC_NEST_LEVEL_REG249_RESETVAL (0x00000100u)
  35823. /* nest_level_reg250 */
  35824. #define CSL_CPINTC_NEST_LEVEL_REG250_NEST_HINT_250_MASK (0x000001FFu)
  35825. #define CSL_CPINTC_NEST_LEVEL_REG250_NEST_HINT_250_SHIFT (0x00000000u)
  35826. #define CSL_CPINTC_NEST_LEVEL_REG250_NEST_HINT_250_RESETVAL (0x00000100u)
  35827. #define CSL_CPINTC_NEST_LEVEL_REG250_RESETVAL (0x00000100u)
  35828. /* nest_level_reg251 */
  35829. #define CSL_CPINTC_NEST_LEVEL_REG251_NEST_HINT_251_MASK (0x000001FFu)
  35830. #define CSL_CPINTC_NEST_LEVEL_REG251_NEST_HINT_251_SHIFT (0x00000000u)
  35831. #define CSL_CPINTC_NEST_LEVEL_REG251_NEST_HINT_251_RESETVAL (0x00000100u)
  35832. #define CSL_CPINTC_NEST_LEVEL_REG251_RESETVAL (0x00000100u)
  35833. /* nest_level_reg252 */
  35834. #define CSL_CPINTC_NEST_LEVEL_REG252_NEST_HINT_252_MASK (0x000001FFu)
  35835. #define CSL_CPINTC_NEST_LEVEL_REG252_NEST_HINT_252_SHIFT (0x00000000u)
  35836. #define CSL_CPINTC_NEST_LEVEL_REG252_NEST_HINT_252_RESETVAL (0x00000100u)
  35837. #define CSL_CPINTC_NEST_LEVEL_REG252_RESETVAL (0x00000100u)
  35838. /* nest_level_reg253 */
  35839. #define CSL_CPINTC_NEST_LEVEL_REG253_NEST_HINT_253_MASK (0x000001FFu)
  35840. #define CSL_CPINTC_NEST_LEVEL_REG253_NEST_HINT_253_SHIFT (0x00000000u)
  35841. #define CSL_CPINTC_NEST_LEVEL_REG253_NEST_HINT_253_RESETVAL (0x00000100u)
  35842. #define CSL_CPINTC_NEST_LEVEL_REG253_RESETVAL (0x00000100u)
  35843. /* nest_level_reg254 */
  35844. #define CSL_CPINTC_NEST_LEVEL_REG254_NEST_HINT_254_MASK (0x000001FFu)
  35845. #define CSL_CPINTC_NEST_LEVEL_REG254_NEST_HINT_254_SHIFT (0x00000000u)
  35846. #define CSL_CPINTC_NEST_LEVEL_REG254_NEST_HINT_254_RESETVAL (0x00000100u)
  35847. #define CSL_CPINTC_NEST_LEVEL_REG254_RESETVAL (0x00000100u)
  35848. /* nest_level_reg255 */
  35849. #define CSL_CPINTC_NEST_LEVEL_REG255_NEST_HINT_255_MASK (0x000001FFu)
  35850. #define CSL_CPINTC_NEST_LEVEL_REG255_NEST_HINT_255_SHIFT (0x00000000u)
  35851. #define CSL_CPINTC_NEST_LEVEL_REG255_NEST_HINT_255_RESETVAL (0x00000100u)
  35852. #define CSL_CPINTC_NEST_LEVEL_REG255_RESETVAL (0x00000100u)
  35853. /* enable_hint_reg0 */
  35854. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_0_MASK (0x00000001u)
  35855. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_0_SHIFT (0x00000000u)
  35856. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_0_RESETVAL (0x00000000u)
  35857. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_1_MASK (0x00000002u)
  35858. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_1_SHIFT (0x00000001u)
  35859. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_1_RESETVAL (0x00000000u)
  35860. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_2_MASK (0x00000004u)
  35861. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_2_SHIFT (0x00000002u)
  35862. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_2_RESETVAL (0x00000000u)
  35863. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_3_MASK (0x00000008u)
  35864. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_3_SHIFT (0x00000003u)
  35865. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_3_RESETVAL (0x00000000u)
  35866. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_4_MASK (0x00000010u)
  35867. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_4_SHIFT (0x00000004u)
  35868. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_4_RESETVAL (0x00000000u)
  35869. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_5_MASK (0x00000020u)
  35870. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_5_SHIFT (0x00000005u)
  35871. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_5_RESETVAL (0x00000000u)
  35872. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_6_MASK (0x00000040u)
  35873. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_6_SHIFT (0x00000006u)
  35874. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_6_RESETVAL (0x00000000u)
  35875. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_7_MASK (0x00000080u)
  35876. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_7_SHIFT (0x00000007u)
  35877. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_7_RESETVAL (0x00000000u)
  35878. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_8_MASK (0x00000100u)
  35879. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_8_SHIFT (0x00000008u)
  35880. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_8_RESETVAL (0x00000000u)
  35881. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_9_MASK (0x00000200u)
  35882. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_9_SHIFT (0x00000009u)
  35883. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_9_RESETVAL (0x00000000u)
  35884. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_10_MASK (0x00000400u)
  35885. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_10_SHIFT (0x0000000Au)
  35886. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_10_RESETVAL (0x00000000u)
  35887. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_11_MASK (0x00000800u)
  35888. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_11_SHIFT (0x0000000Bu)
  35889. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_11_RESETVAL (0x00000000u)
  35890. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_12_MASK (0x00001000u)
  35891. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_12_SHIFT (0x0000000Cu)
  35892. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_12_RESETVAL (0x00000000u)
  35893. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_13_MASK (0x00002000u)
  35894. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_13_SHIFT (0x0000000Du)
  35895. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_13_RESETVAL (0x00000000u)
  35896. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_14_MASK (0x00004000u)
  35897. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_14_SHIFT (0x0000000Eu)
  35898. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_14_RESETVAL (0x00000000u)
  35899. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_15_MASK (0x00008000u)
  35900. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_15_SHIFT (0x0000000Fu)
  35901. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_15_RESETVAL (0x00000000u)
  35902. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_16_MASK (0x00010000u)
  35903. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_16_SHIFT (0x00000010u)
  35904. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_16_RESETVAL (0x00000000u)
  35905. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_17_MASK (0x00020000u)
  35906. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_17_SHIFT (0x00000011u)
  35907. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_17_RESETVAL (0x00000000u)
  35908. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_18_MASK (0x00040000u)
  35909. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_18_SHIFT (0x00000012u)
  35910. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_18_RESETVAL (0x00000000u)
  35911. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_19_MASK (0x00080000u)
  35912. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_19_SHIFT (0x00000013u)
  35913. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_19_RESETVAL (0x00000000u)
  35914. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_20_MASK (0x00100000u)
  35915. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_20_SHIFT (0x00000014u)
  35916. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_20_RESETVAL (0x00000000u)
  35917. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_21_MASK (0x00200000u)
  35918. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_21_SHIFT (0x00000015u)
  35919. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_21_RESETVAL (0x00000000u)
  35920. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_22_MASK (0x00400000u)
  35921. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_22_SHIFT (0x00000016u)
  35922. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_22_RESETVAL (0x00000000u)
  35923. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_23_MASK (0x00800000u)
  35924. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_23_SHIFT (0x00000017u)
  35925. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_23_RESETVAL (0x00000000u)
  35926. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_24_MASK (0x01000000u)
  35927. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_24_SHIFT (0x00000018u)
  35928. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_24_RESETVAL (0x00000000u)
  35929. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_25_MASK (0x02000000u)
  35930. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_25_SHIFT (0x00000019u)
  35931. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_25_RESETVAL (0x00000000u)
  35932. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_26_MASK (0x04000000u)
  35933. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_26_SHIFT (0x0000001Au)
  35934. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_26_RESETVAL (0x00000000u)
  35935. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_27_MASK (0x08000000u)
  35936. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_27_SHIFT (0x0000001Bu)
  35937. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_27_RESETVAL (0x00000000u)
  35938. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_28_MASK (0x10000000u)
  35939. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_28_SHIFT (0x0000001Cu)
  35940. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_28_RESETVAL (0x00000000u)
  35941. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_29_MASK (0x20000000u)
  35942. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_29_SHIFT (0x0000001Du)
  35943. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_29_RESETVAL (0x00000000u)
  35944. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_30_MASK (0x40000000u)
  35945. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_30_SHIFT (0x0000001Eu)
  35946. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_30_RESETVAL (0x00000000u)
  35947. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_31_MASK (0x80000000u)
  35948. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_31_SHIFT (0x0000001Fu)
  35949. #define CSL_CPINTC_ENABLE_HINT_REG0_ENABLE_HINT_31_RESETVAL (0x00000000u)
  35950. #define CSL_CPINTC_ENABLE_HINT_REG0_RESETVAL (0x00000000u)
  35951. /* enable_hint_reg1 */
  35952. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_32_MASK (0x00000001u)
  35953. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_32_SHIFT (0x00000000u)
  35954. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_32_RESETVAL (0x00000000u)
  35955. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_33_MASK (0x00000002u)
  35956. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_33_SHIFT (0x00000001u)
  35957. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_33_RESETVAL (0x00000000u)
  35958. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_34_MASK (0x00000004u)
  35959. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_34_SHIFT (0x00000002u)
  35960. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_34_RESETVAL (0x00000000u)
  35961. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_35_MASK (0x00000008u)
  35962. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_35_SHIFT (0x00000003u)
  35963. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_35_RESETVAL (0x00000000u)
  35964. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_36_MASK (0x00000010u)
  35965. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_36_SHIFT (0x00000004u)
  35966. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_36_RESETVAL (0x00000000u)
  35967. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_37_MASK (0x00000020u)
  35968. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_37_SHIFT (0x00000005u)
  35969. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_37_RESETVAL (0x00000000u)
  35970. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_38_MASK (0x00000040u)
  35971. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_38_SHIFT (0x00000006u)
  35972. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_38_RESETVAL (0x00000000u)
  35973. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_39_MASK (0x00000080u)
  35974. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_39_SHIFT (0x00000007u)
  35975. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_39_RESETVAL (0x00000000u)
  35976. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_40_MASK (0x00000100u)
  35977. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_40_SHIFT (0x00000008u)
  35978. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_40_RESETVAL (0x00000000u)
  35979. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_41_MASK (0x00000200u)
  35980. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_41_SHIFT (0x00000009u)
  35981. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_41_RESETVAL (0x00000000u)
  35982. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_42_MASK (0x00000400u)
  35983. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_42_SHIFT (0x0000000Au)
  35984. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_42_RESETVAL (0x00000000u)
  35985. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_43_MASK (0x00000800u)
  35986. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_43_SHIFT (0x0000000Bu)
  35987. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_43_RESETVAL (0x00000000u)
  35988. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_44_MASK (0x00001000u)
  35989. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_44_SHIFT (0x0000000Cu)
  35990. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_44_RESETVAL (0x00000000u)
  35991. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_45_MASK (0x00002000u)
  35992. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_45_SHIFT (0x0000000Du)
  35993. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_45_RESETVAL (0x00000000u)
  35994. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_46_MASK (0x00004000u)
  35995. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_46_SHIFT (0x0000000Eu)
  35996. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_46_RESETVAL (0x00000000u)
  35997. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_47_MASK (0x00008000u)
  35998. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_47_SHIFT (0x0000000Fu)
  35999. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_47_RESETVAL (0x00000000u)
  36000. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_48_MASK (0x00010000u)
  36001. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_48_SHIFT (0x00000010u)
  36002. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_48_RESETVAL (0x00000000u)
  36003. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_49_MASK (0x00020000u)
  36004. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_49_SHIFT (0x00000011u)
  36005. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_49_RESETVAL (0x00000000u)
  36006. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_50_MASK (0x00040000u)
  36007. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_50_SHIFT (0x00000012u)
  36008. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_50_RESETVAL (0x00000000u)
  36009. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_51_MASK (0x00080000u)
  36010. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_51_SHIFT (0x00000013u)
  36011. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_51_RESETVAL (0x00000000u)
  36012. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_52_MASK (0x00100000u)
  36013. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_52_SHIFT (0x00000014u)
  36014. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_52_RESETVAL (0x00000000u)
  36015. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_53_MASK (0x00200000u)
  36016. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_53_SHIFT (0x00000015u)
  36017. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_53_RESETVAL (0x00000000u)
  36018. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_54_MASK (0x00400000u)
  36019. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_54_SHIFT (0x00000016u)
  36020. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_54_RESETVAL (0x00000000u)
  36021. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_55_MASK (0x00800000u)
  36022. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_55_SHIFT (0x00000017u)
  36023. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_55_RESETVAL (0x00000000u)
  36024. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_56_MASK (0x01000000u)
  36025. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_56_SHIFT (0x00000018u)
  36026. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_56_RESETVAL (0x00000000u)
  36027. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_57_MASK (0x02000000u)
  36028. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_57_SHIFT (0x00000019u)
  36029. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_57_RESETVAL (0x00000000u)
  36030. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_58_MASK (0x04000000u)
  36031. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_58_SHIFT (0x0000001Au)
  36032. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_58_RESETVAL (0x00000000u)
  36033. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_59_MASK (0x08000000u)
  36034. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_59_SHIFT (0x0000001Bu)
  36035. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_59_RESETVAL (0x00000000u)
  36036. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_60_MASK (0x10000000u)
  36037. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_60_SHIFT (0x0000001Cu)
  36038. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_60_RESETVAL (0x00000000u)
  36039. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_61_MASK (0x20000000u)
  36040. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_61_SHIFT (0x0000001Du)
  36041. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_61_RESETVAL (0x00000000u)
  36042. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_62_MASK (0x40000000u)
  36043. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_62_SHIFT (0x0000001Eu)
  36044. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_62_RESETVAL (0x00000000u)
  36045. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_63_MASK (0x80000000u)
  36046. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_63_SHIFT (0x0000001Fu)
  36047. #define CSL_CPINTC_ENABLE_HINT_REG1_ENABLE_HINT_63_RESETVAL (0x00000000u)
  36048. #define CSL_CPINTC_ENABLE_HINT_REG1_RESETVAL (0x00000000u)
  36049. /* enable_hint_reg2 */
  36050. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_64_MASK (0x00000001u)
  36051. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_64_SHIFT (0x00000000u)
  36052. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_64_RESETVAL (0x00000000u)
  36053. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_65_MASK (0x00000002u)
  36054. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_65_SHIFT (0x00000001u)
  36055. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_65_RESETVAL (0x00000000u)
  36056. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_66_MASK (0x00000004u)
  36057. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_66_SHIFT (0x00000002u)
  36058. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_66_RESETVAL (0x00000000u)
  36059. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_67_MASK (0x00000008u)
  36060. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_67_SHIFT (0x00000003u)
  36061. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_67_RESETVAL (0x00000000u)
  36062. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_68_MASK (0x00000010u)
  36063. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_68_SHIFT (0x00000004u)
  36064. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_68_RESETVAL (0x00000000u)
  36065. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_69_MASK (0x00000020u)
  36066. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_69_SHIFT (0x00000005u)
  36067. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_69_RESETVAL (0x00000000u)
  36068. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_70_MASK (0x00000040u)
  36069. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_70_SHIFT (0x00000006u)
  36070. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_70_RESETVAL (0x00000000u)
  36071. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_71_MASK (0x00000080u)
  36072. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_71_SHIFT (0x00000007u)
  36073. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_71_RESETVAL (0x00000000u)
  36074. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_72_MASK (0x00000100u)
  36075. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_72_SHIFT (0x00000008u)
  36076. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_72_RESETVAL (0x00000000u)
  36077. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_73_MASK (0x00000200u)
  36078. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_73_SHIFT (0x00000009u)
  36079. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_73_RESETVAL (0x00000000u)
  36080. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_74_MASK (0x00000400u)
  36081. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_74_SHIFT (0x0000000Au)
  36082. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_74_RESETVAL (0x00000000u)
  36083. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_75_MASK (0x00000800u)
  36084. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_75_SHIFT (0x0000000Bu)
  36085. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_75_RESETVAL (0x00000000u)
  36086. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_76_MASK (0x00001000u)
  36087. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_76_SHIFT (0x0000000Cu)
  36088. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_76_RESETVAL (0x00000000u)
  36089. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_77_MASK (0x00002000u)
  36090. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_77_SHIFT (0x0000000Du)
  36091. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_77_RESETVAL (0x00000000u)
  36092. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_78_MASK (0x00004000u)
  36093. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_78_SHIFT (0x0000000Eu)
  36094. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_78_RESETVAL (0x00000000u)
  36095. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_79_MASK (0x00008000u)
  36096. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_79_SHIFT (0x0000000Fu)
  36097. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_79_RESETVAL (0x00000000u)
  36098. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_80_MASK (0x00010000u)
  36099. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_80_SHIFT (0x00000010u)
  36100. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_80_RESETVAL (0x00000000u)
  36101. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_81_MASK (0x00020000u)
  36102. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_81_SHIFT (0x00000011u)
  36103. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_81_RESETVAL (0x00000000u)
  36104. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_82_MASK (0x00040000u)
  36105. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_82_SHIFT (0x00000012u)
  36106. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_82_RESETVAL (0x00000000u)
  36107. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_83_MASK (0x00080000u)
  36108. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_83_SHIFT (0x00000013u)
  36109. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_83_RESETVAL (0x00000000u)
  36110. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_84_MASK (0x00100000u)
  36111. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_84_SHIFT (0x00000014u)
  36112. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_84_RESETVAL (0x00000000u)
  36113. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_85_MASK (0x00200000u)
  36114. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_85_SHIFT (0x00000015u)
  36115. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_85_RESETVAL (0x00000000u)
  36116. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_86_MASK (0x00400000u)
  36117. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_86_SHIFT (0x00000016u)
  36118. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_86_RESETVAL (0x00000000u)
  36119. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_87_MASK (0x00800000u)
  36120. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_87_SHIFT (0x00000017u)
  36121. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_87_RESETVAL (0x00000000u)
  36122. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_88_MASK (0x01000000u)
  36123. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_88_SHIFT (0x00000018u)
  36124. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_88_RESETVAL (0x00000000u)
  36125. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_89_MASK (0x02000000u)
  36126. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_89_SHIFT (0x00000019u)
  36127. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_89_RESETVAL (0x00000000u)
  36128. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_90_MASK (0x04000000u)
  36129. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_90_SHIFT (0x0000001Au)
  36130. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_90_RESETVAL (0x00000000u)
  36131. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_91_MASK (0x08000000u)
  36132. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_91_SHIFT (0x0000001Bu)
  36133. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_91_RESETVAL (0x00000000u)
  36134. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_92_MASK (0x10000000u)
  36135. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_92_SHIFT (0x0000001Cu)
  36136. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_92_RESETVAL (0x00000000u)
  36137. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_93_MASK (0x20000000u)
  36138. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_93_SHIFT (0x0000001Du)
  36139. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_93_RESETVAL (0x00000000u)
  36140. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_94_MASK (0x40000000u)
  36141. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_94_SHIFT (0x0000001Eu)
  36142. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_94_RESETVAL (0x00000000u)
  36143. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_95_MASK (0x80000000u)
  36144. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_95_SHIFT (0x0000001Fu)
  36145. #define CSL_CPINTC_ENABLE_HINT_REG2_ENABLE_HINT_95_RESETVAL (0x00000000u)
  36146. #define CSL_CPINTC_ENABLE_HINT_REG2_RESETVAL (0x00000000u)
  36147. /* enable_hint_reg3 */
  36148. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_96_MASK (0x00000001u)
  36149. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_96_SHIFT (0x00000000u)
  36150. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_96_RESETVAL (0x00000000u)
  36151. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_97_MASK (0x00000002u)
  36152. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_97_SHIFT (0x00000001u)
  36153. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_97_RESETVAL (0x00000000u)
  36154. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_98_MASK (0x00000004u)
  36155. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_98_SHIFT (0x00000002u)
  36156. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_98_RESETVAL (0x00000000u)
  36157. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_99_MASK (0x00000008u)
  36158. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_99_SHIFT (0x00000003u)
  36159. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_99_RESETVAL (0x00000000u)
  36160. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_100_MASK (0x00000010u)
  36161. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_100_SHIFT (0x00000004u)
  36162. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_100_RESETVAL (0x00000000u)
  36163. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_101_MASK (0x00000020u)
  36164. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_101_SHIFT (0x00000005u)
  36165. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_101_RESETVAL (0x00000000u)
  36166. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_102_MASK (0x00000040u)
  36167. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_102_SHIFT (0x00000006u)
  36168. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_102_RESETVAL (0x00000000u)
  36169. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_103_MASK (0x00000080u)
  36170. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_103_SHIFT (0x00000007u)
  36171. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_103_RESETVAL (0x00000000u)
  36172. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_104_MASK (0x00000100u)
  36173. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_104_SHIFT (0x00000008u)
  36174. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_104_RESETVAL (0x00000000u)
  36175. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_105_MASK (0x00000200u)
  36176. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_105_SHIFT (0x00000009u)
  36177. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_105_RESETVAL (0x00000000u)
  36178. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_106_MASK (0x00000400u)
  36179. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_106_SHIFT (0x0000000Au)
  36180. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_106_RESETVAL (0x00000000u)
  36181. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_107_MASK (0x00000800u)
  36182. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_107_SHIFT (0x0000000Bu)
  36183. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_107_RESETVAL (0x00000000u)
  36184. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_108_MASK (0x00001000u)
  36185. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_108_SHIFT (0x0000000Cu)
  36186. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_108_RESETVAL (0x00000000u)
  36187. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_109_MASK (0x00002000u)
  36188. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_109_SHIFT (0x0000000Du)
  36189. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_109_RESETVAL (0x00000000u)
  36190. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_110_MASK (0x00004000u)
  36191. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_110_SHIFT (0x0000000Eu)
  36192. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_110_RESETVAL (0x00000000u)
  36193. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_111_MASK (0x00008000u)
  36194. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_111_SHIFT (0x0000000Fu)
  36195. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_111_RESETVAL (0x00000000u)
  36196. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_112_MASK (0x00010000u)
  36197. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_112_SHIFT (0x00000010u)
  36198. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_112_RESETVAL (0x00000000u)
  36199. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_113_MASK (0x00020000u)
  36200. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_113_SHIFT (0x00000011u)
  36201. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_113_RESETVAL (0x00000000u)
  36202. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_114_MASK (0x00040000u)
  36203. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_114_SHIFT (0x00000012u)
  36204. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_114_RESETVAL (0x00000000u)
  36205. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_115_MASK (0x00080000u)
  36206. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_115_SHIFT (0x00000013u)
  36207. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_115_RESETVAL (0x00000000u)
  36208. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_116_MASK (0x00100000u)
  36209. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_116_SHIFT (0x00000014u)
  36210. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_116_RESETVAL (0x00000000u)
  36211. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_117_MASK (0x00200000u)
  36212. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_117_SHIFT (0x00000015u)
  36213. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_117_RESETVAL (0x00000000u)
  36214. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_118_MASK (0x00400000u)
  36215. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_118_SHIFT (0x00000016u)
  36216. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_118_RESETVAL (0x00000000u)
  36217. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_119_MASK (0x00800000u)
  36218. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_119_SHIFT (0x00000017u)
  36219. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_119_RESETVAL (0x00000000u)
  36220. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_120_MASK (0x01000000u)
  36221. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_120_SHIFT (0x00000018u)
  36222. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_120_RESETVAL (0x00000000u)
  36223. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_121_MASK (0x02000000u)
  36224. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_121_SHIFT (0x00000019u)
  36225. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_121_RESETVAL (0x00000000u)
  36226. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_122_MASK (0x04000000u)
  36227. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_122_SHIFT (0x0000001Au)
  36228. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_122_RESETVAL (0x00000000u)
  36229. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_123_MASK (0x08000000u)
  36230. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_123_SHIFT (0x0000001Bu)
  36231. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_123_RESETVAL (0x00000000u)
  36232. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_124_MASK (0x10000000u)
  36233. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_124_SHIFT (0x0000001Cu)
  36234. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_124_RESETVAL (0x00000000u)
  36235. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_125_MASK (0x20000000u)
  36236. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_125_SHIFT (0x0000001Du)
  36237. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_125_RESETVAL (0x00000000u)
  36238. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_126_MASK (0x40000000u)
  36239. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_126_SHIFT (0x0000001Eu)
  36240. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_126_RESETVAL (0x00000000u)
  36241. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_127_MASK (0x80000000u)
  36242. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_127_SHIFT (0x0000001Fu)
  36243. #define CSL_CPINTC_ENABLE_HINT_REG3_ENABLE_HINT_127_RESETVAL (0x00000000u)
  36244. #define CSL_CPINTC_ENABLE_HINT_REG3_RESETVAL (0x00000000u)
  36245. /* enable_hint_reg4 */
  36246. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_128_MASK (0x00000001u)
  36247. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_128_SHIFT (0x00000000u)
  36248. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_128_RESETVAL (0x00000000u)
  36249. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_129_MASK (0x00000002u)
  36250. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_129_SHIFT (0x00000001u)
  36251. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_129_RESETVAL (0x00000000u)
  36252. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_130_MASK (0x00000004u)
  36253. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_130_SHIFT (0x00000002u)
  36254. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_130_RESETVAL (0x00000000u)
  36255. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_131_MASK (0x00000008u)
  36256. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_131_SHIFT (0x00000003u)
  36257. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_131_RESETVAL (0x00000000u)
  36258. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_132_MASK (0x00000010u)
  36259. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_132_SHIFT (0x00000004u)
  36260. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_132_RESETVAL (0x00000000u)
  36261. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_133_MASK (0x00000020u)
  36262. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_133_SHIFT (0x00000005u)
  36263. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_133_RESETVAL (0x00000000u)
  36264. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_134_MASK (0x00000040u)
  36265. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_134_SHIFT (0x00000006u)
  36266. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_134_RESETVAL (0x00000000u)
  36267. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_135_MASK (0x00000080u)
  36268. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_135_SHIFT (0x00000007u)
  36269. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_135_RESETVAL (0x00000000u)
  36270. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_136_MASK (0x00000100u)
  36271. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_136_SHIFT (0x00000008u)
  36272. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_136_RESETVAL (0x00000000u)
  36273. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_137_MASK (0x00000200u)
  36274. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_137_SHIFT (0x00000009u)
  36275. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_137_RESETVAL (0x00000000u)
  36276. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_138_MASK (0x00000400u)
  36277. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_138_SHIFT (0x0000000Au)
  36278. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_138_RESETVAL (0x00000000u)
  36279. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_139_MASK (0x00000800u)
  36280. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_139_SHIFT (0x0000000Bu)
  36281. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_139_RESETVAL (0x00000000u)
  36282. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_140_MASK (0x00001000u)
  36283. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_140_SHIFT (0x0000000Cu)
  36284. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_140_RESETVAL (0x00000000u)
  36285. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_141_MASK (0x00002000u)
  36286. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_141_SHIFT (0x0000000Du)
  36287. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_141_RESETVAL (0x00000000u)
  36288. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_142_MASK (0x00004000u)
  36289. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_142_SHIFT (0x0000000Eu)
  36290. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_142_RESETVAL (0x00000000u)
  36291. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_143_MASK (0x00008000u)
  36292. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_143_SHIFT (0x0000000Fu)
  36293. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_143_RESETVAL (0x00000000u)
  36294. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_144_MASK (0x00010000u)
  36295. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_144_SHIFT (0x00000010u)
  36296. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_144_RESETVAL (0x00000000u)
  36297. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_145_MASK (0x00020000u)
  36298. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_145_SHIFT (0x00000011u)
  36299. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_145_RESETVAL (0x00000000u)
  36300. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_146_MASK (0x00040000u)
  36301. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_146_SHIFT (0x00000012u)
  36302. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_146_RESETVAL (0x00000000u)
  36303. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_147_MASK (0x00080000u)
  36304. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_147_SHIFT (0x00000013u)
  36305. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_147_RESETVAL (0x00000000u)
  36306. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_148_MASK (0x00100000u)
  36307. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_148_SHIFT (0x00000014u)
  36308. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_148_RESETVAL (0x00000000u)
  36309. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_149_MASK (0x00200000u)
  36310. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_149_SHIFT (0x00000015u)
  36311. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_149_RESETVAL (0x00000000u)
  36312. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_150_MASK (0x00400000u)
  36313. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_150_SHIFT (0x00000016u)
  36314. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_150_RESETVAL (0x00000000u)
  36315. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_151_MASK (0x00800000u)
  36316. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_151_SHIFT (0x00000017u)
  36317. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_151_RESETVAL (0x00000000u)
  36318. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_152_MASK (0x01000000u)
  36319. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_152_SHIFT (0x00000018u)
  36320. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_152_RESETVAL (0x00000000u)
  36321. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_153_MASK (0x02000000u)
  36322. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_153_SHIFT (0x00000019u)
  36323. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_153_RESETVAL (0x00000000u)
  36324. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_154_MASK (0x04000000u)
  36325. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_154_SHIFT (0x0000001Au)
  36326. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_154_RESETVAL (0x00000000u)
  36327. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_155_MASK (0x08000000u)
  36328. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_155_SHIFT (0x0000001Bu)
  36329. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_155_RESETVAL (0x00000000u)
  36330. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_156_MASK (0x10000000u)
  36331. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_156_SHIFT (0x0000001Cu)
  36332. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_156_RESETVAL (0x00000000u)
  36333. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_157_MASK (0x20000000u)
  36334. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_157_SHIFT (0x0000001Du)
  36335. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_157_RESETVAL (0x00000000u)
  36336. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_158_MASK (0x40000000u)
  36337. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_158_SHIFT (0x0000001Eu)
  36338. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_158_RESETVAL (0x00000000u)
  36339. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_159_MASK (0x80000000u)
  36340. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_159_SHIFT (0x0000001Fu)
  36341. #define CSL_CPINTC_ENABLE_HINT_REG4_ENABLE_HINT_159_RESETVAL (0x00000000u)
  36342. #define CSL_CPINTC_ENABLE_HINT_REG4_RESETVAL (0x00000000u)
  36343. /* enable_hint_reg5 */
  36344. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_160_MASK (0x00000001u)
  36345. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_160_SHIFT (0x00000000u)
  36346. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_160_RESETVAL (0x00000000u)
  36347. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_161_MASK (0x00000002u)
  36348. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_161_SHIFT (0x00000001u)
  36349. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_161_RESETVAL (0x00000000u)
  36350. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_162_MASK (0x00000004u)
  36351. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_162_SHIFT (0x00000002u)
  36352. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_162_RESETVAL (0x00000000u)
  36353. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_163_MASK (0x00000008u)
  36354. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_163_SHIFT (0x00000003u)
  36355. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_163_RESETVAL (0x00000000u)
  36356. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_164_MASK (0x00000010u)
  36357. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_164_SHIFT (0x00000004u)
  36358. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_164_RESETVAL (0x00000000u)
  36359. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_165_MASK (0x00000020u)
  36360. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_165_SHIFT (0x00000005u)
  36361. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_165_RESETVAL (0x00000000u)
  36362. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_166_MASK (0x00000040u)
  36363. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_166_SHIFT (0x00000006u)
  36364. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_166_RESETVAL (0x00000000u)
  36365. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_167_MASK (0x00000080u)
  36366. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_167_SHIFT (0x00000007u)
  36367. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_167_RESETVAL (0x00000000u)
  36368. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_168_MASK (0x00000100u)
  36369. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_168_SHIFT (0x00000008u)
  36370. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_168_RESETVAL (0x00000000u)
  36371. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_169_MASK (0x00000200u)
  36372. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_169_SHIFT (0x00000009u)
  36373. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_169_RESETVAL (0x00000000u)
  36374. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_170_MASK (0x00000400u)
  36375. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_170_SHIFT (0x0000000Au)
  36376. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_170_RESETVAL (0x00000000u)
  36377. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_171_MASK (0x00000800u)
  36378. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_171_SHIFT (0x0000000Bu)
  36379. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_171_RESETVAL (0x00000000u)
  36380. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_172_MASK (0x00001000u)
  36381. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_172_SHIFT (0x0000000Cu)
  36382. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_172_RESETVAL (0x00000000u)
  36383. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_173_MASK (0x00002000u)
  36384. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_173_SHIFT (0x0000000Du)
  36385. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_173_RESETVAL (0x00000000u)
  36386. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_174_MASK (0x00004000u)
  36387. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_174_SHIFT (0x0000000Eu)
  36388. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_174_RESETVAL (0x00000000u)
  36389. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_175_MASK (0x00008000u)
  36390. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_175_SHIFT (0x0000000Fu)
  36391. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_175_RESETVAL (0x00000000u)
  36392. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_176_MASK (0x00010000u)
  36393. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_176_SHIFT (0x00000010u)
  36394. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_176_RESETVAL (0x00000000u)
  36395. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_177_MASK (0x00020000u)
  36396. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_177_SHIFT (0x00000011u)
  36397. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_177_RESETVAL (0x00000000u)
  36398. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_178_MASK (0x00040000u)
  36399. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_178_SHIFT (0x00000012u)
  36400. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_178_RESETVAL (0x00000000u)
  36401. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_179_MASK (0x00080000u)
  36402. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_179_SHIFT (0x00000013u)
  36403. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_179_RESETVAL (0x00000000u)
  36404. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_180_MASK (0x00100000u)
  36405. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_180_SHIFT (0x00000014u)
  36406. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_180_RESETVAL (0x00000000u)
  36407. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_181_MASK (0x00200000u)
  36408. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_181_SHIFT (0x00000015u)
  36409. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_181_RESETVAL (0x00000000u)
  36410. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_182_MASK (0x00400000u)
  36411. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_182_SHIFT (0x00000016u)
  36412. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_182_RESETVAL (0x00000000u)
  36413. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_183_MASK (0x00800000u)
  36414. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_183_SHIFT (0x00000017u)
  36415. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_183_RESETVAL (0x00000000u)
  36416. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_184_MASK (0x01000000u)
  36417. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_184_SHIFT (0x00000018u)
  36418. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_184_RESETVAL (0x00000000u)
  36419. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_185_MASK (0x02000000u)
  36420. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_185_SHIFT (0x00000019u)
  36421. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_185_RESETVAL (0x00000000u)
  36422. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_186_MASK (0x04000000u)
  36423. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_186_SHIFT (0x0000001Au)
  36424. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_186_RESETVAL (0x00000000u)
  36425. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_187_MASK (0x08000000u)
  36426. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_187_SHIFT (0x0000001Bu)
  36427. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_187_RESETVAL (0x00000000u)
  36428. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_188_MASK (0x10000000u)
  36429. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_188_SHIFT (0x0000001Cu)
  36430. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_188_RESETVAL (0x00000000u)
  36431. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_189_MASK (0x20000000u)
  36432. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_189_SHIFT (0x0000001Du)
  36433. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_189_RESETVAL (0x00000000u)
  36434. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_190_MASK (0x40000000u)
  36435. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_190_SHIFT (0x0000001Eu)
  36436. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_190_RESETVAL (0x00000000u)
  36437. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_191_MASK (0x80000000u)
  36438. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_191_SHIFT (0x0000001Fu)
  36439. #define CSL_CPINTC_ENABLE_HINT_REG5_ENABLE_HINT_191_RESETVAL (0x00000000u)
  36440. #define CSL_CPINTC_ENABLE_HINT_REG5_RESETVAL (0x00000000u)
  36441. /* enable_hint_reg6 */
  36442. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_192_MASK (0x00000001u)
  36443. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_192_SHIFT (0x00000000u)
  36444. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_192_RESETVAL (0x00000000u)
  36445. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_193_MASK (0x00000002u)
  36446. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_193_SHIFT (0x00000001u)
  36447. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_193_RESETVAL (0x00000000u)
  36448. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_194_MASK (0x00000004u)
  36449. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_194_SHIFT (0x00000002u)
  36450. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_194_RESETVAL (0x00000000u)
  36451. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_195_MASK (0x00000008u)
  36452. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_195_SHIFT (0x00000003u)
  36453. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_195_RESETVAL (0x00000000u)
  36454. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_196_MASK (0x00000010u)
  36455. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_196_SHIFT (0x00000004u)
  36456. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_196_RESETVAL (0x00000000u)
  36457. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_197_MASK (0x00000020u)
  36458. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_197_SHIFT (0x00000005u)
  36459. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_197_RESETVAL (0x00000000u)
  36460. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_198_MASK (0x00000040u)
  36461. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_198_SHIFT (0x00000006u)
  36462. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_198_RESETVAL (0x00000000u)
  36463. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_199_MASK (0x00000080u)
  36464. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_199_SHIFT (0x00000007u)
  36465. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_199_RESETVAL (0x00000000u)
  36466. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_200_MASK (0x00000100u)
  36467. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_200_SHIFT (0x00000008u)
  36468. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_200_RESETVAL (0x00000000u)
  36469. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_201_MASK (0x00000200u)
  36470. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_201_SHIFT (0x00000009u)
  36471. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_201_RESETVAL (0x00000000u)
  36472. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_202_MASK (0x00000400u)
  36473. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_202_SHIFT (0x0000000Au)
  36474. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_202_RESETVAL (0x00000000u)
  36475. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_203_MASK (0x00000800u)
  36476. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_203_SHIFT (0x0000000Bu)
  36477. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_203_RESETVAL (0x00000000u)
  36478. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_204_MASK (0x00001000u)
  36479. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_204_SHIFT (0x0000000Cu)
  36480. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_204_RESETVAL (0x00000000u)
  36481. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_205_MASK (0x00002000u)
  36482. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_205_SHIFT (0x0000000Du)
  36483. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_205_RESETVAL (0x00000000u)
  36484. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_206_MASK (0x00004000u)
  36485. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_206_SHIFT (0x0000000Eu)
  36486. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_206_RESETVAL (0x00000000u)
  36487. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_207_MASK (0x00008000u)
  36488. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_207_SHIFT (0x0000000Fu)
  36489. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_207_RESETVAL (0x00000000u)
  36490. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_208_MASK (0x00010000u)
  36491. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_208_SHIFT (0x00000010u)
  36492. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_208_RESETVAL (0x00000000u)
  36493. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_209_MASK (0x00020000u)
  36494. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_209_SHIFT (0x00000011u)
  36495. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_209_RESETVAL (0x00000000u)
  36496. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_210_MASK (0x00040000u)
  36497. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_210_SHIFT (0x00000012u)
  36498. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_210_RESETVAL (0x00000000u)
  36499. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_211_MASK (0x00080000u)
  36500. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_211_SHIFT (0x00000013u)
  36501. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_211_RESETVAL (0x00000000u)
  36502. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_212_MASK (0x00100000u)
  36503. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_212_SHIFT (0x00000014u)
  36504. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_212_RESETVAL (0x00000000u)
  36505. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_213_MASK (0x00200000u)
  36506. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_213_SHIFT (0x00000015u)
  36507. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_213_RESETVAL (0x00000000u)
  36508. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_214_MASK (0x00400000u)
  36509. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_214_SHIFT (0x00000016u)
  36510. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_214_RESETVAL (0x00000000u)
  36511. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_215_MASK (0x00800000u)
  36512. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_215_SHIFT (0x00000017u)
  36513. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_215_RESETVAL (0x00000000u)
  36514. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_216_MASK (0x01000000u)
  36515. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_216_SHIFT (0x00000018u)
  36516. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_216_RESETVAL (0x00000000u)
  36517. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_217_MASK (0x02000000u)
  36518. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_217_SHIFT (0x00000019u)
  36519. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_217_RESETVAL (0x00000000u)
  36520. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_218_MASK (0x04000000u)
  36521. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_218_SHIFT (0x0000001Au)
  36522. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_218_RESETVAL (0x00000000u)
  36523. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_219_MASK (0x08000000u)
  36524. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_219_SHIFT (0x0000001Bu)
  36525. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_219_RESETVAL (0x00000000u)
  36526. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_220_MASK (0x10000000u)
  36527. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_220_SHIFT (0x0000001Cu)
  36528. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_220_RESETVAL (0x00000000u)
  36529. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_221_MASK (0x20000000u)
  36530. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_221_SHIFT (0x0000001Du)
  36531. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_221_RESETVAL (0x00000000u)
  36532. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_222_MASK (0x40000000u)
  36533. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_222_SHIFT (0x0000001Eu)
  36534. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_222_RESETVAL (0x00000000u)
  36535. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_223_MASK (0x80000000u)
  36536. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_223_SHIFT (0x0000001Fu)
  36537. #define CSL_CPINTC_ENABLE_HINT_REG6_ENABLE_HINT_223_RESETVAL (0x00000000u)
  36538. #define CSL_CPINTC_ENABLE_HINT_REG6_RESETVAL (0x00000000u)
  36539. /* enable_hint_reg7 */
  36540. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_224_MASK (0x00000001u)
  36541. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_224_SHIFT (0x00000000u)
  36542. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_224_RESETVAL (0x00000000u)
  36543. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_225_MASK (0x00000002u)
  36544. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_225_SHIFT (0x00000001u)
  36545. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_225_RESETVAL (0x00000000u)
  36546. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_226_MASK (0x00000004u)
  36547. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_226_SHIFT (0x00000002u)
  36548. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_226_RESETVAL (0x00000000u)
  36549. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_227_MASK (0x00000008u)
  36550. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_227_SHIFT (0x00000003u)
  36551. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_227_RESETVAL (0x00000000u)
  36552. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_228_MASK (0x00000010u)
  36553. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_228_SHIFT (0x00000004u)
  36554. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_228_RESETVAL (0x00000000u)
  36555. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_229_MASK (0x00000020u)
  36556. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_229_SHIFT (0x00000005u)
  36557. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_229_RESETVAL (0x00000000u)
  36558. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_230_MASK (0x00000040u)
  36559. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_230_SHIFT (0x00000006u)
  36560. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_230_RESETVAL (0x00000000u)
  36561. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_231_MASK (0x00000080u)
  36562. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_231_SHIFT (0x00000007u)
  36563. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_231_RESETVAL (0x00000000u)
  36564. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_232_MASK (0x00000100u)
  36565. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_232_SHIFT (0x00000008u)
  36566. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_232_RESETVAL (0x00000000u)
  36567. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_233_MASK (0x00000200u)
  36568. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_233_SHIFT (0x00000009u)
  36569. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_233_RESETVAL (0x00000000u)
  36570. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_234_MASK (0x00000400u)
  36571. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_234_SHIFT (0x0000000Au)
  36572. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_234_RESETVAL (0x00000000u)
  36573. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_235_MASK (0x00000800u)
  36574. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_235_SHIFT (0x0000000Bu)
  36575. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_235_RESETVAL (0x00000000u)
  36576. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_236_MASK (0x00001000u)
  36577. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_236_SHIFT (0x0000000Cu)
  36578. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_236_RESETVAL (0x00000000u)
  36579. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_237_MASK (0x00002000u)
  36580. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_237_SHIFT (0x0000000Du)
  36581. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_237_RESETVAL (0x00000000u)
  36582. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_238_MASK (0x00004000u)
  36583. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_238_SHIFT (0x0000000Eu)
  36584. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_238_RESETVAL (0x00000000u)
  36585. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_239_MASK (0x00008000u)
  36586. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_239_SHIFT (0x0000000Fu)
  36587. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_239_RESETVAL (0x00000000u)
  36588. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_240_MASK (0x00010000u)
  36589. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_240_SHIFT (0x00000010u)
  36590. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_240_RESETVAL (0x00000000u)
  36591. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_241_MASK (0x00020000u)
  36592. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_241_SHIFT (0x00000011u)
  36593. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_241_RESETVAL (0x00000000u)
  36594. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_242_MASK (0x00040000u)
  36595. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_242_SHIFT (0x00000012u)
  36596. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_242_RESETVAL (0x00000000u)
  36597. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_243_MASK (0x00080000u)
  36598. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_243_SHIFT (0x00000013u)
  36599. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_243_RESETVAL (0x00000000u)
  36600. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_244_MASK (0x00100000u)
  36601. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_244_SHIFT (0x00000014u)
  36602. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_244_RESETVAL (0x00000000u)
  36603. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_245_MASK (0x00200000u)
  36604. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_245_SHIFT (0x00000015u)
  36605. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_245_RESETVAL (0x00000000u)
  36606. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_246_MASK (0x00400000u)
  36607. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_246_SHIFT (0x00000016u)
  36608. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_246_RESETVAL (0x00000000u)
  36609. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_247_MASK (0x00800000u)
  36610. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_247_SHIFT (0x00000017u)
  36611. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_247_RESETVAL (0x00000000u)
  36612. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_248_MASK (0x01000000u)
  36613. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_248_SHIFT (0x00000018u)
  36614. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_248_RESETVAL (0x00000000u)
  36615. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_249_MASK (0x02000000u)
  36616. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_249_SHIFT (0x00000019u)
  36617. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_249_RESETVAL (0x00000000u)
  36618. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_250_MASK (0x04000000u)
  36619. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_250_SHIFT (0x0000001Au)
  36620. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_250_RESETVAL (0x00000000u)
  36621. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_251_MASK (0x08000000u)
  36622. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_251_SHIFT (0x0000001Bu)
  36623. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_251_RESETVAL (0x00000000u)
  36624. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_252_MASK (0x10000000u)
  36625. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_252_SHIFT (0x0000001Cu)
  36626. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_252_RESETVAL (0x00000000u)
  36627. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_253_MASK (0x20000000u)
  36628. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_253_SHIFT (0x0000001Du)
  36629. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_253_RESETVAL (0x00000000u)
  36630. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_254_MASK (0x40000000u)
  36631. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_254_SHIFT (0x0000001Eu)
  36632. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_254_RESETVAL (0x00000000u)
  36633. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_255_MASK (0x80000000u)
  36634. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_255_SHIFT (0x0000001Fu)
  36635. #define CSL_CPINTC_ENABLE_HINT_REG7_ENABLE_HINT_255_RESETVAL (0x00000000u)
  36636. #define CSL_CPINTC_ENABLE_HINT_REG7_RESETVAL (0x00000000u)
  36637. /* vector_address_reg_0 */
  36638. #define CSL_CPINTC_VECTOR_ADDRESS_REG_0_VECTOR_ADDRESS_0_MASK (0xFFFFFFFFu)
  36639. #define CSL_CPINTC_VECTOR_ADDRESS_REG_0_VECTOR_ADDRESS_0_SHIFT (0x00000000u)
  36640. #define CSL_CPINTC_VECTOR_ADDRESS_REG_0_VECTOR_ADDRESS_0_RESETVAL (0x00000000u)
  36641. #define CSL_CPINTC_VECTOR_ADDRESS_REG_0_RESETVAL (0x00000000u)
  36642. /* vector_address_reg_1 */
  36643. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1_VECTOR_ADDRESS_1_MASK (0xFFFFFFFFu)
  36644. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1_VECTOR_ADDRESS_1_SHIFT (0x00000000u)
  36645. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1_VECTOR_ADDRESS_1_RESETVAL (0x00000000u)
  36646. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1_RESETVAL (0x00000000u)
  36647. /* vector_address_reg_2 */
  36648. #define CSL_CPINTC_VECTOR_ADDRESS_REG_2_VECTOR_ADDRESS_2_MASK (0xFFFFFFFFu)
  36649. #define CSL_CPINTC_VECTOR_ADDRESS_REG_2_VECTOR_ADDRESS_2_SHIFT (0x00000000u)
  36650. #define CSL_CPINTC_VECTOR_ADDRESS_REG_2_VECTOR_ADDRESS_2_RESETVAL (0x00000000u)
  36651. #define CSL_CPINTC_VECTOR_ADDRESS_REG_2_RESETVAL (0x00000000u)
  36652. /* vector_address_reg_3 */
  36653. #define CSL_CPINTC_VECTOR_ADDRESS_REG_3_VECTOR_ADDRESS_3_MASK (0xFFFFFFFFu)
  36654. #define CSL_CPINTC_VECTOR_ADDRESS_REG_3_VECTOR_ADDRESS_3_SHIFT (0x00000000u)
  36655. #define CSL_CPINTC_VECTOR_ADDRESS_REG_3_VECTOR_ADDRESS_3_RESETVAL (0x00000000u)
  36656. #define CSL_CPINTC_VECTOR_ADDRESS_REG_3_RESETVAL (0x00000000u)
  36657. /* vector_address_reg_4 */
  36658. #define CSL_CPINTC_VECTOR_ADDRESS_REG_4_VECTOR_ADDRESS_4_MASK (0xFFFFFFFFu)
  36659. #define CSL_CPINTC_VECTOR_ADDRESS_REG_4_VECTOR_ADDRESS_4_SHIFT (0x00000000u)
  36660. #define CSL_CPINTC_VECTOR_ADDRESS_REG_4_VECTOR_ADDRESS_4_RESETVAL (0x00000000u)
  36661. #define CSL_CPINTC_VECTOR_ADDRESS_REG_4_RESETVAL (0x00000000u)
  36662. /* vector_address_reg_5 */
  36663. #define CSL_CPINTC_VECTOR_ADDRESS_REG_5_VECTOR_ADDRESS_5_MASK (0xFFFFFFFFu)
  36664. #define CSL_CPINTC_VECTOR_ADDRESS_REG_5_VECTOR_ADDRESS_5_SHIFT (0x00000000u)
  36665. #define CSL_CPINTC_VECTOR_ADDRESS_REG_5_VECTOR_ADDRESS_5_RESETVAL (0x00000000u)
  36666. #define CSL_CPINTC_VECTOR_ADDRESS_REG_5_RESETVAL (0x00000000u)
  36667. /* vector_address_reg_6 */
  36668. #define CSL_CPINTC_VECTOR_ADDRESS_REG_6_VECTOR_ADDRESS_6_MASK (0xFFFFFFFFu)
  36669. #define CSL_CPINTC_VECTOR_ADDRESS_REG_6_VECTOR_ADDRESS_6_SHIFT (0x00000000u)
  36670. #define CSL_CPINTC_VECTOR_ADDRESS_REG_6_VECTOR_ADDRESS_6_RESETVAL (0x00000000u)
  36671. #define CSL_CPINTC_VECTOR_ADDRESS_REG_6_RESETVAL (0x00000000u)
  36672. /* vector_address_reg_7 */
  36673. #define CSL_CPINTC_VECTOR_ADDRESS_REG_7_VECTOR_ADDRESS_7_MASK (0xFFFFFFFFu)
  36674. #define CSL_CPINTC_VECTOR_ADDRESS_REG_7_VECTOR_ADDRESS_7_SHIFT (0x00000000u)
  36675. #define CSL_CPINTC_VECTOR_ADDRESS_REG_7_VECTOR_ADDRESS_7_RESETVAL (0x00000000u)
  36676. #define CSL_CPINTC_VECTOR_ADDRESS_REG_7_RESETVAL (0x00000000u)
  36677. /* vector_address_reg_8 */
  36678. #define CSL_CPINTC_VECTOR_ADDRESS_REG_8_VECTOR_ADDRESS_8_MASK (0xFFFFFFFFu)
  36679. #define CSL_CPINTC_VECTOR_ADDRESS_REG_8_VECTOR_ADDRESS_8_SHIFT (0x00000000u)
  36680. #define CSL_CPINTC_VECTOR_ADDRESS_REG_8_VECTOR_ADDRESS_8_RESETVAL (0x00000000u)
  36681. #define CSL_CPINTC_VECTOR_ADDRESS_REG_8_RESETVAL (0x00000000u)
  36682. /* vector_address_reg_9 */
  36683. #define CSL_CPINTC_VECTOR_ADDRESS_REG_9_VECTOR_ADDRESS_9_MASK (0xFFFFFFFFu)
  36684. #define CSL_CPINTC_VECTOR_ADDRESS_REG_9_VECTOR_ADDRESS_9_SHIFT (0x00000000u)
  36685. #define CSL_CPINTC_VECTOR_ADDRESS_REG_9_VECTOR_ADDRESS_9_RESETVAL (0x00000000u)
  36686. #define CSL_CPINTC_VECTOR_ADDRESS_REG_9_RESETVAL (0x00000000u)
  36687. /* vector_address_reg_10 */
  36688. #define CSL_CPINTC_VECTOR_ADDRESS_REG_10_VECTOR_ADDRESS_10_MASK (0xFFFFFFFFu)
  36689. #define CSL_CPINTC_VECTOR_ADDRESS_REG_10_VECTOR_ADDRESS_10_SHIFT (0x00000000u)
  36690. #define CSL_CPINTC_VECTOR_ADDRESS_REG_10_VECTOR_ADDRESS_10_RESETVAL (0x00000000u)
  36691. #define CSL_CPINTC_VECTOR_ADDRESS_REG_10_RESETVAL (0x00000000u)
  36692. /* vector_address_reg_11 */
  36693. #define CSL_CPINTC_VECTOR_ADDRESS_REG_11_VECTOR_ADDRESS_11_MASK (0xFFFFFFFFu)
  36694. #define CSL_CPINTC_VECTOR_ADDRESS_REG_11_VECTOR_ADDRESS_11_SHIFT (0x00000000u)
  36695. #define CSL_CPINTC_VECTOR_ADDRESS_REG_11_VECTOR_ADDRESS_11_RESETVAL (0x00000000u)
  36696. #define CSL_CPINTC_VECTOR_ADDRESS_REG_11_RESETVAL (0x00000000u)
  36697. /* vector_address_reg_12 */
  36698. #define CSL_CPINTC_VECTOR_ADDRESS_REG_12_VECTOR_ADDRESS_12_MASK (0xFFFFFFFFu)
  36699. #define CSL_CPINTC_VECTOR_ADDRESS_REG_12_VECTOR_ADDRESS_12_SHIFT (0x00000000u)
  36700. #define CSL_CPINTC_VECTOR_ADDRESS_REG_12_VECTOR_ADDRESS_12_RESETVAL (0x00000000u)
  36701. #define CSL_CPINTC_VECTOR_ADDRESS_REG_12_RESETVAL (0x00000000u)
  36702. /* vector_address_reg_13 */
  36703. #define CSL_CPINTC_VECTOR_ADDRESS_REG_13_VECTOR_ADDRESS_13_MASK (0xFFFFFFFFu)
  36704. #define CSL_CPINTC_VECTOR_ADDRESS_REG_13_VECTOR_ADDRESS_13_SHIFT (0x00000000u)
  36705. #define CSL_CPINTC_VECTOR_ADDRESS_REG_13_VECTOR_ADDRESS_13_RESETVAL (0x00000000u)
  36706. #define CSL_CPINTC_VECTOR_ADDRESS_REG_13_RESETVAL (0x00000000u)
  36707. /* vector_address_reg_14 */
  36708. #define CSL_CPINTC_VECTOR_ADDRESS_REG_14_VECTOR_ADDRESS_14_MASK (0xFFFFFFFFu)
  36709. #define CSL_CPINTC_VECTOR_ADDRESS_REG_14_VECTOR_ADDRESS_14_SHIFT (0x00000000u)
  36710. #define CSL_CPINTC_VECTOR_ADDRESS_REG_14_VECTOR_ADDRESS_14_RESETVAL (0x00000000u)
  36711. #define CSL_CPINTC_VECTOR_ADDRESS_REG_14_RESETVAL (0x00000000u)
  36712. /* vector_address_reg_15 */
  36713. #define CSL_CPINTC_VECTOR_ADDRESS_REG_15_VECTOR_ADDRESS_15_MASK (0xFFFFFFFFu)
  36714. #define CSL_CPINTC_VECTOR_ADDRESS_REG_15_VECTOR_ADDRESS_15_SHIFT (0x00000000u)
  36715. #define CSL_CPINTC_VECTOR_ADDRESS_REG_15_VECTOR_ADDRESS_15_RESETVAL (0x00000000u)
  36716. #define CSL_CPINTC_VECTOR_ADDRESS_REG_15_RESETVAL (0x00000000u)
  36717. /* vector_address_reg_16 */
  36718. #define CSL_CPINTC_VECTOR_ADDRESS_REG_16_VECTOR_ADDRESS_16_MASK (0xFFFFFFFFu)
  36719. #define CSL_CPINTC_VECTOR_ADDRESS_REG_16_VECTOR_ADDRESS_16_SHIFT (0x00000000u)
  36720. #define CSL_CPINTC_VECTOR_ADDRESS_REG_16_VECTOR_ADDRESS_16_RESETVAL (0x00000000u)
  36721. #define CSL_CPINTC_VECTOR_ADDRESS_REG_16_RESETVAL (0x00000000u)
  36722. /* vector_address_reg_17 */
  36723. #define CSL_CPINTC_VECTOR_ADDRESS_REG_17_VECTOR_ADDRESS_17_MASK (0xFFFFFFFFu)
  36724. #define CSL_CPINTC_VECTOR_ADDRESS_REG_17_VECTOR_ADDRESS_17_SHIFT (0x00000000u)
  36725. #define CSL_CPINTC_VECTOR_ADDRESS_REG_17_VECTOR_ADDRESS_17_RESETVAL (0x00000000u)
  36726. #define CSL_CPINTC_VECTOR_ADDRESS_REG_17_RESETVAL (0x00000000u)
  36727. /* vector_address_reg_18 */
  36728. #define CSL_CPINTC_VECTOR_ADDRESS_REG_18_VECTOR_ADDRESS_18_MASK (0xFFFFFFFFu)
  36729. #define CSL_CPINTC_VECTOR_ADDRESS_REG_18_VECTOR_ADDRESS_18_SHIFT (0x00000000u)
  36730. #define CSL_CPINTC_VECTOR_ADDRESS_REG_18_VECTOR_ADDRESS_18_RESETVAL (0x00000000u)
  36731. #define CSL_CPINTC_VECTOR_ADDRESS_REG_18_RESETVAL (0x00000000u)
  36732. /* vector_address_reg_19 */
  36733. #define CSL_CPINTC_VECTOR_ADDRESS_REG_19_VECTOR_ADDRESS_19_MASK (0xFFFFFFFFu)
  36734. #define CSL_CPINTC_VECTOR_ADDRESS_REG_19_VECTOR_ADDRESS_19_SHIFT (0x00000000u)
  36735. #define CSL_CPINTC_VECTOR_ADDRESS_REG_19_VECTOR_ADDRESS_19_RESETVAL (0x00000000u)
  36736. #define CSL_CPINTC_VECTOR_ADDRESS_REG_19_RESETVAL (0x00000000u)
  36737. /* vector_address_reg_20 */
  36738. #define CSL_CPINTC_VECTOR_ADDRESS_REG_20_VECTOR_ADDRESS_20_MASK (0xFFFFFFFFu)
  36739. #define CSL_CPINTC_VECTOR_ADDRESS_REG_20_VECTOR_ADDRESS_20_SHIFT (0x00000000u)
  36740. #define CSL_CPINTC_VECTOR_ADDRESS_REG_20_VECTOR_ADDRESS_20_RESETVAL (0x00000000u)
  36741. #define CSL_CPINTC_VECTOR_ADDRESS_REG_20_RESETVAL (0x00000000u)
  36742. /* vector_address_reg_21 */
  36743. #define CSL_CPINTC_VECTOR_ADDRESS_REG_21_VECTOR_ADDRESS_21_MASK (0xFFFFFFFFu)
  36744. #define CSL_CPINTC_VECTOR_ADDRESS_REG_21_VECTOR_ADDRESS_21_SHIFT (0x00000000u)
  36745. #define CSL_CPINTC_VECTOR_ADDRESS_REG_21_VECTOR_ADDRESS_21_RESETVAL (0x00000000u)
  36746. #define CSL_CPINTC_VECTOR_ADDRESS_REG_21_RESETVAL (0x00000000u)
  36747. /* vector_address_reg_22 */
  36748. #define CSL_CPINTC_VECTOR_ADDRESS_REG_22_VECTOR_ADDRESS_22_MASK (0xFFFFFFFFu)
  36749. #define CSL_CPINTC_VECTOR_ADDRESS_REG_22_VECTOR_ADDRESS_22_SHIFT (0x00000000u)
  36750. #define CSL_CPINTC_VECTOR_ADDRESS_REG_22_VECTOR_ADDRESS_22_RESETVAL (0x00000000u)
  36751. #define CSL_CPINTC_VECTOR_ADDRESS_REG_22_RESETVAL (0x00000000u)
  36752. /* vector_address_reg_23 */
  36753. #define CSL_CPINTC_VECTOR_ADDRESS_REG_23_VECTOR_ADDRESS_23_MASK (0xFFFFFFFFu)
  36754. #define CSL_CPINTC_VECTOR_ADDRESS_REG_23_VECTOR_ADDRESS_23_SHIFT (0x00000000u)
  36755. #define CSL_CPINTC_VECTOR_ADDRESS_REG_23_VECTOR_ADDRESS_23_RESETVAL (0x00000000u)
  36756. #define CSL_CPINTC_VECTOR_ADDRESS_REG_23_RESETVAL (0x00000000u)
  36757. /* vector_address_reg_24 */
  36758. #define CSL_CPINTC_VECTOR_ADDRESS_REG_24_VECTOR_ADDRESS_24_MASK (0xFFFFFFFFu)
  36759. #define CSL_CPINTC_VECTOR_ADDRESS_REG_24_VECTOR_ADDRESS_24_SHIFT (0x00000000u)
  36760. #define CSL_CPINTC_VECTOR_ADDRESS_REG_24_VECTOR_ADDRESS_24_RESETVAL (0x00000000u)
  36761. #define CSL_CPINTC_VECTOR_ADDRESS_REG_24_RESETVAL (0x00000000u)
  36762. /* vector_address_reg_25 */
  36763. #define CSL_CPINTC_VECTOR_ADDRESS_REG_25_VECTOR_ADDRESS_25_MASK (0xFFFFFFFFu)
  36764. #define CSL_CPINTC_VECTOR_ADDRESS_REG_25_VECTOR_ADDRESS_25_SHIFT (0x00000000u)
  36765. #define CSL_CPINTC_VECTOR_ADDRESS_REG_25_VECTOR_ADDRESS_25_RESETVAL (0x00000000u)
  36766. #define CSL_CPINTC_VECTOR_ADDRESS_REG_25_RESETVAL (0x00000000u)
  36767. /* vector_address_reg_26 */
  36768. #define CSL_CPINTC_VECTOR_ADDRESS_REG_26_VECTOR_ADDRESS_26_MASK (0xFFFFFFFFu)
  36769. #define CSL_CPINTC_VECTOR_ADDRESS_REG_26_VECTOR_ADDRESS_26_SHIFT (0x00000000u)
  36770. #define CSL_CPINTC_VECTOR_ADDRESS_REG_26_VECTOR_ADDRESS_26_RESETVAL (0x00000000u)
  36771. #define CSL_CPINTC_VECTOR_ADDRESS_REG_26_RESETVAL (0x00000000u)
  36772. /* vector_address_reg_27 */
  36773. #define CSL_CPINTC_VECTOR_ADDRESS_REG_27_VECTOR_ADDRESS_27_MASK (0xFFFFFFFFu)
  36774. #define CSL_CPINTC_VECTOR_ADDRESS_REG_27_VECTOR_ADDRESS_27_SHIFT (0x00000000u)
  36775. #define CSL_CPINTC_VECTOR_ADDRESS_REG_27_VECTOR_ADDRESS_27_RESETVAL (0x00000000u)
  36776. #define CSL_CPINTC_VECTOR_ADDRESS_REG_27_RESETVAL (0x00000000u)
  36777. /* vector_address_reg_28 */
  36778. #define CSL_CPINTC_VECTOR_ADDRESS_REG_28_VECTOR_ADDRESS_28_MASK (0xFFFFFFFFu)
  36779. #define CSL_CPINTC_VECTOR_ADDRESS_REG_28_VECTOR_ADDRESS_28_SHIFT (0x00000000u)
  36780. #define CSL_CPINTC_VECTOR_ADDRESS_REG_28_VECTOR_ADDRESS_28_RESETVAL (0x00000000u)
  36781. #define CSL_CPINTC_VECTOR_ADDRESS_REG_28_RESETVAL (0x00000000u)
  36782. /* vector_address_reg_29 */
  36783. #define CSL_CPINTC_VECTOR_ADDRESS_REG_29_VECTOR_ADDRESS_29_MASK (0xFFFFFFFFu)
  36784. #define CSL_CPINTC_VECTOR_ADDRESS_REG_29_VECTOR_ADDRESS_29_SHIFT (0x00000000u)
  36785. #define CSL_CPINTC_VECTOR_ADDRESS_REG_29_VECTOR_ADDRESS_29_RESETVAL (0x00000000u)
  36786. #define CSL_CPINTC_VECTOR_ADDRESS_REG_29_RESETVAL (0x00000000u)
  36787. /* vector_address_reg_30 */
  36788. #define CSL_CPINTC_VECTOR_ADDRESS_REG_30_VECTOR_ADDRESS_30_MASK (0xFFFFFFFFu)
  36789. #define CSL_CPINTC_VECTOR_ADDRESS_REG_30_VECTOR_ADDRESS_30_SHIFT (0x00000000u)
  36790. #define CSL_CPINTC_VECTOR_ADDRESS_REG_30_VECTOR_ADDRESS_30_RESETVAL (0x00000000u)
  36791. #define CSL_CPINTC_VECTOR_ADDRESS_REG_30_RESETVAL (0x00000000u)
  36792. /* vector_address_reg_31 */
  36793. #define CSL_CPINTC_VECTOR_ADDRESS_REG_31_VECTOR_ADDRESS_31_MASK (0xFFFFFFFFu)
  36794. #define CSL_CPINTC_VECTOR_ADDRESS_REG_31_VECTOR_ADDRESS_31_SHIFT (0x00000000u)
  36795. #define CSL_CPINTC_VECTOR_ADDRESS_REG_31_VECTOR_ADDRESS_31_RESETVAL (0x00000000u)
  36796. #define CSL_CPINTC_VECTOR_ADDRESS_REG_31_RESETVAL (0x00000000u)
  36797. /* vector_address_reg_32 */
  36798. #define CSL_CPINTC_VECTOR_ADDRESS_REG_32_VECTOR_ADDRESS_32_MASK (0xFFFFFFFFu)
  36799. #define CSL_CPINTC_VECTOR_ADDRESS_REG_32_VECTOR_ADDRESS_32_SHIFT (0x00000000u)
  36800. #define CSL_CPINTC_VECTOR_ADDRESS_REG_32_VECTOR_ADDRESS_32_RESETVAL (0x00000000u)
  36801. #define CSL_CPINTC_VECTOR_ADDRESS_REG_32_RESETVAL (0x00000000u)
  36802. /* vector_address_reg_33 */
  36803. #define CSL_CPINTC_VECTOR_ADDRESS_REG_33_VECTOR_ADDRESS_33_MASK (0xFFFFFFFFu)
  36804. #define CSL_CPINTC_VECTOR_ADDRESS_REG_33_VECTOR_ADDRESS_33_SHIFT (0x00000000u)
  36805. #define CSL_CPINTC_VECTOR_ADDRESS_REG_33_VECTOR_ADDRESS_33_RESETVAL (0x00000000u)
  36806. #define CSL_CPINTC_VECTOR_ADDRESS_REG_33_RESETVAL (0x00000000u)
  36807. /* vector_address_reg_34 */
  36808. #define CSL_CPINTC_VECTOR_ADDRESS_REG_34_VECTOR_ADDRESS_34_MASK (0xFFFFFFFFu)
  36809. #define CSL_CPINTC_VECTOR_ADDRESS_REG_34_VECTOR_ADDRESS_34_SHIFT (0x00000000u)
  36810. #define CSL_CPINTC_VECTOR_ADDRESS_REG_34_VECTOR_ADDRESS_34_RESETVAL (0x00000000u)
  36811. #define CSL_CPINTC_VECTOR_ADDRESS_REG_34_RESETVAL (0x00000000u)
  36812. /* vector_address_reg_35 */
  36813. #define CSL_CPINTC_VECTOR_ADDRESS_REG_35_VECTOR_ADDRESS_35_MASK (0xFFFFFFFFu)
  36814. #define CSL_CPINTC_VECTOR_ADDRESS_REG_35_VECTOR_ADDRESS_35_SHIFT (0x00000000u)
  36815. #define CSL_CPINTC_VECTOR_ADDRESS_REG_35_VECTOR_ADDRESS_35_RESETVAL (0x00000000u)
  36816. #define CSL_CPINTC_VECTOR_ADDRESS_REG_35_RESETVAL (0x00000000u)
  36817. /* vector_address_reg_36 */
  36818. #define CSL_CPINTC_VECTOR_ADDRESS_REG_36_VECTOR_ADDRESS_36_MASK (0xFFFFFFFFu)
  36819. #define CSL_CPINTC_VECTOR_ADDRESS_REG_36_VECTOR_ADDRESS_36_SHIFT (0x00000000u)
  36820. #define CSL_CPINTC_VECTOR_ADDRESS_REG_36_VECTOR_ADDRESS_36_RESETVAL (0x00000000u)
  36821. #define CSL_CPINTC_VECTOR_ADDRESS_REG_36_RESETVAL (0x00000000u)
  36822. /* vector_address_reg_37 */
  36823. #define CSL_CPINTC_VECTOR_ADDRESS_REG_37_VECTOR_ADDRESS_37_MASK (0xFFFFFFFFu)
  36824. #define CSL_CPINTC_VECTOR_ADDRESS_REG_37_VECTOR_ADDRESS_37_SHIFT (0x00000000u)
  36825. #define CSL_CPINTC_VECTOR_ADDRESS_REG_37_VECTOR_ADDRESS_37_RESETVAL (0x00000000u)
  36826. #define CSL_CPINTC_VECTOR_ADDRESS_REG_37_RESETVAL (0x00000000u)
  36827. /* vector_address_reg_38 */
  36828. #define CSL_CPINTC_VECTOR_ADDRESS_REG_38_VECTOR_ADDRESS_38_MASK (0xFFFFFFFFu)
  36829. #define CSL_CPINTC_VECTOR_ADDRESS_REG_38_VECTOR_ADDRESS_38_SHIFT (0x00000000u)
  36830. #define CSL_CPINTC_VECTOR_ADDRESS_REG_38_VECTOR_ADDRESS_38_RESETVAL (0x00000000u)
  36831. #define CSL_CPINTC_VECTOR_ADDRESS_REG_38_RESETVAL (0x00000000u)
  36832. /* vector_address_reg_39 */
  36833. #define CSL_CPINTC_VECTOR_ADDRESS_REG_39_VECTOR_ADDRESS_39_MASK (0xFFFFFFFFu)
  36834. #define CSL_CPINTC_VECTOR_ADDRESS_REG_39_VECTOR_ADDRESS_39_SHIFT (0x00000000u)
  36835. #define CSL_CPINTC_VECTOR_ADDRESS_REG_39_VECTOR_ADDRESS_39_RESETVAL (0x00000000u)
  36836. #define CSL_CPINTC_VECTOR_ADDRESS_REG_39_RESETVAL (0x00000000u)
  36837. /* vector_address_reg_40 */
  36838. #define CSL_CPINTC_VECTOR_ADDRESS_REG_40_VECTOR_ADDRESS_40_MASK (0xFFFFFFFFu)
  36839. #define CSL_CPINTC_VECTOR_ADDRESS_REG_40_VECTOR_ADDRESS_40_SHIFT (0x00000000u)
  36840. #define CSL_CPINTC_VECTOR_ADDRESS_REG_40_VECTOR_ADDRESS_40_RESETVAL (0x00000000u)
  36841. #define CSL_CPINTC_VECTOR_ADDRESS_REG_40_RESETVAL (0x00000000u)
  36842. /* vector_address_reg_41 */
  36843. #define CSL_CPINTC_VECTOR_ADDRESS_REG_41_VECTOR_ADDRESS_41_MASK (0xFFFFFFFFu)
  36844. #define CSL_CPINTC_VECTOR_ADDRESS_REG_41_VECTOR_ADDRESS_41_SHIFT (0x00000000u)
  36845. #define CSL_CPINTC_VECTOR_ADDRESS_REG_41_VECTOR_ADDRESS_41_RESETVAL (0x00000000u)
  36846. #define CSL_CPINTC_VECTOR_ADDRESS_REG_41_RESETVAL (0x00000000u)
  36847. /* vector_address_reg_42 */
  36848. #define CSL_CPINTC_VECTOR_ADDRESS_REG_42_VECTOR_ADDRESS_42_MASK (0xFFFFFFFFu)
  36849. #define CSL_CPINTC_VECTOR_ADDRESS_REG_42_VECTOR_ADDRESS_42_SHIFT (0x00000000u)
  36850. #define CSL_CPINTC_VECTOR_ADDRESS_REG_42_VECTOR_ADDRESS_42_RESETVAL (0x00000000u)
  36851. #define CSL_CPINTC_VECTOR_ADDRESS_REG_42_RESETVAL (0x00000000u)
  36852. /* vector_address_reg_43 */
  36853. #define CSL_CPINTC_VECTOR_ADDRESS_REG_43_VECTOR_ADDRESS_43_MASK (0xFFFFFFFFu)
  36854. #define CSL_CPINTC_VECTOR_ADDRESS_REG_43_VECTOR_ADDRESS_43_SHIFT (0x00000000u)
  36855. #define CSL_CPINTC_VECTOR_ADDRESS_REG_43_VECTOR_ADDRESS_43_RESETVAL (0x00000000u)
  36856. #define CSL_CPINTC_VECTOR_ADDRESS_REG_43_RESETVAL (0x00000000u)
  36857. /* vector_address_reg_44 */
  36858. #define CSL_CPINTC_VECTOR_ADDRESS_REG_44_VECTOR_ADDRESS_44_MASK (0xFFFFFFFFu)
  36859. #define CSL_CPINTC_VECTOR_ADDRESS_REG_44_VECTOR_ADDRESS_44_SHIFT (0x00000000u)
  36860. #define CSL_CPINTC_VECTOR_ADDRESS_REG_44_VECTOR_ADDRESS_44_RESETVAL (0x00000000u)
  36861. #define CSL_CPINTC_VECTOR_ADDRESS_REG_44_RESETVAL (0x00000000u)
  36862. /* vector_address_reg_45 */
  36863. #define CSL_CPINTC_VECTOR_ADDRESS_REG_45_VECTOR_ADDRESS_45_MASK (0xFFFFFFFFu)
  36864. #define CSL_CPINTC_VECTOR_ADDRESS_REG_45_VECTOR_ADDRESS_45_SHIFT (0x00000000u)
  36865. #define CSL_CPINTC_VECTOR_ADDRESS_REG_45_VECTOR_ADDRESS_45_RESETVAL (0x00000000u)
  36866. #define CSL_CPINTC_VECTOR_ADDRESS_REG_45_RESETVAL (0x00000000u)
  36867. /* vector_address_reg_46 */
  36868. #define CSL_CPINTC_VECTOR_ADDRESS_REG_46_VECTOR_ADDRESS_46_MASK (0xFFFFFFFFu)
  36869. #define CSL_CPINTC_VECTOR_ADDRESS_REG_46_VECTOR_ADDRESS_46_SHIFT (0x00000000u)
  36870. #define CSL_CPINTC_VECTOR_ADDRESS_REG_46_VECTOR_ADDRESS_46_RESETVAL (0x00000000u)
  36871. #define CSL_CPINTC_VECTOR_ADDRESS_REG_46_RESETVAL (0x00000000u)
  36872. /* vector_address_reg_47 */
  36873. #define CSL_CPINTC_VECTOR_ADDRESS_REG_47_VECTOR_ADDRESS_47_MASK (0xFFFFFFFFu)
  36874. #define CSL_CPINTC_VECTOR_ADDRESS_REG_47_VECTOR_ADDRESS_47_SHIFT (0x00000000u)
  36875. #define CSL_CPINTC_VECTOR_ADDRESS_REG_47_VECTOR_ADDRESS_47_RESETVAL (0x00000000u)
  36876. #define CSL_CPINTC_VECTOR_ADDRESS_REG_47_RESETVAL (0x00000000u)
  36877. /* vector_address_reg_48 */
  36878. #define CSL_CPINTC_VECTOR_ADDRESS_REG_48_VECTOR_ADDRESS_48_MASK (0xFFFFFFFFu)
  36879. #define CSL_CPINTC_VECTOR_ADDRESS_REG_48_VECTOR_ADDRESS_48_SHIFT (0x00000000u)
  36880. #define CSL_CPINTC_VECTOR_ADDRESS_REG_48_VECTOR_ADDRESS_48_RESETVAL (0x00000000u)
  36881. #define CSL_CPINTC_VECTOR_ADDRESS_REG_48_RESETVAL (0x00000000u)
  36882. /* vector_address_reg_49 */
  36883. #define CSL_CPINTC_VECTOR_ADDRESS_REG_49_VECTOR_ADDRESS_49_MASK (0xFFFFFFFFu)
  36884. #define CSL_CPINTC_VECTOR_ADDRESS_REG_49_VECTOR_ADDRESS_49_SHIFT (0x00000000u)
  36885. #define CSL_CPINTC_VECTOR_ADDRESS_REG_49_VECTOR_ADDRESS_49_RESETVAL (0x00000000u)
  36886. #define CSL_CPINTC_VECTOR_ADDRESS_REG_49_RESETVAL (0x00000000u)
  36887. /* vector_address_reg_50 */
  36888. #define CSL_CPINTC_VECTOR_ADDRESS_REG_50_VECTOR_ADDRESS_50_MASK (0xFFFFFFFFu)
  36889. #define CSL_CPINTC_VECTOR_ADDRESS_REG_50_VECTOR_ADDRESS_50_SHIFT (0x00000000u)
  36890. #define CSL_CPINTC_VECTOR_ADDRESS_REG_50_VECTOR_ADDRESS_50_RESETVAL (0x00000000u)
  36891. #define CSL_CPINTC_VECTOR_ADDRESS_REG_50_RESETVAL (0x00000000u)
  36892. /* vector_address_reg_51 */
  36893. #define CSL_CPINTC_VECTOR_ADDRESS_REG_51_VECTOR_ADDRESS_51_MASK (0xFFFFFFFFu)
  36894. #define CSL_CPINTC_VECTOR_ADDRESS_REG_51_VECTOR_ADDRESS_51_SHIFT (0x00000000u)
  36895. #define CSL_CPINTC_VECTOR_ADDRESS_REG_51_VECTOR_ADDRESS_51_RESETVAL (0x00000000u)
  36896. #define CSL_CPINTC_VECTOR_ADDRESS_REG_51_RESETVAL (0x00000000u)
  36897. /* vector_address_reg_52 */
  36898. #define CSL_CPINTC_VECTOR_ADDRESS_REG_52_VECTOR_ADDRESS_52_MASK (0xFFFFFFFFu)
  36899. #define CSL_CPINTC_VECTOR_ADDRESS_REG_52_VECTOR_ADDRESS_52_SHIFT (0x00000000u)
  36900. #define CSL_CPINTC_VECTOR_ADDRESS_REG_52_VECTOR_ADDRESS_52_RESETVAL (0x00000000u)
  36901. #define CSL_CPINTC_VECTOR_ADDRESS_REG_52_RESETVAL (0x00000000u)
  36902. /* vector_address_reg_53 */
  36903. #define CSL_CPINTC_VECTOR_ADDRESS_REG_53_VECTOR_ADDRESS_53_MASK (0xFFFFFFFFu)
  36904. #define CSL_CPINTC_VECTOR_ADDRESS_REG_53_VECTOR_ADDRESS_53_SHIFT (0x00000000u)
  36905. #define CSL_CPINTC_VECTOR_ADDRESS_REG_53_VECTOR_ADDRESS_53_RESETVAL (0x00000000u)
  36906. #define CSL_CPINTC_VECTOR_ADDRESS_REG_53_RESETVAL (0x00000000u)
  36907. /* vector_address_reg_54 */
  36908. #define CSL_CPINTC_VECTOR_ADDRESS_REG_54_VECTOR_ADDRESS_54_MASK (0xFFFFFFFFu)
  36909. #define CSL_CPINTC_VECTOR_ADDRESS_REG_54_VECTOR_ADDRESS_54_SHIFT (0x00000000u)
  36910. #define CSL_CPINTC_VECTOR_ADDRESS_REG_54_VECTOR_ADDRESS_54_RESETVAL (0x00000000u)
  36911. #define CSL_CPINTC_VECTOR_ADDRESS_REG_54_RESETVAL (0x00000000u)
  36912. /* vector_address_reg_55 */
  36913. #define CSL_CPINTC_VECTOR_ADDRESS_REG_55_VECTOR_ADDRESS_55_MASK (0xFFFFFFFFu)
  36914. #define CSL_CPINTC_VECTOR_ADDRESS_REG_55_VECTOR_ADDRESS_55_SHIFT (0x00000000u)
  36915. #define CSL_CPINTC_VECTOR_ADDRESS_REG_55_VECTOR_ADDRESS_55_RESETVAL (0x00000000u)
  36916. #define CSL_CPINTC_VECTOR_ADDRESS_REG_55_RESETVAL (0x00000000u)
  36917. /* vector_address_reg_56 */
  36918. #define CSL_CPINTC_VECTOR_ADDRESS_REG_56_VECTOR_ADDRESS_56_MASK (0xFFFFFFFFu)
  36919. #define CSL_CPINTC_VECTOR_ADDRESS_REG_56_VECTOR_ADDRESS_56_SHIFT (0x00000000u)
  36920. #define CSL_CPINTC_VECTOR_ADDRESS_REG_56_VECTOR_ADDRESS_56_RESETVAL (0x00000000u)
  36921. #define CSL_CPINTC_VECTOR_ADDRESS_REG_56_RESETVAL (0x00000000u)
  36922. /* vector_address_reg_57 */
  36923. #define CSL_CPINTC_VECTOR_ADDRESS_REG_57_VECTOR_ADDRESS_57_MASK (0xFFFFFFFFu)
  36924. #define CSL_CPINTC_VECTOR_ADDRESS_REG_57_VECTOR_ADDRESS_57_SHIFT (0x00000000u)
  36925. #define CSL_CPINTC_VECTOR_ADDRESS_REG_57_VECTOR_ADDRESS_57_RESETVAL (0x00000000u)
  36926. #define CSL_CPINTC_VECTOR_ADDRESS_REG_57_RESETVAL (0x00000000u)
  36927. /* vector_address_reg_58 */
  36928. #define CSL_CPINTC_VECTOR_ADDRESS_REG_58_VECTOR_ADDRESS_58_MASK (0xFFFFFFFFu)
  36929. #define CSL_CPINTC_VECTOR_ADDRESS_REG_58_VECTOR_ADDRESS_58_SHIFT (0x00000000u)
  36930. #define CSL_CPINTC_VECTOR_ADDRESS_REG_58_VECTOR_ADDRESS_58_RESETVAL (0x00000000u)
  36931. #define CSL_CPINTC_VECTOR_ADDRESS_REG_58_RESETVAL (0x00000000u)
  36932. /* vector_address_reg_59 */
  36933. #define CSL_CPINTC_VECTOR_ADDRESS_REG_59_VECTOR_ADDRESS_59_MASK (0xFFFFFFFFu)
  36934. #define CSL_CPINTC_VECTOR_ADDRESS_REG_59_VECTOR_ADDRESS_59_SHIFT (0x00000000u)
  36935. #define CSL_CPINTC_VECTOR_ADDRESS_REG_59_VECTOR_ADDRESS_59_RESETVAL (0x00000000u)
  36936. #define CSL_CPINTC_VECTOR_ADDRESS_REG_59_RESETVAL (0x00000000u)
  36937. /* vector_address_reg_60 */
  36938. #define CSL_CPINTC_VECTOR_ADDRESS_REG_60_VECTOR_ADDRESS_60_MASK (0xFFFFFFFFu)
  36939. #define CSL_CPINTC_VECTOR_ADDRESS_REG_60_VECTOR_ADDRESS_60_SHIFT (0x00000000u)
  36940. #define CSL_CPINTC_VECTOR_ADDRESS_REG_60_VECTOR_ADDRESS_60_RESETVAL (0x00000000u)
  36941. #define CSL_CPINTC_VECTOR_ADDRESS_REG_60_RESETVAL (0x00000000u)
  36942. /* vector_address_reg_61 */
  36943. #define CSL_CPINTC_VECTOR_ADDRESS_REG_61_VECTOR_ADDRESS_61_MASK (0xFFFFFFFFu)
  36944. #define CSL_CPINTC_VECTOR_ADDRESS_REG_61_VECTOR_ADDRESS_61_SHIFT (0x00000000u)
  36945. #define CSL_CPINTC_VECTOR_ADDRESS_REG_61_VECTOR_ADDRESS_61_RESETVAL (0x00000000u)
  36946. #define CSL_CPINTC_VECTOR_ADDRESS_REG_61_RESETVAL (0x00000000u)
  36947. /* vector_address_reg_62 */
  36948. #define CSL_CPINTC_VECTOR_ADDRESS_REG_62_VECTOR_ADDRESS_62_MASK (0xFFFFFFFFu)
  36949. #define CSL_CPINTC_VECTOR_ADDRESS_REG_62_VECTOR_ADDRESS_62_SHIFT (0x00000000u)
  36950. #define CSL_CPINTC_VECTOR_ADDRESS_REG_62_VECTOR_ADDRESS_62_RESETVAL (0x00000000u)
  36951. #define CSL_CPINTC_VECTOR_ADDRESS_REG_62_RESETVAL (0x00000000u)
  36952. /* vector_address_reg_63 */
  36953. #define CSL_CPINTC_VECTOR_ADDRESS_REG_63_VECTOR_ADDRESS_63_MASK (0xFFFFFFFFu)
  36954. #define CSL_CPINTC_VECTOR_ADDRESS_REG_63_VECTOR_ADDRESS_63_SHIFT (0x00000000u)
  36955. #define CSL_CPINTC_VECTOR_ADDRESS_REG_63_VECTOR_ADDRESS_63_RESETVAL (0x00000000u)
  36956. #define CSL_CPINTC_VECTOR_ADDRESS_REG_63_RESETVAL (0x00000000u)
  36957. /* vector_address_reg_64 */
  36958. #define CSL_CPINTC_VECTOR_ADDRESS_REG_64_VECTOR_ADDRESS_64_MASK (0xFFFFFFFFu)
  36959. #define CSL_CPINTC_VECTOR_ADDRESS_REG_64_VECTOR_ADDRESS_64_SHIFT (0x00000000u)
  36960. #define CSL_CPINTC_VECTOR_ADDRESS_REG_64_VECTOR_ADDRESS_64_RESETVAL (0x00000000u)
  36961. #define CSL_CPINTC_VECTOR_ADDRESS_REG_64_RESETVAL (0x00000000u)
  36962. /* vector_address_reg_65 */
  36963. #define CSL_CPINTC_VECTOR_ADDRESS_REG_65_VECTOR_ADDRESS_65_MASK (0xFFFFFFFFu)
  36964. #define CSL_CPINTC_VECTOR_ADDRESS_REG_65_VECTOR_ADDRESS_65_SHIFT (0x00000000u)
  36965. #define CSL_CPINTC_VECTOR_ADDRESS_REG_65_VECTOR_ADDRESS_65_RESETVAL (0x00000000u)
  36966. #define CSL_CPINTC_VECTOR_ADDRESS_REG_65_RESETVAL (0x00000000u)
  36967. /* vector_address_reg_66 */
  36968. #define CSL_CPINTC_VECTOR_ADDRESS_REG_66_VECTOR_ADDRESS_66_MASK (0xFFFFFFFFu)
  36969. #define CSL_CPINTC_VECTOR_ADDRESS_REG_66_VECTOR_ADDRESS_66_SHIFT (0x00000000u)
  36970. #define CSL_CPINTC_VECTOR_ADDRESS_REG_66_VECTOR_ADDRESS_66_RESETVAL (0x00000000u)
  36971. #define CSL_CPINTC_VECTOR_ADDRESS_REG_66_RESETVAL (0x00000000u)
  36972. /* vector_address_reg_67 */
  36973. #define CSL_CPINTC_VECTOR_ADDRESS_REG_67_VECTOR_ADDRESS_67_MASK (0xFFFFFFFFu)
  36974. #define CSL_CPINTC_VECTOR_ADDRESS_REG_67_VECTOR_ADDRESS_67_SHIFT (0x00000000u)
  36975. #define CSL_CPINTC_VECTOR_ADDRESS_REG_67_VECTOR_ADDRESS_67_RESETVAL (0x00000000u)
  36976. #define CSL_CPINTC_VECTOR_ADDRESS_REG_67_RESETVAL (0x00000000u)
  36977. /* vector_address_reg_68 */
  36978. #define CSL_CPINTC_VECTOR_ADDRESS_REG_68_VECTOR_ADDRESS_68_MASK (0xFFFFFFFFu)
  36979. #define CSL_CPINTC_VECTOR_ADDRESS_REG_68_VECTOR_ADDRESS_68_SHIFT (0x00000000u)
  36980. #define CSL_CPINTC_VECTOR_ADDRESS_REG_68_VECTOR_ADDRESS_68_RESETVAL (0x00000000u)
  36981. #define CSL_CPINTC_VECTOR_ADDRESS_REG_68_RESETVAL (0x00000000u)
  36982. /* vector_address_reg_69 */
  36983. #define CSL_CPINTC_VECTOR_ADDRESS_REG_69_VECTOR_ADDRESS_69_MASK (0xFFFFFFFFu)
  36984. #define CSL_CPINTC_VECTOR_ADDRESS_REG_69_VECTOR_ADDRESS_69_SHIFT (0x00000000u)
  36985. #define CSL_CPINTC_VECTOR_ADDRESS_REG_69_VECTOR_ADDRESS_69_RESETVAL (0x00000000u)
  36986. #define CSL_CPINTC_VECTOR_ADDRESS_REG_69_RESETVAL (0x00000000u)
  36987. /* vector_address_reg_70 */
  36988. #define CSL_CPINTC_VECTOR_ADDRESS_REG_70_VECTOR_ADDRESS_70_MASK (0xFFFFFFFFu)
  36989. #define CSL_CPINTC_VECTOR_ADDRESS_REG_70_VECTOR_ADDRESS_70_SHIFT (0x00000000u)
  36990. #define CSL_CPINTC_VECTOR_ADDRESS_REG_70_VECTOR_ADDRESS_70_RESETVAL (0x00000000u)
  36991. #define CSL_CPINTC_VECTOR_ADDRESS_REG_70_RESETVAL (0x00000000u)
  36992. /* vector_address_reg_71 */
  36993. #define CSL_CPINTC_VECTOR_ADDRESS_REG_71_VECTOR_ADDRESS_71_MASK (0xFFFFFFFFu)
  36994. #define CSL_CPINTC_VECTOR_ADDRESS_REG_71_VECTOR_ADDRESS_71_SHIFT (0x00000000u)
  36995. #define CSL_CPINTC_VECTOR_ADDRESS_REG_71_VECTOR_ADDRESS_71_RESETVAL (0x00000000u)
  36996. #define CSL_CPINTC_VECTOR_ADDRESS_REG_71_RESETVAL (0x00000000u)
  36997. /* vector_address_reg_72 */
  36998. #define CSL_CPINTC_VECTOR_ADDRESS_REG_72_VECTOR_ADDRESS_72_MASK (0xFFFFFFFFu)
  36999. #define CSL_CPINTC_VECTOR_ADDRESS_REG_72_VECTOR_ADDRESS_72_SHIFT (0x00000000u)
  37000. #define CSL_CPINTC_VECTOR_ADDRESS_REG_72_VECTOR_ADDRESS_72_RESETVAL (0x00000000u)
  37001. #define CSL_CPINTC_VECTOR_ADDRESS_REG_72_RESETVAL (0x00000000u)
  37002. /* vector_address_reg_73 */
  37003. #define CSL_CPINTC_VECTOR_ADDRESS_REG_73_VECTOR_ADDRESS_73_MASK (0xFFFFFFFFu)
  37004. #define CSL_CPINTC_VECTOR_ADDRESS_REG_73_VECTOR_ADDRESS_73_SHIFT (0x00000000u)
  37005. #define CSL_CPINTC_VECTOR_ADDRESS_REG_73_VECTOR_ADDRESS_73_RESETVAL (0x00000000u)
  37006. #define CSL_CPINTC_VECTOR_ADDRESS_REG_73_RESETVAL (0x00000000u)
  37007. /* vector_address_reg_74 */
  37008. #define CSL_CPINTC_VECTOR_ADDRESS_REG_74_VECTOR_ADDRESS_74_MASK (0xFFFFFFFFu)
  37009. #define CSL_CPINTC_VECTOR_ADDRESS_REG_74_VECTOR_ADDRESS_74_SHIFT (0x00000000u)
  37010. #define CSL_CPINTC_VECTOR_ADDRESS_REG_74_VECTOR_ADDRESS_74_RESETVAL (0x00000000u)
  37011. #define CSL_CPINTC_VECTOR_ADDRESS_REG_74_RESETVAL (0x00000000u)
  37012. /* vector_address_reg_75 */
  37013. #define CSL_CPINTC_VECTOR_ADDRESS_REG_75_VECTOR_ADDRESS_75_MASK (0xFFFFFFFFu)
  37014. #define CSL_CPINTC_VECTOR_ADDRESS_REG_75_VECTOR_ADDRESS_75_SHIFT (0x00000000u)
  37015. #define CSL_CPINTC_VECTOR_ADDRESS_REG_75_VECTOR_ADDRESS_75_RESETVAL (0x00000000u)
  37016. #define CSL_CPINTC_VECTOR_ADDRESS_REG_75_RESETVAL (0x00000000u)
  37017. /* vector_address_reg_76 */
  37018. #define CSL_CPINTC_VECTOR_ADDRESS_REG_76_VECTOR_ADDRESS_76_MASK (0xFFFFFFFFu)
  37019. #define CSL_CPINTC_VECTOR_ADDRESS_REG_76_VECTOR_ADDRESS_76_SHIFT (0x00000000u)
  37020. #define CSL_CPINTC_VECTOR_ADDRESS_REG_76_VECTOR_ADDRESS_76_RESETVAL (0x00000000u)
  37021. #define CSL_CPINTC_VECTOR_ADDRESS_REG_76_RESETVAL (0x00000000u)
  37022. /* vector_address_reg_77 */
  37023. #define CSL_CPINTC_VECTOR_ADDRESS_REG_77_VECTOR_ADDRESS_77_MASK (0xFFFFFFFFu)
  37024. #define CSL_CPINTC_VECTOR_ADDRESS_REG_77_VECTOR_ADDRESS_77_SHIFT (0x00000000u)
  37025. #define CSL_CPINTC_VECTOR_ADDRESS_REG_77_VECTOR_ADDRESS_77_RESETVAL (0x00000000u)
  37026. #define CSL_CPINTC_VECTOR_ADDRESS_REG_77_RESETVAL (0x00000000u)
  37027. /* vector_address_reg_78 */
  37028. #define CSL_CPINTC_VECTOR_ADDRESS_REG_78_VECTOR_ADDRESS_78_MASK (0xFFFFFFFFu)
  37029. #define CSL_CPINTC_VECTOR_ADDRESS_REG_78_VECTOR_ADDRESS_78_SHIFT (0x00000000u)
  37030. #define CSL_CPINTC_VECTOR_ADDRESS_REG_78_VECTOR_ADDRESS_78_RESETVAL (0x00000000u)
  37031. #define CSL_CPINTC_VECTOR_ADDRESS_REG_78_RESETVAL (0x00000000u)
  37032. /* vector_address_reg_79 */
  37033. #define CSL_CPINTC_VECTOR_ADDRESS_REG_79_VECTOR_ADDRESS_79_MASK (0xFFFFFFFFu)
  37034. #define CSL_CPINTC_VECTOR_ADDRESS_REG_79_VECTOR_ADDRESS_79_SHIFT (0x00000000u)
  37035. #define CSL_CPINTC_VECTOR_ADDRESS_REG_79_VECTOR_ADDRESS_79_RESETVAL (0x00000000u)
  37036. #define CSL_CPINTC_VECTOR_ADDRESS_REG_79_RESETVAL (0x00000000u)
  37037. /* vector_address_reg_80 */
  37038. #define CSL_CPINTC_VECTOR_ADDRESS_REG_80_VECTOR_ADDRESS_80_MASK (0xFFFFFFFFu)
  37039. #define CSL_CPINTC_VECTOR_ADDRESS_REG_80_VECTOR_ADDRESS_80_SHIFT (0x00000000u)
  37040. #define CSL_CPINTC_VECTOR_ADDRESS_REG_80_VECTOR_ADDRESS_80_RESETVAL (0x00000000u)
  37041. #define CSL_CPINTC_VECTOR_ADDRESS_REG_80_RESETVAL (0x00000000u)
  37042. /* vector_address_reg_81 */
  37043. #define CSL_CPINTC_VECTOR_ADDRESS_REG_81_VECTOR_ADDRESS_81_MASK (0xFFFFFFFFu)
  37044. #define CSL_CPINTC_VECTOR_ADDRESS_REG_81_VECTOR_ADDRESS_81_SHIFT (0x00000000u)
  37045. #define CSL_CPINTC_VECTOR_ADDRESS_REG_81_VECTOR_ADDRESS_81_RESETVAL (0x00000000u)
  37046. #define CSL_CPINTC_VECTOR_ADDRESS_REG_81_RESETVAL (0x00000000u)
  37047. /* vector_address_reg_82 */
  37048. #define CSL_CPINTC_VECTOR_ADDRESS_REG_82_VECTOR_ADDRESS_82_MASK (0xFFFFFFFFu)
  37049. #define CSL_CPINTC_VECTOR_ADDRESS_REG_82_VECTOR_ADDRESS_82_SHIFT (0x00000000u)
  37050. #define CSL_CPINTC_VECTOR_ADDRESS_REG_82_VECTOR_ADDRESS_82_RESETVAL (0x00000000u)
  37051. #define CSL_CPINTC_VECTOR_ADDRESS_REG_82_RESETVAL (0x00000000u)
  37052. /* vector_address_reg_83 */
  37053. #define CSL_CPINTC_VECTOR_ADDRESS_REG_83_VECTOR_ADDRESS_83_MASK (0xFFFFFFFFu)
  37054. #define CSL_CPINTC_VECTOR_ADDRESS_REG_83_VECTOR_ADDRESS_83_SHIFT (0x00000000u)
  37055. #define CSL_CPINTC_VECTOR_ADDRESS_REG_83_VECTOR_ADDRESS_83_RESETVAL (0x00000000u)
  37056. #define CSL_CPINTC_VECTOR_ADDRESS_REG_83_RESETVAL (0x00000000u)
  37057. /* vector_address_reg_84 */
  37058. #define CSL_CPINTC_VECTOR_ADDRESS_REG_84_VECTOR_ADDRESS_84_MASK (0xFFFFFFFFu)
  37059. #define CSL_CPINTC_VECTOR_ADDRESS_REG_84_VECTOR_ADDRESS_84_SHIFT (0x00000000u)
  37060. #define CSL_CPINTC_VECTOR_ADDRESS_REG_84_VECTOR_ADDRESS_84_RESETVAL (0x00000000u)
  37061. #define CSL_CPINTC_VECTOR_ADDRESS_REG_84_RESETVAL (0x00000000u)
  37062. /* vector_address_reg_85 */
  37063. #define CSL_CPINTC_VECTOR_ADDRESS_REG_85_VECTOR_ADDRESS_85_MASK (0xFFFFFFFFu)
  37064. #define CSL_CPINTC_VECTOR_ADDRESS_REG_85_VECTOR_ADDRESS_85_SHIFT (0x00000000u)
  37065. #define CSL_CPINTC_VECTOR_ADDRESS_REG_85_VECTOR_ADDRESS_85_RESETVAL (0x00000000u)
  37066. #define CSL_CPINTC_VECTOR_ADDRESS_REG_85_RESETVAL (0x00000000u)
  37067. /* vector_address_reg_86 */
  37068. #define CSL_CPINTC_VECTOR_ADDRESS_REG_86_VECTOR_ADDRESS_86_MASK (0xFFFFFFFFu)
  37069. #define CSL_CPINTC_VECTOR_ADDRESS_REG_86_VECTOR_ADDRESS_86_SHIFT (0x00000000u)
  37070. #define CSL_CPINTC_VECTOR_ADDRESS_REG_86_VECTOR_ADDRESS_86_RESETVAL (0x00000000u)
  37071. #define CSL_CPINTC_VECTOR_ADDRESS_REG_86_RESETVAL (0x00000000u)
  37072. /* vector_address_reg_87 */
  37073. #define CSL_CPINTC_VECTOR_ADDRESS_REG_87_VECTOR_ADDRESS_87_MASK (0xFFFFFFFFu)
  37074. #define CSL_CPINTC_VECTOR_ADDRESS_REG_87_VECTOR_ADDRESS_87_SHIFT (0x00000000u)
  37075. #define CSL_CPINTC_VECTOR_ADDRESS_REG_87_VECTOR_ADDRESS_87_RESETVAL (0x00000000u)
  37076. #define CSL_CPINTC_VECTOR_ADDRESS_REG_87_RESETVAL (0x00000000u)
  37077. /* vector_address_reg_88 */
  37078. #define CSL_CPINTC_VECTOR_ADDRESS_REG_88_VECTOR_ADDRESS_88_MASK (0xFFFFFFFFu)
  37079. #define CSL_CPINTC_VECTOR_ADDRESS_REG_88_VECTOR_ADDRESS_88_SHIFT (0x00000000u)
  37080. #define CSL_CPINTC_VECTOR_ADDRESS_REG_88_VECTOR_ADDRESS_88_RESETVAL (0x00000000u)
  37081. #define CSL_CPINTC_VECTOR_ADDRESS_REG_88_RESETVAL (0x00000000u)
  37082. /* vector_address_reg_89 */
  37083. #define CSL_CPINTC_VECTOR_ADDRESS_REG_89_VECTOR_ADDRESS_89_MASK (0xFFFFFFFFu)
  37084. #define CSL_CPINTC_VECTOR_ADDRESS_REG_89_VECTOR_ADDRESS_89_SHIFT (0x00000000u)
  37085. #define CSL_CPINTC_VECTOR_ADDRESS_REG_89_VECTOR_ADDRESS_89_RESETVAL (0x00000000u)
  37086. #define CSL_CPINTC_VECTOR_ADDRESS_REG_89_RESETVAL (0x00000000u)
  37087. /* vector_address_reg_90 */
  37088. #define CSL_CPINTC_VECTOR_ADDRESS_REG_90_VECTOR_ADDRESS_90_MASK (0xFFFFFFFFu)
  37089. #define CSL_CPINTC_VECTOR_ADDRESS_REG_90_VECTOR_ADDRESS_90_SHIFT (0x00000000u)
  37090. #define CSL_CPINTC_VECTOR_ADDRESS_REG_90_VECTOR_ADDRESS_90_RESETVAL (0x00000000u)
  37091. #define CSL_CPINTC_VECTOR_ADDRESS_REG_90_RESETVAL (0x00000000u)
  37092. /* vector_address_reg_91 */
  37093. #define CSL_CPINTC_VECTOR_ADDRESS_REG_91_VECTOR_ADDRESS_91_MASK (0xFFFFFFFFu)
  37094. #define CSL_CPINTC_VECTOR_ADDRESS_REG_91_VECTOR_ADDRESS_91_SHIFT (0x00000000u)
  37095. #define CSL_CPINTC_VECTOR_ADDRESS_REG_91_VECTOR_ADDRESS_91_RESETVAL (0x00000000u)
  37096. #define CSL_CPINTC_VECTOR_ADDRESS_REG_91_RESETVAL (0x00000000u)
  37097. /* vector_address_reg_92 */
  37098. #define CSL_CPINTC_VECTOR_ADDRESS_REG_92_VECTOR_ADDRESS_92_MASK (0xFFFFFFFFu)
  37099. #define CSL_CPINTC_VECTOR_ADDRESS_REG_92_VECTOR_ADDRESS_92_SHIFT (0x00000000u)
  37100. #define CSL_CPINTC_VECTOR_ADDRESS_REG_92_VECTOR_ADDRESS_92_RESETVAL (0x00000000u)
  37101. #define CSL_CPINTC_VECTOR_ADDRESS_REG_92_RESETVAL (0x00000000u)
  37102. /* vector_address_reg_93 */
  37103. #define CSL_CPINTC_VECTOR_ADDRESS_REG_93_VECTOR_ADDRESS_93_MASK (0xFFFFFFFFu)
  37104. #define CSL_CPINTC_VECTOR_ADDRESS_REG_93_VECTOR_ADDRESS_93_SHIFT (0x00000000u)
  37105. #define CSL_CPINTC_VECTOR_ADDRESS_REG_93_VECTOR_ADDRESS_93_RESETVAL (0x00000000u)
  37106. #define CSL_CPINTC_VECTOR_ADDRESS_REG_93_RESETVAL (0x00000000u)
  37107. /* vector_address_reg_94 */
  37108. #define CSL_CPINTC_VECTOR_ADDRESS_REG_94_VECTOR_ADDRESS_94_MASK (0xFFFFFFFFu)
  37109. #define CSL_CPINTC_VECTOR_ADDRESS_REG_94_VECTOR_ADDRESS_94_SHIFT (0x00000000u)
  37110. #define CSL_CPINTC_VECTOR_ADDRESS_REG_94_VECTOR_ADDRESS_94_RESETVAL (0x00000000u)
  37111. #define CSL_CPINTC_VECTOR_ADDRESS_REG_94_RESETVAL (0x00000000u)
  37112. /* vector_address_reg_95 */
  37113. #define CSL_CPINTC_VECTOR_ADDRESS_REG_95_VECTOR_ADDRESS_95_MASK (0xFFFFFFFFu)
  37114. #define CSL_CPINTC_VECTOR_ADDRESS_REG_95_VECTOR_ADDRESS_95_SHIFT (0x00000000u)
  37115. #define CSL_CPINTC_VECTOR_ADDRESS_REG_95_VECTOR_ADDRESS_95_RESETVAL (0x00000000u)
  37116. #define CSL_CPINTC_VECTOR_ADDRESS_REG_95_RESETVAL (0x00000000u)
  37117. /* vector_address_reg_96 */
  37118. #define CSL_CPINTC_VECTOR_ADDRESS_REG_96_VECTOR_ADDRESS_96_MASK (0xFFFFFFFFu)
  37119. #define CSL_CPINTC_VECTOR_ADDRESS_REG_96_VECTOR_ADDRESS_96_SHIFT (0x00000000u)
  37120. #define CSL_CPINTC_VECTOR_ADDRESS_REG_96_VECTOR_ADDRESS_96_RESETVAL (0x00000000u)
  37121. #define CSL_CPINTC_VECTOR_ADDRESS_REG_96_RESETVAL (0x00000000u)
  37122. /* vector_address_reg_97 */
  37123. #define CSL_CPINTC_VECTOR_ADDRESS_REG_97_VECTOR_ADDRESS_97_MASK (0xFFFFFFFFu)
  37124. #define CSL_CPINTC_VECTOR_ADDRESS_REG_97_VECTOR_ADDRESS_97_SHIFT (0x00000000u)
  37125. #define CSL_CPINTC_VECTOR_ADDRESS_REG_97_VECTOR_ADDRESS_97_RESETVAL (0x00000000u)
  37126. #define CSL_CPINTC_VECTOR_ADDRESS_REG_97_RESETVAL (0x00000000u)
  37127. /* vector_address_reg_98 */
  37128. #define CSL_CPINTC_VECTOR_ADDRESS_REG_98_VECTOR_ADDRESS_98_MASK (0xFFFFFFFFu)
  37129. #define CSL_CPINTC_VECTOR_ADDRESS_REG_98_VECTOR_ADDRESS_98_SHIFT (0x00000000u)
  37130. #define CSL_CPINTC_VECTOR_ADDRESS_REG_98_VECTOR_ADDRESS_98_RESETVAL (0x00000000u)
  37131. #define CSL_CPINTC_VECTOR_ADDRESS_REG_98_RESETVAL (0x00000000u)
  37132. /* vector_address_reg_99 */
  37133. #define CSL_CPINTC_VECTOR_ADDRESS_REG_99_VECTOR_ADDRESS_99_MASK (0xFFFFFFFFu)
  37134. #define CSL_CPINTC_VECTOR_ADDRESS_REG_99_VECTOR_ADDRESS_99_SHIFT (0x00000000u)
  37135. #define CSL_CPINTC_VECTOR_ADDRESS_REG_99_VECTOR_ADDRESS_99_RESETVAL (0x00000000u)
  37136. #define CSL_CPINTC_VECTOR_ADDRESS_REG_99_RESETVAL (0x00000000u)
  37137. /* vector_address_reg_100 */
  37138. #define CSL_CPINTC_VECTOR_ADDRESS_REG_100_VECTOR_ADDRESS_100_MASK (0xFFFFFFFFu)
  37139. #define CSL_CPINTC_VECTOR_ADDRESS_REG_100_VECTOR_ADDRESS_100_SHIFT (0x00000000u)
  37140. #define CSL_CPINTC_VECTOR_ADDRESS_REG_100_VECTOR_ADDRESS_100_RESETVAL (0x00000000u)
  37141. #define CSL_CPINTC_VECTOR_ADDRESS_REG_100_RESETVAL (0x00000000u)
  37142. /* vector_address_reg_101 */
  37143. #define CSL_CPINTC_VECTOR_ADDRESS_REG_101_VECTOR_ADDRESS_101_MASK (0xFFFFFFFFu)
  37144. #define CSL_CPINTC_VECTOR_ADDRESS_REG_101_VECTOR_ADDRESS_101_SHIFT (0x00000000u)
  37145. #define CSL_CPINTC_VECTOR_ADDRESS_REG_101_VECTOR_ADDRESS_101_RESETVAL (0x00000000u)
  37146. #define CSL_CPINTC_VECTOR_ADDRESS_REG_101_RESETVAL (0x00000000u)
  37147. /* vector_address_reg_102 */
  37148. #define CSL_CPINTC_VECTOR_ADDRESS_REG_102_VECTOR_ADDRESS_102_MASK (0xFFFFFFFFu)
  37149. #define CSL_CPINTC_VECTOR_ADDRESS_REG_102_VECTOR_ADDRESS_102_SHIFT (0x00000000u)
  37150. #define CSL_CPINTC_VECTOR_ADDRESS_REG_102_VECTOR_ADDRESS_102_RESETVAL (0x00000000u)
  37151. #define CSL_CPINTC_VECTOR_ADDRESS_REG_102_RESETVAL (0x00000000u)
  37152. /* vector_address_reg_103 */
  37153. #define CSL_CPINTC_VECTOR_ADDRESS_REG_103_VECTOR_ADDRESS_103_MASK (0xFFFFFFFFu)
  37154. #define CSL_CPINTC_VECTOR_ADDRESS_REG_103_VECTOR_ADDRESS_103_SHIFT (0x00000000u)
  37155. #define CSL_CPINTC_VECTOR_ADDRESS_REG_103_VECTOR_ADDRESS_103_RESETVAL (0x00000000u)
  37156. #define CSL_CPINTC_VECTOR_ADDRESS_REG_103_RESETVAL (0x00000000u)
  37157. /* vector_address_reg_104 */
  37158. #define CSL_CPINTC_VECTOR_ADDRESS_REG_104_VECTOR_ADDRESS_104_MASK (0xFFFFFFFFu)
  37159. #define CSL_CPINTC_VECTOR_ADDRESS_REG_104_VECTOR_ADDRESS_104_SHIFT (0x00000000u)
  37160. #define CSL_CPINTC_VECTOR_ADDRESS_REG_104_VECTOR_ADDRESS_104_RESETVAL (0x00000000u)
  37161. #define CSL_CPINTC_VECTOR_ADDRESS_REG_104_RESETVAL (0x00000000u)
  37162. /* vector_address_reg_105 */
  37163. #define CSL_CPINTC_VECTOR_ADDRESS_REG_105_VECTOR_ADDRESS_105_MASK (0xFFFFFFFFu)
  37164. #define CSL_CPINTC_VECTOR_ADDRESS_REG_105_VECTOR_ADDRESS_105_SHIFT (0x00000000u)
  37165. #define CSL_CPINTC_VECTOR_ADDRESS_REG_105_VECTOR_ADDRESS_105_RESETVAL (0x00000000u)
  37166. #define CSL_CPINTC_VECTOR_ADDRESS_REG_105_RESETVAL (0x00000000u)
  37167. /* vector_address_reg_106 */
  37168. #define CSL_CPINTC_VECTOR_ADDRESS_REG_106_VECTOR_ADDRESS_106_MASK (0xFFFFFFFFu)
  37169. #define CSL_CPINTC_VECTOR_ADDRESS_REG_106_VECTOR_ADDRESS_106_SHIFT (0x00000000u)
  37170. #define CSL_CPINTC_VECTOR_ADDRESS_REG_106_VECTOR_ADDRESS_106_RESETVAL (0x00000000u)
  37171. #define CSL_CPINTC_VECTOR_ADDRESS_REG_106_RESETVAL (0x00000000u)
  37172. /* vector_address_reg_107 */
  37173. #define CSL_CPINTC_VECTOR_ADDRESS_REG_107_VECTOR_ADDRESS_107_MASK (0xFFFFFFFFu)
  37174. #define CSL_CPINTC_VECTOR_ADDRESS_REG_107_VECTOR_ADDRESS_107_SHIFT (0x00000000u)
  37175. #define CSL_CPINTC_VECTOR_ADDRESS_REG_107_VECTOR_ADDRESS_107_RESETVAL (0x00000000u)
  37176. #define CSL_CPINTC_VECTOR_ADDRESS_REG_107_RESETVAL (0x00000000u)
  37177. /* vector_address_reg_108 */
  37178. #define CSL_CPINTC_VECTOR_ADDRESS_REG_108_VECTOR_ADDRESS_108_MASK (0xFFFFFFFFu)
  37179. #define CSL_CPINTC_VECTOR_ADDRESS_REG_108_VECTOR_ADDRESS_108_SHIFT (0x00000000u)
  37180. #define CSL_CPINTC_VECTOR_ADDRESS_REG_108_VECTOR_ADDRESS_108_RESETVAL (0x00000000u)
  37181. #define CSL_CPINTC_VECTOR_ADDRESS_REG_108_RESETVAL (0x00000000u)
  37182. /* vector_address_reg_109 */
  37183. #define CSL_CPINTC_VECTOR_ADDRESS_REG_109_VECTOR_ADDRESS_109_MASK (0xFFFFFFFFu)
  37184. #define CSL_CPINTC_VECTOR_ADDRESS_REG_109_VECTOR_ADDRESS_109_SHIFT (0x00000000u)
  37185. #define CSL_CPINTC_VECTOR_ADDRESS_REG_109_VECTOR_ADDRESS_109_RESETVAL (0x00000000u)
  37186. #define CSL_CPINTC_VECTOR_ADDRESS_REG_109_RESETVAL (0x00000000u)
  37187. /* vector_address_reg_110 */
  37188. #define CSL_CPINTC_VECTOR_ADDRESS_REG_110_VECTOR_ADDRESS_110_MASK (0xFFFFFFFFu)
  37189. #define CSL_CPINTC_VECTOR_ADDRESS_REG_110_VECTOR_ADDRESS_110_SHIFT (0x00000000u)
  37190. #define CSL_CPINTC_VECTOR_ADDRESS_REG_110_VECTOR_ADDRESS_110_RESETVAL (0x00000000u)
  37191. #define CSL_CPINTC_VECTOR_ADDRESS_REG_110_RESETVAL (0x00000000u)
  37192. /* vector_address_reg_111 */
  37193. #define CSL_CPINTC_VECTOR_ADDRESS_REG_111_VECTOR_ADDRESS_111_MASK (0xFFFFFFFFu)
  37194. #define CSL_CPINTC_VECTOR_ADDRESS_REG_111_VECTOR_ADDRESS_111_SHIFT (0x00000000u)
  37195. #define CSL_CPINTC_VECTOR_ADDRESS_REG_111_VECTOR_ADDRESS_111_RESETVAL (0x00000000u)
  37196. #define CSL_CPINTC_VECTOR_ADDRESS_REG_111_RESETVAL (0x00000000u)
  37197. /* vector_address_reg_112 */
  37198. #define CSL_CPINTC_VECTOR_ADDRESS_REG_112_VECTOR_ADDRESS_112_MASK (0xFFFFFFFFu)
  37199. #define CSL_CPINTC_VECTOR_ADDRESS_REG_112_VECTOR_ADDRESS_112_SHIFT (0x00000000u)
  37200. #define CSL_CPINTC_VECTOR_ADDRESS_REG_112_VECTOR_ADDRESS_112_RESETVAL (0x00000000u)
  37201. #define CSL_CPINTC_VECTOR_ADDRESS_REG_112_RESETVAL (0x00000000u)
  37202. /* vector_address_reg_113 */
  37203. #define CSL_CPINTC_VECTOR_ADDRESS_REG_113_VECTOR_ADDRESS_113_MASK (0xFFFFFFFFu)
  37204. #define CSL_CPINTC_VECTOR_ADDRESS_REG_113_VECTOR_ADDRESS_113_SHIFT (0x00000000u)
  37205. #define CSL_CPINTC_VECTOR_ADDRESS_REG_113_VECTOR_ADDRESS_113_RESETVAL (0x00000000u)
  37206. #define CSL_CPINTC_VECTOR_ADDRESS_REG_113_RESETVAL (0x00000000u)
  37207. /* vector_address_reg_114 */
  37208. #define CSL_CPINTC_VECTOR_ADDRESS_REG_114_VECTOR_ADDRESS_114_MASK (0xFFFFFFFFu)
  37209. #define CSL_CPINTC_VECTOR_ADDRESS_REG_114_VECTOR_ADDRESS_114_SHIFT (0x00000000u)
  37210. #define CSL_CPINTC_VECTOR_ADDRESS_REG_114_VECTOR_ADDRESS_114_RESETVAL (0x00000000u)
  37211. #define CSL_CPINTC_VECTOR_ADDRESS_REG_114_RESETVAL (0x00000000u)
  37212. /* vector_address_reg_115 */
  37213. #define CSL_CPINTC_VECTOR_ADDRESS_REG_115_VECTOR_ADDRESS_115_MASK (0xFFFFFFFFu)
  37214. #define CSL_CPINTC_VECTOR_ADDRESS_REG_115_VECTOR_ADDRESS_115_SHIFT (0x00000000u)
  37215. #define CSL_CPINTC_VECTOR_ADDRESS_REG_115_VECTOR_ADDRESS_115_RESETVAL (0x00000000u)
  37216. #define CSL_CPINTC_VECTOR_ADDRESS_REG_115_RESETVAL (0x00000000u)
  37217. /* vector_address_reg_116 */
  37218. #define CSL_CPINTC_VECTOR_ADDRESS_REG_116_VECTOR_ADDRESS_116_MASK (0xFFFFFFFFu)
  37219. #define CSL_CPINTC_VECTOR_ADDRESS_REG_116_VECTOR_ADDRESS_116_SHIFT (0x00000000u)
  37220. #define CSL_CPINTC_VECTOR_ADDRESS_REG_116_VECTOR_ADDRESS_116_RESETVAL (0x00000000u)
  37221. #define CSL_CPINTC_VECTOR_ADDRESS_REG_116_RESETVAL (0x00000000u)
  37222. /* vector_address_reg_117 */
  37223. #define CSL_CPINTC_VECTOR_ADDRESS_REG_117_VECTOR_ADDRESS_117_MASK (0xFFFFFFFFu)
  37224. #define CSL_CPINTC_VECTOR_ADDRESS_REG_117_VECTOR_ADDRESS_117_SHIFT (0x00000000u)
  37225. #define CSL_CPINTC_VECTOR_ADDRESS_REG_117_VECTOR_ADDRESS_117_RESETVAL (0x00000000u)
  37226. #define CSL_CPINTC_VECTOR_ADDRESS_REG_117_RESETVAL (0x00000000u)
  37227. /* vector_address_reg_118 */
  37228. #define CSL_CPINTC_VECTOR_ADDRESS_REG_118_VECTOR_ADDRESS_118_MASK (0xFFFFFFFFu)
  37229. #define CSL_CPINTC_VECTOR_ADDRESS_REG_118_VECTOR_ADDRESS_118_SHIFT (0x00000000u)
  37230. #define CSL_CPINTC_VECTOR_ADDRESS_REG_118_VECTOR_ADDRESS_118_RESETVAL (0x00000000u)
  37231. #define CSL_CPINTC_VECTOR_ADDRESS_REG_118_RESETVAL (0x00000000u)
  37232. /* vector_address_reg_119 */
  37233. #define CSL_CPINTC_VECTOR_ADDRESS_REG_119_VECTOR_ADDRESS_119_MASK (0xFFFFFFFFu)
  37234. #define CSL_CPINTC_VECTOR_ADDRESS_REG_119_VECTOR_ADDRESS_119_SHIFT (0x00000000u)
  37235. #define CSL_CPINTC_VECTOR_ADDRESS_REG_119_VECTOR_ADDRESS_119_RESETVAL (0x00000000u)
  37236. #define CSL_CPINTC_VECTOR_ADDRESS_REG_119_RESETVAL (0x00000000u)
  37237. /* vector_address_reg_120 */
  37238. #define CSL_CPINTC_VECTOR_ADDRESS_REG_120_VECTOR_ADDRESS_120_MASK (0xFFFFFFFFu)
  37239. #define CSL_CPINTC_VECTOR_ADDRESS_REG_120_VECTOR_ADDRESS_120_SHIFT (0x00000000u)
  37240. #define CSL_CPINTC_VECTOR_ADDRESS_REG_120_VECTOR_ADDRESS_120_RESETVAL (0x00000000u)
  37241. #define CSL_CPINTC_VECTOR_ADDRESS_REG_120_RESETVAL (0x00000000u)
  37242. /* vector_address_reg_121 */
  37243. #define CSL_CPINTC_VECTOR_ADDRESS_REG_121_VECTOR_ADDRESS_121_MASK (0xFFFFFFFFu)
  37244. #define CSL_CPINTC_VECTOR_ADDRESS_REG_121_VECTOR_ADDRESS_121_SHIFT (0x00000000u)
  37245. #define CSL_CPINTC_VECTOR_ADDRESS_REG_121_VECTOR_ADDRESS_121_RESETVAL (0x00000000u)
  37246. #define CSL_CPINTC_VECTOR_ADDRESS_REG_121_RESETVAL (0x00000000u)
  37247. /* vector_address_reg_122 */
  37248. #define CSL_CPINTC_VECTOR_ADDRESS_REG_122_VECTOR_ADDRESS_122_MASK (0xFFFFFFFFu)
  37249. #define CSL_CPINTC_VECTOR_ADDRESS_REG_122_VECTOR_ADDRESS_122_SHIFT (0x00000000u)
  37250. #define CSL_CPINTC_VECTOR_ADDRESS_REG_122_VECTOR_ADDRESS_122_RESETVAL (0x00000000u)
  37251. #define CSL_CPINTC_VECTOR_ADDRESS_REG_122_RESETVAL (0x00000000u)
  37252. /* vector_address_reg_123 */
  37253. #define CSL_CPINTC_VECTOR_ADDRESS_REG_123_VECTOR_ADDRESS_123_MASK (0xFFFFFFFFu)
  37254. #define CSL_CPINTC_VECTOR_ADDRESS_REG_123_VECTOR_ADDRESS_123_SHIFT (0x00000000u)
  37255. #define CSL_CPINTC_VECTOR_ADDRESS_REG_123_VECTOR_ADDRESS_123_RESETVAL (0x00000000u)
  37256. #define CSL_CPINTC_VECTOR_ADDRESS_REG_123_RESETVAL (0x00000000u)
  37257. /* vector_address_reg_124 */
  37258. #define CSL_CPINTC_VECTOR_ADDRESS_REG_124_VECTOR_ADDRESS_124_MASK (0xFFFFFFFFu)
  37259. #define CSL_CPINTC_VECTOR_ADDRESS_REG_124_VECTOR_ADDRESS_124_SHIFT (0x00000000u)
  37260. #define CSL_CPINTC_VECTOR_ADDRESS_REG_124_VECTOR_ADDRESS_124_RESETVAL (0x00000000u)
  37261. #define CSL_CPINTC_VECTOR_ADDRESS_REG_124_RESETVAL (0x00000000u)
  37262. /* vector_address_reg_125 */
  37263. #define CSL_CPINTC_VECTOR_ADDRESS_REG_125_VECTOR_ADDRESS_125_MASK (0xFFFFFFFFu)
  37264. #define CSL_CPINTC_VECTOR_ADDRESS_REG_125_VECTOR_ADDRESS_125_SHIFT (0x00000000u)
  37265. #define CSL_CPINTC_VECTOR_ADDRESS_REG_125_VECTOR_ADDRESS_125_RESETVAL (0x00000000u)
  37266. #define CSL_CPINTC_VECTOR_ADDRESS_REG_125_RESETVAL (0x00000000u)
  37267. /* vector_address_reg_126 */
  37268. #define CSL_CPINTC_VECTOR_ADDRESS_REG_126_VECTOR_ADDRESS_126_MASK (0xFFFFFFFFu)
  37269. #define CSL_CPINTC_VECTOR_ADDRESS_REG_126_VECTOR_ADDRESS_126_SHIFT (0x00000000u)
  37270. #define CSL_CPINTC_VECTOR_ADDRESS_REG_126_VECTOR_ADDRESS_126_RESETVAL (0x00000000u)
  37271. #define CSL_CPINTC_VECTOR_ADDRESS_REG_126_RESETVAL (0x00000000u)
  37272. /* vector_address_reg_127 */
  37273. #define CSL_CPINTC_VECTOR_ADDRESS_REG_127_VECTOR_ADDRESS_127_MASK (0xFFFFFFFFu)
  37274. #define CSL_CPINTC_VECTOR_ADDRESS_REG_127_VECTOR_ADDRESS_127_SHIFT (0x00000000u)
  37275. #define CSL_CPINTC_VECTOR_ADDRESS_REG_127_VECTOR_ADDRESS_127_RESETVAL (0x00000000u)
  37276. #define CSL_CPINTC_VECTOR_ADDRESS_REG_127_RESETVAL (0x00000000u)
  37277. /* vector_address_reg_128 */
  37278. #define CSL_CPINTC_VECTOR_ADDRESS_REG_128_VECTOR_ADDRESS_128_MASK (0xFFFFFFFFu)
  37279. #define CSL_CPINTC_VECTOR_ADDRESS_REG_128_VECTOR_ADDRESS_128_SHIFT (0x00000000u)
  37280. #define CSL_CPINTC_VECTOR_ADDRESS_REG_128_VECTOR_ADDRESS_128_RESETVAL (0x00000000u)
  37281. #define CSL_CPINTC_VECTOR_ADDRESS_REG_128_RESETVAL (0x00000000u)
  37282. /* vector_address_reg_129 */
  37283. #define CSL_CPINTC_VECTOR_ADDRESS_REG_129_VECTOR_ADDRESS_129_MASK (0xFFFFFFFFu)
  37284. #define CSL_CPINTC_VECTOR_ADDRESS_REG_129_VECTOR_ADDRESS_129_SHIFT (0x00000000u)
  37285. #define CSL_CPINTC_VECTOR_ADDRESS_REG_129_VECTOR_ADDRESS_129_RESETVAL (0x00000000u)
  37286. #define CSL_CPINTC_VECTOR_ADDRESS_REG_129_RESETVAL (0x00000000u)
  37287. /* vector_address_reg_130 */
  37288. #define CSL_CPINTC_VECTOR_ADDRESS_REG_130_VECTOR_ADDRESS_130_MASK (0xFFFFFFFFu)
  37289. #define CSL_CPINTC_VECTOR_ADDRESS_REG_130_VECTOR_ADDRESS_130_SHIFT (0x00000000u)
  37290. #define CSL_CPINTC_VECTOR_ADDRESS_REG_130_VECTOR_ADDRESS_130_RESETVAL (0x00000000u)
  37291. #define CSL_CPINTC_VECTOR_ADDRESS_REG_130_RESETVAL (0x00000000u)
  37292. /* vector_address_reg_131 */
  37293. #define CSL_CPINTC_VECTOR_ADDRESS_REG_131_VECTOR_ADDRESS_131_MASK (0xFFFFFFFFu)
  37294. #define CSL_CPINTC_VECTOR_ADDRESS_REG_131_VECTOR_ADDRESS_131_SHIFT (0x00000000u)
  37295. #define CSL_CPINTC_VECTOR_ADDRESS_REG_131_VECTOR_ADDRESS_131_RESETVAL (0x00000000u)
  37296. #define CSL_CPINTC_VECTOR_ADDRESS_REG_131_RESETVAL (0x00000000u)
  37297. /* vector_address_reg_132 */
  37298. #define CSL_CPINTC_VECTOR_ADDRESS_REG_132_VECTOR_ADDRESS_132_MASK (0xFFFFFFFFu)
  37299. #define CSL_CPINTC_VECTOR_ADDRESS_REG_132_VECTOR_ADDRESS_132_SHIFT (0x00000000u)
  37300. #define CSL_CPINTC_VECTOR_ADDRESS_REG_132_VECTOR_ADDRESS_132_RESETVAL (0x00000000u)
  37301. #define CSL_CPINTC_VECTOR_ADDRESS_REG_132_RESETVAL (0x00000000u)
  37302. /* vector_address_reg_133 */
  37303. #define CSL_CPINTC_VECTOR_ADDRESS_REG_133_VECTOR_ADDRESS_133_MASK (0xFFFFFFFFu)
  37304. #define CSL_CPINTC_VECTOR_ADDRESS_REG_133_VECTOR_ADDRESS_133_SHIFT (0x00000000u)
  37305. #define CSL_CPINTC_VECTOR_ADDRESS_REG_133_VECTOR_ADDRESS_133_RESETVAL (0x00000000u)
  37306. #define CSL_CPINTC_VECTOR_ADDRESS_REG_133_RESETVAL (0x00000000u)
  37307. /* vector_address_reg_134 */
  37308. #define CSL_CPINTC_VECTOR_ADDRESS_REG_134_VECTOR_ADDRESS_134_MASK (0xFFFFFFFFu)
  37309. #define CSL_CPINTC_VECTOR_ADDRESS_REG_134_VECTOR_ADDRESS_134_SHIFT (0x00000000u)
  37310. #define CSL_CPINTC_VECTOR_ADDRESS_REG_134_VECTOR_ADDRESS_134_RESETVAL (0x00000000u)
  37311. #define CSL_CPINTC_VECTOR_ADDRESS_REG_134_RESETVAL (0x00000000u)
  37312. /* vector_address_reg_135 */
  37313. #define CSL_CPINTC_VECTOR_ADDRESS_REG_135_VECTOR_ADDRESS_135_MASK (0xFFFFFFFFu)
  37314. #define CSL_CPINTC_VECTOR_ADDRESS_REG_135_VECTOR_ADDRESS_135_SHIFT (0x00000000u)
  37315. #define CSL_CPINTC_VECTOR_ADDRESS_REG_135_VECTOR_ADDRESS_135_RESETVAL (0x00000000u)
  37316. #define CSL_CPINTC_VECTOR_ADDRESS_REG_135_RESETVAL (0x00000000u)
  37317. /* vector_address_reg_136 */
  37318. #define CSL_CPINTC_VECTOR_ADDRESS_REG_136_VECTOR_ADDRESS_136_MASK (0xFFFFFFFFu)
  37319. #define CSL_CPINTC_VECTOR_ADDRESS_REG_136_VECTOR_ADDRESS_136_SHIFT (0x00000000u)
  37320. #define CSL_CPINTC_VECTOR_ADDRESS_REG_136_VECTOR_ADDRESS_136_RESETVAL (0x00000000u)
  37321. #define CSL_CPINTC_VECTOR_ADDRESS_REG_136_RESETVAL (0x00000000u)
  37322. /* vector_address_reg_137 */
  37323. #define CSL_CPINTC_VECTOR_ADDRESS_REG_137_VECTOR_ADDRESS_137_MASK (0xFFFFFFFFu)
  37324. #define CSL_CPINTC_VECTOR_ADDRESS_REG_137_VECTOR_ADDRESS_137_SHIFT (0x00000000u)
  37325. #define CSL_CPINTC_VECTOR_ADDRESS_REG_137_VECTOR_ADDRESS_137_RESETVAL (0x00000000u)
  37326. #define CSL_CPINTC_VECTOR_ADDRESS_REG_137_RESETVAL (0x00000000u)
  37327. /* vector_address_reg_138 */
  37328. #define CSL_CPINTC_VECTOR_ADDRESS_REG_138_VECTOR_ADDRESS_138_MASK (0xFFFFFFFFu)
  37329. #define CSL_CPINTC_VECTOR_ADDRESS_REG_138_VECTOR_ADDRESS_138_SHIFT (0x00000000u)
  37330. #define CSL_CPINTC_VECTOR_ADDRESS_REG_138_VECTOR_ADDRESS_138_RESETVAL (0x00000000u)
  37331. #define CSL_CPINTC_VECTOR_ADDRESS_REG_138_RESETVAL (0x00000000u)
  37332. /* vector_address_reg_139 */
  37333. #define CSL_CPINTC_VECTOR_ADDRESS_REG_139_VECTOR_ADDRESS_139_MASK (0xFFFFFFFFu)
  37334. #define CSL_CPINTC_VECTOR_ADDRESS_REG_139_VECTOR_ADDRESS_139_SHIFT (0x00000000u)
  37335. #define CSL_CPINTC_VECTOR_ADDRESS_REG_139_VECTOR_ADDRESS_139_RESETVAL (0x00000000u)
  37336. #define CSL_CPINTC_VECTOR_ADDRESS_REG_139_RESETVAL (0x00000000u)
  37337. /* vector_address_reg_140 */
  37338. #define CSL_CPINTC_VECTOR_ADDRESS_REG_140_VECTOR_ADDRESS_140_MASK (0xFFFFFFFFu)
  37339. #define CSL_CPINTC_VECTOR_ADDRESS_REG_140_VECTOR_ADDRESS_140_SHIFT (0x00000000u)
  37340. #define CSL_CPINTC_VECTOR_ADDRESS_REG_140_VECTOR_ADDRESS_140_RESETVAL (0x00000000u)
  37341. #define CSL_CPINTC_VECTOR_ADDRESS_REG_140_RESETVAL (0x00000000u)
  37342. /* vector_address_reg_141 */
  37343. #define CSL_CPINTC_VECTOR_ADDRESS_REG_141_VECTOR_ADDRESS_141_MASK (0xFFFFFFFFu)
  37344. #define CSL_CPINTC_VECTOR_ADDRESS_REG_141_VECTOR_ADDRESS_141_SHIFT (0x00000000u)
  37345. #define CSL_CPINTC_VECTOR_ADDRESS_REG_141_VECTOR_ADDRESS_141_RESETVAL (0x00000000u)
  37346. #define CSL_CPINTC_VECTOR_ADDRESS_REG_141_RESETVAL (0x00000000u)
  37347. /* vector_address_reg_142 */
  37348. #define CSL_CPINTC_VECTOR_ADDRESS_REG_142_VECTOR_ADDRESS_142_MASK (0xFFFFFFFFu)
  37349. #define CSL_CPINTC_VECTOR_ADDRESS_REG_142_VECTOR_ADDRESS_142_SHIFT (0x00000000u)
  37350. #define CSL_CPINTC_VECTOR_ADDRESS_REG_142_VECTOR_ADDRESS_142_RESETVAL (0x00000000u)
  37351. #define CSL_CPINTC_VECTOR_ADDRESS_REG_142_RESETVAL (0x00000000u)
  37352. /* vector_address_reg_143 */
  37353. #define CSL_CPINTC_VECTOR_ADDRESS_REG_143_VECTOR_ADDRESS_143_MASK (0xFFFFFFFFu)
  37354. #define CSL_CPINTC_VECTOR_ADDRESS_REG_143_VECTOR_ADDRESS_143_SHIFT (0x00000000u)
  37355. #define CSL_CPINTC_VECTOR_ADDRESS_REG_143_VECTOR_ADDRESS_143_RESETVAL (0x00000000u)
  37356. #define CSL_CPINTC_VECTOR_ADDRESS_REG_143_RESETVAL (0x00000000u)
  37357. /* vector_address_reg_144 */
  37358. #define CSL_CPINTC_VECTOR_ADDRESS_REG_144_VECTOR_ADDRESS_144_MASK (0xFFFFFFFFu)
  37359. #define CSL_CPINTC_VECTOR_ADDRESS_REG_144_VECTOR_ADDRESS_144_SHIFT (0x00000000u)
  37360. #define CSL_CPINTC_VECTOR_ADDRESS_REG_144_VECTOR_ADDRESS_144_RESETVAL (0x00000000u)
  37361. #define CSL_CPINTC_VECTOR_ADDRESS_REG_144_RESETVAL (0x00000000u)
  37362. /* vector_address_reg_145 */
  37363. #define CSL_CPINTC_VECTOR_ADDRESS_REG_145_VECTOR_ADDRESS_145_MASK (0xFFFFFFFFu)
  37364. #define CSL_CPINTC_VECTOR_ADDRESS_REG_145_VECTOR_ADDRESS_145_SHIFT (0x00000000u)
  37365. #define CSL_CPINTC_VECTOR_ADDRESS_REG_145_VECTOR_ADDRESS_145_RESETVAL (0x00000000u)
  37366. #define CSL_CPINTC_VECTOR_ADDRESS_REG_145_RESETVAL (0x00000000u)
  37367. /* vector_address_reg_146 */
  37368. #define CSL_CPINTC_VECTOR_ADDRESS_REG_146_VECTOR_ADDRESS_146_MASK (0xFFFFFFFFu)
  37369. #define CSL_CPINTC_VECTOR_ADDRESS_REG_146_VECTOR_ADDRESS_146_SHIFT (0x00000000u)
  37370. #define CSL_CPINTC_VECTOR_ADDRESS_REG_146_VECTOR_ADDRESS_146_RESETVAL (0x00000000u)
  37371. #define CSL_CPINTC_VECTOR_ADDRESS_REG_146_RESETVAL (0x00000000u)
  37372. /* vector_address_reg_147 */
  37373. #define CSL_CPINTC_VECTOR_ADDRESS_REG_147_VECTOR_ADDRESS_147_MASK (0xFFFFFFFFu)
  37374. #define CSL_CPINTC_VECTOR_ADDRESS_REG_147_VECTOR_ADDRESS_147_SHIFT (0x00000000u)
  37375. #define CSL_CPINTC_VECTOR_ADDRESS_REG_147_VECTOR_ADDRESS_147_RESETVAL (0x00000000u)
  37376. #define CSL_CPINTC_VECTOR_ADDRESS_REG_147_RESETVAL (0x00000000u)
  37377. /* vector_address_reg_148 */
  37378. #define CSL_CPINTC_VECTOR_ADDRESS_REG_148_VECTOR_ADDRESS_148_MASK (0xFFFFFFFFu)
  37379. #define CSL_CPINTC_VECTOR_ADDRESS_REG_148_VECTOR_ADDRESS_148_SHIFT (0x00000000u)
  37380. #define CSL_CPINTC_VECTOR_ADDRESS_REG_148_VECTOR_ADDRESS_148_RESETVAL (0x00000000u)
  37381. #define CSL_CPINTC_VECTOR_ADDRESS_REG_148_RESETVAL (0x00000000u)
  37382. /* vector_address_reg_149 */
  37383. #define CSL_CPINTC_VECTOR_ADDRESS_REG_149_VECTOR_ADDRESS_149_MASK (0xFFFFFFFFu)
  37384. #define CSL_CPINTC_VECTOR_ADDRESS_REG_149_VECTOR_ADDRESS_149_SHIFT (0x00000000u)
  37385. #define CSL_CPINTC_VECTOR_ADDRESS_REG_149_VECTOR_ADDRESS_149_RESETVAL (0x00000000u)
  37386. #define CSL_CPINTC_VECTOR_ADDRESS_REG_149_RESETVAL (0x00000000u)
  37387. /* vector_address_reg_150 */
  37388. #define CSL_CPINTC_VECTOR_ADDRESS_REG_150_VECTOR_ADDRESS_150_MASK (0xFFFFFFFFu)
  37389. #define CSL_CPINTC_VECTOR_ADDRESS_REG_150_VECTOR_ADDRESS_150_SHIFT (0x00000000u)
  37390. #define CSL_CPINTC_VECTOR_ADDRESS_REG_150_VECTOR_ADDRESS_150_RESETVAL (0x00000000u)
  37391. #define CSL_CPINTC_VECTOR_ADDRESS_REG_150_RESETVAL (0x00000000u)
  37392. /* vector_address_reg_151 */
  37393. #define CSL_CPINTC_VECTOR_ADDRESS_REG_151_VECTOR_ADDRESS_151_MASK (0xFFFFFFFFu)
  37394. #define CSL_CPINTC_VECTOR_ADDRESS_REG_151_VECTOR_ADDRESS_151_SHIFT (0x00000000u)
  37395. #define CSL_CPINTC_VECTOR_ADDRESS_REG_151_VECTOR_ADDRESS_151_RESETVAL (0x00000000u)
  37396. #define CSL_CPINTC_VECTOR_ADDRESS_REG_151_RESETVAL (0x00000000u)
  37397. /* vector_address_reg_152 */
  37398. #define CSL_CPINTC_VECTOR_ADDRESS_REG_152_VECTOR_ADDRESS_152_MASK (0xFFFFFFFFu)
  37399. #define CSL_CPINTC_VECTOR_ADDRESS_REG_152_VECTOR_ADDRESS_152_SHIFT (0x00000000u)
  37400. #define CSL_CPINTC_VECTOR_ADDRESS_REG_152_VECTOR_ADDRESS_152_RESETVAL (0x00000000u)
  37401. #define CSL_CPINTC_VECTOR_ADDRESS_REG_152_RESETVAL (0x00000000u)
  37402. /* vector_address_reg_153 */
  37403. #define CSL_CPINTC_VECTOR_ADDRESS_REG_153_VECTOR_ADDRESS_153_MASK (0xFFFFFFFFu)
  37404. #define CSL_CPINTC_VECTOR_ADDRESS_REG_153_VECTOR_ADDRESS_153_SHIFT (0x00000000u)
  37405. #define CSL_CPINTC_VECTOR_ADDRESS_REG_153_VECTOR_ADDRESS_153_RESETVAL (0x00000000u)
  37406. #define CSL_CPINTC_VECTOR_ADDRESS_REG_153_RESETVAL (0x00000000u)
  37407. /* vector_address_reg_154 */
  37408. #define CSL_CPINTC_VECTOR_ADDRESS_REG_154_VECTOR_ADDRESS_154_MASK (0xFFFFFFFFu)
  37409. #define CSL_CPINTC_VECTOR_ADDRESS_REG_154_VECTOR_ADDRESS_154_SHIFT (0x00000000u)
  37410. #define CSL_CPINTC_VECTOR_ADDRESS_REG_154_VECTOR_ADDRESS_154_RESETVAL (0x00000000u)
  37411. #define CSL_CPINTC_VECTOR_ADDRESS_REG_154_RESETVAL (0x00000000u)
  37412. /* vector_address_reg_155 */
  37413. #define CSL_CPINTC_VECTOR_ADDRESS_REG_155_VECTOR_ADDRESS_155_MASK (0xFFFFFFFFu)
  37414. #define CSL_CPINTC_VECTOR_ADDRESS_REG_155_VECTOR_ADDRESS_155_SHIFT (0x00000000u)
  37415. #define CSL_CPINTC_VECTOR_ADDRESS_REG_155_VECTOR_ADDRESS_155_RESETVAL (0x00000000u)
  37416. #define CSL_CPINTC_VECTOR_ADDRESS_REG_155_RESETVAL (0x00000000u)
  37417. /* vector_address_reg_156 */
  37418. #define CSL_CPINTC_VECTOR_ADDRESS_REG_156_VECTOR_ADDRESS_156_MASK (0xFFFFFFFFu)
  37419. #define CSL_CPINTC_VECTOR_ADDRESS_REG_156_VECTOR_ADDRESS_156_SHIFT (0x00000000u)
  37420. #define CSL_CPINTC_VECTOR_ADDRESS_REG_156_VECTOR_ADDRESS_156_RESETVAL (0x00000000u)
  37421. #define CSL_CPINTC_VECTOR_ADDRESS_REG_156_RESETVAL (0x00000000u)
  37422. /* vector_address_reg_157 */
  37423. #define CSL_CPINTC_VECTOR_ADDRESS_REG_157_VECTOR_ADDRESS_157_MASK (0xFFFFFFFFu)
  37424. #define CSL_CPINTC_VECTOR_ADDRESS_REG_157_VECTOR_ADDRESS_157_SHIFT (0x00000000u)
  37425. #define CSL_CPINTC_VECTOR_ADDRESS_REG_157_VECTOR_ADDRESS_157_RESETVAL (0x00000000u)
  37426. #define CSL_CPINTC_VECTOR_ADDRESS_REG_157_RESETVAL (0x00000000u)
  37427. /* vector_address_reg_158 */
  37428. #define CSL_CPINTC_VECTOR_ADDRESS_REG_158_VECTOR_ADDRESS_158_MASK (0xFFFFFFFFu)
  37429. #define CSL_CPINTC_VECTOR_ADDRESS_REG_158_VECTOR_ADDRESS_158_SHIFT (0x00000000u)
  37430. #define CSL_CPINTC_VECTOR_ADDRESS_REG_158_VECTOR_ADDRESS_158_RESETVAL (0x00000000u)
  37431. #define CSL_CPINTC_VECTOR_ADDRESS_REG_158_RESETVAL (0x00000000u)
  37432. /* vector_address_reg_159 */
  37433. #define CSL_CPINTC_VECTOR_ADDRESS_REG_159_VECTOR_ADDRESS_159_MASK (0xFFFFFFFFu)
  37434. #define CSL_CPINTC_VECTOR_ADDRESS_REG_159_VECTOR_ADDRESS_159_SHIFT (0x00000000u)
  37435. #define CSL_CPINTC_VECTOR_ADDRESS_REG_159_VECTOR_ADDRESS_159_RESETVAL (0x00000000u)
  37436. #define CSL_CPINTC_VECTOR_ADDRESS_REG_159_RESETVAL (0x00000000u)
  37437. /* vector_address_reg_160 */
  37438. #define CSL_CPINTC_VECTOR_ADDRESS_REG_160_VECTOR_ADDRESS_160_MASK (0xFFFFFFFFu)
  37439. #define CSL_CPINTC_VECTOR_ADDRESS_REG_160_VECTOR_ADDRESS_160_SHIFT (0x00000000u)
  37440. #define CSL_CPINTC_VECTOR_ADDRESS_REG_160_VECTOR_ADDRESS_160_RESETVAL (0x00000000u)
  37441. #define CSL_CPINTC_VECTOR_ADDRESS_REG_160_RESETVAL (0x00000000u)
  37442. /* vector_address_reg_161 */
  37443. #define CSL_CPINTC_VECTOR_ADDRESS_REG_161_VECTOR_ADDRESS_161_MASK (0xFFFFFFFFu)
  37444. #define CSL_CPINTC_VECTOR_ADDRESS_REG_161_VECTOR_ADDRESS_161_SHIFT (0x00000000u)
  37445. #define CSL_CPINTC_VECTOR_ADDRESS_REG_161_VECTOR_ADDRESS_161_RESETVAL (0x00000000u)
  37446. #define CSL_CPINTC_VECTOR_ADDRESS_REG_161_RESETVAL (0x00000000u)
  37447. /* vector_address_reg_162 */
  37448. #define CSL_CPINTC_VECTOR_ADDRESS_REG_162_VECTOR_ADDRESS_162_MASK (0xFFFFFFFFu)
  37449. #define CSL_CPINTC_VECTOR_ADDRESS_REG_162_VECTOR_ADDRESS_162_SHIFT (0x00000000u)
  37450. #define CSL_CPINTC_VECTOR_ADDRESS_REG_162_VECTOR_ADDRESS_162_RESETVAL (0x00000000u)
  37451. #define CSL_CPINTC_VECTOR_ADDRESS_REG_162_RESETVAL (0x00000000u)
  37452. /* vector_address_reg_163 */
  37453. #define CSL_CPINTC_VECTOR_ADDRESS_REG_163_VECTOR_ADDRESS_163_MASK (0xFFFFFFFFu)
  37454. #define CSL_CPINTC_VECTOR_ADDRESS_REG_163_VECTOR_ADDRESS_163_SHIFT (0x00000000u)
  37455. #define CSL_CPINTC_VECTOR_ADDRESS_REG_163_VECTOR_ADDRESS_163_RESETVAL (0x00000000u)
  37456. #define CSL_CPINTC_VECTOR_ADDRESS_REG_163_RESETVAL (0x00000000u)
  37457. /* vector_address_reg_164 */
  37458. #define CSL_CPINTC_VECTOR_ADDRESS_REG_164_VECTOR_ADDRESS_164_MASK (0xFFFFFFFFu)
  37459. #define CSL_CPINTC_VECTOR_ADDRESS_REG_164_VECTOR_ADDRESS_164_SHIFT (0x00000000u)
  37460. #define CSL_CPINTC_VECTOR_ADDRESS_REG_164_VECTOR_ADDRESS_164_RESETVAL (0x00000000u)
  37461. #define CSL_CPINTC_VECTOR_ADDRESS_REG_164_RESETVAL (0x00000000u)
  37462. /* vector_address_reg_165 */
  37463. #define CSL_CPINTC_VECTOR_ADDRESS_REG_165_VECTOR_ADDRESS_165_MASK (0xFFFFFFFFu)
  37464. #define CSL_CPINTC_VECTOR_ADDRESS_REG_165_VECTOR_ADDRESS_165_SHIFT (0x00000000u)
  37465. #define CSL_CPINTC_VECTOR_ADDRESS_REG_165_VECTOR_ADDRESS_165_RESETVAL (0x00000000u)
  37466. #define CSL_CPINTC_VECTOR_ADDRESS_REG_165_RESETVAL (0x00000000u)
  37467. /* vector_address_reg_166 */
  37468. #define CSL_CPINTC_VECTOR_ADDRESS_REG_166_VECTOR_ADDRESS_166_MASK (0xFFFFFFFFu)
  37469. #define CSL_CPINTC_VECTOR_ADDRESS_REG_166_VECTOR_ADDRESS_166_SHIFT (0x00000000u)
  37470. #define CSL_CPINTC_VECTOR_ADDRESS_REG_166_VECTOR_ADDRESS_166_RESETVAL (0x00000000u)
  37471. #define CSL_CPINTC_VECTOR_ADDRESS_REG_166_RESETVAL (0x00000000u)
  37472. /* vector_address_reg_167 */
  37473. #define CSL_CPINTC_VECTOR_ADDRESS_REG_167_VECTOR_ADDRESS_167_MASK (0xFFFFFFFFu)
  37474. #define CSL_CPINTC_VECTOR_ADDRESS_REG_167_VECTOR_ADDRESS_167_SHIFT (0x00000000u)
  37475. #define CSL_CPINTC_VECTOR_ADDRESS_REG_167_VECTOR_ADDRESS_167_RESETVAL (0x00000000u)
  37476. #define CSL_CPINTC_VECTOR_ADDRESS_REG_167_RESETVAL (0x00000000u)
  37477. /* vector_address_reg_168 */
  37478. #define CSL_CPINTC_VECTOR_ADDRESS_REG_168_VECTOR_ADDRESS_168_MASK (0xFFFFFFFFu)
  37479. #define CSL_CPINTC_VECTOR_ADDRESS_REG_168_VECTOR_ADDRESS_168_SHIFT (0x00000000u)
  37480. #define CSL_CPINTC_VECTOR_ADDRESS_REG_168_VECTOR_ADDRESS_168_RESETVAL (0x00000000u)
  37481. #define CSL_CPINTC_VECTOR_ADDRESS_REG_168_RESETVAL (0x00000000u)
  37482. /* vector_address_reg_169 */
  37483. #define CSL_CPINTC_VECTOR_ADDRESS_REG_169_VECTOR_ADDRESS_169_MASK (0xFFFFFFFFu)
  37484. #define CSL_CPINTC_VECTOR_ADDRESS_REG_169_VECTOR_ADDRESS_169_SHIFT (0x00000000u)
  37485. #define CSL_CPINTC_VECTOR_ADDRESS_REG_169_VECTOR_ADDRESS_169_RESETVAL (0x00000000u)
  37486. #define CSL_CPINTC_VECTOR_ADDRESS_REG_169_RESETVAL (0x00000000u)
  37487. /* vector_address_reg_170 */
  37488. #define CSL_CPINTC_VECTOR_ADDRESS_REG_170_VECTOR_ADDRESS_170_MASK (0xFFFFFFFFu)
  37489. #define CSL_CPINTC_VECTOR_ADDRESS_REG_170_VECTOR_ADDRESS_170_SHIFT (0x00000000u)
  37490. #define CSL_CPINTC_VECTOR_ADDRESS_REG_170_VECTOR_ADDRESS_170_RESETVAL (0x00000000u)
  37491. #define CSL_CPINTC_VECTOR_ADDRESS_REG_170_RESETVAL (0x00000000u)
  37492. /* vector_address_reg_171 */
  37493. #define CSL_CPINTC_VECTOR_ADDRESS_REG_171_VECTOR_ADDRESS_171_MASK (0xFFFFFFFFu)
  37494. #define CSL_CPINTC_VECTOR_ADDRESS_REG_171_VECTOR_ADDRESS_171_SHIFT (0x00000000u)
  37495. #define CSL_CPINTC_VECTOR_ADDRESS_REG_171_VECTOR_ADDRESS_171_RESETVAL (0x00000000u)
  37496. #define CSL_CPINTC_VECTOR_ADDRESS_REG_171_RESETVAL (0x00000000u)
  37497. /* vector_address_reg_172 */
  37498. #define CSL_CPINTC_VECTOR_ADDRESS_REG_172_VECTOR_ADDRESS_172_MASK (0xFFFFFFFFu)
  37499. #define CSL_CPINTC_VECTOR_ADDRESS_REG_172_VECTOR_ADDRESS_172_SHIFT (0x00000000u)
  37500. #define CSL_CPINTC_VECTOR_ADDRESS_REG_172_VECTOR_ADDRESS_172_RESETVAL (0x00000000u)
  37501. #define CSL_CPINTC_VECTOR_ADDRESS_REG_172_RESETVAL (0x00000000u)
  37502. /* vector_address_reg_173 */
  37503. #define CSL_CPINTC_VECTOR_ADDRESS_REG_173_VECTOR_ADDRESS_173_MASK (0xFFFFFFFFu)
  37504. #define CSL_CPINTC_VECTOR_ADDRESS_REG_173_VECTOR_ADDRESS_173_SHIFT (0x00000000u)
  37505. #define CSL_CPINTC_VECTOR_ADDRESS_REG_173_VECTOR_ADDRESS_173_RESETVAL (0x00000000u)
  37506. #define CSL_CPINTC_VECTOR_ADDRESS_REG_173_RESETVAL (0x00000000u)
  37507. /* vector_address_reg_174 */
  37508. #define CSL_CPINTC_VECTOR_ADDRESS_REG_174_VECTOR_ADDRESS_174_MASK (0xFFFFFFFFu)
  37509. #define CSL_CPINTC_VECTOR_ADDRESS_REG_174_VECTOR_ADDRESS_174_SHIFT (0x00000000u)
  37510. #define CSL_CPINTC_VECTOR_ADDRESS_REG_174_VECTOR_ADDRESS_174_RESETVAL (0x00000000u)
  37511. #define CSL_CPINTC_VECTOR_ADDRESS_REG_174_RESETVAL (0x00000000u)
  37512. /* vector_address_reg_175 */
  37513. #define CSL_CPINTC_VECTOR_ADDRESS_REG_175_VECTOR_ADDRESS_175_MASK (0xFFFFFFFFu)
  37514. #define CSL_CPINTC_VECTOR_ADDRESS_REG_175_VECTOR_ADDRESS_175_SHIFT (0x00000000u)
  37515. #define CSL_CPINTC_VECTOR_ADDRESS_REG_175_VECTOR_ADDRESS_175_RESETVAL (0x00000000u)
  37516. #define CSL_CPINTC_VECTOR_ADDRESS_REG_175_RESETVAL (0x00000000u)
  37517. /* vector_address_reg_176 */
  37518. #define CSL_CPINTC_VECTOR_ADDRESS_REG_176_VECTOR_ADDRESS_176_MASK (0xFFFFFFFFu)
  37519. #define CSL_CPINTC_VECTOR_ADDRESS_REG_176_VECTOR_ADDRESS_176_SHIFT (0x00000000u)
  37520. #define CSL_CPINTC_VECTOR_ADDRESS_REG_176_VECTOR_ADDRESS_176_RESETVAL (0x00000000u)
  37521. #define CSL_CPINTC_VECTOR_ADDRESS_REG_176_RESETVAL (0x00000000u)
  37522. /* vector_address_reg_177 */
  37523. #define CSL_CPINTC_VECTOR_ADDRESS_REG_177_VECTOR_ADDRESS_177_MASK (0xFFFFFFFFu)
  37524. #define CSL_CPINTC_VECTOR_ADDRESS_REG_177_VECTOR_ADDRESS_177_SHIFT (0x00000000u)
  37525. #define CSL_CPINTC_VECTOR_ADDRESS_REG_177_VECTOR_ADDRESS_177_RESETVAL (0x00000000u)
  37526. #define CSL_CPINTC_VECTOR_ADDRESS_REG_177_RESETVAL (0x00000000u)
  37527. /* vector_address_reg_178 */
  37528. #define CSL_CPINTC_VECTOR_ADDRESS_REG_178_VECTOR_ADDRESS_178_MASK (0xFFFFFFFFu)
  37529. #define CSL_CPINTC_VECTOR_ADDRESS_REG_178_VECTOR_ADDRESS_178_SHIFT (0x00000000u)
  37530. #define CSL_CPINTC_VECTOR_ADDRESS_REG_178_VECTOR_ADDRESS_178_RESETVAL (0x00000000u)
  37531. #define CSL_CPINTC_VECTOR_ADDRESS_REG_178_RESETVAL (0x00000000u)
  37532. /* vector_address_reg_179 */
  37533. #define CSL_CPINTC_VECTOR_ADDRESS_REG_179_VECTOR_ADDRESS_179_MASK (0xFFFFFFFFu)
  37534. #define CSL_CPINTC_VECTOR_ADDRESS_REG_179_VECTOR_ADDRESS_179_SHIFT (0x00000000u)
  37535. #define CSL_CPINTC_VECTOR_ADDRESS_REG_179_VECTOR_ADDRESS_179_RESETVAL (0x00000000u)
  37536. #define CSL_CPINTC_VECTOR_ADDRESS_REG_179_RESETVAL (0x00000000u)
  37537. /* vector_address_reg_180 */
  37538. #define CSL_CPINTC_VECTOR_ADDRESS_REG_180_VECTOR_ADDRESS_180_MASK (0xFFFFFFFFu)
  37539. #define CSL_CPINTC_VECTOR_ADDRESS_REG_180_VECTOR_ADDRESS_180_SHIFT (0x00000000u)
  37540. #define CSL_CPINTC_VECTOR_ADDRESS_REG_180_VECTOR_ADDRESS_180_RESETVAL (0x00000000u)
  37541. #define CSL_CPINTC_VECTOR_ADDRESS_REG_180_RESETVAL (0x00000000u)
  37542. /* vector_address_reg_181 */
  37543. #define CSL_CPINTC_VECTOR_ADDRESS_REG_181_VECTOR_ADDRESS_181_MASK (0xFFFFFFFFu)
  37544. #define CSL_CPINTC_VECTOR_ADDRESS_REG_181_VECTOR_ADDRESS_181_SHIFT (0x00000000u)
  37545. #define CSL_CPINTC_VECTOR_ADDRESS_REG_181_VECTOR_ADDRESS_181_RESETVAL (0x00000000u)
  37546. #define CSL_CPINTC_VECTOR_ADDRESS_REG_181_RESETVAL (0x00000000u)
  37547. /* vector_address_reg_182 */
  37548. #define CSL_CPINTC_VECTOR_ADDRESS_REG_182_VECTOR_ADDRESS_182_MASK (0xFFFFFFFFu)
  37549. #define CSL_CPINTC_VECTOR_ADDRESS_REG_182_VECTOR_ADDRESS_182_SHIFT (0x00000000u)
  37550. #define CSL_CPINTC_VECTOR_ADDRESS_REG_182_VECTOR_ADDRESS_182_RESETVAL (0x00000000u)
  37551. #define CSL_CPINTC_VECTOR_ADDRESS_REG_182_RESETVAL (0x00000000u)
  37552. /* vector_address_reg_183 */
  37553. #define CSL_CPINTC_VECTOR_ADDRESS_REG_183_VECTOR_ADDRESS_183_MASK (0xFFFFFFFFu)
  37554. #define CSL_CPINTC_VECTOR_ADDRESS_REG_183_VECTOR_ADDRESS_183_SHIFT (0x00000000u)
  37555. #define CSL_CPINTC_VECTOR_ADDRESS_REG_183_VECTOR_ADDRESS_183_RESETVAL (0x00000000u)
  37556. #define CSL_CPINTC_VECTOR_ADDRESS_REG_183_RESETVAL (0x00000000u)
  37557. /* vector_address_reg_184 */
  37558. #define CSL_CPINTC_VECTOR_ADDRESS_REG_184_VECTOR_ADDRESS_184_MASK (0xFFFFFFFFu)
  37559. #define CSL_CPINTC_VECTOR_ADDRESS_REG_184_VECTOR_ADDRESS_184_SHIFT (0x00000000u)
  37560. #define CSL_CPINTC_VECTOR_ADDRESS_REG_184_VECTOR_ADDRESS_184_RESETVAL (0x00000000u)
  37561. #define CSL_CPINTC_VECTOR_ADDRESS_REG_184_RESETVAL (0x00000000u)
  37562. /* vector_address_reg_185 */
  37563. #define CSL_CPINTC_VECTOR_ADDRESS_REG_185_VECTOR_ADDRESS_185_MASK (0xFFFFFFFFu)
  37564. #define CSL_CPINTC_VECTOR_ADDRESS_REG_185_VECTOR_ADDRESS_185_SHIFT (0x00000000u)
  37565. #define CSL_CPINTC_VECTOR_ADDRESS_REG_185_VECTOR_ADDRESS_185_RESETVAL (0x00000000u)
  37566. #define CSL_CPINTC_VECTOR_ADDRESS_REG_185_RESETVAL (0x00000000u)
  37567. /* vector_address_reg_186 */
  37568. #define CSL_CPINTC_VECTOR_ADDRESS_REG_186_VECTOR_ADDRESS_186_MASK (0xFFFFFFFFu)
  37569. #define CSL_CPINTC_VECTOR_ADDRESS_REG_186_VECTOR_ADDRESS_186_SHIFT (0x00000000u)
  37570. #define CSL_CPINTC_VECTOR_ADDRESS_REG_186_VECTOR_ADDRESS_186_RESETVAL (0x00000000u)
  37571. #define CSL_CPINTC_VECTOR_ADDRESS_REG_186_RESETVAL (0x00000000u)
  37572. /* vector_address_reg_187 */
  37573. #define CSL_CPINTC_VECTOR_ADDRESS_REG_187_VECTOR_ADDRESS_187_MASK (0xFFFFFFFFu)
  37574. #define CSL_CPINTC_VECTOR_ADDRESS_REG_187_VECTOR_ADDRESS_187_SHIFT (0x00000000u)
  37575. #define CSL_CPINTC_VECTOR_ADDRESS_REG_187_VECTOR_ADDRESS_187_RESETVAL (0x00000000u)
  37576. #define CSL_CPINTC_VECTOR_ADDRESS_REG_187_RESETVAL (0x00000000u)
  37577. /* vector_address_reg_188 */
  37578. #define CSL_CPINTC_VECTOR_ADDRESS_REG_188_VECTOR_ADDRESS_188_MASK (0xFFFFFFFFu)
  37579. #define CSL_CPINTC_VECTOR_ADDRESS_REG_188_VECTOR_ADDRESS_188_SHIFT (0x00000000u)
  37580. #define CSL_CPINTC_VECTOR_ADDRESS_REG_188_VECTOR_ADDRESS_188_RESETVAL (0x00000000u)
  37581. #define CSL_CPINTC_VECTOR_ADDRESS_REG_188_RESETVAL (0x00000000u)
  37582. /* vector_address_reg_189 */
  37583. #define CSL_CPINTC_VECTOR_ADDRESS_REG_189_VECTOR_ADDRESS_189_MASK (0xFFFFFFFFu)
  37584. #define CSL_CPINTC_VECTOR_ADDRESS_REG_189_VECTOR_ADDRESS_189_SHIFT (0x00000000u)
  37585. #define CSL_CPINTC_VECTOR_ADDRESS_REG_189_VECTOR_ADDRESS_189_RESETVAL (0x00000000u)
  37586. #define CSL_CPINTC_VECTOR_ADDRESS_REG_189_RESETVAL (0x00000000u)
  37587. /* vector_address_reg_190 */
  37588. #define CSL_CPINTC_VECTOR_ADDRESS_REG_190_VECTOR_ADDRESS_190_MASK (0xFFFFFFFFu)
  37589. #define CSL_CPINTC_VECTOR_ADDRESS_REG_190_VECTOR_ADDRESS_190_SHIFT (0x00000000u)
  37590. #define CSL_CPINTC_VECTOR_ADDRESS_REG_190_VECTOR_ADDRESS_190_RESETVAL (0x00000000u)
  37591. #define CSL_CPINTC_VECTOR_ADDRESS_REG_190_RESETVAL (0x00000000u)
  37592. /* vector_address_reg_191 */
  37593. #define CSL_CPINTC_VECTOR_ADDRESS_REG_191_VECTOR_ADDRESS_191_MASK (0xFFFFFFFFu)
  37594. #define CSL_CPINTC_VECTOR_ADDRESS_REG_191_VECTOR_ADDRESS_191_SHIFT (0x00000000u)
  37595. #define CSL_CPINTC_VECTOR_ADDRESS_REG_191_VECTOR_ADDRESS_191_RESETVAL (0x00000000u)
  37596. #define CSL_CPINTC_VECTOR_ADDRESS_REG_191_RESETVAL (0x00000000u)
  37597. /* vector_address_reg_192 */
  37598. #define CSL_CPINTC_VECTOR_ADDRESS_REG_192_VECTOR_ADDRESS_192_MASK (0xFFFFFFFFu)
  37599. #define CSL_CPINTC_VECTOR_ADDRESS_REG_192_VECTOR_ADDRESS_192_SHIFT (0x00000000u)
  37600. #define CSL_CPINTC_VECTOR_ADDRESS_REG_192_VECTOR_ADDRESS_192_RESETVAL (0x00000000u)
  37601. #define CSL_CPINTC_VECTOR_ADDRESS_REG_192_RESETVAL (0x00000000u)
  37602. /* vector_address_reg_193 */
  37603. #define CSL_CPINTC_VECTOR_ADDRESS_REG_193_VECTOR_ADDRESS_193_MASK (0xFFFFFFFFu)
  37604. #define CSL_CPINTC_VECTOR_ADDRESS_REG_193_VECTOR_ADDRESS_193_SHIFT (0x00000000u)
  37605. #define CSL_CPINTC_VECTOR_ADDRESS_REG_193_VECTOR_ADDRESS_193_RESETVAL (0x00000000u)
  37606. #define CSL_CPINTC_VECTOR_ADDRESS_REG_193_RESETVAL (0x00000000u)
  37607. /* vector_address_reg_194 */
  37608. #define CSL_CPINTC_VECTOR_ADDRESS_REG_194_VECTOR_ADDRESS_194_MASK (0xFFFFFFFFu)
  37609. #define CSL_CPINTC_VECTOR_ADDRESS_REG_194_VECTOR_ADDRESS_194_SHIFT (0x00000000u)
  37610. #define CSL_CPINTC_VECTOR_ADDRESS_REG_194_VECTOR_ADDRESS_194_RESETVAL (0x00000000u)
  37611. #define CSL_CPINTC_VECTOR_ADDRESS_REG_194_RESETVAL (0x00000000u)
  37612. /* vector_address_reg_195 */
  37613. #define CSL_CPINTC_VECTOR_ADDRESS_REG_195_VECTOR_ADDRESS_195_MASK (0xFFFFFFFFu)
  37614. #define CSL_CPINTC_VECTOR_ADDRESS_REG_195_VECTOR_ADDRESS_195_SHIFT (0x00000000u)
  37615. #define CSL_CPINTC_VECTOR_ADDRESS_REG_195_VECTOR_ADDRESS_195_RESETVAL (0x00000000u)
  37616. #define CSL_CPINTC_VECTOR_ADDRESS_REG_195_RESETVAL (0x00000000u)
  37617. /* vector_address_reg_196 */
  37618. #define CSL_CPINTC_VECTOR_ADDRESS_REG_196_VECTOR_ADDRESS_196_MASK (0xFFFFFFFFu)
  37619. #define CSL_CPINTC_VECTOR_ADDRESS_REG_196_VECTOR_ADDRESS_196_SHIFT (0x00000000u)
  37620. #define CSL_CPINTC_VECTOR_ADDRESS_REG_196_VECTOR_ADDRESS_196_RESETVAL (0x00000000u)
  37621. #define CSL_CPINTC_VECTOR_ADDRESS_REG_196_RESETVAL (0x00000000u)
  37622. /* vector_address_reg_197 */
  37623. #define CSL_CPINTC_VECTOR_ADDRESS_REG_197_VECTOR_ADDRESS_197_MASK (0xFFFFFFFFu)
  37624. #define CSL_CPINTC_VECTOR_ADDRESS_REG_197_VECTOR_ADDRESS_197_SHIFT (0x00000000u)
  37625. #define CSL_CPINTC_VECTOR_ADDRESS_REG_197_VECTOR_ADDRESS_197_RESETVAL (0x00000000u)
  37626. #define CSL_CPINTC_VECTOR_ADDRESS_REG_197_RESETVAL (0x00000000u)
  37627. /* vector_address_reg_198 */
  37628. #define CSL_CPINTC_VECTOR_ADDRESS_REG_198_VECTOR_ADDRESS_198_MASK (0xFFFFFFFFu)
  37629. #define CSL_CPINTC_VECTOR_ADDRESS_REG_198_VECTOR_ADDRESS_198_SHIFT (0x00000000u)
  37630. #define CSL_CPINTC_VECTOR_ADDRESS_REG_198_VECTOR_ADDRESS_198_RESETVAL (0x00000000u)
  37631. #define CSL_CPINTC_VECTOR_ADDRESS_REG_198_RESETVAL (0x00000000u)
  37632. /* vector_address_reg_199 */
  37633. #define CSL_CPINTC_VECTOR_ADDRESS_REG_199_VECTOR_ADDRESS_199_MASK (0xFFFFFFFFu)
  37634. #define CSL_CPINTC_VECTOR_ADDRESS_REG_199_VECTOR_ADDRESS_199_SHIFT (0x00000000u)
  37635. #define CSL_CPINTC_VECTOR_ADDRESS_REG_199_VECTOR_ADDRESS_199_RESETVAL (0x00000000u)
  37636. #define CSL_CPINTC_VECTOR_ADDRESS_REG_199_RESETVAL (0x00000000u)
  37637. /* vector_address_reg_200 */
  37638. #define CSL_CPINTC_VECTOR_ADDRESS_REG_200_VECTOR_ADDRESS_200_MASK (0xFFFFFFFFu)
  37639. #define CSL_CPINTC_VECTOR_ADDRESS_REG_200_VECTOR_ADDRESS_200_SHIFT (0x00000000u)
  37640. #define CSL_CPINTC_VECTOR_ADDRESS_REG_200_VECTOR_ADDRESS_200_RESETVAL (0x00000000u)
  37641. #define CSL_CPINTC_VECTOR_ADDRESS_REG_200_RESETVAL (0x00000000u)
  37642. /* vector_address_reg_201 */
  37643. #define CSL_CPINTC_VECTOR_ADDRESS_REG_201_VECTOR_ADDRESS_201_MASK (0xFFFFFFFFu)
  37644. #define CSL_CPINTC_VECTOR_ADDRESS_REG_201_VECTOR_ADDRESS_201_SHIFT (0x00000000u)
  37645. #define CSL_CPINTC_VECTOR_ADDRESS_REG_201_VECTOR_ADDRESS_201_RESETVAL (0x00000000u)
  37646. #define CSL_CPINTC_VECTOR_ADDRESS_REG_201_RESETVAL (0x00000000u)
  37647. /* vector_address_reg_202 */
  37648. #define CSL_CPINTC_VECTOR_ADDRESS_REG_202_VECTOR_ADDRESS_202_MASK (0xFFFFFFFFu)
  37649. #define CSL_CPINTC_VECTOR_ADDRESS_REG_202_VECTOR_ADDRESS_202_SHIFT (0x00000000u)
  37650. #define CSL_CPINTC_VECTOR_ADDRESS_REG_202_VECTOR_ADDRESS_202_RESETVAL (0x00000000u)
  37651. #define CSL_CPINTC_VECTOR_ADDRESS_REG_202_RESETVAL (0x00000000u)
  37652. /* vector_address_reg_203 */
  37653. #define CSL_CPINTC_VECTOR_ADDRESS_REG_203_VECTOR_ADDRESS_203_MASK (0xFFFFFFFFu)
  37654. #define CSL_CPINTC_VECTOR_ADDRESS_REG_203_VECTOR_ADDRESS_203_SHIFT (0x00000000u)
  37655. #define CSL_CPINTC_VECTOR_ADDRESS_REG_203_VECTOR_ADDRESS_203_RESETVAL (0x00000000u)
  37656. #define CSL_CPINTC_VECTOR_ADDRESS_REG_203_RESETVAL (0x00000000u)
  37657. /* vector_address_reg_204 */
  37658. #define CSL_CPINTC_VECTOR_ADDRESS_REG_204_VECTOR_ADDRESS_204_MASK (0xFFFFFFFFu)
  37659. #define CSL_CPINTC_VECTOR_ADDRESS_REG_204_VECTOR_ADDRESS_204_SHIFT (0x00000000u)
  37660. #define CSL_CPINTC_VECTOR_ADDRESS_REG_204_VECTOR_ADDRESS_204_RESETVAL (0x00000000u)
  37661. #define CSL_CPINTC_VECTOR_ADDRESS_REG_204_RESETVAL (0x00000000u)
  37662. /* vector_address_reg_205 */
  37663. #define CSL_CPINTC_VECTOR_ADDRESS_REG_205_VECTOR_ADDRESS_205_MASK (0xFFFFFFFFu)
  37664. #define CSL_CPINTC_VECTOR_ADDRESS_REG_205_VECTOR_ADDRESS_205_SHIFT (0x00000000u)
  37665. #define CSL_CPINTC_VECTOR_ADDRESS_REG_205_VECTOR_ADDRESS_205_RESETVAL (0x00000000u)
  37666. #define CSL_CPINTC_VECTOR_ADDRESS_REG_205_RESETVAL (0x00000000u)
  37667. /* vector_address_reg_206 */
  37668. #define CSL_CPINTC_VECTOR_ADDRESS_REG_206_VECTOR_ADDRESS_206_MASK (0xFFFFFFFFu)
  37669. #define CSL_CPINTC_VECTOR_ADDRESS_REG_206_VECTOR_ADDRESS_206_SHIFT (0x00000000u)
  37670. #define CSL_CPINTC_VECTOR_ADDRESS_REG_206_VECTOR_ADDRESS_206_RESETVAL (0x00000000u)
  37671. #define CSL_CPINTC_VECTOR_ADDRESS_REG_206_RESETVAL (0x00000000u)
  37672. /* vector_address_reg_207 */
  37673. #define CSL_CPINTC_VECTOR_ADDRESS_REG_207_VECTOR_ADDRESS_207_MASK (0xFFFFFFFFu)
  37674. #define CSL_CPINTC_VECTOR_ADDRESS_REG_207_VECTOR_ADDRESS_207_SHIFT (0x00000000u)
  37675. #define CSL_CPINTC_VECTOR_ADDRESS_REG_207_VECTOR_ADDRESS_207_RESETVAL (0x00000000u)
  37676. #define CSL_CPINTC_VECTOR_ADDRESS_REG_207_RESETVAL (0x00000000u)
  37677. /* vector_address_reg_208 */
  37678. #define CSL_CPINTC_VECTOR_ADDRESS_REG_208_VECTOR_ADDRESS_208_MASK (0xFFFFFFFFu)
  37679. #define CSL_CPINTC_VECTOR_ADDRESS_REG_208_VECTOR_ADDRESS_208_SHIFT (0x00000000u)
  37680. #define CSL_CPINTC_VECTOR_ADDRESS_REG_208_VECTOR_ADDRESS_208_RESETVAL (0x00000000u)
  37681. #define CSL_CPINTC_VECTOR_ADDRESS_REG_208_RESETVAL (0x00000000u)
  37682. /* vector_address_reg_209 */
  37683. #define CSL_CPINTC_VECTOR_ADDRESS_REG_209_VECTOR_ADDRESS_209_MASK (0xFFFFFFFFu)
  37684. #define CSL_CPINTC_VECTOR_ADDRESS_REG_209_VECTOR_ADDRESS_209_SHIFT (0x00000000u)
  37685. #define CSL_CPINTC_VECTOR_ADDRESS_REG_209_VECTOR_ADDRESS_209_RESETVAL (0x00000000u)
  37686. #define CSL_CPINTC_VECTOR_ADDRESS_REG_209_RESETVAL (0x00000000u)
  37687. /* vector_address_reg_210 */
  37688. #define CSL_CPINTC_VECTOR_ADDRESS_REG_210_VECTOR_ADDRESS_210_MASK (0xFFFFFFFFu)
  37689. #define CSL_CPINTC_VECTOR_ADDRESS_REG_210_VECTOR_ADDRESS_210_SHIFT (0x00000000u)
  37690. #define CSL_CPINTC_VECTOR_ADDRESS_REG_210_VECTOR_ADDRESS_210_RESETVAL (0x00000000u)
  37691. #define CSL_CPINTC_VECTOR_ADDRESS_REG_210_RESETVAL (0x00000000u)
  37692. /* vector_address_reg_211 */
  37693. #define CSL_CPINTC_VECTOR_ADDRESS_REG_211_VECTOR_ADDRESS_211_MASK (0xFFFFFFFFu)
  37694. #define CSL_CPINTC_VECTOR_ADDRESS_REG_211_VECTOR_ADDRESS_211_SHIFT (0x00000000u)
  37695. #define CSL_CPINTC_VECTOR_ADDRESS_REG_211_VECTOR_ADDRESS_211_RESETVAL (0x00000000u)
  37696. #define CSL_CPINTC_VECTOR_ADDRESS_REG_211_RESETVAL (0x00000000u)
  37697. /* vector_address_reg_212 */
  37698. #define CSL_CPINTC_VECTOR_ADDRESS_REG_212_VECTOR_ADDRESS_212_MASK (0xFFFFFFFFu)
  37699. #define CSL_CPINTC_VECTOR_ADDRESS_REG_212_VECTOR_ADDRESS_212_SHIFT (0x00000000u)
  37700. #define CSL_CPINTC_VECTOR_ADDRESS_REG_212_VECTOR_ADDRESS_212_RESETVAL (0x00000000u)
  37701. #define CSL_CPINTC_VECTOR_ADDRESS_REG_212_RESETVAL (0x00000000u)
  37702. /* vector_address_reg_213 */
  37703. #define CSL_CPINTC_VECTOR_ADDRESS_REG_213_VECTOR_ADDRESS_213_MASK (0xFFFFFFFFu)
  37704. #define CSL_CPINTC_VECTOR_ADDRESS_REG_213_VECTOR_ADDRESS_213_SHIFT (0x00000000u)
  37705. #define CSL_CPINTC_VECTOR_ADDRESS_REG_213_VECTOR_ADDRESS_213_RESETVAL (0x00000000u)
  37706. #define CSL_CPINTC_VECTOR_ADDRESS_REG_213_RESETVAL (0x00000000u)
  37707. /* vector_address_reg_214 */
  37708. #define CSL_CPINTC_VECTOR_ADDRESS_REG_214_VECTOR_ADDRESS_214_MASK (0xFFFFFFFFu)
  37709. #define CSL_CPINTC_VECTOR_ADDRESS_REG_214_VECTOR_ADDRESS_214_SHIFT (0x00000000u)
  37710. #define CSL_CPINTC_VECTOR_ADDRESS_REG_214_VECTOR_ADDRESS_214_RESETVAL (0x00000000u)
  37711. #define CSL_CPINTC_VECTOR_ADDRESS_REG_214_RESETVAL (0x00000000u)
  37712. /* vector_address_reg_215 */
  37713. #define CSL_CPINTC_VECTOR_ADDRESS_REG_215_VECTOR_ADDRESS_215_MASK (0xFFFFFFFFu)
  37714. #define CSL_CPINTC_VECTOR_ADDRESS_REG_215_VECTOR_ADDRESS_215_SHIFT (0x00000000u)
  37715. #define CSL_CPINTC_VECTOR_ADDRESS_REG_215_VECTOR_ADDRESS_215_RESETVAL (0x00000000u)
  37716. #define CSL_CPINTC_VECTOR_ADDRESS_REG_215_RESETVAL (0x00000000u)
  37717. /* vector_address_reg_216 */
  37718. #define CSL_CPINTC_VECTOR_ADDRESS_REG_216_VECTOR_ADDRESS_216_MASK (0xFFFFFFFFu)
  37719. #define CSL_CPINTC_VECTOR_ADDRESS_REG_216_VECTOR_ADDRESS_216_SHIFT (0x00000000u)
  37720. #define CSL_CPINTC_VECTOR_ADDRESS_REG_216_VECTOR_ADDRESS_216_RESETVAL (0x00000000u)
  37721. #define CSL_CPINTC_VECTOR_ADDRESS_REG_216_RESETVAL (0x00000000u)
  37722. /* vector_address_reg_217 */
  37723. #define CSL_CPINTC_VECTOR_ADDRESS_REG_217_VECTOR_ADDRESS_217_MASK (0xFFFFFFFFu)
  37724. #define CSL_CPINTC_VECTOR_ADDRESS_REG_217_VECTOR_ADDRESS_217_SHIFT (0x00000000u)
  37725. #define CSL_CPINTC_VECTOR_ADDRESS_REG_217_VECTOR_ADDRESS_217_RESETVAL (0x00000000u)
  37726. #define CSL_CPINTC_VECTOR_ADDRESS_REG_217_RESETVAL (0x00000000u)
  37727. /* vector_address_reg_218 */
  37728. #define CSL_CPINTC_VECTOR_ADDRESS_REG_218_VECTOR_ADDRESS_218_MASK (0xFFFFFFFFu)
  37729. #define CSL_CPINTC_VECTOR_ADDRESS_REG_218_VECTOR_ADDRESS_218_SHIFT (0x00000000u)
  37730. #define CSL_CPINTC_VECTOR_ADDRESS_REG_218_VECTOR_ADDRESS_218_RESETVAL (0x00000000u)
  37731. #define CSL_CPINTC_VECTOR_ADDRESS_REG_218_RESETVAL (0x00000000u)
  37732. /* vector_address_reg_219 */
  37733. #define CSL_CPINTC_VECTOR_ADDRESS_REG_219_VECTOR_ADDRESS_219_MASK (0xFFFFFFFFu)
  37734. #define CSL_CPINTC_VECTOR_ADDRESS_REG_219_VECTOR_ADDRESS_219_SHIFT (0x00000000u)
  37735. #define CSL_CPINTC_VECTOR_ADDRESS_REG_219_VECTOR_ADDRESS_219_RESETVAL (0x00000000u)
  37736. #define CSL_CPINTC_VECTOR_ADDRESS_REG_219_RESETVAL (0x00000000u)
  37737. /* vector_address_reg_220 */
  37738. #define CSL_CPINTC_VECTOR_ADDRESS_REG_220_VECTOR_ADDRESS_220_MASK (0xFFFFFFFFu)
  37739. #define CSL_CPINTC_VECTOR_ADDRESS_REG_220_VECTOR_ADDRESS_220_SHIFT (0x00000000u)
  37740. #define CSL_CPINTC_VECTOR_ADDRESS_REG_220_VECTOR_ADDRESS_220_RESETVAL (0x00000000u)
  37741. #define CSL_CPINTC_VECTOR_ADDRESS_REG_220_RESETVAL (0x00000000u)
  37742. /* vector_address_reg_221 */
  37743. #define CSL_CPINTC_VECTOR_ADDRESS_REG_221_VECTOR_ADDRESS_221_MASK (0xFFFFFFFFu)
  37744. #define CSL_CPINTC_VECTOR_ADDRESS_REG_221_VECTOR_ADDRESS_221_SHIFT (0x00000000u)
  37745. #define CSL_CPINTC_VECTOR_ADDRESS_REG_221_VECTOR_ADDRESS_221_RESETVAL (0x00000000u)
  37746. #define CSL_CPINTC_VECTOR_ADDRESS_REG_221_RESETVAL (0x00000000u)
  37747. /* vector_address_reg_222 */
  37748. #define CSL_CPINTC_VECTOR_ADDRESS_REG_222_VECTOR_ADDRESS_222_MASK (0xFFFFFFFFu)
  37749. #define CSL_CPINTC_VECTOR_ADDRESS_REG_222_VECTOR_ADDRESS_222_SHIFT (0x00000000u)
  37750. #define CSL_CPINTC_VECTOR_ADDRESS_REG_222_VECTOR_ADDRESS_222_RESETVAL (0x00000000u)
  37751. #define CSL_CPINTC_VECTOR_ADDRESS_REG_222_RESETVAL (0x00000000u)
  37752. /* vector_address_reg_223 */
  37753. #define CSL_CPINTC_VECTOR_ADDRESS_REG_223_VECTOR_ADDRESS_223_MASK (0xFFFFFFFFu)
  37754. #define CSL_CPINTC_VECTOR_ADDRESS_REG_223_VECTOR_ADDRESS_223_SHIFT (0x00000000u)
  37755. #define CSL_CPINTC_VECTOR_ADDRESS_REG_223_VECTOR_ADDRESS_223_RESETVAL (0x00000000u)
  37756. #define CSL_CPINTC_VECTOR_ADDRESS_REG_223_RESETVAL (0x00000000u)
  37757. /* vector_address_reg_224 */
  37758. #define CSL_CPINTC_VECTOR_ADDRESS_REG_224_VECTOR_ADDRESS_224_MASK (0xFFFFFFFFu)
  37759. #define CSL_CPINTC_VECTOR_ADDRESS_REG_224_VECTOR_ADDRESS_224_SHIFT (0x00000000u)
  37760. #define CSL_CPINTC_VECTOR_ADDRESS_REG_224_VECTOR_ADDRESS_224_RESETVAL (0x00000000u)
  37761. #define CSL_CPINTC_VECTOR_ADDRESS_REG_224_RESETVAL (0x00000000u)
  37762. /* vector_address_reg_225 */
  37763. #define CSL_CPINTC_VECTOR_ADDRESS_REG_225_VECTOR_ADDRESS_225_MASK (0xFFFFFFFFu)
  37764. #define CSL_CPINTC_VECTOR_ADDRESS_REG_225_VECTOR_ADDRESS_225_SHIFT (0x00000000u)
  37765. #define CSL_CPINTC_VECTOR_ADDRESS_REG_225_VECTOR_ADDRESS_225_RESETVAL (0x00000000u)
  37766. #define CSL_CPINTC_VECTOR_ADDRESS_REG_225_RESETVAL (0x00000000u)
  37767. /* vector_address_reg_226 */
  37768. #define CSL_CPINTC_VECTOR_ADDRESS_REG_226_VECTOR_ADDRESS_226_MASK (0xFFFFFFFFu)
  37769. #define CSL_CPINTC_VECTOR_ADDRESS_REG_226_VECTOR_ADDRESS_226_SHIFT (0x00000000u)
  37770. #define CSL_CPINTC_VECTOR_ADDRESS_REG_226_VECTOR_ADDRESS_226_RESETVAL (0x00000000u)
  37771. #define CSL_CPINTC_VECTOR_ADDRESS_REG_226_RESETVAL (0x00000000u)
  37772. /* vector_address_reg_227 */
  37773. #define CSL_CPINTC_VECTOR_ADDRESS_REG_227_VECTOR_ADDRESS_227_MASK (0xFFFFFFFFu)
  37774. #define CSL_CPINTC_VECTOR_ADDRESS_REG_227_VECTOR_ADDRESS_227_SHIFT (0x00000000u)
  37775. #define CSL_CPINTC_VECTOR_ADDRESS_REG_227_VECTOR_ADDRESS_227_RESETVAL (0x00000000u)
  37776. #define CSL_CPINTC_VECTOR_ADDRESS_REG_227_RESETVAL (0x00000000u)
  37777. /* vector_address_reg_228 */
  37778. #define CSL_CPINTC_VECTOR_ADDRESS_REG_228_VECTOR_ADDRESS_228_MASK (0xFFFFFFFFu)
  37779. #define CSL_CPINTC_VECTOR_ADDRESS_REG_228_VECTOR_ADDRESS_228_SHIFT (0x00000000u)
  37780. #define CSL_CPINTC_VECTOR_ADDRESS_REG_228_VECTOR_ADDRESS_228_RESETVAL (0x00000000u)
  37781. #define CSL_CPINTC_VECTOR_ADDRESS_REG_228_RESETVAL (0x00000000u)
  37782. /* vector_address_reg_229 */
  37783. #define CSL_CPINTC_VECTOR_ADDRESS_REG_229_VECTOR_ADDRESS_229_MASK (0xFFFFFFFFu)
  37784. #define CSL_CPINTC_VECTOR_ADDRESS_REG_229_VECTOR_ADDRESS_229_SHIFT (0x00000000u)
  37785. #define CSL_CPINTC_VECTOR_ADDRESS_REG_229_VECTOR_ADDRESS_229_RESETVAL (0x00000000u)
  37786. #define CSL_CPINTC_VECTOR_ADDRESS_REG_229_RESETVAL (0x00000000u)
  37787. /* vector_address_reg_230 */
  37788. #define CSL_CPINTC_VECTOR_ADDRESS_REG_230_VECTOR_ADDRESS_230_MASK (0xFFFFFFFFu)
  37789. #define CSL_CPINTC_VECTOR_ADDRESS_REG_230_VECTOR_ADDRESS_230_SHIFT (0x00000000u)
  37790. #define CSL_CPINTC_VECTOR_ADDRESS_REG_230_VECTOR_ADDRESS_230_RESETVAL (0x00000000u)
  37791. #define CSL_CPINTC_VECTOR_ADDRESS_REG_230_RESETVAL (0x00000000u)
  37792. /* vector_address_reg_231 */
  37793. #define CSL_CPINTC_VECTOR_ADDRESS_REG_231_VECTOR_ADDRESS_231_MASK (0xFFFFFFFFu)
  37794. #define CSL_CPINTC_VECTOR_ADDRESS_REG_231_VECTOR_ADDRESS_231_SHIFT (0x00000000u)
  37795. #define CSL_CPINTC_VECTOR_ADDRESS_REG_231_VECTOR_ADDRESS_231_RESETVAL (0x00000000u)
  37796. #define CSL_CPINTC_VECTOR_ADDRESS_REG_231_RESETVAL (0x00000000u)
  37797. /* vector_address_reg_232 */
  37798. #define CSL_CPINTC_VECTOR_ADDRESS_REG_232_VECTOR_ADDRESS_232_MASK (0xFFFFFFFFu)
  37799. #define CSL_CPINTC_VECTOR_ADDRESS_REG_232_VECTOR_ADDRESS_232_SHIFT (0x00000000u)
  37800. #define CSL_CPINTC_VECTOR_ADDRESS_REG_232_VECTOR_ADDRESS_232_RESETVAL (0x00000000u)
  37801. #define CSL_CPINTC_VECTOR_ADDRESS_REG_232_RESETVAL (0x00000000u)
  37802. /* vector_address_reg_233 */
  37803. #define CSL_CPINTC_VECTOR_ADDRESS_REG_233_VECTOR_ADDRESS_233_MASK (0xFFFFFFFFu)
  37804. #define CSL_CPINTC_VECTOR_ADDRESS_REG_233_VECTOR_ADDRESS_233_SHIFT (0x00000000u)
  37805. #define CSL_CPINTC_VECTOR_ADDRESS_REG_233_VECTOR_ADDRESS_233_RESETVAL (0x00000000u)
  37806. #define CSL_CPINTC_VECTOR_ADDRESS_REG_233_RESETVAL (0x00000000u)
  37807. /* vector_address_reg_234 */
  37808. #define CSL_CPINTC_VECTOR_ADDRESS_REG_234_VECTOR_ADDRESS_234_MASK (0xFFFFFFFFu)
  37809. #define CSL_CPINTC_VECTOR_ADDRESS_REG_234_VECTOR_ADDRESS_234_SHIFT (0x00000000u)
  37810. #define CSL_CPINTC_VECTOR_ADDRESS_REG_234_VECTOR_ADDRESS_234_RESETVAL (0x00000000u)
  37811. #define CSL_CPINTC_VECTOR_ADDRESS_REG_234_RESETVAL (0x00000000u)
  37812. /* vector_address_reg_235 */
  37813. #define CSL_CPINTC_VECTOR_ADDRESS_REG_235_VECTOR_ADDRESS_235_MASK (0xFFFFFFFFu)
  37814. #define CSL_CPINTC_VECTOR_ADDRESS_REG_235_VECTOR_ADDRESS_235_SHIFT (0x00000000u)
  37815. #define CSL_CPINTC_VECTOR_ADDRESS_REG_235_VECTOR_ADDRESS_235_RESETVAL (0x00000000u)
  37816. #define CSL_CPINTC_VECTOR_ADDRESS_REG_235_RESETVAL (0x00000000u)
  37817. /* vector_address_reg_236 */
  37818. #define CSL_CPINTC_VECTOR_ADDRESS_REG_236_VECTOR_ADDRESS_236_MASK (0xFFFFFFFFu)
  37819. #define CSL_CPINTC_VECTOR_ADDRESS_REG_236_VECTOR_ADDRESS_236_SHIFT (0x00000000u)
  37820. #define CSL_CPINTC_VECTOR_ADDRESS_REG_236_VECTOR_ADDRESS_236_RESETVAL (0x00000000u)
  37821. #define CSL_CPINTC_VECTOR_ADDRESS_REG_236_RESETVAL (0x00000000u)
  37822. /* vector_address_reg_237 */
  37823. #define CSL_CPINTC_VECTOR_ADDRESS_REG_237_VECTOR_ADDRESS_237_MASK (0xFFFFFFFFu)
  37824. #define CSL_CPINTC_VECTOR_ADDRESS_REG_237_VECTOR_ADDRESS_237_SHIFT (0x00000000u)
  37825. #define CSL_CPINTC_VECTOR_ADDRESS_REG_237_VECTOR_ADDRESS_237_RESETVAL (0x00000000u)
  37826. #define CSL_CPINTC_VECTOR_ADDRESS_REG_237_RESETVAL (0x00000000u)
  37827. /* vector_address_reg_238 */
  37828. #define CSL_CPINTC_VECTOR_ADDRESS_REG_238_VECTOR_ADDRESS_238_MASK (0xFFFFFFFFu)
  37829. #define CSL_CPINTC_VECTOR_ADDRESS_REG_238_VECTOR_ADDRESS_238_SHIFT (0x00000000u)
  37830. #define CSL_CPINTC_VECTOR_ADDRESS_REG_238_VECTOR_ADDRESS_238_RESETVAL (0x00000000u)
  37831. #define CSL_CPINTC_VECTOR_ADDRESS_REG_238_RESETVAL (0x00000000u)
  37832. /* vector_address_reg_239 */
  37833. #define CSL_CPINTC_VECTOR_ADDRESS_REG_239_VECTOR_ADDRESS_239_MASK (0xFFFFFFFFu)
  37834. #define CSL_CPINTC_VECTOR_ADDRESS_REG_239_VECTOR_ADDRESS_239_SHIFT (0x00000000u)
  37835. #define CSL_CPINTC_VECTOR_ADDRESS_REG_239_VECTOR_ADDRESS_239_RESETVAL (0x00000000u)
  37836. #define CSL_CPINTC_VECTOR_ADDRESS_REG_239_RESETVAL (0x00000000u)
  37837. /* vector_address_reg_240 */
  37838. #define CSL_CPINTC_VECTOR_ADDRESS_REG_240_VECTOR_ADDRESS_240_MASK (0xFFFFFFFFu)
  37839. #define CSL_CPINTC_VECTOR_ADDRESS_REG_240_VECTOR_ADDRESS_240_SHIFT (0x00000000u)
  37840. #define CSL_CPINTC_VECTOR_ADDRESS_REG_240_VECTOR_ADDRESS_240_RESETVAL (0x00000000u)
  37841. #define CSL_CPINTC_VECTOR_ADDRESS_REG_240_RESETVAL (0x00000000u)
  37842. /* vector_address_reg_241 */
  37843. #define CSL_CPINTC_VECTOR_ADDRESS_REG_241_VECTOR_ADDRESS_241_MASK (0xFFFFFFFFu)
  37844. #define CSL_CPINTC_VECTOR_ADDRESS_REG_241_VECTOR_ADDRESS_241_SHIFT (0x00000000u)
  37845. #define CSL_CPINTC_VECTOR_ADDRESS_REG_241_VECTOR_ADDRESS_241_RESETVAL (0x00000000u)
  37846. #define CSL_CPINTC_VECTOR_ADDRESS_REG_241_RESETVAL (0x00000000u)
  37847. /* vector_address_reg_242 */
  37848. #define CSL_CPINTC_VECTOR_ADDRESS_REG_242_VECTOR_ADDRESS_242_MASK (0xFFFFFFFFu)
  37849. #define CSL_CPINTC_VECTOR_ADDRESS_REG_242_VECTOR_ADDRESS_242_SHIFT (0x00000000u)
  37850. #define CSL_CPINTC_VECTOR_ADDRESS_REG_242_VECTOR_ADDRESS_242_RESETVAL (0x00000000u)
  37851. #define CSL_CPINTC_VECTOR_ADDRESS_REG_242_RESETVAL (0x00000000u)
  37852. /* vector_address_reg_243 */
  37853. #define CSL_CPINTC_VECTOR_ADDRESS_REG_243_VECTOR_ADDRESS_243_MASK (0xFFFFFFFFu)
  37854. #define CSL_CPINTC_VECTOR_ADDRESS_REG_243_VECTOR_ADDRESS_243_SHIFT (0x00000000u)
  37855. #define CSL_CPINTC_VECTOR_ADDRESS_REG_243_VECTOR_ADDRESS_243_RESETVAL (0x00000000u)
  37856. #define CSL_CPINTC_VECTOR_ADDRESS_REG_243_RESETVAL (0x00000000u)
  37857. /* vector_address_reg_244 */
  37858. #define CSL_CPINTC_VECTOR_ADDRESS_REG_244_VECTOR_ADDRESS_244_MASK (0xFFFFFFFFu)
  37859. #define CSL_CPINTC_VECTOR_ADDRESS_REG_244_VECTOR_ADDRESS_244_SHIFT (0x00000000u)
  37860. #define CSL_CPINTC_VECTOR_ADDRESS_REG_244_VECTOR_ADDRESS_244_RESETVAL (0x00000000u)
  37861. #define CSL_CPINTC_VECTOR_ADDRESS_REG_244_RESETVAL (0x00000000u)
  37862. /* vector_address_reg_245 */
  37863. #define CSL_CPINTC_VECTOR_ADDRESS_REG_245_VECTOR_ADDRESS_245_MASK (0xFFFFFFFFu)
  37864. #define CSL_CPINTC_VECTOR_ADDRESS_REG_245_VECTOR_ADDRESS_245_SHIFT (0x00000000u)
  37865. #define CSL_CPINTC_VECTOR_ADDRESS_REG_245_VECTOR_ADDRESS_245_RESETVAL (0x00000000u)
  37866. #define CSL_CPINTC_VECTOR_ADDRESS_REG_245_RESETVAL (0x00000000u)
  37867. /* vector_address_reg_246 */
  37868. #define CSL_CPINTC_VECTOR_ADDRESS_REG_246_VECTOR_ADDRESS_246_MASK (0xFFFFFFFFu)
  37869. #define CSL_CPINTC_VECTOR_ADDRESS_REG_246_VECTOR_ADDRESS_246_SHIFT (0x00000000u)
  37870. #define CSL_CPINTC_VECTOR_ADDRESS_REG_246_VECTOR_ADDRESS_246_RESETVAL (0x00000000u)
  37871. #define CSL_CPINTC_VECTOR_ADDRESS_REG_246_RESETVAL (0x00000000u)
  37872. /* vector_address_reg_247 */
  37873. #define CSL_CPINTC_VECTOR_ADDRESS_REG_247_VECTOR_ADDRESS_247_MASK (0xFFFFFFFFu)
  37874. #define CSL_CPINTC_VECTOR_ADDRESS_REG_247_VECTOR_ADDRESS_247_SHIFT (0x00000000u)
  37875. #define CSL_CPINTC_VECTOR_ADDRESS_REG_247_VECTOR_ADDRESS_247_RESETVAL (0x00000000u)
  37876. #define CSL_CPINTC_VECTOR_ADDRESS_REG_247_RESETVAL (0x00000000u)
  37877. /* vector_address_reg_248 */
  37878. #define CSL_CPINTC_VECTOR_ADDRESS_REG_248_VECTOR_ADDRESS_248_MASK (0xFFFFFFFFu)
  37879. #define CSL_CPINTC_VECTOR_ADDRESS_REG_248_VECTOR_ADDRESS_248_SHIFT (0x00000000u)
  37880. #define CSL_CPINTC_VECTOR_ADDRESS_REG_248_VECTOR_ADDRESS_248_RESETVAL (0x00000000u)
  37881. #define CSL_CPINTC_VECTOR_ADDRESS_REG_248_RESETVAL (0x00000000u)
  37882. /* vector_address_reg_249 */
  37883. #define CSL_CPINTC_VECTOR_ADDRESS_REG_249_VECTOR_ADDRESS_249_MASK (0xFFFFFFFFu)
  37884. #define CSL_CPINTC_VECTOR_ADDRESS_REG_249_VECTOR_ADDRESS_249_SHIFT (0x00000000u)
  37885. #define CSL_CPINTC_VECTOR_ADDRESS_REG_249_VECTOR_ADDRESS_249_RESETVAL (0x00000000u)
  37886. #define CSL_CPINTC_VECTOR_ADDRESS_REG_249_RESETVAL (0x00000000u)
  37887. /* vector_address_reg_250 */
  37888. #define CSL_CPINTC_VECTOR_ADDRESS_REG_250_VECTOR_ADDRESS_250_MASK (0xFFFFFFFFu)
  37889. #define CSL_CPINTC_VECTOR_ADDRESS_REG_250_VECTOR_ADDRESS_250_SHIFT (0x00000000u)
  37890. #define CSL_CPINTC_VECTOR_ADDRESS_REG_250_VECTOR_ADDRESS_250_RESETVAL (0x00000000u)
  37891. #define CSL_CPINTC_VECTOR_ADDRESS_REG_250_RESETVAL (0x00000000u)
  37892. /* vector_address_reg_251 */
  37893. #define CSL_CPINTC_VECTOR_ADDRESS_REG_251_VECTOR_ADDRESS_251_MASK (0xFFFFFFFFu)
  37894. #define CSL_CPINTC_VECTOR_ADDRESS_REG_251_VECTOR_ADDRESS_251_SHIFT (0x00000000u)
  37895. #define CSL_CPINTC_VECTOR_ADDRESS_REG_251_VECTOR_ADDRESS_251_RESETVAL (0x00000000u)
  37896. #define CSL_CPINTC_VECTOR_ADDRESS_REG_251_RESETVAL (0x00000000u)
  37897. /* vector_address_reg_252 */
  37898. #define CSL_CPINTC_VECTOR_ADDRESS_REG_252_VECTOR_ADDRESS_252_MASK (0xFFFFFFFFu)
  37899. #define CSL_CPINTC_VECTOR_ADDRESS_REG_252_VECTOR_ADDRESS_252_SHIFT (0x00000000u)
  37900. #define CSL_CPINTC_VECTOR_ADDRESS_REG_252_VECTOR_ADDRESS_252_RESETVAL (0x00000000u)
  37901. #define CSL_CPINTC_VECTOR_ADDRESS_REG_252_RESETVAL (0x00000000u)
  37902. /* vector_address_reg_253 */
  37903. #define CSL_CPINTC_VECTOR_ADDRESS_REG_253_VECTOR_ADDRESS_253_MASK (0xFFFFFFFFu)
  37904. #define CSL_CPINTC_VECTOR_ADDRESS_REG_253_VECTOR_ADDRESS_253_SHIFT (0x00000000u)
  37905. #define CSL_CPINTC_VECTOR_ADDRESS_REG_253_VECTOR_ADDRESS_253_RESETVAL (0x00000000u)
  37906. #define CSL_CPINTC_VECTOR_ADDRESS_REG_253_RESETVAL (0x00000000u)
  37907. /* vector_address_reg_254 */
  37908. #define CSL_CPINTC_VECTOR_ADDRESS_REG_254_VECTOR_ADDRESS_254_MASK (0xFFFFFFFFu)
  37909. #define CSL_CPINTC_VECTOR_ADDRESS_REG_254_VECTOR_ADDRESS_254_SHIFT (0x00000000u)
  37910. #define CSL_CPINTC_VECTOR_ADDRESS_REG_254_VECTOR_ADDRESS_254_RESETVAL (0x00000000u)
  37911. #define CSL_CPINTC_VECTOR_ADDRESS_REG_254_RESETVAL (0x00000000u)
  37912. /* vector_address_reg_255 */
  37913. #define CSL_CPINTC_VECTOR_ADDRESS_REG_255_VECTOR_ADDRESS_255_MASK (0xFFFFFFFFu)
  37914. #define CSL_CPINTC_VECTOR_ADDRESS_REG_255_VECTOR_ADDRESS_255_SHIFT (0x00000000u)
  37915. #define CSL_CPINTC_VECTOR_ADDRESS_REG_255_VECTOR_ADDRESS_255_RESETVAL (0x00000000u)
  37916. #define CSL_CPINTC_VECTOR_ADDRESS_REG_255_RESETVAL (0x00000000u)
  37917. /* vector_address_reg_256 */
  37918. #define CSL_CPINTC_VECTOR_ADDRESS_REG_256_VECTOR_ADDRESS_256_MASK (0xFFFFFFFFu)
  37919. #define CSL_CPINTC_VECTOR_ADDRESS_REG_256_VECTOR_ADDRESS_256_SHIFT (0x00000000u)
  37920. #define CSL_CPINTC_VECTOR_ADDRESS_REG_256_VECTOR_ADDRESS_256_RESETVAL (0x00000000u)
  37921. #define CSL_CPINTC_VECTOR_ADDRESS_REG_256_RESETVAL (0x00000000u)
  37922. /* vector_address_reg_257 */
  37923. #define CSL_CPINTC_VECTOR_ADDRESS_REG_257_VECTOR_ADDRESS_257_MASK (0xFFFFFFFFu)
  37924. #define CSL_CPINTC_VECTOR_ADDRESS_REG_257_VECTOR_ADDRESS_257_SHIFT (0x00000000u)
  37925. #define CSL_CPINTC_VECTOR_ADDRESS_REG_257_VECTOR_ADDRESS_257_RESETVAL (0x00000000u)
  37926. #define CSL_CPINTC_VECTOR_ADDRESS_REG_257_RESETVAL (0x00000000u)
  37927. /* vector_address_reg_258 */
  37928. #define CSL_CPINTC_VECTOR_ADDRESS_REG_258_VECTOR_ADDRESS_258_MASK (0xFFFFFFFFu)
  37929. #define CSL_CPINTC_VECTOR_ADDRESS_REG_258_VECTOR_ADDRESS_258_SHIFT (0x00000000u)
  37930. #define CSL_CPINTC_VECTOR_ADDRESS_REG_258_VECTOR_ADDRESS_258_RESETVAL (0x00000000u)
  37931. #define CSL_CPINTC_VECTOR_ADDRESS_REG_258_RESETVAL (0x00000000u)
  37932. /* vector_address_reg_259 */
  37933. #define CSL_CPINTC_VECTOR_ADDRESS_REG_259_VECTOR_ADDRESS_259_MASK (0xFFFFFFFFu)
  37934. #define CSL_CPINTC_VECTOR_ADDRESS_REG_259_VECTOR_ADDRESS_259_SHIFT (0x00000000u)
  37935. #define CSL_CPINTC_VECTOR_ADDRESS_REG_259_VECTOR_ADDRESS_259_RESETVAL (0x00000000u)
  37936. #define CSL_CPINTC_VECTOR_ADDRESS_REG_259_RESETVAL (0x00000000u)
  37937. /* vector_address_reg_260 */
  37938. #define CSL_CPINTC_VECTOR_ADDRESS_REG_260_VECTOR_ADDRESS_260_MASK (0xFFFFFFFFu)
  37939. #define CSL_CPINTC_VECTOR_ADDRESS_REG_260_VECTOR_ADDRESS_260_SHIFT (0x00000000u)
  37940. #define CSL_CPINTC_VECTOR_ADDRESS_REG_260_VECTOR_ADDRESS_260_RESETVAL (0x00000000u)
  37941. #define CSL_CPINTC_VECTOR_ADDRESS_REG_260_RESETVAL (0x00000000u)
  37942. /* vector_address_reg_261 */
  37943. #define CSL_CPINTC_VECTOR_ADDRESS_REG_261_VECTOR_ADDRESS_261_MASK (0xFFFFFFFFu)
  37944. #define CSL_CPINTC_VECTOR_ADDRESS_REG_261_VECTOR_ADDRESS_261_SHIFT (0x00000000u)
  37945. #define CSL_CPINTC_VECTOR_ADDRESS_REG_261_VECTOR_ADDRESS_261_RESETVAL (0x00000000u)
  37946. #define CSL_CPINTC_VECTOR_ADDRESS_REG_261_RESETVAL (0x00000000u)
  37947. /* vector_address_reg_262 */
  37948. #define CSL_CPINTC_VECTOR_ADDRESS_REG_262_VECTOR_ADDRESS_262_MASK (0xFFFFFFFFu)
  37949. #define CSL_CPINTC_VECTOR_ADDRESS_REG_262_VECTOR_ADDRESS_262_SHIFT (0x00000000u)
  37950. #define CSL_CPINTC_VECTOR_ADDRESS_REG_262_VECTOR_ADDRESS_262_RESETVAL (0x00000000u)
  37951. #define CSL_CPINTC_VECTOR_ADDRESS_REG_262_RESETVAL (0x00000000u)
  37952. /* vector_address_reg_263 */
  37953. #define CSL_CPINTC_VECTOR_ADDRESS_REG_263_VECTOR_ADDRESS_263_MASK (0xFFFFFFFFu)
  37954. #define CSL_CPINTC_VECTOR_ADDRESS_REG_263_VECTOR_ADDRESS_263_SHIFT (0x00000000u)
  37955. #define CSL_CPINTC_VECTOR_ADDRESS_REG_263_VECTOR_ADDRESS_263_RESETVAL (0x00000000u)
  37956. #define CSL_CPINTC_VECTOR_ADDRESS_REG_263_RESETVAL (0x00000000u)
  37957. /* vector_address_reg_264 */
  37958. #define CSL_CPINTC_VECTOR_ADDRESS_REG_264_VECTOR_ADDRESS_264_MASK (0xFFFFFFFFu)
  37959. #define CSL_CPINTC_VECTOR_ADDRESS_REG_264_VECTOR_ADDRESS_264_SHIFT (0x00000000u)
  37960. #define CSL_CPINTC_VECTOR_ADDRESS_REG_264_VECTOR_ADDRESS_264_RESETVAL (0x00000000u)
  37961. #define CSL_CPINTC_VECTOR_ADDRESS_REG_264_RESETVAL (0x00000000u)
  37962. /* vector_address_reg_265 */
  37963. #define CSL_CPINTC_VECTOR_ADDRESS_REG_265_VECTOR_ADDRESS_265_MASK (0xFFFFFFFFu)
  37964. #define CSL_CPINTC_VECTOR_ADDRESS_REG_265_VECTOR_ADDRESS_265_SHIFT (0x00000000u)
  37965. #define CSL_CPINTC_VECTOR_ADDRESS_REG_265_VECTOR_ADDRESS_265_RESETVAL (0x00000000u)
  37966. #define CSL_CPINTC_VECTOR_ADDRESS_REG_265_RESETVAL (0x00000000u)
  37967. /* vector_address_reg_266 */
  37968. #define CSL_CPINTC_VECTOR_ADDRESS_REG_266_VECTOR_ADDRESS_266_MASK (0xFFFFFFFFu)
  37969. #define CSL_CPINTC_VECTOR_ADDRESS_REG_266_VECTOR_ADDRESS_266_SHIFT (0x00000000u)
  37970. #define CSL_CPINTC_VECTOR_ADDRESS_REG_266_VECTOR_ADDRESS_266_RESETVAL (0x00000000u)
  37971. #define CSL_CPINTC_VECTOR_ADDRESS_REG_266_RESETVAL (0x00000000u)
  37972. /* vector_address_reg_267 */
  37973. #define CSL_CPINTC_VECTOR_ADDRESS_REG_267_VECTOR_ADDRESS_267_MASK (0xFFFFFFFFu)
  37974. #define CSL_CPINTC_VECTOR_ADDRESS_REG_267_VECTOR_ADDRESS_267_SHIFT (0x00000000u)
  37975. #define CSL_CPINTC_VECTOR_ADDRESS_REG_267_VECTOR_ADDRESS_267_RESETVAL (0x00000000u)
  37976. #define CSL_CPINTC_VECTOR_ADDRESS_REG_267_RESETVAL (0x00000000u)
  37977. /* vector_address_reg_268 */
  37978. #define CSL_CPINTC_VECTOR_ADDRESS_REG_268_VECTOR_ADDRESS_268_MASK (0xFFFFFFFFu)
  37979. #define CSL_CPINTC_VECTOR_ADDRESS_REG_268_VECTOR_ADDRESS_268_SHIFT (0x00000000u)
  37980. #define CSL_CPINTC_VECTOR_ADDRESS_REG_268_VECTOR_ADDRESS_268_RESETVAL (0x00000000u)
  37981. #define CSL_CPINTC_VECTOR_ADDRESS_REG_268_RESETVAL (0x00000000u)
  37982. /* vector_address_reg_269 */
  37983. #define CSL_CPINTC_VECTOR_ADDRESS_REG_269_VECTOR_ADDRESS_269_MASK (0xFFFFFFFFu)
  37984. #define CSL_CPINTC_VECTOR_ADDRESS_REG_269_VECTOR_ADDRESS_269_SHIFT (0x00000000u)
  37985. #define CSL_CPINTC_VECTOR_ADDRESS_REG_269_VECTOR_ADDRESS_269_RESETVAL (0x00000000u)
  37986. #define CSL_CPINTC_VECTOR_ADDRESS_REG_269_RESETVAL (0x00000000u)
  37987. /* vector_address_reg_270 */
  37988. #define CSL_CPINTC_VECTOR_ADDRESS_REG_270_VECTOR_ADDRESS_270_MASK (0xFFFFFFFFu)
  37989. #define CSL_CPINTC_VECTOR_ADDRESS_REG_270_VECTOR_ADDRESS_270_SHIFT (0x00000000u)
  37990. #define CSL_CPINTC_VECTOR_ADDRESS_REG_270_VECTOR_ADDRESS_270_RESETVAL (0x00000000u)
  37991. #define CSL_CPINTC_VECTOR_ADDRESS_REG_270_RESETVAL (0x00000000u)
  37992. /* vector_address_reg_271 */
  37993. #define CSL_CPINTC_VECTOR_ADDRESS_REG_271_VECTOR_ADDRESS_271_MASK (0xFFFFFFFFu)
  37994. #define CSL_CPINTC_VECTOR_ADDRESS_REG_271_VECTOR_ADDRESS_271_SHIFT (0x00000000u)
  37995. #define CSL_CPINTC_VECTOR_ADDRESS_REG_271_VECTOR_ADDRESS_271_RESETVAL (0x00000000u)
  37996. #define CSL_CPINTC_VECTOR_ADDRESS_REG_271_RESETVAL (0x00000000u)
  37997. /* vector_address_reg_272 */
  37998. #define CSL_CPINTC_VECTOR_ADDRESS_REG_272_VECTOR_ADDRESS_272_MASK (0xFFFFFFFFu)
  37999. #define CSL_CPINTC_VECTOR_ADDRESS_REG_272_VECTOR_ADDRESS_272_SHIFT (0x00000000u)
  38000. #define CSL_CPINTC_VECTOR_ADDRESS_REG_272_VECTOR_ADDRESS_272_RESETVAL (0x00000000u)
  38001. #define CSL_CPINTC_VECTOR_ADDRESS_REG_272_RESETVAL (0x00000000u)
  38002. /* vector_address_reg_273 */
  38003. #define CSL_CPINTC_VECTOR_ADDRESS_REG_273_VECTOR_ADDRESS_273_MASK (0xFFFFFFFFu)
  38004. #define CSL_CPINTC_VECTOR_ADDRESS_REG_273_VECTOR_ADDRESS_273_SHIFT (0x00000000u)
  38005. #define CSL_CPINTC_VECTOR_ADDRESS_REG_273_VECTOR_ADDRESS_273_RESETVAL (0x00000000u)
  38006. #define CSL_CPINTC_VECTOR_ADDRESS_REG_273_RESETVAL (0x00000000u)
  38007. /* vector_address_reg_274 */
  38008. #define CSL_CPINTC_VECTOR_ADDRESS_REG_274_VECTOR_ADDRESS_274_MASK (0xFFFFFFFFu)
  38009. #define CSL_CPINTC_VECTOR_ADDRESS_REG_274_VECTOR_ADDRESS_274_SHIFT (0x00000000u)
  38010. #define CSL_CPINTC_VECTOR_ADDRESS_REG_274_VECTOR_ADDRESS_274_RESETVAL (0x00000000u)
  38011. #define CSL_CPINTC_VECTOR_ADDRESS_REG_274_RESETVAL (0x00000000u)
  38012. /* vector_address_reg_275 */
  38013. #define CSL_CPINTC_VECTOR_ADDRESS_REG_275_VECTOR_ADDRESS_275_MASK (0xFFFFFFFFu)
  38014. #define CSL_CPINTC_VECTOR_ADDRESS_REG_275_VECTOR_ADDRESS_275_SHIFT (0x00000000u)
  38015. #define CSL_CPINTC_VECTOR_ADDRESS_REG_275_VECTOR_ADDRESS_275_RESETVAL (0x00000000u)
  38016. #define CSL_CPINTC_VECTOR_ADDRESS_REG_275_RESETVAL (0x00000000u)
  38017. /* vector_address_reg_276 */
  38018. #define CSL_CPINTC_VECTOR_ADDRESS_REG_276_VECTOR_ADDRESS_276_MASK (0xFFFFFFFFu)
  38019. #define CSL_CPINTC_VECTOR_ADDRESS_REG_276_VECTOR_ADDRESS_276_SHIFT (0x00000000u)
  38020. #define CSL_CPINTC_VECTOR_ADDRESS_REG_276_VECTOR_ADDRESS_276_RESETVAL (0x00000000u)
  38021. #define CSL_CPINTC_VECTOR_ADDRESS_REG_276_RESETVAL (0x00000000u)
  38022. /* vector_address_reg_277 */
  38023. #define CSL_CPINTC_VECTOR_ADDRESS_REG_277_VECTOR_ADDRESS_277_MASK (0xFFFFFFFFu)
  38024. #define CSL_CPINTC_VECTOR_ADDRESS_REG_277_VECTOR_ADDRESS_277_SHIFT (0x00000000u)
  38025. #define CSL_CPINTC_VECTOR_ADDRESS_REG_277_VECTOR_ADDRESS_277_RESETVAL (0x00000000u)
  38026. #define CSL_CPINTC_VECTOR_ADDRESS_REG_277_RESETVAL (0x00000000u)
  38027. /* vector_address_reg_278 */
  38028. #define CSL_CPINTC_VECTOR_ADDRESS_REG_278_VECTOR_ADDRESS_278_MASK (0xFFFFFFFFu)
  38029. #define CSL_CPINTC_VECTOR_ADDRESS_REG_278_VECTOR_ADDRESS_278_SHIFT (0x00000000u)
  38030. #define CSL_CPINTC_VECTOR_ADDRESS_REG_278_VECTOR_ADDRESS_278_RESETVAL (0x00000000u)
  38031. #define CSL_CPINTC_VECTOR_ADDRESS_REG_278_RESETVAL (0x00000000u)
  38032. /* vector_address_reg_279 */
  38033. #define CSL_CPINTC_VECTOR_ADDRESS_REG_279_VECTOR_ADDRESS_279_MASK (0xFFFFFFFFu)
  38034. #define CSL_CPINTC_VECTOR_ADDRESS_REG_279_VECTOR_ADDRESS_279_SHIFT (0x00000000u)
  38035. #define CSL_CPINTC_VECTOR_ADDRESS_REG_279_VECTOR_ADDRESS_279_RESETVAL (0x00000000u)
  38036. #define CSL_CPINTC_VECTOR_ADDRESS_REG_279_RESETVAL (0x00000000u)
  38037. /* vector_address_reg_280 */
  38038. #define CSL_CPINTC_VECTOR_ADDRESS_REG_280_VECTOR_ADDRESS_280_MASK (0xFFFFFFFFu)
  38039. #define CSL_CPINTC_VECTOR_ADDRESS_REG_280_VECTOR_ADDRESS_280_SHIFT (0x00000000u)
  38040. #define CSL_CPINTC_VECTOR_ADDRESS_REG_280_VECTOR_ADDRESS_280_RESETVAL (0x00000000u)
  38041. #define CSL_CPINTC_VECTOR_ADDRESS_REG_280_RESETVAL (0x00000000u)
  38042. /* vector_address_reg_281 */
  38043. #define CSL_CPINTC_VECTOR_ADDRESS_REG_281_VECTOR_ADDRESS_281_MASK (0xFFFFFFFFu)
  38044. #define CSL_CPINTC_VECTOR_ADDRESS_REG_281_VECTOR_ADDRESS_281_SHIFT (0x00000000u)
  38045. #define CSL_CPINTC_VECTOR_ADDRESS_REG_281_VECTOR_ADDRESS_281_RESETVAL (0x00000000u)
  38046. #define CSL_CPINTC_VECTOR_ADDRESS_REG_281_RESETVAL (0x00000000u)
  38047. /* vector_address_reg_282 */
  38048. #define CSL_CPINTC_VECTOR_ADDRESS_REG_282_VECTOR_ADDRESS_282_MASK (0xFFFFFFFFu)
  38049. #define CSL_CPINTC_VECTOR_ADDRESS_REG_282_VECTOR_ADDRESS_282_SHIFT (0x00000000u)
  38050. #define CSL_CPINTC_VECTOR_ADDRESS_REG_282_VECTOR_ADDRESS_282_RESETVAL (0x00000000u)
  38051. #define CSL_CPINTC_VECTOR_ADDRESS_REG_282_RESETVAL (0x00000000u)
  38052. /* vector_address_reg_283 */
  38053. #define CSL_CPINTC_VECTOR_ADDRESS_REG_283_VECTOR_ADDRESS_283_MASK (0xFFFFFFFFu)
  38054. #define CSL_CPINTC_VECTOR_ADDRESS_REG_283_VECTOR_ADDRESS_283_SHIFT (0x00000000u)
  38055. #define CSL_CPINTC_VECTOR_ADDRESS_REG_283_VECTOR_ADDRESS_283_RESETVAL (0x00000000u)
  38056. #define CSL_CPINTC_VECTOR_ADDRESS_REG_283_RESETVAL (0x00000000u)
  38057. /* vector_address_reg_284 */
  38058. #define CSL_CPINTC_VECTOR_ADDRESS_REG_284_VECTOR_ADDRESS_284_MASK (0xFFFFFFFFu)
  38059. #define CSL_CPINTC_VECTOR_ADDRESS_REG_284_VECTOR_ADDRESS_284_SHIFT (0x00000000u)
  38060. #define CSL_CPINTC_VECTOR_ADDRESS_REG_284_VECTOR_ADDRESS_284_RESETVAL (0x00000000u)
  38061. #define CSL_CPINTC_VECTOR_ADDRESS_REG_284_RESETVAL (0x00000000u)
  38062. /* vector_address_reg_285 */
  38063. #define CSL_CPINTC_VECTOR_ADDRESS_REG_285_VECTOR_ADDRESS_285_MASK (0xFFFFFFFFu)
  38064. #define CSL_CPINTC_VECTOR_ADDRESS_REG_285_VECTOR_ADDRESS_285_SHIFT (0x00000000u)
  38065. #define CSL_CPINTC_VECTOR_ADDRESS_REG_285_VECTOR_ADDRESS_285_RESETVAL (0x00000000u)
  38066. #define CSL_CPINTC_VECTOR_ADDRESS_REG_285_RESETVAL (0x00000000u)
  38067. /* vector_address_reg_286 */
  38068. #define CSL_CPINTC_VECTOR_ADDRESS_REG_286_VECTOR_ADDRESS_286_MASK (0xFFFFFFFFu)
  38069. #define CSL_CPINTC_VECTOR_ADDRESS_REG_286_VECTOR_ADDRESS_286_SHIFT (0x00000000u)
  38070. #define CSL_CPINTC_VECTOR_ADDRESS_REG_286_VECTOR_ADDRESS_286_RESETVAL (0x00000000u)
  38071. #define CSL_CPINTC_VECTOR_ADDRESS_REG_286_RESETVAL (0x00000000u)
  38072. /* vector_address_reg_287 */
  38073. #define CSL_CPINTC_VECTOR_ADDRESS_REG_287_VECTOR_ADDRESS_287_MASK (0xFFFFFFFFu)
  38074. #define CSL_CPINTC_VECTOR_ADDRESS_REG_287_VECTOR_ADDRESS_287_SHIFT (0x00000000u)
  38075. #define CSL_CPINTC_VECTOR_ADDRESS_REG_287_VECTOR_ADDRESS_287_RESETVAL (0x00000000u)
  38076. #define CSL_CPINTC_VECTOR_ADDRESS_REG_287_RESETVAL (0x00000000u)
  38077. /* vector_address_reg_288 */
  38078. #define CSL_CPINTC_VECTOR_ADDRESS_REG_288_VECTOR_ADDRESS_288_MASK (0xFFFFFFFFu)
  38079. #define CSL_CPINTC_VECTOR_ADDRESS_REG_288_VECTOR_ADDRESS_288_SHIFT (0x00000000u)
  38080. #define CSL_CPINTC_VECTOR_ADDRESS_REG_288_VECTOR_ADDRESS_288_RESETVAL (0x00000000u)
  38081. #define CSL_CPINTC_VECTOR_ADDRESS_REG_288_RESETVAL (0x00000000u)
  38082. /* vector_address_reg_289 */
  38083. #define CSL_CPINTC_VECTOR_ADDRESS_REG_289_VECTOR_ADDRESS_289_MASK (0xFFFFFFFFu)
  38084. #define CSL_CPINTC_VECTOR_ADDRESS_REG_289_VECTOR_ADDRESS_289_SHIFT (0x00000000u)
  38085. #define CSL_CPINTC_VECTOR_ADDRESS_REG_289_VECTOR_ADDRESS_289_RESETVAL (0x00000000u)
  38086. #define CSL_CPINTC_VECTOR_ADDRESS_REG_289_RESETVAL (0x00000000u)
  38087. /* vector_address_reg_290 */
  38088. #define CSL_CPINTC_VECTOR_ADDRESS_REG_290_VECTOR_ADDRESS_290_MASK (0xFFFFFFFFu)
  38089. #define CSL_CPINTC_VECTOR_ADDRESS_REG_290_VECTOR_ADDRESS_290_SHIFT (0x00000000u)
  38090. #define CSL_CPINTC_VECTOR_ADDRESS_REG_290_VECTOR_ADDRESS_290_RESETVAL (0x00000000u)
  38091. #define CSL_CPINTC_VECTOR_ADDRESS_REG_290_RESETVAL (0x00000000u)
  38092. /* vector_address_reg_291 */
  38093. #define CSL_CPINTC_VECTOR_ADDRESS_REG_291_VECTOR_ADDRESS_291_MASK (0xFFFFFFFFu)
  38094. #define CSL_CPINTC_VECTOR_ADDRESS_REG_291_VECTOR_ADDRESS_291_SHIFT (0x00000000u)
  38095. #define CSL_CPINTC_VECTOR_ADDRESS_REG_291_VECTOR_ADDRESS_291_RESETVAL (0x00000000u)
  38096. #define CSL_CPINTC_VECTOR_ADDRESS_REG_291_RESETVAL (0x00000000u)
  38097. /* vector_address_reg_292 */
  38098. #define CSL_CPINTC_VECTOR_ADDRESS_REG_292_VECTOR_ADDRESS_292_MASK (0xFFFFFFFFu)
  38099. #define CSL_CPINTC_VECTOR_ADDRESS_REG_292_VECTOR_ADDRESS_292_SHIFT (0x00000000u)
  38100. #define CSL_CPINTC_VECTOR_ADDRESS_REG_292_VECTOR_ADDRESS_292_RESETVAL (0x00000000u)
  38101. #define CSL_CPINTC_VECTOR_ADDRESS_REG_292_RESETVAL (0x00000000u)
  38102. /* vector_address_reg_293 */
  38103. #define CSL_CPINTC_VECTOR_ADDRESS_REG_293_VECTOR_ADDRESS_293_MASK (0xFFFFFFFFu)
  38104. #define CSL_CPINTC_VECTOR_ADDRESS_REG_293_VECTOR_ADDRESS_293_SHIFT (0x00000000u)
  38105. #define CSL_CPINTC_VECTOR_ADDRESS_REG_293_VECTOR_ADDRESS_293_RESETVAL (0x00000000u)
  38106. #define CSL_CPINTC_VECTOR_ADDRESS_REG_293_RESETVAL (0x00000000u)
  38107. /* vector_address_reg_294 */
  38108. #define CSL_CPINTC_VECTOR_ADDRESS_REG_294_VECTOR_ADDRESS_294_MASK (0xFFFFFFFFu)
  38109. #define CSL_CPINTC_VECTOR_ADDRESS_REG_294_VECTOR_ADDRESS_294_SHIFT (0x00000000u)
  38110. #define CSL_CPINTC_VECTOR_ADDRESS_REG_294_VECTOR_ADDRESS_294_RESETVAL (0x00000000u)
  38111. #define CSL_CPINTC_VECTOR_ADDRESS_REG_294_RESETVAL (0x00000000u)
  38112. /* vector_address_reg_295 */
  38113. #define CSL_CPINTC_VECTOR_ADDRESS_REG_295_VECTOR_ADDRESS_295_MASK (0xFFFFFFFFu)
  38114. #define CSL_CPINTC_VECTOR_ADDRESS_REG_295_VECTOR_ADDRESS_295_SHIFT (0x00000000u)
  38115. #define CSL_CPINTC_VECTOR_ADDRESS_REG_295_VECTOR_ADDRESS_295_RESETVAL (0x00000000u)
  38116. #define CSL_CPINTC_VECTOR_ADDRESS_REG_295_RESETVAL (0x00000000u)
  38117. /* vector_address_reg_296 */
  38118. #define CSL_CPINTC_VECTOR_ADDRESS_REG_296_VECTOR_ADDRESS_296_MASK (0xFFFFFFFFu)
  38119. #define CSL_CPINTC_VECTOR_ADDRESS_REG_296_VECTOR_ADDRESS_296_SHIFT (0x00000000u)
  38120. #define CSL_CPINTC_VECTOR_ADDRESS_REG_296_VECTOR_ADDRESS_296_RESETVAL (0x00000000u)
  38121. #define CSL_CPINTC_VECTOR_ADDRESS_REG_296_RESETVAL (0x00000000u)
  38122. /* vector_address_reg_297 */
  38123. #define CSL_CPINTC_VECTOR_ADDRESS_REG_297_VECTOR_ADDRESS_297_MASK (0xFFFFFFFFu)
  38124. #define CSL_CPINTC_VECTOR_ADDRESS_REG_297_VECTOR_ADDRESS_297_SHIFT (0x00000000u)
  38125. #define CSL_CPINTC_VECTOR_ADDRESS_REG_297_VECTOR_ADDRESS_297_RESETVAL (0x00000000u)
  38126. #define CSL_CPINTC_VECTOR_ADDRESS_REG_297_RESETVAL (0x00000000u)
  38127. /* vector_address_reg_298 */
  38128. #define CSL_CPINTC_VECTOR_ADDRESS_REG_298_VECTOR_ADDRESS_298_MASK (0xFFFFFFFFu)
  38129. #define CSL_CPINTC_VECTOR_ADDRESS_REG_298_VECTOR_ADDRESS_298_SHIFT (0x00000000u)
  38130. #define CSL_CPINTC_VECTOR_ADDRESS_REG_298_VECTOR_ADDRESS_298_RESETVAL (0x00000000u)
  38131. #define CSL_CPINTC_VECTOR_ADDRESS_REG_298_RESETVAL (0x00000000u)
  38132. /* vector_address_reg_299 */
  38133. #define CSL_CPINTC_VECTOR_ADDRESS_REG_299_VECTOR_ADDRESS_299_MASK (0xFFFFFFFFu)
  38134. #define CSL_CPINTC_VECTOR_ADDRESS_REG_299_VECTOR_ADDRESS_299_SHIFT (0x00000000u)
  38135. #define CSL_CPINTC_VECTOR_ADDRESS_REG_299_VECTOR_ADDRESS_299_RESETVAL (0x00000000u)
  38136. #define CSL_CPINTC_VECTOR_ADDRESS_REG_299_RESETVAL (0x00000000u)
  38137. /* vector_address_reg_300 */
  38138. #define CSL_CPINTC_VECTOR_ADDRESS_REG_300_VECTOR_ADDRESS_300_MASK (0xFFFFFFFFu)
  38139. #define CSL_CPINTC_VECTOR_ADDRESS_REG_300_VECTOR_ADDRESS_300_SHIFT (0x00000000u)
  38140. #define CSL_CPINTC_VECTOR_ADDRESS_REG_300_VECTOR_ADDRESS_300_RESETVAL (0x00000000u)
  38141. #define CSL_CPINTC_VECTOR_ADDRESS_REG_300_RESETVAL (0x00000000u)
  38142. /* vector_address_reg_301 */
  38143. #define CSL_CPINTC_VECTOR_ADDRESS_REG_301_VECTOR_ADDRESS_301_MASK (0xFFFFFFFFu)
  38144. #define CSL_CPINTC_VECTOR_ADDRESS_REG_301_VECTOR_ADDRESS_301_SHIFT (0x00000000u)
  38145. #define CSL_CPINTC_VECTOR_ADDRESS_REG_301_VECTOR_ADDRESS_301_RESETVAL (0x00000000u)
  38146. #define CSL_CPINTC_VECTOR_ADDRESS_REG_301_RESETVAL (0x00000000u)
  38147. /* vector_address_reg_302 */
  38148. #define CSL_CPINTC_VECTOR_ADDRESS_REG_302_VECTOR_ADDRESS_302_MASK (0xFFFFFFFFu)
  38149. #define CSL_CPINTC_VECTOR_ADDRESS_REG_302_VECTOR_ADDRESS_302_SHIFT (0x00000000u)
  38150. #define CSL_CPINTC_VECTOR_ADDRESS_REG_302_VECTOR_ADDRESS_302_RESETVAL (0x00000000u)
  38151. #define CSL_CPINTC_VECTOR_ADDRESS_REG_302_RESETVAL (0x00000000u)
  38152. /* vector_address_reg_303 */
  38153. #define CSL_CPINTC_VECTOR_ADDRESS_REG_303_VECTOR_ADDRESS_303_MASK (0xFFFFFFFFu)
  38154. #define CSL_CPINTC_VECTOR_ADDRESS_REG_303_VECTOR_ADDRESS_303_SHIFT (0x00000000u)
  38155. #define CSL_CPINTC_VECTOR_ADDRESS_REG_303_VECTOR_ADDRESS_303_RESETVAL (0x00000000u)
  38156. #define CSL_CPINTC_VECTOR_ADDRESS_REG_303_RESETVAL (0x00000000u)
  38157. /* vector_address_reg_304 */
  38158. #define CSL_CPINTC_VECTOR_ADDRESS_REG_304_VECTOR_ADDRESS_304_MASK (0xFFFFFFFFu)
  38159. #define CSL_CPINTC_VECTOR_ADDRESS_REG_304_VECTOR_ADDRESS_304_SHIFT (0x00000000u)
  38160. #define CSL_CPINTC_VECTOR_ADDRESS_REG_304_VECTOR_ADDRESS_304_RESETVAL (0x00000000u)
  38161. #define CSL_CPINTC_VECTOR_ADDRESS_REG_304_RESETVAL (0x00000000u)
  38162. /* vector_address_reg_305 */
  38163. #define CSL_CPINTC_VECTOR_ADDRESS_REG_305_VECTOR_ADDRESS_305_MASK (0xFFFFFFFFu)
  38164. #define CSL_CPINTC_VECTOR_ADDRESS_REG_305_VECTOR_ADDRESS_305_SHIFT (0x00000000u)
  38165. #define CSL_CPINTC_VECTOR_ADDRESS_REG_305_VECTOR_ADDRESS_305_RESETVAL (0x00000000u)
  38166. #define CSL_CPINTC_VECTOR_ADDRESS_REG_305_RESETVAL (0x00000000u)
  38167. /* vector_address_reg_306 */
  38168. #define CSL_CPINTC_VECTOR_ADDRESS_REG_306_VECTOR_ADDRESS_306_MASK (0xFFFFFFFFu)
  38169. #define CSL_CPINTC_VECTOR_ADDRESS_REG_306_VECTOR_ADDRESS_306_SHIFT (0x00000000u)
  38170. #define CSL_CPINTC_VECTOR_ADDRESS_REG_306_VECTOR_ADDRESS_306_RESETVAL (0x00000000u)
  38171. #define CSL_CPINTC_VECTOR_ADDRESS_REG_306_RESETVAL (0x00000000u)
  38172. /* vector_address_reg_307 */
  38173. #define CSL_CPINTC_VECTOR_ADDRESS_REG_307_VECTOR_ADDRESS_307_MASK (0xFFFFFFFFu)
  38174. #define CSL_CPINTC_VECTOR_ADDRESS_REG_307_VECTOR_ADDRESS_307_SHIFT (0x00000000u)
  38175. #define CSL_CPINTC_VECTOR_ADDRESS_REG_307_VECTOR_ADDRESS_307_RESETVAL (0x00000000u)
  38176. #define CSL_CPINTC_VECTOR_ADDRESS_REG_307_RESETVAL (0x00000000u)
  38177. /* vector_address_reg_308 */
  38178. #define CSL_CPINTC_VECTOR_ADDRESS_REG_308_VECTOR_ADDRESS_308_MASK (0xFFFFFFFFu)
  38179. #define CSL_CPINTC_VECTOR_ADDRESS_REG_308_VECTOR_ADDRESS_308_SHIFT (0x00000000u)
  38180. #define CSL_CPINTC_VECTOR_ADDRESS_REG_308_VECTOR_ADDRESS_308_RESETVAL (0x00000000u)
  38181. #define CSL_CPINTC_VECTOR_ADDRESS_REG_308_RESETVAL (0x00000000u)
  38182. /* vector_address_reg_309 */
  38183. #define CSL_CPINTC_VECTOR_ADDRESS_REG_309_VECTOR_ADDRESS_309_MASK (0xFFFFFFFFu)
  38184. #define CSL_CPINTC_VECTOR_ADDRESS_REG_309_VECTOR_ADDRESS_309_SHIFT (0x00000000u)
  38185. #define CSL_CPINTC_VECTOR_ADDRESS_REG_309_VECTOR_ADDRESS_309_RESETVAL (0x00000000u)
  38186. #define CSL_CPINTC_VECTOR_ADDRESS_REG_309_RESETVAL (0x00000000u)
  38187. /* vector_address_reg_310 */
  38188. #define CSL_CPINTC_VECTOR_ADDRESS_REG_310_VECTOR_ADDRESS_310_MASK (0xFFFFFFFFu)
  38189. #define CSL_CPINTC_VECTOR_ADDRESS_REG_310_VECTOR_ADDRESS_310_SHIFT (0x00000000u)
  38190. #define CSL_CPINTC_VECTOR_ADDRESS_REG_310_VECTOR_ADDRESS_310_RESETVAL (0x00000000u)
  38191. #define CSL_CPINTC_VECTOR_ADDRESS_REG_310_RESETVAL (0x00000000u)
  38192. /* vector_address_reg_311 */
  38193. #define CSL_CPINTC_VECTOR_ADDRESS_REG_311_VECTOR_ADDRESS_311_MASK (0xFFFFFFFFu)
  38194. #define CSL_CPINTC_VECTOR_ADDRESS_REG_311_VECTOR_ADDRESS_311_SHIFT (0x00000000u)
  38195. #define CSL_CPINTC_VECTOR_ADDRESS_REG_311_VECTOR_ADDRESS_311_RESETVAL (0x00000000u)
  38196. #define CSL_CPINTC_VECTOR_ADDRESS_REG_311_RESETVAL (0x00000000u)
  38197. /* vector_address_reg_312 */
  38198. #define CSL_CPINTC_VECTOR_ADDRESS_REG_312_VECTOR_ADDRESS_312_MASK (0xFFFFFFFFu)
  38199. #define CSL_CPINTC_VECTOR_ADDRESS_REG_312_VECTOR_ADDRESS_312_SHIFT (0x00000000u)
  38200. #define CSL_CPINTC_VECTOR_ADDRESS_REG_312_VECTOR_ADDRESS_312_RESETVAL (0x00000000u)
  38201. #define CSL_CPINTC_VECTOR_ADDRESS_REG_312_RESETVAL (0x00000000u)
  38202. /* vector_address_reg_313 */
  38203. #define CSL_CPINTC_VECTOR_ADDRESS_REG_313_VECTOR_ADDRESS_313_MASK (0xFFFFFFFFu)
  38204. #define CSL_CPINTC_VECTOR_ADDRESS_REG_313_VECTOR_ADDRESS_313_SHIFT (0x00000000u)
  38205. #define CSL_CPINTC_VECTOR_ADDRESS_REG_313_VECTOR_ADDRESS_313_RESETVAL (0x00000000u)
  38206. #define CSL_CPINTC_VECTOR_ADDRESS_REG_313_RESETVAL (0x00000000u)
  38207. /* vector_address_reg_314 */
  38208. #define CSL_CPINTC_VECTOR_ADDRESS_REG_314_VECTOR_ADDRESS_314_MASK (0xFFFFFFFFu)
  38209. #define CSL_CPINTC_VECTOR_ADDRESS_REG_314_VECTOR_ADDRESS_314_SHIFT (0x00000000u)
  38210. #define CSL_CPINTC_VECTOR_ADDRESS_REG_314_VECTOR_ADDRESS_314_RESETVAL (0x00000000u)
  38211. #define CSL_CPINTC_VECTOR_ADDRESS_REG_314_RESETVAL (0x00000000u)
  38212. /* vector_address_reg_315 */
  38213. #define CSL_CPINTC_VECTOR_ADDRESS_REG_315_VECTOR_ADDRESS_315_MASK (0xFFFFFFFFu)
  38214. #define CSL_CPINTC_VECTOR_ADDRESS_REG_315_VECTOR_ADDRESS_315_SHIFT (0x00000000u)
  38215. #define CSL_CPINTC_VECTOR_ADDRESS_REG_315_VECTOR_ADDRESS_315_RESETVAL (0x00000000u)
  38216. #define CSL_CPINTC_VECTOR_ADDRESS_REG_315_RESETVAL (0x00000000u)
  38217. /* vector_address_reg_316 */
  38218. #define CSL_CPINTC_VECTOR_ADDRESS_REG_316_VECTOR_ADDRESS_316_MASK (0xFFFFFFFFu)
  38219. #define CSL_CPINTC_VECTOR_ADDRESS_REG_316_VECTOR_ADDRESS_316_SHIFT (0x00000000u)
  38220. #define CSL_CPINTC_VECTOR_ADDRESS_REG_316_VECTOR_ADDRESS_316_RESETVAL (0x00000000u)
  38221. #define CSL_CPINTC_VECTOR_ADDRESS_REG_316_RESETVAL (0x00000000u)
  38222. /* vector_address_reg_317 */
  38223. #define CSL_CPINTC_VECTOR_ADDRESS_REG_317_VECTOR_ADDRESS_317_MASK (0xFFFFFFFFu)
  38224. #define CSL_CPINTC_VECTOR_ADDRESS_REG_317_VECTOR_ADDRESS_317_SHIFT (0x00000000u)
  38225. #define CSL_CPINTC_VECTOR_ADDRESS_REG_317_VECTOR_ADDRESS_317_RESETVAL (0x00000000u)
  38226. #define CSL_CPINTC_VECTOR_ADDRESS_REG_317_RESETVAL (0x00000000u)
  38227. /* vector_address_reg_318 */
  38228. #define CSL_CPINTC_VECTOR_ADDRESS_REG_318_VECTOR_ADDRESS_318_MASK (0xFFFFFFFFu)
  38229. #define CSL_CPINTC_VECTOR_ADDRESS_REG_318_VECTOR_ADDRESS_318_SHIFT (0x00000000u)
  38230. #define CSL_CPINTC_VECTOR_ADDRESS_REG_318_VECTOR_ADDRESS_318_RESETVAL (0x00000000u)
  38231. #define CSL_CPINTC_VECTOR_ADDRESS_REG_318_RESETVAL (0x00000000u)
  38232. /* vector_address_reg_319 */
  38233. #define CSL_CPINTC_VECTOR_ADDRESS_REG_319_VECTOR_ADDRESS_319_MASK (0xFFFFFFFFu)
  38234. #define CSL_CPINTC_VECTOR_ADDRESS_REG_319_VECTOR_ADDRESS_319_SHIFT (0x00000000u)
  38235. #define CSL_CPINTC_VECTOR_ADDRESS_REG_319_VECTOR_ADDRESS_319_RESETVAL (0x00000000u)
  38236. #define CSL_CPINTC_VECTOR_ADDRESS_REG_319_RESETVAL (0x00000000u)
  38237. /* vector_address_reg_320 */
  38238. #define CSL_CPINTC_VECTOR_ADDRESS_REG_320_VECTOR_ADDRESS_320_MASK (0xFFFFFFFFu)
  38239. #define CSL_CPINTC_VECTOR_ADDRESS_REG_320_VECTOR_ADDRESS_320_SHIFT (0x00000000u)
  38240. #define CSL_CPINTC_VECTOR_ADDRESS_REG_320_VECTOR_ADDRESS_320_RESETVAL (0x00000000u)
  38241. #define CSL_CPINTC_VECTOR_ADDRESS_REG_320_RESETVAL (0x00000000u)
  38242. /* vector_address_reg_321 */
  38243. #define CSL_CPINTC_VECTOR_ADDRESS_REG_321_VECTOR_ADDRESS_321_MASK (0xFFFFFFFFu)
  38244. #define CSL_CPINTC_VECTOR_ADDRESS_REG_321_VECTOR_ADDRESS_321_SHIFT (0x00000000u)
  38245. #define CSL_CPINTC_VECTOR_ADDRESS_REG_321_VECTOR_ADDRESS_321_RESETVAL (0x00000000u)
  38246. #define CSL_CPINTC_VECTOR_ADDRESS_REG_321_RESETVAL (0x00000000u)
  38247. /* vector_address_reg_322 */
  38248. #define CSL_CPINTC_VECTOR_ADDRESS_REG_322_VECTOR_ADDRESS_322_MASK (0xFFFFFFFFu)
  38249. #define CSL_CPINTC_VECTOR_ADDRESS_REG_322_VECTOR_ADDRESS_322_SHIFT (0x00000000u)
  38250. #define CSL_CPINTC_VECTOR_ADDRESS_REG_322_VECTOR_ADDRESS_322_RESETVAL (0x00000000u)
  38251. #define CSL_CPINTC_VECTOR_ADDRESS_REG_322_RESETVAL (0x00000000u)
  38252. /* vector_address_reg_323 */
  38253. #define CSL_CPINTC_VECTOR_ADDRESS_REG_323_VECTOR_ADDRESS_323_MASK (0xFFFFFFFFu)
  38254. #define CSL_CPINTC_VECTOR_ADDRESS_REG_323_VECTOR_ADDRESS_323_SHIFT (0x00000000u)
  38255. #define CSL_CPINTC_VECTOR_ADDRESS_REG_323_VECTOR_ADDRESS_323_RESETVAL (0x00000000u)
  38256. #define CSL_CPINTC_VECTOR_ADDRESS_REG_323_RESETVAL (0x00000000u)
  38257. /* vector_address_reg_324 */
  38258. #define CSL_CPINTC_VECTOR_ADDRESS_REG_324_VECTOR_ADDRESS_324_MASK (0xFFFFFFFFu)
  38259. #define CSL_CPINTC_VECTOR_ADDRESS_REG_324_VECTOR_ADDRESS_324_SHIFT (0x00000000u)
  38260. #define CSL_CPINTC_VECTOR_ADDRESS_REG_324_VECTOR_ADDRESS_324_RESETVAL (0x00000000u)
  38261. #define CSL_CPINTC_VECTOR_ADDRESS_REG_324_RESETVAL (0x00000000u)
  38262. /* vector_address_reg_325 */
  38263. #define CSL_CPINTC_VECTOR_ADDRESS_REG_325_VECTOR_ADDRESS_325_MASK (0xFFFFFFFFu)
  38264. #define CSL_CPINTC_VECTOR_ADDRESS_REG_325_VECTOR_ADDRESS_325_SHIFT (0x00000000u)
  38265. #define CSL_CPINTC_VECTOR_ADDRESS_REG_325_VECTOR_ADDRESS_325_RESETVAL (0x00000000u)
  38266. #define CSL_CPINTC_VECTOR_ADDRESS_REG_325_RESETVAL (0x00000000u)
  38267. /* vector_address_reg_326 */
  38268. #define CSL_CPINTC_VECTOR_ADDRESS_REG_326_VECTOR_ADDRESS_326_MASK (0xFFFFFFFFu)
  38269. #define CSL_CPINTC_VECTOR_ADDRESS_REG_326_VECTOR_ADDRESS_326_SHIFT (0x00000000u)
  38270. #define CSL_CPINTC_VECTOR_ADDRESS_REG_326_VECTOR_ADDRESS_326_RESETVAL (0x00000000u)
  38271. #define CSL_CPINTC_VECTOR_ADDRESS_REG_326_RESETVAL (0x00000000u)
  38272. /* vector_address_reg_327 */
  38273. #define CSL_CPINTC_VECTOR_ADDRESS_REG_327_VECTOR_ADDRESS_327_MASK (0xFFFFFFFFu)
  38274. #define CSL_CPINTC_VECTOR_ADDRESS_REG_327_VECTOR_ADDRESS_327_SHIFT (0x00000000u)
  38275. #define CSL_CPINTC_VECTOR_ADDRESS_REG_327_VECTOR_ADDRESS_327_RESETVAL (0x00000000u)
  38276. #define CSL_CPINTC_VECTOR_ADDRESS_REG_327_RESETVAL (0x00000000u)
  38277. /* vector_address_reg_328 */
  38278. #define CSL_CPINTC_VECTOR_ADDRESS_REG_328_VECTOR_ADDRESS_328_MASK (0xFFFFFFFFu)
  38279. #define CSL_CPINTC_VECTOR_ADDRESS_REG_328_VECTOR_ADDRESS_328_SHIFT (0x00000000u)
  38280. #define CSL_CPINTC_VECTOR_ADDRESS_REG_328_VECTOR_ADDRESS_328_RESETVAL (0x00000000u)
  38281. #define CSL_CPINTC_VECTOR_ADDRESS_REG_328_RESETVAL (0x00000000u)
  38282. /* vector_address_reg_329 */
  38283. #define CSL_CPINTC_VECTOR_ADDRESS_REG_329_VECTOR_ADDRESS_329_MASK (0xFFFFFFFFu)
  38284. #define CSL_CPINTC_VECTOR_ADDRESS_REG_329_VECTOR_ADDRESS_329_SHIFT (0x00000000u)
  38285. #define CSL_CPINTC_VECTOR_ADDRESS_REG_329_VECTOR_ADDRESS_329_RESETVAL (0x00000000u)
  38286. #define CSL_CPINTC_VECTOR_ADDRESS_REG_329_RESETVAL (0x00000000u)
  38287. /* vector_address_reg_330 */
  38288. #define CSL_CPINTC_VECTOR_ADDRESS_REG_330_VECTOR_ADDRESS_330_MASK (0xFFFFFFFFu)
  38289. #define CSL_CPINTC_VECTOR_ADDRESS_REG_330_VECTOR_ADDRESS_330_SHIFT (0x00000000u)
  38290. #define CSL_CPINTC_VECTOR_ADDRESS_REG_330_VECTOR_ADDRESS_330_RESETVAL (0x00000000u)
  38291. #define CSL_CPINTC_VECTOR_ADDRESS_REG_330_RESETVAL (0x00000000u)
  38292. /* vector_address_reg_331 */
  38293. #define CSL_CPINTC_VECTOR_ADDRESS_REG_331_VECTOR_ADDRESS_331_MASK (0xFFFFFFFFu)
  38294. #define CSL_CPINTC_VECTOR_ADDRESS_REG_331_VECTOR_ADDRESS_331_SHIFT (0x00000000u)
  38295. #define CSL_CPINTC_VECTOR_ADDRESS_REG_331_VECTOR_ADDRESS_331_RESETVAL (0x00000000u)
  38296. #define CSL_CPINTC_VECTOR_ADDRESS_REG_331_RESETVAL (0x00000000u)
  38297. /* vector_address_reg_332 */
  38298. #define CSL_CPINTC_VECTOR_ADDRESS_REG_332_VECTOR_ADDRESS_332_MASK (0xFFFFFFFFu)
  38299. #define CSL_CPINTC_VECTOR_ADDRESS_REG_332_VECTOR_ADDRESS_332_SHIFT (0x00000000u)
  38300. #define CSL_CPINTC_VECTOR_ADDRESS_REG_332_VECTOR_ADDRESS_332_RESETVAL (0x00000000u)
  38301. #define CSL_CPINTC_VECTOR_ADDRESS_REG_332_RESETVAL (0x00000000u)
  38302. /* vector_address_reg_333 */
  38303. #define CSL_CPINTC_VECTOR_ADDRESS_REG_333_VECTOR_ADDRESS_333_MASK (0xFFFFFFFFu)
  38304. #define CSL_CPINTC_VECTOR_ADDRESS_REG_333_VECTOR_ADDRESS_333_SHIFT (0x00000000u)
  38305. #define CSL_CPINTC_VECTOR_ADDRESS_REG_333_VECTOR_ADDRESS_333_RESETVAL (0x00000000u)
  38306. #define CSL_CPINTC_VECTOR_ADDRESS_REG_333_RESETVAL (0x00000000u)
  38307. /* vector_address_reg_334 */
  38308. #define CSL_CPINTC_VECTOR_ADDRESS_REG_334_VECTOR_ADDRESS_334_MASK (0xFFFFFFFFu)
  38309. #define CSL_CPINTC_VECTOR_ADDRESS_REG_334_VECTOR_ADDRESS_334_SHIFT (0x00000000u)
  38310. #define CSL_CPINTC_VECTOR_ADDRESS_REG_334_VECTOR_ADDRESS_334_RESETVAL (0x00000000u)
  38311. #define CSL_CPINTC_VECTOR_ADDRESS_REG_334_RESETVAL (0x00000000u)
  38312. /* vector_address_reg_335 */
  38313. #define CSL_CPINTC_VECTOR_ADDRESS_REG_335_VECTOR_ADDRESS_335_MASK (0xFFFFFFFFu)
  38314. #define CSL_CPINTC_VECTOR_ADDRESS_REG_335_VECTOR_ADDRESS_335_SHIFT (0x00000000u)
  38315. #define CSL_CPINTC_VECTOR_ADDRESS_REG_335_VECTOR_ADDRESS_335_RESETVAL (0x00000000u)
  38316. #define CSL_CPINTC_VECTOR_ADDRESS_REG_335_RESETVAL (0x00000000u)
  38317. /* vector_address_reg_336 */
  38318. #define CSL_CPINTC_VECTOR_ADDRESS_REG_336_VECTOR_ADDRESS_336_MASK (0xFFFFFFFFu)
  38319. #define CSL_CPINTC_VECTOR_ADDRESS_REG_336_VECTOR_ADDRESS_336_SHIFT (0x00000000u)
  38320. #define CSL_CPINTC_VECTOR_ADDRESS_REG_336_VECTOR_ADDRESS_336_RESETVAL (0x00000000u)
  38321. #define CSL_CPINTC_VECTOR_ADDRESS_REG_336_RESETVAL (0x00000000u)
  38322. /* vector_address_reg_337 */
  38323. #define CSL_CPINTC_VECTOR_ADDRESS_REG_337_VECTOR_ADDRESS_337_MASK (0xFFFFFFFFu)
  38324. #define CSL_CPINTC_VECTOR_ADDRESS_REG_337_VECTOR_ADDRESS_337_SHIFT (0x00000000u)
  38325. #define CSL_CPINTC_VECTOR_ADDRESS_REG_337_VECTOR_ADDRESS_337_RESETVAL (0x00000000u)
  38326. #define CSL_CPINTC_VECTOR_ADDRESS_REG_337_RESETVAL (0x00000000u)
  38327. /* vector_address_reg_338 */
  38328. #define CSL_CPINTC_VECTOR_ADDRESS_REG_338_VECTOR_ADDRESS_338_MASK (0xFFFFFFFFu)
  38329. #define CSL_CPINTC_VECTOR_ADDRESS_REG_338_VECTOR_ADDRESS_338_SHIFT (0x00000000u)
  38330. #define CSL_CPINTC_VECTOR_ADDRESS_REG_338_VECTOR_ADDRESS_338_RESETVAL (0x00000000u)
  38331. #define CSL_CPINTC_VECTOR_ADDRESS_REG_338_RESETVAL (0x00000000u)
  38332. /* vector_address_reg_339 */
  38333. #define CSL_CPINTC_VECTOR_ADDRESS_REG_339_VECTOR_ADDRESS_339_MASK (0xFFFFFFFFu)
  38334. #define CSL_CPINTC_VECTOR_ADDRESS_REG_339_VECTOR_ADDRESS_339_SHIFT (0x00000000u)
  38335. #define CSL_CPINTC_VECTOR_ADDRESS_REG_339_VECTOR_ADDRESS_339_RESETVAL (0x00000000u)
  38336. #define CSL_CPINTC_VECTOR_ADDRESS_REG_339_RESETVAL (0x00000000u)
  38337. /* vector_address_reg_340 */
  38338. #define CSL_CPINTC_VECTOR_ADDRESS_REG_340_VECTOR_ADDRESS_340_MASK (0xFFFFFFFFu)
  38339. #define CSL_CPINTC_VECTOR_ADDRESS_REG_340_VECTOR_ADDRESS_340_SHIFT (0x00000000u)
  38340. #define CSL_CPINTC_VECTOR_ADDRESS_REG_340_VECTOR_ADDRESS_340_RESETVAL (0x00000000u)
  38341. #define CSL_CPINTC_VECTOR_ADDRESS_REG_340_RESETVAL (0x00000000u)
  38342. /* vector_address_reg_341 */
  38343. #define CSL_CPINTC_VECTOR_ADDRESS_REG_341_VECTOR_ADDRESS_341_MASK (0xFFFFFFFFu)
  38344. #define CSL_CPINTC_VECTOR_ADDRESS_REG_341_VECTOR_ADDRESS_341_SHIFT (0x00000000u)
  38345. #define CSL_CPINTC_VECTOR_ADDRESS_REG_341_VECTOR_ADDRESS_341_RESETVAL (0x00000000u)
  38346. #define CSL_CPINTC_VECTOR_ADDRESS_REG_341_RESETVAL (0x00000000u)
  38347. /* vector_address_reg_342 */
  38348. #define CSL_CPINTC_VECTOR_ADDRESS_REG_342_VECTOR_ADDRESS_342_MASK (0xFFFFFFFFu)
  38349. #define CSL_CPINTC_VECTOR_ADDRESS_REG_342_VECTOR_ADDRESS_342_SHIFT (0x00000000u)
  38350. #define CSL_CPINTC_VECTOR_ADDRESS_REG_342_VECTOR_ADDRESS_342_RESETVAL (0x00000000u)
  38351. #define CSL_CPINTC_VECTOR_ADDRESS_REG_342_RESETVAL (0x00000000u)
  38352. /* vector_address_reg_343 */
  38353. #define CSL_CPINTC_VECTOR_ADDRESS_REG_343_VECTOR_ADDRESS_343_MASK (0xFFFFFFFFu)
  38354. #define CSL_CPINTC_VECTOR_ADDRESS_REG_343_VECTOR_ADDRESS_343_SHIFT (0x00000000u)
  38355. #define CSL_CPINTC_VECTOR_ADDRESS_REG_343_VECTOR_ADDRESS_343_RESETVAL (0x00000000u)
  38356. #define CSL_CPINTC_VECTOR_ADDRESS_REG_343_RESETVAL (0x00000000u)
  38357. /* vector_address_reg_344 */
  38358. #define CSL_CPINTC_VECTOR_ADDRESS_REG_344_VECTOR_ADDRESS_344_MASK (0xFFFFFFFFu)
  38359. #define CSL_CPINTC_VECTOR_ADDRESS_REG_344_VECTOR_ADDRESS_344_SHIFT (0x00000000u)
  38360. #define CSL_CPINTC_VECTOR_ADDRESS_REG_344_VECTOR_ADDRESS_344_RESETVAL (0x00000000u)
  38361. #define CSL_CPINTC_VECTOR_ADDRESS_REG_344_RESETVAL (0x00000000u)
  38362. /* vector_address_reg_345 */
  38363. #define CSL_CPINTC_VECTOR_ADDRESS_REG_345_VECTOR_ADDRESS_345_MASK (0xFFFFFFFFu)
  38364. #define CSL_CPINTC_VECTOR_ADDRESS_REG_345_VECTOR_ADDRESS_345_SHIFT (0x00000000u)
  38365. #define CSL_CPINTC_VECTOR_ADDRESS_REG_345_VECTOR_ADDRESS_345_RESETVAL (0x00000000u)
  38366. #define CSL_CPINTC_VECTOR_ADDRESS_REG_345_RESETVAL (0x00000000u)
  38367. /* vector_address_reg_346 */
  38368. #define CSL_CPINTC_VECTOR_ADDRESS_REG_346_VECTOR_ADDRESS_346_MASK (0xFFFFFFFFu)
  38369. #define CSL_CPINTC_VECTOR_ADDRESS_REG_346_VECTOR_ADDRESS_346_SHIFT (0x00000000u)
  38370. #define CSL_CPINTC_VECTOR_ADDRESS_REG_346_VECTOR_ADDRESS_346_RESETVAL (0x00000000u)
  38371. #define CSL_CPINTC_VECTOR_ADDRESS_REG_346_RESETVAL (0x00000000u)
  38372. /* vector_address_reg_347 */
  38373. #define CSL_CPINTC_VECTOR_ADDRESS_REG_347_VECTOR_ADDRESS_347_MASK (0xFFFFFFFFu)
  38374. #define CSL_CPINTC_VECTOR_ADDRESS_REG_347_VECTOR_ADDRESS_347_SHIFT (0x00000000u)
  38375. #define CSL_CPINTC_VECTOR_ADDRESS_REG_347_VECTOR_ADDRESS_347_RESETVAL (0x00000000u)
  38376. #define CSL_CPINTC_VECTOR_ADDRESS_REG_347_RESETVAL (0x00000000u)
  38377. /* vector_address_reg_348 */
  38378. #define CSL_CPINTC_VECTOR_ADDRESS_REG_348_VECTOR_ADDRESS_348_MASK (0xFFFFFFFFu)
  38379. #define CSL_CPINTC_VECTOR_ADDRESS_REG_348_VECTOR_ADDRESS_348_SHIFT (0x00000000u)
  38380. #define CSL_CPINTC_VECTOR_ADDRESS_REG_348_VECTOR_ADDRESS_348_RESETVAL (0x00000000u)
  38381. #define CSL_CPINTC_VECTOR_ADDRESS_REG_348_RESETVAL (0x00000000u)
  38382. /* vector_address_reg_349 */
  38383. #define CSL_CPINTC_VECTOR_ADDRESS_REG_349_VECTOR_ADDRESS_349_MASK (0xFFFFFFFFu)
  38384. #define CSL_CPINTC_VECTOR_ADDRESS_REG_349_VECTOR_ADDRESS_349_SHIFT (0x00000000u)
  38385. #define CSL_CPINTC_VECTOR_ADDRESS_REG_349_VECTOR_ADDRESS_349_RESETVAL (0x00000000u)
  38386. #define CSL_CPINTC_VECTOR_ADDRESS_REG_349_RESETVAL (0x00000000u)
  38387. /* vector_address_reg_350 */
  38388. #define CSL_CPINTC_VECTOR_ADDRESS_REG_350_VECTOR_ADDRESS_350_MASK (0xFFFFFFFFu)
  38389. #define CSL_CPINTC_VECTOR_ADDRESS_REG_350_VECTOR_ADDRESS_350_SHIFT (0x00000000u)
  38390. #define CSL_CPINTC_VECTOR_ADDRESS_REG_350_VECTOR_ADDRESS_350_RESETVAL (0x00000000u)
  38391. #define CSL_CPINTC_VECTOR_ADDRESS_REG_350_RESETVAL (0x00000000u)
  38392. /* vector_address_reg_351 */
  38393. #define CSL_CPINTC_VECTOR_ADDRESS_REG_351_VECTOR_ADDRESS_351_MASK (0xFFFFFFFFu)
  38394. #define CSL_CPINTC_VECTOR_ADDRESS_REG_351_VECTOR_ADDRESS_351_SHIFT (0x00000000u)
  38395. #define CSL_CPINTC_VECTOR_ADDRESS_REG_351_VECTOR_ADDRESS_351_RESETVAL (0x00000000u)
  38396. #define CSL_CPINTC_VECTOR_ADDRESS_REG_351_RESETVAL (0x00000000u)
  38397. /* vector_address_reg_352 */
  38398. #define CSL_CPINTC_VECTOR_ADDRESS_REG_352_VECTOR_ADDRESS_352_MASK (0xFFFFFFFFu)
  38399. #define CSL_CPINTC_VECTOR_ADDRESS_REG_352_VECTOR_ADDRESS_352_SHIFT (0x00000000u)
  38400. #define CSL_CPINTC_VECTOR_ADDRESS_REG_352_VECTOR_ADDRESS_352_RESETVAL (0x00000000u)
  38401. #define CSL_CPINTC_VECTOR_ADDRESS_REG_352_RESETVAL (0x00000000u)
  38402. /* vector_address_reg_353 */
  38403. #define CSL_CPINTC_VECTOR_ADDRESS_REG_353_VECTOR_ADDRESS_353_MASK (0xFFFFFFFFu)
  38404. #define CSL_CPINTC_VECTOR_ADDRESS_REG_353_VECTOR_ADDRESS_353_SHIFT (0x00000000u)
  38405. #define CSL_CPINTC_VECTOR_ADDRESS_REG_353_VECTOR_ADDRESS_353_RESETVAL (0x00000000u)
  38406. #define CSL_CPINTC_VECTOR_ADDRESS_REG_353_RESETVAL (0x00000000u)
  38407. /* vector_address_reg_354 */
  38408. #define CSL_CPINTC_VECTOR_ADDRESS_REG_354_VECTOR_ADDRESS_354_MASK (0xFFFFFFFFu)
  38409. #define CSL_CPINTC_VECTOR_ADDRESS_REG_354_VECTOR_ADDRESS_354_SHIFT (0x00000000u)
  38410. #define CSL_CPINTC_VECTOR_ADDRESS_REG_354_VECTOR_ADDRESS_354_RESETVAL (0x00000000u)
  38411. #define CSL_CPINTC_VECTOR_ADDRESS_REG_354_RESETVAL (0x00000000u)
  38412. /* vector_address_reg_355 */
  38413. #define CSL_CPINTC_VECTOR_ADDRESS_REG_355_VECTOR_ADDRESS_355_MASK (0xFFFFFFFFu)
  38414. #define CSL_CPINTC_VECTOR_ADDRESS_REG_355_VECTOR_ADDRESS_355_SHIFT (0x00000000u)
  38415. #define CSL_CPINTC_VECTOR_ADDRESS_REG_355_VECTOR_ADDRESS_355_RESETVAL (0x00000000u)
  38416. #define CSL_CPINTC_VECTOR_ADDRESS_REG_355_RESETVAL (0x00000000u)
  38417. /* vector_address_reg_356 */
  38418. #define CSL_CPINTC_VECTOR_ADDRESS_REG_356_VECTOR_ADDRESS_356_MASK (0xFFFFFFFFu)
  38419. #define CSL_CPINTC_VECTOR_ADDRESS_REG_356_VECTOR_ADDRESS_356_SHIFT (0x00000000u)
  38420. #define CSL_CPINTC_VECTOR_ADDRESS_REG_356_VECTOR_ADDRESS_356_RESETVAL (0x00000000u)
  38421. #define CSL_CPINTC_VECTOR_ADDRESS_REG_356_RESETVAL (0x00000000u)
  38422. /* vector_address_reg_357 */
  38423. #define CSL_CPINTC_VECTOR_ADDRESS_REG_357_VECTOR_ADDRESS_357_MASK (0xFFFFFFFFu)
  38424. #define CSL_CPINTC_VECTOR_ADDRESS_REG_357_VECTOR_ADDRESS_357_SHIFT (0x00000000u)
  38425. #define CSL_CPINTC_VECTOR_ADDRESS_REG_357_VECTOR_ADDRESS_357_RESETVAL (0x00000000u)
  38426. #define CSL_CPINTC_VECTOR_ADDRESS_REG_357_RESETVAL (0x00000000u)
  38427. /* vector_address_reg_358 */
  38428. #define CSL_CPINTC_VECTOR_ADDRESS_REG_358_VECTOR_ADDRESS_358_MASK (0xFFFFFFFFu)
  38429. #define CSL_CPINTC_VECTOR_ADDRESS_REG_358_VECTOR_ADDRESS_358_SHIFT (0x00000000u)
  38430. #define CSL_CPINTC_VECTOR_ADDRESS_REG_358_VECTOR_ADDRESS_358_RESETVAL (0x00000000u)
  38431. #define CSL_CPINTC_VECTOR_ADDRESS_REG_358_RESETVAL (0x00000000u)
  38432. /* vector_address_reg_359 */
  38433. #define CSL_CPINTC_VECTOR_ADDRESS_REG_359_VECTOR_ADDRESS_359_MASK (0xFFFFFFFFu)
  38434. #define CSL_CPINTC_VECTOR_ADDRESS_REG_359_VECTOR_ADDRESS_359_SHIFT (0x00000000u)
  38435. #define CSL_CPINTC_VECTOR_ADDRESS_REG_359_VECTOR_ADDRESS_359_RESETVAL (0x00000000u)
  38436. #define CSL_CPINTC_VECTOR_ADDRESS_REG_359_RESETVAL (0x00000000u)
  38437. /* vector_address_reg_360 */
  38438. #define CSL_CPINTC_VECTOR_ADDRESS_REG_360_VECTOR_ADDRESS_360_MASK (0xFFFFFFFFu)
  38439. #define CSL_CPINTC_VECTOR_ADDRESS_REG_360_VECTOR_ADDRESS_360_SHIFT (0x00000000u)
  38440. #define CSL_CPINTC_VECTOR_ADDRESS_REG_360_VECTOR_ADDRESS_360_RESETVAL (0x00000000u)
  38441. #define CSL_CPINTC_VECTOR_ADDRESS_REG_360_RESETVAL (0x00000000u)
  38442. /* vector_address_reg_361 */
  38443. #define CSL_CPINTC_VECTOR_ADDRESS_REG_361_VECTOR_ADDRESS_361_MASK (0xFFFFFFFFu)
  38444. #define CSL_CPINTC_VECTOR_ADDRESS_REG_361_VECTOR_ADDRESS_361_SHIFT (0x00000000u)
  38445. #define CSL_CPINTC_VECTOR_ADDRESS_REG_361_VECTOR_ADDRESS_361_RESETVAL (0x00000000u)
  38446. #define CSL_CPINTC_VECTOR_ADDRESS_REG_361_RESETVAL (0x00000000u)
  38447. /* vector_address_reg_362 */
  38448. #define CSL_CPINTC_VECTOR_ADDRESS_REG_362_VECTOR_ADDRESS_362_MASK (0xFFFFFFFFu)
  38449. #define CSL_CPINTC_VECTOR_ADDRESS_REG_362_VECTOR_ADDRESS_362_SHIFT (0x00000000u)
  38450. #define CSL_CPINTC_VECTOR_ADDRESS_REG_362_VECTOR_ADDRESS_362_RESETVAL (0x00000000u)
  38451. #define CSL_CPINTC_VECTOR_ADDRESS_REG_362_RESETVAL (0x00000000u)
  38452. /* vector_address_reg_363 */
  38453. #define CSL_CPINTC_VECTOR_ADDRESS_REG_363_VECTOR_ADDRESS_363_MASK (0xFFFFFFFFu)
  38454. #define CSL_CPINTC_VECTOR_ADDRESS_REG_363_VECTOR_ADDRESS_363_SHIFT (0x00000000u)
  38455. #define CSL_CPINTC_VECTOR_ADDRESS_REG_363_VECTOR_ADDRESS_363_RESETVAL (0x00000000u)
  38456. #define CSL_CPINTC_VECTOR_ADDRESS_REG_363_RESETVAL (0x00000000u)
  38457. /* vector_address_reg_364 */
  38458. #define CSL_CPINTC_VECTOR_ADDRESS_REG_364_VECTOR_ADDRESS_364_MASK (0xFFFFFFFFu)
  38459. #define CSL_CPINTC_VECTOR_ADDRESS_REG_364_VECTOR_ADDRESS_364_SHIFT (0x00000000u)
  38460. #define CSL_CPINTC_VECTOR_ADDRESS_REG_364_VECTOR_ADDRESS_364_RESETVAL (0x00000000u)
  38461. #define CSL_CPINTC_VECTOR_ADDRESS_REG_364_RESETVAL (0x00000000u)
  38462. /* vector_address_reg_365 */
  38463. #define CSL_CPINTC_VECTOR_ADDRESS_REG_365_VECTOR_ADDRESS_365_MASK (0xFFFFFFFFu)
  38464. #define CSL_CPINTC_VECTOR_ADDRESS_REG_365_VECTOR_ADDRESS_365_SHIFT (0x00000000u)
  38465. #define CSL_CPINTC_VECTOR_ADDRESS_REG_365_VECTOR_ADDRESS_365_RESETVAL (0x00000000u)
  38466. #define CSL_CPINTC_VECTOR_ADDRESS_REG_365_RESETVAL (0x00000000u)
  38467. /* vector_address_reg_366 */
  38468. #define CSL_CPINTC_VECTOR_ADDRESS_REG_366_VECTOR_ADDRESS_366_MASK (0xFFFFFFFFu)
  38469. #define CSL_CPINTC_VECTOR_ADDRESS_REG_366_VECTOR_ADDRESS_366_SHIFT (0x00000000u)
  38470. #define CSL_CPINTC_VECTOR_ADDRESS_REG_366_VECTOR_ADDRESS_366_RESETVAL (0x00000000u)
  38471. #define CSL_CPINTC_VECTOR_ADDRESS_REG_366_RESETVAL (0x00000000u)
  38472. /* vector_address_reg_367 */
  38473. #define CSL_CPINTC_VECTOR_ADDRESS_REG_367_VECTOR_ADDRESS_367_MASK (0xFFFFFFFFu)
  38474. #define CSL_CPINTC_VECTOR_ADDRESS_REG_367_VECTOR_ADDRESS_367_SHIFT (0x00000000u)
  38475. #define CSL_CPINTC_VECTOR_ADDRESS_REG_367_VECTOR_ADDRESS_367_RESETVAL (0x00000000u)
  38476. #define CSL_CPINTC_VECTOR_ADDRESS_REG_367_RESETVAL (0x00000000u)
  38477. /* vector_address_reg_368 */
  38478. #define CSL_CPINTC_VECTOR_ADDRESS_REG_368_VECTOR_ADDRESS_368_MASK (0xFFFFFFFFu)
  38479. #define CSL_CPINTC_VECTOR_ADDRESS_REG_368_VECTOR_ADDRESS_368_SHIFT (0x00000000u)
  38480. #define CSL_CPINTC_VECTOR_ADDRESS_REG_368_VECTOR_ADDRESS_368_RESETVAL (0x00000000u)
  38481. #define CSL_CPINTC_VECTOR_ADDRESS_REG_368_RESETVAL (0x00000000u)
  38482. /* vector_address_reg_369 */
  38483. #define CSL_CPINTC_VECTOR_ADDRESS_REG_369_VECTOR_ADDRESS_369_MASK (0xFFFFFFFFu)
  38484. #define CSL_CPINTC_VECTOR_ADDRESS_REG_369_VECTOR_ADDRESS_369_SHIFT (0x00000000u)
  38485. #define CSL_CPINTC_VECTOR_ADDRESS_REG_369_VECTOR_ADDRESS_369_RESETVAL (0x00000000u)
  38486. #define CSL_CPINTC_VECTOR_ADDRESS_REG_369_RESETVAL (0x00000000u)
  38487. /* vector_address_reg_370 */
  38488. #define CSL_CPINTC_VECTOR_ADDRESS_REG_370_VECTOR_ADDRESS_370_MASK (0xFFFFFFFFu)
  38489. #define CSL_CPINTC_VECTOR_ADDRESS_REG_370_VECTOR_ADDRESS_370_SHIFT (0x00000000u)
  38490. #define CSL_CPINTC_VECTOR_ADDRESS_REG_370_VECTOR_ADDRESS_370_RESETVAL (0x00000000u)
  38491. #define CSL_CPINTC_VECTOR_ADDRESS_REG_370_RESETVAL (0x00000000u)
  38492. /* vector_address_reg_371 */
  38493. #define CSL_CPINTC_VECTOR_ADDRESS_REG_371_VECTOR_ADDRESS_371_MASK (0xFFFFFFFFu)
  38494. #define CSL_CPINTC_VECTOR_ADDRESS_REG_371_VECTOR_ADDRESS_371_SHIFT (0x00000000u)
  38495. #define CSL_CPINTC_VECTOR_ADDRESS_REG_371_VECTOR_ADDRESS_371_RESETVAL (0x00000000u)
  38496. #define CSL_CPINTC_VECTOR_ADDRESS_REG_371_RESETVAL (0x00000000u)
  38497. /* vector_address_reg_372 */
  38498. #define CSL_CPINTC_VECTOR_ADDRESS_REG_372_VECTOR_ADDRESS_372_MASK (0xFFFFFFFFu)
  38499. #define CSL_CPINTC_VECTOR_ADDRESS_REG_372_VECTOR_ADDRESS_372_SHIFT (0x00000000u)
  38500. #define CSL_CPINTC_VECTOR_ADDRESS_REG_372_VECTOR_ADDRESS_372_RESETVAL (0x00000000u)
  38501. #define CSL_CPINTC_VECTOR_ADDRESS_REG_372_RESETVAL (0x00000000u)
  38502. /* vector_address_reg_373 */
  38503. #define CSL_CPINTC_VECTOR_ADDRESS_REG_373_VECTOR_ADDRESS_373_MASK (0xFFFFFFFFu)
  38504. #define CSL_CPINTC_VECTOR_ADDRESS_REG_373_VECTOR_ADDRESS_373_SHIFT (0x00000000u)
  38505. #define CSL_CPINTC_VECTOR_ADDRESS_REG_373_VECTOR_ADDRESS_373_RESETVAL (0x00000000u)
  38506. #define CSL_CPINTC_VECTOR_ADDRESS_REG_373_RESETVAL (0x00000000u)
  38507. /* vector_address_reg_374 */
  38508. #define CSL_CPINTC_VECTOR_ADDRESS_REG_374_VECTOR_ADDRESS_374_MASK (0xFFFFFFFFu)
  38509. #define CSL_CPINTC_VECTOR_ADDRESS_REG_374_VECTOR_ADDRESS_374_SHIFT (0x00000000u)
  38510. #define CSL_CPINTC_VECTOR_ADDRESS_REG_374_VECTOR_ADDRESS_374_RESETVAL (0x00000000u)
  38511. #define CSL_CPINTC_VECTOR_ADDRESS_REG_374_RESETVAL (0x00000000u)
  38512. /* vector_address_reg_375 */
  38513. #define CSL_CPINTC_VECTOR_ADDRESS_REG_375_VECTOR_ADDRESS_375_MASK (0xFFFFFFFFu)
  38514. #define CSL_CPINTC_VECTOR_ADDRESS_REG_375_VECTOR_ADDRESS_375_SHIFT (0x00000000u)
  38515. #define CSL_CPINTC_VECTOR_ADDRESS_REG_375_VECTOR_ADDRESS_375_RESETVAL (0x00000000u)
  38516. #define CSL_CPINTC_VECTOR_ADDRESS_REG_375_RESETVAL (0x00000000u)
  38517. /* vector_address_reg_376 */
  38518. #define CSL_CPINTC_VECTOR_ADDRESS_REG_376_VECTOR_ADDRESS_376_MASK (0xFFFFFFFFu)
  38519. #define CSL_CPINTC_VECTOR_ADDRESS_REG_376_VECTOR_ADDRESS_376_SHIFT (0x00000000u)
  38520. #define CSL_CPINTC_VECTOR_ADDRESS_REG_376_VECTOR_ADDRESS_376_RESETVAL (0x00000000u)
  38521. #define CSL_CPINTC_VECTOR_ADDRESS_REG_376_RESETVAL (0x00000000u)
  38522. /* vector_address_reg_377 */
  38523. #define CSL_CPINTC_VECTOR_ADDRESS_REG_377_VECTOR_ADDRESS_377_MASK (0xFFFFFFFFu)
  38524. #define CSL_CPINTC_VECTOR_ADDRESS_REG_377_VECTOR_ADDRESS_377_SHIFT (0x00000000u)
  38525. #define CSL_CPINTC_VECTOR_ADDRESS_REG_377_VECTOR_ADDRESS_377_RESETVAL (0x00000000u)
  38526. #define CSL_CPINTC_VECTOR_ADDRESS_REG_377_RESETVAL (0x00000000u)
  38527. /* vector_address_reg_378 */
  38528. #define CSL_CPINTC_VECTOR_ADDRESS_REG_378_VECTOR_ADDRESS_378_MASK (0xFFFFFFFFu)
  38529. #define CSL_CPINTC_VECTOR_ADDRESS_REG_378_VECTOR_ADDRESS_378_SHIFT (0x00000000u)
  38530. #define CSL_CPINTC_VECTOR_ADDRESS_REG_378_VECTOR_ADDRESS_378_RESETVAL (0x00000000u)
  38531. #define CSL_CPINTC_VECTOR_ADDRESS_REG_378_RESETVAL (0x00000000u)
  38532. /* vector_address_reg_379 */
  38533. #define CSL_CPINTC_VECTOR_ADDRESS_REG_379_VECTOR_ADDRESS_379_MASK (0xFFFFFFFFu)
  38534. #define CSL_CPINTC_VECTOR_ADDRESS_REG_379_VECTOR_ADDRESS_379_SHIFT (0x00000000u)
  38535. #define CSL_CPINTC_VECTOR_ADDRESS_REG_379_VECTOR_ADDRESS_379_RESETVAL (0x00000000u)
  38536. #define CSL_CPINTC_VECTOR_ADDRESS_REG_379_RESETVAL (0x00000000u)
  38537. /* vector_address_reg_380 */
  38538. #define CSL_CPINTC_VECTOR_ADDRESS_REG_380_VECTOR_ADDRESS_380_MASK (0xFFFFFFFFu)
  38539. #define CSL_CPINTC_VECTOR_ADDRESS_REG_380_VECTOR_ADDRESS_380_SHIFT (0x00000000u)
  38540. #define CSL_CPINTC_VECTOR_ADDRESS_REG_380_VECTOR_ADDRESS_380_RESETVAL (0x00000000u)
  38541. #define CSL_CPINTC_VECTOR_ADDRESS_REG_380_RESETVAL (0x00000000u)
  38542. /* vector_address_reg_381 */
  38543. #define CSL_CPINTC_VECTOR_ADDRESS_REG_381_VECTOR_ADDRESS_381_MASK (0xFFFFFFFFu)
  38544. #define CSL_CPINTC_VECTOR_ADDRESS_REG_381_VECTOR_ADDRESS_381_SHIFT (0x00000000u)
  38545. #define CSL_CPINTC_VECTOR_ADDRESS_REG_381_VECTOR_ADDRESS_381_RESETVAL (0x00000000u)
  38546. #define CSL_CPINTC_VECTOR_ADDRESS_REG_381_RESETVAL (0x00000000u)
  38547. /* vector_address_reg_382 */
  38548. #define CSL_CPINTC_VECTOR_ADDRESS_REG_382_VECTOR_ADDRESS_382_MASK (0xFFFFFFFFu)
  38549. #define CSL_CPINTC_VECTOR_ADDRESS_REG_382_VECTOR_ADDRESS_382_SHIFT (0x00000000u)
  38550. #define CSL_CPINTC_VECTOR_ADDRESS_REG_382_VECTOR_ADDRESS_382_RESETVAL (0x00000000u)
  38551. #define CSL_CPINTC_VECTOR_ADDRESS_REG_382_RESETVAL (0x00000000u)
  38552. /* vector_address_reg_383 */
  38553. #define CSL_CPINTC_VECTOR_ADDRESS_REG_383_VECTOR_ADDRESS_383_MASK (0xFFFFFFFFu)
  38554. #define CSL_CPINTC_VECTOR_ADDRESS_REG_383_VECTOR_ADDRESS_383_SHIFT (0x00000000u)
  38555. #define CSL_CPINTC_VECTOR_ADDRESS_REG_383_VECTOR_ADDRESS_383_RESETVAL (0x00000000u)
  38556. #define CSL_CPINTC_VECTOR_ADDRESS_REG_383_RESETVAL (0x00000000u)
  38557. /* vector_address_reg_384 */
  38558. #define CSL_CPINTC_VECTOR_ADDRESS_REG_384_VECTOR_ADDRESS_384_MASK (0xFFFFFFFFu)
  38559. #define CSL_CPINTC_VECTOR_ADDRESS_REG_384_VECTOR_ADDRESS_384_SHIFT (0x00000000u)
  38560. #define CSL_CPINTC_VECTOR_ADDRESS_REG_384_VECTOR_ADDRESS_384_RESETVAL (0x00000000u)
  38561. #define CSL_CPINTC_VECTOR_ADDRESS_REG_384_RESETVAL (0x00000000u)
  38562. /* vector_address_reg_385 */
  38563. #define CSL_CPINTC_VECTOR_ADDRESS_REG_385_VECTOR_ADDRESS_385_MASK (0xFFFFFFFFu)
  38564. #define CSL_CPINTC_VECTOR_ADDRESS_REG_385_VECTOR_ADDRESS_385_SHIFT (0x00000000u)
  38565. #define CSL_CPINTC_VECTOR_ADDRESS_REG_385_VECTOR_ADDRESS_385_RESETVAL (0x00000000u)
  38566. #define CSL_CPINTC_VECTOR_ADDRESS_REG_385_RESETVAL (0x00000000u)
  38567. /* vector_address_reg_386 */
  38568. #define CSL_CPINTC_VECTOR_ADDRESS_REG_386_VECTOR_ADDRESS_386_MASK (0xFFFFFFFFu)
  38569. #define CSL_CPINTC_VECTOR_ADDRESS_REG_386_VECTOR_ADDRESS_386_SHIFT (0x00000000u)
  38570. #define CSL_CPINTC_VECTOR_ADDRESS_REG_386_VECTOR_ADDRESS_386_RESETVAL (0x00000000u)
  38571. #define CSL_CPINTC_VECTOR_ADDRESS_REG_386_RESETVAL (0x00000000u)
  38572. /* vector_address_reg_387 */
  38573. #define CSL_CPINTC_VECTOR_ADDRESS_REG_387_VECTOR_ADDRESS_387_MASK (0xFFFFFFFFu)
  38574. #define CSL_CPINTC_VECTOR_ADDRESS_REG_387_VECTOR_ADDRESS_387_SHIFT (0x00000000u)
  38575. #define CSL_CPINTC_VECTOR_ADDRESS_REG_387_VECTOR_ADDRESS_387_RESETVAL (0x00000000u)
  38576. #define CSL_CPINTC_VECTOR_ADDRESS_REG_387_RESETVAL (0x00000000u)
  38577. /* vector_address_reg_388 */
  38578. #define CSL_CPINTC_VECTOR_ADDRESS_REG_388_VECTOR_ADDRESS_388_MASK (0xFFFFFFFFu)
  38579. #define CSL_CPINTC_VECTOR_ADDRESS_REG_388_VECTOR_ADDRESS_388_SHIFT (0x00000000u)
  38580. #define CSL_CPINTC_VECTOR_ADDRESS_REG_388_VECTOR_ADDRESS_388_RESETVAL (0x00000000u)
  38581. #define CSL_CPINTC_VECTOR_ADDRESS_REG_388_RESETVAL (0x00000000u)
  38582. /* vector_address_reg_389 */
  38583. #define CSL_CPINTC_VECTOR_ADDRESS_REG_389_VECTOR_ADDRESS_389_MASK (0xFFFFFFFFu)
  38584. #define CSL_CPINTC_VECTOR_ADDRESS_REG_389_VECTOR_ADDRESS_389_SHIFT (0x00000000u)
  38585. #define CSL_CPINTC_VECTOR_ADDRESS_REG_389_VECTOR_ADDRESS_389_RESETVAL (0x00000000u)
  38586. #define CSL_CPINTC_VECTOR_ADDRESS_REG_389_RESETVAL (0x00000000u)
  38587. /* vector_address_reg_390 */
  38588. #define CSL_CPINTC_VECTOR_ADDRESS_REG_390_VECTOR_ADDRESS_390_MASK (0xFFFFFFFFu)
  38589. #define CSL_CPINTC_VECTOR_ADDRESS_REG_390_VECTOR_ADDRESS_390_SHIFT (0x00000000u)
  38590. #define CSL_CPINTC_VECTOR_ADDRESS_REG_390_VECTOR_ADDRESS_390_RESETVAL (0x00000000u)
  38591. #define CSL_CPINTC_VECTOR_ADDRESS_REG_390_RESETVAL (0x00000000u)
  38592. /* vector_address_reg_391 */
  38593. #define CSL_CPINTC_VECTOR_ADDRESS_REG_391_VECTOR_ADDRESS_391_MASK (0xFFFFFFFFu)
  38594. #define CSL_CPINTC_VECTOR_ADDRESS_REG_391_VECTOR_ADDRESS_391_SHIFT (0x00000000u)
  38595. #define CSL_CPINTC_VECTOR_ADDRESS_REG_391_VECTOR_ADDRESS_391_RESETVAL (0x00000000u)
  38596. #define CSL_CPINTC_VECTOR_ADDRESS_REG_391_RESETVAL (0x00000000u)
  38597. /* vector_address_reg_392 */
  38598. #define CSL_CPINTC_VECTOR_ADDRESS_REG_392_VECTOR_ADDRESS_392_MASK (0xFFFFFFFFu)
  38599. #define CSL_CPINTC_VECTOR_ADDRESS_REG_392_VECTOR_ADDRESS_392_SHIFT (0x00000000u)
  38600. #define CSL_CPINTC_VECTOR_ADDRESS_REG_392_VECTOR_ADDRESS_392_RESETVAL (0x00000000u)
  38601. #define CSL_CPINTC_VECTOR_ADDRESS_REG_392_RESETVAL (0x00000000u)
  38602. /* vector_address_reg_393 */
  38603. #define CSL_CPINTC_VECTOR_ADDRESS_REG_393_VECTOR_ADDRESS_393_MASK (0xFFFFFFFFu)
  38604. #define CSL_CPINTC_VECTOR_ADDRESS_REG_393_VECTOR_ADDRESS_393_SHIFT (0x00000000u)
  38605. #define CSL_CPINTC_VECTOR_ADDRESS_REG_393_VECTOR_ADDRESS_393_RESETVAL (0x00000000u)
  38606. #define CSL_CPINTC_VECTOR_ADDRESS_REG_393_RESETVAL (0x00000000u)
  38607. /* vector_address_reg_394 */
  38608. #define CSL_CPINTC_VECTOR_ADDRESS_REG_394_VECTOR_ADDRESS_394_MASK (0xFFFFFFFFu)
  38609. #define CSL_CPINTC_VECTOR_ADDRESS_REG_394_VECTOR_ADDRESS_394_SHIFT (0x00000000u)
  38610. #define CSL_CPINTC_VECTOR_ADDRESS_REG_394_VECTOR_ADDRESS_394_RESETVAL (0x00000000u)
  38611. #define CSL_CPINTC_VECTOR_ADDRESS_REG_394_RESETVAL (0x00000000u)
  38612. /* vector_address_reg_395 */
  38613. #define CSL_CPINTC_VECTOR_ADDRESS_REG_395_VECTOR_ADDRESS_395_MASK (0xFFFFFFFFu)
  38614. #define CSL_CPINTC_VECTOR_ADDRESS_REG_395_VECTOR_ADDRESS_395_SHIFT (0x00000000u)
  38615. #define CSL_CPINTC_VECTOR_ADDRESS_REG_395_VECTOR_ADDRESS_395_RESETVAL (0x00000000u)
  38616. #define CSL_CPINTC_VECTOR_ADDRESS_REG_395_RESETVAL (0x00000000u)
  38617. /* vector_address_reg_396 */
  38618. #define CSL_CPINTC_VECTOR_ADDRESS_REG_396_VECTOR_ADDRESS_396_MASK (0xFFFFFFFFu)
  38619. #define CSL_CPINTC_VECTOR_ADDRESS_REG_396_VECTOR_ADDRESS_396_SHIFT (0x00000000u)
  38620. #define CSL_CPINTC_VECTOR_ADDRESS_REG_396_VECTOR_ADDRESS_396_RESETVAL (0x00000000u)
  38621. #define CSL_CPINTC_VECTOR_ADDRESS_REG_396_RESETVAL (0x00000000u)
  38622. /* vector_address_reg_397 */
  38623. #define CSL_CPINTC_VECTOR_ADDRESS_REG_397_VECTOR_ADDRESS_397_MASK (0xFFFFFFFFu)
  38624. #define CSL_CPINTC_VECTOR_ADDRESS_REG_397_VECTOR_ADDRESS_397_SHIFT (0x00000000u)
  38625. #define CSL_CPINTC_VECTOR_ADDRESS_REG_397_VECTOR_ADDRESS_397_RESETVAL (0x00000000u)
  38626. #define CSL_CPINTC_VECTOR_ADDRESS_REG_397_RESETVAL (0x00000000u)
  38627. /* vector_address_reg_398 */
  38628. #define CSL_CPINTC_VECTOR_ADDRESS_REG_398_VECTOR_ADDRESS_398_MASK (0xFFFFFFFFu)
  38629. #define CSL_CPINTC_VECTOR_ADDRESS_REG_398_VECTOR_ADDRESS_398_SHIFT (0x00000000u)
  38630. #define CSL_CPINTC_VECTOR_ADDRESS_REG_398_VECTOR_ADDRESS_398_RESETVAL (0x00000000u)
  38631. #define CSL_CPINTC_VECTOR_ADDRESS_REG_398_RESETVAL (0x00000000u)
  38632. /* vector_address_reg_399 */
  38633. #define CSL_CPINTC_VECTOR_ADDRESS_REG_399_VECTOR_ADDRESS_399_MASK (0xFFFFFFFFu)
  38634. #define CSL_CPINTC_VECTOR_ADDRESS_REG_399_VECTOR_ADDRESS_399_SHIFT (0x00000000u)
  38635. #define CSL_CPINTC_VECTOR_ADDRESS_REG_399_VECTOR_ADDRESS_399_RESETVAL (0x00000000u)
  38636. #define CSL_CPINTC_VECTOR_ADDRESS_REG_399_RESETVAL (0x00000000u)
  38637. /* vector_address_reg_400 */
  38638. #define CSL_CPINTC_VECTOR_ADDRESS_REG_400_VECTOR_ADDRESS_400_MASK (0xFFFFFFFFu)
  38639. #define CSL_CPINTC_VECTOR_ADDRESS_REG_400_VECTOR_ADDRESS_400_SHIFT (0x00000000u)
  38640. #define CSL_CPINTC_VECTOR_ADDRESS_REG_400_VECTOR_ADDRESS_400_RESETVAL (0x00000000u)
  38641. #define CSL_CPINTC_VECTOR_ADDRESS_REG_400_RESETVAL (0x00000000u)
  38642. /* vector_address_reg_401 */
  38643. #define CSL_CPINTC_VECTOR_ADDRESS_REG_401_VECTOR_ADDRESS_401_MASK (0xFFFFFFFFu)
  38644. #define CSL_CPINTC_VECTOR_ADDRESS_REG_401_VECTOR_ADDRESS_401_SHIFT (0x00000000u)
  38645. #define CSL_CPINTC_VECTOR_ADDRESS_REG_401_VECTOR_ADDRESS_401_RESETVAL (0x00000000u)
  38646. #define CSL_CPINTC_VECTOR_ADDRESS_REG_401_RESETVAL (0x00000000u)
  38647. /* vector_address_reg_402 */
  38648. #define CSL_CPINTC_VECTOR_ADDRESS_REG_402_VECTOR_ADDRESS_402_MASK (0xFFFFFFFFu)
  38649. #define CSL_CPINTC_VECTOR_ADDRESS_REG_402_VECTOR_ADDRESS_402_SHIFT (0x00000000u)
  38650. #define CSL_CPINTC_VECTOR_ADDRESS_REG_402_VECTOR_ADDRESS_402_RESETVAL (0x00000000u)
  38651. #define CSL_CPINTC_VECTOR_ADDRESS_REG_402_RESETVAL (0x00000000u)
  38652. /* vector_address_reg_403 */
  38653. #define CSL_CPINTC_VECTOR_ADDRESS_REG_403_VECTOR_ADDRESS_403_MASK (0xFFFFFFFFu)
  38654. #define CSL_CPINTC_VECTOR_ADDRESS_REG_403_VECTOR_ADDRESS_403_SHIFT (0x00000000u)
  38655. #define CSL_CPINTC_VECTOR_ADDRESS_REG_403_VECTOR_ADDRESS_403_RESETVAL (0x00000000u)
  38656. #define CSL_CPINTC_VECTOR_ADDRESS_REG_403_RESETVAL (0x00000000u)
  38657. /* vector_address_reg_404 */
  38658. #define CSL_CPINTC_VECTOR_ADDRESS_REG_404_VECTOR_ADDRESS_404_MASK (0xFFFFFFFFu)
  38659. #define CSL_CPINTC_VECTOR_ADDRESS_REG_404_VECTOR_ADDRESS_404_SHIFT (0x00000000u)
  38660. #define CSL_CPINTC_VECTOR_ADDRESS_REG_404_VECTOR_ADDRESS_404_RESETVAL (0x00000000u)
  38661. #define CSL_CPINTC_VECTOR_ADDRESS_REG_404_RESETVAL (0x00000000u)
  38662. /* vector_address_reg_405 */
  38663. #define CSL_CPINTC_VECTOR_ADDRESS_REG_405_VECTOR_ADDRESS_405_MASK (0xFFFFFFFFu)
  38664. #define CSL_CPINTC_VECTOR_ADDRESS_REG_405_VECTOR_ADDRESS_405_SHIFT (0x00000000u)
  38665. #define CSL_CPINTC_VECTOR_ADDRESS_REG_405_VECTOR_ADDRESS_405_RESETVAL (0x00000000u)
  38666. #define CSL_CPINTC_VECTOR_ADDRESS_REG_405_RESETVAL (0x00000000u)
  38667. /* vector_address_reg_406 */
  38668. #define CSL_CPINTC_VECTOR_ADDRESS_REG_406_VECTOR_ADDRESS_406_MASK (0xFFFFFFFFu)
  38669. #define CSL_CPINTC_VECTOR_ADDRESS_REG_406_VECTOR_ADDRESS_406_SHIFT (0x00000000u)
  38670. #define CSL_CPINTC_VECTOR_ADDRESS_REG_406_VECTOR_ADDRESS_406_RESETVAL (0x00000000u)
  38671. #define CSL_CPINTC_VECTOR_ADDRESS_REG_406_RESETVAL (0x00000000u)
  38672. /* vector_address_reg_407 */
  38673. #define CSL_CPINTC_VECTOR_ADDRESS_REG_407_VECTOR_ADDRESS_407_MASK (0xFFFFFFFFu)
  38674. #define CSL_CPINTC_VECTOR_ADDRESS_REG_407_VECTOR_ADDRESS_407_SHIFT (0x00000000u)
  38675. #define CSL_CPINTC_VECTOR_ADDRESS_REG_407_VECTOR_ADDRESS_407_RESETVAL (0x00000000u)
  38676. #define CSL_CPINTC_VECTOR_ADDRESS_REG_407_RESETVAL (0x00000000u)
  38677. /* vector_address_reg_408 */
  38678. #define CSL_CPINTC_VECTOR_ADDRESS_REG_408_VECTOR_ADDRESS_408_MASK (0xFFFFFFFFu)
  38679. #define CSL_CPINTC_VECTOR_ADDRESS_REG_408_VECTOR_ADDRESS_408_SHIFT (0x00000000u)
  38680. #define CSL_CPINTC_VECTOR_ADDRESS_REG_408_VECTOR_ADDRESS_408_RESETVAL (0x00000000u)
  38681. #define CSL_CPINTC_VECTOR_ADDRESS_REG_408_RESETVAL (0x00000000u)
  38682. /* vector_address_reg_409 */
  38683. #define CSL_CPINTC_VECTOR_ADDRESS_REG_409_VECTOR_ADDRESS_409_MASK (0xFFFFFFFFu)
  38684. #define CSL_CPINTC_VECTOR_ADDRESS_REG_409_VECTOR_ADDRESS_409_SHIFT (0x00000000u)
  38685. #define CSL_CPINTC_VECTOR_ADDRESS_REG_409_VECTOR_ADDRESS_409_RESETVAL (0x00000000u)
  38686. #define CSL_CPINTC_VECTOR_ADDRESS_REG_409_RESETVAL (0x00000000u)
  38687. /* vector_address_reg_410 */
  38688. #define CSL_CPINTC_VECTOR_ADDRESS_REG_410_VECTOR_ADDRESS_410_MASK (0xFFFFFFFFu)
  38689. #define CSL_CPINTC_VECTOR_ADDRESS_REG_410_VECTOR_ADDRESS_410_SHIFT (0x00000000u)
  38690. #define CSL_CPINTC_VECTOR_ADDRESS_REG_410_VECTOR_ADDRESS_410_RESETVAL (0x00000000u)
  38691. #define CSL_CPINTC_VECTOR_ADDRESS_REG_410_RESETVAL (0x00000000u)
  38692. /* vector_address_reg_411 */
  38693. #define CSL_CPINTC_VECTOR_ADDRESS_REG_411_VECTOR_ADDRESS_411_MASK (0xFFFFFFFFu)
  38694. #define CSL_CPINTC_VECTOR_ADDRESS_REG_411_VECTOR_ADDRESS_411_SHIFT (0x00000000u)
  38695. #define CSL_CPINTC_VECTOR_ADDRESS_REG_411_VECTOR_ADDRESS_411_RESETVAL (0x00000000u)
  38696. #define CSL_CPINTC_VECTOR_ADDRESS_REG_411_RESETVAL (0x00000000u)
  38697. /* vector_address_reg_412 */
  38698. #define CSL_CPINTC_VECTOR_ADDRESS_REG_412_VECTOR_ADDRESS_412_MASK (0xFFFFFFFFu)
  38699. #define CSL_CPINTC_VECTOR_ADDRESS_REG_412_VECTOR_ADDRESS_412_SHIFT (0x00000000u)
  38700. #define CSL_CPINTC_VECTOR_ADDRESS_REG_412_VECTOR_ADDRESS_412_RESETVAL (0x00000000u)
  38701. #define CSL_CPINTC_VECTOR_ADDRESS_REG_412_RESETVAL (0x00000000u)
  38702. /* vector_address_reg_413 */
  38703. #define CSL_CPINTC_VECTOR_ADDRESS_REG_413_VECTOR_ADDRESS_413_MASK (0xFFFFFFFFu)
  38704. #define CSL_CPINTC_VECTOR_ADDRESS_REG_413_VECTOR_ADDRESS_413_SHIFT (0x00000000u)
  38705. #define CSL_CPINTC_VECTOR_ADDRESS_REG_413_VECTOR_ADDRESS_413_RESETVAL (0x00000000u)
  38706. #define CSL_CPINTC_VECTOR_ADDRESS_REG_413_RESETVAL (0x00000000u)
  38707. /* vector_address_reg_414 */
  38708. #define CSL_CPINTC_VECTOR_ADDRESS_REG_414_VECTOR_ADDRESS_414_MASK (0xFFFFFFFFu)
  38709. #define CSL_CPINTC_VECTOR_ADDRESS_REG_414_VECTOR_ADDRESS_414_SHIFT (0x00000000u)
  38710. #define CSL_CPINTC_VECTOR_ADDRESS_REG_414_VECTOR_ADDRESS_414_RESETVAL (0x00000000u)
  38711. #define CSL_CPINTC_VECTOR_ADDRESS_REG_414_RESETVAL (0x00000000u)
  38712. /* vector_address_reg_415 */
  38713. #define CSL_CPINTC_VECTOR_ADDRESS_REG_415_VECTOR_ADDRESS_415_MASK (0xFFFFFFFFu)
  38714. #define CSL_CPINTC_VECTOR_ADDRESS_REG_415_VECTOR_ADDRESS_415_SHIFT (0x00000000u)
  38715. #define CSL_CPINTC_VECTOR_ADDRESS_REG_415_VECTOR_ADDRESS_415_RESETVAL (0x00000000u)
  38716. #define CSL_CPINTC_VECTOR_ADDRESS_REG_415_RESETVAL (0x00000000u)
  38717. /* vector_address_reg_416 */
  38718. #define CSL_CPINTC_VECTOR_ADDRESS_REG_416_VECTOR_ADDRESS_416_MASK (0xFFFFFFFFu)
  38719. #define CSL_CPINTC_VECTOR_ADDRESS_REG_416_VECTOR_ADDRESS_416_SHIFT (0x00000000u)
  38720. #define CSL_CPINTC_VECTOR_ADDRESS_REG_416_VECTOR_ADDRESS_416_RESETVAL (0x00000000u)
  38721. #define CSL_CPINTC_VECTOR_ADDRESS_REG_416_RESETVAL (0x00000000u)
  38722. /* vector_address_reg_417 */
  38723. #define CSL_CPINTC_VECTOR_ADDRESS_REG_417_VECTOR_ADDRESS_417_MASK (0xFFFFFFFFu)
  38724. #define CSL_CPINTC_VECTOR_ADDRESS_REG_417_VECTOR_ADDRESS_417_SHIFT (0x00000000u)
  38725. #define CSL_CPINTC_VECTOR_ADDRESS_REG_417_VECTOR_ADDRESS_417_RESETVAL (0x00000000u)
  38726. #define CSL_CPINTC_VECTOR_ADDRESS_REG_417_RESETVAL (0x00000000u)
  38727. /* vector_address_reg_418 */
  38728. #define CSL_CPINTC_VECTOR_ADDRESS_REG_418_VECTOR_ADDRESS_418_MASK (0xFFFFFFFFu)
  38729. #define CSL_CPINTC_VECTOR_ADDRESS_REG_418_VECTOR_ADDRESS_418_SHIFT (0x00000000u)
  38730. #define CSL_CPINTC_VECTOR_ADDRESS_REG_418_VECTOR_ADDRESS_418_RESETVAL (0x00000000u)
  38731. #define CSL_CPINTC_VECTOR_ADDRESS_REG_418_RESETVAL (0x00000000u)
  38732. /* vector_address_reg_419 */
  38733. #define CSL_CPINTC_VECTOR_ADDRESS_REG_419_VECTOR_ADDRESS_419_MASK (0xFFFFFFFFu)
  38734. #define CSL_CPINTC_VECTOR_ADDRESS_REG_419_VECTOR_ADDRESS_419_SHIFT (0x00000000u)
  38735. #define CSL_CPINTC_VECTOR_ADDRESS_REG_419_VECTOR_ADDRESS_419_RESETVAL (0x00000000u)
  38736. #define CSL_CPINTC_VECTOR_ADDRESS_REG_419_RESETVAL (0x00000000u)
  38737. /* vector_address_reg_420 */
  38738. #define CSL_CPINTC_VECTOR_ADDRESS_REG_420_VECTOR_ADDRESS_420_MASK (0xFFFFFFFFu)
  38739. #define CSL_CPINTC_VECTOR_ADDRESS_REG_420_VECTOR_ADDRESS_420_SHIFT (0x00000000u)
  38740. #define CSL_CPINTC_VECTOR_ADDRESS_REG_420_VECTOR_ADDRESS_420_RESETVAL (0x00000000u)
  38741. #define CSL_CPINTC_VECTOR_ADDRESS_REG_420_RESETVAL (0x00000000u)
  38742. /* vector_address_reg_421 */
  38743. #define CSL_CPINTC_VECTOR_ADDRESS_REG_421_VECTOR_ADDRESS_421_MASK (0xFFFFFFFFu)
  38744. #define CSL_CPINTC_VECTOR_ADDRESS_REG_421_VECTOR_ADDRESS_421_SHIFT (0x00000000u)
  38745. #define CSL_CPINTC_VECTOR_ADDRESS_REG_421_VECTOR_ADDRESS_421_RESETVAL (0x00000000u)
  38746. #define CSL_CPINTC_VECTOR_ADDRESS_REG_421_RESETVAL (0x00000000u)
  38747. /* vector_address_reg_422 */
  38748. #define CSL_CPINTC_VECTOR_ADDRESS_REG_422_VECTOR_ADDRESS_422_MASK (0xFFFFFFFFu)
  38749. #define CSL_CPINTC_VECTOR_ADDRESS_REG_422_VECTOR_ADDRESS_422_SHIFT (0x00000000u)
  38750. #define CSL_CPINTC_VECTOR_ADDRESS_REG_422_VECTOR_ADDRESS_422_RESETVAL (0x00000000u)
  38751. #define CSL_CPINTC_VECTOR_ADDRESS_REG_422_RESETVAL (0x00000000u)
  38752. /* vector_address_reg_423 */
  38753. #define CSL_CPINTC_VECTOR_ADDRESS_REG_423_VECTOR_ADDRESS_423_MASK (0xFFFFFFFFu)
  38754. #define CSL_CPINTC_VECTOR_ADDRESS_REG_423_VECTOR_ADDRESS_423_SHIFT (0x00000000u)
  38755. #define CSL_CPINTC_VECTOR_ADDRESS_REG_423_VECTOR_ADDRESS_423_RESETVAL (0x00000000u)
  38756. #define CSL_CPINTC_VECTOR_ADDRESS_REG_423_RESETVAL (0x00000000u)
  38757. /* vector_address_reg_424 */
  38758. #define CSL_CPINTC_VECTOR_ADDRESS_REG_424_VECTOR_ADDRESS_424_MASK (0xFFFFFFFFu)
  38759. #define CSL_CPINTC_VECTOR_ADDRESS_REG_424_VECTOR_ADDRESS_424_SHIFT (0x00000000u)
  38760. #define CSL_CPINTC_VECTOR_ADDRESS_REG_424_VECTOR_ADDRESS_424_RESETVAL (0x00000000u)
  38761. #define CSL_CPINTC_VECTOR_ADDRESS_REG_424_RESETVAL (0x00000000u)
  38762. /* vector_address_reg_425 */
  38763. #define CSL_CPINTC_VECTOR_ADDRESS_REG_425_VECTOR_ADDRESS_425_MASK (0xFFFFFFFFu)
  38764. #define CSL_CPINTC_VECTOR_ADDRESS_REG_425_VECTOR_ADDRESS_425_SHIFT (0x00000000u)
  38765. #define CSL_CPINTC_VECTOR_ADDRESS_REG_425_VECTOR_ADDRESS_425_RESETVAL (0x00000000u)
  38766. #define CSL_CPINTC_VECTOR_ADDRESS_REG_425_RESETVAL (0x00000000u)
  38767. /* vector_address_reg_426 */
  38768. #define CSL_CPINTC_VECTOR_ADDRESS_REG_426_VECTOR_ADDRESS_426_MASK (0xFFFFFFFFu)
  38769. #define CSL_CPINTC_VECTOR_ADDRESS_REG_426_VECTOR_ADDRESS_426_SHIFT (0x00000000u)
  38770. #define CSL_CPINTC_VECTOR_ADDRESS_REG_426_VECTOR_ADDRESS_426_RESETVAL (0x00000000u)
  38771. #define CSL_CPINTC_VECTOR_ADDRESS_REG_426_RESETVAL (0x00000000u)
  38772. /* vector_address_reg_427 */
  38773. #define CSL_CPINTC_VECTOR_ADDRESS_REG_427_VECTOR_ADDRESS_427_MASK (0xFFFFFFFFu)
  38774. #define CSL_CPINTC_VECTOR_ADDRESS_REG_427_VECTOR_ADDRESS_427_SHIFT (0x00000000u)
  38775. #define CSL_CPINTC_VECTOR_ADDRESS_REG_427_VECTOR_ADDRESS_427_RESETVAL (0x00000000u)
  38776. #define CSL_CPINTC_VECTOR_ADDRESS_REG_427_RESETVAL (0x00000000u)
  38777. /* vector_address_reg_428 */
  38778. #define CSL_CPINTC_VECTOR_ADDRESS_REG_428_VECTOR_ADDRESS_428_MASK (0xFFFFFFFFu)
  38779. #define CSL_CPINTC_VECTOR_ADDRESS_REG_428_VECTOR_ADDRESS_428_SHIFT (0x00000000u)
  38780. #define CSL_CPINTC_VECTOR_ADDRESS_REG_428_VECTOR_ADDRESS_428_RESETVAL (0x00000000u)
  38781. #define CSL_CPINTC_VECTOR_ADDRESS_REG_428_RESETVAL (0x00000000u)
  38782. /* vector_address_reg_429 */
  38783. #define CSL_CPINTC_VECTOR_ADDRESS_REG_429_VECTOR_ADDRESS_429_MASK (0xFFFFFFFFu)
  38784. #define CSL_CPINTC_VECTOR_ADDRESS_REG_429_VECTOR_ADDRESS_429_SHIFT (0x00000000u)
  38785. #define CSL_CPINTC_VECTOR_ADDRESS_REG_429_VECTOR_ADDRESS_429_RESETVAL (0x00000000u)
  38786. #define CSL_CPINTC_VECTOR_ADDRESS_REG_429_RESETVAL (0x00000000u)
  38787. /* vector_address_reg_430 */
  38788. #define CSL_CPINTC_VECTOR_ADDRESS_REG_430_VECTOR_ADDRESS_430_MASK (0xFFFFFFFFu)
  38789. #define CSL_CPINTC_VECTOR_ADDRESS_REG_430_VECTOR_ADDRESS_430_SHIFT (0x00000000u)
  38790. #define CSL_CPINTC_VECTOR_ADDRESS_REG_430_VECTOR_ADDRESS_430_RESETVAL (0x00000000u)
  38791. #define CSL_CPINTC_VECTOR_ADDRESS_REG_430_RESETVAL (0x00000000u)
  38792. /* vector_address_reg_431 */
  38793. #define CSL_CPINTC_VECTOR_ADDRESS_REG_431_VECTOR_ADDRESS_431_MASK (0xFFFFFFFFu)
  38794. #define CSL_CPINTC_VECTOR_ADDRESS_REG_431_VECTOR_ADDRESS_431_SHIFT (0x00000000u)
  38795. #define CSL_CPINTC_VECTOR_ADDRESS_REG_431_VECTOR_ADDRESS_431_RESETVAL (0x00000000u)
  38796. #define CSL_CPINTC_VECTOR_ADDRESS_REG_431_RESETVAL (0x00000000u)
  38797. /* vector_address_reg_432 */
  38798. #define CSL_CPINTC_VECTOR_ADDRESS_REG_432_VECTOR_ADDRESS_432_MASK (0xFFFFFFFFu)
  38799. #define CSL_CPINTC_VECTOR_ADDRESS_REG_432_VECTOR_ADDRESS_432_SHIFT (0x00000000u)
  38800. #define CSL_CPINTC_VECTOR_ADDRESS_REG_432_VECTOR_ADDRESS_432_RESETVAL (0x00000000u)
  38801. #define CSL_CPINTC_VECTOR_ADDRESS_REG_432_RESETVAL (0x00000000u)
  38802. /* vector_address_reg_433 */
  38803. #define CSL_CPINTC_VECTOR_ADDRESS_REG_433_VECTOR_ADDRESS_433_MASK (0xFFFFFFFFu)
  38804. #define CSL_CPINTC_VECTOR_ADDRESS_REG_433_VECTOR_ADDRESS_433_SHIFT (0x00000000u)
  38805. #define CSL_CPINTC_VECTOR_ADDRESS_REG_433_VECTOR_ADDRESS_433_RESETVAL (0x00000000u)
  38806. #define CSL_CPINTC_VECTOR_ADDRESS_REG_433_RESETVAL (0x00000000u)
  38807. /* vector_address_reg_434 */
  38808. #define CSL_CPINTC_VECTOR_ADDRESS_REG_434_VECTOR_ADDRESS_434_MASK (0xFFFFFFFFu)
  38809. #define CSL_CPINTC_VECTOR_ADDRESS_REG_434_VECTOR_ADDRESS_434_SHIFT (0x00000000u)
  38810. #define CSL_CPINTC_VECTOR_ADDRESS_REG_434_VECTOR_ADDRESS_434_RESETVAL (0x00000000u)
  38811. #define CSL_CPINTC_VECTOR_ADDRESS_REG_434_RESETVAL (0x00000000u)
  38812. /* vector_address_reg_435 */
  38813. #define CSL_CPINTC_VECTOR_ADDRESS_REG_435_VECTOR_ADDRESS_435_MASK (0xFFFFFFFFu)
  38814. #define CSL_CPINTC_VECTOR_ADDRESS_REG_435_VECTOR_ADDRESS_435_SHIFT (0x00000000u)
  38815. #define CSL_CPINTC_VECTOR_ADDRESS_REG_435_VECTOR_ADDRESS_435_RESETVAL (0x00000000u)
  38816. #define CSL_CPINTC_VECTOR_ADDRESS_REG_435_RESETVAL (0x00000000u)
  38817. /* vector_address_reg_436 */
  38818. #define CSL_CPINTC_VECTOR_ADDRESS_REG_436_VECTOR_ADDRESS_436_MASK (0xFFFFFFFFu)
  38819. #define CSL_CPINTC_VECTOR_ADDRESS_REG_436_VECTOR_ADDRESS_436_SHIFT (0x00000000u)
  38820. #define CSL_CPINTC_VECTOR_ADDRESS_REG_436_VECTOR_ADDRESS_436_RESETVAL (0x00000000u)
  38821. #define CSL_CPINTC_VECTOR_ADDRESS_REG_436_RESETVAL (0x00000000u)
  38822. /* vector_address_reg_437 */
  38823. #define CSL_CPINTC_VECTOR_ADDRESS_REG_437_VECTOR_ADDRESS_437_MASK (0xFFFFFFFFu)
  38824. #define CSL_CPINTC_VECTOR_ADDRESS_REG_437_VECTOR_ADDRESS_437_SHIFT (0x00000000u)
  38825. #define CSL_CPINTC_VECTOR_ADDRESS_REG_437_VECTOR_ADDRESS_437_RESETVAL (0x00000000u)
  38826. #define CSL_CPINTC_VECTOR_ADDRESS_REG_437_RESETVAL (0x00000000u)
  38827. /* vector_address_reg_438 */
  38828. #define CSL_CPINTC_VECTOR_ADDRESS_REG_438_VECTOR_ADDRESS_438_MASK (0xFFFFFFFFu)
  38829. #define CSL_CPINTC_VECTOR_ADDRESS_REG_438_VECTOR_ADDRESS_438_SHIFT (0x00000000u)
  38830. #define CSL_CPINTC_VECTOR_ADDRESS_REG_438_VECTOR_ADDRESS_438_RESETVAL (0x00000000u)
  38831. #define CSL_CPINTC_VECTOR_ADDRESS_REG_438_RESETVAL (0x00000000u)
  38832. /* vector_address_reg_439 */
  38833. #define CSL_CPINTC_VECTOR_ADDRESS_REG_439_VECTOR_ADDRESS_439_MASK (0xFFFFFFFFu)
  38834. #define CSL_CPINTC_VECTOR_ADDRESS_REG_439_VECTOR_ADDRESS_439_SHIFT (0x00000000u)
  38835. #define CSL_CPINTC_VECTOR_ADDRESS_REG_439_VECTOR_ADDRESS_439_RESETVAL (0x00000000u)
  38836. #define CSL_CPINTC_VECTOR_ADDRESS_REG_439_RESETVAL (0x00000000u)
  38837. /* vector_address_reg_440 */
  38838. #define CSL_CPINTC_VECTOR_ADDRESS_REG_440_VECTOR_ADDRESS_440_MASK (0xFFFFFFFFu)
  38839. #define CSL_CPINTC_VECTOR_ADDRESS_REG_440_VECTOR_ADDRESS_440_SHIFT (0x00000000u)
  38840. #define CSL_CPINTC_VECTOR_ADDRESS_REG_440_VECTOR_ADDRESS_440_RESETVAL (0x00000000u)
  38841. #define CSL_CPINTC_VECTOR_ADDRESS_REG_440_RESETVAL (0x00000000u)
  38842. /* vector_address_reg_441 */
  38843. #define CSL_CPINTC_VECTOR_ADDRESS_REG_441_VECTOR_ADDRESS_441_MASK (0xFFFFFFFFu)
  38844. #define CSL_CPINTC_VECTOR_ADDRESS_REG_441_VECTOR_ADDRESS_441_SHIFT (0x00000000u)
  38845. #define CSL_CPINTC_VECTOR_ADDRESS_REG_441_VECTOR_ADDRESS_441_RESETVAL (0x00000000u)
  38846. #define CSL_CPINTC_VECTOR_ADDRESS_REG_441_RESETVAL (0x00000000u)
  38847. /* vector_address_reg_442 */
  38848. #define CSL_CPINTC_VECTOR_ADDRESS_REG_442_VECTOR_ADDRESS_442_MASK (0xFFFFFFFFu)
  38849. #define CSL_CPINTC_VECTOR_ADDRESS_REG_442_VECTOR_ADDRESS_442_SHIFT (0x00000000u)
  38850. #define CSL_CPINTC_VECTOR_ADDRESS_REG_442_VECTOR_ADDRESS_442_RESETVAL (0x00000000u)
  38851. #define CSL_CPINTC_VECTOR_ADDRESS_REG_442_RESETVAL (0x00000000u)
  38852. /* vector_address_reg_443 */
  38853. #define CSL_CPINTC_VECTOR_ADDRESS_REG_443_VECTOR_ADDRESS_443_MASK (0xFFFFFFFFu)
  38854. #define CSL_CPINTC_VECTOR_ADDRESS_REG_443_VECTOR_ADDRESS_443_SHIFT (0x00000000u)
  38855. #define CSL_CPINTC_VECTOR_ADDRESS_REG_443_VECTOR_ADDRESS_443_RESETVAL (0x00000000u)
  38856. #define CSL_CPINTC_VECTOR_ADDRESS_REG_443_RESETVAL (0x00000000u)
  38857. /* vector_address_reg_444 */
  38858. #define CSL_CPINTC_VECTOR_ADDRESS_REG_444_VECTOR_ADDRESS_444_MASK (0xFFFFFFFFu)
  38859. #define CSL_CPINTC_VECTOR_ADDRESS_REG_444_VECTOR_ADDRESS_444_SHIFT (0x00000000u)
  38860. #define CSL_CPINTC_VECTOR_ADDRESS_REG_444_VECTOR_ADDRESS_444_RESETVAL (0x00000000u)
  38861. #define CSL_CPINTC_VECTOR_ADDRESS_REG_444_RESETVAL (0x00000000u)
  38862. /* vector_address_reg_445 */
  38863. #define CSL_CPINTC_VECTOR_ADDRESS_REG_445_VECTOR_ADDRESS_445_MASK (0xFFFFFFFFu)
  38864. #define CSL_CPINTC_VECTOR_ADDRESS_REG_445_VECTOR_ADDRESS_445_SHIFT (0x00000000u)
  38865. #define CSL_CPINTC_VECTOR_ADDRESS_REG_445_VECTOR_ADDRESS_445_RESETVAL (0x00000000u)
  38866. #define CSL_CPINTC_VECTOR_ADDRESS_REG_445_RESETVAL (0x00000000u)
  38867. /* vector_address_reg_446 */
  38868. #define CSL_CPINTC_VECTOR_ADDRESS_REG_446_VECTOR_ADDRESS_446_MASK (0xFFFFFFFFu)
  38869. #define CSL_CPINTC_VECTOR_ADDRESS_REG_446_VECTOR_ADDRESS_446_SHIFT (0x00000000u)
  38870. #define CSL_CPINTC_VECTOR_ADDRESS_REG_446_VECTOR_ADDRESS_446_RESETVAL (0x00000000u)
  38871. #define CSL_CPINTC_VECTOR_ADDRESS_REG_446_RESETVAL (0x00000000u)
  38872. /* vector_address_reg_447 */
  38873. #define CSL_CPINTC_VECTOR_ADDRESS_REG_447_VECTOR_ADDRESS_447_MASK (0xFFFFFFFFu)
  38874. #define CSL_CPINTC_VECTOR_ADDRESS_REG_447_VECTOR_ADDRESS_447_SHIFT (0x00000000u)
  38875. #define CSL_CPINTC_VECTOR_ADDRESS_REG_447_VECTOR_ADDRESS_447_RESETVAL (0x00000000u)
  38876. #define CSL_CPINTC_VECTOR_ADDRESS_REG_447_RESETVAL (0x00000000u)
  38877. /* vector_address_reg_448 */
  38878. #define CSL_CPINTC_VECTOR_ADDRESS_REG_448_VECTOR_ADDRESS_448_MASK (0xFFFFFFFFu)
  38879. #define CSL_CPINTC_VECTOR_ADDRESS_REG_448_VECTOR_ADDRESS_448_SHIFT (0x00000000u)
  38880. #define CSL_CPINTC_VECTOR_ADDRESS_REG_448_VECTOR_ADDRESS_448_RESETVAL (0x00000000u)
  38881. #define CSL_CPINTC_VECTOR_ADDRESS_REG_448_RESETVAL (0x00000000u)
  38882. /* vector_address_reg_449 */
  38883. #define CSL_CPINTC_VECTOR_ADDRESS_REG_449_VECTOR_ADDRESS_449_MASK (0xFFFFFFFFu)
  38884. #define CSL_CPINTC_VECTOR_ADDRESS_REG_449_VECTOR_ADDRESS_449_SHIFT (0x00000000u)
  38885. #define CSL_CPINTC_VECTOR_ADDRESS_REG_449_VECTOR_ADDRESS_449_RESETVAL (0x00000000u)
  38886. #define CSL_CPINTC_VECTOR_ADDRESS_REG_449_RESETVAL (0x00000000u)
  38887. /* vector_address_reg_450 */
  38888. #define CSL_CPINTC_VECTOR_ADDRESS_REG_450_VECTOR_ADDRESS_450_MASK (0xFFFFFFFFu)
  38889. #define CSL_CPINTC_VECTOR_ADDRESS_REG_450_VECTOR_ADDRESS_450_SHIFT (0x00000000u)
  38890. #define CSL_CPINTC_VECTOR_ADDRESS_REG_450_VECTOR_ADDRESS_450_RESETVAL (0x00000000u)
  38891. #define CSL_CPINTC_VECTOR_ADDRESS_REG_450_RESETVAL (0x00000000u)
  38892. /* vector_address_reg_451 */
  38893. #define CSL_CPINTC_VECTOR_ADDRESS_REG_451_VECTOR_ADDRESS_451_MASK (0xFFFFFFFFu)
  38894. #define CSL_CPINTC_VECTOR_ADDRESS_REG_451_VECTOR_ADDRESS_451_SHIFT (0x00000000u)
  38895. #define CSL_CPINTC_VECTOR_ADDRESS_REG_451_VECTOR_ADDRESS_451_RESETVAL (0x00000000u)
  38896. #define CSL_CPINTC_VECTOR_ADDRESS_REG_451_RESETVAL (0x00000000u)
  38897. /* vector_address_reg_452 */
  38898. #define CSL_CPINTC_VECTOR_ADDRESS_REG_452_VECTOR_ADDRESS_452_MASK (0xFFFFFFFFu)
  38899. #define CSL_CPINTC_VECTOR_ADDRESS_REG_452_VECTOR_ADDRESS_452_SHIFT (0x00000000u)
  38900. #define CSL_CPINTC_VECTOR_ADDRESS_REG_452_VECTOR_ADDRESS_452_RESETVAL (0x00000000u)
  38901. #define CSL_CPINTC_VECTOR_ADDRESS_REG_452_RESETVAL (0x00000000u)
  38902. /* vector_address_reg_453 */
  38903. #define CSL_CPINTC_VECTOR_ADDRESS_REG_453_VECTOR_ADDRESS_453_MASK (0xFFFFFFFFu)
  38904. #define CSL_CPINTC_VECTOR_ADDRESS_REG_453_VECTOR_ADDRESS_453_SHIFT (0x00000000u)
  38905. #define CSL_CPINTC_VECTOR_ADDRESS_REG_453_VECTOR_ADDRESS_453_RESETVAL (0x00000000u)
  38906. #define CSL_CPINTC_VECTOR_ADDRESS_REG_453_RESETVAL (0x00000000u)
  38907. /* vector_address_reg_454 */
  38908. #define CSL_CPINTC_VECTOR_ADDRESS_REG_454_VECTOR_ADDRESS_454_MASK (0xFFFFFFFFu)
  38909. #define CSL_CPINTC_VECTOR_ADDRESS_REG_454_VECTOR_ADDRESS_454_SHIFT (0x00000000u)
  38910. #define CSL_CPINTC_VECTOR_ADDRESS_REG_454_VECTOR_ADDRESS_454_RESETVAL (0x00000000u)
  38911. #define CSL_CPINTC_VECTOR_ADDRESS_REG_454_RESETVAL (0x00000000u)
  38912. /* vector_address_reg_455 */
  38913. #define CSL_CPINTC_VECTOR_ADDRESS_REG_455_VECTOR_ADDRESS_455_MASK (0xFFFFFFFFu)
  38914. #define CSL_CPINTC_VECTOR_ADDRESS_REG_455_VECTOR_ADDRESS_455_SHIFT (0x00000000u)
  38915. #define CSL_CPINTC_VECTOR_ADDRESS_REG_455_VECTOR_ADDRESS_455_RESETVAL (0x00000000u)
  38916. #define CSL_CPINTC_VECTOR_ADDRESS_REG_455_RESETVAL (0x00000000u)
  38917. /* vector_address_reg_456 */
  38918. #define CSL_CPINTC_VECTOR_ADDRESS_REG_456_VECTOR_ADDRESS_456_MASK (0xFFFFFFFFu)
  38919. #define CSL_CPINTC_VECTOR_ADDRESS_REG_456_VECTOR_ADDRESS_456_SHIFT (0x00000000u)
  38920. #define CSL_CPINTC_VECTOR_ADDRESS_REG_456_VECTOR_ADDRESS_456_RESETVAL (0x00000000u)
  38921. #define CSL_CPINTC_VECTOR_ADDRESS_REG_456_RESETVAL (0x00000000u)
  38922. /* vector_address_reg_457 */
  38923. #define CSL_CPINTC_VECTOR_ADDRESS_REG_457_VECTOR_ADDRESS_457_MASK (0xFFFFFFFFu)
  38924. #define CSL_CPINTC_VECTOR_ADDRESS_REG_457_VECTOR_ADDRESS_457_SHIFT (0x00000000u)
  38925. #define CSL_CPINTC_VECTOR_ADDRESS_REG_457_VECTOR_ADDRESS_457_RESETVAL (0x00000000u)
  38926. #define CSL_CPINTC_VECTOR_ADDRESS_REG_457_RESETVAL (0x00000000u)
  38927. /* vector_address_reg_458 */
  38928. #define CSL_CPINTC_VECTOR_ADDRESS_REG_458_VECTOR_ADDRESS_458_MASK (0xFFFFFFFFu)
  38929. #define CSL_CPINTC_VECTOR_ADDRESS_REG_458_VECTOR_ADDRESS_458_SHIFT (0x00000000u)
  38930. #define CSL_CPINTC_VECTOR_ADDRESS_REG_458_VECTOR_ADDRESS_458_RESETVAL (0x00000000u)
  38931. #define CSL_CPINTC_VECTOR_ADDRESS_REG_458_RESETVAL (0x00000000u)
  38932. /* vector_address_reg_459 */
  38933. #define CSL_CPINTC_VECTOR_ADDRESS_REG_459_VECTOR_ADDRESS_459_MASK (0xFFFFFFFFu)
  38934. #define CSL_CPINTC_VECTOR_ADDRESS_REG_459_VECTOR_ADDRESS_459_SHIFT (0x00000000u)
  38935. #define CSL_CPINTC_VECTOR_ADDRESS_REG_459_VECTOR_ADDRESS_459_RESETVAL (0x00000000u)
  38936. #define CSL_CPINTC_VECTOR_ADDRESS_REG_459_RESETVAL (0x00000000u)
  38937. /* vector_address_reg_460 */
  38938. #define CSL_CPINTC_VECTOR_ADDRESS_REG_460_VECTOR_ADDRESS_460_MASK (0xFFFFFFFFu)
  38939. #define CSL_CPINTC_VECTOR_ADDRESS_REG_460_VECTOR_ADDRESS_460_SHIFT (0x00000000u)
  38940. #define CSL_CPINTC_VECTOR_ADDRESS_REG_460_VECTOR_ADDRESS_460_RESETVAL (0x00000000u)
  38941. #define CSL_CPINTC_VECTOR_ADDRESS_REG_460_RESETVAL (0x00000000u)
  38942. /* vector_address_reg_461 */
  38943. #define CSL_CPINTC_VECTOR_ADDRESS_REG_461_VECTOR_ADDRESS_461_MASK (0xFFFFFFFFu)
  38944. #define CSL_CPINTC_VECTOR_ADDRESS_REG_461_VECTOR_ADDRESS_461_SHIFT (0x00000000u)
  38945. #define CSL_CPINTC_VECTOR_ADDRESS_REG_461_VECTOR_ADDRESS_461_RESETVAL (0x00000000u)
  38946. #define CSL_CPINTC_VECTOR_ADDRESS_REG_461_RESETVAL (0x00000000u)
  38947. /* vector_address_reg_462 */
  38948. #define CSL_CPINTC_VECTOR_ADDRESS_REG_462_VECTOR_ADDRESS_462_MASK (0xFFFFFFFFu)
  38949. #define CSL_CPINTC_VECTOR_ADDRESS_REG_462_VECTOR_ADDRESS_462_SHIFT (0x00000000u)
  38950. #define CSL_CPINTC_VECTOR_ADDRESS_REG_462_VECTOR_ADDRESS_462_RESETVAL (0x00000000u)
  38951. #define CSL_CPINTC_VECTOR_ADDRESS_REG_462_RESETVAL (0x00000000u)
  38952. /* vector_address_reg_463 */
  38953. #define CSL_CPINTC_VECTOR_ADDRESS_REG_463_VECTOR_ADDRESS_463_MASK (0xFFFFFFFFu)
  38954. #define CSL_CPINTC_VECTOR_ADDRESS_REG_463_VECTOR_ADDRESS_463_SHIFT (0x00000000u)
  38955. #define CSL_CPINTC_VECTOR_ADDRESS_REG_463_VECTOR_ADDRESS_463_RESETVAL (0x00000000u)
  38956. #define CSL_CPINTC_VECTOR_ADDRESS_REG_463_RESETVAL (0x00000000u)
  38957. /* vector_address_reg_464 */
  38958. #define CSL_CPINTC_VECTOR_ADDRESS_REG_464_VECTOR_ADDRESS_464_MASK (0xFFFFFFFFu)
  38959. #define CSL_CPINTC_VECTOR_ADDRESS_REG_464_VECTOR_ADDRESS_464_SHIFT (0x00000000u)
  38960. #define CSL_CPINTC_VECTOR_ADDRESS_REG_464_VECTOR_ADDRESS_464_RESETVAL (0x00000000u)
  38961. #define CSL_CPINTC_VECTOR_ADDRESS_REG_464_RESETVAL (0x00000000u)
  38962. /* vector_address_reg_465 */
  38963. #define CSL_CPINTC_VECTOR_ADDRESS_REG_465_VECTOR_ADDRESS_465_MASK (0xFFFFFFFFu)
  38964. #define CSL_CPINTC_VECTOR_ADDRESS_REG_465_VECTOR_ADDRESS_465_SHIFT (0x00000000u)
  38965. #define CSL_CPINTC_VECTOR_ADDRESS_REG_465_VECTOR_ADDRESS_465_RESETVAL (0x00000000u)
  38966. #define CSL_CPINTC_VECTOR_ADDRESS_REG_465_RESETVAL (0x00000000u)
  38967. /* vector_address_reg_466 */
  38968. #define CSL_CPINTC_VECTOR_ADDRESS_REG_466_VECTOR_ADDRESS_466_MASK (0xFFFFFFFFu)
  38969. #define CSL_CPINTC_VECTOR_ADDRESS_REG_466_VECTOR_ADDRESS_466_SHIFT (0x00000000u)
  38970. #define CSL_CPINTC_VECTOR_ADDRESS_REG_466_VECTOR_ADDRESS_466_RESETVAL (0x00000000u)
  38971. #define CSL_CPINTC_VECTOR_ADDRESS_REG_466_RESETVAL (0x00000000u)
  38972. /* vector_address_reg_467 */
  38973. #define CSL_CPINTC_VECTOR_ADDRESS_REG_467_VECTOR_ADDRESS_467_MASK (0xFFFFFFFFu)
  38974. #define CSL_CPINTC_VECTOR_ADDRESS_REG_467_VECTOR_ADDRESS_467_SHIFT (0x00000000u)
  38975. #define CSL_CPINTC_VECTOR_ADDRESS_REG_467_VECTOR_ADDRESS_467_RESETVAL (0x00000000u)
  38976. #define CSL_CPINTC_VECTOR_ADDRESS_REG_467_RESETVAL (0x00000000u)
  38977. /* vector_address_reg_468 */
  38978. #define CSL_CPINTC_VECTOR_ADDRESS_REG_468_VECTOR_ADDRESS_468_MASK (0xFFFFFFFFu)
  38979. #define CSL_CPINTC_VECTOR_ADDRESS_REG_468_VECTOR_ADDRESS_468_SHIFT (0x00000000u)
  38980. #define CSL_CPINTC_VECTOR_ADDRESS_REG_468_VECTOR_ADDRESS_468_RESETVAL (0x00000000u)
  38981. #define CSL_CPINTC_VECTOR_ADDRESS_REG_468_RESETVAL (0x00000000u)
  38982. /* vector_address_reg_469 */
  38983. #define CSL_CPINTC_VECTOR_ADDRESS_REG_469_VECTOR_ADDRESS_469_MASK (0xFFFFFFFFu)
  38984. #define CSL_CPINTC_VECTOR_ADDRESS_REG_469_VECTOR_ADDRESS_469_SHIFT (0x00000000u)
  38985. #define CSL_CPINTC_VECTOR_ADDRESS_REG_469_VECTOR_ADDRESS_469_RESETVAL (0x00000000u)
  38986. #define CSL_CPINTC_VECTOR_ADDRESS_REG_469_RESETVAL (0x00000000u)
  38987. /* vector_address_reg_470 */
  38988. #define CSL_CPINTC_VECTOR_ADDRESS_REG_470_VECTOR_ADDRESS_470_MASK (0xFFFFFFFFu)
  38989. #define CSL_CPINTC_VECTOR_ADDRESS_REG_470_VECTOR_ADDRESS_470_SHIFT (0x00000000u)
  38990. #define CSL_CPINTC_VECTOR_ADDRESS_REG_470_VECTOR_ADDRESS_470_RESETVAL (0x00000000u)
  38991. #define CSL_CPINTC_VECTOR_ADDRESS_REG_470_RESETVAL (0x00000000u)
  38992. /* vector_address_reg_471 */
  38993. #define CSL_CPINTC_VECTOR_ADDRESS_REG_471_VECTOR_ADDRESS_471_MASK (0xFFFFFFFFu)
  38994. #define CSL_CPINTC_VECTOR_ADDRESS_REG_471_VECTOR_ADDRESS_471_SHIFT (0x00000000u)
  38995. #define CSL_CPINTC_VECTOR_ADDRESS_REG_471_VECTOR_ADDRESS_471_RESETVAL (0x00000000u)
  38996. #define CSL_CPINTC_VECTOR_ADDRESS_REG_471_RESETVAL (0x00000000u)
  38997. /* vector_address_reg_472 */
  38998. #define CSL_CPINTC_VECTOR_ADDRESS_REG_472_VECTOR_ADDRESS_472_MASK (0xFFFFFFFFu)
  38999. #define CSL_CPINTC_VECTOR_ADDRESS_REG_472_VECTOR_ADDRESS_472_SHIFT (0x00000000u)
  39000. #define CSL_CPINTC_VECTOR_ADDRESS_REG_472_VECTOR_ADDRESS_472_RESETVAL (0x00000000u)
  39001. #define CSL_CPINTC_VECTOR_ADDRESS_REG_472_RESETVAL (0x00000000u)
  39002. /* vector_address_reg_473 */
  39003. #define CSL_CPINTC_VECTOR_ADDRESS_REG_473_VECTOR_ADDRESS_473_MASK (0xFFFFFFFFu)
  39004. #define CSL_CPINTC_VECTOR_ADDRESS_REG_473_VECTOR_ADDRESS_473_SHIFT (0x00000000u)
  39005. #define CSL_CPINTC_VECTOR_ADDRESS_REG_473_VECTOR_ADDRESS_473_RESETVAL (0x00000000u)
  39006. #define CSL_CPINTC_VECTOR_ADDRESS_REG_473_RESETVAL (0x00000000u)
  39007. /* vector_address_reg_474 */
  39008. #define CSL_CPINTC_VECTOR_ADDRESS_REG_474_VECTOR_ADDRESS_474_MASK (0xFFFFFFFFu)
  39009. #define CSL_CPINTC_VECTOR_ADDRESS_REG_474_VECTOR_ADDRESS_474_SHIFT (0x00000000u)
  39010. #define CSL_CPINTC_VECTOR_ADDRESS_REG_474_VECTOR_ADDRESS_474_RESETVAL (0x00000000u)
  39011. #define CSL_CPINTC_VECTOR_ADDRESS_REG_474_RESETVAL (0x00000000u)
  39012. /* vector_address_reg_475 */
  39013. #define CSL_CPINTC_VECTOR_ADDRESS_REG_475_VECTOR_ADDRESS_475_MASK (0xFFFFFFFFu)
  39014. #define CSL_CPINTC_VECTOR_ADDRESS_REG_475_VECTOR_ADDRESS_475_SHIFT (0x00000000u)
  39015. #define CSL_CPINTC_VECTOR_ADDRESS_REG_475_VECTOR_ADDRESS_475_RESETVAL (0x00000000u)
  39016. #define CSL_CPINTC_VECTOR_ADDRESS_REG_475_RESETVAL (0x00000000u)
  39017. /* vector_address_reg_476 */
  39018. #define CSL_CPINTC_VECTOR_ADDRESS_REG_476_VECTOR_ADDRESS_476_MASK (0xFFFFFFFFu)
  39019. #define CSL_CPINTC_VECTOR_ADDRESS_REG_476_VECTOR_ADDRESS_476_SHIFT (0x00000000u)
  39020. #define CSL_CPINTC_VECTOR_ADDRESS_REG_476_VECTOR_ADDRESS_476_RESETVAL (0x00000000u)
  39021. #define CSL_CPINTC_VECTOR_ADDRESS_REG_476_RESETVAL (0x00000000u)
  39022. /* vector_address_reg_477 */
  39023. #define CSL_CPINTC_VECTOR_ADDRESS_REG_477_VECTOR_ADDRESS_477_MASK (0xFFFFFFFFu)
  39024. #define CSL_CPINTC_VECTOR_ADDRESS_REG_477_VECTOR_ADDRESS_477_SHIFT (0x00000000u)
  39025. #define CSL_CPINTC_VECTOR_ADDRESS_REG_477_VECTOR_ADDRESS_477_RESETVAL (0x00000000u)
  39026. #define CSL_CPINTC_VECTOR_ADDRESS_REG_477_RESETVAL (0x00000000u)
  39027. /* vector_address_reg_478 */
  39028. #define CSL_CPINTC_VECTOR_ADDRESS_REG_478_VECTOR_ADDRESS_478_MASK (0xFFFFFFFFu)
  39029. #define CSL_CPINTC_VECTOR_ADDRESS_REG_478_VECTOR_ADDRESS_478_SHIFT (0x00000000u)
  39030. #define CSL_CPINTC_VECTOR_ADDRESS_REG_478_VECTOR_ADDRESS_478_RESETVAL (0x00000000u)
  39031. #define CSL_CPINTC_VECTOR_ADDRESS_REG_478_RESETVAL (0x00000000u)
  39032. /* vector_address_reg_479 */
  39033. #define CSL_CPINTC_VECTOR_ADDRESS_REG_479_VECTOR_ADDRESS_479_MASK (0xFFFFFFFFu)
  39034. #define CSL_CPINTC_VECTOR_ADDRESS_REG_479_VECTOR_ADDRESS_479_SHIFT (0x00000000u)
  39035. #define CSL_CPINTC_VECTOR_ADDRESS_REG_479_VECTOR_ADDRESS_479_RESETVAL (0x00000000u)
  39036. #define CSL_CPINTC_VECTOR_ADDRESS_REG_479_RESETVAL (0x00000000u)
  39037. /* vector_address_reg_480 */
  39038. #define CSL_CPINTC_VECTOR_ADDRESS_REG_480_VECTOR_ADDRESS_480_MASK (0xFFFFFFFFu)
  39039. #define CSL_CPINTC_VECTOR_ADDRESS_REG_480_VECTOR_ADDRESS_480_SHIFT (0x00000000u)
  39040. #define CSL_CPINTC_VECTOR_ADDRESS_REG_480_VECTOR_ADDRESS_480_RESETVAL (0x00000000u)
  39041. #define CSL_CPINTC_VECTOR_ADDRESS_REG_480_RESETVAL (0x00000000u)
  39042. /* vector_address_reg_481 */
  39043. #define CSL_CPINTC_VECTOR_ADDRESS_REG_481_VECTOR_ADDRESS_481_MASK (0xFFFFFFFFu)
  39044. #define CSL_CPINTC_VECTOR_ADDRESS_REG_481_VECTOR_ADDRESS_481_SHIFT (0x00000000u)
  39045. #define CSL_CPINTC_VECTOR_ADDRESS_REG_481_VECTOR_ADDRESS_481_RESETVAL (0x00000000u)
  39046. #define CSL_CPINTC_VECTOR_ADDRESS_REG_481_RESETVAL (0x00000000u)
  39047. /* vector_address_reg_482 */
  39048. #define CSL_CPINTC_VECTOR_ADDRESS_REG_482_VECTOR_ADDRESS_482_MASK (0xFFFFFFFFu)
  39049. #define CSL_CPINTC_VECTOR_ADDRESS_REG_482_VECTOR_ADDRESS_482_SHIFT (0x00000000u)
  39050. #define CSL_CPINTC_VECTOR_ADDRESS_REG_482_VECTOR_ADDRESS_482_RESETVAL (0x00000000u)
  39051. #define CSL_CPINTC_VECTOR_ADDRESS_REG_482_RESETVAL (0x00000000u)
  39052. /* vector_address_reg_483 */
  39053. #define CSL_CPINTC_VECTOR_ADDRESS_REG_483_VECTOR_ADDRESS_483_MASK (0xFFFFFFFFu)
  39054. #define CSL_CPINTC_VECTOR_ADDRESS_REG_483_VECTOR_ADDRESS_483_SHIFT (0x00000000u)
  39055. #define CSL_CPINTC_VECTOR_ADDRESS_REG_483_VECTOR_ADDRESS_483_RESETVAL (0x00000000u)
  39056. #define CSL_CPINTC_VECTOR_ADDRESS_REG_483_RESETVAL (0x00000000u)
  39057. /* vector_address_reg_484 */
  39058. #define CSL_CPINTC_VECTOR_ADDRESS_REG_484_VECTOR_ADDRESS_484_MASK (0xFFFFFFFFu)
  39059. #define CSL_CPINTC_VECTOR_ADDRESS_REG_484_VECTOR_ADDRESS_484_SHIFT (0x00000000u)
  39060. #define CSL_CPINTC_VECTOR_ADDRESS_REG_484_VECTOR_ADDRESS_484_RESETVAL (0x00000000u)
  39061. #define CSL_CPINTC_VECTOR_ADDRESS_REG_484_RESETVAL (0x00000000u)
  39062. /* vector_address_reg_485 */
  39063. #define CSL_CPINTC_VECTOR_ADDRESS_REG_485_VECTOR_ADDRESS_485_MASK (0xFFFFFFFFu)
  39064. #define CSL_CPINTC_VECTOR_ADDRESS_REG_485_VECTOR_ADDRESS_485_SHIFT (0x00000000u)
  39065. #define CSL_CPINTC_VECTOR_ADDRESS_REG_485_VECTOR_ADDRESS_485_RESETVAL (0x00000000u)
  39066. #define CSL_CPINTC_VECTOR_ADDRESS_REG_485_RESETVAL (0x00000000u)
  39067. /* vector_address_reg_486 */
  39068. #define CSL_CPINTC_VECTOR_ADDRESS_REG_486_VECTOR_ADDRESS_486_MASK (0xFFFFFFFFu)
  39069. #define CSL_CPINTC_VECTOR_ADDRESS_REG_486_VECTOR_ADDRESS_486_SHIFT (0x00000000u)
  39070. #define CSL_CPINTC_VECTOR_ADDRESS_REG_486_VECTOR_ADDRESS_486_RESETVAL (0x00000000u)
  39071. #define CSL_CPINTC_VECTOR_ADDRESS_REG_486_RESETVAL (0x00000000u)
  39072. /* vector_address_reg_487 */
  39073. #define CSL_CPINTC_VECTOR_ADDRESS_REG_487_VECTOR_ADDRESS_487_MASK (0xFFFFFFFFu)
  39074. #define CSL_CPINTC_VECTOR_ADDRESS_REG_487_VECTOR_ADDRESS_487_SHIFT (0x00000000u)
  39075. #define CSL_CPINTC_VECTOR_ADDRESS_REG_487_VECTOR_ADDRESS_487_RESETVAL (0x00000000u)
  39076. #define CSL_CPINTC_VECTOR_ADDRESS_REG_487_RESETVAL (0x00000000u)
  39077. /* vector_address_reg_488 */
  39078. #define CSL_CPINTC_VECTOR_ADDRESS_REG_488_VECTOR_ADDRESS_488_MASK (0xFFFFFFFFu)
  39079. #define CSL_CPINTC_VECTOR_ADDRESS_REG_488_VECTOR_ADDRESS_488_SHIFT (0x00000000u)
  39080. #define CSL_CPINTC_VECTOR_ADDRESS_REG_488_VECTOR_ADDRESS_488_RESETVAL (0x00000000u)
  39081. #define CSL_CPINTC_VECTOR_ADDRESS_REG_488_RESETVAL (0x00000000u)
  39082. /* vector_address_reg_489 */
  39083. #define CSL_CPINTC_VECTOR_ADDRESS_REG_489_VECTOR_ADDRESS_489_MASK (0xFFFFFFFFu)
  39084. #define CSL_CPINTC_VECTOR_ADDRESS_REG_489_VECTOR_ADDRESS_489_SHIFT (0x00000000u)
  39085. #define CSL_CPINTC_VECTOR_ADDRESS_REG_489_VECTOR_ADDRESS_489_RESETVAL (0x00000000u)
  39086. #define CSL_CPINTC_VECTOR_ADDRESS_REG_489_RESETVAL (0x00000000u)
  39087. /* vector_address_reg_490 */
  39088. #define CSL_CPINTC_VECTOR_ADDRESS_REG_490_VECTOR_ADDRESS_490_MASK (0xFFFFFFFFu)
  39089. #define CSL_CPINTC_VECTOR_ADDRESS_REG_490_VECTOR_ADDRESS_490_SHIFT (0x00000000u)
  39090. #define CSL_CPINTC_VECTOR_ADDRESS_REG_490_VECTOR_ADDRESS_490_RESETVAL (0x00000000u)
  39091. #define CSL_CPINTC_VECTOR_ADDRESS_REG_490_RESETVAL (0x00000000u)
  39092. /* vector_address_reg_491 */
  39093. #define CSL_CPINTC_VECTOR_ADDRESS_REG_491_VECTOR_ADDRESS_491_MASK (0xFFFFFFFFu)
  39094. #define CSL_CPINTC_VECTOR_ADDRESS_REG_491_VECTOR_ADDRESS_491_SHIFT (0x00000000u)
  39095. #define CSL_CPINTC_VECTOR_ADDRESS_REG_491_VECTOR_ADDRESS_491_RESETVAL (0x00000000u)
  39096. #define CSL_CPINTC_VECTOR_ADDRESS_REG_491_RESETVAL (0x00000000u)
  39097. /* vector_address_reg_492 */
  39098. #define CSL_CPINTC_VECTOR_ADDRESS_REG_492_VECTOR_ADDRESS_492_MASK (0xFFFFFFFFu)
  39099. #define CSL_CPINTC_VECTOR_ADDRESS_REG_492_VECTOR_ADDRESS_492_SHIFT (0x00000000u)
  39100. #define CSL_CPINTC_VECTOR_ADDRESS_REG_492_VECTOR_ADDRESS_492_RESETVAL (0x00000000u)
  39101. #define CSL_CPINTC_VECTOR_ADDRESS_REG_492_RESETVAL (0x00000000u)
  39102. /* vector_address_reg_493 */
  39103. #define CSL_CPINTC_VECTOR_ADDRESS_REG_493_VECTOR_ADDRESS_493_MASK (0xFFFFFFFFu)
  39104. #define CSL_CPINTC_VECTOR_ADDRESS_REG_493_VECTOR_ADDRESS_493_SHIFT (0x00000000u)
  39105. #define CSL_CPINTC_VECTOR_ADDRESS_REG_493_VECTOR_ADDRESS_493_RESETVAL (0x00000000u)
  39106. #define CSL_CPINTC_VECTOR_ADDRESS_REG_493_RESETVAL (0x00000000u)
  39107. /* vector_address_reg_494 */
  39108. #define CSL_CPINTC_VECTOR_ADDRESS_REG_494_VECTOR_ADDRESS_494_MASK (0xFFFFFFFFu)
  39109. #define CSL_CPINTC_VECTOR_ADDRESS_REG_494_VECTOR_ADDRESS_494_SHIFT (0x00000000u)
  39110. #define CSL_CPINTC_VECTOR_ADDRESS_REG_494_VECTOR_ADDRESS_494_RESETVAL (0x00000000u)
  39111. #define CSL_CPINTC_VECTOR_ADDRESS_REG_494_RESETVAL (0x00000000u)
  39112. /* vector_address_reg_495 */
  39113. #define CSL_CPINTC_VECTOR_ADDRESS_REG_495_VECTOR_ADDRESS_495_MASK (0xFFFFFFFFu)
  39114. #define CSL_CPINTC_VECTOR_ADDRESS_REG_495_VECTOR_ADDRESS_495_SHIFT (0x00000000u)
  39115. #define CSL_CPINTC_VECTOR_ADDRESS_REG_495_VECTOR_ADDRESS_495_RESETVAL (0x00000000u)
  39116. #define CSL_CPINTC_VECTOR_ADDRESS_REG_495_RESETVAL (0x00000000u)
  39117. /* vector_address_reg_496 */
  39118. #define CSL_CPINTC_VECTOR_ADDRESS_REG_496_VECTOR_ADDRESS_496_MASK (0xFFFFFFFFu)
  39119. #define CSL_CPINTC_VECTOR_ADDRESS_REG_496_VECTOR_ADDRESS_496_SHIFT (0x00000000u)
  39120. #define CSL_CPINTC_VECTOR_ADDRESS_REG_496_VECTOR_ADDRESS_496_RESETVAL (0x00000000u)
  39121. #define CSL_CPINTC_VECTOR_ADDRESS_REG_496_RESETVAL (0x00000000u)
  39122. /* vector_address_reg_497 */
  39123. #define CSL_CPINTC_VECTOR_ADDRESS_REG_497_VECTOR_ADDRESS_497_MASK (0xFFFFFFFFu)
  39124. #define CSL_CPINTC_VECTOR_ADDRESS_REG_497_VECTOR_ADDRESS_497_SHIFT (0x00000000u)
  39125. #define CSL_CPINTC_VECTOR_ADDRESS_REG_497_VECTOR_ADDRESS_497_RESETVAL (0x00000000u)
  39126. #define CSL_CPINTC_VECTOR_ADDRESS_REG_497_RESETVAL (0x00000000u)
  39127. /* vector_address_reg_498 */
  39128. #define CSL_CPINTC_VECTOR_ADDRESS_REG_498_VECTOR_ADDRESS_498_MASK (0xFFFFFFFFu)
  39129. #define CSL_CPINTC_VECTOR_ADDRESS_REG_498_VECTOR_ADDRESS_498_SHIFT (0x00000000u)
  39130. #define CSL_CPINTC_VECTOR_ADDRESS_REG_498_VECTOR_ADDRESS_498_RESETVAL (0x00000000u)
  39131. #define CSL_CPINTC_VECTOR_ADDRESS_REG_498_RESETVAL (0x00000000u)
  39132. /* vector_address_reg_499 */
  39133. #define CSL_CPINTC_VECTOR_ADDRESS_REG_499_VECTOR_ADDRESS_499_MASK (0xFFFFFFFFu)
  39134. #define CSL_CPINTC_VECTOR_ADDRESS_REG_499_VECTOR_ADDRESS_499_SHIFT (0x00000000u)
  39135. #define CSL_CPINTC_VECTOR_ADDRESS_REG_499_VECTOR_ADDRESS_499_RESETVAL (0x00000000u)
  39136. #define CSL_CPINTC_VECTOR_ADDRESS_REG_499_RESETVAL (0x00000000u)
  39137. /* vector_address_reg_500 */
  39138. #define CSL_CPINTC_VECTOR_ADDRESS_REG_500_VECTOR_ADDRESS_500_MASK (0xFFFFFFFFu)
  39139. #define CSL_CPINTC_VECTOR_ADDRESS_REG_500_VECTOR_ADDRESS_500_SHIFT (0x00000000u)
  39140. #define CSL_CPINTC_VECTOR_ADDRESS_REG_500_VECTOR_ADDRESS_500_RESETVAL (0x00000000u)
  39141. #define CSL_CPINTC_VECTOR_ADDRESS_REG_500_RESETVAL (0x00000000u)
  39142. /* vector_address_reg_501 */
  39143. #define CSL_CPINTC_VECTOR_ADDRESS_REG_501_VECTOR_ADDRESS_501_MASK (0xFFFFFFFFu)
  39144. #define CSL_CPINTC_VECTOR_ADDRESS_REG_501_VECTOR_ADDRESS_501_SHIFT (0x00000000u)
  39145. #define CSL_CPINTC_VECTOR_ADDRESS_REG_501_VECTOR_ADDRESS_501_RESETVAL (0x00000000u)
  39146. #define CSL_CPINTC_VECTOR_ADDRESS_REG_501_RESETVAL (0x00000000u)
  39147. /* vector_address_reg_502 */
  39148. #define CSL_CPINTC_VECTOR_ADDRESS_REG_502_VECTOR_ADDRESS_502_MASK (0xFFFFFFFFu)
  39149. #define CSL_CPINTC_VECTOR_ADDRESS_REG_502_VECTOR_ADDRESS_502_SHIFT (0x00000000u)
  39150. #define CSL_CPINTC_VECTOR_ADDRESS_REG_502_VECTOR_ADDRESS_502_RESETVAL (0x00000000u)
  39151. #define CSL_CPINTC_VECTOR_ADDRESS_REG_502_RESETVAL (0x00000000u)
  39152. /* vector_address_reg_503 */
  39153. #define CSL_CPINTC_VECTOR_ADDRESS_REG_503_VECTOR_ADDRESS_503_MASK (0xFFFFFFFFu)
  39154. #define CSL_CPINTC_VECTOR_ADDRESS_REG_503_VECTOR_ADDRESS_503_SHIFT (0x00000000u)
  39155. #define CSL_CPINTC_VECTOR_ADDRESS_REG_503_VECTOR_ADDRESS_503_RESETVAL (0x00000000u)
  39156. #define CSL_CPINTC_VECTOR_ADDRESS_REG_503_RESETVAL (0x00000000u)
  39157. /* vector_address_reg_504 */
  39158. #define CSL_CPINTC_VECTOR_ADDRESS_REG_504_VECTOR_ADDRESS_504_MASK (0xFFFFFFFFu)
  39159. #define CSL_CPINTC_VECTOR_ADDRESS_REG_504_VECTOR_ADDRESS_504_SHIFT (0x00000000u)
  39160. #define CSL_CPINTC_VECTOR_ADDRESS_REG_504_VECTOR_ADDRESS_504_RESETVAL (0x00000000u)
  39161. #define CSL_CPINTC_VECTOR_ADDRESS_REG_504_RESETVAL (0x00000000u)
  39162. /* vector_address_reg_505 */
  39163. #define CSL_CPINTC_VECTOR_ADDRESS_REG_505_VECTOR_ADDRESS_505_MASK (0xFFFFFFFFu)
  39164. #define CSL_CPINTC_VECTOR_ADDRESS_REG_505_VECTOR_ADDRESS_505_SHIFT (0x00000000u)
  39165. #define CSL_CPINTC_VECTOR_ADDRESS_REG_505_VECTOR_ADDRESS_505_RESETVAL (0x00000000u)
  39166. #define CSL_CPINTC_VECTOR_ADDRESS_REG_505_RESETVAL (0x00000000u)
  39167. /* vector_address_reg_506 */
  39168. #define CSL_CPINTC_VECTOR_ADDRESS_REG_506_VECTOR_ADDRESS_506_MASK (0xFFFFFFFFu)
  39169. #define CSL_CPINTC_VECTOR_ADDRESS_REG_506_VECTOR_ADDRESS_506_SHIFT (0x00000000u)
  39170. #define CSL_CPINTC_VECTOR_ADDRESS_REG_506_VECTOR_ADDRESS_506_RESETVAL (0x00000000u)
  39171. #define CSL_CPINTC_VECTOR_ADDRESS_REG_506_RESETVAL (0x00000000u)
  39172. /* vector_address_reg_507 */
  39173. #define CSL_CPINTC_VECTOR_ADDRESS_REG_507_VECTOR_ADDRESS_507_MASK (0xFFFFFFFFu)
  39174. #define CSL_CPINTC_VECTOR_ADDRESS_REG_507_VECTOR_ADDRESS_507_SHIFT (0x00000000u)
  39175. #define CSL_CPINTC_VECTOR_ADDRESS_REG_507_VECTOR_ADDRESS_507_RESETVAL (0x00000000u)
  39176. #define CSL_CPINTC_VECTOR_ADDRESS_REG_507_RESETVAL (0x00000000u)
  39177. /* vector_address_reg_508 */
  39178. #define CSL_CPINTC_VECTOR_ADDRESS_REG_508_VECTOR_ADDRESS_508_MASK (0xFFFFFFFFu)
  39179. #define CSL_CPINTC_VECTOR_ADDRESS_REG_508_VECTOR_ADDRESS_508_SHIFT (0x00000000u)
  39180. #define CSL_CPINTC_VECTOR_ADDRESS_REG_508_VECTOR_ADDRESS_508_RESETVAL (0x00000000u)
  39181. #define CSL_CPINTC_VECTOR_ADDRESS_REG_508_RESETVAL (0x00000000u)
  39182. /* vector_address_reg_509 */
  39183. #define CSL_CPINTC_VECTOR_ADDRESS_REG_509_VECTOR_ADDRESS_509_MASK (0xFFFFFFFFu)
  39184. #define CSL_CPINTC_VECTOR_ADDRESS_REG_509_VECTOR_ADDRESS_509_SHIFT (0x00000000u)
  39185. #define CSL_CPINTC_VECTOR_ADDRESS_REG_509_VECTOR_ADDRESS_509_RESETVAL (0x00000000u)
  39186. #define CSL_CPINTC_VECTOR_ADDRESS_REG_509_RESETVAL (0x00000000u)
  39187. /* vector_address_reg_510 */
  39188. #define CSL_CPINTC_VECTOR_ADDRESS_REG_510_VECTOR_ADDRESS_510_MASK (0xFFFFFFFFu)
  39189. #define CSL_CPINTC_VECTOR_ADDRESS_REG_510_VECTOR_ADDRESS_510_SHIFT (0x00000000u)
  39190. #define CSL_CPINTC_VECTOR_ADDRESS_REG_510_VECTOR_ADDRESS_510_RESETVAL (0x00000000u)
  39191. #define CSL_CPINTC_VECTOR_ADDRESS_REG_510_RESETVAL (0x00000000u)
  39192. /* vector_address_reg_511 */
  39193. #define CSL_CPINTC_VECTOR_ADDRESS_REG_511_VECTOR_ADDRESS_511_MASK (0xFFFFFFFFu)
  39194. #define CSL_CPINTC_VECTOR_ADDRESS_REG_511_VECTOR_ADDRESS_511_SHIFT (0x00000000u)
  39195. #define CSL_CPINTC_VECTOR_ADDRESS_REG_511_VECTOR_ADDRESS_511_RESETVAL (0x00000000u)
  39196. #define CSL_CPINTC_VECTOR_ADDRESS_REG_511_RESETVAL (0x00000000u)
  39197. /* vector_address_reg_512 */
  39198. #define CSL_CPINTC_VECTOR_ADDRESS_REG_512_VECTOR_ADDRESS_512_MASK (0xFFFFFFFFu)
  39199. #define CSL_CPINTC_VECTOR_ADDRESS_REG_512_VECTOR_ADDRESS_512_SHIFT (0x00000000u)
  39200. #define CSL_CPINTC_VECTOR_ADDRESS_REG_512_VECTOR_ADDRESS_512_RESETVAL (0x00000000u)
  39201. #define CSL_CPINTC_VECTOR_ADDRESS_REG_512_RESETVAL (0x00000000u)
  39202. /* vector_address_reg_513 */
  39203. #define CSL_CPINTC_VECTOR_ADDRESS_REG_513_VECTOR_ADDRESS_513_MASK (0xFFFFFFFFu)
  39204. #define CSL_CPINTC_VECTOR_ADDRESS_REG_513_VECTOR_ADDRESS_513_SHIFT (0x00000000u)
  39205. #define CSL_CPINTC_VECTOR_ADDRESS_REG_513_VECTOR_ADDRESS_513_RESETVAL (0x00000000u)
  39206. #define CSL_CPINTC_VECTOR_ADDRESS_REG_513_RESETVAL (0x00000000u)
  39207. /* vector_address_reg_514 */
  39208. #define CSL_CPINTC_VECTOR_ADDRESS_REG_514_VECTOR_ADDRESS_514_MASK (0xFFFFFFFFu)
  39209. #define CSL_CPINTC_VECTOR_ADDRESS_REG_514_VECTOR_ADDRESS_514_SHIFT (0x00000000u)
  39210. #define CSL_CPINTC_VECTOR_ADDRESS_REG_514_VECTOR_ADDRESS_514_RESETVAL (0x00000000u)
  39211. #define CSL_CPINTC_VECTOR_ADDRESS_REG_514_RESETVAL (0x00000000u)
  39212. /* vector_address_reg_515 */
  39213. #define CSL_CPINTC_VECTOR_ADDRESS_REG_515_VECTOR_ADDRESS_515_MASK (0xFFFFFFFFu)
  39214. #define CSL_CPINTC_VECTOR_ADDRESS_REG_515_VECTOR_ADDRESS_515_SHIFT (0x00000000u)
  39215. #define CSL_CPINTC_VECTOR_ADDRESS_REG_515_VECTOR_ADDRESS_515_RESETVAL (0x00000000u)
  39216. #define CSL_CPINTC_VECTOR_ADDRESS_REG_515_RESETVAL (0x00000000u)
  39217. /* vector_address_reg_516 */
  39218. #define CSL_CPINTC_VECTOR_ADDRESS_REG_516_VECTOR_ADDRESS_516_MASK (0xFFFFFFFFu)
  39219. #define CSL_CPINTC_VECTOR_ADDRESS_REG_516_VECTOR_ADDRESS_516_SHIFT (0x00000000u)
  39220. #define CSL_CPINTC_VECTOR_ADDRESS_REG_516_VECTOR_ADDRESS_516_RESETVAL (0x00000000u)
  39221. #define CSL_CPINTC_VECTOR_ADDRESS_REG_516_RESETVAL (0x00000000u)
  39222. /* vector_address_reg_517 */
  39223. #define CSL_CPINTC_VECTOR_ADDRESS_REG_517_VECTOR_ADDRESS_517_MASK (0xFFFFFFFFu)
  39224. #define CSL_CPINTC_VECTOR_ADDRESS_REG_517_VECTOR_ADDRESS_517_SHIFT (0x00000000u)
  39225. #define CSL_CPINTC_VECTOR_ADDRESS_REG_517_VECTOR_ADDRESS_517_RESETVAL (0x00000000u)
  39226. #define CSL_CPINTC_VECTOR_ADDRESS_REG_517_RESETVAL (0x00000000u)
  39227. /* vector_address_reg_518 */
  39228. #define CSL_CPINTC_VECTOR_ADDRESS_REG_518_VECTOR_ADDRESS_518_MASK (0xFFFFFFFFu)
  39229. #define CSL_CPINTC_VECTOR_ADDRESS_REG_518_VECTOR_ADDRESS_518_SHIFT (0x00000000u)
  39230. #define CSL_CPINTC_VECTOR_ADDRESS_REG_518_VECTOR_ADDRESS_518_RESETVAL (0x00000000u)
  39231. #define CSL_CPINTC_VECTOR_ADDRESS_REG_518_RESETVAL (0x00000000u)
  39232. /* vector_address_reg_519 */
  39233. #define CSL_CPINTC_VECTOR_ADDRESS_REG_519_VECTOR_ADDRESS_519_MASK (0xFFFFFFFFu)
  39234. #define CSL_CPINTC_VECTOR_ADDRESS_REG_519_VECTOR_ADDRESS_519_SHIFT (0x00000000u)
  39235. #define CSL_CPINTC_VECTOR_ADDRESS_REG_519_VECTOR_ADDRESS_519_RESETVAL (0x00000000u)
  39236. #define CSL_CPINTC_VECTOR_ADDRESS_REG_519_RESETVAL (0x00000000u)
  39237. /* vector_address_reg_520 */
  39238. #define CSL_CPINTC_VECTOR_ADDRESS_REG_520_VECTOR_ADDRESS_520_MASK (0xFFFFFFFFu)
  39239. #define CSL_CPINTC_VECTOR_ADDRESS_REG_520_VECTOR_ADDRESS_520_SHIFT (0x00000000u)
  39240. #define CSL_CPINTC_VECTOR_ADDRESS_REG_520_VECTOR_ADDRESS_520_RESETVAL (0x00000000u)
  39241. #define CSL_CPINTC_VECTOR_ADDRESS_REG_520_RESETVAL (0x00000000u)
  39242. /* vector_address_reg_521 */
  39243. #define CSL_CPINTC_VECTOR_ADDRESS_REG_521_VECTOR_ADDRESS_521_MASK (0xFFFFFFFFu)
  39244. #define CSL_CPINTC_VECTOR_ADDRESS_REG_521_VECTOR_ADDRESS_521_SHIFT (0x00000000u)
  39245. #define CSL_CPINTC_VECTOR_ADDRESS_REG_521_VECTOR_ADDRESS_521_RESETVAL (0x00000000u)
  39246. #define CSL_CPINTC_VECTOR_ADDRESS_REG_521_RESETVAL (0x00000000u)
  39247. /* vector_address_reg_522 */
  39248. #define CSL_CPINTC_VECTOR_ADDRESS_REG_522_VECTOR_ADDRESS_522_MASK (0xFFFFFFFFu)
  39249. #define CSL_CPINTC_VECTOR_ADDRESS_REG_522_VECTOR_ADDRESS_522_SHIFT (0x00000000u)
  39250. #define CSL_CPINTC_VECTOR_ADDRESS_REG_522_VECTOR_ADDRESS_522_RESETVAL (0x00000000u)
  39251. #define CSL_CPINTC_VECTOR_ADDRESS_REG_522_RESETVAL (0x00000000u)
  39252. /* vector_address_reg_523 */
  39253. #define CSL_CPINTC_VECTOR_ADDRESS_REG_523_VECTOR_ADDRESS_523_MASK (0xFFFFFFFFu)
  39254. #define CSL_CPINTC_VECTOR_ADDRESS_REG_523_VECTOR_ADDRESS_523_SHIFT (0x00000000u)
  39255. #define CSL_CPINTC_VECTOR_ADDRESS_REG_523_VECTOR_ADDRESS_523_RESETVAL (0x00000000u)
  39256. #define CSL_CPINTC_VECTOR_ADDRESS_REG_523_RESETVAL (0x00000000u)
  39257. /* vector_address_reg_524 */
  39258. #define CSL_CPINTC_VECTOR_ADDRESS_REG_524_VECTOR_ADDRESS_524_MASK (0xFFFFFFFFu)
  39259. #define CSL_CPINTC_VECTOR_ADDRESS_REG_524_VECTOR_ADDRESS_524_SHIFT (0x00000000u)
  39260. #define CSL_CPINTC_VECTOR_ADDRESS_REG_524_VECTOR_ADDRESS_524_RESETVAL (0x00000000u)
  39261. #define CSL_CPINTC_VECTOR_ADDRESS_REG_524_RESETVAL (0x00000000u)
  39262. /* vector_address_reg_525 */
  39263. #define CSL_CPINTC_VECTOR_ADDRESS_REG_525_VECTOR_ADDRESS_525_MASK (0xFFFFFFFFu)
  39264. #define CSL_CPINTC_VECTOR_ADDRESS_REG_525_VECTOR_ADDRESS_525_SHIFT (0x00000000u)
  39265. #define CSL_CPINTC_VECTOR_ADDRESS_REG_525_VECTOR_ADDRESS_525_RESETVAL (0x00000000u)
  39266. #define CSL_CPINTC_VECTOR_ADDRESS_REG_525_RESETVAL (0x00000000u)
  39267. /* vector_address_reg_526 */
  39268. #define CSL_CPINTC_VECTOR_ADDRESS_REG_526_VECTOR_ADDRESS_526_MASK (0xFFFFFFFFu)
  39269. #define CSL_CPINTC_VECTOR_ADDRESS_REG_526_VECTOR_ADDRESS_526_SHIFT (0x00000000u)
  39270. #define CSL_CPINTC_VECTOR_ADDRESS_REG_526_VECTOR_ADDRESS_526_RESETVAL (0x00000000u)
  39271. #define CSL_CPINTC_VECTOR_ADDRESS_REG_526_RESETVAL (0x00000000u)
  39272. /* vector_address_reg_527 */
  39273. #define CSL_CPINTC_VECTOR_ADDRESS_REG_527_VECTOR_ADDRESS_527_MASK (0xFFFFFFFFu)
  39274. #define CSL_CPINTC_VECTOR_ADDRESS_REG_527_VECTOR_ADDRESS_527_SHIFT (0x00000000u)
  39275. #define CSL_CPINTC_VECTOR_ADDRESS_REG_527_VECTOR_ADDRESS_527_RESETVAL (0x00000000u)
  39276. #define CSL_CPINTC_VECTOR_ADDRESS_REG_527_RESETVAL (0x00000000u)
  39277. /* vector_address_reg_528 */
  39278. #define CSL_CPINTC_VECTOR_ADDRESS_REG_528_VECTOR_ADDRESS_528_MASK (0xFFFFFFFFu)
  39279. #define CSL_CPINTC_VECTOR_ADDRESS_REG_528_VECTOR_ADDRESS_528_SHIFT (0x00000000u)
  39280. #define CSL_CPINTC_VECTOR_ADDRESS_REG_528_VECTOR_ADDRESS_528_RESETVAL (0x00000000u)
  39281. #define CSL_CPINTC_VECTOR_ADDRESS_REG_528_RESETVAL (0x00000000u)
  39282. /* vector_address_reg_529 */
  39283. #define CSL_CPINTC_VECTOR_ADDRESS_REG_529_VECTOR_ADDRESS_529_MASK (0xFFFFFFFFu)
  39284. #define CSL_CPINTC_VECTOR_ADDRESS_REG_529_VECTOR_ADDRESS_529_SHIFT (0x00000000u)
  39285. #define CSL_CPINTC_VECTOR_ADDRESS_REG_529_VECTOR_ADDRESS_529_RESETVAL (0x00000000u)
  39286. #define CSL_CPINTC_VECTOR_ADDRESS_REG_529_RESETVAL (0x00000000u)
  39287. /* vector_address_reg_530 */
  39288. #define CSL_CPINTC_VECTOR_ADDRESS_REG_530_VECTOR_ADDRESS_530_MASK (0xFFFFFFFFu)
  39289. #define CSL_CPINTC_VECTOR_ADDRESS_REG_530_VECTOR_ADDRESS_530_SHIFT (0x00000000u)
  39290. #define CSL_CPINTC_VECTOR_ADDRESS_REG_530_VECTOR_ADDRESS_530_RESETVAL (0x00000000u)
  39291. #define CSL_CPINTC_VECTOR_ADDRESS_REG_530_RESETVAL (0x00000000u)
  39292. /* vector_address_reg_531 */
  39293. #define CSL_CPINTC_VECTOR_ADDRESS_REG_531_VECTOR_ADDRESS_531_MASK (0xFFFFFFFFu)
  39294. #define CSL_CPINTC_VECTOR_ADDRESS_REG_531_VECTOR_ADDRESS_531_SHIFT (0x00000000u)
  39295. #define CSL_CPINTC_VECTOR_ADDRESS_REG_531_VECTOR_ADDRESS_531_RESETVAL (0x00000000u)
  39296. #define CSL_CPINTC_VECTOR_ADDRESS_REG_531_RESETVAL (0x00000000u)
  39297. /* vector_address_reg_532 */
  39298. #define CSL_CPINTC_VECTOR_ADDRESS_REG_532_VECTOR_ADDRESS_532_MASK (0xFFFFFFFFu)
  39299. #define CSL_CPINTC_VECTOR_ADDRESS_REG_532_VECTOR_ADDRESS_532_SHIFT (0x00000000u)
  39300. #define CSL_CPINTC_VECTOR_ADDRESS_REG_532_VECTOR_ADDRESS_532_RESETVAL (0x00000000u)
  39301. #define CSL_CPINTC_VECTOR_ADDRESS_REG_532_RESETVAL (0x00000000u)
  39302. /* vector_address_reg_533 */
  39303. #define CSL_CPINTC_VECTOR_ADDRESS_REG_533_VECTOR_ADDRESS_533_MASK (0xFFFFFFFFu)
  39304. #define CSL_CPINTC_VECTOR_ADDRESS_REG_533_VECTOR_ADDRESS_533_SHIFT (0x00000000u)
  39305. #define CSL_CPINTC_VECTOR_ADDRESS_REG_533_VECTOR_ADDRESS_533_RESETVAL (0x00000000u)
  39306. #define CSL_CPINTC_VECTOR_ADDRESS_REG_533_RESETVAL (0x00000000u)
  39307. /* vector_address_reg_534 */
  39308. #define CSL_CPINTC_VECTOR_ADDRESS_REG_534_VECTOR_ADDRESS_534_MASK (0xFFFFFFFFu)
  39309. #define CSL_CPINTC_VECTOR_ADDRESS_REG_534_VECTOR_ADDRESS_534_SHIFT (0x00000000u)
  39310. #define CSL_CPINTC_VECTOR_ADDRESS_REG_534_VECTOR_ADDRESS_534_RESETVAL (0x00000000u)
  39311. #define CSL_CPINTC_VECTOR_ADDRESS_REG_534_RESETVAL (0x00000000u)
  39312. /* vector_address_reg_535 */
  39313. #define CSL_CPINTC_VECTOR_ADDRESS_REG_535_VECTOR_ADDRESS_535_MASK (0xFFFFFFFFu)
  39314. #define CSL_CPINTC_VECTOR_ADDRESS_REG_535_VECTOR_ADDRESS_535_SHIFT (0x00000000u)
  39315. #define CSL_CPINTC_VECTOR_ADDRESS_REG_535_VECTOR_ADDRESS_535_RESETVAL (0x00000000u)
  39316. #define CSL_CPINTC_VECTOR_ADDRESS_REG_535_RESETVAL (0x00000000u)
  39317. /* vector_address_reg_536 */
  39318. #define CSL_CPINTC_VECTOR_ADDRESS_REG_536_VECTOR_ADDRESS_536_MASK (0xFFFFFFFFu)
  39319. #define CSL_CPINTC_VECTOR_ADDRESS_REG_536_VECTOR_ADDRESS_536_SHIFT (0x00000000u)
  39320. #define CSL_CPINTC_VECTOR_ADDRESS_REG_536_VECTOR_ADDRESS_536_RESETVAL (0x00000000u)
  39321. #define CSL_CPINTC_VECTOR_ADDRESS_REG_536_RESETVAL (0x00000000u)
  39322. /* vector_address_reg_537 */
  39323. #define CSL_CPINTC_VECTOR_ADDRESS_REG_537_VECTOR_ADDRESS_537_MASK (0xFFFFFFFFu)
  39324. #define CSL_CPINTC_VECTOR_ADDRESS_REG_537_VECTOR_ADDRESS_537_SHIFT (0x00000000u)
  39325. #define CSL_CPINTC_VECTOR_ADDRESS_REG_537_VECTOR_ADDRESS_537_RESETVAL (0x00000000u)
  39326. #define CSL_CPINTC_VECTOR_ADDRESS_REG_537_RESETVAL (0x00000000u)
  39327. /* vector_address_reg_538 */
  39328. #define CSL_CPINTC_VECTOR_ADDRESS_REG_538_VECTOR_ADDRESS_538_MASK (0xFFFFFFFFu)
  39329. #define CSL_CPINTC_VECTOR_ADDRESS_REG_538_VECTOR_ADDRESS_538_SHIFT (0x00000000u)
  39330. #define CSL_CPINTC_VECTOR_ADDRESS_REG_538_VECTOR_ADDRESS_538_RESETVAL (0x00000000u)
  39331. #define CSL_CPINTC_VECTOR_ADDRESS_REG_538_RESETVAL (0x00000000u)
  39332. /* vector_address_reg_539 */
  39333. #define CSL_CPINTC_VECTOR_ADDRESS_REG_539_VECTOR_ADDRESS_539_MASK (0xFFFFFFFFu)
  39334. #define CSL_CPINTC_VECTOR_ADDRESS_REG_539_VECTOR_ADDRESS_539_SHIFT (0x00000000u)
  39335. #define CSL_CPINTC_VECTOR_ADDRESS_REG_539_VECTOR_ADDRESS_539_RESETVAL (0x00000000u)
  39336. #define CSL_CPINTC_VECTOR_ADDRESS_REG_539_RESETVAL (0x00000000u)
  39337. /* vector_address_reg_540 */
  39338. #define CSL_CPINTC_VECTOR_ADDRESS_REG_540_VECTOR_ADDRESS_540_MASK (0xFFFFFFFFu)
  39339. #define CSL_CPINTC_VECTOR_ADDRESS_REG_540_VECTOR_ADDRESS_540_SHIFT (0x00000000u)
  39340. #define CSL_CPINTC_VECTOR_ADDRESS_REG_540_VECTOR_ADDRESS_540_RESETVAL (0x00000000u)
  39341. #define CSL_CPINTC_VECTOR_ADDRESS_REG_540_RESETVAL (0x00000000u)
  39342. /* vector_address_reg_541 */
  39343. #define CSL_CPINTC_VECTOR_ADDRESS_REG_541_VECTOR_ADDRESS_541_MASK (0xFFFFFFFFu)
  39344. #define CSL_CPINTC_VECTOR_ADDRESS_REG_541_VECTOR_ADDRESS_541_SHIFT (0x00000000u)
  39345. #define CSL_CPINTC_VECTOR_ADDRESS_REG_541_VECTOR_ADDRESS_541_RESETVAL (0x00000000u)
  39346. #define CSL_CPINTC_VECTOR_ADDRESS_REG_541_RESETVAL (0x00000000u)
  39347. /* vector_address_reg_542 */
  39348. #define CSL_CPINTC_VECTOR_ADDRESS_REG_542_VECTOR_ADDRESS_542_MASK (0xFFFFFFFFu)
  39349. #define CSL_CPINTC_VECTOR_ADDRESS_REG_542_VECTOR_ADDRESS_542_SHIFT (0x00000000u)
  39350. #define CSL_CPINTC_VECTOR_ADDRESS_REG_542_VECTOR_ADDRESS_542_RESETVAL (0x00000000u)
  39351. #define CSL_CPINTC_VECTOR_ADDRESS_REG_542_RESETVAL (0x00000000u)
  39352. /* vector_address_reg_543 */
  39353. #define CSL_CPINTC_VECTOR_ADDRESS_REG_543_VECTOR_ADDRESS_543_MASK (0xFFFFFFFFu)
  39354. #define CSL_CPINTC_VECTOR_ADDRESS_REG_543_VECTOR_ADDRESS_543_SHIFT (0x00000000u)
  39355. #define CSL_CPINTC_VECTOR_ADDRESS_REG_543_VECTOR_ADDRESS_543_RESETVAL (0x00000000u)
  39356. #define CSL_CPINTC_VECTOR_ADDRESS_REG_543_RESETVAL (0x00000000u)
  39357. /* vector_address_reg_544 */
  39358. #define CSL_CPINTC_VECTOR_ADDRESS_REG_544_VECTOR_ADDRESS_544_MASK (0xFFFFFFFFu)
  39359. #define CSL_CPINTC_VECTOR_ADDRESS_REG_544_VECTOR_ADDRESS_544_SHIFT (0x00000000u)
  39360. #define CSL_CPINTC_VECTOR_ADDRESS_REG_544_VECTOR_ADDRESS_544_RESETVAL (0x00000000u)
  39361. #define CSL_CPINTC_VECTOR_ADDRESS_REG_544_RESETVAL (0x00000000u)
  39362. /* vector_address_reg_545 */
  39363. #define CSL_CPINTC_VECTOR_ADDRESS_REG_545_VECTOR_ADDRESS_545_MASK (0xFFFFFFFFu)
  39364. #define CSL_CPINTC_VECTOR_ADDRESS_REG_545_VECTOR_ADDRESS_545_SHIFT (0x00000000u)
  39365. #define CSL_CPINTC_VECTOR_ADDRESS_REG_545_VECTOR_ADDRESS_545_RESETVAL (0x00000000u)
  39366. #define CSL_CPINTC_VECTOR_ADDRESS_REG_545_RESETVAL (0x00000000u)
  39367. /* vector_address_reg_546 */
  39368. #define CSL_CPINTC_VECTOR_ADDRESS_REG_546_VECTOR_ADDRESS_546_MASK (0xFFFFFFFFu)
  39369. #define CSL_CPINTC_VECTOR_ADDRESS_REG_546_VECTOR_ADDRESS_546_SHIFT (0x00000000u)
  39370. #define CSL_CPINTC_VECTOR_ADDRESS_REG_546_VECTOR_ADDRESS_546_RESETVAL (0x00000000u)
  39371. #define CSL_CPINTC_VECTOR_ADDRESS_REG_546_RESETVAL (0x00000000u)
  39372. /* vector_address_reg_547 */
  39373. #define CSL_CPINTC_VECTOR_ADDRESS_REG_547_VECTOR_ADDRESS_547_MASK (0xFFFFFFFFu)
  39374. #define CSL_CPINTC_VECTOR_ADDRESS_REG_547_VECTOR_ADDRESS_547_SHIFT (0x00000000u)
  39375. #define CSL_CPINTC_VECTOR_ADDRESS_REG_547_VECTOR_ADDRESS_547_RESETVAL (0x00000000u)
  39376. #define CSL_CPINTC_VECTOR_ADDRESS_REG_547_RESETVAL (0x00000000u)
  39377. /* vector_address_reg_548 */
  39378. #define CSL_CPINTC_VECTOR_ADDRESS_REG_548_VECTOR_ADDRESS_548_MASK (0xFFFFFFFFu)
  39379. #define CSL_CPINTC_VECTOR_ADDRESS_REG_548_VECTOR_ADDRESS_548_SHIFT (0x00000000u)
  39380. #define CSL_CPINTC_VECTOR_ADDRESS_REG_548_VECTOR_ADDRESS_548_RESETVAL (0x00000000u)
  39381. #define CSL_CPINTC_VECTOR_ADDRESS_REG_548_RESETVAL (0x00000000u)
  39382. /* vector_address_reg_549 */
  39383. #define CSL_CPINTC_VECTOR_ADDRESS_REG_549_VECTOR_ADDRESS_549_MASK (0xFFFFFFFFu)
  39384. #define CSL_CPINTC_VECTOR_ADDRESS_REG_549_VECTOR_ADDRESS_549_SHIFT (0x00000000u)
  39385. #define CSL_CPINTC_VECTOR_ADDRESS_REG_549_VECTOR_ADDRESS_549_RESETVAL (0x00000000u)
  39386. #define CSL_CPINTC_VECTOR_ADDRESS_REG_549_RESETVAL (0x00000000u)
  39387. /* vector_address_reg_550 */
  39388. #define CSL_CPINTC_VECTOR_ADDRESS_REG_550_VECTOR_ADDRESS_550_MASK (0xFFFFFFFFu)
  39389. #define CSL_CPINTC_VECTOR_ADDRESS_REG_550_VECTOR_ADDRESS_550_SHIFT (0x00000000u)
  39390. #define CSL_CPINTC_VECTOR_ADDRESS_REG_550_VECTOR_ADDRESS_550_RESETVAL (0x00000000u)
  39391. #define CSL_CPINTC_VECTOR_ADDRESS_REG_550_RESETVAL (0x00000000u)
  39392. /* vector_address_reg_551 */
  39393. #define CSL_CPINTC_VECTOR_ADDRESS_REG_551_VECTOR_ADDRESS_551_MASK (0xFFFFFFFFu)
  39394. #define CSL_CPINTC_VECTOR_ADDRESS_REG_551_VECTOR_ADDRESS_551_SHIFT (0x00000000u)
  39395. #define CSL_CPINTC_VECTOR_ADDRESS_REG_551_VECTOR_ADDRESS_551_RESETVAL (0x00000000u)
  39396. #define CSL_CPINTC_VECTOR_ADDRESS_REG_551_RESETVAL (0x00000000u)
  39397. /* vector_address_reg_552 */
  39398. #define CSL_CPINTC_VECTOR_ADDRESS_REG_552_VECTOR_ADDRESS_552_MASK (0xFFFFFFFFu)
  39399. #define CSL_CPINTC_VECTOR_ADDRESS_REG_552_VECTOR_ADDRESS_552_SHIFT (0x00000000u)
  39400. #define CSL_CPINTC_VECTOR_ADDRESS_REG_552_VECTOR_ADDRESS_552_RESETVAL (0x00000000u)
  39401. #define CSL_CPINTC_VECTOR_ADDRESS_REG_552_RESETVAL (0x00000000u)
  39402. /* vector_address_reg_553 */
  39403. #define CSL_CPINTC_VECTOR_ADDRESS_REG_553_VECTOR_ADDRESS_553_MASK (0xFFFFFFFFu)
  39404. #define CSL_CPINTC_VECTOR_ADDRESS_REG_553_VECTOR_ADDRESS_553_SHIFT (0x00000000u)
  39405. #define CSL_CPINTC_VECTOR_ADDRESS_REG_553_VECTOR_ADDRESS_553_RESETVAL (0x00000000u)
  39406. #define CSL_CPINTC_VECTOR_ADDRESS_REG_553_RESETVAL (0x00000000u)
  39407. /* vector_address_reg_554 */
  39408. #define CSL_CPINTC_VECTOR_ADDRESS_REG_554_VECTOR_ADDRESS_554_MASK (0xFFFFFFFFu)
  39409. #define CSL_CPINTC_VECTOR_ADDRESS_REG_554_VECTOR_ADDRESS_554_SHIFT (0x00000000u)
  39410. #define CSL_CPINTC_VECTOR_ADDRESS_REG_554_VECTOR_ADDRESS_554_RESETVAL (0x00000000u)
  39411. #define CSL_CPINTC_VECTOR_ADDRESS_REG_554_RESETVAL (0x00000000u)
  39412. /* vector_address_reg_555 */
  39413. #define CSL_CPINTC_VECTOR_ADDRESS_REG_555_VECTOR_ADDRESS_555_MASK (0xFFFFFFFFu)
  39414. #define CSL_CPINTC_VECTOR_ADDRESS_REG_555_VECTOR_ADDRESS_555_SHIFT (0x00000000u)
  39415. #define CSL_CPINTC_VECTOR_ADDRESS_REG_555_VECTOR_ADDRESS_555_RESETVAL (0x00000000u)
  39416. #define CSL_CPINTC_VECTOR_ADDRESS_REG_555_RESETVAL (0x00000000u)
  39417. /* vector_address_reg_556 */
  39418. #define CSL_CPINTC_VECTOR_ADDRESS_REG_556_VECTOR_ADDRESS_556_MASK (0xFFFFFFFFu)
  39419. #define CSL_CPINTC_VECTOR_ADDRESS_REG_556_VECTOR_ADDRESS_556_SHIFT (0x00000000u)
  39420. #define CSL_CPINTC_VECTOR_ADDRESS_REG_556_VECTOR_ADDRESS_556_RESETVAL (0x00000000u)
  39421. #define CSL_CPINTC_VECTOR_ADDRESS_REG_556_RESETVAL (0x00000000u)
  39422. /* vector_address_reg_557 */
  39423. #define CSL_CPINTC_VECTOR_ADDRESS_REG_557_VECTOR_ADDRESS_557_MASK (0xFFFFFFFFu)
  39424. #define CSL_CPINTC_VECTOR_ADDRESS_REG_557_VECTOR_ADDRESS_557_SHIFT (0x00000000u)
  39425. #define CSL_CPINTC_VECTOR_ADDRESS_REG_557_VECTOR_ADDRESS_557_RESETVAL (0x00000000u)
  39426. #define CSL_CPINTC_VECTOR_ADDRESS_REG_557_RESETVAL (0x00000000u)
  39427. /* vector_address_reg_558 */
  39428. #define CSL_CPINTC_VECTOR_ADDRESS_REG_558_VECTOR_ADDRESS_558_MASK (0xFFFFFFFFu)
  39429. #define CSL_CPINTC_VECTOR_ADDRESS_REG_558_VECTOR_ADDRESS_558_SHIFT (0x00000000u)
  39430. #define CSL_CPINTC_VECTOR_ADDRESS_REG_558_VECTOR_ADDRESS_558_RESETVAL (0x00000000u)
  39431. #define CSL_CPINTC_VECTOR_ADDRESS_REG_558_RESETVAL (0x00000000u)
  39432. /* vector_address_reg_559 */
  39433. #define CSL_CPINTC_VECTOR_ADDRESS_REG_559_VECTOR_ADDRESS_559_MASK (0xFFFFFFFFu)
  39434. #define CSL_CPINTC_VECTOR_ADDRESS_REG_559_VECTOR_ADDRESS_559_SHIFT (0x00000000u)
  39435. #define CSL_CPINTC_VECTOR_ADDRESS_REG_559_VECTOR_ADDRESS_559_RESETVAL (0x00000000u)
  39436. #define CSL_CPINTC_VECTOR_ADDRESS_REG_559_RESETVAL (0x00000000u)
  39437. /* vector_address_reg_560 */
  39438. #define CSL_CPINTC_VECTOR_ADDRESS_REG_560_VECTOR_ADDRESS_560_MASK (0xFFFFFFFFu)
  39439. #define CSL_CPINTC_VECTOR_ADDRESS_REG_560_VECTOR_ADDRESS_560_SHIFT (0x00000000u)
  39440. #define CSL_CPINTC_VECTOR_ADDRESS_REG_560_VECTOR_ADDRESS_560_RESETVAL (0x00000000u)
  39441. #define CSL_CPINTC_VECTOR_ADDRESS_REG_560_RESETVAL (0x00000000u)
  39442. /* vector_address_reg_561 */
  39443. #define CSL_CPINTC_VECTOR_ADDRESS_REG_561_VECTOR_ADDRESS_561_MASK (0xFFFFFFFFu)
  39444. #define CSL_CPINTC_VECTOR_ADDRESS_REG_561_VECTOR_ADDRESS_561_SHIFT (0x00000000u)
  39445. #define CSL_CPINTC_VECTOR_ADDRESS_REG_561_VECTOR_ADDRESS_561_RESETVAL (0x00000000u)
  39446. #define CSL_CPINTC_VECTOR_ADDRESS_REG_561_RESETVAL (0x00000000u)
  39447. /* vector_address_reg_562 */
  39448. #define CSL_CPINTC_VECTOR_ADDRESS_REG_562_VECTOR_ADDRESS_562_MASK (0xFFFFFFFFu)
  39449. #define CSL_CPINTC_VECTOR_ADDRESS_REG_562_VECTOR_ADDRESS_562_SHIFT (0x00000000u)
  39450. #define CSL_CPINTC_VECTOR_ADDRESS_REG_562_VECTOR_ADDRESS_562_RESETVAL (0x00000000u)
  39451. #define CSL_CPINTC_VECTOR_ADDRESS_REG_562_RESETVAL (0x00000000u)
  39452. /* vector_address_reg_563 */
  39453. #define CSL_CPINTC_VECTOR_ADDRESS_REG_563_VECTOR_ADDRESS_563_MASK (0xFFFFFFFFu)
  39454. #define CSL_CPINTC_VECTOR_ADDRESS_REG_563_VECTOR_ADDRESS_563_SHIFT (0x00000000u)
  39455. #define CSL_CPINTC_VECTOR_ADDRESS_REG_563_VECTOR_ADDRESS_563_RESETVAL (0x00000000u)
  39456. #define CSL_CPINTC_VECTOR_ADDRESS_REG_563_RESETVAL (0x00000000u)
  39457. /* vector_address_reg_564 */
  39458. #define CSL_CPINTC_VECTOR_ADDRESS_REG_564_VECTOR_ADDRESS_564_MASK (0xFFFFFFFFu)
  39459. #define CSL_CPINTC_VECTOR_ADDRESS_REG_564_VECTOR_ADDRESS_564_SHIFT (0x00000000u)
  39460. #define CSL_CPINTC_VECTOR_ADDRESS_REG_564_VECTOR_ADDRESS_564_RESETVAL (0x00000000u)
  39461. #define CSL_CPINTC_VECTOR_ADDRESS_REG_564_RESETVAL (0x00000000u)
  39462. /* vector_address_reg_565 */
  39463. #define CSL_CPINTC_VECTOR_ADDRESS_REG_565_VECTOR_ADDRESS_565_MASK (0xFFFFFFFFu)
  39464. #define CSL_CPINTC_VECTOR_ADDRESS_REG_565_VECTOR_ADDRESS_565_SHIFT (0x00000000u)
  39465. #define CSL_CPINTC_VECTOR_ADDRESS_REG_565_VECTOR_ADDRESS_565_RESETVAL (0x00000000u)
  39466. #define CSL_CPINTC_VECTOR_ADDRESS_REG_565_RESETVAL (0x00000000u)
  39467. /* vector_address_reg_566 */
  39468. #define CSL_CPINTC_VECTOR_ADDRESS_REG_566_VECTOR_ADDRESS_566_MASK (0xFFFFFFFFu)
  39469. #define CSL_CPINTC_VECTOR_ADDRESS_REG_566_VECTOR_ADDRESS_566_SHIFT (0x00000000u)
  39470. #define CSL_CPINTC_VECTOR_ADDRESS_REG_566_VECTOR_ADDRESS_566_RESETVAL (0x00000000u)
  39471. #define CSL_CPINTC_VECTOR_ADDRESS_REG_566_RESETVAL (0x00000000u)
  39472. /* vector_address_reg_567 */
  39473. #define CSL_CPINTC_VECTOR_ADDRESS_REG_567_VECTOR_ADDRESS_567_MASK (0xFFFFFFFFu)
  39474. #define CSL_CPINTC_VECTOR_ADDRESS_REG_567_VECTOR_ADDRESS_567_SHIFT (0x00000000u)
  39475. #define CSL_CPINTC_VECTOR_ADDRESS_REG_567_VECTOR_ADDRESS_567_RESETVAL (0x00000000u)
  39476. #define CSL_CPINTC_VECTOR_ADDRESS_REG_567_RESETVAL (0x00000000u)
  39477. /* vector_address_reg_568 */
  39478. #define CSL_CPINTC_VECTOR_ADDRESS_REG_568_VECTOR_ADDRESS_568_MASK (0xFFFFFFFFu)
  39479. #define CSL_CPINTC_VECTOR_ADDRESS_REG_568_VECTOR_ADDRESS_568_SHIFT (0x00000000u)
  39480. #define CSL_CPINTC_VECTOR_ADDRESS_REG_568_VECTOR_ADDRESS_568_RESETVAL (0x00000000u)
  39481. #define CSL_CPINTC_VECTOR_ADDRESS_REG_568_RESETVAL (0x00000000u)
  39482. /* vector_address_reg_569 */
  39483. #define CSL_CPINTC_VECTOR_ADDRESS_REG_569_VECTOR_ADDRESS_569_MASK (0xFFFFFFFFu)
  39484. #define CSL_CPINTC_VECTOR_ADDRESS_REG_569_VECTOR_ADDRESS_569_SHIFT (0x00000000u)
  39485. #define CSL_CPINTC_VECTOR_ADDRESS_REG_569_VECTOR_ADDRESS_569_RESETVAL (0x00000000u)
  39486. #define CSL_CPINTC_VECTOR_ADDRESS_REG_569_RESETVAL (0x00000000u)
  39487. /* vector_address_reg_570 */
  39488. #define CSL_CPINTC_VECTOR_ADDRESS_REG_570_VECTOR_ADDRESS_570_MASK (0xFFFFFFFFu)
  39489. #define CSL_CPINTC_VECTOR_ADDRESS_REG_570_VECTOR_ADDRESS_570_SHIFT (0x00000000u)
  39490. #define CSL_CPINTC_VECTOR_ADDRESS_REG_570_VECTOR_ADDRESS_570_RESETVAL (0x00000000u)
  39491. #define CSL_CPINTC_VECTOR_ADDRESS_REG_570_RESETVAL (0x00000000u)
  39492. /* vector_address_reg_571 */
  39493. #define CSL_CPINTC_VECTOR_ADDRESS_REG_571_VECTOR_ADDRESS_571_MASK (0xFFFFFFFFu)
  39494. #define CSL_CPINTC_VECTOR_ADDRESS_REG_571_VECTOR_ADDRESS_571_SHIFT (0x00000000u)
  39495. #define CSL_CPINTC_VECTOR_ADDRESS_REG_571_VECTOR_ADDRESS_571_RESETVAL (0x00000000u)
  39496. #define CSL_CPINTC_VECTOR_ADDRESS_REG_571_RESETVAL (0x00000000u)
  39497. /* vector_address_reg_572 */
  39498. #define CSL_CPINTC_VECTOR_ADDRESS_REG_572_VECTOR_ADDRESS_572_MASK (0xFFFFFFFFu)
  39499. #define CSL_CPINTC_VECTOR_ADDRESS_REG_572_VECTOR_ADDRESS_572_SHIFT (0x00000000u)
  39500. #define CSL_CPINTC_VECTOR_ADDRESS_REG_572_VECTOR_ADDRESS_572_RESETVAL (0x00000000u)
  39501. #define CSL_CPINTC_VECTOR_ADDRESS_REG_572_RESETVAL (0x00000000u)
  39502. /* vector_address_reg_573 */
  39503. #define CSL_CPINTC_VECTOR_ADDRESS_REG_573_VECTOR_ADDRESS_573_MASK (0xFFFFFFFFu)
  39504. #define CSL_CPINTC_VECTOR_ADDRESS_REG_573_VECTOR_ADDRESS_573_SHIFT (0x00000000u)
  39505. #define CSL_CPINTC_VECTOR_ADDRESS_REG_573_VECTOR_ADDRESS_573_RESETVAL (0x00000000u)
  39506. #define CSL_CPINTC_VECTOR_ADDRESS_REG_573_RESETVAL (0x00000000u)
  39507. /* vector_address_reg_574 */
  39508. #define CSL_CPINTC_VECTOR_ADDRESS_REG_574_VECTOR_ADDRESS_574_MASK (0xFFFFFFFFu)
  39509. #define CSL_CPINTC_VECTOR_ADDRESS_REG_574_VECTOR_ADDRESS_574_SHIFT (0x00000000u)
  39510. #define CSL_CPINTC_VECTOR_ADDRESS_REG_574_VECTOR_ADDRESS_574_RESETVAL (0x00000000u)
  39511. #define CSL_CPINTC_VECTOR_ADDRESS_REG_574_RESETVAL (0x00000000u)
  39512. /* vector_address_reg_575 */
  39513. #define CSL_CPINTC_VECTOR_ADDRESS_REG_575_VECTOR_ADDRESS_575_MASK (0xFFFFFFFFu)
  39514. #define CSL_CPINTC_VECTOR_ADDRESS_REG_575_VECTOR_ADDRESS_575_SHIFT (0x00000000u)
  39515. #define CSL_CPINTC_VECTOR_ADDRESS_REG_575_VECTOR_ADDRESS_575_RESETVAL (0x00000000u)
  39516. #define CSL_CPINTC_VECTOR_ADDRESS_REG_575_RESETVAL (0x00000000u)
  39517. /* vector_address_reg_576 */
  39518. #define CSL_CPINTC_VECTOR_ADDRESS_REG_576_VECTOR_ADDRESS_576_MASK (0xFFFFFFFFu)
  39519. #define CSL_CPINTC_VECTOR_ADDRESS_REG_576_VECTOR_ADDRESS_576_SHIFT (0x00000000u)
  39520. #define CSL_CPINTC_VECTOR_ADDRESS_REG_576_VECTOR_ADDRESS_576_RESETVAL (0x00000000u)
  39521. #define CSL_CPINTC_VECTOR_ADDRESS_REG_576_RESETVAL (0x00000000u)
  39522. /* vector_address_reg_577 */
  39523. #define CSL_CPINTC_VECTOR_ADDRESS_REG_577_VECTOR_ADDRESS_577_MASK (0xFFFFFFFFu)
  39524. #define CSL_CPINTC_VECTOR_ADDRESS_REG_577_VECTOR_ADDRESS_577_SHIFT (0x00000000u)
  39525. #define CSL_CPINTC_VECTOR_ADDRESS_REG_577_VECTOR_ADDRESS_577_RESETVAL (0x00000000u)
  39526. #define CSL_CPINTC_VECTOR_ADDRESS_REG_577_RESETVAL (0x00000000u)
  39527. /* vector_address_reg_578 */
  39528. #define CSL_CPINTC_VECTOR_ADDRESS_REG_578_VECTOR_ADDRESS_578_MASK (0xFFFFFFFFu)
  39529. #define CSL_CPINTC_VECTOR_ADDRESS_REG_578_VECTOR_ADDRESS_578_SHIFT (0x00000000u)
  39530. #define CSL_CPINTC_VECTOR_ADDRESS_REG_578_VECTOR_ADDRESS_578_RESETVAL (0x00000000u)
  39531. #define CSL_CPINTC_VECTOR_ADDRESS_REG_578_RESETVAL (0x00000000u)
  39532. /* vector_address_reg_579 */
  39533. #define CSL_CPINTC_VECTOR_ADDRESS_REG_579_VECTOR_ADDRESS_579_MASK (0xFFFFFFFFu)
  39534. #define CSL_CPINTC_VECTOR_ADDRESS_REG_579_VECTOR_ADDRESS_579_SHIFT (0x00000000u)
  39535. #define CSL_CPINTC_VECTOR_ADDRESS_REG_579_VECTOR_ADDRESS_579_RESETVAL (0x00000000u)
  39536. #define CSL_CPINTC_VECTOR_ADDRESS_REG_579_RESETVAL (0x00000000u)
  39537. /* vector_address_reg_580 */
  39538. #define CSL_CPINTC_VECTOR_ADDRESS_REG_580_VECTOR_ADDRESS_580_MASK (0xFFFFFFFFu)
  39539. #define CSL_CPINTC_VECTOR_ADDRESS_REG_580_VECTOR_ADDRESS_580_SHIFT (0x00000000u)
  39540. #define CSL_CPINTC_VECTOR_ADDRESS_REG_580_VECTOR_ADDRESS_580_RESETVAL (0x00000000u)
  39541. #define CSL_CPINTC_VECTOR_ADDRESS_REG_580_RESETVAL (0x00000000u)
  39542. /* vector_address_reg_581 */
  39543. #define CSL_CPINTC_VECTOR_ADDRESS_REG_581_VECTOR_ADDRESS_581_MASK (0xFFFFFFFFu)
  39544. #define CSL_CPINTC_VECTOR_ADDRESS_REG_581_VECTOR_ADDRESS_581_SHIFT (0x00000000u)
  39545. #define CSL_CPINTC_VECTOR_ADDRESS_REG_581_VECTOR_ADDRESS_581_RESETVAL (0x00000000u)
  39546. #define CSL_CPINTC_VECTOR_ADDRESS_REG_581_RESETVAL (0x00000000u)
  39547. /* vector_address_reg_582 */
  39548. #define CSL_CPINTC_VECTOR_ADDRESS_REG_582_VECTOR_ADDRESS_582_MASK (0xFFFFFFFFu)
  39549. #define CSL_CPINTC_VECTOR_ADDRESS_REG_582_VECTOR_ADDRESS_582_SHIFT (0x00000000u)
  39550. #define CSL_CPINTC_VECTOR_ADDRESS_REG_582_VECTOR_ADDRESS_582_RESETVAL (0x00000000u)
  39551. #define CSL_CPINTC_VECTOR_ADDRESS_REG_582_RESETVAL (0x00000000u)
  39552. /* vector_address_reg_583 */
  39553. #define CSL_CPINTC_VECTOR_ADDRESS_REG_583_VECTOR_ADDRESS_583_MASK (0xFFFFFFFFu)
  39554. #define CSL_CPINTC_VECTOR_ADDRESS_REG_583_VECTOR_ADDRESS_583_SHIFT (0x00000000u)
  39555. #define CSL_CPINTC_VECTOR_ADDRESS_REG_583_VECTOR_ADDRESS_583_RESETVAL (0x00000000u)
  39556. #define CSL_CPINTC_VECTOR_ADDRESS_REG_583_RESETVAL (0x00000000u)
  39557. /* vector_address_reg_584 */
  39558. #define CSL_CPINTC_VECTOR_ADDRESS_REG_584_VECTOR_ADDRESS_584_MASK (0xFFFFFFFFu)
  39559. #define CSL_CPINTC_VECTOR_ADDRESS_REG_584_VECTOR_ADDRESS_584_SHIFT (0x00000000u)
  39560. #define CSL_CPINTC_VECTOR_ADDRESS_REG_584_VECTOR_ADDRESS_584_RESETVAL (0x00000000u)
  39561. #define CSL_CPINTC_VECTOR_ADDRESS_REG_584_RESETVAL (0x00000000u)
  39562. /* vector_address_reg_585 */
  39563. #define CSL_CPINTC_VECTOR_ADDRESS_REG_585_VECTOR_ADDRESS_585_MASK (0xFFFFFFFFu)
  39564. #define CSL_CPINTC_VECTOR_ADDRESS_REG_585_VECTOR_ADDRESS_585_SHIFT (0x00000000u)
  39565. #define CSL_CPINTC_VECTOR_ADDRESS_REG_585_VECTOR_ADDRESS_585_RESETVAL (0x00000000u)
  39566. #define CSL_CPINTC_VECTOR_ADDRESS_REG_585_RESETVAL (0x00000000u)
  39567. /* vector_address_reg_586 */
  39568. #define CSL_CPINTC_VECTOR_ADDRESS_REG_586_VECTOR_ADDRESS_586_MASK (0xFFFFFFFFu)
  39569. #define CSL_CPINTC_VECTOR_ADDRESS_REG_586_VECTOR_ADDRESS_586_SHIFT (0x00000000u)
  39570. #define CSL_CPINTC_VECTOR_ADDRESS_REG_586_VECTOR_ADDRESS_586_RESETVAL (0x00000000u)
  39571. #define CSL_CPINTC_VECTOR_ADDRESS_REG_586_RESETVAL (0x00000000u)
  39572. /* vector_address_reg_587 */
  39573. #define CSL_CPINTC_VECTOR_ADDRESS_REG_587_VECTOR_ADDRESS_587_MASK (0xFFFFFFFFu)
  39574. #define CSL_CPINTC_VECTOR_ADDRESS_REG_587_VECTOR_ADDRESS_587_SHIFT (0x00000000u)
  39575. #define CSL_CPINTC_VECTOR_ADDRESS_REG_587_VECTOR_ADDRESS_587_RESETVAL (0x00000000u)
  39576. #define CSL_CPINTC_VECTOR_ADDRESS_REG_587_RESETVAL (0x00000000u)
  39577. /* vector_address_reg_588 */
  39578. #define CSL_CPINTC_VECTOR_ADDRESS_REG_588_VECTOR_ADDRESS_588_MASK (0xFFFFFFFFu)
  39579. #define CSL_CPINTC_VECTOR_ADDRESS_REG_588_VECTOR_ADDRESS_588_SHIFT (0x00000000u)
  39580. #define CSL_CPINTC_VECTOR_ADDRESS_REG_588_VECTOR_ADDRESS_588_RESETVAL (0x00000000u)
  39581. #define CSL_CPINTC_VECTOR_ADDRESS_REG_588_RESETVAL (0x00000000u)
  39582. /* vector_address_reg_589 */
  39583. #define CSL_CPINTC_VECTOR_ADDRESS_REG_589_VECTOR_ADDRESS_589_MASK (0xFFFFFFFFu)
  39584. #define CSL_CPINTC_VECTOR_ADDRESS_REG_589_VECTOR_ADDRESS_589_SHIFT (0x00000000u)
  39585. #define CSL_CPINTC_VECTOR_ADDRESS_REG_589_VECTOR_ADDRESS_589_RESETVAL (0x00000000u)
  39586. #define CSL_CPINTC_VECTOR_ADDRESS_REG_589_RESETVAL (0x00000000u)
  39587. /* vector_address_reg_590 */
  39588. #define CSL_CPINTC_VECTOR_ADDRESS_REG_590_VECTOR_ADDRESS_590_MASK (0xFFFFFFFFu)
  39589. #define CSL_CPINTC_VECTOR_ADDRESS_REG_590_VECTOR_ADDRESS_590_SHIFT (0x00000000u)
  39590. #define CSL_CPINTC_VECTOR_ADDRESS_REG_590_VECTOR_ADDRESS_590_RESETVAL (0x00000000u)
  39591. #define CSL_CPINTC_VECTOR_ADDRESS_REG_590_RESETVAL (0x00000000u)
  39592. /* vector_address_reg_591 */
  39593. #define CSL_CPINTC_VECTOR_ADDRESS_REG_591_VECTOR_ADDRESS_591_MASK (0xFFFFFFFFu)
  39594. #define CSL_CPINTC_VECTOR_ADDRESS_REG_591_VECTOR_ADDRESS_591_SHIFT (0x00000000u)
  39595. #define CSL_CPINTC_VECTOR_ADDRESS_REG_591_VECTOR_ADDRESS_591_RESETVAL (0x00000000u)
  39596. #define CSL_CPINTC_VECTOR_ADDRESS_REG_591_RESETVAL (0x00000000u)
  39597. /* vector_address_reg_592 */
  39598. #define CSL_CPINTC_VECTOR_ADDRESS_REG_592_VECTOR_ADDRESS_592_MASK (0xFFFFFFFFu)
  39599. #define CSL_CPINTC_VECTOR_ADDRESS_REG_592_VECTOR_ADDRESS_592_SHIFT (0x00000000u)
  39600. #define CSL_CPINTC_VECTOR_ADDRESS_REG_592_VECTOR_ADDRESS_592_RESETVAL (0x00000000u)
  39601. #define CSL_CPINTC_VECTOR_ADDRESS_REG_592_RESETVAL (0x00000000u)
  39602. /* vector_address_reg_593 */
  39603. #define CSL_CPINTC_VECTOR_ADDRESS_REG_593_VECTOR_ADDRESS_593_MASK (0xFFFFFFFFu)
  39604. #define CSL_CPINTC_VECTOR_ADDRESS_REG_593_VECTOR_ADDRESS_593_SHIFT (0x00000000u)
  39605. #define CSL_CPINTC_VECTOR_ADDRESS_REG_593_VECTOR_ADDRESS_593_RESETVAL (0x00000000u)
  39606. #define CSL_CPINTC_VECTOR_ADDRESS_REG_593_RESETVAL (0x00000000u)
  39607. /* vector_address_reg_594 */
  39608. #define CSL_CPINTC_VECTOR_ADDRESS_REG_594_VECTOR_ADDRESS_594_MASK (0xFFFFFFFFu)
  39609. #define CSL_CPINTC_VECTOR_ADDRESS_REG_594_VECTOR_ADDRESS_594_SHIFT (0x00000000u)
  39610. #define CSL_CPINTC_VECTOR_ADDRESS_REG_594_VECTOR_ADDRESS_594_RESETVAL (0x00000000u)
  39611. #define CSL_CPINTC_VECTOR_ADDRESS_REG_594_RESETVAL (0x00000000u)
  39612. /* vector_address_reg_595 */
  39613. #define CSL_CPINTC_VECTOR_ADDRESS_REG_595_VECTOR_ADDRESS_595_MASK (0xFFFFFFFFu)
  39614. #define CSL_CPINTC_VECTOR_ADDRESS_REG_595_VECTOR_ADDRESS_595_SHIFT (0x00000000u)
  39615. #define CSL_CPINTC_VECTOR_ADDRESS_REG_595_VECTOR_ADDRESS_595_RESETVAL (0x00000000u)
  39616. #define CSL_CPINTC_VECTOR_ADDRESS_REG_595_RESETVAL (0x00000000u)
  39617. /* vector_address_reg_596 */
  39618. #define CSL_CPINTC_VECTOR_ADDRESS_REG_596_VECTOR_ADDRESS_596_MASK (0xFFFFFFFFu)
  39619. #define CSL_CPINTC_VECTOR_ADDRESS_REG_596_VECTOR_ADDRESS_596_SHIFT (0x00000000u)
  39620. #define CSL_CPINTC_VECTOR_ADDRESS_REG_596_VECTOR_ADDRESS_596_RESETVAL (0x00000000u)
  39621. #define CSL_CPINTC_VECTOR_ADDRESS_REG_596_RESETVAL (0x00000000u)
  39622. /* vector_address_reg_597 */
  39623. #define CSL_CPINTC_VECTOR_ADDRESS_REG_597_VECTOR_ADDRESS_597_MASK (0xFFFFFFFFu)
  39624. #define CSL_CPINTC_VECTOR_ADDRESS_REG_597_VECTOR_ADDRESS_597_SHIFT (0x00000000u)
  39625. #define CSL_CPINTC_VECTOR_ADDRESS_REG_597_VECTOR_ADDRESS_597_RESETVAL (0x00000000u)
  39626. #define CSL_CPINTC_VECTOR_ADDRESS_REG_597_RESETVAL (0x00000000u)
  39627. /* vector_address_reg_598 */
  39628. #define CSL_CPINTC_VECTOR_ADDRESS_REG_598_VECTOR_ADDRESS_598_MASK (0xFFFFFFFFu)
  39629. #define CSL_CPINTC_VECTOR_ADDRESS_REG_598_VECTOR_ADDRESS_598_SHIFT (0x00000000u)
  39630. #define CSL_CPINTC_VECTOR_ADDRESS_REG_598_VECTOR_ADDRESS_598_RESETVAL (0x00000000u)
  39631. #define CSL_CPINTC_VECTOR_ADDRESS_REG_598_RESETVAL (0x00000000u)
  39632. /* vector_address_reg_599 */
  39633. #define CSL_CPINTC_VECTOR_ADDRESS_REG_599_VECTOR_ADDRESS_599_MASK (0xFFFFFFFFu)
  39634. #define CSL_CPINTC_VECTOR_ADDRESS_REG_599_VECTOR_ADDRESS_599_SHIFT (0x00000000u)
  39635. #define CSL_CPINTC_VECTOR_ADDRESS_REG_599_VECTOR_ADDRESS_599_RESETVAL (0x00000000u)
  39636. #define CSL_CPINTC_VECTOR_ADDRESS_REG_599_RESETVAL (0x00000000u)
  39637. /* vector_address_reg_600 */
  39638. #define CSL_CPINTC_VECTOR_ADDRESS_REG_600_VECTOR_ADDRESS_600_MASK (0xFFFFFFFFu)
  39639. #define CSL_CPINTC_VECTOR_ADDRESS_REG_600_VECTOR_ADDRESS_600_SHIFT (0x00000000u)
  39640. #define CSL_CPINTC_VECTOR_ADDRESS_REG_600_VECTOR_ADDRESS_600_RESETVAL (0x00000000u)
  39641. #define CSL_CPINTC_VECTOR_ADDRESS_REG_600_RESETVAL (0x00000000u)
  39642. /* vector_address_reg_601 */
  39643. #define CSL_CPINTC_VECTOR_ADDRESS_REG_601_VECTOR_ADDRESS_601_MASK (0xFFFFFFFFu)
  39644. #define CSL_CPINTC_VECTOR_ADDRESS_REG_601_VECTOR_ADDRESS_601_SHIFT (0x00000000u)
  39645. #define CSL_CPINTC_VECTOR_ADDRESS_REG_601_VECTOR_ADDRESS_601_RESETVAL (0x00000000u)
  39646. #define CSL_CPINTC_VECTOR_ADDRESS_REG_601_RESETVAL (0x00000000u)
  39647. /* vector_address_reg_602 */
  39648. #define CSL_CPINTC_VECTOR_ADDRESS_REG_602_VECTOR_ADDRESS_602_MASK (0xFFFFFFFFu)
  39649. #define CSL_CPINTC_VECTOR_ADDRESS_REG_602_VECTOR_ADDRESS_602_SHIFT (0x00000000u)
  39650. #define CSL_CPINTC_VECTOR_ADDRESS_REG_602_VECTOR_ADDRESS_602_RESETVAL (0x00000000u)
  39651. #define CSL_CPINTC_VECTOR_ADDRESS_REG_602_RESETVAL (0x00000000u)
  39652. /* vector_address_reg_603 */
  39653. #define CSL_CPINTC_VECTOR_ADDRESS_REG_603_VECTOR_ADDRESS_603_MASK (0xFFFFFFFFu)
  39654. #define CSL_CPINTC_VECTOR_ADDRESS_REG_603_VECTOR_ADDRESS_603_SHIFT (0x00000000u)
  39655. #define CSL_CPINTC_VECTOR_ADDRESS_REG_603_VECTOR_ADDRESS_603_RESETVAL (0x00000000u)
  39656. #define CSL_CPINTC_VECTOR_ADDRESS_REG_603_RESETVAL (0x00000000u)
  39657. /* vector_address_reg_604 */
  39658. #define CSL_CPINTC_VECTOR_ADDRESS_REG_604_VECTOR_ADDRESS_604_MASK (0xFFFFFFFFu)
  39659. #define CSL_CPINTC_VECTOR_ADDRESS_REG_604_VECTOR_ADDRESS_604_SHIFT (0x00000000u)
  39660. #define CSL_CPINTC_VECTOR_ADDRESS_REG_604_VECTOR_ADDRESS_604_RESETVAL (0x00000000u)
  39661. #define CSL_CPINTC_VECTOR_ADDRESS_REG_604_RESETVAL (0x00000000u)
  39662. /* vector_address_reg_605 */
  39663. #define CSL_CPINTC_VECTOR_ADDRESS_REG_605_VECTOR_ADDRESS_605_MASK (0xFFFFFFFFu)
  39664. #define CSL_CPINTC_VECTOR_ADDRESS_REG_605_VECTOR_ADDRESS_605_SHIFT (0x00000000u)
  39665. #define CSL_CPINTC_VECTOR_ADDRESS_REG_605_VECTOR_ADDRESS_605_RESETVAL (0x00000000u)
  39666. #define CSL_CPINTC_VECTOR_ADDRESS_REG_605_RESETVAL (0x00000000u)
  39667. /* vector_address_reg_606 */
  39668. #define CSL_CPINTC_VECTOR_ADDRESS_REG_606_VECTOR_ADDRESS_606_MASK (0xFFFFFFFFu)
  39669. #define CSL_CPINTC_VECTOR_ADDRESS_REG_606_VECTOR_ADDRESS_606_SHIFT (0x00000000u)
  39670. #define CSL_CPINTC_VECTOR_ADDRESS_REG_606_VECTOR_ADDRESS_606_RESETVAL (0x00000000u)
  39671. #define CSL_CPINTC_VECTOR_ADDRESS_REG_606_RESETVAL (0x00000000u)
  39672. /* vector_address_reg_607 */
  39673. #define CSL_CPINTC_VECTOR_ADDRESS_REG_607_VECTOR_ADDRESS_607_MASK (0xFFFFFFFFu)
  39674. #define CSL_CPINTC_VECTOR_ADDRESS_REG_607_VECTOR_ADDRESS_607_SHIFT (0x00000000u)
  39675. #define CSL_CPINTC_VECTOR_ADDRESS_REG_607_VECTOR_ADDRESS_607_RESETVAL (0x00000000u)
  39676. #define CSL_CPINTC_VECTOR_ADDRESS_REG_607_RESETVAL (0x00000000u)
  39677. /* vector_address_reg_608 */
  39678. #define CSL_CPINTC_VECTOR_ADDRESS_REG_608_VECTOR_ADDRESS_608_MASK (0xFFFFFFFFu)
  39679. #define CSL_CPINTC_VECTOR_ADDRESS_REG_608_VECTOR_ADDRESS_608_SHIFT (0x00000000u)
  39680. #define CSL_CPINTC_VECTOR_ADDRESS_REG_608_VECTOR_ADDRESS_608_RESETVAL (0x00000000u)
  39681. #define CSL_CPINTC_VECTOR_ADDRESS_REG_608_RESETVAL (0x00000000u)
  39682. /* vector_address_reg_609 */
  39683. #define CSL_CPINTC_VECTOR_ADDRESS_REG_609_VECTOR_ADDRESS_609_MASK (0xFFFFFFFFu)
  39684. #define CSL_CPINTC_VECTOR_ADDRESS_REG_609_VECTOR_ADDRESS_609_SHIFT (0x00000000u)
  39685. #define CSL_CPINTC_VECTOR_ADDRESS_REG_609_VECTOR_ADDRESS_609_RESETVAL (0x00000000u)
  39686. #define CSL_CPINTC_VECTOR_ADDRESS_REG_609_RESETVAL (0x00000000u)
  39687. /* vector_address_reg_610 */
  39688. #define CSL_CPINTC_VECTOR_ADDRESS_REG_610_VECTOR_ADDRESS_610_MASK (0xFFFFFFFFu)
  39689. #define CSL_CPINTC_VECTOR_ADDRESS_REG_610_VECTOR_ADDRESS_610_SHIFT (0x00000000u)
  39690. #define CSL_CPINTC_VECTOR_ADDRESS_REG_610_VECTOR_ADDRESS_610_RESETVAL (0x00000000u)
  39691. #define CSL_CPINTC_VECTOR_ADDRESS_REG_610_RESETVAL (0x00000000u)
  39692. /* vector_address_reg_611 */
  39693. #define CSL_CPINTC_VECTOR_ADDRESS_REG_611_VECTOR_ADDRESS_611_MASK (0xFFFFFFFFu)
  39694. #define CSL_CPINTC_VECTOR_ADDRESS_REG_611_VECTOR_ADDRESS_611_SHIFT (0x00000000u)
  39695. #define CSL_CPINTC_VECTOR_ADDRESS_REG_611_VECTOR_ADDRESS_611_RESETVAL (0x00000000u)
  39696. #define CSL_CPINTC_VECTOR_ADDRESS_REG_611_RESETVAL (0x00000000u)
  39697. /* vector_address_reg_612 */
  39698. #define CSL_CPINTC_VECTOR_ADDRESS_REG_612_VECTOR_ADDRESS_612_MASK (0xFFFFFFFFu)
  39699. #define CSL_CPINTC_VECTOR_ADDRESS_REG_612_VECTOR_ADDRESS_612_SHIFT (0x00000000u)
  39700. #define CSL_CPINTC_VECTOR_ADDRESS_REG_612_VECTOR_ADDRESS_612_RESETVAL (0x00000000u)
  39701. #define CSL_CPINTC_VECTOR_ADDRESS_REG_612_RESETVAL (0x00000000u)
  39702. /* vector_address_reg_613 */
  39703. #define CSL_CPINTC_VECTOR_ADDRESS_REG_613_VECTOR_ADDRESS_613_MASK (0xFFFFFFFFu)
  39704. #define CSL_CPINTC_VECTOR_ADDRESS_REG_613_VECTOR_ADDRESS_613_SHIFT (0x00000000u)
  39705. #define CSL_CPINTC_VECTOR_ADDRESS_REG_613_VECTOR_ADDRESS_613_RESETVAL (0x00000000u)
  39706. #define CSL_CPINTC_VECTOR_ADDRESS_REG_613_RESETVAL (0x00000000u)
  39707. /* vector_address_reg_614 */
  39708. #define CSL_CPINTC_VECTOR_ADDRESS_REG_614_VECTOR_ADDRESS_614_MASK (0xFFFFFFFFu)
  39709. #define CSL_CPINTC_VECTOR_ADDRESS_REG_614_VECTOR_ADDRESS_614_SHIFT (0x00000000u)
  39710. #define CSL_CPINTC_VECTOR_ADDRESS_REG_614_VECTOR_ADDRESS_614_RESETVAL (0x00000000u)
  39711. #define CSL_CPINTC_VECTOR_ADDRESS_REG_614_RESETVAL (0x00000000u)
  39712. /* vector_address_reg_615 */
  39713. #define CSL_CPINTC_VECTOR_ADDRESS_REG_615_VECTOR_ADDRESS_615_MASK (0xFFFFFFFFu)
  39714. #define CSL_CPINTC_VECTOR_ADDRESS_REG_615_VECTOR_ADDRESS_615_SHIFT (0x00000000u)
  39715. #define CSL_CPINTC_VECTOR_ADDRESS_REG_615_VECTOR_ADDRESS_615_RESETVAL (0x00000000u)
  39716. #define CSL_CPINTC_VECTOR_ADDRESS_REG_615_RESETVAL (0x00000000u)
  39717. /* vector_address_reg_616 */
  39718. #define CSL_CPINTC_VECTOR_ADDRESS_REG_616_VECTOR_ADDRESS_616_MASK (0xFFFFFFFFu)
  39719. #define CSL_CPINTC_VECTOR_ADDRESS_REG_616_VECTOR_ADDRESS_616_SHIFT (0x00000000u)
  39720. #define CSL_CPINTC_VECTOR_ADDRESS_REG_616_VECTOR_ADDRESS_616_RESETVAL (0x00000000u)
  39721. #define CSL_CPINTC_VECTOR_ADDRESS_REG_616_RESETVAL (0x00000000u)
  39722. /* vector_address_reg_617 */
  39723. #define CSL_CPINTC_VECTOR_ADDRESS_REG_617_VECTOR_ADDRESS_617_MASK (0xFFFFFFFFu)
  39724. #define CSL_CPINTC_VECTOR_ADDRESS_REG_617_VECTOR_ADDRESS_617_SHIFT (0x00000000u)
  39725. #define CSL_CPINTC_VECTOR_ADDRESS_REG_617_VECTOR_ADDRESS_617_RESETVAL (0x00000000u)
  39726. #define CSL_CPINTC_VECTOR_ADDRESS_REG_617_RESETVAL (0x00000000u)
  39727. /* vector_address_reg_618 */
  39728. #define CSL_CPINTC_VECTOR_ADDRESS_REG_618_VECTOR_ADDRESS_618_MASK (0xFFFFFFFFu)
  39729. #define CSL_CPINTC_VECTOR_ADDRESS_REG_618_VECTOR_ADDRESS_618_SHIFT (0x00000000u)
  39730. #define CSL_CPINTC_VECTOR_ADDRESS_REG_618_VECTOR_ADDRESS_618_RESETVAL (0x00000000u)
  39731. #define CSL_CPINTC_VECTOR_ADDRESS_REG_618_RESETVAL (0x00000000u)
  39732. /* vector_address_reg_619 */
  39733. #define CSL_CPINTC_VECTOR_ADDRESS_REG_619_VECTOR_ADDRESS_619_MASK (0xFFFFFFFFu)
  39734. #define CSL_CPINTC_VECTOR_ADDRESS_REG_619_VECTOR_ADDRESS_619_SHIFT (0x00000000u)
  39735. #define CSL_CPINTC_VECTOR_ADDRESS_REG_619_VECTOR_ADDRESS_619_RESETVAL (0x00000000u)
  39736. #define CSL_CPINTC_VECTOR_ADDRESS_REG_619_RESETVAL (0x00000000u)
  39737. /* vector_address_reg_620 */
  39738. #define CSL_CPINTC_VECTOR_ADDRESS_REG_620_VECTOR_ADDRESS_620_MASK (0xFFFFFFFFu)
  39739. #define CSL_CPINTC_VECTOR_ADDRESS_REG_620_VECTOR_ADDRESS_620_SHIFT (0x00000000u)
  39740. #define CSL_CPINTC_VECTOR_ADDRESS_REG_620_VECTOR_ADDRESS_620_RESETVAL (0x00000000u)
  39741. #define CSL_CPINTC_VECTOR_ADDRESS_REG_620_RESETVAL (0x00000000u)
  39742. /* vector_address_reg_621 */
  39743. #define CSL_CPINTC_VECTOR_ADDRESS_REG_621_VECTOR_ADDRESS_621_MASK (0xFFFFFFFFu)
  39744. #define CSL_CPINTC_VECTOR_ADDRESS_REG_621_VECTOR_ADDRESS_621_SHIFT (0x00000000u)
  39745. #define CSL_CPINTC_VECTOR_ADDRESS_REG_621_VECTOR_ADDRESS_621_RESETVAL (0x00000000u)
  39746. #define CSL_CPINTC_VECTOR_ADDRESS_REG_621_RESETVAL (0x00000000u)
  39747. /* vector_address_reg_622 */
  39748. #define CSL_CPINTC_VECTOR_ADDRESS_REG_622_VECTOR_ADDRESS_622_MASK (0xFFFFFFFFu)
  39749. #define CSL_CPINTC_VECTOR_ADDRESS_REG_622_VECTOR_ADDRESS_622_SHIFT (0x00000000u)
  39750. #define CSL_CPINTC_VECTOR_ADDRESS_REG_622_VECTOR_ADDRESS_622_RESETVAL (0x00000000u)
  39751. #define CSL_CPINTC_VECTOR_ADDRESS_REG_622_RESETVAL (0x00000000u)
  39752. /* vector_address_reg_623 */
  39753. #define CSL_CPINTC_VECTOR_ADDRESS_REG_623_VECTOR_ADDRESS_623_MASK (0xFFFFFFFFu)
  39754. #define CSL_CPINTC_VECTOR_ADDRESS_REG_623_VECTOR_ADDRESS_623_SHIFT (0x00000000u)
  39755. #define CSL_CPINTC_VECTOR_ADDRESS_REG_623_VECTOR_ADDRESS_623_RESETVAL (0x00000000u)
  39756. #define CSL_CPINTC_VECTOR_ADDRESS_REG_623_RESETVAL (0x00000000u)
  39757. /* vector_address_reg_624 */
  39758. #define CSL_CPINTC_VECTOR_ADDRESS_REG_624_VECTOR_ADDRESS_624_MASK (0xFFFFFFFFu)
  39759. #define CSL_CPINTC_VECTOR_ADDRESS_REG_624_VECTOR_ADDRESS_624_SHIFT (0x00000000u)
  39760. #define CSL_CPINTC_VECTOR_ADDRESS_REG_624_VECTOR_ADDRESS_624_RESETVAL (0x00000000u)
  39761. #define CSL_CPINTC_VECTOR_ADDRESS_REG_624_RESETVAL (0x00000000u)
  39762. /* vector_address_reg_625 */
  39763. #define CSL_CPINTC_VECTOR_ADDRESS_REG_625_VECTOR_ADDRESS_625_MASK (0xFFFFFFFFu)
  39764. #define CSL_CPINTC_VECTOR_ADDRESS_REG_625_VECTOR_ADDRESS_625_SHIFT (0x00000000u)
  39765. #define CSL_CPINTC_VECTOR_ADDRESS_REG_625_VECTOR_ADDRESS_625_RESETVAL (0x00000000u)
  39766. #define CSL_CPINTC_VECTOR_ADDRESS_REG_625_RESETVAL (0x00000000u)
  39767. /* vector_address_reg_626 */
  39768. #define CSL_CPINTC_VECTOR_ADDRESS_REG_626_VECTOR_ADDRESS_626_MASK (0xFFFFFFFFu)
  39769. #define CSL_CPINTC_VECTOR_ADDRESS_REG_626_VECTOR_ADDRESS_626_SHIFT (0x00000000u)
  39770. #define CSL_CPINTC_VECTOR_ADDRESS_REG_626_VECTOR_ADDRESS_626_RESETVAL (0x00000000u)
  39771. #define CSL_CPINTC_VECTOR_ADDRESS_REG_626_RESETVAL (0x00000000u)
  39772. /* vector_address_reg_627 */
  39773. #define CSL_CPINTC_VECTOR_ADDRESS_REG_627_VECTOR_ADDRESS_627_MASK (0xFFFFFFFFu)
  39774. #define CSL_CPINTC_VECTOR_ADDRESS_REG_627_VECTOR_ADDRESS_627_SHIFT (0x00000000u)
  39775. #define CSL_CPINTC_VECTOR_ADDRESS_REG_627_VECTOR_ADDRESS_627_RESETVAL (0x00000000u)
  39776. #define CSL_CPINTC_VECTOR_ADDRESS_REG_627_RESETVAL (0x00000000u)
  39777. /* vector_address_reg_628 */
  39778. #define CSL_CPINTC_VECTOR_ADDRESS_REG_628_VECTOR_ADDRESS_628_MASK (0xFFFFFFFFu)
  39779. #define CSL_CPINTC_VECTOR_ADDRESS_REG_628_VECTOR_ADDRESS_628_SHIFT (0x00000000u)
  39780. #define CSL_CPINTC_VECTOR_ADDRESS_REG_628_VECTOR_ADDRESS_628_RESETVAL (0x00000000u)
  39781. #define CSL_CPINTC_VECTOR_ADDRESS_REG_628_RESETVAL (0x00000000u)
  39782. /* vector_address_reg_629 */
  39783. #define CSL_CPINTC_VECTOR_ADDRESS_REG_629_VECTOR_ADDRESS_629_MASK (0xFFFFFFFFu)
  39784. #define CSL_CPINTC_VECTOR_ADDRESS_REG_629_VECTOR_ADDRESS_629_SHIFT (0x00000000u)
  39785. #define CSL_CPINTC_VECTOR_ADDRESS_REG_629_VECTOR_ADDRESS_629_RESETVAL (0x00000000u)
  39786. #define CSL_CPINTC_VECTOR_ADDRESS_REG_629_RESETVAL (0x00000000u)
  39787. /* vector_address_reg_630 */
  39788. #define CSL_CPINTC_VECTOR_ADDRESS_REG_630_VECTOR_ADDRESS_630_MASK (0xFFFFFFFFu)
  39789. #define CSL_CPINTC_VECTOR_ADDRESS_REG_630_VECTOR_ADDRESS_630_SHIFT (0x00000000u)
  39790. #define CSL_CPINTC_VECTOR_ADDRESS_REG_630_VECTOR_ADDRESS_630_RESETVAL (0x00000000u)
  39791. #define CSL_CPINTC_VECTOR_ADDRESS_REG_630_RESETVAL (0x00000000u)
  39792. /* vector_address_reg_631 */
  39793. #define CSL_CPINTC_VECTOR_ADDRESS_REG_631_VECTOR_ADDRESS_631_MASK (0xFFFFFFFFu)
  39794. #define CSL_CPINTC_VECTOR_ADDRESS_REG_631_VECTOR_ADDRESS_631_SHIFT (0x00000000u)
  39795. #define CSL_CPINTC_VECTOR_ADDRESS_REG_631_VECTOR_ADDRESS_631_RESETVAL (0x00000000u)
  39796. #define CSL_CPINTC_VECTOR_ADDRESS_REG_631_RESETVAL (0x00000000u)
  39797. /* vector_address_reg_632 */
  39798. #define CSL_CPINTC_VECTOR_ADDRESS_REG_632_VECTOR_ADDRESS_632_MASK (0xFFFFFFFFu)
  39799. #define CSL_CPINTC_VECTOR_ADDRESS_REG_632_VECTOR_ADDRESS_632_SHIFT (0x00000000u)
  39800. #define CSL_CPINTC_VECTOR_ADDRESS_REG_632_VECTOR_ADDRESS_632_RESETVAL (0x00000000u)
  39801. #define CSL_CPINTC_VECTOR_ADDRESS_REG_632_RESETVAL (0x00000000u)
  39802. /* vector_address_reg_633 */
  39803. #define CSL_CPINTC_VECTOR_ADDRESS_REG_633_VECTOR_ADDRESS_633_MASK (0xFFFFFFFFu)
  39804. #define CSL_CPINTC_VECTOR_ADDRESS_REG_633_VECTOR_ADDRESS_633_SHIFT (0x00000000u)
  39805. #define CSL_CPINTC_VECTOR_ADDRESS_REG_633_VECTOR_ADDRESS_633_RESETVAL (0x00000000u)
  39806. #define CSL_CPINTC_VECTOR_ADDRESS_REG_633_RESETVAL (0x00000000u)
  39807. /* vector_address_reg_634 */
  39808. #define CSL_CPINTC_VECTOR_ADDRESS_REG_634_VECTOR_ADDRESS_634_MASK (0xFFFFFFFFu)
  39809. #define CSL_CPINTC_VECTOR_ADDRESS_REG_634_VECTOR_ADDRESS_634_SHIFT (0x00000000u)
  39810. #define CSL_CPINTC_VECTOR_ADDRESS_REG_634_VECTOR_ADDRESS_634_RESETVAL (0x00000000u)
  39811. #define CSL_CPINTC_VECTOR_ADDRESS_REG_634_RESETVAL (0x00000000u)
  39812. /* vector_address_reg_635 */
  39813. #define CSL_CPINTC_VECTOR_ADDRESS_REG_635_VECTOR_ADDRESS_635_MASK (0xFFFFFFFFu)
  39814. #define CSL_CPINTC_VECTOR_ADDRESS_REG_635_VECTOR_ADDRESS_635_SHIFT (0x00000000u)
  39815. #define CSL_CPINTC_VECTOR_ADDRESS_REG_635_VECTOR_ADDRESS_635_RESETVAL (0x00000000u)
  39816. #define CSL_CPINTC_VECTOR_ADDRESS_REG_635_RESETVAL (0x00000000u)
  39817. /* vector_address_reg_636 */
  39818. #define CSL_CPINTC_VECTOR_ADDRESS_REG_636_VECTOR_ADDRESS_636_MASK (0xFFFFFFFFu)
  39819. #define CSL_CPINTC_VECTOR_ADDRESS_REG_636_VECTOR_ADDRESS_636_SHIFT (0x00000000u)
  39820. #define CSL_CPINTC_VECTOR_ADDRESS_REG_636_VECTOR_ADDRESS_636_RESETVAL (0x00000000u)
  39821. #define CSL_CPINTC_VECTOR_ADDRESS_REG_636_RESETVAL (0x00000000u)
  39822. /* vector_address_reg_637 */
  39823. #define CSL_CPINTC_VECTOR_ADDRESS_REG_637_VECTOR_ADDRESS_637_MASK (0xFFFFFFFFu)
  39824. #define CSL_CPINTC_VECTOR_ADDRESS_REG_637_VECTOR_ADDRESS_637_SHIFT (0x00000000u)
  39825. #define CSL_CPINTC_VECTOR_ADDRESS_REG_637_VECTOR_ADDRESS_637_RESETVAL (0x00000000u)
  39826. #define CSL_CPINTC_VECTOR_ADDRESS_REG_637_RESETVAL (0x00000000u)
  39827. /* vector_address_reg_638 */
  39828. #define CSL_CPINTC_VECTOR_ADDRESS_REG_638_VECTOR_ADDRESS_638_MASK (0xFFFFFFFFu)
  39829. #define CSL_CPINTC_VECTOR_ADDRESS_REG_638_VECTOR_ADDRESS_638_SHIFT (0x00000000u)
  39830. #define CSL_CPINTC_VECTOR_ADDRESS_REG_638_VECTOR_ADDRESS_638_RESETVAL (0x00000000u)
  39831. #define CSL_CPINTC_VECTOR_ADDRESS_REG_638_RESETVAL (0x00000000u)
  39832. /* vector_address_reg_639 */
  39833. #define CSL_CPINTC_VECTOR_ADDRESS_REG_639_VECTOR_ADDRESS_639_MASK (0xFFFFFFFFu)
  39834. #define CSL_CPINTC_VECTOR_ADDRESS_REG_639_VECTOR_ADDRESS_639_SHIFT (0x00000000u)
  39835. #define CSL_CPINTC_VECTOR_ADDRESS_REG_639_VECTOR_ADDRESS_639_RESETVAL (0x00000000u)
  39836. #define CSL_CPINTC_VECTOR_ADDRESS_REG_639_RESETVAL (0x00000000u)
  39837. /* vector_address_reg_640 */
  39838. #define CSL_CPINTC_VECTOR_ADDRESS_REG_640_VECTOR_ADDRESS_640_MASK (0xFFFFFFFFu)
  39839. #define CSL_CPINTC_VECTOR_ADDRESS_REG_640_VECTOR_ADDRESS_640_SHIFT (0x00000000u)
  39840. #define CSL_CPINTC_VECTOR_ADDRESS_REG_640_VECTOR_ADDRESS_640_RESETVAL (0x00000000u)
  39841. #define CSL_CPINTC_VECTOR_ADDRESS_REG_640_RESETVAL (0x00000000u)
  39842. /* vector_address_reg_641 */
  39843. #define CSL_CPINTC_VECTOR_ADDRESS_REG_641_VECTOR_ADDRESS_641_MASK (0xFFFFFFFFu)
  39844. #define CSL_CPINTC_VECTOR_ADDRESS_REG_641_VECTOR_ADDRESS_641_SHIFT (0x00000000u)
  39845. #define CSL_CPINTC_VECTOR_ADDRESS_REG_641_VECTOR_ADDRESS_641_RESETVAL (0x00000000u)
  39846. #define CSL_CPINTC_VECTOR_ADDRESS_REG_641_RESETVAL (0x00000000u)
  39847. /* vector_address_reg_642 */
  39848. #define CSL_CPINTC_VECTOR_ADDRESS_REG_642_VECTOR_ADDRESS_642_MASK (0xFFFFFFFFu)
  39849. #define CSL_CPINTC_VECTOR_ADDRESS_REG_642_VECTOR_ADDRESS_642_SHIFT (0x00000000u)
  39850. #define CSL_CPINTC_VECTOR_ADDRESS_REG_642_VECTOR_ADDRESS_642_RESETVAL (0x00000000u)
  39851. #define CSL_CPINTC_VECTOR_ADDRESS_REG_642_RESETVAL (0x00000000u)
  39852. /* vector_address_reg_643 */
  39853. #define CSL_CPINTC_VECTOR_ADDRESS_REG_643_VECTOR_ADDRESS_643_MASK (0xFFFFFFFFu)
  39854. #define CSL_CPINTC_VECTOR_ADDRESS_REG_643_VECTOR_ADDRESS_643_SHIFT (0x00000000u)
  39855. #define CSL_CPINTC_VECTOR_ADDRESS_REG_643_VECTOR_ADDRESS_643_RESETVAL (0x00000000u)
  39856. #define CSL_CPINTC_VECTOR_ADDRESS_REG_643_RESETVAL (0x00000000u)
  39857. /* vector_address_reg_644 */
  39858. #define CSL_CPINTC_VECTOR_ADDRESS_REG_644_VECTOR_ADDRESS_644_MASK (0xFFFFFFFFu)
  39859. #define CSL_CPINTC_VECTOR_ADDRESS_REG_644_VECTOR_ADDRESS_644_SHIFT (0x00000000u)
  39860. #define CSL_CPINTC_VECTOR_ADDRESS_REG_644_VECTOR_ADDRESS_644_RESETVAL (0x00000000u)
  39861. #define CSL_CPINTC_VECTOR_ADDRESS_REG_644_RESETVAL (0x00000000u)
  39862. /* vector_address_reg_645 */
  39863. #define CSL_CPINTC_VECTOR_ADDRESS_REG_645_VECTOR_ADDRESS_645_MASK (0xFFFFFFFFu)
  39864. #define CSL_CPINTC_VECTOR_ADDRESS_REG_645_VECTOR_ADDRESS_645_SHIFT (0x00000000u)
  39865. #define CSL_CPINTC_VECTOR_ADDRESS_REG_645_VECTOR_ADDRESS_645_RESETVAL (0x00000000u)
  39866. #define CSL_CPINTC_VECTOR_ADDRESS_REG_645_RESETVAL (0x00000000u)
  39867. /* vector_address_reg_646 */
  39868. #define CSL_CPINTC_VECTOR_ADDRESS_REG_646_VECTOR_ADDRESS_646_MASK (0xFFFFFFFFu)
  39869. #define CSL_CPINTC_VECTOR_ADDRESS_REG_646_VECTOR_ADDRESS_646_SHIFT (0x00000000u)
  39870. #define CSL_CPINTC_VECTOR_ADDRESS_REG_646_VECTOR_ADDRESS_646_RESETVAL (0x00000000u)
  39871. #define CSL_CPINTC_VECTOR_ADDRESS_REG_646_RESETVAL (0x00000000u)
  39872. /* vector_address_reg_647 */
  39873. #define CSL_CPINTC_VECTOR_ADDRESS_REG_647_VECTOR_ADDRESS_647_MASK (0xFFFFFFFFu)
  39874. #define CSL_CPINTC_VECTOR_ADDRESS_REG_647_VECTOR_ADDRESS_647_SHIFT (0x00000000u)
  39875. #define CSL_CPINTC_VECTOR_ADDRESS_REG_647_VECTOR_ADDRESS_647_RESETVAL (0x00000000u)
  39876. #define CSL_CPINTC_VECTOR_ADDRESS_REG_647_RESETVAL (0x00000000u)
  39877. /* vector_address_reg_648 */
  39878. #define CSL_CPINTC_VECTOR_ADDRESS_REG_648_VECTOR_ADDRESS_648_MASK (0xFFFFFFFFu)
  39879. #define CSL_CPINTC_VECTOR_ADDRESS_REG_648_VECTOR_ADDRESS_648_SHIFT (0x00000000u)
  39880. #define CSL_CPINTC_VECTOR_ADDRESS_REG_648_VECTOR_ADDRESS_648_RESETVAL (0x00000000u)
  39881. #define CSL_CPINTC_VECTOR_ADDRESS_REG_648_RESETVAL (0x00000000u)
  39882. /* vector_address_reg_649 */
  39883. #define CSL_CPINTC_VECTOR_ADDRESS_REG_649_VECTOR_ADDRESS_649_MASK (0xFFFFFFFFu)
  39884. #define CSL_CPINTC_VECTOR_ADDRESS_REG_649_VECTOR_ADDRESS_649_SHIFT (0x00000000u)
  39885. #define CSL_CPINTC_VECTOR_ADDRESS_REG_649_VECTOR_ADDRESS_649_RESETVAL (0x00000000u)
  39886. #define CSL_CPINTC_VECTOR_ADDRESS_REG_649_RESETVAL (0x00000000u)
  39887. /* vector_address_reg_650 */
  39888. #define CSL_CPINTC_VECTOR_ADDRESS_REG_650_VECTOR_ADDRESS_650_MASK (0xFFFFFFFFu)
  39889. #define CSL_CPINTC_VECTOR_ADDRESS_REG_650_VECTOR_ADDRESS_650_SHIFT (0x00000000u)
  39890. #define CSL_CPINTC_VECTOR_ADDRESS_REG_650_VECTOR_ADDRESS_650_RESETVAL (0x00000000u)
  39891. #define CSL_CPINTC_VECTOR_ADDRESS_REG_650_RESETVAL (0x00000000u)
  39892. /* vector_address_reg_651 */
  39893. #define CSL_CPINTC_VECTOR_ADDRESS_REG_651_VECTOR_ADDRESS_651_MASK (0xFFFFFFFFu)
  39894. #define CSL_CPINTC_VECTOR_ADDRESS_REG_651_VECTOR_ADDRESS_651_SHIFT (0x00000000u)
  39895. #define CSL_CPINTC_VECTOR_ADDRESS_REG_651_VECTOR_ADDRESS_651_RESETVAL (0x00000000u)
  39896. #define CSL_CPINTC_VECTOR_ADDRESS_REG_651_RESETVAL (0x00000000u)
  39897. /* vector_address_reg_652 */
  39898. #define CSL_CPINTC_VECTOR_ADDRESS_REG_652_VECTOR_ADDRESS_652_MASK (0xFFFFFFFFu)
  39899. #define CSL_CPINTC_VECTOR_ADDRESS_REG_652_VECTOR_ADDRESS_652_SHIFT (0x00000000u)
  39900. #define CSL_CPINTC_VECTOR_ADDRESS_REG_652_VECTOR_ADDRESS_652_RESETVAL (0x00000000u)
  39901. #define CSL_CPINTC_VECTOR_ADDRESS_REG_652_RESETVAL (0x00000000u)
  39902. /* vector_address_reg_653 */
  39903. #define CSL_CPINTC_VECTOR_ADDRESS_REG_653_VECTOR_ADDRESS_653_MASK (0xFFFFFFFFu)
  39904. #define CSL_CPINTC_VECTOR_ADDRESS_REG_653_VECTOR_ADDRESS_653_SHIFT (0x00000000u)
  39905. #define CSL_CPINTC_VECTOR_ADDRESS_REG_653_VECTOR_ADDRESS_653_RESETVAL (0x00000000u)
  39906. #define CSL_CPINTC_VECTOR_ADDRESS_REG_653_RESETVAL (0x00000000u)
  39907. /* vector_address_reg_654 */
  39908. #define CSL_CPINTC_VECTOR_ADDRESS_REG_654_VECTOR_ADDRESS_654_MASK (0xFFFFFFFFu)
  39909. #define CSL_CPINTC_VECTOR_ADDRESS_REG_654_VECTOR_ADDRESS_654_SHIFT (0x00000000u)
  39910. #define CSL_CPINTC_VECTOR_ADDRESS_REG_654_VECTOR_ADDRESS_654_RESETVAL (0x00000000u)
  39911. #define CSL_CPINTC_VECTOR_ADDRESS_REG_654_RESETVAL (0x00000000u)
  39912. /* vector_address_reg_655 */
  39913. #define CSL_CPINTC_VECTOR_ADDRESS_REG_655_VECTOR_ADDRESS_655_MASK (0xFFFFFFFFu)
  39914. #define CSL_CPINTC_VECTOR_ADDRESS_REG_655_VECTOR_ADDRESS_655_SHIFT (0x00000000u)
  39915. #define CSL_CPINTC_VECTOR_ADDRESS_REG_655_VECTOR_ADDRESS_655_RESETVAL (0x00000000u)
  39916. #define CSL_CPINTC_VECTOR_ADDRESS_REG_655_RESETVAL (0x00000000u)
  39917. /* vector_address_reg_656 */
  39918. #define CSL_CPINTC_VECTOR_ADDRESS_REG_656_VECTOR_ADDRESS_656_MASK (0xFFFFFFFFu)
  39919. #define CSL_CPINTC_VECTOR_ADDRESS_REG_656_VECTOR_ADDRESS_656_SHIFT (0x00000000u)
  39920. #define CSL_CPINTC_VECTOR_ADDRESS_REG_656_VECTOR_ADDRESS_656_RESETVAL (0x00000000u)
  39921. #define CSL_CPINTC_VECTOR_ADDRESS_REG_656_RESETVAL (0x00000000u)
  39922. /* vector_address_reg_657 */
  39923. #define CSL_CPINTC_VECTOR_ADDRESS_REG_657_VECTOR_ADDRESS_657_MASK (0xFFFFFFFFu)
  39924. #define CSL_CPINTC_VECTOR_ADDRESS_REG_657_VECTOR_ADDRESS_657_SHIFT (0x00000000u)
  39925. #define CSL_CPINTC_VECTOR_ADDRESS_REG_657_VECTOR_ADDRESS_657_RESETVAL (0x00000000u)
  39926. #define CSL_CPINTC_VECTOR_ADDRESS_REG_657_RESETVAL (0x00000000u)
  39927. /* vector_address_reg_658 */
  39928. #define CSL_CPINTC_VECTOR_ADDRESS_REG_658_VECTOR_ADDRESS_658_MASK (0xFFFFFFFFu)
  39929. #define CSL_CPINTC_VECTOR_ADDRESS_REG_658_VECTOR_ADDRESS_658_SHIFT (0x00000000u)
  39930. #define CSL_CPINTC_VECTOR_ADDRESS_REG_658_VECTOR_ADDRESS_658_RESETVAL (0x00000000u)
  39931. #define CSL_CPINTC_VECTOR_ADDRESS_REG_658_RESETVAL (0x00000000u)
  39932. /* vector_address_reg_659 */
  39933. #define CSL_CPINTC_VECTOR_ADDRESS_REG_659_VECTOR_ADDRESS_659_MASK (0xFFFFFFFFu)
  39934. #define CSL_CPINTC_VECTOR_ADDRESS_REG_659_VECTOR_ADDRESS_659_SHIFT (0x00000000u)
  39935. #define CSL_CPINTC_VECTOR_ADDRESS_REG_659_VECTOR_ADDRESS_659_RESETVAL (0x00000000u)
  39936. #define CSL_CPINTC_VECTOR_ADDRESS_REG_659_RESETVAL (0x00000000u)
  39937. /* vector_address_reg_660 */
  39938. #define CSL_CPINTC_VECTOR_ADDRESS_REG_660_VECTOR_ADDRESS_660_MASK (0xFFFFFFFFu)
  39939. #define CSL_CPINTC_VECTOR_ADDRESS_REG_660_VECTOR_ADDRESS_660_SHIFT (0x00000000u)
  39940. #define CSL_CPINTC_VECTOR_ADDRESS_REG_660_VECTOR_ADDRESS_660_RESETVAL (0x00000000u)
  39941. #define CSL_CPINTC_VECTOR_ADDRESS_REG_660_RESETVAL (0x00000000u)
  39942. /* vector_address_reg_661 */
  39943. #define CSL_CPINTC_VECTOR_ADDRESS_REG_661_VECTOR_ADDRESS_661_MASK (0xFFFFFFFFu)
  39944. #define CSL_CPINTC_VECTOR_ADDRESS_REG_661_VECTOR_ADDRESS_661_SHIFT (0x00000000u)
  39945. #define CSL_CPINTC_VECTOR_ADDRESS_REG_661_VECTOR_ADDRESS_661_RESETVAL (0x00000000u)
  39946. #define CSL_CPINTC_VECTOR_ADDRESS_REG_661_RESETVAL (0x00000000u)
  39947. /* vector_address_reg_662 */
  39948. #define CSL_CPINTC_VECTOR_ADDRESS_REG_662_VECTOR_ADDRESS_662_MASK (0xFFFFFFFFu)
  39949. #define CSL_CPINTC_VECTOR_ADDRESS_REG_662_VECTOR_ADDRESS_662_SHIFT (0x00000000u)
  39950. #define CSL_CPINTC_VECTOR_ADDRESS_REG_662_VECTOR_ADDRESS_662_RESETVAL (0x00000000u)
  39951. #define CSL_CPINTC_VECTOR_ADDRESS_REG_662_RESETVAL (0x00000000u)
  39952. /* vector_address_reg_663 */
  39953. #define CSL_CPINTC_VECTOR_ADDRESS_REG_663_VECTOR_ADDRESS_663_MASK (0xFFFFFFFFu)
  39954. #define CSL_CPINTC_VECTOR_ADDRESS_REG_663_VECTOR_ADDRESS_663_SHIFT (0x00000000u)
  39955. #define CSL_CPINTC_VECTOR_ADDRESS_REG_663_VECTOR_ADDRESS_663_RESETVAL (0x00000000u)
  39956. #define CSL_CPINTC_VECTOR_ADDRESS_REG_663_RESETVAL (0x00000000u)
  39957. /* vector_address_reg_664 */
  39958. #define CSL_CPINTC_VECTOR_ADDRESS_REG_664_VECTOR_ADDRESS_664_MASK (0xFFFFFFFFu)
  39959. #define CSL_CPINTC_VECTOR_ADDRESS_REG_664_VECTOR_ADDRESS_664_SHIFT (0x00000000u)
  39960. #define CSL_CPINTC_VECTOR_ADDRESS_REG_664_VECTOR_ADDRESS_664_RESETVAL (0x00000000u)
  39961. #define CSL_CPINTC_VECTOR_ADDRESS_REG_664_RESETVAL (0x00000000u)
  39962. /* vector_address_reg_665 */
  39963. #define CSL_CPINTC_VECTOR_ADDRESS_REG_665_VECTOR_ADDRESS_665_MASK (0xFFFFFFFFu)
  39964. #define CSL_CPINTC_VECTOR_ADDRESS_REG_665_VECTOR_ADDRESS_665_SHIFT (0x00000000u)
  39965. #define CSL_CPINTC_VECTOR_ADDRESS_REG_665_VECTOR_ADDRESS_665_RESETVAL (0x00000000u)
  39966. #define CSL_CPINTC_VECTOR_ADDRESS_REG_665_RESETVAL (0x00000000u)
  39967. /* vector_address_reg_666 */
  39968. #define CSL_CPINTC_VECTOR_ADDRESS_REG_666_VECTOR_ADDRESS_666_MASK (0xFFFFFFFFu)
  39969. #define CSL_CPINTC_VECTOR_ADDRESS_REG_666_VECTOR_ADDRESS_666_SHIFT (0x00000000u)
  39970. #define CSL_CPINTC_VECTOR_ADDRESS_REG_666_VECTOR_ADDRESS_666_RESETVAL (0x00000000u)
  39971. #define CSL_CPINTC_VECTOR_ADDRESS_REG_666_RESETVAL (0x00000000u)
  39972. /* vector_address_reg_667 */
  39973. #define CSL_CPINTC_VECTOR_ADDRESS_REG_667_VECTOR_ADDRESS_667_MASK (0xFFFFFFFFu)
  39974. #define CSL_CPINTC_VECTOR_ADDRESS_REG_667_VECTOR_ADDRESS_667_SHIFT (0x00000000u)
  39975. #define CSL_CPINTC_VECTOR_ADDRESS_REG_667_VECTOR_ADDRESS_667_RESETVAL (0x00000000u)
  39976. #define CSL_CPINTC_VECTOR_ADDRESS_REG_667_RESETVAL (0x00000000u)
  39977. /* vector_address_reg_668 */
  39978. #define CSL_CPINTC_VECTOR_ADDRESS_REG_668_VECTOR_ADDRESS_668_MASK (0xFFFFFFFFu)
  39979. #define CSL_CPINTC_VECTOR_ADDRESS_REG_668_VECTOR_ADDRESS_668_SHIFT (0x00000000u)
  39980. #define CSL_CPINTC_VECTOR_ADDRESS_REG_668_VECTOR_ADDRESS_668_RESETVAL (0x00000000u)
  39981. #define CSL_CPINTC_VECTOR_ADDRESS_REG_668_RESETVAL (0x00000000u)
  39982. /* vector_address_reg_669 */
  39983. #define CSL_CPINTC_VECTOR_ADDRESS_REG_669_VECTOR_ADDRESS_669_MASK (0xFFFFFFFFu)
  39984. #define CSL_CPINTC_VECTOR_ADDRESS_REG_669_VECTOR_ADDRESS_669_SHIFT (0x00000000u)
  39985. #define CSL_CPINTC_VECTOR_ADDRESS_REG_669_VECTOR_ADDRESS_669_RESETVAL (0x00000000u)
  39986. #define CSL_CPINTC_VECTOR_ADDRESS_REG_669_RESETVAL (0x00000000u)
  39987. /* vector_address_reg_670 */
  39988. #define CSL_CPINTC_VECTOR_ADDRESS_REG_670_VECTOR_ADDRESS_670_MASK (0xFFFFFFFFu)
  39989. #define CSL_CPINTC_VECTOR_ADDRESS_REG_670_VECTOR_ADDRESS_670_SHIFT (0x00000000u)
  39990. #define CSL_CPINTC_VECTOR_ADDRESS_REG_670_VECTOR_ADDRESS_670_RESETVAL (0x00000000u)
  39991. #define CSL_CPINTC_VECTOR_ADDRESS_REG_670_RESETVAL (0x00000000u)
  39992. /* vector_address_reg_671 */
  39993. #define CSL_CPINTC_VECTOR_ADDRESS_REG_671_VECTOR_ADDRESS_671_MASK (0xFFFFFFFFu)
  39994. #define CSL_CPINTC_VECTOR_ADDRESS_REG_671_VECTOR_ADDRESS_671_SHIFT (0x00000000u)
  39995. #define CSL_CPINTC_VECTOR_ADDRESS_REG_671_VECTOR_ADDRESS_671_RESETVAL (0x00000000u)
  39996. #define CSL_CPINTC_VECTOR_ADDRESS_REG_671_RESETVAL (0x00000000u)
  39997. /* vector_address_reg_672 */
  39998. #define CSL_CPINTC_VECTOR_ADDRESS_REG_672_VECTOR_ADDRESS_672_MASK (0xFFFFFFFFu)
  39999. #define CSL_CPINTC_VECTOR_ADDRESS_REG_672_VECTOR_ADDRESS_672_SHIFT (0x00000000u)
  40000. #define CSL_CPINTC_VECTOR_ADDRESS_REG_672_VECTOR_ADDRESS_672_RESETVAL (0x00000000u)
  40001. #define CSL_CPINTC_VECTOR_ADDRESS_REG_672_RESETVAL (0x00000000u)
  40002. /* vector_address_reg_673 */
  40003. #define CSL_CPINTC_VECTOR_ADDRESS_REG_673_VECTOR_ADDRESS_673_MASK (0xFFFFFFFFu)
  40004. #define CSL_CPINTC_VECTOR_ADDRESS_REG_673_VECTOR_ADDRESS_673_SHIFT (0x00000000u)
  40005. #define CSL_CPINTC_VECTOR_ADDRESS_REG_673_VECTOR_ADDRESS_673_RESETVAL (0x00000000u)
  40006. #define CSL_CPINTC_VECTOR_ADDRESS_REG_673_RESETVAL (0x00000000u)
  40007. /* vector_address_reg_674 */
  40008. #define CSL_CPINTC_VECTOR_ADDRESS_REG_674_VECTOR_ADDRESS_674_MASK (0xFFFFFFFFu)
  40009. #define CSL_CPINTC_VECTOR_ADDRESS_REG_674_VECTOR_ADDRESS_674_SHIFT (0x00000000u)
  40010. #define CSL_CPINTC_VECTOR_ADDRESS_REG_674_VECTOR_ADDRESS_674_RESETVAL (0x00000000u)
  40011. #define CSL_CPINTC_VECTOR_ADDRESS_REG_674_RESETVAL (0x00000000u)
  40012. /* vector_address_reg_675 */
  40013. #define CSL_CPINTC_VECTOR_ADDRESS_REG_675_VECTOR_ADDRESS_675_MASK (0xFFFFFFFFu)
  40014. #define CSL_CPINTC_VECTOR_ADDRESS_REG_675_VECTOR_ADDRESS_675_SHIFT (0x00000000u)
  40015. #define CSL_CPINTC_VECTOR_ADDRESS_REG_675_VECTOR_ADDRESS_675_RESETVAL (0x00000000u)
  40016. #define CSL_CPINTC_VECTOR_ADDRESS_REG_675_RESETVAL (0x00000000u)
  40017. /* vector_address_reg_676 */
  40018. #define CSL_CPINTC_VECTOR_ADDRESS_REG_676_VECTOR_ADDRESS_676_MASK (0xFFFFFFFFu)
  40019. #define CSL_CPINTC_VECTOR_ADDRESS_REG_676_VECTOR_ADDRESS_676_SHIFT (0x00000000u)
  40020. #define CSL_CPINTC_VECTOR_ADDRESS_REG_676_VECTOR_ADDRESS_676_RESETVAL (0x00000000u)
  40021. #define CSL_CPINTC_VECTOR_ADDRESS_REG_676_RESETVAL (0x00000000u)
  40022. /* vector_address_reg_677 */
  40023. #define CSL_CPINTC_VECTOR_ADDRESS_REG_677_VECTOR_ADDRESS_677_MASK (0xFFFFFFFFu)
  40024. #define CSL_CPINTC_VECTOR_ADDRESS_REG_677_VECTOR_ADDRESS_677_SHIFT (0x00000000u)
  40025. #define CSL_CPINTC_VECTOR_ADDRESS_REG_677_VECTOR_ADDRESS_677_RESETVAL (0x00000000u)
  40026. #define CSL_CPINTC_VECTOR_ADDRESS_REG_677_RESETVAL (0x00000000u)
  40027. /* vector_address_reg_678 */
  40028. #define CSL_CPINTC_VECTOR_ADDRESS_REG_678_VECTOR_ADDRESS_678_MASK (0xFFFFFFFFu)
  40029. #define CSL_CPINTC_VECTOR_ADDRESS_REG_678_VECTOR_ADDRESS_678_SHIFT (0x00000000u)
  40030. #define CSL_CPINTC_VECTOR_ADDRESS_REG_678_VECTOR_ADDRESS_678_RESETVAL (0x00000000u)
  40031. #define CSL_CPINTC_VECTOR_ADDRESS_REG_678_RESETVAL (0x00000000u)
  40032. /* vector_address_reg_679 */
  40033. #define CSL_CPINTC_VECTOR_ADDRESS_REG_679_VECTOR_ADDRESS_679_MASK (0xFFFFFFFFu)
  40034. #define CSL_CPINTC_VECTOR_ADDRESS_REG_679_VECTOR_ADDRESS_679_SHIFT (0x00000000u)
  40035. #define CSL_CPINTC_VECTOR_ADDRESS_REG_679_VECTOR_ADDRESS_679_RESETVAL (0x00000000u)
  40036. #define CSL_CPINTC_VECTOR_ADDRESS_REG_679_RESETVAL (0x00000000u)
  40037. /* vector_address_reg_680 */
  40038. #define CSL_CPINTC_VECTOR_ADDRESS_REG_680_VECTOR_ADDRESS_680_MASK (0xFFFFFFFFu)
  40039. #define CSL_CPINTC_VECTOR_ADDRESS_REG_680_VECTOR_ADDRESS_680_SHIFT (0x00000000u)
  40040. #define CSL_CPINTC_VECTOR_ADDRESS_REG_680_VECTOR_ADDRESS_680_RESETVAL (0x00000000u)
  40041. #define CSL_CPINTC_VECTOR_ADDRESS_REG_680_RESETVAL (0x00000000u)
  40042. /* vector_address_reg_681 */
  40043. #define CSL_CPINTC_VECTOR_ADDRESS_REG_681_VECTOR_ADDRESS_681_MASK (0xFFFFFFFFu)
  40044. #define CSL_CPINTC_VECTOR_ADDRESS_REG_681_VECTOR_ADDRESS_681_SHIFT (0x00000000u)
  40045. #define CSL_CPINTC_VECTOR_ADDRESS_REG_681_VECTOR_ADDRESS_681_RESETVAL (0x00000000u)
  40046. #define CSL_CPINTC_VECTOR_ADDRESS_REG_681_RESETVAL (0x00000000u)
  40047. /* vector_address_reg_682 */
  40048. #define CSL_CPINTC_VECTOR_ADDRESS_REG_682_VECTOR_ADDRESS_682_MASK (0xFFFFFFFFu)
  40049. #define CSL_CPINTC_VECTOR_ADDRESS_REG_682_VECTOR_ADDRESS_682_SHIFT (0x00000000u)
  40050. #define CSL_CPINTC_VECTOR_ADDRESS_REG_682_VECTOR_ADDRESS_682_RESETVAL (0x00000000u)
  40051. #define CSL_CPINTC_VECTOR_ADDRESS_REG_682_RESETVAL (0x00000000u)
  40052. /* vector_address_reg_683 */
  40053. #define CSL_CPINTC_VECTOR_ADDRESS_REG_683_VECTOR_ADDRESS_683_MASK (0xFFFFFFFFu)
  40054. #define CSL_CPINTC_VECTOR_ADDRESS_REG_683_VECTOR_ADDRESS_683_SHIFT (0x00000000u)
  40055. #define CSL_CPINTC_VECTOR_ADDRESS_REG_683_VECTOR_ADDRESS_683_RESETVAL (0x00000000u)
  40056. #define CSL_CPINTC_VECTOR_ADDRESS_REG_683_RESETVAL (0x00000000u)
  40057. /* vector_address_reg_684 */
  40058. #define CSL_CPINTC_VECTOR_ADDRESS_REG_684_VECTOR_ADDRESS_684_MASK (0xFFFFFFFFu)
  40059. #define CSL_CPINTC_VECTOR_ADDRESS_REG_684_VECTOR_ADDRESS_684_SHIFT (0x00000000u)
  40060. #define CSL_CPINTC_VECTOR_ADDRESS_REG_684_VECTOR_ADDRESS_684_RESETVAL (0x00000000u)
  40061. #define CSL_CPINTC_VECTOR_ADDRESS_REG_684_RESETVAL (0x00000000u)
  40062. /* vector_address_reg_685 */
  40063. #define CSL_CPINTC_VECTOR_ADDRESS_REG_685_VECTOR_ADDRESS_685_MASK (0xFFFFFFFFu)
  40064. #define CSL_CPINTC_VECTOR_ADDRESS_REG_685_VECTOR_ADDRESS_685_SHIFT (0x00000000u)
  40065. #define CSL_CPINTC_VECTOR_ADDRESS_REG_685_VECTOR_ADDRESS_685_RESETVAL (0x00000000u)
  40066. #define CSL_CPINTC_VECTOR_ADDRESS_REG_685_RESETVAL (0x00000000u)
  40067. /* vector_address_reg_686 */
  40068. #define CSL_CPINTC_VECTOR_ADDRESS_REG_686_VECTOR_ADDRESS_686_MASK (0xFFFFFFFFu)
  40069. #define CSL_CPINTC_VECTOR_ADDRESS_REG_686_VECTOR_ADDRESS_686_SHIFT (0x00000000u)
  40070. #define CSL_CPINTC_VECTOR_ADDRESS_REG_686_VECTOR_ADDRESS_686_RESETVAL (0x00000000u)
  40071. #define CSL_CPINTC_VECTOR_ADDRESS_REG_686_RESETVAL (0x00000000u)
  40072. /* vector_address_reg_687 */
  40073. #define CSL_CPINTC_VECTOR_ADDRESS_REG_687_VECTOR_ADDRESS_687_MASK (0xFFFFFFFFu)
  40074. #define CSL_CPINTC_VECTOR_ADDRESS_REG_687_VECTOR_ADDRESS_687_SHIFT (0x00000000u)
  40075. #define CSL_CPINTC_VECTOR_ADDRESS_REG_687_VECTOR_ADDRESS_687_RESETVAL (0x00000000u)
  40076. #define CSL_CPINTC_VECTOR_ADDRESS_REG_687_RESETVAL (0x00000000u)
  40077. /* vector_address_reg_688 */
  40078. #define CSL_CPINTC_VECTOR_ADDRESS_REG_688_VECTOR_ADDRESS_688_MASK (0xFFFFFFFFu)
  40079. #define CSL_CPINTC_VECTOR_ADDRESS_REG_688_VECTOR_ADDRESS_688_SHIFT (0x00000000u)
  40080. #define CSL_CPINTC_VECTOR_ADDRESS_REG_688_VECTOR_ADDRESS_688_RESETVAL (0x00000000u)
  40081. #define CSL_CPINTC_VECTOR_ADDRESS_REG_688_RESETVAL (0x00000000u)
  40082. /* vector_address_reg_689 */
  40083. #define CSL_CPINTC_VECTOR_ADDRESS_REG_689_VECTOR_ADDRESS_689_MASK (0xFFFFFFFFu)
  40084. #define CSL_CPINTC_VECTOR_ADDRESS_REG_689_VECTOR_ADDRESS_689_SHIFT (0x00000000u)
  40085. #define CSL_CPINTC_VECTOR_ADDRESS_REG_689_VECTOR_ADDRESS_689_RESETVAL (0x00000000u)
  40086. #define CSL_CPINTC_VECTOR_ADDRESS_REG_689_RESETVAL (0x00000000u)
  40087. /* vector_address_reg_690 */
  40088. #define CSL_CPINTC_VECTOR_ADDRESS_REG_690_VECTOR_ADDRESS_690_MASK (0xFFFFFFFFu)
  40089. #define CSL_CPINTC_VECTOR_ADDRESS_REG_690_VECTOR_ADDRESS_690_SHIFT (0x00000000u)
  40090. #define CSL_CPINTC_VECTOR_ADDRESS_REG_690_VECTOR_ADDRESS_690_RESETVAL (0x00000000u)
  40091. #define CSL_CPINTC_VECTOR_ADDRESS_REG_690_RESETVAL (0x00000000u)
  40092. /* vector_address_reg_691 */
  40093. #define CSL_CPINTC_VECTOR_ADDRESS_REG_691_VECTOR_ADDRESS_691_MASK (0xFFFFFFFFu)
  40094. #define CSL_CPINTC_VECTOR_ADDRESS_REG_691_VECTOR_ADDRESS_691_SHIFT (0x00000000u)
  40095. #define CSL_CPINTC_VECTOR_ADDRESS_REG_691_VECTOR_ADDRESS_691_RESETVAL (0x00000000u)
  40096. #define CSL_CPINTC_VECTOR_ADDRESS_REG_691_RESETVAL (0x00000000u)
  40097. /* vector_address_reg_692 */
  40098. #define CSL_CPINTC_VECTOR_ADDRESS_REG_692_VECTOR_ADDRESS_692_MASK (0xFFFFFFFFu)
  40099. #define CSL_CPINTC_VECTOR_ADDRESS_REG_692_VECTOR_ADDRESS_692_SHIFT (0x00000000u)
  40100. #define CSL_CPINTC_VECTOR_ADDRESS_REG_692_VECTOR_ADDRESS_692_RESETVAL (0x00000000u)
  40101. #define CSL_CPINTC_VECTOR_ADDRESS_REG_692_RESETVAL (0x00000000u)
  40102. /* vector_address_reg_693 */
  40103. #define CSL_CPINTC_VECTOR_ADDRESS_REG_693_VECTOR_ADDRESS_693_MASK (0xFFFFFFFFu)
  40104. #define CSL_CPINTC_VECTOR_ADDRESS_REG_693_VECTOR_ADDRESS_693_SHIFT (0x00000000u)
  40105. #define CSL_CPINTC_VECTOR_ADDRESS_REG_693_VECTOR_ADDRESS_693_RESETVAL (0x00000000u)
  40106. #define CSL_CPINTC_VECTOR_ADDRESS_REG_693_RESETVAL (0x00000000u)
  40107. /* vector_address_reg_694 */
  40108. #define CSL_CPINTC_VECTOR_ADDRESS_REG_694_VECTOR_ADDRESS_694_MASK (0xFFFFFFFFu)
  40109. #define CSL_CPINTC_VECTOR_ADDRESS_REG_694_VECTOR_ADDRESS_694_SHIFT (0x00000000u)
  40110. #define CSL_CPINTC_VECTOR_ADDRESS_REG_694_VECTOR_ADDRESS_694_RESETVAL (0x00000000u)
  40111. #define CSL_CPINTC_VECTOR_ADDRESS_REG_694_RESETVAL (0x00000000u)
  40112. /* vector_address_reg_695 */
  40113. #define CSL_CPINTC_VECTOR_ADDRESS_REG_695_VECTOR_ADDRESS_695_MASK (0xFFFFFFFFu)
  40114. #define CSL_CPINTC_VECTOR_ADDRESS_REG_695_VECTOR_ADDRESS_695_SHIFT (0x00000000u)
  40115. #define CSL_CPINTC_VECTOR_ADDRESS_REG_695_VECTOR_ADDRESS_695_RESETVAL (0x00000000u)
  40116. #define CSL_CPINTC_VECTOR_ADDRESS_REG_695_RESETVAL (0x00000000u)
  40117. /* vector_address_reg_696 */
  40118. #define CSL_CPINTC_VECTOR_ADDRESS_REG_696_VECTOR_ADDRESS_696_MASK (0xFFFFFFFFu)
  40119. #define CSL_CPINTC_VECTOR_ADDRESS_REG_696_VECTOR_ADDRESS_696_SHIFT (0x00000000u)
  40120. #define CSL_CPINTC_VECTOR_ADDRESS_REG_696_VECTOR_ADDRESS_696_RESETVAL (0x00000000u)
  40121. #define CSL_CPINTC_VECTOR_ADDRESS_REG_696_RESETVAL (0x00000000u)
  40122. /* vector_address_reg_697 */
  40123. #define CSL_CPINTC_VECTOR_ADDRESS_REG_697_VECTOR_ADDRESS_697_MASK (0xFFFFFFFFu)
  40124. #define CSL_CPINTC_VECTOR_ADDRESS_REG_697_VECTOR_ADDRESS_697_SHIFT (0x00000000u)
  40125. #define CSL_CPINTC_VECTOR_ADDRESS_REG_697_VECTOR_ADDRESS_697_RESETVAL (0x00000000u)
  40126. #define CSL_CPINTC_VECTOR_ADDRESS_REG_697_RESETVAL (0x00000000u)
  40127. /* vector_address_reg_698 */
  40128. #define CSL_CPINTC_VECTOR_ADDRESS_REG_698_VECTOR_ADDRESS_698_MASK (0xFFFFFFFFu)
  40129. #define CSL_CPINTC_VECTOR_ADDRESS_REG_698_VECTOR_ADDRESS_698_SHIFT (0x00000000u)
  40130. #define CSL_CPINTC_VECTOR_ADDRESS_REG_698_VECTOR_ADDRESS_698_RESETVAL (0x00000000u)
  40131. #define CSL_CPINTC_VECTOR_ADDRESS_REG_698_RESETVAL (0x00000000u)
  40132. /* vector_address_reg_699 */
  40133. #define CSL_CPINTC_VECTOR_ADDRESS_REG_699_VECTOR_ADDRESS_699_MASK (0xFFFFFFFFu)
  40134. #define CSL_CPINTC_VECTOR_ADDRESS_REG_699_VECTOR_ADDRESS_699_SHIFT (0x00000000u)
  40135. #define CSL_CPINTC_VECTOR_ADDRESS_REG_699_VECTOR_ADDRESS_699_RESETVAL (0x00000000u)
  40136. #define CSL_CPINTC_VECTOR_ADDRESS_REG_699_RESETVAL (0x00000000u)
  40137. /* vector_address_reg_700 */
  40138. #define CSL_CPINTC_VECTOR_ADDRESS_REG_700_VECTOR_ADDRESS_700_MASK (0xFFFFFFFFu)
  40139. #define CSL_CPINTC_VECTOR_ADDRESS_REG_700_VECTOR_ADDRESS_700_SHIFT (0x00000000u)
  40140. #define CSL_CPINTC_VECTOR_ADDRESS_REG_700_VECTOR_ADDRESS_700_RESETVAL (0x00000000u)
  40141. #define CSL_CPINTC_VECTOR_ADDRESS_REG_700_RESETVAL (0x00000000u)
  40142. /* vector_address_reg_701 */
  40143. #define CSL_CPINTC_VECTOR_ADDRESS_REG_701_VECTOR_ADDRESS_701_MASK (0xFFFFFFFFu)
  40144. #define CSL_CPINTC_VECTOR_ADDRESS_REG_701_VECTOR_ADDRESS_701_SHIFT (0x00000000u)
  40145. #define CSL_CPINTC_VECTOR_ADDRESS_REG_701_VECTOR_ADDRESS_701_RESETVAL (0x00000000u)
  40146. #define CSL_CPINTC_VECTOR_ADDRESS_REG_701_RESETVAL (0x00000000u)
  40147. /* vector_address_reg_702 */
  40148. #define CSL_CPINTC_VECTOR_ADDRESS_REG_702_VECTOR_ADDRESS_702_MASK (0xFFFFFFFFu)
  40149. #define CSL_CPINTC_VECTOR_ADDRESS_REG_702_VECTOR_ADDRESS_702_SHIFT (0x00000000u)
  40150. #define CSL_CPINTC_VECTOR_ADDRESS_REG_702_VECTOR_ADDRESS_702_RESETVAL (0x00000000u)
  40151. #define CSL_CPINTC_VECTOR_ADDRESS_REG_702_RESETVAL (0x00000000u)
  40152. /* vector_address_reg_703 */
  40153. #define CSL_CPINTC_VECTOR_ADDRESS_REG_703_VECTOR_ADDRESS_703_MASK (0xFFFFFFFFu)
  40154. #define CSL_CPINTC_VECTOR_ADDRESS_REG_703_VECTOR_ADDRESS_703_SHIFT (0x00000000u)
  40155. #define CSL_CPINTC_VECTOR_ADDRESS_REG_703_VECTOR_ADDRESS_703_RESETVAL (0x00000000u)
  40156. #define CSL_CPINTC_VECTOR_ADDRESS_REG_703_RESETVAL (0x00000000u)
  40157. /* vector_address_reg_704 */
  40158. #define CSL_CPINTC_VECTOR_ADDRESS_REG_704_VECTOR_ADDRESS_704_MASK (0xFFFFFFFFu)
  40159. #define CSL_CPINTC_VECTOR_ADDRESS_REG_704_VECTOR_ADDRESS_704_SHIFT (0x00000000u)
  40160. #define CSL_CPINTC_VECTOR_ADDRESS_REG_704_VECTOR_ADDRESS_704_RESETVAL (0x00000000u)
  40161. #define CSL_CPINTC_VECTOR_ADDRESS_REG_704_RESETVAL (0x00000000u)
  40162. /* vector_address_reg_705 */
  40163. #define CSL_CPINTC_VECTOR_ADDRESS_REG_705_VECTOR_ADDRESS_705_MASK (0xFFFFFFFFu)
  40164. #define CSL_CPINTC_VECTOR_ADDRESS_REG_705_VECTOR_ADDRESS_705_SHIFT (0x00000000u)
  40165. #define CSL_CPINTC_VECTOR_ADDRESS_REG_705_VECTOR_ADDRESS_705_RESETVAL (0x00000000u)
  40166. #define CSL_CPINTC_VECTOR_ADDRESS_REG_705_RESETVAL (0x00000000u)
  40167. /* vector_address_reg_706 */
  40168. #define CSL_CPINTC_VECTOR_ADDRESS_REG_706_VECTOR_ADDRESS_706_MASK (0xFFFFFFFFu)
  40169. #define CSL_CPINTC_VECTOR_ADDRESS_REG_706_VECTOR_ADDRESS_706_SHIFT (0x00000000u)
  40170. #define CSL_CPINTC_VECTOR_ADDRESS_REG_706_VECTOR_ADDRESS_706_RESETVAL (0x00000000u)
  40171. #define CSL_CPINTC_VECTOR_ADDRESS_REG_706_RESETVAL (0x00000000u)
  40172. /* vector_address_reg_707 */
  40173. #define CSL_CPINTC_VECTOR_ADDRESS_REG_707_VECTOR_ADDRESS_707_MASK (0xFFFFFFFFu)
  40174. #define CSL_CPINTC_VECTOR_ADDRESS_REG_707_VECTOR_ADDRESS_707_SHIFT (0x00000000u)
  40175. #define CSL_CPINTC_VECTOR_ADDRESS_REG_707_VECTOR_ADDRESS_707_RESETVAL (0x00000000u)
  40176. #define CSL_CPINTC_VECTOR_ADDRESS_REG_707_RESETVAL (0x00000000u)
  40177. /* vector_address_reg_708 */
  40178. #define CSL_CPINTC_VECTOR_ADDRESS_REG_708_VECTOR_ADDRESS_708_MASK (0xFFFFFFFFu)
  40179. #define CSL_CPINTC_VECTOR_ADDRESS_REG_708_VECTOR_ADDRESS_708_SHIFT (0x00000000u)
  40180. #define CSL_CPINTC_VECTOR_ADDRESS_REG_708_VECTOR_ADDRESS_708_RESETVAL (0x00000000u)
  40181. #define CSL_CPINTC_VECTOR_ADDRESS_REG_708_RESETVAL (0x00000000u)
  40182. /* vector_address_reg_709 */
  40183. #define CSL_CPINTC_VECTOR_ADDRESS_REG_709_VECTOR_ADDRESS_709_MASK (0xFFFFFFFFu)
  40184. #define CSL_CPINTC_VECTOR_ADDRESS_REG_709_VECTOR_ADDRESS_709_SHIFT (0x00000000u)
  40185. #define CSL_CPINTC_VECTOR_ADDRESS_REG_709_VECTOR_ADDRESS_709_RESETVAL (0x00000000u)
  40186. #define CSL_CPINTC_VECTOR_ADDRESS_REG_709_RESETVAL (0x00000000u)
  40187. /* vector_address_reg_710 */
  40188. #define CSL_CPINTC_VECTOR_ADDRESS_REG_710_VECTOR_ADDRESS_710_MASK (0xFFFFFFFFu)
  40189. #define CSL_CPINTC_VECTOR_ADDRESS_REG_710_VECTOR_ADDRESS_710_SHIFT (0x00000000u)
  40190. #define CSL_CPINTC_VECTOR_ADDRESS_REG_710_VECTOR_ADDRESS_710_RESETVAL (0x00000000u)
  40191. #define CSL_CPINTC_VECTOR_ADDRESS_REG_710_RESETVAL (0x00000000u)
  40192. /* vector_address_reg_711 */
  40193. #define CSL_CPINTC_VECTOR_ADDRESS_REG_711_VECTOR_ADDRESS_711_MASK (0xFFFFFFFFu)
  40194. #define CSL_CPINTC_VECTOR_ADDRESS_REG_711_VECTOR_ADDRESS_711_SHIFT (0x00000000u)
  40195. #define CSL_CPINTC_VECTOR_ADDRESS_REG_711_VECTOR_ADDRESS_711_RESETVAL (0x00000000u)
  40196. #define CSL_CPINTC_VECTOR_ADDRESS_REG_711_RESETVAL (0x00000000u)
  40197. /* vector_address_reg_712 */
  40198. #define CSL_CPINTC_VECTOR_ADDRESS_REG_712_VECTOR_ADDRESS_712_MASK (0xFFFFFFFFu)
  40199. #define CSL_CPINTC_VECTOR_ADDRESS_REG_712_VECTOR_ADDRESS_712_SHIFT (0x00000000u)
  40200. #define CSL_CPINTC_VECTOR_ADDRESS_REG_712_VECTOR_ADDRESS_712_RESETVAL (0x00000000u)
  40201. #define CSL_CPINTC_VECTOR_ADDRESS_REG_712_RESETVAL (0x00000000u)
  40202. /* vector_address_reg_713 */
  40203. #define CSL_CPINTC_VECTOR_ADDRESS_REG_713_VECTOR_ADDRESS_713_MASK (0xFFFFFFFFu)
  40204. #define CSL_CPINTC_VECTOR_ADDRESS_REG_713_VECTOR_ADDRESS_713_SHIFT (0x00000000u)
  40205. #define CSL_CPINTC_VECTOR_ADDRESS_REG_713_VECTOR_ADDRESS_713_RESETVAL (0x00000000u)
  40206. #define CSL_CPINTC_VECTOR_ADDRESS_REG_713_RESETVAL (0x00000000u)
  40207. /* vector_address_reg_714 */
  40208. #define CSL_CPINTC_VECTOR_ADDRESS_REG_714_VECTOR_ADDRESS_714_MASK (0xFFFFFFFFu)
  40209. #define CSL_CPINTC_VECTOR_ADDRESS_REG_714_VECTOR_ADDRESS_714_SHIFT (0x00000000u)
  40210. #define CSL_CPINTC_VECTOR_ADDRESS_REG_714_VECTOR_ADDRESS_714_RESETVAL (0x00000000u)
  40211. #define CSL_CPINTC_VECTOR_ADDRESS_REG_714_RESETVAL (0x00000000u)
  40212. /* vector_address_reg_715 */
  40213. #define CSL_CPINTC_VECTOR_ADDRESS_REG_715_VECTOR_ADDRESS_715_MASK (0xFFFFFFFFu)
  40214. #define CSL_CPINTC_VECTOR_ADDRESS_REG_715_VECTOR_ADDRESS_715_SHIFT (0x00000000u)
  40215. #define CSL_CPINTC_VECTOR_ADDRESS_REG_715_VECTOR_ADDRESS_715_RESETVAL (0x00000000u)
  40216. #define CSL_CPINTC_VECTOR_ADDRESS_REG_715_RESETVAL (0x00000000u)
  40217. /* vector_address_reg_716 */
  40218. #define CSL_CPINTC_VECTOR_ADDRESS_REG_716_VECTOR_ADDRESS_716_MASK (0xFFFFFFFFu)
  40219. #define CSL_CPINTC_VECTOR_ADDRESS_REG_716_VECTOR_ADDRESS_716_SHIFT (0x00000000u)
  40220. #define CSL_CPINTC_VECTOR_ADDRESS_REG_716_VECTOR_ADDRESS_716_RESETVAL (0x00000000u)
  40221. #define CSL_CPINTC_VECTOR_ADDRESS_REG_716_RESETVAL (0x00000000u)
  40222. /* vector_address_reg_717 */
  40223. #define CSL_CPINTC_VECTOR_ADDRESS_REG_717_VECTOR_ADDRESS_717_MASK (0xFFFFFFFFu)
  40224. #define CSL_CPINTC_VECTOR_ADDRESS_REG_717_VECTOR_ADDRESS_717_SHIFT (0x00000000u)
  40225. #define CSL_CPINTC_VECTOR_ADDRESS_REG_717_VECTOR_ADDRESS_717_RESETVAL (0x00000000u)
  40226. #define CSL_CPINTC_VECTOR_ADDRESS_REG_717_RESETVAL (0x00000000u)
  40227. /* vector_address_reg_718 */
  40228. #define CSL_CPINTC_VECTOR_ADDRESS_REG_718_VECTOR_ADDRESS_718_MASK (0xFFFFFFFFu)
  40229. #define CSL_CPINTC_VECTOR_ADDRESS_REG_718_VECTOR_ADDRESS_718_SHIFT (0x00000000u)
  40230. #define CSL_CPINTC_VECTOR_ADDRESS_REG_718_VECTOR_ADDRESS_718_RESETVAL (0x00000000u)
  40231. #define CSL_CPINTC_VECTOR_ADDRESS_REG_718_RESETVAL (0x00000000u)
  40232. /* vector_address_reg_719 */
  40233. #define CSL_CPINTC_VECTOR_ADDRESS_REG_719_VECTOR_ADDRESS_719_MASK (0xFFFFFFFFu)
  40234. #define CSL_CPINTC_VECTOR_ADDRESS_REG_719_VECTOR_ADDRESS_719_SHIFT (0x00000000u)
  40235. #define CSL_CPINTC_VECTOR_ADDRESS_REG_719_VECTOR_ADDRESS_719_RESETVAL (0x00000000u)
  40236. #define CSL_CPINTC_VECTOR_ADDRESS_REG_719_RESETVAL (0x00000000u)
  40237. /* vector_address_reg_720 */
  40238. #define CSL_CPINTC_VECTOR_ADDRESS_REG_720_VECTOR_ADDRESS_720_MASK (0xFFFFFFFFu)
  40239. #define CSL_CPINTC_VECTOR_ADDRESS_REG_720_VECTOR_ADDRESS_720_SHIFT (0x00000000u)
  40240. #define CSL_CPINTC_VECTOR_ADDRESS_REG_720_VECTOR_ADDRESS_720_RESETVAL (0x00000000u)
  40241. #define CSL_CPINTC_VECTOR_ADDRESS_REG_720_RESETVAL (0x00000000u)
  40242. /* vector_address_reg_721 */
  40243. #define CSL_CPINTC_VECTOR_ADDRESS_REG_721_VECTOR_ADDRESS_721_MASK (0xFFFFFFFFu)
  40244. #define CSL_CPINTC_VECTOR_ADDRESS_REG_721_VECTOR_ADDRESS_721_SHIFT (0x00000000u)
  40245. #define CSL_CPINTC_VECTOR_ADDRESS_REG_721_VECTOR_ADDRESS_721_RESETVAL (0x00000000u)
  40246. #define CSL_CPINTC_VECTOR_ADDRESS_REG_721_RESETVAL (0x00000000u)
  40247. /* vector_address_reg_722 */
  40248. #define CSL_CPINTC_VECTOR_ADDRESS_REG_722_VECTOR_ADDRESS_722_MASK (0xFFFFFFFFu)
  40249. #define CSL_CPINTC_VECTOR_ADDRESS_REG_722_VECTOR_ADDRESS_722_SHIFT (0x00000000u)
  40250. #define CSL_CPINTC_VECTOR_ADDRESS_REG_722_VECTOR_ADDRESS_722_RESETVAL (0x00000000u)
  40251. #define CSL_CPINTC_VECTOR_ADDRESS_REG_722_RESETVAL (0x00000000u)
  40252. /* vector_address_reg_723 */
  40253. #define CSL_CPINTC_VECTOR_ADDRESS_REG_723_VECTOR_ADDRESS_723_MASK (0xFFFFFFFFu)
  40254. #define CSL_CPINTC_VECTOR_ADDRESS_REG_723_VECTOR_ADDRESS_723_SHIFT (0x00000000u)
  40255. #define CSL_CPINTC_VECTOR_ADDRESS_REG_723_VECTOR_ADDRESS_723_RESETVAL (0x00000000u)
  40256. #define CSL_CPINTC_VECTOR_ADDRESS_REG_723_RESETVAL (0x00000000u)
  40257. /* vector_address_reg_724 */
  40258. #define CSL_CPINTC_VECTOR_ADDRESS_REG_724_VECTOR_ADDRESS_724_MASK (0xFFFFFFFFu)
  40259. #define CSL_CPINTC_VECTOR_ADDRESS_REG_724_VECTOR_ADDRESS_724_SHIFT (0x00000000u)
  40260. #define CSL_CPINTC_VECTOR_ADDRESS_REG_724_VECTOR_ADDRESS_724_RESETVAL (0x00000000u)
  40261. #define CSL_CPINTC_VECTOR_ADDRESS_REG_724_RESETVAL (0x00000000u)
  40262. /* vector_address_reg_725 */
  40263. #define CSL_CPINTC_VECTOR_ADDRESS_REG_725_VECTOR_ADDRESS_725_MASK (0xFFFFFFFFu)
  40264. #define CSL_CPINTC_VECTOR_ADDRESS_REG_725_VECTOR_ADDRESS_725_SHIFT (0x00000000u)
  40265. #define CSL_CPINTC_VECTOR_ADDRESS_REG_725_VECTOR_ADDRESS_725_RESETVAL (0x00000000u)
  40266. #define CSL_CPINTC_VECTOR_ADDRESS_REG_725_RESETVAL (0x00000000u)
  40267. /* vector_address_reg_726 */
  40268. #define CSL_CPINTC_VECTOR_ADDRESS_REG_726_VECTOR_ADDRESS_726_MASK (0xFFFFFFFFu)
  40269. #define CSL_CPINTC_VECTOR_ADDRESS_REG_726_VECTOR_ADDRESS_726_SHIFT (0x00000000u)
  40270. #define CSL_CPINTC_VECTOR_ADDRESS_REG_726_VECTOR_ADDRESS_726_RESETVAL (0x00000000u)
  40271. #define CSL_CPINTC_VECTOR_ADDRESS_REG_726_RESETVAL (0x00000000u)
  40272. /* vector_address_reg_727 */
  40273. #define CSL_CPINTC_VECTOR_ADDRESS_REG_727_VECTOR_ADDRESS_727_MASK (0xFFFFFFFFu)
  40274. #define CSL_CPINTC_VECTOR_ADDRESS_REG_727_VECTOR_ADDRESS_727_SHIFT (0x00000000u)
  40275. #define CSL_CPINTC_VECTOR_ADDRESS_REG_727_VECTOR_ADDRESS_727_RESETVAL (0x00000000u)
  40276. #define CSL_CPINTC_VECTOR_ADDRESS_REG_727_RESETVAL (0x00000000u)
  40277. /* vector_address_reg_728 */
  40278. #define CSL_CPINTC_VECTOR_ADDRESS_REG_728_VECTOR_ADDRESS_728_MASK (0xFFFFFFFFu)
  40279. #define CSL_CPINTC_VECTOR_ADDRESS_REG_728_VECTOR_ADDRESS_728_SHIFT (0x00000000u)
  40280. #define CSL_CPINTC_VECTOR_ADDRESS_REG_728_VECTOR_ADDRESS_728_RESETVAL (0x00000000u)
  40281. #define CSL_CPINTC_VECTOR_ADDRESS_REG_728_RESETVAL (0x00000000u)
  40282. /* vector_address_reg_729 */
  40283. #define CSL_CPINTC_VECTOR_ADDRESS_REG_729_VECTOR_ADDRESS_729_MASK (0xFFFFFFFFu)
  40284. #define CSL_CPINTC_VECTOR_ADDRESS_REG_729_VECTOR_ADDRESS_729_SHIFT (0x00000000u)
  40285. #define CSL_CPINTC_VECTOR_ADDRESS_REG_729_VECTOR_ADDRESS_729_RESETVAL (0x00000000u)
  40286. #define CSL_CPINTC_VECTOR_ADDRESS_REG_729_RESETVAL (0x00000000u)
  40287. /* vector_address_reg_730 */
  40288. #define CSL_CPINTC_VECTOR_ADDRESS_REG_730_VECTOR_ADDRESS_730_MASK (0xFFFFFFFFu)
  40289. #define CSL_CPINTC_VECTOR_ADDRESS_REG_730_VECTOR_ADDRESS_730_SHIFT (0x00000000u)
  40290. #define CSL_CPINTC_VECTOR_ADDRESS_REG_730_VECTOR_ADDRESS_730_RESETVAL (0x00000000u)
  40291. #define CSL_CPINTC_VECTOR_ADDRESS_REG_730_RESETVAL (0x00000000u)
  40292. /* vector_address_reg_731 */
  40293. #define CSL_CPINTC_VECTOR_ADDRESS_REG_731_VECTOR_ADDRESS_731_MASK (0xFFFFFFFFu)
  40294. #define CSL_CPINTC_VECTOR_ADDRESS_REG_731_VECTOR_ADDRESS_731_SHIFT (0x00000000u)
  40295. #define CSL_CPINTC_VECTOR_ADDRESS_REG_731_VECTOR_ADDRESS_731_RESETVAL (0x00000000u)
  40296. #define CSL_CPINTC_VECTOR_ADDRESS_REG_731_RESETVAL (0x00000000u)
  40297. /* vector_address_reg_732 */
  40298. #define CSL_CPINTC_VECTOR_ADDRESS_REG_732_VECTOR_ADDRESS_732_MASK (0xFFFFFFFFu)
  40299. #define CSL_CPINTC_VECTOR_ADDRESS_REG_732_VECTOR_ADDRESS_732_SHIFT (0x00000000u)
  40300. #define CSL_CPINTC_VECTOR_ADDRESS_REG_732_VECTOR_ADDRESS_732_RESETVAL (0x00000000u)
  40301. #define CSL_CPINTC_VECTOR_ADDRESS_REG_732_RESETVAL (0x00000000u)
  40302. /* vector_address_reg_733 */
  40303. #define CSL_CPINTC_VECTOR_ADDRESS_REG_733_VECTOR_ADDRESS_733_MASK (0xFFFFFFFFu)
  40304. #define CSL_CPINTC_VECTOR_ADDRESS_REG_733_VECTOR_ADDRESS_733_SHIFT (0x00000000u)
  40305. #define CSL_CPINTC_VECTOR_ADDRESS_REG_733_VECTOR_ADDRESS_733_RESETVAL (0x00000000u)
  40306. #define CSL_CPINTC_VECTOR_ADDRESS_REG_733_RESETVAL (0x00000000u)
  40307. /* vector_address_reg_734 */
  40308. #define CSL_CPINTC_VECTOR_ADDRESS_REG_734_VECTOR_ADDRESS_734_MASK (0xFFFFFFFFu)
  40309. #define CSL_CPINTC_VECTOR_ADDRESS_REG_734_VECTOR_ADDRESS_734_SHIFT (0x00000000u)
  40310. #define CSL_CPINTC_VECTOR_ADDRESS_REG_734_VECTOR_ADDRESS_734_RESETVAL (0x00000000u)
  40311. #define CSL_CPINTC_VECTOR_ADDRESS_REG_734_RESETVAL (0x00000000u)
  40312. /* vector_address_reg_735 */
  40313. #define CSL_CPINTC_VECTOR_ADDRESS_REG_735_VECTOR_ADDRESS_735_MASK (0xFFFFFFFFu)
  40314. #define CSL_CPINTC_VECTOR_ADDRESS_REG_735_VECTOR_ADDRESS_735_SHIFT (0x00000000u)
  40315. #define CSL_CPINTC_VECTOR_ADDRESS_REG_735_VECTOR_ADDRESS_735_RESETVAL (0x00000000u)
  40316. #define CSL_CPINTC_VECTOR_ADDRESS_REG_735_RESETVAL (0x00000000u)
  40317. /* vector_address_reg_736 */
  40318. #define CSL_CPINTC_VECTOR_ADDRESS_REG_736_VECTOR_ADDRESS_736_MASK (0xFFFFFFFFu)
  40319. #define CSL_CPINTC_VECTOR_ADDRESS_REG_736_VECTOR_ADDRESS_736_SHIFT (0x00000000u)
  40320. #define CSL_CPINTC_VECTOR_ADDRESS_REG_736_VECTOR_ADDRESS_736_RESETVAL (0x00000000u)
  40321. #define CSL_CPINTC_VECTOR_ADDRESS_REG_736_RESETVAL (0x00000000u)
  40322. /* vector_address_reg_737 */
  40323. #define CSL_CPINTC_VECTOR_ADDRESS_REG_737_VECTOR_ADDRESS_737_MASK (0xFFFFFFFFu)
  40324. #define CSL_CPINTC_VECTOR_ADDRESS_REG_737_VECTOR_ADDRESS_737_SHIFT (0x00000000u)
  40325. #define CSL_CPINTC_VECTOR_ADDRESS_REG_737_VECTOR_ADDRESS_737_RESETVAL (0x00000000u)
  40326. #define CSL_CPINTC_VECTOR_ADDRESS_REG_737_RESETVAL (0x00000000u)
  40327. /* vector_address_reg_738 */
  40328. #define CSL_CPINTC_VECTOR_ADDRESS_REG_738_VECTOR_ADDRESS_738_MASK (0xFFFFFFFFu)
  40329. #define CSL_CPINTC_VECTOR_ADDRESS_REG_738_VECTOR_ADDRESS_738_SHIFT (0x00000000u)
  40330. #define CSL_CPINTC_VECTOR_ADDRESS_REG_738_VECTOR_ADDRESS_738_RESETVAL (0x00000000u)
  40331. #define CSL_CPINTC_VECTOR_ADDRESS_REG_738_RESETVAL (0x00000000u)
  40332. /* vector_address_reg_739 */
  40333. #define CSL_CPINTC_VECTOR_ADDRESS_REG_739_VECTOR_ADDRESS_739_MASK (0xFFFFFFFFu)
  40334. #define CSL_CPINTC_VECTOR_ADDRESS_REG_739_VECTOR_ADDRESS_739_SHIFT (0x00000000u)
  40335. #define CSL_CPINTC_VECTOR_ADDRESS_REG_739_VECTOR_ADDRESS_739_RESETVAL (0x00000000u)
  40336. #define CSL_CPINTC_VECTOR_ADDRESS_REG_739_RESETVAL (0x00000000u)
  40337. /* vector_address_reg_740 */
  40338. #define CSL_CPINTC_VECTOR_ADDRESS_REG_740_VECTOR_ADDRESS_740_MASK (0xFFFFFFFFu)
  40339. #define CSL_CPINTC_VECTOR_ADDRESS_REG_740_VECTOR_ADDRESS_740_SHIFT (0x00000000u)
  40340. #define CSL_CPINTC_VECTOR_ADDRESS_REG_740_VECTOR_ADDRESS_740_RESETVAL (0x00000000u)
  40341. #define CSL_CPINTC_VECTOR_ADDRESS_REG_740_RESETVAL (0x00000000u)
  40342. /* vector_address_reg_741 */
  40343. #define CSL_CPINTC_VECTOR_ADDRESS_REG_741_VECTOR_ADDRESS_741_MASK (0xFFFFFFFFu)
  40344. #define CSL_CPINTC_VECTOR_ADDRESS_REG_741_VECTOR_ADDRESS_741_SHIFT (0x00000000u)
  40345. #define CSL_CPINTC_VECTOR_ADDRESS_REG_741_VECTOR_ADDRESS_741_RESETVAL (0x00000000u)
  40346. #define CSL_CPINTC_VECTOR_ADDRESS_REG_741_RESETVAL (0x00000000u)
  40347. /* vector_address_reg_742 */
  40348. #define CSL_CPINTC_VECTOR_ADDRESS_REG_742_VECTOR_ADDRESS_742_MASK (0xFFFFFFFFu)
  40349. #define CSL_CPINTC_VECTOR_ADDRESS_REG_742_VECTOR_ADDRESS_742_SHIFT (0x00000000u)
  40350. #define CSL_CPINTC_VECTOR_ADDRESS_REG_742_VECTOR_ADDRESS_742_RESETVAL (0x00000000u)
  40351. #define CSL_CPINTC_VECTOR_ADDRESS_REG_742_RESETVAL (0x00000000u)
  40352. /* vector_address_reg_743 */
  40353. #define CSL_CPINTC_VECTOR_ADDRESS_REG_743_VECTOR_ADDRESS_743_MASK (0xFFFFFFFFu)
  40354. #define CSL_CPINTC_VECTOR_ADDRESS_REG_743_VECTOR_ADDRESS_743_SHIFT (0x00000000u)
  40355. #define CSL_CPINTC_VECTOR_ADDRESS_REG_743_VECTOR_ADDRESS_743_RESETVAL (0x00000000u)
  40356. #define CSL_CPINTC_VECTOR_ADDRESS_REG_743_RESETVAL (0x00000000u)
  40357. /* vector_address_reg_744 */
  40358. #define CSL_CPINTC_VECTOR_ADDRESS_REG_744_VECTOR_ADDRESS_744_MASK (0xFFFFFFFFu)
  40359. #define CSL_CPINTC_VECTOR_ADDRESS_REG_744_VECTOR_ADDRESS_744_SHIFT (0x00000000u)
  40360. #define CSL_CPINTC_VECTOR_ADDRESS_REG_744_VECTOR_ADDRESS_744_RESETVAL (0x00000000u)
  40361. #define CSL_CPINTC_VECTOR_ADDRESS_REG_744_RESETVAL (0x00000000u)
  40362. /* vector_address_reg_745 */
  40363. #define CSL_CPINTC_VECTOR_ADDRESS_REG_745_VECTOR_ADDRESS_745_MASK (0xFFFFFFFFu)
  40364. #define CSL_CPINTC_VECTOR_ADDRESS_REG_745_VECTOR_ADDRESS_745_SHIFT (0x00000000u)
  40365. #define CSL_CPINTC_VECTOR_ADDRESS_REG_745_VECTOR_ADDRESS_745_RESETVAL (0x00000000u)
  40366. #define CSL_CPINTC_VECTOR_ADDRESS_REG_745_RESETVAL (0x00000000u)
  40367. /* vector_address_reg_746 */
  40368. #define CSL_CPINTC_VECTOR_ADDRESS_REG_746_VECTOR_ADDRESS_746_MASK (0xFFFFFFFFu)
  40369. #define CSL_CPINTC_VECTOR_ADDRESS_REG_746_VECTOR_ADDRESS_746_SHIFT (0x00000000u)
  40370. #define CSL_CPINTC_VECTOR_ADDRESS_REG_746_VECTOR_ADDRESS_746_RESETVAL (0x00000000u)
  40371. #define CSL_CPINTC_VECTOR_ADDRESS_REG_746_RESETVAL (0x00000000u)
  40372. /* vector_address_reg_747 */
  40373. #define CSL_CPINTC_VECTOR_ADDRESS_REG_747_VECTOR_ADDRESS_747_MASK (0xFFFFFFFFu)
  40374. #define CSL_CPINTC_VECTOR_ADDRESS_REG_747_VECTOR_ADDRESS_747_SHIFT (0x00000000u)
  40375. #define CSL_CPINTC_VECTOR_ADDRESS_REG_747_VECTOR_ADDRESS_747_RESETVAL (0x00000000u)
  40376. #define CSL_CPINTC_VECTOR_ADDRESS_REG_747_RESETVAL (0x00000000u)
  40377. /* vector_address_reg_748 */
  40378. #define CSL_CPINTC_VECTOR_ADDRESS_REG_748_VECTOR_ADDRESS_748_MASK (0xFFFFFFFFu)
  40379. #define CSL_CPINTC_VECTOR_ADDRESS_REG_748_VECTOR_ADDRESS_748_SHIFT (0x00000000u)
  40380. #define CSL_CPINTC_VECTOR_ADDRESS_REG_748_VECTOR_ADDRESS_748_RESETVAL (0x00000000u)
  40381. #define CSL_CPINTC_VECTOR_ADDRESS_REG_748_RESETVAL (0x00000000u)
  40382. /* vector_address_reg_749 */
  40383. #define CSL_CPINTC_VECTOR_ADDRESS_REG_749_VECTOR_ADDRESS_749_MASK (0xFFFFFFFFu)
  40384. #define CSL_CPINTC_VECTOR_ADDRESS_REG_749_VECTOR_ADDRESS_749_SHIFT (0x00000000u)
  40385. #define CSL_CPINTC_VECTOR_ADDRESS_REG_749_VECTOR_ADDRESS_749_RESETVAL (0x00000000u)
  40386. #define CSL_CPINTC_VECTOR_ADDRESS_REG_749_RESETVAL (0x00000000u)
  40387. /* vector_address_reg_750 */
  40388. #define CSL_CPINTC_VECTOR_ADDRESS_REG_750_VECTOR_ADDRESS_750_MASK (0xFFFFFFFFu)
  40389. #define CSL_CPINTC_VECTOR_ADDRESS_REG_750_VECTOR_ADDRESS_750_SHIFT (0x00000000u)
  40390. #define CSL_CPINTC_VECTOR_ADDRESS_REG_750_VECTOR_ADDRESS_750_RESETVAL (0x00000000u)
  40391. #define CSL_CPINTC_VECTOR_ADDRESS_REG_750_RESETVAL (0x00000000u)
  40392. /* vector_address_reg_751 */
  40393. #define CSL_CPINTC_VECTOR_ADDRESS_REG_751_VECTOR_ADDRESS_751_MASK (0xFFFFFFFFu)
  40394. #define CSL_CPINTC_VECTOR_ADDRESS_REG_751_VECTOR_ADDRESS_751_SHIFT (0x00000000u)
  40395. #define CSL_CPINTC_VECTOR_ADDRESS_REG_751_VECTOR_ADDRESS_751_RESETVAL (0x00000000u)
  40396. #define CSL_CPINTC_VECTOR_ADDRESS_REG_751_RESETVAL (0x00000000u)
  40397. /* vector_address_reg_752 */
  40398. #define CSL_CPINTC_VECTOR_ADDRESS_REG_752_VECTOR_ADDRESS_752_MASK (0xFFFFFFFFu)
  40399. #define CSL_CPINTC_VECTOR_ADDRESS_REG_752_VECTOR_ADDRESS_752_SHIFT (0x00000000u)
  40400. #define CSL_CPINTC_VECTOR_ADDRESS_REG_752_VECTOR_ADDRESS_752_RESETVAL (0x00000000u)
  40401. #define CSL_CPINTC_VECTOR_ADDRESS_REG_752_RESETVAL (0x00000000u)
  40402. /* vector_address_reg_753 */
  40403. #define CSL_CPINTC_VECTOR_ADDRESS_REG_753_VECTOR_ADDRESS_753_MASK (0xFFFFFFFFu)
  40404. #define CSL_CPINTC_VECTOR_ADDRESS_REG_753_VECTOR_ADDRESS_753_SHIFT (0x00000000u)
  40405. #define CSL_CPINTC_VECTOR_ADDRESS_REG_753_VECTOR_ADDRESS_753_RESETVAL (0x00000000u)
  40406. #define CSL_CPINTC_VECTOR_ADDRESS_REG_753_RESETVAL (0x00000000u)
  40407. /* vector_address_reg_754 */
  40408. #define CSL_CPINTC_VECTOR_ADDRESS_REG_754_VECTOR_ADDRESS_754_MASK (0xFFFFFFFFu)
  40409. #define CSL_CPINTC_VECTOR_ADDRESS_REG_754_VECTOR_ADDRESS_754_SHIFT (0x00000000u)
  40410. #define CSL_CPINTC_VECTOR_ADDRESS_REG_754_VECTOR_ADDRESS_754_RESETVAL (0x00000000u)
  40411. #define CSL_CPINTC_VECTOR_ADDRESS_REG_754_RESETVAL (0x00000000u)
  40412. /* vector_address_reg_755 */
  40413. #define CSL_CPINTC_VECTOR_ADDRESS_REG_755_VECTOR_ADDRESS_755_MASK (0xFFFFFFFFu)
  40414. #define CSL_CPINTC_VECTOR_ADDRESS_REG_755_VECTOR_ADDRESS_755_SHIFT (0x00000000u)
  40415. #define CSL_CPINTC_VECTOR_ADDRESS_REG_755_VECTOR_ADDRESS_755_RESETVAL (0x00000000u)
  40416. #define CSL_CPINTC_VECTOR_ADDRESS_REG_755_RESETVAL (0x00000000u)
  40417. /* vector_address_reg_756 */
  40418. #define CSL_CPINTC_VECTOR_ADDRESS_REG_756_VECTOR_ADDRESS_756_MASK (0xFFFFFFFFu)
  40419. #define CSL_CPINTC_VECTOR_ADDRESS_REG_756_VECTOR_ADDRESS_756_SHIFT (0x00000000u)
  40420. #define CSL_CPINTC_VECTOR_ADDRESS_REG_756_VECTOR_ADDRESS_756_RESETVAL (0x00000000u)
  40421. #define CSL_CPINTC_VECTOR_ADDRESS_REG_756_RESETVAL (0x00000000u)
  40422. /* vector_address_reg_757 */
  40423. #define CSL_CPINTC_VECTOR_ADDRESS_REG_757_VECTOR_ADDRESS_757_MASK (0xFFFFFFFFu)
  40424. #define CSL_CPINTC_VECTOR_ADDRESS_REG_757_VECTOR_ADDRESS_757_SHIFT (0x00000000u)
  40425. #define CSL_CPINTC_VECTOR_ADDRESS_REG_757_VECTOR_ADDRESS_757_RESETVAL (0x00000000u)
  40426. #define CSL_CPINTC_VECTOR_ADDRESS_REG_757_RESETVAL (0x00000000u)
  40427. /* vector_address_reg_758 */
  40428. #define CSL_CPINTC_VECTOR_ADDRESS_REG_758_VECTOR_ADDRESS_758_MASK (0xFFFFFFFFu)
  40429. #define CSL_CPINTC_VECTOR_ADDRESS_REG_758_VECTOR_ADDRESS_758_SHIFT (0x00000000u)
  40430. #define CSL_CPINTC_VECTOR_ADDRESS_REG_758_VECTOR_ADDRESS_758_RESETVAL (0x00000000u)
  40431. #define CSL_CPINTC_VECTOR_ADDRESS_REG_758_RESETVAL (0x00000000u)
  40432. /* vector_address_reg_759 */
  40433. #define CSL_CPINTC_VECTOR_ADDRESS_REG_759_VECTOR_ADDRESS_759_MASK (0xFFFFFFFFu)
  40434. #define CSL_CPINTC_VECTOR_ADDRESS_REG_759_VECTOR_ADDRESS_759_SHIFT (0x00000000u)
  40435. #define CSL_CPINTC_VECTOR_ADDRESS_REG_759_VECTOR_ADDRESS_759_RESETVAL (0x00000000u)
  40436. #define CSL_CPINTC_VECTOR_ADDRESS_REG_759_RESETVAL (0x00000000u)
  40437. /* vector_address_reg_760 */
  40438. #define CSL_CPINTC_VECTOR_ADDRESS_REG_760_VECTOR_ADDRESS_760_MASK (0xFFFFFFFFu)
  40439. #define CSL_CPINTC_VECTOR_ADDRESS_REG_760_VECTOR_ADDRESS_760_SHIFT (0x00000000u)
  40440. #define CSL_CPINTC_VECTOR_ADDRESS_REG_760_VECTOR_ADDRESS_760_RESETVAL (0x00000000u)
  40441. #define CSL_CPINTC_VECTOR_ADDRESS_REG_760_RESETVAL (0x00000000u)
  40442. /* vector_address_reg_761 */
  40443. #define CSL_CPINTC_VECTOR_ADDRESS_REG_761_VECTOR_ADDRESS_761_MASK (0xFFFFFFFFu)
  40444. #define CSL_CPINTC_VECTOR_ADDRESS_REG_761_VECTOR_ADDRESS_761_SHIFT (0x00000000u)
  40445. #define CSL_CPINTC_VECTOR_ADDRESS_REG_761_VECTOR_ADDRESS_761_RESETVAL (0x00000000u)
  40446. #define CSL_CPINTC_VECTOR_ADDRESS_REG_761_RESETVAL (0x00000000u)
  40447. /* vector_address_reg_762 */
  40448. #define CSL_CPINTC_VECTOR_ADDRESS_REG_762_VECTOR_ADDRESS_762_MASK (0xFFFFFFFFu)
  40449. #define CSL_CPINTC_VECTOR_ADDRESS_REG_762_VECTOR_ADDRESS_762_SHIFT (0x00000000u)
  40450. #define CSL_CPINTC_VECTOR_ADDRESS_REG_762_VECTOR_ADDRESS_762_RESETVAL (0x00000000u)
  40451. #define CSL_CPINTC_VECTOR_ADDRESS_REG_762_RESETVAL (0x00000000u)
  40452. /* vector_address_reg_763 */
  40453. #define CSL_CPINTC_VECTOR_ADDRESS_REG_763_VECTOR_ADDRESS_763_MASK (0xFFFFFFFFu)
  40454. #define CSL_CPINTC_VECTOR_ADDRESS_REG_763_VECTOR_ADDRESS_763_SHIFT (0x00000000u)
  40455. #define CSL_CPINTC_VECTOR_ADDRESS_REG_763_VECTOR_ADDRESS_763_RESETVAL (0x00000000u)
  40456. #define CSL_CPINTC_VECTOR_ADDRESS_REG_763_RESETVAL (0x00000000u)
  40457. /* vector_address_reg_764 */
  40458. #define CSL_CPINTC_VECTOR_ADDRESS_REG_764_VECTOR_ADDRESS_764_MASK (0xFFFFFFFFu)
  40459. #define CSL_CPINTC_VECTOR_ADDRESS_REG_764_VECTOR_ADDRESS_764_SHIFT (0x00000000u)
  40460. #define CSL_CPINTC_VECTOR_ADDRESS_REG_764_VECTOR_ADDRESS_764_RESETVAL (0x00000000u)
  40461. #define CSL_CPINTC_VECTOR_ADDRESS_REG_764_RESETVAL (0x00000000u)
  40462. /* vector_address_reg_765 */
  40463. #define CSL_CPINTC_VECTOR_ADDRESS_REG_765_VECTOR_ADDRESS_765_MASK (0xFFFFFFFFu)
  40464. #define CSL_CPINTC_VECTOR_ADDRESS_REG_765_VECTOR_ADDRESS_765_SHIFT (0x00000000u)
  40465. #define CSL_CPINTC_VECTOR_ADDRESS_REG_765_VECTOR_ADDRESS_765_RESETVAL (0x00000000u)
  40466. #define CSL_CPINTC_VECTOR_ADDRESS_REG_765_RESETVAL (0x00000000u)
  40467. /* vector_address_reg_766 */
  40468. #define CSL_CPINTC_VECTOR_ADDRESS_REG_766_VECTOR_ADDRESS_766_MASK (0xFFFFFFFFu)
  40469. #define CSL_CPINTC_VECTOR_ADDRESS_REG_766_VECTOR_ADDRESS_766_SHIFT (0x00000000u)
  40470. #define CSL_CPINTC_VECTOR_ADDRESS_REG_766_VECTOR_ADDRESS_766_RESETVAL (0x00000000u)
  40471. #define CSL_CPINTC_VECTOR_ADDRESS_REG_766_RESETVAL (0x00000000u)
  40472. /* vector_address_reg_767 */
  40473. #define CSL_CPINTC_VECTOR_ADDRESS_REG_767_VECTOR_ADDRESS_767_MASK (0xFFFFFFFFu)
  40474. #define CSL_CPINTC_VECTOR_ADDRESS_REG_767_VECTOR_ADDRESS_767_SHIFT (0x00000000u)
  40475. #define CSL_CPINTC_VECTOR_ADDRESS_REG_767_VECTOR_ADDRESS_767_RESETVAL (0x00000000u)
  40476. #define CSL_CPINTC_VECTOR_ADDRESS_REG_767_RESETVAL (0x00000000u)
  40477. /* vector_address_reg_768 */
  40478. #define CSL_CPINTC_VECTOR_ADDRESS_REG_768_VECTOR_ADDRESS_768_MASK (0xFFFFFFFFu)
  40479. #define CSL_CPINTC_VECTOR_ADDRESS_REG_768_VECTOR_ADDRESS_768_SHIFT (0x00000000u)
  40480. #define CSL_CPINTC_VECTOR_ADDRESS_REG_768_VECTOR_ADDRESS_768_RESETVAL (0x00000000u)
  40481. #define CSL_CPINTC_VECTOR_ADDRESS_REG_768_RESETVAL (0x00000000u)
  40482. /* vector_address_reg_769 */
  40483. #define CSL_CPINTC_VECTOR_ADDRESS_REG_769_VECTOR_ADDRESS_769_MASK (0xFFFFFFFFu)
  40484. #define CSL_CPINTC_VECTOR_ADDRESS_REG_769_VECTOR_ADDRESS_769_SHIFT (0x00000000u)
  40485. #define CSL_CPINTC_VECTOR_ADDRESS_REG_769_VECTOR_ADDRESS_769_RESETVAL (0x00000000u)
  40486. #define CSL_CPINTC_VECTOR_ADDRESS_REG_769_RESETVAL (0x00000000u)
  40487. /* vector_address_reg_770 */
  40488. #define CSL_CPINTC_VECTOR_ADDRESS_REG_770_VECTOR_ADDRESS_770_MASK (0xFFFFFFFFu)
  40489. #define CSL_CPINTC_VECTOR_ADDRESS_REG_770_VECTOR_ADDRESS_770_SHIFT (0x00000000u)
  40490. #define CSL_CPINTC_VECTOR_ADDRESS_REG_770_VECTOR_ADDRESS_770_RESETVAL (0x00000000u)
  40491. #define CSL_CPINTC_VECTOR_ADDRESS_REG_770_RESETVAL (0x00000000u)
  40492. /* vector_address_reg_771 */
  40493. #define CSL_CPINTC_VECTOR_ADDRESS_REG_771_VECTOR_ADDRESS_771_MASK (0xFFFFFFFFu)
  40494. #define CSL_CPINTC_VECTOR_ADDRESS_REG_771_VECTOR_ADDRESS_771_SHIFT (0x00000000u)
  40495. #define CSL_CPINTC_VECTOR_ADDRESS_REG_771_VECTOR_ADDRESS_771_RESETVAL (0x00000000u)
  40496. #define CSL_CPINTC_VECTOR_ADDRESS_REG_771_RESETVAL (0x00000000u)
  40497. /* vector_address_reg_772 */
  40498. #define CSL_CPINTC_VECTOR_ADDRESS_REG_772_VECTOR_ADDRESS_772_MASK (0xFFFFFFFFu)
  40499. #define CSL_CPINTC_VECTOR_ADDRESS_REG_772_VECTOR_ADDRESS_772_SHIFT (0x00000000u)
  40500. #define CSL_CPINTC_VECTOR_ADDRESS_REG_772_VECTOR_ADDRESS_772_RESETVAL (0x00000000u)
  40501. #define CSL_CPINTC_VECTOR_ADDRESS_REG_772_RESETVAL (0x00000000u)
  40502. /* vector_address_reg_773 */
  40503. #define CSL_CPINTC_VECTOR_ADDRESS_REG_773_VECTOR_ADDRESS_773_MASK (0xFFFFFFFFu)
  40504. #define CSL_CPINTC_VECTOR_ADDRESS_REG_773_VECTOR_ADDRESS_773_SHIFT (0x00000000u)
  40505. #define CSL_CPINTC_VECTOR_ADDRESS_REG_773_VECTOR_ADDRESS_773_RESETVAL (0x00000000u)
  40506. #define CSL_CPINTC_VECTOR_ADDRESS_REG_773_RESETVAL (0x00000000u)
  40507. /* vector_address_reg_774 */
  40508. #define CSL_CPINTC_VECTOR_ADDRESS_REG_774_VECTOR_ADDRESS_774_MASK (0xFFFFFFFFu)
  40509. #define CSL_CPINTC_VECTOR_ADDRESS_REG_774_VECTOR_ADDRESS_774_SHIFT (0x00000000u)
  40510. #define CSL_CPINTC_VECTOR_ADDRESS_REG_774_VECTOR_ADDRESS_774_RESETVAL (0x00000000u)
  40511. #define CSL_CPINTC_VECTOR_ADDRESS_REG_774_RESETVAL (0x00000000u)
  40512. /* vector_address_reg_775 */
  40513. #define CSL_CPINTC_VECTOR_ADDRESS_REG_775_VECTOR_ADDRESS_775_MASK (0xFFFFFFFFu)
  40514. #define CSL_CPINTC_VECTOR_ADDRESS_REG_775_VECTOR_ADDRESS_775_SHIFT (0x00000000u)
  40515. #define CSL_CPINTC_VECTOR_ADDRESS_REG_775_VECTOR_ADDRESS_775_RESETVAL (0x00000000u)
  40516. #define CSL_CPINTC_VECTOR_ADDRESS_REG_775_RESETVAL (0x00000000u)
  40517. /* vector_address_reg_776 */
  40518. #define CSL_CPINTC_VECTOR_ADDRESS_REG_776_VECTOR_ADDRESS_776_MASK (0xFFFFFFFFu)
  40519. #define CSL_CPINTC_VECTOR_ADDRESS_REG_776_VECTOR_ADDRESS_776_SHIFT (0x00000000u)
  40520. #define CSL_CPINTC_VECTOR_ADDRESS_REG_776_VECTOR_ADDRESS_776_RESETVAL (0x00000000u)
  40521. #define CSL_CPINTC_VECTOR_ADDRESS_REG_776_RESETVAL (0x00000000u)
  40522. /* vector_address_reg_777 */
  40523. #define CSL_CPINTC_VECTOR_ADDRESS_REG_777_VECTOR_ADDRESS_777_MASK (0xFFFFFFFFu)
  40524. #define CSL_CPINTC_VECTOR_ADDRESS_REG_777_VECTOR_ADDRESS_777_SHIFT (0x00000000u)
  40525. #define CSL_CPINTC_VECTOR_ADDRESS_REG_777_VECTOR_ADDRESS_777_RESETVAL (0x00000000u)
  40526. #define CSL_CPINTC_VECTOR_ADDRESS_REG_777_RESETVAL (0x00000000u)
  40527. /* vector_address_reg_778 */
  40528. #define CSL_CPINTC_VECTOR_ADDRESS_REG_778_VECTOR_ADDRESS_778_MASK (0xFFFFFFFFu)
  40529. #define CSL_CPINTC_VECTOR_ADDRESS_REG_778_VECTOR_ADDRESS_778_SHIFT (0x00000000u)
  40530. #define CSL_CPINTC_VECTOR_ADDRESS_REG_778_VECTOR_ADDRESS_778_RESETVAL (0x00000000u)
  40531. #define CSL_CPINTC_VECTOR_ADDRESS_REG_778_RESETVAL (0x00000000u)
  40532. /* vector_address_reg_779 */
  40533. #define CSL_CPINTC_VECTOR_ADDRESS_REG_779_VECTOR_ADDRESS_779_MASK (0xFFFFFFFFu)
  40534. #define CSL_CPINTC_VECTOR_ADDRESS_REG_779_VECTOR_ADDRESS_779_SHIFT (0x00000000u)
  40535. #define CSL_CPINTC_VECTOR_ADDRESS_REG_779_VECTOR_ADDRESS_779_RESETVAL (0x00000000u)
  40536. #define CSL_CPINTC_VECTOR_ADDRESS_REG_779_RESETVAL (0x00000000u)
  40537. /* vector_address_reg_780 */
  40538. #define CSL_CPINTC_VECTOR_ADDRESS_REG_780_VECTOR_ADDRESS_780_MASK (0xFFFFFFFFu)
  40539. #define CSL_CPINTC_VECTOR_ADDRESS_REG_780_VECTOR_ADDRESS_780_SHIFT (0x00000000u)
  40540. #define CSL_CPINTC_VECTOR_ADDRESS_REG_780_VECTOR_ADDRESS_780_RESETVAL (0x00000000u)
  40541. #define CSL_CPINTC_VECTOR_ADDRESS_REG_780_RESETVAL (0x00000000u)
  40542. /* vector_address_reg_781 */
  40543. #define CSL_CPINTC_VECTOR_ADDRESS_REG_781_VECTOR_ADDRESS_781_MASK (0xFFFFFFFFu)
  40544. #define CSL_CPINTC_VECTOR_ADDRESS_REG_781_VECTOR_ADDRESS_781_SHIFT (0x00000000u)
  40545. #define CSL_CPINTC_VECTOR_ADDRESS_REG_781_VECTOR_ADDRESS_781_RESETVAL (0x00000000u)
  40546. #define CSL_CPINTC_VECTOR_ADDRESS_REG_781_RESETVAL (0x00000000u)
  40547. /* vector_address_reg_782 */
  40548. #define CSL_CPINTC_VECTOR_ADDRESS_REG_782_VECTOR_ADDRESS_782_MASK (0xFFFFFFFFu)
  40549. #define CSL_CPINTC_VECTOR_ADDRESS_REG_782_VECTOR_ADDRESS_782_SHIFT (0x00000000u)
  40550. #define CSL_CPINTC_VECTOR_ADDRESS_REG_782_VECTOR_ADDRESS_782_RESETVAL (0x00000000u)
  40551. #define CSL_CPINTC_VECTOR_ADDRESS_REG_782_RESETVAL (0x00000000u)
  40552. /* vector_address_reg_783 */
  40553. #define CSL_CPINTC_VECTOR_ADDRESS_REG_783_VECTOR_ADDRESS_783_MASK (0xFFFFFFFFu)
  40554. #define CSL_CPINTC_VECTOR_ADDRESS_REG_783_VECTOR_ADDRESS_783_SHIFT (0x00000000u)
  40555. #define CSL_CPINTC_VECTOR_ADDRESS_REG_783_VECTOR_ADDRESS_783_RESETVAL (0x00000000u)
  40556. #define CSL_CPINTC_VECTOR_ADDRESS_REG_783_RESETVAL (0x00000000u)
  40557. /* vector_address_reg_784 */
  40558. #define CSL_CPINTC_VECTOR_ADDRESS_REG_784_VECTOR_ADDRESS_784_MASK (0xFFFFFFFFu)
  40559. #define CSL_CPINTC_VECTOR_ADDRESS_REG_784_VECTOR_ADDRESS_784_SHIFT (0x00000000u)
  40560. #define CSL_CPINTC_VECTOR_ADDRESS_REG_784_VECTOR_ADDRESS_784_RESETVAL (0x00000000u)
  40561. #define CSL_CPINTC_VECTOR_ADDRESS_REG_784_RESETVAL (0x00000000u)
  40562. /* vector_address_reg_785 */
  40563. #define CSL_CPINTC_VECTOR_ADDRESS_REG_785_VECTOR_ADDRESS_785_MASK (0xFFFFFFFFu)
  40564. #define CSL_CPINTC_VECTOR_ADDRESS_REG_785_VECTOR_ADDRESS_785_SHIFT (0x00000000u)
  40565. #define CSL_CPINTC_VECTOR_ADDRESS_REG_785_VECTOR_ADDRESS_785_RESETVAL (0x00000000u)
  40566. #define CSL_CPINTC_VECTOR_ADDRESS_REG_785_RESETVAL (0x00000000u)
  40567. /* vector_address_reg_786 */
  40568. #define CSL_CPINTC_VECTOR_ADDRESS_REG_786_VECTOR_ADDRESS_786_MASK (0xFFFFFFFFu)
  40569. #define CSL_CPINTC_VECTOR_ADDRESS_REG_786_VECTOR_ADDRESS_786_SHIFT (0x00000000u)
  40570. #define CSL_CPINTC_VECTOR_ADDRESS_REG_786_VECTOR_ADDRESS_786_RESETVAL (0x00000000u)
  40571. #define CSL_CPINTC_VECTOR_ADDRESS_REG_786_RESETVAL (0x00000000u)
  40572. /* vector_address_reg_787 */
  40573. #define CSL_CPINTC_VECTOR_ADDRESS_REG_787_VECTOR_ADDRESS_787_MASK (0xFFFFFFFFu)
  40574. #define CSL_CPINTC_VECTOR_ADDRESS_REG_787_VECTOR_ADDRESS_787_SHIFT (0x00000000u)
  40575. #define CSL_CPINTC_VECTOR_ADDRESS_REG_787_VECTOR_ADDRESS_787_RESETVAL (0x00000000u)
  40576. #define CSL_CPINTC_VECTOR_ADDRESS_REG_787_RESETVAL (0x00000000u)
  40577. /* vector_address_reg_788 */
  40578. #define CSL_CPINTC_VECTOR_ADDRESS_REG_788_VECTOR_ADDRESS_788_MASK (0xFFFFFFFFu)
  40579. #define CSL_CPINTC_VECTOR_ADDRESS_REG_788_VECTOR_ADDRESS_788_SHIFT (0x00000000u)
  40580. #define CSL_CPINTC_VECTOR_ADDRESS_REG_788_VECTOR_ADDRESS_788_RESETVAL (0x00000000u)
  40581. #define CSL_CPINTC_VECTOR_ADDRESS_REG_788_RESETVAL (0x00000000u)
  40582. /* vector_address_reg_789 */
  40583. #define CSL_CPINTC_VECTOR_ADDRESS_REG_789_VECTOR_ADDRESS_789_MASK (0xFFFFFFFFu)
  40584. #define CSL_CPINTC_VECTOR_ADDRESS_REG_789_VECTOR_ADDRESS_789_SHIFT (0x00000000u)
  40585. #define CSL_CPINTC_VECTOR_ADDRESS_REG_789_VECTOR_ADDRESS_789_RESETVAL (0x00000000u)
  40586. #define CSL_CPINTC_VECTOR_ADDRESS_REG_789_RESETVAL (0x00000000u)
  40587. /* vector_address_reg_790 */
  40588. #define CSL_CPINTC_VECTOR_ADDRESS_REG_790_VECTOR_ADDRESS_790_MASK (0xFFFFFFFFu)
  40589. #define CSL_CPINTC_VECTOR_ADDRESS_REG_790_VECTOR_ADDRESS_790_SHIFT (0x00000000u)
  40590. #define CSL_CPINTC_VECTOR_ADDRESS_REG_790_VECTOR_ADDRESS_790_RESETVAL (0x00000000u)
  40591. #define CSL_CPINTC_VECTOR_ADDRESS_REG_790_RESETVAL (0x00000000u)
  40592. /* vector_address_reg_791 */
  40593. #define CSL_CPINTC_VECTOR_ADDRESS_REG_791_VECTOR_ADDRESS_791_MASK (0xFFFFFFFFu)
  40594. #define CSL_CPINTC_VECTOR_ADDRESS_REG_791_VECTOR_ADDRESS_791_SHIFT (0x00000000u)
  40595. #define CSL_CPINTC_VECTOR_ADDRESS_REG_791_VECTOR_ADDRESS_791_RESETVAL (0x00000000u)
  40596. #define CSL_CPINTC_VECTOR_ADDRESS_REG_791_RESETVAL (0x00000000u)
  40597. /* vector_address_reg_792 */
  40598. #define CSL_CPINTC_VECTOR_ADDRESS_REG_792_VECTOR_ADDRESS_792_MASK (0xFFFFFFFFu)
  40599. #define CSL_CPINTC_VECTOR_ADDRESS_REG_792_VECTOR_ADDRESS_792_SHIFT (0x00000000u)
  40600. #define CSL_CPINTC_VECTOR_ADDRESS_REG_792_VECTOR_ADDRESS_792_RESETVAL (0x00000000u)
  40601. #define CSL_CPINTC_VECTOR_ADDRESS_REG_792_RESETVAL (0x00000000u)
  40602. /* vector_address_reg_793 */
  40603. #define CSL_CPINTC_VECTOR_ADDRESS_REG_793_VECTOR_ADDRESS_793_MASK (0xFFFFFFFFu)
  40604. #define CSL_CPINTC_VECTOR_ADDRESS_REG_793_VECTOR_ADDRESS_793_SHIFT (0x00000000u)
  40605. #define CSL_CPINTC_VECTOR_ADDRESS_REG_793_VECTOR_ADDRESS_793_RESETVAL (0x00000000u)
  40606. #define CSL_CPINTC_VECTOR_ADDRESS_REG_793_RESETVAL (0x00000000u)
  40607. /* vector_address_reg_794 */
  40608. #define CSL_CPINTC_VECTOR_ADDRESS_REG_794_VECTOR_ADDRESS_794_MASK (0xFFFFFFFFu)
  40609. #define CSL_CPINTC_VECTOR_ADDRESS_REG_794_VECTOR_ADDRESS_794_SHIFT (0x00000000u)
  40610. #define CSL_CPINTC_VECTOR_ADDRESS_REG_794_VECTOR_ADDRESS_794_RESETVAL (0x00000000u)
  40611. #define CSL_CPINTC_VECTOR_ADDRESS_REG_794_RESETVAL (0x00000000u)
  40612. /* vector_address_reg_795 */
  40613. #define CSL_CPINTC_VECTOR_ADDRESS_REG_795_VECTOR_ADDRESS_795_MASK (0xFFFFFFFFu)
  40614. #define CSL_CPINTC_VECTOR_ADDRESS_REG_795_VECTOR_ADDRESS_795_SHIFT (0x00000000u)
  40615. #define CSL_CPINTC_VECTOR_ADDRESS_REG_795_VECTOR_ADDRESS_795_RESETVAL (0x00000000u)
  40616. #define CSL_CPINTC_VECTOR_ADDRESS_REG_795_RESETVAL (0x00000000u)
  40617. /* vector_address_reg_796 */
  40618. #define CSL_CPINTC_VECTOR_ADDRESS_REG_796_VECTOR_ADDRESS_796_MASK (0xFFFFFFFFu)
  40619. #define CSL_CPINTC_VECTOR_ADDRESS_REG_796_VECTOR_ADDRESS_796_SHIFT (0x00000000u)
  40620. #define CSL_CPINTC_VECTOR_ADDRESS_REG_796_VECTOR_ADDRESS_796_RESETVAL (0x00000000u)
  40621. #define CSL_CPINTC_VECTOR_ADDRESS_REG_796_RESETVAL (0x00000000u)
  40622. /* vector_address_reg_797 */
  40623. #define CSL_CPINTC_VECTOR_ADDRESS_REG_797_VECTOR_ADDRESS_797_MASK (0xFFFFFFFFu)
  40624. #define CSL_CPINTC_VECTOR_ADDRESS_REG_797_VECTOR_ADDRESS_797_SHIFT (0x00000000u)
  40625. #define CSL_CPINTC_VECTOR_ADDRESS_REG_797_VECTOR_ADDRESS_797_RESETVAL (0x00000000u)
  40626. #define CSL_CPINTC_VECTOR_ADDRESS_REG_797_RESETVAL (0x00000000u)
  40627. /* vector_address_reg_798 */
  40628. #define CSL_CPINTC_VECTOR_ADDRESS_REG_798_VECTOR_ADDRESS_798_MASK (0xFFFFFFFFu)
  40629. #define CSL_CPINTC_VECTOR_ADDRESS_REG_798_VECTOR_ADDRESS_798_SHIFT (0x00000000u)
  40630. #define CSL_CPINTC_VECTOR_ADDRESS_REG_798_VECTOR_ADDRESS_798_RESETVAL (0x00000000u)
  40631. #define CSL_CPINTC_VECTOR_ADDRESS_REG_798_RESETVAL (0x00000000u)
  40632. /* vector_address_reg_799 */
  40633. #define CSL_CPINTC_VECTOR_ADDRESS_REG_799_VECTOR_ADDRESS_799_MASK (0xFFFFFFFFu)
  40634. #define CSL_CPINTC_VECTOR_ADDRESS_REG_799_VECTOR_ADDRESS_799_SHIFT (0x00000000u)
  40635. #define CSL_CPINTC_VECTOR_ADDRESS_REG_799_VECTOR_ADDRESS_799_RESETVAL (0x00000000u)
  40636. #define CSL_CPINTC_VECTOR_ADDRESS_REG_799_RESETVAL (0x00000000u)
  40637. /* vector_address_reg_800 */
  40638. #define CSL_CPINTC_VECTOR_ADDRESS_REG_800_VECTOR_ADDRESS_800_MASK (0xFFFFFFFFu)
  40639. #define CSL_CPINTC_VECTOR_ADDRESS_REG_800_VECTOR_ADDRESS_800_SHIFT (0x00000000u)
  40640. #define CSL_CPINTC_VECTOR_ADDRESS_REG_800_VECTOR_ADDRESS_800_RESETVAL (0x00000000u)
  40641. #define CSL_CPINTC_VECTOR_ADDRESS_REG_800_RESETVAL (0x00000000u)
  40642. /* vector_address_reg_801 */
  40643. #define CSL_CPINTC_VECTOR_ADDRESS_REG_801_VECTOR_ADDRESS_801_MASK (0xFFFFFFFFu)
  40644. #define CSL_CPINTC_VECTOR_ADDRESS_REG_801_VECTOR_ADDRESS_801_SHIFT (0x00000000u)
  40645. #define CSL_CPINTC_VECTOR_ADDRESS_REG_801_VECTOR_ADDRESS_801_RESETVAL (0x00000000u)
  40646. #define CSL_CPINTC_VECTOR_ADDRESS_REG_801_RESETVAL (0x00000000u)
  40647. /* vector_address_reg_802 */
  40648. #define CSL_CPINTC_VECTOR_ADDRESS_REG_802_VECTOR_ADDRESS_802_MASK (0xFFFFFFFFu)
  40649. #define CSL_CPINTC_VECTOR_ADDRESS_REG_802_VECTOR_ADDRESS_802_SHIFT (0x00000000u)
  40650. #define CSL_CPINTC_VECTOR_ADDRESS_REG_802_VECTOR_ADDRESS_802_RESETVAL (0x00000000u)
  40651. #define CSL_CPINTC_VECTOR_ADDRESS_REG_802_RESETVAL (0x00000000u)
  40652. /* vector_address_reg_803 */
  40653. #define CSL_CPINTC_VECTOR_ADDRESS_REG_803_VECTOR_ADDRESS_803_MASK (0xFFFFFFFFu)
  40654. #define CSL_CPINTC_VECTOR_ADDRESS_REG_803_VECTOR_ADDRESS_803_SHIFT (0x00000000u)
  40655. #define CSL_CPINTC_VECTOR_ADDRESS_REG_803_VECTOR_ADDRESS_803_RESETVAL (0x00000000u)
  40656. #define CSL_CPINTC_VECTOR_ADDRESS_REG_803_RESETVAL (0x00000000u)
  40657. /* vector_address_reg_804 */
  40658. #define CSL_CPINTC_VECTOR_ADDRESS_REG_804_VECTOR_ADDRESS_804_MASK (0xFFFFFFFFu)
  40659. #define CSL_CPINTC_VECTOR_ADDRESS_REG_804_VECTOR_ADDRESS_804_SHIFT (0x00000000u)
  40660. #define CSL_CPINTC_VECTOR_ADDRESS_REG_804_VECTOR_ADDRESS_804_RESETVAL (0x00000000u)
  40661. #define CSL_CPINTC_VECTOR_ADDRESS_REG_804_RESETVAL (0x00000000u)
  40662. /* vector_address_reg_805 */
  40663. #define CSL_CPINTC_VECTOR_ADDRESS_REG_805_VECTOR_ADDRESS_805_MASK (0xFFFFFFFFu)
  40664. #define CSL_CPINTC_VECTOR_ADDRESS_REG_805_VECTOR_ADDRESS_805_SHIFT (0x00000000u)
  40665. #define CSL_CPINTC_VECTOR_ADDRESS_REG_805_VECTOR_ADDRESS_805_RESETVAL (0x00000000u)
  40666. #define CSL_CPINTC_VECTOR_ADDRESS_REG_805_RESETVAL (0x00000000u)
  40667. /* vector_address_reg_806 */
  40668. #define CSL_CPINTC_VECTOR_ADDRESS_REG_806_VECTOR_ADDRESS_806_MASK (0xFFFFFFFFu)
  40669. #define CSL_CPINTC_VECTOR_ADDRESS_REG_806_VECTOR_ADDRESS_806_SHIFT (0x00000000u)
  40670. #define CSL_CPINTC_VECTOR_ADDRESS_REG_806_VECTOR_ADDRESS_806_RESETVAL (0x00000000u)
  40671. #define CSL_CPINTC_VECTOR_ADDRESS_REG_806_RESETVAL (0x00000000u)
  40672. /* vector_address_reg_807 */
  40673. #define CSL_CPINTC_VECTOR_ADDRESS_REG_807_VECTOR_ADDRESS_807_MASK (0xFFFFFFFFu)
  40674. #define CSL_CPINTC_VECTOR_ADDRESS_REG_807_VECTOR_ADDRESS_807_SHIFT (0x00000000u)
  40675. #define CSL_CPINTC_VECTOR_ADDRESS_REG_807_VECTOR_ADDRESS_807_RESETVAL (0x00000000u)
  40676. #define CSL_CPINTC_VECTOR_ADDRESS_REG_807_RESETVAL (0x00000000u)
  40677. /* vector_address_reg_808 */
  40678. #define CSL_CPINTC_VECTOR_ADDRESS_REG_808_VECTOR_ADDRESS_808_MASK (0xFFFFFFFFu)
  40679. #define CSL_CPINTC_VECTOR_ADDRESS_REG_808_VECTOR_ADDRESS_808_SHIFT (0x00000000u)
  40680. #define CSL_CPINTC_VECTOR_ADDRESS_REG_808_VECTOR_ADDRESS_808_RESETVAL (0x00000000u)
  40681. #define CSL_CPINTC_VECTOR_ADDRESS_REG_808_RESETVAL (0x00000000u)
  40682. /* vector_address_reg_809 */
  40683. #define CSL_CPINTC_VECTOR_ADDRESS_REG_809_VECTOR_ADDRESS_809_MASK (0xFFFFFFFFu)
  40684. #define CSL_CPINTC_VECTOR_ADDRESS_REG_809_VECTOR_ADDRESS_809_SHIFT (0x00000000u)
  40685. #define CSL_CPINTC_VECTOR_ADDRESS_REG_809_VECTOR_ADDRESS_809_RESETVAL (0x00000000u)
  40686. #define CSL_CPINTC_VECTOR_ADDRESS_REG_809_RESETVAL (0x00000000u)
  40687. /* vector_address_reg_810 */
  40688. #define CSL_CPINTC_VECTOR_ADDRESS_REG_810_VECTOR_ADDRESS_810_MASK (0xFFFFFFFFu)
  40689. #define CSL_CPINTC_VECTOR_ADDRESS_REG_810_VECTOR_ADDRESS_810_SHIFT (0x00000000u)
  40690. #define CSL_CPINTC_VECTOR_ADDRESS_REG_810_VECTOR_ADDRESS_810_RESETVAL (0x00000000u)
  40691. #define CSL_CPINTC_VECTOR_ADDRESS_REG_810_RESETVAL (0x00000000u)
  40692. /* vector_address_reg_811 */
  40693. #define CSL_CPINTC_VECTOR_ADDRESS_REG_811_VECTOR_ADDRESS_811_MASK (0xFFFFFFFFu)
  40694. #define CSL_CPINTC_VECTOR_ADDRESS_REG_811_VECTOR_ADDRESS_811_SHIFT (0x00000000u)
  40695. #define CSL_CPINTC_VECTOR_ADDRESS_REG_811_VECTOR_ADDRESS_811_RESETVAL (0x00000000u)
  40696. #define CSL_CPINTC_VECTOR_ADDRESS_REG_811_RESETVAL (0x00000000u)
  40697. /* vector_address_reg_812 */
  40698. #define CSL_CPINTC_VECTOR_ADDRESS_REG_812_VECTOR_ADDRESS_812_MASK (0xFFFFFFFFu)
  40699. #define CSL_CPINTC_VECTOR_ADDRESS_REG_812_VECTOR_ADDRESS_812_SHIFT (0x00000000u)
  40700. #define CSL_CPINTC_VECTOR_ADDRESS_REG_812_VECTOR_ADDRESS_812_RESETVAL (0x00000000u)
  40701. #define CSL_CPINTC_VECTOR_ADDRESS_REG_812_RESETVAL (0x00000000u)
  40702. /* vector_address_reg_813 */
  40703. #define CSL_CPINTC_VECTOR_ADDRESS_REG_813_VECTOR_ADDRESS_813_MASK (0xFFFFFFFFu)
  40704. #define CSL_CPINTC_VECTOR_ADDRESS_REG_813_VECTOR_ADDRESS_813_SHIFT (0x00000000u)
  40705. #define CSL_CPINTC_VECTOR_ADDRESS_REG_813_VECTOR_ADDRESS_813_RESETVAL (0x00000000u)
  40706. #define CSL_CPINTC_VECTOR_ADDRESS_REG_813_RESETVAL (0x00000000u)
  40707. /* vector_address_reg_814 */
  40708. #define CSL_CPINTC_VECTOR_ADDRESS_REG_814_VECTOR_ADDRESS_814_MASK (0xFFFFFFFFu)
  40709. #define CSL_CPINTC_VECTOR_ADDRESS_REG_814_VECTOR_ADDRESS_814_SHIFT (0x00000000u)
  40710. #define CSL_CPINTC_VECTOR_ADDRESS_REG_814_VECTOR_ADDRESS_814_RESETVAL (0x00000000u)
  40711. #define CSL_CPINTC_VECTOR_ADDRESS_REG_814_RESETVAL (0x00000000u)
  40712. /* vector_address_reg_815 */
  40713. #define CSL_CPINTC_VECTOR_ADDRESS_REG_815_VECTOR_ADDRESS_815_MASK (0xFFFFFFFFu)
  40714. #define CSL_CPINTC_VECTOR_ADDRESS_REG_815_VECTOR_ADDRESS_815_SHIFT (0x00000000u)
  40715. #define CSL_CPINTC_VECTOR_ADDRESS_REG_815_VECTOR_ADDRESS_815_RESETVAL (0x00000000u)
  40716. #define CSL_CPINTC_VECTOR_ADDRESS_REG_815_RESETVAL (0x00000000u)
  40717. /* vector_address_reg_816 */
  40718. #define CSL_CPINTC_VECTOR_ADDRESS_REG_816_VECTOR_ADDRESS_816_MASK (0xFFFFFFFFu)
  40719. #define CSL_CPINTC_VECTOR_ADDRESS_REG_816_VECTOR_ADDRESS_816_SHIFT (0x00000000u)
  40720. #define CSL_CPINTC_VECTOR_ADDRESS_REG_816_VECTOR_ADDRESS_816_RESETVAL (0x00000000u)
  40721. #define CSL_CPINTC_VECTOR_ADDRESS_REG_816_RESETVAL (0x00000000u)
  40722. /* vector_address_reg_817 */
  40723. #define CSL_CPINTC_VECTOR_ADDRESS_REG_817_VECTOR_ADDRESS_817_MASK (0xFFFFFFFFu)
  40724. #define CSL_CPINTC_VECTOR_ADDRESS_REG_817_VECTOR_ADDRESS_817_SHIFT (0x00000000u)
  40725. #define CSL_CPINTC_VECTOR_ADDRESS_REG_817_VECTOR_ADDRESS_817_RESETVAL (0x00000000u)
  40726. #define CSL_CPINTC_VECTOR_ADDRESS_REG_817_RESETVAL (0x00000000u)
  40727. /* vector_address_reg_818 */
  40728. #define CSL_CPINTC_VECTOR_ADDRESS_REG_818_VECTOR_ADDRESS_818_MASK (0xFFFFFFFFu)
  40729. #define CSL_CPINTC_VECTOR_ADDRESS_REG_818_VECTOR_ADDRESS_818_SHIFT (0x00000000u)
  40730. #define CSL_CPINTC_VECTOR_ADDRESS_REG_818_VECTOR_ADDRESS_818_RESETVAL (0x00000000u)
  40731. #define CSL_CPINTC_VECTOR_ADDRESS_REG_818_RESETVAL (0x00000000u)
  40732. /* vector_address_reg_819 */
  40733. #define CSL_CPINTC_VECTOR_ADDRESS_REG_819_VECTOR_ADDRESS_819_MASK (0xFFFFFFFFu)
  40734. #define CSL_CPINTC_VECTOR_ADDRESS_REG_819_VECTOR_ADDRESS_819_SHIFT (0x00000000u)
  40735. #define CSL_CPINTC_VECTOR_ADDRESS_REG_819_VECTOR_ADDRESS_819_RESETVAL (0x00000000u)
  40736. #define CSL_CPINTC_VECTOR_ADDRESS_REG_819_RESETVAL (0x00000000u)
  40737. /* vector_address_reg_820 */
  40738. #define CSL_CPINTC_VECTOR_ADDRESS_REG_820_VECTOR_ADDRESS_820_MASK (0xFFFFFFFFu)
  40739. #define CSL_CPINTC_VECTOR_ADDRESS_REG_820_VECTOR_ADDRESS_820_SHIFT (0x00000000u)
  40740. #define CSL_CPINTC_VECTOR_ADDRESS_REG_820_VECTOR_ADDRESS_820_RESETVAL (0x00000000u)
  40741. #define CSL_CPINTC_VECTOR_ADDRESS_REG_820_RESETVAL (0x00000000u)
  40742. /* vector_address_reg_821 */
  40743. #define CSL_CPINTC_VECTOR_ADDRESS_REG_821_VECTOR_ADDRESS_821_MASK (0xFFFFFFFFu)
  40744. #define CSL_CPINTC_VECTOR_ADDRESS_REG_821_VECTOR_ADDRESS_821_SHIFT (0x00000000u)
  40745. #define CSL_CPINTC_VECTOR_ADDRESS_REG_821_VECTOR_ADDRESS_821_RESETVAL (0x00000000u)
  40746. #define CSL_CPINTC_VECTOR_ADDRESS_REG_821_RESETVAL (0x00000000u)
  40747. /* vector_address_reg_822 */
  40748. #define CSL_CPINTC_VECTOR_ADDRESS_REG_822_VECTOR_ADDRESS_822_MASK (0xFFFFFFFFu)
  40749. #define CSL_CPINTC_VECTOR_ADDRESS_REG_822_VECTOR_ADDRESS_822_SHIFT (0x00000000u)
  40750. #define CSL_CPINTC_VECTOR_ADDRESS_REG_822_VECTOR_ADDRESS_822_RESETVAL (0x00000000u)
  40751. #define CSL_CPINTC_VECTOR_ADDRESS_REG_822_RESETVAL (0x00000000u)
  40752. /* vector_address_reg_823 */
  40753. #define CSL_CPINTC_VECTOR_ADDRESS_REG_823_VECTOR_ADDRESS_823_MASK (0xFFFFFFFFu)
  40754. #define CSL_CPINTC_VECTOR_ADDRESS_REG_823_VECTOR_ADDRESS_823_SHIFT (0x00000000u)
  40755. #define CSL_CPINTC_VECTOR_ADDRESS_REG_823_VECTOR_ADDRESS_823_RESETVAL (0x00000000u)
  40756. #define CSL_CPINTC_VECTOR_ADDRESS_REG_823_RESETVAL (0x00000000u)
  40757. /* vector_address_reg_824 */
  40758. #define CSL_CPINTC_VECTOR_ADDRESS_REG_824_VECTOR_ADDRESS_824_MASK (0xFFFFFFFFu)
  40759. #define CSL_CPINTC_VECTOR_ADDRESS_REG_824_VECTOR_ADDRESS_824_SHIFT (0x00000000u)
  40760. #define CSL_CPINTC_VECTOR_ADDRESS_REG_824_VECTOR_ADDRESS_824_RESETVAL (0x00000000u)
  40761. #define CSL_CPINTC_VECTOR_ADDRESS_REG_824_RESETVAL (0x00000000u)
  40762. /* vector_address_reg_825 */
  40763. #define CSL_CPINTC_VECTOR_ADDRESS_REG_825_VECTOR_ADDRESS_825_MASK (0xFFFFFFFFu)
  40764. #define CSL_CPINTC_VECTOR_ADDRESS_REG_825_VECTOR_ADDRESS_825_SHIFT (0x00000000u)
  40765. #define CSL_CPINTC_VECTOR_ADDRESS_REG_825_VECTOR_ADDRESS_825_RESETVAL (0x00000000u)
  40766. #define CSL_CPINTC_VECTOR_ADDRESS_REG_825_RESETVAL (0x00000000u)
  40767. /* vector_address_reg_826 */
  40768. #define CSL_CPINTC_VECTOR_ADDRESS_REG_826_VECTOR_ADDRESS_826_MASK (0xFFFFFFFFu)
  40769. #define CSL_CPINTC_VECTOR_ADDRESS_REG_826_VECTOR_ADDRESS_826_SHIFT (0x00000000u)
  40770. #define CSL_CPINTC_VECTOR_ADDRESS_REG_826_VECTOR_ADDRESS_826_RESETVAL (0x00000000u)
  40771. #define CSL_CPINTC_VECTOR_ADDRESS_REG_826_RESETVAL (0x00000000u)
  40772. /* vector_address_reg_827 */
  40773. #define CSL_CPINTC_VECTOR_ADDRESS_REG_827_VECTOR_ADDRESS_827_MASK (0xFFFFFFFFu)
  40774. #define CSL_CPINTC_VECTOR_ADDRESS_REG_827_VECTOR_ADDRESS_827_SHIFT (0x00000000u)
  40775. #define CSL_CPINTC_VECTOR_ADDRESS_REG_827_VECTOR_ADDRESS_827_RESETVAL (0x00000000u)
  40776. #define CSL_CPINTC_VECTOR_ADDRESS_REG_827_RESETVAL (0x00000000u)
  40777. /* vector_address_reg_828 */
  40778. #define CSL_CPINTC_VECTOR_ADDRESS_REG_828_VECTOR_ADDRESS_828_MASK (0xFFFFFFFFu)
  40779. #define CSL_CPINTC_VECTOR_ADDRESS_REG_828_VECTOR_ADDRESS_828_SHIFT (0x00000000u)
  40780. #define CSL_CPINTC_VECTOR_ADDRESS_REG_828_VECTOR_ADDRESS_828_RESETVAL (0x00000000u)
  40781. #define CSL_CPINTC_VECTOR_ADDRESS_REG_828_RESETVAL (0x00000000u)
  40782. /* vector_address_reg_829 */
  40783. #define CSL_CPINTC_VECTOR_ADDRESS_REG_829_VECTOR_ADDRESS_829_MASK (0xFFFFFFFFu)
  40784. #define CSL_CPINTC_VECTOR_ADDRESS_REG_829_VECTOR_ADDRESS_829_SHIFT (0x00000000u)
  40785. #define CSL_CPINTC_VECTOR_ADDRESS_REG_829_VECTOR_ADDRESS_829_RESETVAL (0x00000000u)
  40786. #define CSL_CPINTC_VECTOR_ADDRESS_REG_829_RESETVAL (0x00000000u)
  40787. /* vector_address_reg_830 */
  40788. #define CSL_CPINTC_VECTOR_ADDRESS_REG_830_VECTOR_ADDRESS_830_MASK (0xFFFFFFFFu)
  40789. #define CSL_CPINTC_VECTOR_ADDRESS_REG_830_VECTOR_ADDRESS_830_SHIFT (0x00000000u)
  40790. #define CSL_CPINTC_VECTOR_ADDRESS_REG_830_VECTOR_ADDRESS_830_RESETVAL (0x00000000u)
  40791. #define CSL_CPINTC_VECTOR_ADDRESS_REG_830_RESETVAL (0x00000000u)
  40792. /* vector_address_reg_831 */
  40793. #define CSL_CPINTC_VECTOR_ADDRESS_REG_831_VECTOR_ADDRESS_831_MASK (0xFFFFFFFFu)
  40794. #define CSL_CPINTC_VECTOR_ADDRESS_REG_831_VECTOR_ADDRESS_831_SHIFT (0x00000000u)
  40795. #define CSL_CPINTC_VECTOR_ADDRESS_REG_831_VECTOR_ADDRESS_831_RESETVAL (0x00000000u)
  40796. #define CSL_CPINTC_VECTOR_ADDRESS_REG_831_RESETVAL (0x00000000u)
  40797. /* vector_address_reg_832 */
  40798. #define CSL_CPINTC_VECTOR_ADDRESS_REG_832_VECTOR_ADDRESS_832_MASK (0xFFFFFFFFu)
  40799. #define CSL_CPINTC_VECTOR_ADDRESS_REG_832_VECTOR_ADDRESS_832_SHIFT (0x00000000u)
  40800. #define CSL_CPINTC_VECTOR_ADDRESS_REG_832_VECTOR_ADDRESS_832_RESETVAL (0x00000000u)
  40801. #define CSL_CPINTC_VECTOR_ADDRESS_REG_832_RESETVAL (0x00000000u)
  40802. /* vector_address_reg_833 */
  40803. #define CSL_CPINTC_VECTOR_ADDRESS_REG_833_VECTOR_ADDRESS_833_MASK (0xFFFFFFFFu)
  40804. #define CSL_CPINTC_VECTOR_ADDRESS_REG_833_VECTOR_ADDRESS_833_SHIFT (0x00000000u)
  40805. #define CSL_CPINTC_VECTOR_ADDRESS_REG_833_VECTOR_ADDRESS_833_RESETVAL (0x00000000u)
  40806. #define CSL_CPINTC_VECTOR_ADDRESS_REG_833_RESETVAL (0x00000000u)
  40807. /* vector_address_reg_834 */
  40808. #define CSL_CPINTC_VECTOR_ADDRESS_REG_834_VECTOR_ADDRESS_834_MASK (0xFFFFFFFFu)
  40809. #define CSL_CPINTC_VECTOR_ADDRESS_REG_834_VECTOR_ADDRESS_834_SHIFT (0x00000000u)
  40810. #define CSL_CPINTC_VECTOR_ADDRESS_REG_834_VECTOR_ADDRESS_834_RESETVAL (0x00000000u)
  40811. #define CSL_CPINTC_VECTOR_ADDRESS_REG_834_RESETVAL (0x00000000u)
  40812. /* vector_address_reg_835 */
  40813. #define CSL_CPINTC_VECTOR_ADDRESS_REG_835_VECTOR_ADDRESS_835_MASK (0xFFFFFFFFu)
  40814. #define CSL_CPINTC_VECTOR_ADDRESS_REG_835_VECTOR_ADDRESS_835_SHIFT (0x00000000u)
  40815. #define CSL_CPINTC_VECTOR_ADDRESS_REG_835_VECTOR_ADDRESS_835_RESETVAL (0x00000000u)
  40816. #define CSL_CPINTC_VECTOR_ADDRESS_REG_835_RESETVAL (0x00000000u)
  40817. /* vector_address_reg_836 */
  40818. #define CSL_CPINTC_VECTOR_ADDRESS_REG_836_VECTOR_ADDRESS_836_MASK (0xFFFFFFFFu)
  40819. #define CSL_CPINTC_VECTOR_ADDRESS_REG_836_VECTOR_ADDRESS_836_SHIFT (0x00000000u)
  40820. #define CSL_CPINTC_VECTOR_ADDRESS_REG_836_VECTOR_ADDRESS_836_RESETVAL (0x00000000u)
  40821. #define CSL_CPINTC_VECTOR_ADDRESS_REG_836_RESETVAL (0x00000000u)
  40822. /* vector_address_reg_837 */
  40823. #define CSL_CPINTC_VECTOR_ADDRESS_REG_837_VECTOR_ADDRESS_837_MASK (0xFFFFFFFFu)
  40824. #define CSL_CPINTC_VECTOR_ADDRESS_REG_837_VECTOR_ADDRESS_837_SHIFT (0x00000000u)
  40825. #define CSL_CPINTC_VECTOR_ADDRESS_REG_837_VECTOR_ADDRESS_837_RESETVAL (0x00000000u)
  40826. #define CSL_CPINTC_VECTOR_ADDRESS_REG_837_RESETVAL (0x00000000u)
  40827. /* vector_address_reg_838 */
  40828. #define CSL_CPINTC_VECTOR_ADDRESS_REG_838_VECTOR_ADDRESS_838_MASK (0xFFFFFFFFu)
  40829. #define CSL_CPINTC_VECTOR_ADDRESS_REG_838_VECTOR_ADDRESS_838_SHIFT (0x00000000u)
  40830. #define CSL_CPINTC_VECTOR_ADDRESS_REG_838_VECTOR_ADDRESS_838_RESETVAL (0x00000000u)
  40831. #define CSL_CPINTC_VECTOR_ADDRESS_REG_838_RESETVAL (0x00000000u)
  40832. /* vector_address_reg_839 */
  40833. #define CSL_CPINTC_VECTOR_ADDRESS_REG_839_VECTOR_ADDRESS_839_MASK (0xFFFFFFFFu)
  40834. #define CSL_CPINTC_VECTOR_ADDRESS_REG_839_VECTOR_ADDRESS_839_SHIFT (0x00000000u)
  40835. #define CSL_CPINTC_VECTOR_ADDRESS_REG_839_VECTOR_ADDRESS_839_RESETVAL (0x00000000u)
  40836. #define CSL_CPINTC_VECTOR_ADDRESS_REG_839_RESETVAL (0x00000000u)
  40837. /* vector_address_reg_840 */
  40838. #define CSL_CPINTC_VECTOR_ADDRESS_REG_840_VECTOR_ADDRESS_840_MASK (0xFFFFFFFFu)
  40839. #define CSL_CPINTC_VECTOR_ADDRESS_REG_840_VECTOR_ADDRESS_840_SHIFT (0x00000000u)
  40840. #define CSL_CPINTC_VECTOR_ADDRESS_REG_840_VECTOR_ADDRESS_840_RESETVAL (0x00000000u)
  40841. #define CSL_CPINTC_VECTOR_ADDRESS_REG_840_RESETVAL (0x00000000u)
  40842. /* vector_address_reg_841 */
  40843. #define CSL_CPINTC_VECTOR_ADDRESS_REG_841_VECTOR_ADDRESS_841_MASK (0xFFFFFFFFu)
  40844. #define CSL_CPINTC_VECTOR_ADDRESS_REG_841_VECTOR_ADDRESS_841_SHIFT (0x00000000u)
  40845. #define CSL_CPINTC_VECTOR_ADDRESS_REG_841_VECTOR_ADDRESS_841_RESETVAL (0x00000000u)
  40846. #define CSL_CPINTC_VECTOR_ADDRESS_REG_841_RESETVAL (0x00000000u)
  40847. /* vector_address_reg_842 */
  40848. #define CSL_CPINTC_VECTOR_ADDRESS_REG_842_VECTOR_ADDRESS_842_MASK (0xFFFFFFFFu)
  40849. #define CSL_CPINTC_VECTOR_ADDRESS_REG_842_VECTOR_ADDRESS_842_SHIFT (0x00000000u)
  40850. #define CSL_CPINTC_VECTOR_ADDRESS_REG_842_VECTOR_ADDRESS_842_RESETVAL (0x00000000u)
  40851. #define CSL_CPINTC_VECTOR_ADDRESS_REG_842_RESETVAL (0x00000000u)
  40852. /* vector_address_reg_843 */
  40853. #define CSL_CPINTC_VECTOR_ADDRESS_REG_843_VECTOR_ADDRESS_843_MASK (0xFFFFFFFFu)
  40854. #define CSL_CPINTC_VECTOR_ADDRESS_REG_843_VECTOR_ADDRESS_843_SHIFT (0x00000000u)
  40855. #define CSL_CPINTC_VECTOR_ADDRESS_REG_843_VECTOR_ADDRESS_843_RESETVAL (0x00000000u)
  40856. #define CSL_CPINTC_VECTOR_ADDRESS_REG_843_RESETVAL (0x00000000u)
  40857. /* vector_address_reg_844 */
  40858. #define CSL_CPINTC_VECTOR_ADDRESS_REG_844_VECTOR_ADDRESS_844_MASK (0xFFFFFFFFu)
  40859. #define CSL_CPINTC_VECTOR_ADDRESS_REG_844_VECTOR_ADDRESS_844_SHIFT (0x00000000u)
  40860. #define CSL_CPINTC_VECTOR_ADDRESS_REG_844_VECTOR_ADDRESS_844_RESETVAL (0x00000000u)
  40861. #define CSL_CPINTC_VECTOR_ADDRESS_REG_844_RESETVAL (0x00000000u)
  40862. /* vector_address_reg_845 */
  40863. #define CSL_CPINTC_VECTOR_ADDRESS_REG_845_VECTOR_ADDRESS_845_MASK (0xFFFFFFFFu)
  40864. #define CSL_CPINTC_VECTOR_ADDRESS_REG_845_VECTOR_ADDRESS_845_SHIFT (0x00000000u)
  40865. #define CSL_CPINTC_VECTOR_ADDRESS_REG_845_VECTOR_ADDRESS_845_RESETVAL (0x00000000u)
  40866. #define CSL_CPINTC_VECTOR_ADDRESS_REG_845_RESETVAL (0x00000000u)
  40867. /* vector_address_reg_846 */
  40868. #define CSL_CPINTC_VECTOR_ADDRESS_REG_846_VECTOR_ADDRESS_846_MASK (0xFFFFFFFFu)
  40869. #define CSL_CPINTC_VECTOR_ADDRESS_REG_846_VECTOR_ADDRESS_846_SHIFT (0x00000000u)
  40870. #define CSL_CPINTC_VECTOR_ADDRESS_REG_846_VECTOR_ADDRESS_846_RESETVAL (0x00000000u)
  40871. #define CSL_CPINTC_VECTOR_ADDRESS_REG_846_RESETVAL (0x00000000u)
  40872. /* vector_address_reg_847 */
  40873. #define CSL_CPINTC_VECTOR_ADDRESS_REG_847_VECTOR_ADDRESS_847_MASK (0xFFFFFFFFu)
  40874. #define CSL_CPINTC_VECTOR_ADDRESS_REG_847_VECTOR_ADDRESS_847_SHIFT (0x00000000u)
  40875. #define CSL_CPINTC_VECTOR_ADDRESS_REG_847_VECTOR_ADDRESS_847_RESETVAL (0x00000000u)
  40876. #define CSL_CPINTC_VECTOR_ADDRESS_REG_847_RESETVAL (0x00000000u)
  40877. /* vector_address_reg_848 */
  40878. #define CSL_CPINTC_VECTOR_ADDRESS_REG_848_VECTOR_ADDRESS_848_MASK (0xFFFFFFFFu)
  40879. #define CSL_CPINTC_VECTOR_ADDRESS_REG_848_VECTOR_ADDRESS_848_SHIFT (0x00000000u)
  40880. #define CSL_CPINTC_VECTOR_ADDRESS_REG_848_VECTOR_ADDRESS_848_RESETVAL (0x00000000u)
  40881. #define CSL_CPINTC_VECTOR_ADDRESS_REG_848_RESETVAL (0x00000000u)
  40882. /* vector_address_reg_849 */
  40883. #define CSL_CPINTC_VECTOR_ADDRESS_REG_849_VECTOR_ADDRESS_849_MASK (0xFFFFFFFFu)
  40884. #define CSL_CPINTC_VECTOR_ADDRESS_REG_849_VECTOR_ADDRESS_849_SHIFT (0x00000000u)
  40885. #define CSL_CPINTC_VECTOR_ADDRESS_REG_849_VECTOR_ADDRESS_849_RESETVAL (0x00000000u)
  40886. #define CSL_CPINTC_VECTOR_ADDRESS_REG_849_RESETVAL (0x00000000u)
  40887. /* vector_address_reg_850 */
  40888. #define CSL_CPINTC_VECTOR_ADDRESS_REG_850_VECTOR_ADDRESS_850_MASK (0xFFFFFFFFu)
  40889. #define CSL_CPINTC_VECTOR_ADDRESS_REG_850_VECTOR_ADDRESS_850_SHIFT (0x00000000u)
  40890. #define CSL_CPINTC_VECTOR_ADDRESS_REG_850_VECTOR_ADDRESS_850_RESETVAL (0x00000000u)
  40891. #define CSL_CPINTC_VECTOR_ADDRESS_REG_850_RESETVAL (0x00000000u)
  40892. /* vector_address_reg_851 */
  40893. #define CSL_CPINTC_VECTOR_ADDRESS_REG_851_VECTOR_ADDRESS_851_MASK (0xFFFFFFFFu)
  40894. #define CSL_CPINTC_VECTOR_ADDRESS_REG_851_VECTOR_ADDRESS_851_SHIFT (0x00000000u)
  40895. #define CSL_CPINTC_VECTOR_ADDRESS_REG_851_VECTOR_ADDRESS_851_RESETVAL (0x00000000u)
  40896. #define CSL_CPINTC_VECTOR_ADDRESS_REG_851_RESETVAL (0x00000000u)
  40897. /* vector_address_reg_852 */
  40898. #define CSL_CPINTC_VECTOR_ADDRESS_REG_852_VECTOR_ADDRESS_852_MASK (0xFFFFFFFFu)
  40899. #define CSL_CPINTC_VECTOR_ADDRESS_REG_852_VECTOR_ADDRESS_852_SHIFT (0x00000000u)
  40900. #define CSL_CPINTC_VECTOR_ADDRESS_REG_852_VECTOR_ADDRESS_852_RESETVAL (0x00000000u)
  40901. #define CSL_CPINTC_VECTOR_ADDRESS_REG_852_RESETVAL (0x00000000u)
  40902. /* vector_address_reg_853 */
  40903. #define CSL_CPINTC_VECTOR_ADDRESS_REG_853_VECTOR_ADDRESS_853_MASK (0xFFFFFFFFu)
  40904. #define CSL_CPINTC_VECTOR_ADDRESS_REG_853_VECTOR_ADDRESS_853_SHIFT (0x00000000u)
  40905. #define CSL_CPINTC_VECTOR_ADDRESS_REG_853_VECTOR_ADDRESS_853_RESETVAL (0x00000000u)
  40906. #define CSL_CPINTC_VECTOR_ADDRESS_REG_853_RESETVAL (0x00000000u)
  40907. /* vector_address_reg_854 */
  40908. #define CSL_CPINTC_VECTOR_ADDRESS_REG_854_VECTOR_ADDRESS_854_MASK (0xFFFFFFFFu)
  40909. #define CSL_CPINTC_VECTOR_ADDRESS_REG_854_VECTOR_ADDRESS_854_SHIFT (0x00000000u)
  40910. #define CSL_CPINTC_VECTOR_ADDRESS_REG_854_VECTOR_ADDRESS_854_RESETVAL (0x00000000u)
  40911. #define CSL_CPINTC_VECTOR_ADDRESS_REG_854_RESETVAL (0x00000000u)
  40912. /* vector_address_reg_855 */
  40913. #define CSL_CPINTC_VECTOR_ADDRESS_REG_855_VECTOR_ADDRESS_855_MASK (0xFFFFFFFFu)
  40914. #define CSL_CPINTC_VECTOR_ADDRESS_REG_855_VECTOR_ADDRESS_855_SHIFT (0x00000000u)
  40915. #define CSL_CPINTC_VECTOR_ADDRESS_REG_855_VECTOR_ADDRESS_855_RESETVAL (0x00000000u)
  40916. #define CSL_CPINTC_VECTOR_ADDRESS_REG_855_RESETVAL (0x00000000u)
  40917. /* vector_address_reg_856 */
  40918. #define CSL_CPINTC_VECTOR_ADDRESS_REG_856_VECTOR_ADDRESS_856_MASK (0xFFFFFFFFu)
  40919. #define CSL_CPINTC_VECTOR_ADDRESS_REG_856_VECTOR_ADDRESS_856_SHIFT (0x00000000u)
  40920. #define CSL_CPINTC_VECTOR_ADDRESS_REG_856_VECTOR_ADDRESS_856_RESETVAL (0x00000000u)
  40921. #define CSL_CPINTC_VECTOR_ADDRESS_REG_856_RESETVAL (0x00000000u)
  40922. /* vector_address_reg_857 */
  40923. #define CSL_CPINTC_VECTOR_ADDRESS_REG_857_VECTOR_ADDRESS_857_MASK (0xFFFFFFFFu)
  40924. #define CSL_CPINTC_VECTOR_ADDRESS_REG_857_VECTOR_ADDRESS_857_SHIFT (0x00000000u)
  40925. #define CSL_CPINTC_VECTOR_ADDRESS_REG_857_VECTOR_ADDRESS_857_RESETVAL (0x00000000u)
  40926. #define CSL_CPINTC_VECTOR_ADDRESS_REG_857_RESETVAL (0x00000000u)
  40927. /* vector_address_reg_858 */
  40928. #define CSL_CPINTC_VECTOR_ADDRESS_REG_858_VECTOR_ADDRESS_858_MASK (0xFFFFFFFFu)
  40929. #define CSL_CPINTC_VECTOR_ADDRESS_REG_858_VECTOR_ADDRESS_858_SHIFT (0x00000000u)
  40930. #define CSL_CPINTC_VECTOR_ADDRESS_REG_858_VECTOR_ADDRESS_858_RESETVAL (0x00000000u)
  40931. #define CSL_CPINTC_VECTOR_ADDRESS_REG_858_RESETVAL (0x00000000u)
  40932. /* vector_address_reg_859 */
  40933. #define CSL_CPINTC_VECTOR_ADDRESS_REG_859_VECTOR_ADDRESS_859_MASK (0xFFFFFFFFu)
  40934. #define CSL_CPINTC_VECTOR_ADDRESS_REG_859_VECTOR_ADDRESS_859_SHIFT (0x00000000u)
  40935. #define CSL_CPINTC_VECTOR_ADDRESS_REG_859_VECTOR_ADDRESS_859_RESETVAL (0x00000000u)
  40936. #define CSL_CPINTC_VECTOR_ADDRESS_REG_859_RESETVAL (0x00000000u)
  40937. /* vector_address_reg_860 */
  40938. #define CSL_CPINTC_VECTOR_ADDRESS_REG_860_VECTOR_ADDRESS_860_MASK (0xFFFFFFFFu)
  40939. #define CSL_CPINTC_VECTOR_ADDRESS_REG_860_VECTOR_ADDRESS_860_SHIFT (0x00000000u)
  40940. #define CSL_CPINTC_VECTOR_ADDRESS_REG_860_VECTOR_ADDRESS_860_RESETVAL (0x00000000u)
  40941. #define CSL_CPINTC_VECTOR_ADDRESS_REG_860_RESETVAL (0x00000000u)
  40942. /* vector_address_reg_861 */
  40943. #define CSL_CPINTC_VECTOR_ADDRESS_REG_861_VECTOR_ADDRESS_861_MASK (0xFFFFFFFFu)
  40944. #define CSL_CPINTC_VECTOR_ADDRESS_REG_861_VECTOR_ADDRESS_861_SHIFT (0x00000000u)
  40945. #define CSL_CPINTC_VECTOR_ADDRESS_REG_861_VECTOR_ADDRESS_861_RESETVAL (0x00000000u)
  40946. #define CSL_CPINTC_VECTOR_ADDRESS_REG_861_RESETVAL (0x00000000u)
  40947. /* vector_address_reg_862 */
  40948. #define CSL_CPINTC_VECTOR_ADDRESS_REG_862_VECTOR_ADDRESS_862_MASK (0xFFFFFFFFu)
  40949. #define CSL_CPINTC_VECTOR_ADDRESS_REG_862_VECTOR_ADDRESS_862_SHIFT (0x00000000u)
  40950. #define CSL_CPINTC_VECTOR_ADDRESS_REG_862_VECTOR_ADDRESS_862_RESETVAL (0x00000000u)
  40951. #define CSL_CPINTC_VECTOR_ADDRESS_REG_862_RESETVAL (0x00000000u)
  40952. /* vector_address_reg_863 */
  40953. #define CSL_CPINTC_VECTOR_ADDRESS_REG_863_VECTOR_ADDRESS_863_MASK (0xFFFFFFFFu)
  40954. #define CSL_CPINTC_VECTOR_ADDRESS_REG_863_VECTOR_ADDRESS_863_SHIFT (0x00000000u)
  40955. #define CSL_CPINTC_VECTOR_ADDRESS_REG_863_VECTOR_ADDRESS_863_RESETVAL (0x00000000u)
  40956. #define CSL_CPINTC_VECTOR_ADDRESS_REG_863_RESETVAL (0x00000000u)
  40957. /* vector_address_reg_864 */
  40958. #define CSL_CPINTC_VECTOR_ADDRESS_REG_864_VECTOR_ADDRESS_864_MASK (0xFFFFFFFFu)
  40959. #define CSL_CPINTC_VECTOR_ADDRESS_REG_864_VECTOR_ADDRESS_864_SHIFT (0x00000000u)
  40960. #define CSL_CPINTC_VECTOR_ADDRESS_REG_864_VECTOR_ADDRESS_864_RESETVAL (0x00000000u)
  40961. #define CSL_CPINTC_VECTOR_ADDRESS_REG_864_RESETVAL (0x00000000u)
  40962. /* vector_address_reg_865 */
  40963. #define CSL_CPINTC_VECTOR_ADDRESS_REG_865_VECTOR_ADDRESS_865_MASK (0xFFFFFFFFu)
  40964. #define CSL_CPINTC_VECTOR_ADDRESS_REG_865_VECTOR_ADDRESS_865_SHIFT (0x00000000u)
  40965. #define CSL_CPINTC_VECTOR_ADDRESS_REG_865_VECTOR_ADDRESS_865_RESETVAL (0x00000000u)
  40966. #define CSL_CPINTC_VECTOR_ADDRESS_REG_865_RESETVAL (0x00000000u)
  40967. /* vector_address_reg_866 */
  40968. #define CSL_CPINTC_VECTOR_ADDRESS_REG_866_VECTOR_ADDRESS_866_MASK (0xFFFFFFFFu)
  40969. #define CSL_CPINTC_VECTOR_ADDRESS_REG_866_VECTOR_ADDRESS_866_SHIFT (0x00000000u)
  40970. #define CSL_CPINTC_VECTOR_ADDRESS_REG_866_VECTOR_ADDRESS_866_RESETVAL (0x00000000u)
  40971. #define CSL_CPINTC_VECTOR_ADDRESS_REG_866_RESETVAL (0x00000000u)
  40972. /* vector_address_reg_867 */
  40973. #define CSL_CPINTC_VECTOR_ADDRESS_REG_867_VECTOR_ADDRESS_867_MASK (0xFFFFFFFFu)
  40974. #define CSL_CPINTC_VECTOR_ADDRESS_REG_867_VECTOR_ADDRESS_867_SHIFT (0x00000000u)
  40975. #define CSL_CPINTC_VECTOR_ADDRESS_REG_867_VECTOR_ADDRESS_867_RESETVAL (0x00000000u)
  40976. #define CSL_CPINTC_VECTOR_ADDRESS_REG_867_RESETVAL (0x00000000u)
  40977. /* vector_address_reg_868 */
  40978. #define CSL_CPINTC_VECTOR_ADDRESS_REG_868_VECTOR_ADDRESS_868_MASK (0xFFFFFFFFu)
  40979. #define CSL_CPINTC_VECTOR_ADDRESS_REG_868_VECTOR_ADDRESS_868_SHIFT (0x00000000u)
  40980. #define CSL_CPINTC_VECTOR_ADDRESS_REG_868_VECTOR_ADDRESS_868_RESETVAL (0x00000000u)
  40981. #define CSL_CPINTC_VECTOR_ADDRESS_REG_868_RESETVAL (0x00000000u)
  40982. /* vector_address_reg_869 */
  40983. #define CSL_CPINTC_VECTOR_ADDRESS_REG_869_VECTOR_ADDRESS_869_MASK (0xFFFFFFFFu)
  40984. #define CSL_CPINTC_VECTOR_ADDRESS_REG_869_VECTOR_ADDRESS_869_SHIFT (0x00000000u)
  40985. #define CSL_CPINTC_VECTOR_ADDRESS_REG_869_VECTOR_ADDRESS_869_RESETVAL (0x00000000u)
  40986. #define CSL_CPINTC_VECTOR_ADDRESS_REG_869_RESETVAL (0x00000000u)
  40987. /* vector_address_reg_870 */
  40988. #define CSL_CPINTC_VECTOR_ADDRESS_REG_870_VECTOR_ADDRESS_870_MASK (0xFFFFFFFFu)
  40989. #define CSL_CPINTC_VECTOR_ADDRESS_REG_870_VECTOR_ADDRESS_870_SHIFT (0x00000000u)
  40990. #define CSL_CPINTC_VECTOR_ADDRESS_REG_870_VECTOR_ADDRESS_870_RESETVAL (0x00000000u)
  40991. #define CSL_CPINTC_VECTOR_ADDRESS_REG_870_RESETVAL (0x00000000u)
  40992. /* vector_address_reg_871 */
  40993. #define CSL_CPINTC_VECTOR_ADDRESS_REG_871_VECTOR_ADDRESS_871_MASK (0xFFFFFFFFu)
  40994. #define CSL_CPINTC_VECTOR_ADDRESS_REG_871_VECTOR_ADDRESS_871_SHIFT (0x00000000u)
  40995. #define CSL_CPINTC_VECTOR_ADDRESS_REG_871_VECTOR_ADDRESS_871_RESETVAL (0x00000000u)
  40996. #define CSL_CPINTC_VECTOR_ADDRESS_REG_871_RESETVAL (0x00000000u)
  40997. /* vector_address_reg_872 */
  40998. #define CSL_CPINTC_VECTOR_ADDRESS_REG_872_VECTOR_ADDRESS_872_MASK (0xFFFFFFFFu)
  40999. #define CSL_CPINTC_VECTOR_ADDRESS_REG_872_VECTOR_ADDRESS_872_SHIFT (0x00000000u)
  41000. #define CSL_CPINTC_VECTOR_ADDRESS_REG_872_VECTOR_ADDRESS_872_RESETVAL (0x00000000u)
  41001. #define CSL_CPINTC_VECTOR_ADDRESS_REG_872_RESETVAL (0x00000000u)
  41002. /* vector_address_reg_873 */
  41003. #define CSL_CPINTC_VECTOR_ADDRESS_REG_873_VECTOR_ADDRESS_873_MASK (0xFFFFFFFFu)
  41004. #define CSL_CPINTC_VECTOR_ADDRESS_REG_873_VECTOR_ADDRESS_873_SHIFT (0x00000000u)
  41005. #define CSL_CPINTC_VECTOR_ADDRESS_REG_873_VECTOR_ADDRESS_873_RESETVAL (0x00000000u)
  41006. #define CSL_CPINTC_VECTOR_ADDRESS_REG_873_RESETVAL (0x00000000u)
  41007. /* vector_address_reg_874 */
  41008. #define CSL_CPINTC_VECTOR_ADDRESS_REG_874_VECTOR_ADDRESS_874_MASK (0xFFFFFFFFu)
  41009. #define CSL_CPINTC_VECTOR_ADDRESS_REG_874_VECTOR_ADDRESS_874_SHIFT (0x00000000u)
  41010. #define CSL_CPINTC_VECTOR_ADDRESS_REG_874_VECTOR_ADDRESS_874_RESETVAL (0x00000000u)
  41011. #define CSL_CPINTC_VECTOR_ADDRESS_REG_874_RESETVAL (0x00000000u)
  41012. /* vector_address_reg_875 */
  41013. #define CSL_CPINTC_VECTOR_ADDRESS_REG_875_VECTOR_ADDRESS_875_MASK (0xFFFFFFFFu)
  41014. #define CSL_CPINTC_VECTOR_ADDRESS_REG_875_VECTOR_ADDRESS_875_SHIFT (0x00000000u)
  41015. #define CSL_CPINTC_VECTOR_ADDRESS_REG_875_VECTOR_ADDRESS_875_RESETVAL (0x00000000u)
  41016. #define CSL_CPINTC_VECTOR_ADDRESS_REG_875_RESETVAL (0x00000000u)
  41017. /* vector_address_reg_876 */
  41018. #define CSL_CPINTC_VECTOR_ADDRESS_REG_876_VECTOR_ADDRESS_876_MASK (0xFFFFFFFFu)
  41019. #define CSL_CPINTC_VECTOR_ADDRESS_REG_876_VECTOR_ADDRESS_876_SHIFT (0x00000000u)
  41020. #define CSL_CPINTC_VECTOR_ADDRESS_REG_876_VECTOR_ADDRESS_876_RESETVAL (0x00000000u)
  41021. #define CSL_CPINTC_VECTOR_ADDRESS_REG_876_RESETVAL (0x00000000u)
  41022. /* vector_address_reg_877 */
  41023. #define CSL_CPINTC_VECTOR_ADDRESS_REG_877_VECTOR_ADDRESS_877_MASK (0xFFFFFFFFu)
  41024. #define CSL_CPINTC_VECTOR_ADDRESS_REG_877_VECTOR_ADDRESS_877_SHIFT (0x00000000u)
  41025. #define CSL_CPINTC_VECTOR_ADDRESS_REG_877_VECTOR_ADDRESS_877_RESETVAL (0x00000000u)
  41026. #define CSL_CPINTC_VECTOR_ADDRESS_REG_877_RESETVAL (0x00000000u)
  41027. /* vector_address_reg_878 */
  41028. #define CSL_CPINTC_VECTOR_ADDRESS_REG_878_VECTOR_ADDRESS_878_MASK (0xFFFFFFFFu)
  41029. #define CSL_CPINTC_VECTOR_ADDRESS_REG_878_VECTOR_ADDRESS_878_SHIFT (0x00000000u)
  41030. #define CSL_CPINTC_VECTOR_ADDRESS_REG_878_VECTOR_ADDRESS_878_RESETVAL (0x00000000u)
  41031. #define CSL_CPINTC_VECTOR_ADDRESS_REG_878_RESETVAL (0x00000000u)
  41032. /* vector_address_reg_879 */
  41033. #define CSL_CPINTC_VECTOR_ADDRESS_REG_879_VECTOR_ADDRESS_879_MASK (0xFFFFFFFFu)
  41034. #define CSL_CPINTC_VECTOR_ADDRESS_REG_879_VECTOR_ADDRESS_879_SHIFT (0x00000000u)
  41035. #define CSL_CPINTC_VECTOR_ADDRESS_REG_879_VECTOR_ADDRESS_879_RESETVAL (0x00000000u)
  41036. #define CSL_CPINTC_VECTOR_ADDRESS_REG_879_RESETVAL (0x00000000u)
  41037. /* vector_address_reg_880 */
  41038. #define CSL_CPINTC_VECTOR_ADDRESS_REG_880_VECTOR_ADDRESS_880_MASK (0xFFFFFFFFu)
  41039. #define CSL_CPINTC_VECTOR_ADDRESS_REG_880_VECTOR_ADDRESS_880_SHIFT (0x00000000u)
  41040. #define CSL_CPINTC_VECTOR_ADDRESS_REG_880_VECTOR_ADDRESS_880_RESETVAL (0x00000000u)
  41041. #define CSL_CPINTC_VECTOR_ADDRESS_REG_880_RESETVAL (0x00000000u)
  41042. /* vector_address_reg_881 */
  41043. #define CSL_CPINTC_VECTOR_ADDRESS_REG_881_VECTOR_ADDRESS_881_MASK (0xFFFFFFFFu)
  41044. #define CSL_CPINTC_VECTOR_ADDRESS_REG_881_VECTOR_ADDRESS_881_SHIFT (0x00000000u)
  41045. #define CSL_CPINTC_VECTOR_ADDRESS_REG_881_VECTOR_ADDRESS_881_RESETVAL (0x00000000u)
  41046. #define CSL_CPINTC_VECTOR_ADDRESS_REG_881_RESETVAL (0x00000000u)
  41047. /* vector_address_reg_882 */
  41048. #define CSL_CPINTC_VECTOR_ADDRESS_REG_882_VECTOR_ADDRESS_882_MASK (0xFFFFFFFFu)
  41049. #define CSL_CPINTC_VECTOR_ADDRESS_REG_882_VECTOR_ADDRESS_882_SHIFT (0x00000000u)
  41050. #define CSL_CPINTC_VECTOR_ADDRESS_REG_882_VECTOR_ADDRESS_882_RESETVAL (0x00000000u)
  41051. #define CSL_CPINTC_VECTOR_ADDRESS_REG_882_RESETVAL (0x00000000u)
  41052. /* vector_address_reg_883 */
  41053. #define CSL_CPINTC_VECTOR_ADDRESS_REG_883_VECTOR_ADDRESS_883_MASK (0xFFFFFFFFu)
  41054. #define CSL_CPINTC_VECTOR_ADDRESS_REG_883_VECTOR_ADDRESS_883_SHIFT (0x00000000u)
  41055. #define CSL_CPINTC_VECTOR_ADDRESS_REG_883_VECTOR_ADDRESS_883_RESETVAL (0x00000000u)
  41056. #define CSL_CPINTC_VECTOR_ADDRESS_REG_883_RESETVAL (0x00000000u)
  41057. /* vector_address_reg_884 */
  41058. #define CSL_CPINTC_VECTOR_ADDRESS_REG_884_VECTOR_ADDRESS_884_MASK (0xFFFFFFFFu)
  41059. #define CSL_CPINTC_VECTOR_ADDRESS_REG_884_VECTOR_ADDRESS_884_SHIFT (0x00000000u)
  41060. #define CSL_CPINTC_VECTOR_ADDRESS_REG_884_VECTOR_ADDRESS_884_RESETVAL (0x00000000u)
  41061. #define CSL_CPINTC_VECTOR_ADDRESS_REG_884_RESETVAL (0x00000000u)
  41062. /* vector_address_reg_885 */
  41063. #define CSL_CPINTC_VECTOR_ADDRESS_REG_885_VECTOR_ADDRESS_885_MASK (0xFFFFFFFFu)
  41064. #define CSL_CPINTC_VECTOR_ADDRESS_REG_885_VECTOR_ADDRESS_885_SHIFT (0x00000000u)
  41065. #define CSL_CPINTC_VECTOR_ADDRESS_REG_885_VECTOR_ADDRESS_885_RESETVAL (0x00000000u)
  41066. #define CSL_CPINTC_VECTOR_ADDRESS_REG_885_RESETVAL (0x00000000u)
  41067. /* vector_address_reg_886 */
  41068. #define CSL_CPINTC_VECTOR_ADDRESS_REG_886_VECTOR_ADDRESS_886_MASK (0xFFFFFFFFu)
  41069. #define CSL_CPINTC_VECTOR_ADDRESS_REG_886_VECTOR_ADDRESS_886_SHIFT (0x00000000u)
  41070. #define CSL_CPINTC_VECTOR_ADDRESS_REG_886_VECTOR_ADDRESS_886_RESETVAL (0x00000000u)
  41071. #define CSL_CPINTC_VECTOR_ADDRESS_REG_886_RESETVAL (0x00000000u)
  41072. /* vector_address_reg_887 */
  41073. #define CSL_CPINTC_VECTOR_ADDRESS_REG_887_VECTOR_ADDRESS_887_MASK (0xFFFFFFFFu)
  41074. #define CSL_CPINTC_VECTOR_ADDRESS_REG_887_VECTOR_ADDRESS_887_SHIFT (0x00000000u)
  41075. #define CSL_CPINTC_VECTOR_ADDRESS_REG_887_VECTOR_ADDRESS_887_RESETVAL (0x00000000u)
  41076. #define CSL_CPINTC_VECTOR_ADDRESS_REG_887_RESETVAL (0x00000000u)
  41077. /* vector_address_reg_888 */
  41078. #define CSL_CPINTC_VECTOR_ADDRESS_REG_888_VECTOR_ADDRESS_888_MASK (0xFFFFFFFFu)
  41079. #define CSL_CPINTC_VECTOR_ADDRESS_REG_888_VECTOR_ADDRESS_888_SHIFT (0x00000000u)
  41080. #define CSL_CPINTC_VECTOR_ADDRESS_REG_888_VECTOR_ADDRESS_888_RESETVAL (0x00000000u)
  41081. #define CSL_CPINTC_VECTOR_ADDRESS_REG_888_RESETVAL (0x00000000u)
  41082. /* vector_address_reg_889 */
  41083. #define CSL_CPINTC_VECTOR_ADDRESS_REG_889_VECTOR_ADDRESS_889_MASK (0xFFFFFFFFu)
  41084. #define CSL_CPINTC_VECTOR_ADDRESS_REG_889_VECTOR_ADDRESS_889_SHIFT (0x00000000u)
  41085. #define CSL_CPINTC_VECTOR_ADDRESS_REG_889_VECTOR_ADDRESS_889_RESETVAL (0x00000000u)
  41086. #define CSL_CPINTC_VECTOR_ADDRESS_REG_889_RESETVAL (0x00000000u)
  41087. /* vector_address_reg_890 */
  41088. #define CSL_CPINTC_VECTOR_ADDRESS_REG_890_VECTOR_ADDRESS_890_MASK (0xFFFFFFFFu)
  41089. #define CSL_CPINTC_VECTOR_ADDRESS_REG_890_VECTOR_ADDRESS_890_SHIFT (0x00000000u)
  41090. #define CSL_CPINTC_VECTOR_ADDRESS_REG_890_VECTOR_ADDRESS_890_RESETVAL (0x00000000u)
  41091. #define CSL_CPINTC_VECTOR_ADDRESS_REG_890_RESETVAL (0x00000000u)
  41092. /* vector_address_reg_891 */
  41093. #define CSL_CPINTC_VECTOR_ADDRESS_REG_891_VECTOR_ADDRESS_891_MASK (0xFFFFFFFFu)
  41094. #define CSL_CPINTC_VECTOR_ADDRESS_REG_891_VECTOR_ADDRESS_891_SHIFT (0x00000000u)
  41095. #define CSL_CPINTC_VECTOR_ADDRESS_REG_891_VECTOR_ADDRESS_891_RESETVAL (0x00000000u)
  41096. #define CSL_CPINTC_VECTOR_ADDRESS_REG_891_RESETVAL (0x00000000u)
  41097. /* vector_address_reg_892 */
  41098. #define CSL_CPINTC_VECTOR_ADDRESS_REG_892_VECTOR_ADDRESS_892_MASK (0xFFFFFFFFu)
  41099. #define CSL_CPINTC_VECTOR_ADDRESS_REG_892_VECTOR_ADDRESS_892_SHIFT (0x00000000u)
  41100. #define CSL_CPINTC_VECTOR_ADDRESS_REG_892_VECTOR_ADDRESS_892_RESETVAL (0x00000000u)
  41101. #define CSL_CPINTC_VECTOR_ADDRESS_REG_892_RESETVAL (0x00000000u)
  41102. /* vector_address_reg_893 */
  41103. #define CSL_CPINTC_VECTOR_ADDRESS_REG_893_VECTOR_ADDRESS_893_MASK (0xFFFFFFFFu)
  41104. #define CSL_CPINTC_VECTOR_ADDRESS_REG_893_VECTOR_ADDRESS_893_SHIFT (0x00000000u)
  41105. #define CSL_CPINTC_VECTOR_ADDRESS_REG_893_VECTOR_ADDRESS_893_RESETVAL (0x00000000u)
  41106. #define CSL_CPINTC_VECTOR_ADDRESS_REG_893_RESETVAL (0x00000000u)
  41107. /* vector_address_reg_894 */
  41108. #define CSL_CPINTC_VECTOR_ADDRESS_REG_894_VECTOR_ADDRESS_894_MASK (0xFFFFFFFFu)
  41109. #define CSL_CPINTC_VECTOR_ADDRESS_REG_894_VECTOR_ADDRESS_894_SHIFT (0x00000000u)
  41110. #define CSL_CPINTC_VECTOR_ADDRESS_REG_894_VECTOR_ADDRESS_894_RESETVAL (0x00000000u)
  41111. #define CSL_CPINTC_VECTOR_ADDRESS_REG_894_RESETVAL (0x00000000u)
  41112. /* vector_address_reg_895 */
  41113. #define CSL_CPINTC_VECTOR_ADDRESS_REG_895_VECTOR_ADDRESS_895_MASK (0xFFFFFFFFu)
  41114. #define CSL_CPINTC_VECTOR_ADDRESS_REG_895_VECTOR_ADDRESS_895_SHIFT (0x00000000u)
  41115. #define CSL_CPINTC_VECTOR_ADDRESS_REG_895_VECTOR_ADDRESS_895_RESETVAL (0x00000000u)
  41116. #define CSL_CPINTC_VECTOR_ADDRESS_REG_895_RESETVAL (0x00000000u)
  41117. /* vector_address_reg_896 */
  41118. #define CSL_CPINTC_VECTOR_ADDRESS_REG_896_VECTOR_ADDRESS_896_MASK (0xFFFFFFFFu)
  41119. #define CSL_CPINTC_VECTOR_ADDRESS_REG_896_VECTOR_ADDRESS_896_SHIFT (0x00000000u)
  41120. #define CSL_CPINTC_VECTOR_ADDRESS_REG_896_VECTOR_ADDRESS_896_RESETVAL (0x00000000u)
  41121. #define CSL_CPINTC_VECTOR_ADDRESS_REG_896_RESETVAL (0x00000000u)
  41122. /* vector_address_reg_897 */
  41123. #define CSL_CPINTC_VECTOR_ADDRESS_REG_897_VECTOR_ADDRESS_897_MASK (0xFFFFFFFFu)
  41124. #define CSL_CPINTC_VECTOR_ADDRESS_REG_897_VECTOR_ADDRESS_897_SHIFT (0x00000000u)
  41125. #define CSL_CPINTC_VECTOR_ADDRESS_REG_897_VECTOR_ADDRESS_897_RESETVAL (0x00000000u)
  41126. #define CSL_CPINTC_VECTOR_ADDRESS_REG_897_RESETVAL (0x00000000u)
  41127. /* vector_address_reg_898 */
  41128. #define CSL_CPINTC_VECTOR_ADDRESS_REG_898_VECTOR_ADDRESS_898_MASK (0xFFFFFFFFu)
  41129. #define CSL_CPINTC_VECTOR_ADDRESS_REG_898_VECTOR_ADDRESS_898_SHIFT (0x00000000u)
  41130. #define CSL_CPINTC_VECTOR_ADDRESS_REG_898_VECTOR_ADDRESS_898_RESETVAL (0x00000000u)
  41131. #define CSL_CPINTC_VECTOR_ADDRESS_REG_898_RESETVAL (0x00000000u)
  41132. /* vector_address_reg_899 */
  41133. #define CSL_CPINTC_VECTOR_ADDRESS_REG_899_VECTOR_ADDRESS_899_MASK (0xFFFFFFFFu)
  41134. #define CSL_CPINTC_VECTOR_ADDRESS_REG_899_VECTOR_ADDRESS_899_SHIFT (0x00000000u)
  41135. #define CSL_CPINTC_VECTOR_ADDRESS_REG_899_VECTOR_ADDRESS_899_RESETVAL (0x00000000u)
  41136. #define CSL_CPINTC_VECTOR_ADDRESS_REG_899_RESETVAL (0x00000000u)
  41137. /* vector_address_reg_900 */
  41138. #define CSL_CPINTC_VECTOR_ADDRESS_REG_900_VECTOR_ADDRESS_900_MASK (0xFFFFFFFFu)
  41139. #define CSL_CPINTC_VECTOR_ADDRESS_REG_900_VECTOR_ADDRESS_900_SHIFT (0x00000000u)
  41140. #define CSL_CPINTC_VECTOR_ADDRESS_REG_900_VECTOR_ADDRESS_900_RESETVAL (0x00000000u)
  41141. #define CSL_CPINTC_VECTOR_ADDRESS_REG_900_RESETVAL (0x00000000u)
  41142. /* vector_address_reg_901 */
  41143. #define CSL_CPINTC_VECTOR_ADDRESS_REG_901_VECTOR_ADDRESS_901_MASK (0xFFFFFFFFu)
  41144. #define CSL_CPINTC_VECTOR_ADDRESS_REG_901_VECTOR_ADDRESS_901_SHIFT (0x00000000u)
  41145. #define CSL_CPINTC_VECTOR_ADDRESS_REG_901_VECTOR_ADDRESS_901_RESETVAL (0x00000000u)
  41146. #define CSL_CPINTC_VECTOR_ADDRESS_REG_901_RESETVAL (0x00000000u)
  41147. /* vector_address_reg_902 */
  41148. #define CSL_CPINTC_VECTOR_ADDRESS_REG_902_VECTOR_ADDRESS_902_MASK (0xFFFFFFFFu)
  41149. #define CSL_CPINTC_VECTOR_ADDRESS_REG_902_VECTOR_ADDRESS_902_SHIFT (0x00000000u)
  41150. #define CSL_CPINTC_VECTOR_ADDRESS_REG_902_VECTOR_ADDRESS_902_RESETVAL (0x00000000u)
  41151. #define CSL_CPINTC_VECTOR_ADDRESS_REG_902_RESETVAL (0x00000000u)
  41152. /* vector_address_reg_903 */
  41153. #define CSL_CPINTC_VECTOR_ADDRESS_REG_903_VECTOR_ADDRESS_903_MASK (0xFFFFFFFFu)
  41154. #define CSL_CPINTC_VECTOR_ADDRESS_REG_903_VECTOR_ADDRESS_903_SHIFT (0x00000000u)
  41155. #define CSL_CPINTC_VECTOR_ADDRESS_REG_903_VECTOR_ADDRESS_903_RESETVAL (0x00000000u)
  41156. #define CSL_CPINTC_VECTOR_ADDRESS_REG_903_RESETVAL (0x00000000u)
  41157. /* vector_address_reg_904 */
  41158. #define CSL_CPINTC_VECTOR_ADDRESS_REG_904_VECTOR_ADDRESS_904_MASK (0xFFFFFFFFu)
  41159. #define CSL_CPINTC_VECTOR_ADDRESS_REG_904_VECTOR_ADDRESS_904_SHIFT (0x00000000u)
  41160. #define CSL_CPINTC_VECTOR_ADDRESS_REG_904_VECTOR_ADDRESS_904_RESETVAL (0x00000000u)
  41161. #define CSL_CPINTC_VECTOR_ADDRESS_REG_904_RESETVAL (0x00000000u)
  41162. /* vector_address_reg_905 */
  41163. #define CSL_CPINTC_VECTOR_ADDRESS_REG_905_VECTOR_ADDRESS_905_MASK (0xFFFFFFFFu)
  41164. #define CSL_CPINTC_VECTOR_ADDRESS_REG_905_VECTOR_ADDRESS_905_SHIFT (0x00000000u)
  41165. #define CSL_CPINTC_VECTOR_ADDRESS_REG_905_VECTOR_ADDRESS_905_RESETVAL (0x00000000u)
  41166. #define CSL_CPINTC_VECTOR_ADDRESS_REG_905_RESETVAL (0x00000000u)
  41167. /* vector_address_reg_906 */
  41168. #define CSL_CPINTC_VECTOR_ADDRESS_REG_906_VECTOR_ADDRESS_906_MASK (0xFFFFFFFFu)
  41169. #define CSL_CPINTC_VECTOR_ADDRESS_REG_906_VECTOR_ADDRESS_906_SHIFT (0x00000000u)
  41170. #define CSL_CPINTC_VECTOR_ADDRESS_REG_906_VECTOR_ADDRESS_906_RESETVAL (0x00000000u)
  41171. #define CSL_CPINTC_VECTOR_ADDRESS_REG_906_RESETVAL (0x00000000u)
  41172. /* vector_address_reg_907 */
  41173. #define CSL_CPINTC_VECTOR_ADDRESS_REG_907_VECTOR_ADDRESS_907_MASK (0xFFFFFFFFu)
  41174. #define CSL_CPINTC_VECTOR_ADDRESS_REG_907_VECTOR_ADDRESS_907_SHIFT (0x00000000u)
  41175. #define CSL_CPINTC_VECTOR_ADDRESS_REG_907_VECTOR_ADDRESS_907_RESETVAL (0x00000000u)
  41176. #define CSL_CPINTC_VECTOR_ADDRESS_REG_907_RESETVAL (0x00000000u)
  41177. /* vector_address_reg_908 */
  41178. #define CSL_CPINTC_VECTOR_ADDRESS_REG_908_VECTOR_ADDRESS_908_MASK (0xFFFFFFFFu)
  41179. #define CSL_CPINTC_VECTOR_ADDRESS_REG_908_VECTOR_ADDRESS_908_SHIFT (0x00000000u)
  41180. #define CSL_CPINTC_VECTOR_ADDRESS_REG_908_VECTOR_ADDRESS_908_RESETVAL (0x00000000u)
  41181. #define CSL_CPINTC_VECTOR_ADDRESS_REG_908_RESETVAL (0x00000000u)
  41182. /* vector_address_reg_909 */
  41183. #define CSL_CPINTC_VECTOR_ADDRESS_REG_909_VECTOR_ADDRESS_909_MASK (0xFFFFFFFFu)
  41184. #define CSL_CPINTC_VECTOR_ADDRESS_REG_909_VECTOR_ADDRESS_909_SHIFT (0x00000000u)
  41185. #define CSL_CPINTC_VECTOR_ADDRESS_REG_909_VECTOR_ADDRESS_909_RESETVAL (0x00000000u)
  41186. #define CSL_CPINTC_VECTOR_ADDRESS_REG_909_RESETVAL (0x00000000u)
  41187. /* vector_address_reg_910 */
  41188. #define CSL_CPINTC_VECTOR_ADDRESS_REG_910_VECTOR_ADDRESS_910_MASK (0xFFFFFFFFu)
  41189. #define CSL_CPINTC_VECTOR_ADDRESS_REG_910_VECTOR_ADDRESS_910_SHIFT (0x00000000u)
  41190. #define CSL_CPINTC_VECTOR_ADDRESS_REG_910_VECTOR_ADDRESS_910_RESETVAL (0x00000000u)
  41191. #define CSL_CPINTC_VECTOR_ADDRESS_REG_910_RESETVAL (0x00000000u)
  41192. /* vector_address_reg_911 */
  41193. #define CSL_CPINTC_VECTOR_ADDRESS_REG_911_VECTOR_ADDRESS_911_MASK (0xFFFFFFFFu)
  41194. #define CSL_CPINTC_VECTOR_ADDRESS_REG_911_VECTOR_ADDRESS_911_SHIFT (0x00000000u)
  41195. #define CSL_CPINTC_VECTOR_ADDRESS_REG_911_VECTOR_ADDRESS_911_RESETVAL (0x00000000u)
  41196. #define CSL_CPINTC_VECTOR_ADDRESS_REG_911_RESETVAL (0x00000000u)
  41197. /* vector_address_reg_912 */
  41198. #define CSL_CPINTC_VECTOR_ADDRESS_REG_912_VECTOR_ADDRESS_912_MASK (0xFFFFFFFFu)
  41199. #define CSL_CPINTC_VECTOR_ADDRESS_REG_912_VECTOR_ADDRESS_912_SHIFT (0x00000000u)
  41200. #define CSL_CPINTC_VECTOR_ADDRESS_REG_912_VECTOR_ADDRESS_912_RESETVAL (0x00000000u)
  41201. #define CSL_CPINTC_VECTOR_ADDRESS_REG_912_RESETVAL (0x00000000u)
  41202. /* vector_address_reg_913 */
  41203. #define CSL_CPINTC_VECTOR_ADDRESS_REG_913_VECTOR_ADDRESS_913_MASK (0xFFFFFFFFu)
  41204. #define CSL_CPINTC_VECTOR_ADDRESS_REG_913_VECTOR_ADDRESS_913_SHIFT (0x00000000u)
  41205. #define CSL_CPINTC_VECTOR_ADDRESS_REG_913_VECTOR_ADDRESS_913_RESETVAL (0x00000000u)
  41206. #define CSL_CPINTC_VECTOR_ADDRESS_REG_913_RESETVAL (0x00000000u)
  41207. /* vector_address_reg_914 */
  41208. #define CSL_CPINTC_VECTOR_ADDRESS_REG_914_VECTOR_ADDRESS_914_MASK (0xFFFFFFFFu)
  41209. #define CSL_CPINTC_VECTOR_ADDRESS_REG_914_VECTOR_ADDRESS_914_SHIFT (0x00000000u)
  41210. #define CSL_CPINTC_VECTOR_ADDRESS_REG_914_VECTOR_ADDRESS_914_RESETVAL (0x00000000u)
  41211. #define CSL_CPINTC_VECTOR_ADDRESS_REG_914_RESETVAL (0x00000000u)
  41212. /* vector_address_reg_915 */
  41213. #define CSL_CPINTC_VECTOR_ADDRESS_REG_915_VECTOR_ADDRESS_915_MASK (0xFFFFFFFFu)
  41214. #define CSL_CPINTC_VECTOR_ADDRESS_REG_915_VECTOR_ADDRESS_915_SHIFT (0x00000000u)
  41215. #define CSL_CPINTC_VECTOR_ADDRESS_REG_915_VECTOR_ADDRESS_915_RESETVAL (0x00000000u)
  41216. #define CSL_CPINTC_VECTOR_ADDRESS_REG_915_RESETVAL (0x00000000u)
  41217. /* vector_address_reg_916 */
  41218. #define CSL_CPINTC_VECTOR_ADDRESS_REG_916_VECTOR_ADDRESS_916_MASK (0xFFFFFFFFu)
  41219. #define CSL_CPINTC_VECTOR_ADDRESS_REG_916_VECTOR_ADDRESS_916_SHIFT (0x00000000u)
  41220. #define CSL_CPINTC_VECTOR_ADDRESS_REG_916_VECTOR_ADDRESS_916_RESETVAL (0x00000000u)
  41221. #define CSL_CPINTC_VECTOR_ADDRESS_REG_916_RESETVAL (0x00000000u)
  41222. /* vector_address_reg_917 */
  41223. #define CSL_CPINTC_VECTOR_ADDRESS_REG_917_VECTOR_ADDRESS_917_MASK (0xFFFFFFFFu)
  41224. #define CSL_CPINTC_VECTOR_ADDRESS_REG_917_VECTOR_ADDRESS_917_SHIFT (0x00000000u)
  41225. #define CSL_CPINTC_VECTOR_ADDRESS_REG_917_VECTOR_ADDRESS_917_RESETVAL (0x00000000u)
  41226. #define CSL_CPINTC_VECTOR_ADDRESS_REG_917_RESETVAL (0x00000000u)
  41227. /* vector_address_reg_918 */
  41228. #define CSL_CPINTC_VECTOR_ADDRESS_REG_918_VECTOR_ADDRESS_918_MASK (0xFFFFFFFFu)
  41229. #define CSL_CPINTC_VECTOR_ADDRESS_REG_918_VECTOR_ADDRESS_918_SHIFT (0x00000000u)
  41230. #define CSL_CPINTC_VECTOR_ADDRESS_REG_918_VECTOR_ADDRESS_918_RESETVAL (0x00000000u)
  41231. #define CSL_CPINTC_VECTOR_ADDRESS_REG_918_RESETVAL (0x00000000u)
  41232. /* vector_address_reg_919 */
  41233. #define CSL_CPINTC_VECTOR_ADDRESS_REG_919_VECTOR_ADDRESS_919_MASK (0xFFFFFFFFu)
  41234. #define CSL_CPINTC_VECTOR_ADDRESS_REG_919_VECTOR_ADDRESS_919_SHIFT (0x00000000u)
  41235. #define CSL_CPINTC_VECTOR_ADDRESS_REG_919_VECTOR_ADDRESS_919_RESETVAL (0x00000000u)
  41236. #define CSL_CPINTC_VECTOR_ADDRESS_REG_919_RESETVAL (0x00000000u)
  41237. /* vector_address_reg_920 */
  41238. #define CSL_CPINTC_VECTOR_ADDRESS_REG_920_VECTOR_ADDRESS_920_MASK (0xFFFFFFFFu)
  41239. #define CSL_CPINTC_VECTOR_ADDRESS_REG_920_VECTOR_ADDRESS_920_SHIFT (0x00000000u)
  41240. #define CSL_CPINTC_VECTOR_ADDRESS_REG_920_VECTOR_ADDRESS_920_RESETVAL (0x00000000u)
  41241. #define CSL_CPINTC_VECTOR_ADDRESS_REG_920_RESETVAL (0x00000000u)
  41242. /* vector_address_reg_921 */
  41243. #define CSL_CPINTC_VECTOR_ADDRESS_REG_921_VECTOR_ADDRESS_921_MASK (0xFFFFFFFFu)
  41244. #define CSL_CPINTC_VECTOR_ADDRESS_REG_921_VECTOR_ADDRESS_921_SHIFT (0x00000000u)
  41245. #define CSL_CPINTC_VECTOR_ADDRESS_REG_921_VECTOR_ADDRESS_921_RESETVAL (0x00000000u)
  41246. #define CSL_CPINTC_VECTOR_ADDRESS_REG_921_RESETVAL (0x00000000u)
  41247. /* vector_address_reg_922 */
  41248. #define CSL_CPINTC_VECTOR_ADDRESS_REG_922_VECTOR_ADDRESS_922_MASK (0xFFFFFFFFu)
  41249. #define CSL_CPINTC_VECTOR_ADDRESS_REG_922_VECTOR_ADDRESS_922_SHIFT (0x00000000u)
  41250. #define CSL_CPINTC_VECTOR_ADDRESS_REG_922_VECTOR_ADDRESS_922_RESETVAL (0x00000000u)
  41251. #define CSL_CPINTC_VECTOR_ADDRESS_REG_922_RESETVAL (0x00000000u)
  41252. /* vector_address_reg_923 */
  41253. #define CSL_CPINTC_VECTOR_ADDRESS_REG_923_VECTOR_ADDRESS_923_MASK (0xFFFFFFFFu)
  41254. #define CSL_CPINTC_VECTOR_ADDRESS_REG_923_VECTOR_ADDRESS_923_SHIFT (0x00000000u)
  41255. #define CSL_CPINTC_VECTOR_ADDRESS_REG_923_VECTOR_ADDRESS_923_RESETVAL (0x00000000u)
  41256. #define CSL_CPINTC_VECTOR_ADDRESS_REG_923_RESETVAL (0x00000000u)
  41257. /* vector_address_reg_924 */
  41258. #define CSL_CPINTC_VECTOR_ADDRESS_REG_924_VECTOR_ADDRESS_924_MASK (0xFFFFFFFFu)
  41259. #define CSL_CPINTC_VECTOR_ADDRESS_REG_924_VECTOR_ADDRESS_924_SHIFT (0x00000000u)
  41260. #define CSL_CPINTC_VECTOR_ADDRESS_REG_924_VECTOR_ADDRESS_924_RESETVAL (0x00000000u)
  41261. #define CSL_CPINTC_VECTOR_ADDRESS_REG_924_RESETVAL (0x00000000u)
  41262. /* vector_address_reg_925 */
  41263. #define CSL_CPINTC_VECTOR_ADDRESS_REG_925_VECTOR_ADDRESS_925_MASK (0xFFFFFFFFu)
  41264. #define CSL_CPINTC_VECTOR_ADDRESS_REG_925_VECTOR_ADDRESS_925_SHIFT (0x00000000u)
  41265. #define CSL_CPINTC_VECTOR_ADDRESS_REG_925_VECTOR_ADDRESS_925_RESETVAL (0x00000000u)
  41266. #define CSL_CPINTC_VECTOR_ADDRESS_REG_925_RESETVAL (0x00000000u)
  41267. /* vector_address_reg_926 */
  41268. #define CSL_CPINTC_VECTOR_ADDRESS_REG_926_VECTOR_ADDRESS_926_MASK (0xFFFFFFFFu)
  41269. #define CSL_CPINTC_VECTOR_ADDRESS_REG_926_VECTOR_ADDRESS_926_SHIFT (0x00000000u)
  41270. #define CSL_CPINTC_VECTOR_ADDRESS_REG_926_VECTOR_ADDRESS_926_RESETVAL (0x00000000u)
  41271. #define CSL_CPINTC_VECTOR_ADDRESS_REG_926_RESETVAL (0x00000000u)
  41272. /* vector_address_reg_927 */
  41273. #define CSL_CPINTC_VECTOR_ADDRESS_REG_927_VECTOR_ADDRESS_927_MASK (0xFFFFFFFFu)
  41274. #define CSL_CPINTC_VECTOR_ADDRESS_REG_927_VECTOR_ADDRESS_927_SHIFT (0x00000000u)
  41275. #define CSL_CPINTC_VECTOR_ADDRESS_REG_927_VECTOR_ADDRESS_927_RESETVAL (0x00000000u)
  41276. #define CSL_CPINTC_VECTOR_ADDRESS_REG_927_RESETVAL (0x00000000u)
  41277. /* vector_address_reg_928 */
  41278. #define CSL_CPINTC_VECTOR_ADDRESS_REG_928_VECTOR_ADDRESS_928_MASK (0xFFFFFFFFu)
  41279. #define CSL_CPINTC_VECTOR_ADDRESS_REG_928_VECTOR_ADDRESS_928_SHIFT (0x00000000u)
  41280. #define CSL_CPINTC_VECTOR_ADDRESS_REG_928_VECTOR_ADDRESS_928_RESETVAL (0x00000000u)
  41281. #define CSL_CPINTC_VECTOR_ADDRESS_REG_928_RESETVAL (0x00000000u)
  41282. /* vector_address_reg_929 */
  41283. #define CSL_CPINTC_VECTOR_ADDRESS_REG_929_VECTOR_ADDRESS_929_MASK (0xFFFFFFFFu)
  41284. #define CSL_CPINTC_VECTOR_ADDRESS_REG_929_VECTOR_ADDRESS_929_SHIFT (0x00000000u)
  41285. #define CSL_CPINTC_VECTOR_ADDRESS_REG_929_VECTOR_ADDRESS_929_RESETVAL (0x00000000u)
  41286. #define CSL_CPINTC_VECTOR_ADDRESS_REG_929_RESETVAL (0x00000000u)
  41287. /* vector_address_reg_930 */
  41288. #define CSL_CPINTC_VECTOR_ADDRESS_REG_930_VECTOR_ADDRESS_930_MASK (0xFFFFFFFFu)
  41289. #define CSL_CPINTC_VECTOR_ADDRESS_REG_930_VECTOR_ADDRESS_930_SHIFT (0x00000000u)
  41290. #define CSL_CPINTC_VECTOR_ADDRESS_REG_930_VECTOR_ADDRESS_930_RESETVAL (0x00000000u)
  41291. #define CSL_CPINTC_VECTOR_ADDRESS_REG_930_RESETVAL (0x00000000u)
  41292. /* vector_address_reg_931 */
  41293. #define CSL_CPINTC_VECTOR_ADDRESS_REG_931_VECTOR_ADDRESS_931_MASK (0xFFFFFFFFu)
  41294. #define CSL_CPINTC_VECTOR_ADDRESS_REG_931_VECTOR_ADDRESS_931_SHIFT (0x00000000u)
  41295. #define CSL_CPINTC_VECTOR_ADDRESS_REG_931_VECTOR_ADDRESS_931_RESETVAL (0x00000000u)
  41296. #define CSL_CPINTC_VECTOR_ADDRESS_REG_931_RESETVAL (0x00000000u)
  41297. /* vector_address_reg_932 */
  41298. #define CSL_CPINTC_VECTOR_ADDRESS_REG_932_VECTOR_ADDRESS_932_MASK (0xFFFFFFFFu)
  41299. #define CSL_CPINTC_VECTOR_ADDRESS_REG_932_VECTOR_ADDRESS_932_SHIFT (0x00000000u)
  41300. #define CSL_CPINTC_VECTOR_ADDRESS_REG_932_VECTOR_ADDRESS_932_RESETVAL (0x00000000u)
  41301. #define CSL_CPINTC_VECTOR_ADDRESS_REG_932_RESETVAL (0x00000000u)
  41302. /* vector_address_reg_933 */
  41303. #define CSL_CPINTC_VECTOR_ADDRESS_REG_933_VECTOR_ADDRESS_933_MASK (0xFFFFFFFFu)
  41304. #define CSL_CPINTC_VECTOR_ADDRESS_REG_933_VECTOR_ADDRESS_933_SHIFT (0x00000000u)
  41305. #define CSL_CPINTC_VECTOR_ADDRESS_REG_933_VECTOR_ADDRESS_933_RESETVAL (0x00000000u)
  41306. #define CSL_CPINTC_VECTOR_ADDRESS_REG_933_RESETVAL (0x00000000u)
  41307. /* vector_address_reg_934 */
  41308. #define CSL_CPINTC_VECTOR_ADDRESS_REG_934_VECTOR_ADDRESS_934_MASK (0xFFFFFFFFu)
  41309. #define CSL_CPINTC_VECTOR_ADDRESS_REG_934_VECTOR_ADDRESS_934_SHIFT (0x00000000u)
  41310. #define CSL_CPINTC_VECTOR_ADDRESS_REG_934_VECTOR_ADDRESS_934_RESETVAL (0x00000000u)
  41311. #define CSL_CPINTC_VECTOR_ADDRESS_REG_934_RESETVAL (0x00000000u)
  41312. /* vector_address_reg_935 */
  41313. #define CSL_CPINTC_VECTOR_ADDRESS_REG_935_VECTOR_ADDRESS_935_MASK (0xFFFFFFFFu)
  41314. #define CSL_CPINTC_VECTOR_ADDRESS_REG_935_VECTOR_ADDRESS_935_SHIFT (0x00000000u)
  41315. #define CSL_CPINTC_VECTOR_ADDRESS_REG_935_VECTOR_ADDRESS_935_RESETVAL (0x00000000u)
  41316. #define CSL_CPINTC_VECTOR_ADDRESS_REG_935_RESETVAL (0x00000000u)
  41317. /* vector_address_reg_936 */
  41318. #define CSL_CPINTC_VECTOR_ADDRESS_REG_936_VECTOR_ADDRESS_936_MASK (0xFFFFFFFFu)
  41319. #define CSL_CPINTC_VECTOR_ADDRESS_REG_936_VECTOR_ADDRESS_936_SHIFT (0x00000000u)
  41320. #define CSL_CPINTC_VECTOR_ADDRESS_REG_936_VECTOR_ADDRESS_936_RESETVAL (0x00000000u)
  41321. #define CSL_CPINTC_VECTOR_ADDRESS_REG_936_RESETVAL (0x00000000u)
  41322. /* vector_address_reg_937 */
  41323. #define CSL_CPINTC_VECTOR_ADDRESS_REG_937_VECTOR_ADDRESS_937_MASK (0xFFFFFFFFu)
  41324. #define CSL_CPINTC_VECTOR_ADDRESS_REG_937_VECTOR_ADDRESS_937_SHIFT (0x00000000u)
  41325. #define CSL_CPINTC_VECTOR_ADDRESS_REG_937_VECTOR_ADDRESS_937_RESETVAL (0x00000000u)
  41326. #define CSL_CPINTC_VECTOR_ADDRESS_REG_937_RESETVAL (0x00000000u)
  41327. /* vector_address_reg_938 */
  41328. #define CSL_CPINTC_VECTOR_ADDRESS_REG_938_VECTOR_ADDRESS_938_MASK (0xFFFFFFFFu)
  41329. #define CSL_CPINTC_VECTOR_ADDRESS_REG_938_VECTOR_ADDRESS_938_SHIFT (0x00000000u)
  41330. #define CSL_CPINTC_VECTOR_ADDRESS_REG_938_VECTOR_ADDRESS_938_RESETVAL (0x00000000u)
  41331. #define CSL_CPINTC_VECTOR_ADDRESS_REG_938_RESETVAL (0x00000000u)
  41332. /* vector_address_reg_939 */
  41333. #define CSL_CPINTC_VECTOR_ADDRESS_REG_939_VECTOR_ADDRESS_939_MASK (0xFFFFFFFFu)
  41334. #define CSL_CPINTC_VECTOR_ADDRESS_REG_939_VECTOR_ADDRESS_939_SHIFT (0x00000000u)
  41335. #define CSL_CPINTC_VECTOR_ADDRESS_REG_939_VECTOR_ADDRESS_939_RESETVAL (0x00000000u)
  41336. #define CSL_CPINTC_VECTOR_ADDRESS_REG_939_RESETVAL (0x00000000u)
  41337. /* vector_address_reg_940 */
  41338. #define CSL_CPINTC_VECTOR_ADDRESS_REG_940_VECTOR_ADDRESS_940_MASK (0xFFFFFFFFu)
  41339. #define CSL_CPINTC_VECTOR_ADDRESS_REG_940_VECTOR_ADDRESS_940_SHIFT (0x00000000u)
  41340. #define CSL_CPINTC_VECTOR_ADDRESS_REG_940_VECTOR_ADDRESS_940_RESETVAL (0x00000000u)
  41341. #define CSL_CPINTC_VECTOR_ADDRESS_REG_940_RESETVAL (0x00000000u)
  41342. /* vector_address_reg_941 */
  41343. #define CSL_CPINTC_VECTOR_ADDRESS_REG_941_VECTOR_ADDRESS_941_MASK (0xFFFFFFFFu)
  41344. #define CSL_CPINTC_VECTOR_ADDRESS_REG_941_VECTOR_ADDRESS_941_SHIFT (0x00000000u)
  41345. #define CSL_CPINTC_VECTOR_ADDRESS_REG_941_VECTOR_ADDRESS_941_RESETVAL (0x00000000u)
  41346. #define CSL_CPINTC_VECTOR_ADDRESS_REG_941_RESETVAL (0x00000000u)
  41347. /* vector_address_reg_942 */
  41348. #define CSL_CPINTC_VECTOR_ADDRESS_REG_942_VECTOR_ADDRESS_942_MASK (0xFFFFFFFFu)
  41349. #define CSL_CPINTC_VECTOR_ADDRESS_REG_942_VECTOR_ADDRESS_942_SHIFT (0x00000000u)
  41350. #define CSL_CPINTC_VECTOR_ADDRESS_REG_942_VECTOR_ADDRESS_942_RESETVAL (0x00000000u)
  41351. #define CSL_CPINTC_VECTOR_ADDRESS_REG_942_RESETVAL (0x00000000u)
  41352. /* vector_address_reg_943 */
  41353. #define CSL_CPINTC_VECTOR_ADDRESS_REG_943_VECTOR_ADDRESS_943_MASK (0xFFFFFFFFu)
  41354. #define CSL_CPINTC_VECTOR_ADDRESS_REG_943_VECTOR_ADDRESS_943_SHIFT (0x00000000u)
  41355. #define CSL_CPINTC_VECTOR_ADDRESS_REG_943_VECTOR_ADDRESS_943_RESETVAL (0x00000000u)
  41356. #define CSL_CPINTC_VECTOR_ADDRESS_REG_943_RESETVAL (0x00000000u)
  41357. /* vector_address_reg_944 */
  41358. #define CSL_CPINTC_VECTOR_ADDRESS_REG_944_VECTOR_ADDRESS_944_MASK (0xFFFFFFFFu)
  41359. #define CSL_CPINTC_VECTOR_ADDRESS_REG_944_VECTOR_ADDRESS_944_SHIFT (0x00000000u)
  41360. #define CSL_CPINTC_VECTOR_ADDRESS_REG_944_VECTOR_ADDRESS_944_RESETVAL (0x00000000u)
  41361. #define CSL_CPINTC_VECTOR_ADDRESS_REG_944_RESETVAL (0x00000000u)
  41362. /* vector_address_reg_945 */
  41363. #define CSL_CPINTC_VECTOR_ADDRESS_REG_945_VECTOR_ADDRESS_945_MASK (0xFFFFFFFFu)
  41364. #define CSL_CPINTC_VECTOR_ADDRESS_REG_945_VECTOR_ADDRESS_945_SHIFT (0x00000000u)
  41365. #define CSL_CPINTC_VECTOR_ADDRESS_REG_945_VECTOR_ADDRESS_945_RESETVAL (0x00000000u)
  41366. #define CSL_CPINTC_VECTOR_ADDRESS_REG_945_RESETVAL (0x00000000u)
  41367. /* vector_address_reg_946 */
  41368. #define CSL_CPINTC_VECTOR_ADDRESS_REG_946_VECTOR_ADDRESS_946_MASK (0xFFFFFFFFu)
  41369. #define CSL_CPINTC_VECTOR_ADDRESS_REG_946_VECTOR_ADDRESS_946_SHIFT (0x00000000u)
  41370. #define CSL_CPINTC_VECTOR_ADDRESS_REG_946_VECTOR_ADDRESS_946_RESETVAL (0x00000000u)
  41371. #define CSL_CPINTC_VECTOR_ADDRESS_REG_946_RESETVAL (0x00000000u)
  41372. /* vector_address_reg_947 */
  41373. #define CSL_CPINTC_VECTOR_ADDRESS_REG_947_VECTOR_ADDRESS_947_MASK (0xFFFFFFFFu)
  41374. #define CSL_CPINTC_VECTOR_ADDRESS_REG_947_VECTOR_ADDRESS_947_SHIFT (0x00000000u)
  41375. #define CSL_CPINTC_VECTOR_ADDRESS_REG_947_VECTOR_ADDRESS_947_RESETVAL (0x00000000u)
  41376. #define CSL_CPINTC_VECTOR_ADDRESS_REG_947_RESETVAL (0x00000000u)
  41377. /* vector_address_reg_948 */
  41378. #define CSL_CPINTC_VECTOR_ADDRESS_REG_948_VECTOR_ADDRESS_948_MASK (0xFFFFFFFFu)
  41379. #define CSL_CPINTC_VECTOR_ADDRESS_REG_948_VECTOR_ADDRESS_948_SHIFT (0x00000000u)
  41380. #define CSL_CPINTC_VECTOR_ADDRESS_REG_948_VECTOR_ADDRESS_948_RESETVAL (0x00000000u)
  41381. #define CSL_CPINTC_VECTOR_ADDRESS_REG_948_RESETVAL (0x00000000u)
  41382. /* vector_address_reg_949 */
  41383. #define CSL_CPINTC_VECTOR_ADDRESS_REG_949_VECTOR_ADDRESS_949_MASK (0xFFFFFFFFu)
  41384. #define CSL_CPINTC_VECTOR_ADDRESS_REG_949_VECTOR_ADDRESS_949_SHIFT (0x00000000u)
  41385. #define CSL_CPINTC_VECTOR_ADDRESS_REG_949_VECTOR_ADDRESS_949_RESETVAL (0x00000000u)
  41386. #define CSL_CPINTC_VECTOR_ADDRESS_REG_949_RESETVAL (0x00000000u)
  41387. /* vector_address_reg_950 */
  41388. #define CSL_CPINTC_VECTOR_ADDRESS_REG_950_VECTOR_ADDRESS_950_MASK (0xFFFFFFFFu)
  41389. #define CSL_CPINTC_VECTOR_ADDRESS_REG_950_VECTOR_ADDRESS_950_SHIFT (0x00000000u)
  41390. #define CSL_CPINTC_VECTOR_ADDRESS_REG_950_VECTOR_ADDRESS_950_RESETVAL (0x00000000u)
  41391. #define CSL_CPINTC_VECTOR_ADDRESS_REG_950_RESETVAL (0x00000000u)
  41392. /* vector_address_reg_951 */
  41393. #define CSL_CPINTC_VECTOR_ADDRESS_REG_951_VECTOR_ADDRESS_951_MASK (0xFFFFFFFFu)
  41394. #define CSL_CPINTC_VECTOR_ADDRESS_REG_951_VECTOR_ADDRESS_951_SHIFT (0x00000000u)
  41395. #define CSL_CPINTC_VECTOR_ADDRESS_REG_951_VECTOR_ADDRESS_951_RESETVAL (0x00000000u)
  41396. #define CSL_CPINTC_VECTOR_ADDRESS_REG_951_RESETVAL (0x00000000u)
  41397. /* vector_address_reg_952 */
  41398. #define CSL_CPINTC_VECTOR_ADDRESS_REG_952_VECTOR_ADDRESS_952_MASK (0xFFFFFFFFu)
  41399. #define CSL_CPINTC_VECTOR_ADDRESS_REG_952_VECTOR_ADDRESS_952_SHIFT (0x00000000u)
  41400. #define CSL_CPINTC_VECTOR_ADDRESS_REG_952_VECTOR_ADDRESS_952_RESETVAL (0x00000000u)
  41401. #define CSL_CPINTC_VECTOR_ADDRESS_REG_952_RESETVAL (0x00000000u)
  41402. /* vector_address_reg_953 */
  41403. #define CSL_CPINTC_VECTOR_ADDRESS_REG_953_VECTOR_ADDRESS_953_MASK (0xFFFFFFFFu)
  41404. #define CSL_CPINTC_VECTOR_ADDRESS_REG_953_VECTOR_ADDRESS_953_SHIFT (0x00000000u)
  41405. #define CSL_CPINTC_VECTOR_ADDRESS_REG_953_VECTOR_ADDRESS_953_RESETVAL (0x00000000u)
  41406. #define CSL_CPINTC_VECTOR_ADDRESS_REG_953_RESETVAL (0x00000000u)
  41407. /* vector_address_reg_954 */
  41408. #define CSL_CPINTC_VECTOR_ADDRESS_REG_954_VECTOR_ADDRESS_954_MASK (0xFFFFFFFFu)
  41409. #define CSL_CPINTC_VECTOR_ADDRESS_REG_954_VECTOR_ADDRESS_954_SHIFT (0x00000000u)
  41410. #define CSL_CPINTC_VECTOR_ADDRESS_REG_954_VECTOR_ADDRESS_954_RESETVAL (0x00000000u)
  41411. #define CSL_CPINTC_VECTOR_ADDRESS_REG_954_RESETVAL (0x00000000u)
  41412. /* vector_address_reg_955 */
  41413. #define CSL_CPINTC_VECTOR_ADDRESS_REG_955_VECTOR_ADDRESS_955_MASK (0xFFFFFFFFu)
  41414. #define CSL_CPINTC_VECTOR_ADDRESS_REG_955_VECTOR_ADDRESS_955_SHIFT (0x00000000u)
  41415. #define CSL_CPINTC_VECTOR_ADDRESS_REG_955_VECTOR_ADDRESS_955_RESETVAL (0x00000000u)
  41416. #define CSL_CPINTC_VECTOR_ADDRESS_REG_955_RESETVAL (0x00000000u)
  41417. /* vector_address_reg_956 */
  41418. #define CSL_CPINTC_VECTOR_ADDRESS_REG_956_VECTOR_ADDRESS_956_MASK (0xFFFFFFFFu)
  41419. #define CSL_CPINTC_VECTOR_ADDRESS_REG_956_VECTOR_ADDRESS_956_SHIFT (0x00000000u)
  41420. #define CSL_CPINTC_VECTOR_ADDRESS_REG_956_VECTOR_ADDRESS_956_RESETVAL (0x00000000u)
  41421. #define CSL_CPINTC_VECTOR_ADDRESS_REG_956_RESETVAL (0x00000000u)
  41422. /* vector_address_reg_957 */
  41423. #define CSL_CPINTC_VECTOR_ADDRESS_REG_957_VECTOR_ADDRESS_957_MASK (0xFFFFFFFFu)
  41424. #define CSL_CPINTC_VECTOR_ADDRESS_REG_957_VECTOR_ADDRESS_957_SHIFT (0x00000000u)
  41425. #define CSL_CPINTC_VECTOR_ADDRESS_REG_957_VECTOR_ADDRESS_957_RESETVAL (0x00000000u)
  41426. #define CSL_CPINTC_VECTOR_ADDRESS_REG_957_RESETVAL (0x00000000u)
  41427. /* vector_address_reg_958 */
  41428. #define CSL_CPINTC_VECTOR_ADDRESS_REG_958_VECTOR_ADDRESS_958_MASK (0xFFFFFFFFu)
  41429. #define CSL_CPINTC_VECTOR_ADDRESS_REG_958_VECTOR_ADDRESS_958_SHIFT (0x00000000u)
  41430. #define CSL_CPINTC_VECTOR_ADDRESS_REG_958_VECTOR_ADDRESS_958_RESETVAL (0x00000000u)
  41431. #define CSL_CPINTC_VECTOR_ADDRESS_REG_958_RESETVAL (0x00000000u)
  41432. /* vector_address_reg_959 */
  41433. #define CSL_CPINTC_VECTOR_ADDRESS_REG_959_VECTOR_ADDRESS_959_MASK (0xFFFFFFFFu)
  41434. #define CSL_CPINTC_VECTOR_ADDRESS_REG_959_VECTOR_ADDRESS_959_SHIFT (0x00000000u)
  41435. #define CSL_CPINTC_VECTOR_ADDRESS_REG_959_VECTOR_ADDRESS_959_RESETVAL (0x00000000u)
  41436. #define CSL_CPINTC_VECTOR_ADDRESS_REG_959_RESETVAL (0x00000000u)
  41437. /* vector_address_reg_960 */
  41438. #define CSL_CPINTC_VECTOR_ADDRESS_REG_960_VECTOR_ADDRESS_960_MASK (0xFFFFFFFFu)
  41439. #define CSL_CPINTC_VECTOR_ADDRESS_REG_960_VECTOR_ADDRESS_960_SHIFT (0x00000000u)
  41440. #define CSL_CPINTC_VECTOR_ADDRESS_REG_960_VECTOR_ADDRESS_960_RESETVAL (0x00000000u)
  41441. #define CSL_CPINTC_VECTOR_ADDRESS_REG_960_RESETVAL (0x00000000u)
  41442. /* vector_address_reg_961 */
  41443. #define CSL_CPINTC_VECTOR_ADDRESS_REG_961_VECTOR_ADDRESS_961_MASK (0xFFFFFFFFu)
  41444. #define CSL_CPINTC_VECTOR_ADDRESS_REG_961_VECTOR_ADDRESS_961_SHIFT (0x00000000u)
  41445. #define CSL_CPINTC_VECTOR_ADDRESS_REG_961_VECTOR_ADDRESS_961_RESETVAL (0x00000000u)
  41446. #define CSL_CPINTC_VECTOR_ADDRESS_REG_961_RESETVAL (0x00000000u)
  41447. /* vector_address_reg_962 */
  41448. #define CSL_CPINTC_VECTOR_ADDRESS_REG_962_VECTOR_ADDRESS_962_MASK (0xFFFFFFFFu)
  41449. #define CSL_CPINTC_VECTOR_ADDRESS_REG_962_VECTOR_ADDRESS_962_SHIFT (0x00000000u)
  41450. #define CSL_CPINTC_VECTOR_ADDRESS_REG_962_VECTOR_ADDRESS_962_RESETVAL (0x00000000u)
  41451. #define CSL_CPINTC_VECTOR_ADDRESS_REG_962_RESETVAL (0x00000000u)
  41452. /* vector_address_reg_963 */
  41453. #define CSL_CPINTC_VECTOR_ADDRESS_REG_963_VECTOR_ADDRESS_963_MASK (0xFFFFFFFFu)
  41454. #define CSL_CPINTC_VECTOR_ADDRESS_REG_963_VECTOR_ADDRESS_963_SHIFT (0x00000000u)
  41455. #define CSL_CPINTC_VECTOR_ADDRESS_REG_963_VECTOR_ADDRESS_963_RESETVAL (0x00000000u)
  41456. #define CSL_CPINTC_VECTOR_ADDRESS_REG_963_RESETVAL (0x00000000u)
  41457. /* vector_address_reg_964 */
  41458. #define CSL_CPINTC_VECTOR_ADDRESS_REG_964_VECTOR_ADDRESS_964_MASK (0xFFFFFFFFu)
  41459. #define CSL_CPINTC_VECTOR_ADDRESS_REG_964_VECTOR_ADDRESS_964_SHIFT (0x00000000u)
  41460. #define CSL_CPINTC_VECTOR_ADDRESS_REG_964_VECTOR_ADDRESS_964_RESETVAL (0x00000000u)
  41461. #define CSL_CPINTC_VECTOR_ADDRESS_REG_964_RESETVAL (0x00000000u)
  41462. /* vector_address_reg_965 */
  41463. #define CSL_CPINTC_VECTOR_ADDRESS_REG_965_VECTOR_ADDRESS_965_MASK (0xFFFFFFFFu)
  41464. #define CSL_CPINTC_VECTOR_ADDRESS_REG_965_VECTOR_ADDRESS_965_SHIFT (0x00000000u)
  41465. #define CSL_CPINTC_VECTOR_ADDRESS_REG_965_VECTOR_ADDRESS_965_RESETVAL (0x00000000u)
  41466. #define CSL_CPINTC_VECTOR_ADDRESS_REG_965_RESETVAL (0x00000000u)
  41467. /* vector_address_reg_966 */
  41468. #define CSL_CPINTC_VECTOR_ADDRESS_REG_966_VECTOR_ADDRESS_966_MASK (0xFFFFFFFFu)
  41469. #define CSL_CPINTC_VECTOR_ADDRESS_REG_966_VECTOR_ADDRESS_966_SHIFT (0x00000000u)
  41470. #define CSL_CPINTC_VECTOR_ADDRESS_REG_966_VECTOR_ADDRESS_966_RESETVAL (0x00000000u)
  41471. #define CSL_CPINTC_VECTOR_ADDRESS_REG_966_RESETVAL (0x00000000u)
  41472. /* vector_address_reg_967 */
  41473. #define CSL_CPINTC_VECTOR_ADDRESS_REG_967_VECTOR_ADDRESS_967_MASK (0xFFFFFFFFu)
  41474. #define CSL_CPINTC_VECTOR_ADDRESS_REG_967_VECTOR_ADDRESS_967_SHIFT (0x00000000u)
  41475. #define CSL_CPINTC_VECTOR_ADDRESS_REG_967_VECTOR_ADDRESS_967_RESETVAL (0x00000000u)
  41476. #define CSL_CPINTC_VECTOR_ADDRESS_REG_967_RESETVAL (0x00000000u)
  41477. /* vector_address_reg_968 */
  41478. #define CSL_CPINTC_VECTOR_ADDRESS_REG_968_VECTOR_ADDRESS_968_MASK (0xFFFFFFFFu)
  41479. #define CSL_CPINTC_VECTOR_ADDRESS_REG_968_VECTOR_ADDRESS_968_SHIFT (0x00000000u)
  41480. #define CSL_CPINTC_VECTOR_ADDRESS_REG_968_VECTOR_ADDRESS_968_RESETVAL (0x00000000u)
  41481. #define CSL_CPINTC_VECTOR_ADDRESS_REG_968_RESETVAL (0x00000000u)
  41482. /* vector_address_reg_969 */
  41483. #define CSL_CPINTC_VECTOR_ADDRESS_REG_969_VECTOR_ADDRESS_969_MASK (0xFFFFFFFFu)
  41484. #define CSL_CPINTC_VECTOR_ADDRESS_REG_969_VECTOR_ADDRESS_969_SHIFT (0x00000000u)
  41485. #define CSL_CPINTC_VECTOR_ADDRESS_REG_969_VECTOR_ADDRESS_969_RESETVAL (0x00000000u)
  41486. #define CSL_CPINTC_VECTOR_ADDRESS_REG_969_RESETVAL (0x00000000u)
  41487. /* vector_address_reg_970 */
  41488. #define CSL_CPINTC_VECTOR_ADDRESS_REG_970_VECTOR_ADDRESS_970_MASK (0xFFFFFFFFu)
  41489. #define CSL_CPINTC_VECTOR_ADDRESS_REG_970_VECTOR_ADDRESS_970_SHIFT (0x00000000u)
  41490. #define CSL_CPINTC_VECTOR_ADDRESS_REG_970_VECTOR_ADDRESS_970_RESETVAL (0x00000000u)
  41491. #define CSL_CPINTC_VECTOR_ADDRESS_REG_970_RESETVAL (0x00000000u)
  41492. /* vector_address_reg_971 */
  41493. #define CSL_CPINTC_VECTOR_ADDRESS_REG_971_VECTOR_ADDRESS_971_MASK (0xFFFFFFFFu)
  41494. #define CSL_CPINTC_VECTOR_ADDRESS_REG_971_VECTOR_ADDRESS_971_SHIFT (0x00000000u)
  41495. #define CSL_CPINTC_VECTOR_ADDRESS_REG_971_VECTOR_ADDRESS_971_RESETVAL (0x00000000u)
  41496. #define CSL_CPINTC_VECTOR_ADDRESS_REG_971_RESETVAL (0x00000000u)
  41497. /* vector_address_reg_972 */
  41498. #define CSL_CPINTC_VECTOR_ADDRESS_REG_972_VECTOR_ADDRESS_972_MASK (0xFFFFFFFFu)
  41499. #define CSL_CPINTC_VECTOR_ADDRESS_REG_972_VECTOR_ADDRESS_972_SHIFT (0x00000000u)
  41500. #define CSL_CPINTC_VECTOR_ADDRESS_REG_972_VECTOR_ADDRESS_972_RESETVAL (0x00000000u)
  41501. #define CSL_CPINTC_VECTOR_ADDRESS_REG_972_RESETVAL (0x00000000u)
  41502. /* vector_address_reg_973 */
  41503. #define CSL_CPINTC_VECTOR_ADDRESS_REG_973_VECTOR_ADDRESS_973_MASK (0xFFFFFFFFu)
  41504. #define CSL_CPINTC_VECTOR_ADDRESS_REG_973_VECTOR_ADDRESS_973_SHIFT (0x00000000u)
  41505. #define CSL_CPINTC_VECTOR_ADDRESS_REG_973_VECTOR_ADDRESS_973_RESETVAL (0x00000000u)
  41506. #define CSL_CPINTC_VECTOR_ADDRESS_REG_973_RESETVAL (0x00000000u)
  41507. /* vector_address_reg_974 */
  41508. #define CSL_CPINTC_VECTOR_ADDRESS_REG_974_VECTOR_ADDRESS_974_MASK (0xFFFFFFFFu)
  41509. #define CSL_CPINTC_VECTOR_ADDRESS_REG_974_VECTOR_ADDRESS_974_SHIFT (0x00000000u)
  41510. #define CSL_CPINTC_VECTOR_ADDRESS_REG_974_VECTOR_ADDRESS_974_RESETVAL (0x00000000u)
  41511. #define CSL_CPINTC_VECTOR_ADDRESS_REG_974_RESETVAL (0x00000000u)
  41512. /* vector_address_reg_975 */
  41513. #define CSL_CPINTC_VECTOR_ADDRESS_REG_975_VECTOR_ADDRESS_975_MASK (0xFFFFFFFFu)
  41514. #define CSL_CPINTC_VECTOR_ADDRESS_REG_975_VECTOR_ADDRESS_975_SHIFT (0x00000000u)
  41515. #define CSL_CPINTC_VECTOR_ADDRESS_REG_975_VECTOR_ADDRESS_975_RESETVAL (0x00000000u)
  41516. #define CSL_CPINTC_VECTOR_ADDRESS_REG_975_RESETVAL (0x00000000u)
  41517. /* vector_address_reg_976 */
  41518. #define CSL_CPINTC_VECTOR_ADDRESS_REG_976_VECTOR_ADDRESS_976_MASK (0xFFFFFFFFu)
  41519. #define CSL_CPINTC_VECTOR_ADDRESS_REG_976_VECTOR_ADDRESS_976_SHIFT (0x00000000u)
  41520. #define CSL_CPINTC_VECTOR_ADDRESS_REG_976_VECTOR_ADDRESS_976_RESETVAL (0x00000000u)
  41521. #define CSL_CPINTC_VECTOR_ADDRESS_REG_976_RESETVAL (0x00000000u)
  41522. /* vector_address_reg_977 */
  41523. #define CSL_CPINTC_VECTOR_ADDRESS_REG_977_VECTOR_ADDRESS_977_MASK (0xFFFFFFFFu)
  41524. #define CSL_CPINTC_VECTOR_ADDRESS_REG_977_VECTOR_ADDRESS_977_SHIFT (0x00000000u)
  41525. #define CSL_CPINTC_VECTOR_ADDRESS_REG_977_VECTOR_ADDRESS_977_RESETVAL (0x00000000u)
  41526. #define CSL_CPINTC_VECTOR_ADDRESS_REG_977_RESETVAL (0x00000000u)
  41527. /* vector_address_reg_978 */
  41528. #define CSL_CPINTC_VECTOR_ADDRESS_REG_978_VECTOR_ADDRESS_978_MASK (0xFFFFFFFFu)
  41529. #define CSL_CPINTC_VECTOR_ADDRESS_REG_978_VECTOR_ADDRESS_978_SHIFT (0x00000000u)
  41530. #define CSL_CPINTC_VECTOR_ADDRESS_REG_978_VECTOR_ADDRESS_978_RESETVAL (0x00000000u)
  41531. #define CSL_CPINTC_VECTOR_ADDRESS_REG_978_RESETVAL (0x00000000u)
  41532. /* vector_address_reg_979 */
  41533. #define CSL_CPINTC_VECTOR_ADDRESS_REG_979_VECTOR_ADDRESS_979_MASK (0xFFFFFFFFu)
  41534. #define CSL_CPINTC_VECTOR_ADDRESS_REG_979_VECTOR_ADDRESS_979_SHIFT (0x00000000u)
  41535. #define CSL_CPINTC_VECTOR_ADDRESS_REG_979_VECTOR_ADDRESS_979_RESETVAL (0x00000000u)
  41536. #define CSL_CPINTC_VECTOR_ADDRESS_REG_979_RESETVAL (0x00000000u)
  41537. /* vector_address_reg_980 */
  41538. #define CSL_CPINTC_VECTOR_ADDRESS_REG_980_VECTOR_ADDRESS_980_MASK (0xFFFFFFFFu)
  41539. #define CSL_CPINTC_VECTOR_ADDRESS_REG_980_VECTOR_ADDRESS_980_SHIFT (0x00000000u)
  41540. #define CSL_CPINTC_VECTOR_ADDRESS_REG_980_VECTOR_ADDRESS_980_RESETVAL (0x00000000u)
  41541. #define CSL_CPINTC_VECTOR_ADDRESS_REG_980_RESETVAL (0x00000000u)
  41542. /* vector_address_reg_981 */
  41543. #define CSL_CPINTC_VECTOR_ADDRESS_REG_981_VECTOR_ADDRESS_981_MASK (0xFFFFFFFFu)
  41544. #define CSL_CPINTC_VECTOR_ADDRESS_REG_981_VECTOR_ADDRESS_981_SHIFT (0x00000000u)
  41545. #define CSL_CPINTC_VECTOR_ADDRESS_REG_981_VECTOR_ADDRESS_981_RESETVAL (0x00000000u)
  41546. #define CSL_CPINTC_VECTOR_ADDRESS_REG_981_RESETVAL (0x00000000u)
  41547. /* vector_address_reg_982 */
  41548. #define CSL_CPINTC_VECTOR_ADDRESS_REG_982_VECTOR_ADDRESS_982_MASK (0xFFFFFFFFu)
  41549. #define CSL_CPINTC_VECTOR_ADDRESS_REG_982_VECTOR_ADDRESS_982_SHIFT (0x00000000u)
  41550. #define CSL_CPINTC_VECTOR_ADDRESS_REG_982_VECTOR_ADDRESS_982_RESETVAL (0x00000000u)
  41551. #define CSL_CPINTC_VECTOR_ADDRESS_REG_982_RESETVAL (0x00000000u)
  41552. /* vector_address_reg_983 */
  41553. #define CSL_CPINTC_VECTOR_ADDRESS_REG_983_VECTOR_ADDRESS_983_MASK (0xFFFFFFFFu)
  41554. #define CSL_CPINTC_VECTOR_ADDRESS_REG_983_VECTOR_ADDRESS_983_SHIFT (0x00000000u)
  41555. #define CSL_CPINTC_VECTOR_ADDRESS_REG_983_VECTOR_ADDRESS_983_RESETVAL (0x00000000u)
  41556. #define CSL_CPINTC_VECTOR_ADDRESS_REG_983_RESETVAL (0x00000000u)
  41557. /* vector_address_reg_984 */
  41558. #define CSL_CPINTC_VECTOR_ADDRESS_REG_984_VECTOR_ADDRESS_984_MASK (0xFFFFFFFFu)
  41559. #define CSL_CPINTC_VECTOR_ADDRESS_REG_984_VECTOR_ADDRESS_984_SHIFT (0x00000000u)
  41560. #define CSL_CPINTC_VECTOR_ADDRESS_REG_984_VECTOR_ADDRESS_984_RESETVAL (0x00000000u)
  41561. #define CSL_CPINTC_VECTOR_ADDRESS_REG_984_RESETVAL (0x00000000u)
  41562. /* vector_address_reg_985 */
  41563. #define CSL_CPINTC_VECTOR_ADDRESS_REG_985_VECTOR_ADDRESS_985_MASK (0xFFFFFFFFu)
  41564. #define CSL_CPINTC_VECTOR_ADDRESS_REG_985_VECTOR_ADDRESS_985_SHIFT (0x00000000u)
  41565. #define CSL_CPINTC_VECTOR_ADDRESS_REG_985_VECTOR_ADDRESS_985_RESETVAL (0x00000000u)
  41566. #define CSL_CPINTC_VECTOR_ADDRESS_REG_985_RESETVAL (0x00000000u)
  41567. /* vector_address_reg_986 */
  41568. #define CSL_CPINTC_VECTOR_ADDRESS_REG_986_VECTOR_ADDRESS_986_MASK (0xFFFFFFFFu)
  41569. #define CSL_CPINTC_VECTOR_ADDRESS_REG_986_VECTOR_ADDRESS_986_SHIFT (0x00000000u)
  41570. #define CSL_CPINTC_VECTOR_ADDRESS_REG_986_VECTOR_ADDRESS_986_RESETVAL (0x00000000u)
  41571. #define CSL_CPINTC_VECTOR_ADDRESS_REG_986_RESETVAL (0x00000000u)
  41572. /* vector_address_reg_987 */
  41573. #define CSL_CPINTC_VECTOR_ADDRESS_REG_987_VECTOR_ADDRESS_987_MASK (0xFFFFFFFFu)
  41574. #define CSL_CPINTC_VECTOR_ADDRESS_REG_987_VECTOR_ADDRESS_987_SHIFT (0x00000000u)
  41575. #define CSL_CPINTC_VECTOR_ADDRESS_REG_987_VECTOR_ADDRESS_987_RESETVAL (0x00000000u)
  41576. #define CSL_CPINTC_VECTOR_ADDRESS_REG_987_RESETVAL (0x00000000u)
  41577. /* vector_address_reg_988 */
  41578. #define CSL_CPINTC_VECTOR_ADDRESS_REG_988_VECTOR_ADDRESS_988_MASK (0xFFFFFFFFu)
  41579. #define CSL_CPINTC_VECTOR_ADDRESS_REG_988_VECTOR_ADDRESS_988_SHIFT (0x00000000u)
  41580. #define CSL_CPINTC_VECTOR_ADDRESS_REG_988_VECTOR_ADDRESS_988_RESETVAL (0x00000000u)
  41581. #define CSL_CPINTC_VECTOR_ADDRESS_REG_988_RESETVAL (0x00000000u)
  41582. /* vector_address_reg_989 */
  41583. #define CSL_CPINTC_VECTOR_ADDRESS_REG_989_VECTOR_ADDRESS_989_MASK (0xFFFFFFFFu)
  41584. #define CSL_CPINTC_VECTOR_ADDRESS_REG_989_VECTOR_ADDRESS_989_SHIFT (0x00000000u)
  41585. #define CSL_CPINTC_VECTOR_ADDRESS_REG_989_VECTOR_ADDRESS_989_RESETVAL (0x00000000u)
  41586. #define CSL_CPINTC_VECTOR_ADDRESS_REG_989_RESETVAL (0x00000000u)
  41587. /* vector_address_reg_990 */
  41588. #define CSL_CPINTC_VECTOR_ADDRESS_REG_990_VECTOR_ADDRESS_990_MASK (0xFFFFFFFFu)
  41589. #define CSL_CPINTC_VECTOR_ADDRESS_REG_990_VECTOR_ADDRESS_990_SHIFT (0x00000000u)
  41590. #define CSL_CPINTC_VECTOR_ADDRESS_REG_990_VECTOR_ADDRESS_990_RESETVAL (0x00000000u)
  41591. #define CSL_CPINTC_VECTOR_ADDRESS_REG_990_RESETVAL (0x00000000u)
  41592. /* vector_address_reg_991 */
  41593. #define CSL_CPINTC_VECTOR_ADDRESS_REG_991_VECTOR_ADDRESS_991_MASK (0xFFFFFFFFu)
  41594. #define CSL_CPINTC_VECTOR_ADDRESS_REG_991_VECTOR_ADDRESS_991_SHIFT (0x00000000u)
  41595. #define CSL_CPINTC_VECTOR_ADDRESS_REG_991_VECTOR_ADDRESS_991_RESETVAL (0x00000000u)
  41596. #define CSL_CPINTC_VECTOR_ADDRESS_REG_991_RESETVAL (0x00000000u)
  41597. /* vector_address_reg_992 */
  41598. #define CSL_CPINTC_VECTOR_ADDRESS_REG_992_VECTOR_ADDRESS_992_MASK (0xFFFFFFFFu)
  41599. #define CSL_CPINTC_VECTOR_ADDRESS_REG_992_VECTOR_ADDRESS_992_SHIFT (0x00000000u)
  41600. #define CSL_CPINTC_VECTOR_ADDRESS_REG_992_VECTOR_ADDRESS_992_RESETVAL (0x00000000u)
  41601. #define CSL_CPINTC_VECTOR_ADDRESS_REG_992_RESETVAL (0x00000000u)
  41602. /* vector_address_reg_993 */
  41603. #define CSL_CPINTC_VECTOR_ADDRESS_REG_993_VECTOR_ADDRESS_993_MASK (0xFFFFFFFFu)
  41604. #define CSL_CPINTC_VECTOR_ADDRESS_REG_993_VECTOR_ADDRESS_993_SHIFT (0x00000000u)
  41605. #define CSL_CPINTC_VECTOR_ADDRESS_REG_993_VECTOR_ADDRESS_993_RESETVAL (0x00000000u)
  41606. #define CSL_CPINTC_VECTOR_ADDRESS_REG_993_RESETVAL (0x00000000u)
  41607. /* vector_address_reg_994 */
  41608. #define CSL_CPINTC_VECTOR_ADDRESS_REG_994_VECTOR_ADDRESS_994_MASK (0xFFFFFFFFu)
  41609. #define CSL_CPINTC_VECTOR_ADDRESS_REG_994_VECTOR_ADDRESS_994_SHIFT (0x00000000u)
  41610. #define CSL_CPINTC_VECTOR_ADDRESS_REG_994_VECTOR_ADDRESS_994_RESETVAL (0x00000000u)
  41611. #define CSL_CPINTC_VECTOR_ADDRESS_REG_994_RESETVAL (0x00000000u)
  41612. /* vector_address_reg_995 */
  41613. #define CSL_CPINTC_VECTOR_ADDRESS_REG_995_VECTOR_ADDRESS_995_MASK (0xFFFFFFFFu)
  41614. #define CSL_CPINTC_VECTOR_ADDRESS_REG_995_VECTOR_ADDRESS_995_SHIFT (0x00000000u)
  41615. #define CSL_CPINTC_VECTOR_ADDRESS_REG_995_VECTOR_ADDRESS_995_RESETVAL (0x00000000u)
  41616. #define CSL_CPINTC_VECTOR_ADDRESS_REG_995_RESETVAL (0x00000000u)
  41617. /* vector_address_reg_996 */
  41618. #define CSL_CPINTC_VECTOR_ADDRESS_REG_996_VECTOR_ADDRESS_996_MASK (0xFFFFFFFFu)
  41619. #define CSL_CPINTC_VECTOR_ADDRESS_REG_996_VECTOR_ADDRESS_996_SHIFT (0x00000000u)
  41620. #define CSL_CPINTC_VECTOR_ADDRESS_REG_996_VECTOR_ADDRESS_996_RESETVAL (0x00000000u)
  41621. #define CSL_CPINTC_VECTOR_ADDRESS_REG_996_RESETVAL (0x00000000u)
  41622. /* vector_address_reg_997 */
  41623. #define CSL_CPINTC_VECTOR_ADDRESS_REG_997_VECTOR_ADDRESS_997_MASK (0xFFFFFFFFu)
  41624. #define CSL_CPINTC_VECTOR_ADDRESS_REG_997_VECTOR_ADDRESS_997_SHIFT (0x00000000u)
  41625. #define CSL_CPINTC_VECTOR_ADDRESS_REG_997_VECTOR_ADDRESS_997_RESETVAL (0x00000000u)
  41626. #define CSL_CPINTC_VECTOR_ADDRESS_REG_997_RESETVAL (0x00000000u)
  41627. /* vector_address_reg_998 */
  41628. #define CSL_CPINTC_VECTOR_ADDRESS_REG_998_VECTOR_ADDRESS_998_MASK (0xFFFFFFFFu)
  41629. #define CSL_CPINTC_VECTOR_ADDRESS_REG_998_VECTOR_ADDRESS_998_SHIFT (0x00000000u)
  41630. #define CSL_CPINTC_VECTOR_ADDRESS_REG_998_VECTOR_ADDRESS_998_RESETVAL (0x00000000u)
  41631. #define CSL_CPINTC_VECTOR_ADDRESS_REG_998_RESETVAL (0x00000000u)
  41632. /* vector_address_reg_999 */
  41633. #define CSL_CPINTC_VECTOR_ADDRESS_REG_999_VECTOR_ADDRESS_999_MASK (0xFFFFFFFFu)
  41634. #define CSL_CPINTC_VECTOR_ADDRESS_REG_999_VECTOR_ADDRESS_999_SHIFT (0x00000000u)
  41635. #define CSL_CPINTC_VECTOR_ADDRESS_REG_999_VECTOR_ADDRESS_999_RESETVAL (0x00000000u)
  41636. #define CSL_CPINTC_VECTOR_ADDRESS_REG_999_RESETVAL (0x00000000u)
  41637. /* vector_address_reg_1000 */
  41638. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1000_VECTOR_ADDRESS_1000_MASK (0xFFFFFFFFu)
  41639. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1000_VECTOR_ADDRESS_1000_SHIFT (0x00000000u)
  41640. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1000_VECTOR_ADDRESS_1000_RESETVAL (0x00000000u)
  41641. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1000_RESETVAL (0x00000000u)
  41642. /* vector_address_reg_1001 */
  41643. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1001_VECTOR_ADDRESS_1001_MASK (0xFFFFFFFFu)
  41644. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1001_VECTOR_ADDRESS_1001_SHIFT (0x00000000u)
  41645. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1001_VECTOR_ADDRESS_1001_RESETVAL (0x00000000u)
  41646. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1001_RESETVAL (0x00000000u)
  41647. /* vector_address_reg_1002 */
  41648. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1002_VECTOR_ADDRESS_1002_MASK (0xFFFFFFFFu)
  41649. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1002_VECTOR_ADDRESS_1002_SHIFT (0x00000000u)
  41650. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1002_VECTOR_ADDRESS_1002_RESETVAL (0x00000000u)
  41651. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1002_RESETVAL (0x00000000u)
  41652. /* vector_address_reg_1003 */
  41653. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1003_VECTOR_ADDRESS_1003_MASK (0xFFFFFFFFu)
  41654. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1003_VECTOR_ADDRESS_1003_SHIFT (0x00000000u)
  41655. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1003_VECTOR_ADDRESS_1003_RESETVAL (0x00000000u)
  41656. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1003_RESETVAL (0x00000000u)
  41657. /* vector_address_reg_1004 */
  41658. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1004_VECTOR_ADDRESS_1004_MASK (0xFFFFFFFFu)
  41659. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1004_VECTOR_ADDRESS_1004_SHIFT (0x00000000u)
  41660. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1004_VECTOR_ADDRESS_1004_RESETVAL (0x00000000u)
  41661. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1004_RESETVAL (0x00000000u)
  41662. /* vector_address_reg_1005 */
  41663. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1005_VECTOR_ADDRESS_1005_MASK (0xFFFFFFFFu)
  41664. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1005_VECTOR_ADDRESS_1005_SHIFT (0x00000000u)
  41665. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1005_VECTOR_ADDRESS_1005_RESETVAL (0x00000000u)
  41666. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1005_RESETVAL (0x00000000u)
  41667. /* vector_address_reg_1006 */
  41668. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1006_VECTOR_ADDRESS_1006_MASK (0xFFFFFFFFu)
  41669. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1006_VECTOR_ADDRESS_1006_SHIFT (0x00000000u)
  41670. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1006_VECTOR_ADDRESS_1006_RESETVAL (0x00000000u)
  41671. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1006_RESETVAL (0x00000000u)
  41672. /* vector_address_reg_1007 */
  41673. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1007_VECTOR_ADDRESS_1007_MASK (0xFFFFFFFFu)
  41674. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1007_VECTOR_ADDRESS_1007_SHIFT (0x00000000u)
  41675. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1007_VECTOR_ADDRESS_1007_RESETVAL (0x00000000u)
  41676. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1007_RESETVAL (0x00000000u)
  41677. /* vector_address_reg_1008 */
  41678. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1008_VECTOR_ADDRESS_1008_MASK (0xFFFFFFFFu)
  41679. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1008_VECTOR_ADDRESS_1008_SHIFT (0x00000000u)
  41680. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1008_VECTOR_ADDRESS_1008_RESETVAL (0x00000000u)
  41681. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1008_RESETVAL (0x00000000u)
  41682. /* vector_address_reg_1009 */
  41683. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1009_VECTOR_ADDRESS_1009_MASK (0xFFFFFFFFu)
  41684. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1009_VECTOR_ADDRESS_1009_SHIFT (0x00000000u)
  41685. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1009_VECTOR_ADDRESS_1009_RESETVAL (0x00000000u)
  41686. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1009_RESETVAL (0x00000000u)
  41687. /* vector_address_reg_1010 */
  41688. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1010_VECTOR_ADDRESS_1010_MASK (0xFFFFFFFFu)
  41689. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1010_VECTOR_ADDRESS_1010_SHIFT (0x00000000u)
  41690. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1010_VECTOR_ADDRESS_1010_RESETVAL (0x00000000u)
  41691. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1010_RESETVAL (0x00000000u)
  41692. /* vector_address_reg_1011 */
  41693. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1011_VECTOR_ADDRESS_1011_MASK (0xFFFFFFFFu)
  41694. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1011_VECTOR_ADDRESS_1011_SHIFT (0x00000000u)
  41695. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1011_VECTOR_ADDRESS_1011_RESETVAL (0x00000000u)
  41696. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1011_RESETVAL (0x00000000u)
  41697. /* vector_address_reg_1012 */
  41698. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1012_VECTOR_ADDRESS_1012_MASK (0xFFFFFFFFu)
  41699. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1012_VECTOR_ADDRESS_1012_SHIFT (0x00000000u)
  41700. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1012_VECTOR_ADDRESS_1012_RESETVAL (0x00000000u)
  41701. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1012_RESETVAL (0x00000000u)
  41702. /* vector_address_reg_1013 */
  41703. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1013_VECTOR_ADDRESS_1013_MASK (0xFFFFFFFFu)
  41704. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1013_VECTOR_ADDRESS_1013_SHIFT (0x00000000u)
  41705. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1013_VECTOR_ADDRESS_1013_RESETVAL (0x00000000u)
  41706. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1013_RESETVAL (0x00000000u)
  41707. /* vector_address_reg_1014 */
  41708. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1014_VECTOR_ADDRESS_1014_MASK (0xFFFFFFFFu)
  41709. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1014_VECTOR_ADDRESS_1014_SHIFT (0x00000000u)
  41710. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1014_VECTOR_ADDRESS_1014_RESETVAL (0x00000000u)
  41711. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1014_RESETVAL (0x00000000u)
  41712. /* vector_address_reg_1015 */
  41713. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1015_VECTOR_ADDRESS_1015_MASK (0xFFFFFFFFu)
  41714. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1015_VECTOR_ADDRESS_1015_SHIFT (0x00000000u)
  41715. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1015_VECTOR_ADDRESS_1015_RESETVAL (0x00000000u)
  41716. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1015_RESETVAL (0x00000000u)
  41717. /* vector_address_reg_1016 */
  41718. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1016_VECTOR_ADDRESS_1016_MASK (0xFFFFFFFFu)
  41719. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1016_VECTOR_ADDRESS_1016_SHIFT (0x00000000u)
  41720. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1016_VECTOR_ADDRESS_1016_RESETVAL (0x00000000u)
  41721. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1016_RESETVAL (0x00000000u)
  41722. /* vector_address_reg_1017 */
  41723. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1017_VECTOR_ADDRESS_1017_MASK (0xFFFFFFFFu)
  41724. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1017_VECTOR_ADDRESS_1017_SHIFT (0x00000000u)
  41725. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1017_VECTOR_ADDRESS_1017_RESETVAL (0x00000000u)
  41726. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1017_RESETVAL (0x00000000u)
  41727. /* vector_address_reg_1018 */
  41728. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1018_VECTOR_ADDRESS_1018_MASK (0xFFFFFFFFu)
  41729. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1018_VECTOR_ADDRESS_1018_SHIFT (0x00000000u)
  41730. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1018_VECTOR_ADDRESS_1018_RESETVAL (0x00000000u)
  41731. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1018_RESETVAL (0x00000000u)
  41732. /* vector_address_reg_1019 */
  41733. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1019_VECTOR_ADDRESS_1019_MASK (0xFFFFFFFFu)
  41734. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1019_VECTOR_ADDRESS_1019_SHIFT (0x00000000u)
  41735. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1019_VECTOR_ADDRESS_1019_RESETVAL (0x00000000u)
  41736. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1019_RESETVAL (0x00000000u)
  41737. /* vector_address_reg_1020 */
  41738. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1020_VECTOR_ADDRESS_1020_MASK (0xFFFFFFFFu)
  41739. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1020_VECTOR_ADDRESS_1020_SHIFT (0x00000000u)
  41740. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1020_VECTOR_ADDRESS_1020_RESETVAL (0x00000000u)
  41741. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1020_RESETVAL (0x00000000u)
  41742. /* vector_address_reg_1021 */
  41743. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1021_VECTOR_ADDRESS_1021_MASK (0xFFFFFFFFu)
  41744. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1021_VECTOR_ADDRESS_1021_SHIFT (0x00000000u)
  41745. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1021_VECTOR_ADDRESS_1021_RESETVAL (0x00000000u)
  41746. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1021_RESETVAL (0x00000000u)
  41747. /* vector_address_reg_1022 */
  41748. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1022_VECTOR_ADDRESS_1022_MASK (0xFFFFFFFFu)
  41749. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1022_VECTOR_ADDRESS_1022_SHIFT (0x00000000u)
  41750. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1022_VECTOR_ADDRESS_1022_RESETVAL (0x00000000u)
  41751. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1022_RESETVAL (0x00000000u)
  41752. /* vector_address_reg_1023 */
  41753. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1023_VECTOR_ADDRESS_1023_MASK (0xFFFFFFFFu)
  41754. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1023_VECTOR_ADDRESS_1023_SHIFT (0x00000000u)
  41755. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1023_VECTOR_ADDRESS_1023_RESETVAL (0x00000000u)
  41756. #define CSL_CPINTC_VECTOR_ADDRESS_REG_1023_RESETVAL (0x00000000u)
  41757. #endif