cslr_chip.h 39 KB

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  1. /* ============================================================================
  2. * Copyright (c) Texas Instruments Incorporated 2009
  3. *
  4. * Redistribution and use in source and binary forms, with or without
  5. * modification, are permitted provided that the following conditions
  6. * are met:
  7. *
  8. * Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. *
  11. * Redistributions in binary form must reproduce the above copyright
  12. * notice, this list of conditions and the following disclaimer in the
  13. * documentation and/or other materials provided with the
  14. * distribution.
  15. *
  16. * Neither the name of Texas Instruments Incorporated nor the names of
  17. * its contributors may be used to endorse or promote products derived
  18. * from this software without specific prior written permission.
  19. *
  20. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  21. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  22. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  23. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  24. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  25. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  26. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  27. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  28. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  30. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31. *
  32. */
  33. /** ============================================================================
  34. * @file cslr_chip.h
  35. *
  36. * @brief CSL Register Overlay definition file for C667x Chip level
  37. * Registers.
  38. * ============================================================================
  39. */
  40. #ifndef CSLR_CHIP_H_
  41. #define CSLR_CHIP_H_
  42. #include <ti/csl/cslr.h>
  43. #include <ti/csl/tistdtypes.h>
  44. /* Minimum unit = 1 byte */
  45. /**************************************************************************\
  46. * Field Definition Macros
  47. \**************************************************************************/
  48. /* AMR */
  49. #define CSL_CHIP_AMR_BK1_MASK (0x03E00000u)
  50. #define CSL_CHIP_AMR_BK1_SHIFT (0x00000015u)
  51. #define CSL_CHIP_AMR_BK1_RESETVAL (0x00000000u)
  52. #define CSL_CHIP_AMR_BK0_MASK (0x001F0000u)
  53. #define CSL_CHIP_AMR_BK0_SHIFT (0x00000010u)
  54. #define CSL_CHIP_AMR_BK0_RESETVAL (0x00000000u)
  55. #define CSL_CHIP_AMR_B7MODE_MASK (0x0000C000u)
  56. #define CSL_CHIP_AMR_B7MODE_SHIFT (0x0000000Eu)
  57. #define CSL_CHIP_AMR_B7MODE_RESETVAL (0x00000000u)
  58. /*----B7MODE Tokens----*/
  59. #define CSL_CHIP_AMR_B7MODE_LINEAR (0x00000000u)
  60. #define CSL_CHIP_AMR_B7MODE_CIRCULARBK0 (0x00000001u)
  61. #define CSL_CHIP_AMR_B7MODE_CIRCULARBK1 (0x00000002u)
  62. #define CSL_CHIP_AMR_B7MODE_RESV (0x00000003u)
  63. #define CSL_CHIP_AMR_B6MODE_MASK (0x00003000u)
  64. #define CSL_CHIP_AMR_B6MODE_SHIFT (0x0000000Cu)
  65. #define CSL_CHIP_AMR_B6MODE_RESETVAL (0x00000000u)
  66. /*----B6MODE Tokens----*/
  67. #define CSL_CHIP_AMR_B6MODE_LINEAR (0x00000000u)
  68. #define CSL_CHIP_AMR_B6MODE_CIRCULARBK0 (0x00000001u)
  69. #define CSL_CHIP_AMR_B6MODE_CIRCULARBK1 (0x00000002u)
  70. #define CSL_CHIP_AMR_B6MODE_RESV (0x00000003u)
  71. #define CSL_CHIP_AMR_B5MODE_MASK (0x00000C00u)
  72. #define CSL_CHIP_AMR_B5MODE_SHIFT (0x0000000Au)
  73. #define CSL_CHIP_AMR_B5MODE_RESETVAL (0x00000000u)
  74. /*----B5MODE Tokens----*/
  75. #define CSL_CHIP_AMR_B5MODE_LINEAR (0x00000000u)
  76. #define CSL_CHIP_AMR_B5MODE_CIRCULARBK1 (0x00000001u)
  77. #define CSL_CHIP_AMR_B5MODE_CIRCULARBK2 (0x00000002u)
  78. #define CSL_CHIP_AMR_B5MODE_RESV (0x00000003u)
  79. #define CSL_CHIP_AMR_B4MODE_MASK (0x00000300u)
  80. #define CSL_CHIP_AMR_B4MODE_SHIFT (0x00000008u)
  81. #define CSL_CHIP_AMR_B4MODE_RESETVAL (0x00000000u)
  82. /*----B4MODE Tokens----*/
  83. #define CSL_CHIP_AMR_B4MODE_LINEAR (0x00000000u)
  84. #define CSL_CHIP_AMR_B4MODE_CIRCULARBK1 (0x00000001u)
  85. #define CSL_CHIP_AMR_B4MODE_CIRCULARBK2 (0x00000002u)
  86. #define CSL_CHIP_AMR_B4MODE_RESV (0x00000003u)
  87. #define CSL_CHIP_AMR_A7MODE_MASK (0x000000C0u)
  88. #define CSL_CHIP_AMR_A7MODE_SHIFT (0x00000006u)
  89. #define CSL_CHIP_AMR_A7MODE_RESETVAL (0x00000000u)
  90. /*----A7MODE Tokens----*/
  91. #define CSL_CHIP_AMR_A7MODE_LINEAR (0x00000000u)
  92. #define CSL_CHIP_AMR_A7MODE_CIRCULARBK1 (0x00000001u)
  93. #define CSL_CHIP_AMR_A7MODE_CIRCULARBK2 (0x00000002u)
  94. #define CSL_CHIP_AMR_A7MODE_RESV (0x00000003u)
  95. #define CSL_CHIP_AMR_A6MODE_MASK (0x00000030u)
  96. #define CSL_CHIP_AMR_A6MODE_SHIFT (0x00000004u)
  97. #define CSL_CHIP_AMR_A6MODE_RESETVAL (0x00000000u)
  98. /*----A6MODE Tokens----*/
  99. #define CSL_CHIP_AMR_A6MODE_LINEAR (0x00000000u)
  100. #define CSL_CHIP_AMR_A6MODE_CIRCULARBK2 (0x00000001u)
  101. #define CSL_CHIP_AMR_A6MODE_CIRCULARBK3 (0x00000002u)
  102. #define CSL_CHIP_AMR_A6MODE_RESV (0x00000003u)
  103. #define CSL_CHIP_AMR_A5MODE_MASK (0x0000000Cu)
  104. #define CSL_CHIP_AMR_A5MODE_SHIFT (0x00000002u)
  105. #define CSL_CHIP_AMR_A5MODE_RESETVAL (0x00000000u)
  106. /*----A5MODE Tokens----*/
  107. #define CSL_CHIP_AMR_A5MODE_LINEAR (0x00000000u)
  108. #define CSL_CHIP_AMR_A5MODE_CIRCULARBK3 (0x00000001u)
  109. #define CSL_CHIP_AMR_A5MODE_CIRCULARBK4 (0x00000002u)
  110. #define CSL_CHIP_AMR_A5MODE_RESV (0x00000003u)
  111. #define CSL_CHIP_AMR_A4MODE_MASK (0x00000003u)
  112. #define CSL_CHIP_AMR_A4MODE_SHIFT (0x00000000u)
  113. #define CSL_CHIP_AMR_A4MODE_RESETVAL (0x00000000u)
  114. /*----A4MODE Tokens----*/
  115. #define CSL_CHIP_AMR_A4MODE_LINEAR (0x00000000u)
  116. #define CSL_CHIP_AMR_A4MODE_CIRCULARBK4 (0x00000001u)
  117. #define CSL_CHIP_AMR_A4MODE_CIRCULARBK5 (0x00000002u)
  118. #define CSL_CHIP_AMR_A4MODE_RESV (0x00000003u)
  119. #define CSL_CHIP_AMR_RESETVAL (0x00000000u)
  120. /* CSR */
  121. #define CSL_CHIP_CSR_CPU_ID_MASK (0xFF000000u)
  122. #define CSL_CHIP_CSR_CPU_ID_SHIFT (0x00000018u)
  123. #define CSL_CHIP_CSR_CPU_ID_RESETVAL (0x00000000u)
  124. #define CSL_CHIP_CSR_REV_ID_MASK (0x00FF0000u)
  125. #define CSL_CHIP_CSR_REV_ID_SHIFT (0x00000010u)
  126. #define CSL_CHIP_CSR_REV_ID_RESETVAL (0x00000801u)
  127. #define CSL_CHIP_CSR_PWRD_MASK (0x0000FC00u)
  128. #define CSL_CHIP_CSR_PWRD_SHIFT (0x0000000Au)
  129. #define CSL_CHIP_CSR_PWRD_RESETVAL (0x00000000u)
  130. #define CSL_CHIP_CSR_SAT_MASK (0x00000200u)
  131. #define CSL_CHIP_CSR_SAT_SHIFT (0x00000009u)
  132. #define CSL_CHIP_CSR_SAT_RESETVAL (0x00000000u)
  133. /*----SAT Tokens----*/
  134. #define CSL_CHIP_CSR_SAT_SATURATE (0x00000001u)
  135. #define CSL_CHIP_CSR_SAT_NONSATURATE (0x00000000u)
  136. #define CSL_CHIP_CSR_EN_MASK (0x00000100u)
  137. #define CSL_CHIP_CSR_EN_SHIFT (0x00000008u)
  138. #define CSL_CHIP_CSR_EN_RESETVAL (0x00000000u)
  139. /*----EN Tokens----*/
  140. #define CSL_CHIP_CSR_EN_BIG (0x00000000u)
  141. #define CSL_CHIP_CSR_EN_LITTLE (0x00000001u)
  142. #define CSL_CHIP_CSR_PCC_MASK (0x000000E0u)
  143. #define CSL_CHIP_CSR_PCC_SHIFT (0x00000005u)
  144. #define CSL_CHIP_CSR_PCC_RESETVAL (0x00000000u)
  145. #define CSL_CHIP_CSR_DCC_MASK (0x0000001Cu)
  146. #define CSL_CHIP_CSR_DCC_SHIFT (0x00000002u)
  147. #define CSL_CHIP_CSR_DCC_RESETVAL (0x00000000u)
  148. #define CSL_CHIP_CSR_PGIE_MASK (0x00000002u)
  149. #define CSL_CHIP_CSR_PGIE_SHIFT (0x00000001u)
  150. #define CSL_CHIP_CSR_PGIE_RESETVAL (0x00000000u)
  151. #define CSL_CHIP_CSR_GIE_MASK (0x00000001u)
  152. #define CSL_CHIP_CSR_GIE_SHIFT (0x00000000u)
  153. #define CSL_CHIP_CSR_GIE_RESETVAL (0x00000000u)
  154. /*----GIE Tokens----*/
  155. #define CSL_CHIP_CSR_GIE_ENABLE (0x00000001u)
  156. #define CSL_CHIP_CSR_GIE_DISABLE (0x00000000u)
  157. #define CSL_CHIP_CSR_RESETVAL (0x08010000u)
  158. /* IFR */
  159. #define CSL_CHIP_IFR_IF15_MASK (0x00008000u)
  160. #define CSL_CHIP_IFR_IF15_SHIFT (0x0000000Fu)
  161. #define CSL_CHIP_IFR_IF15_RESETVAL (0x00000000u)
  162. /*----IF15 Tokens----*/
  163. #define CSL_CHIP_IFR_IF15_ENABLE (0x00000001u)
  164. #define CSL_CHIP_IFR_IF14_MASK (0x00004000u)
  165. #define CSL_CHIP_IFR_IF14_SHIFT (0x0000000Eu)
  166. #define CSL_CHIP_IFR_IF14_RESETVAL (0x00000000u)
  167. #define CSL_CHIP_IFR_IF13_MASK (0x00002000u)
  168. #define CSL_CHIP_IFR_IF13_SHIFT (0x0000000Du)
  169. #define CSL_CHIP_IFR_IF13_RESETVAL (0x00000000u)
  170. #define CSL_CHIP_IFR_IF12_MASK (0x00001000u)
  171. #define CSL_CHIP_IFR_IF12_SHIFT (0x0000000Cu)
  172. #define CSL_CHIP_IFR_IF12_RESETVAL (0x00000000u)
  173. #define CSL_CHIP_IFR_IF11_MASK (0x00000800u)
  174. #define CSL_CHIP_IFR_IF11_SHIFT (0x0000000Bu)
  175. #define CSL_CHIP_IFR_IF11_RESETVAL (0x00000000u)
  176. #define CSL_CHIP_IFR_IF10_MASK (0x00000400u)
  177. #define CSL_CHIP_IFR_IF10_SHIFT (0x0000000Au)
  178. #define CSL_CHIP_IFR_IF10_RESETVAL (0x00000000u)
  179. #define CSL_CHIP_IFR_IF9_MASK (0x00000200u)
  180. #define CSL_CHIP_IFR_IF9_SHIFT (0x00000009u)
  181. #define CSL_CHIP_IFR_IF9_RESETVAL (0x00000000u)
  182. #define CSL_CHIP_IFR_IF8_MASK (0x00000100u)
  183. #define CSL_CHIP_IFR_IF8_SHIFT (0x00000008u)
  184. #define CSL_CHIP_IFR_IF8_RESETVAL (0x00000000u)
  185. #define CSL_CHIP_IFR_IF7_MASK (0x00000080u)
  186. #define CSL_CHIP_IFR_IF7_SHIFT (0x00000007u)
  187. #define CSL_CHIP_IFR_IF7_RESETVAL (0x00000000u)
  188. #define CSL_CHIP_IFR_IF6_MASK (0x00000040u)
  189. #define CSL_CHIP_IFR_IF6_SHIFT (0x00000006u)
  190. #define CSL_CHIP_IFR_IF6_RESETVAL (0x00000000u)
  191. #define CSL_CHIP_IFR_IF5_MASK (0x00000020u)
  192. #define CSL_CHIP_IFR_IF5_SHIFT (0x00000005u)
  193. #define CSL_CHIP_IFR_IF5_RESETVAL (0x00000000u)
  194. #define CSL_CHIP_IFR_IF4_MASK (0x00000010u)
  195. #define CSL_CHIP_IFR_IF4_SHIFT (0x00000004u)
  196. #define CSL_CHIP_IFR_IF4_RESETVAL (0x00000000u)
  197. #define CSL_CHIP_IFR_NMIF_MASK (0x00000002u)
  198. #define CSL_CHIP_IFR_NMIF_SHIFT (0x00000001u)
  199. #define CSL_CHIP_IFR_NMIF_RESETVAL (0x00000000u)
  200. #define CSL_CHIP_IFR_RESETVAL (0x00000000u)
  201. /* ISR */
  202. #define CSL_CHIP_ISR_IS15_MASK (0x00008000u)
  203. #define CSL_CHIP_ISR_IS15_SHIFT (0x0000000Fu)
  204. #define CSL_CHIP_ISR_IS15_RESETVAL (0x00000000u)
  205. /*----IS15 Tokens----*/
  206. #define CSL_CHIP_ISR_IS15_SET (0x00000001u)
  207. #define CSL_CHIP_ISR_IS14_MASK (0x00004000u)
  208. #define CSL_CHIP_ISR_IS14_SHIFT (0x0000000Eu)
  209. #define CSL_CHIP_ISR_IS14_RESETVAL (0x00000000u)
  210. /*----IS14 Tokens----*/
  211. #define CSL_CHIP_ISR_IS14_SET (0x00000001u)
  212. #define CSL_CHIP_ISR_IS13_MASK (0x00002000u)
  213. #define CSL_CHIP_ISR_IS13_SHIFT (0x0000000Du)
  214. #define CSL_CHIP_ISR_IS13_RESETVAL (0x00000000u)
  215. /*----IS13 Tokens----*/
  216. #define CSL_CHIP_ISR_IS13_SET (0x00000001u)
  217. #define CSL_CHIP_ISR_IS12_MASK (0x00001000u)
  218. #define CSL_CHIP_ISR_IS12_SHIFT (0x0000000Cu)
  219. #define CSL_CHIP_ISR_IS12_RESETVAL (0x00000000u)
  220. /*----IS12 Tokens----*/
  221. #define CSL_CHIP_ISR_IS12_SET (0x00000001u)
  222. #define CSL_CHIP_ISR_IS11_MASK (0x00000800u)
  223. #define CSL_CHIP_ISR_IS11_SHIFT (0x0000000Bu)
  224. #define CSL_CHIP_ISR_IS11_RESETVAL (0x00000000u)
  225. /*----IS11 Tokens----*/
  226. #define CSL_CHIP_ISR_IS11_SET (0x00000001u)
  227. #define CSL_CHIP_ISR_IS10_MASK (0x00000400u)
  228. #define CSL_CHIP_ISR_IS10_SHIFT (0x0000000Au)
  229. #define CSL_CHIP_ISR_IS10_RESETVAL (0x00000000u)
  230. /*----IS10 Tokens----*/
  231. #define CSL_CHIP_ISR_IS10_SET (0x00000001u)
  232. #define CSL_CHIP_ISR_IS9_MASK (0x00000200u)
  233. #define CSL_CHIP_ISR_IS9_SHIFT (0x00000009u)
  234. #define CSL_CHIP_ISR_IS9_RESETVAL (0x00000000u)
  235. /*----IS9 Tokens----*/
  236. #define CSL_CHIP_ISR_IS9_SET (0x00000001u)
  237. #define CSL_CHIP_ISR_IS8_MASK (0x00000100u)
  238. #define CSL_CHIP_ISR_IS8_SHIFT (0x00000008u)
  239. #define CSL_CHIP_ISR_IS8_RESETVAL (0x00000000u)
  240. /*----IS8 Tokens----*/
  241. #define CSL_CHIP_ISR_IS8_SET (0x00000001u)
  242. #define CSL_CHIP_ISR_IS7_MASK (0x00000080u)
  243. #define CSL_CHIP_ISR_IS7_SHIFT (0x00000007u)
  244. #define CSL_CHIP_ISR_IS7_RESETVAL (0x00000000u)
  245. /*----IS7 Tokens----*/
  246. #define CSL_CHIP_ISR_IS7_SET (0x00000001u)
  247. #define CSL_CHIP_ISR_IS6_MASK (0x00000040u)
  248. #define CSL_CHIP_ISR_IS6_SHIFT (0x00000006u)
  249. #define CSL_CHIP_ISR_IS6_RESETVAL (0x00000000u)
  250. /*----IS6 Tokens----*/
  251. #define CSL_CHIP_ISR_IS6_SET (0x00000001u)
  252. #define CSL_CHIP_ISR_IS5_MASK (0x00000020u)
  253. #define CSL_CHIP_ISR_IS5_SHIFT (0x00000005u)
  254. #define CSL_CHIP_ISR_IS5_RESETVAL (0x00000000u)
  255. /*----IS5 Tokens----*/
  256. #define CSL_CHIP_ISR_IS5_SET (0x00000001u)
  257. #define CSL_CHIP_ISR_IS4_MASK (0x00000010u)
  258. #define CSL_CHIP_ISR_IS4_SHIFT (0x00000004u)
  259. #define CSL_CHIP_ISR_IS4_RESETVAL (0x00000000u)
  260. /*----IS4 Tokens----*/
  261. #define CSL_CHIP_ISR_IS4_SET (0x00000001u)
  262. #define CSL_CHIP_ISR_RESETVAL (0x00000000u)
  263. /* ICR */
  264. #define CSL_CHIP_ICR_IC15_MASK (0x00008000u)
  265. #define CSL_CHIP_ICR_IC15_SHIFT (0x0000000Fu)
  266. #define CSL_CHIP_ICR_IC15_RESETVAL (0x00000000u)
  267. /*----IC15 Tokens----*/
  268. #define CSL_CHIP_ICR_IC15_CLR (0x00000001u)
  269. #define CSL_CHIP_ICR_IC14_MASK (0x00004000u)
  270. #define CSL_CHIP_ICR_IC14_SHIFT (0x0000000Eu)
  271. #define CSL_CHIP_ICR_IC14_RESETVAL (0x00000000u)
  272. /*----IC14 Tokens----*/
  273. #define CSL_CHIP_ICR_IC14_CLR (0x00000001u)
  274. #define CSL_CHIP_ICR_IC13_MASK (0x00002000u)
  275. #define CSL_CHIP_ICR_IC13_SHIFT (0x0000000Du)
  276. #define CSL_CHIP_ICR_IC13_RESETVAL (0x00000000u)
  277. /*----IC13 Tokens----*/
  278. #define CSL_CHIP_ICR_IC13_CLR (0x00000001u)
  279. #define CSL_CHIP_ICR_IC12_MASK (0x00001000u)
  280. #define CSL_CHIP_ICR_IC12_SHIFT (0x0000000Cu)
  281. #define CSL_CHIP_ICR_IC12_RESETVAL (0x00000000u)
  282. /*----IC12 Tokens----*/
  283. #define CSL_CHIP_ICR_IC12_CLR (0x00000001u)
  284. #define CSL_CHIP_ICR_IC11_MASK (0x00000800u)
  285. #define CSL_CHIP_ICR_IC11_SHIFT (0x0000000Bu)
  286. #define CSL_CHIP_ICR_IC11_RESETVAL (0x00000000u)
  287. /*----IC11 Tokens----*/
  288. #define CSL_CHIP_ICR_IC11_CLR (0x00000001u)
  289. #define CSL_CHIP_ICR_IC10_MASK (0x00000400u)
  290. #define CSL_CHIP_ICR_IC10_SHIFT (0x0000000Au)
  291. #define CSL_CHIP_ICR_IC10_RESETVAL (0x00000000u)
  292. /*----IC10 Tokens----*/
  293. #define CSL_CHIP_ICR_IC10_CLR (0x00000001u)
  294. #define CSL_CHIP_ICR_IC9_MASK (0x00000200u)
  295. #define CSL_CHIP_ICR_IC9_SHIFT (0x00000009u)
  296. #define CSL_CHIP_ICR_IC9_RESETVAL (0x00000000u)
  297. /*----IC9 Tokens----*/
  298. #define CSL_CHIP_ICR_IC9_CLR (0x00000001u)
  299. #define CSL_CHIP_ICR_IC8_MASK (0x00000100u)
  300. #define CSL_CHIP_ICR_IC8_SHIFT (0x00000008u)
  301. #define CSL_CHIP_ICR_IC8_RESETVAL (0x00000000u)
  302. /*----IC8 Tokens----*/
  303. #define CSL_CHIP_ICR_IC8_CLR (0x00000001u)
  304. #define CSL_CHIP_ICR_IC7_MASK (0x00000080u)
  305. #define CSL_CHIP_ICR_IC7_SHIFT (0x00000007u)
  306. #define CSL_CHIP_ICR_IC7_RESETVAL (0x00000000u)
  307. /*----IC7 Tokens----*/
  308. #define CSL_CHIP_ICR_IC7_CLR (0x00000001u)
  309. #define CSL_CHIP_ICR_IC6_MASK (0x00000040u)
  310. #define CSL_CHIP_ICR_IC6_SHIFT (0x00000006u)
  311. #define CSL_CHIP_ICR_IC6_RESETVAL (0x00000000u)
  312. /*----IC6 Tokens----*/
  313. #define CSL_CHIP_ICR_IC6_CLR (0x00000001u)
  314. #define CSL_CHIP_ICR_IC5_MASK (0x00000020u)
  315. #define CSL_CHIP_ICR_IC5_SHIFT (0x00000005u)
  316. #define CSL_CHIP_ICR_IC5_RESETVAL (0x00000000u)
  317. /*----IC5 Tokens----*/
  318. #define CSL_CHIP_ICR_IC5_CLR (0x00000001u)
  319. #define CSL_CHIP_ICR_IC4_MASK (0x00000010u)
  320. #define CSL_CHIP_ICR_IC4_SHIFT (0x00000004u)
  321. #define CSL_CHIP_ICR_IC4_RESETVAL (0x00000000u)
  322. /*----IC4 Tokens----*/
  323. #define CSL_CHIP_ICR_IC4_CLR (0x00000001u)
  324. #define CSL_CHIP_ICR_RESETVAL (0x00000000u)
  325. /* IER */
  326. #define CSL_CHIP_IER_IE15_MASK (0x00008000u)
  327. #define CSL_CHIP_IER_IE15_SHIFT (0x0000000Fu)
  328. #define CSL_CHIP_IER_IE15_RESETVAL (0x00000000u)
  329. /*----IE15 Tokens----*/
  330. #define CSL_CHIP_IER_IE15_ENABLE (0x00000001u)
  331. #define CSL_CHIP_IER_IE15_DISABLE (0x00000000u)
  332. #define CSL_CHIP_IER_IE14_MASK (0x00004000u)
  333. #define CSL_CHIP_IER_IE14_SHIFT (0x0000000Eu)
  334. #define CSL_CHIP_IER_IE14_RESETVAL (0x00000000u)
  335. /*----IE14 Tokens----*/
  336. #define CSL_CHIP_IER_IE14_ENABLE (0x00000001u)
  337. #define CSL_CHIP_IER_IE14_DISABLE (0x00000000u)
  338. #define CSL_CHIP_IER_IE13_MASK (0x00002000u)
  339. #define CSL_CHIP_IER_IE13_SHIFT (0x0000000Du)
  340. #define CSL_CHIP_IER_IE13_RESETVAL (0x00000000u)
  341. /*----IE13 Tokens----*/
  342. #define CSL_CHIP_IER_IE13_ENABLE (0x00000001u)
  343. #define CSL_CHIP_IER_IE13_DISABLE (0x00000000u)
  344. #define CSL_CHIP_IER_IE12_MASK (0x00001000u)
  345. #define CSL_CHIP_IER_IE12_SHIFT (0x0000000Cu)
  346. #define CSL_CHIP_IER_IE12_RESETVAL (0x00000000u)
  347. /*----IE12 Tokens----*/
  348. #define CSL_CHIP_IER_IE12_ENABLE (0x00000001u)
  349. #define CSL_CHIP_IER_IE12_DISABLE (0x00000000u)
  350. #define CSL_CHIP_IER_IE11_MASK (0x00000800u)
  351. #define CSL_CHIP_IER_IE11_SHIFT (0x0000000Bu)
  352. #define CSL_CHIP_IER_IE11_RESETVAL (0x00000000u)
  353. /*----IE11 Tokens----*/
  354. #define CSL_CHIP_IER_IE11_ENABLE (0x00000001u)
  355. #define CSL_CHIP_IER_IE11_DISABLE (0x00000000u)
  356. #define CSL_CHIP_IER_IE10_MASK (0x00000400u)
  357. #define CSL_CHIP_IER_IE10_SHIFT (0x0000000Au)
  358. #define CSL_CHIP_IER_IE10_RESETVAL (0x00000000u)
  359. /*----IE10 Tokens----*/
  360. #define CSL_CHIP_IER_IE10_ENABLE (0x00000001u)
  361. #define CSL_CHIP_IER_IE10_DISABLE (0x00000000u)
  362. #define CSL_CHIP_IER_IE09_MASK (0x00000200u)
  363. #define CSL_CHIP_IER_IE09_SHIFT (0x00000009u)
  364. #define CSL_CHIP_IER_IE09_RESETVAL (0x00000000u)
  365. /*----IE09 Tokens----*/
  366. #define CSL_CHIP_IER_IE09_ENABLE (0x00000001u)
  367. #define CSL_CHIP_IER_IE09_DISABLE (0x00000000u)
  368. #define CSL_CHIP_IER_IE08_MASK (0x00000100u)
  369. #define CSL_CHIP_IER_IE08_SHIFT (0x00000008u)
  370. #define CSL_CHIP_IER_IE08_RESETVAL (0x00000000u)
  371. /*----IE08 Tokens----*/
  372. #define CSL_CHIP_IER_IE08_ENABLE (0x00000001u)
  373. #define CSL_CHIP_IER_IE08_DISABLE (0x00000000u)
  374. #define CSL_CHIP_IER_IE07_MASK (0x00000080u)
  375. #define CSL_CHIP_IER_IE07_SHIFT (0x00000007u)
  376. #define CSL_CHIP_IER_IE07_RESETVAL (0x00000000u)
  377. /*----IE07 Tokens----*/
  378. #define CSL_CHIP_IER_IE07_ENABLE (0x00000001u)
  379. #define CSL_CHIP_IER_IE07_DISABLE (0x00000000u)
  380. #define CSL_CHIP_IER_IE06_MASK (0x00000040u)
  381. #define CSL_CHIP_IER_IE06_SHIFT (0x00000006u)
  382. #define CSL_CHIP_IER_IE06_RESETVAL (0x00000000u)
  383. /*----IE06 Tokens----*/
  384. #define CSL_CHIP_IER_IE06_ENABLE (0x00000001u)
  385. #define CSL_CHIP_IER_IE06_DISABLE (0x00000000u)
  386. #define CSL_CHIP_IER_IE05_MASK (0x00000020u)
  387. #define CSL_CHIP_IER_IE05_SHIFT (0x00000005u)
  388. #define CSL_CHIP_IER_IE05_RESETVAL (0x00000000u)
  389. /*----IE05 Tokens----*/
  390. #define CSL_CHIP_IER_IE05_ENABLE (0x00000001u)
  391. #define CSL_CHIP_IER_IE05_DISABLE (0x00000000u)
  392. #define CSL_CHIP_IER_IE04_MASK (0x00000010u)
  393. #define CSL_CHIP_IER_IE04_SHIFT (0x00000004u)
  394. #define CSL_CHIP_IER_IE04_RESETVAL (0x00000000u)
  395. /*----IE04 Tokens----*/
  396. #define CSL_CHIP_IER_IE04_ENABLE (0x00000001u)
  397. #define CSL_CHIP_IER_IE04_DISABLE (0x00000000u)
  398. #define CSL_CHIP_IER_NMI_MASK (0x00000002u)
  399. #define CSL_CHIP_IER_NMI_SHIFT (0x00000001u)
  400. #define CSL_CHIP_IER_NMI_RESETVAL (0x00000000u)
  401. /*----NMI Tokens----*/
  402. #define CSL_CHIP_IER_NMI_ENABLE (0x00000001u)
  403. #define CSL_CHIP_IER_RESET_MASK (0x00000001u)
  404. #define CSL_CHIP_IER_RESET_SHIFT (0x00000000u)
  405. #define CSL_CHIP_IER_RESET_RESETVAL (0x00000001u)
  406. #define CSL_CHIP_IER_RESETVAL (0x00000001u)
  407. /* ISTP */
  408. #define CSL_CHIP_ISTP_ISTB_MASK (0xFFFFFC00u)
  409. #define CSL_CHIP_ISTP_ISTB_SHIFT (0x0000000Au)
  410. #define CSL_CHIP_ISTP_ISTB_RESETVAL (0x00000000u)
  411. #define CSL_CHIP_ISTP_HPEINT_MASK (0x000003E0u)
  412. #define CSL_CHIP_ISTP_HPEINT_SHIFT (0x00000005u)
  413. #define CSL_CHIP_ISTP_HPEINT_RESETVAL (0x00000000u)
  414. #define CSL_CHIP_ISTP_RESETVAL (0x00000000u)
  415. /* IRP */
  416. #define CSL_CHIP_IRP_IRP_MASK (0xFFFFFFFFu)
  417. #define CSL_CHIP_IRP_IRP_SHIFT (0x00000000u)
  418. #define CSL_CHIP_IRP_IRP_RESETVAL (0x00000000u)
  419. #define CSL_CHIP_IRP_RESETVAL (0x00000000u)
  420. /* NRP */
  421. #define CSL_CHIP_NRP_NRP_MASK (0xFFFFFFFFu)
  422. #define CSL_CHIP_NRP_NRP_SHIFT (0x00000000u)
  423. #define CSL_CHIP_NRP_NRP_RESETVAL (0x00000000u)
  424. #define CSL_CHIP_NRP_RESETVAL (0x00000000u)
  425. /* ERP */
  426. #define CSL_CHIP_ERP_ERP_MASK (0xFFFFFFFFu)
  427. #define CSL_CHIP_ERP_ERP_SHIFT (0x00000000u)
  428. #define CSL_CHIP_ERP_ERP_RESETVAL (0x00000000u)
  429. #define CSL_CHIP_ERP_RESETVAL (0x00000000u)
  430. /* TSCL */
  431. #define CSL_CHIP_TSCL_TSCL_MASK (0xFFFFFFFFu)
  432. #define CSL_CHIP_TSCL_TSCL_SHIFT (0x00000000u)
  433. #define CSL_CHIP_TSCL_TSCL_RESETVAL (0x00000000u)
  434. #define CSL_CHIP_TSCL_RESETVAL (0x00000000u)
  435. /* TSCH */
  436. #define CSL_CHIP_TSCH_TSCH_MASK (0xFFFFFFFFu)
  437. #define CSL_CHIP_TSCH_TSCH_SHIFT (0x00000000u)
  438. #define CSL_CHIP_TSCH_TSCH_RESETVAL (0x00000000u)
  439. #define CSL_CHIP_TSCH_RESETVAL (0x00000000u)
  440. /* ARP */
  441. #define CSL_CHIP_ARP_ARP_MASK (0xFFFFFFFFu)
  442. #define CSL_CHIP_ARP_ARP_SHIFT (0x00000000u)
  443. #define CSL_CHIP_ARP_ARP_RESETVAL (0x00000000u)
  444. #define CSL_CHIP_ARP_RESETVAL (0x00000000u)
  445. /* ILC */
  446. #define CSL_CHIP_ILC_ILC_MASK (0xFFFFFFFFu)
  447. #define CSL_CHIP_ILC_ILC_SHIFT (0x00000000u)
  448. #define CSL_CHIP_ILC_ILC_RESETVAL (0x00000000u)
  449. #define CSL_CHIP_ILC_RESETVAL (0x00000000u)
  450. /* RILC */
  451. #define CSL_CHIP_RILC_RILC_MASK (0xFFFFFFFFu)
  452. #define CSL_CHIP_RILC_RILC_SHIFT (0x00000000u)
  453. #define CSL_CHIP_RILC_RILC_RESETVAL (0x00000000u)
  454. #define CSL_CHIP_RILC_RESETVAL (0x00000000u)
  455. /* PCE1 */
  456. #define CSL_CHIP_PCE1_PCE1_MASK (0xFFFFFFFFu)
  457. #define CSL_CHIP_PCE1_PCE1_SHIFT (0x00000000u)
  458. #define CSL_CHIP_PCE1_PCE1_RESETVAL (0x00000000u)
  459. #define CSL_CHIP_PCE1_RESETVAL (0x00000000u)
  460. /* DNUM */
  461. #define CSL_CHIP_DNUM_DSPNUM_MASK (0x000000FFu)
  462. #define CSL_CHIP_DNUM_DSPNUM_SHIFT (0x00000000u)
  463. #define CSL_CHIP_DNUM_DSPNUM_RESETVAL (0x00000000u)
  464. #define CSL_CHIP_DNUM_RESETVAL (0x00000000u)
  465. /* SSR */
  466. #define CSL_CHIP_SSR_RESV_MASK (0xFFFFFFC0u)
  467. #define CSL_CHIP_SSR_RESV_SHIFT (0x00000006u)
  468. #define CSL_CHIP_SSR_RESV_RESETVAL (0x00000000u)
  469. #define CSL_CHIP_SSR_M2_MASK (0x00000020u)
  470. #define CSL_CHIP_SSR_M2_SHIFT (0x00000005u)
  471. #define CSL_CHIP_SSR_M2_RESETVAL (0x00000000u)
  472. #define CSL_CHIP_SSR_M1_MASK (0x00000010u)
  473. #define CSL_CHIP_SSR_M1_SHIFT (0x00000004u)
  474. #define CSL_CHIP_SSR_M1_RESETVAL (0x00000000u)
  475. #define CSL_CHIP_SSR_S2_MASK (0x00000008u)
  476. #define CSL_CHIP_SSR_S2_SHIFT (0x00000003u)
  477. #define CSL_CHIP_SSR_S2_RESETVAL (0x00000000u)
  478. #define CSL_CHIP_SSR_S1_MASK (0x00000004u)
  479. #define CSL_CHIP_SSR_S1_SHIFT (0x00000002u)
  480. #define CSL_CHIP_SSR_S1_RESETVAL (0x00000000u)
  481. #define CSL_CHIP_SSR_L2_MASK (0x00000002u)
  482. #define CSL_CHIP_SSR_L2_SHIFT (0x00000001u)
  483. #define CSL_CHIP_SSR_L2_RESETVAL (0x00000000u)
  484. #define CSL_CHIP_SSR_L1_MASK (0x00000001u)
  485. #define CSL_CHIP_SSR_L1_SHIFT (0x00000000u)
  486. #define CSL_CHIP_SSR_L1_RESETVAL (0x00000000u)
  487. #define CSL_CHIP_SSR_RESETVAL (0x00000000u)
  488. /* GPLYA */
  489. #define CSL_CHIP_GPLYA_GPLYA_MASK (0xFFFFFFFFu)
  490. #define CSL_CHIP_GPLYA_GPLYA_SHIFT (0x00000000u)
  491. #define CSL_CHIP_GPLYA_GPLYA_RESETVAL (0x00000000u)
  492. #define CSL_CHIP_GPLYA_RESETVAL (0x00000000u)
  493. /* GPLYB */
  494. #define CSL_CHIP_GPLYB_GPLYB_MASK (0xFFFFFFFFu)
  495. #define CSL_CHIP_GPLYB_GPLYB_SHIFT (0x00000000u)
  496. #define CSL_CHIP_GPLYB_GPLYB_RESETVAL (0x00000000u)
  497. #define CSL_CHIP_GPLYB_RESETVAL (0x00000000u)
  498. /* GFPGFR */
  499. #define CSL_CHIP_GFPGFR_SIZE_MASK (0x07000000u)
  500. #define CSL_CHIP_GFPGFR_SIZE_SHIFT (0x00000018u)
  501. #define CSL_CHIP_GFPGFR_SIZE_RESETVAL (0x00000007u)
  502. #define CSL_CHIP_GFPGFR_POLY_MASK (0x000000FFu)
  503. #define CSL_CHIP_GFPGFR_POLY_SHIFT (0x00000000u)
  504. #define CSL_CHIP_GFPGFR_POLY_RESETVAL (0x0000001Du)
  505. #define CSL_CHIP_GFPGFR_RESETVAL (0x0700001Du)
  506. /* DIER */
  507. #define CSL_CHIP_DIER_NMI_MASK (0x80000000u)
  508. #define CSL_CHIP_DIER_NMI_SHIFT (0x0000001Fu)
  509. #define CSL_CHIP_DIER_NMI_RESETVAL (0x00000000u)
  510. #define CSL_CHIP_DIER_EXCEP_MASK (0x40000000u)
  511. #define CSL_CHIP_DIER_EXCEP_SHIFT (0x0000001Eu)
  512. #define CSL_CHIP_DIER_EXCEP_RESETVAL (0x00000000u)
  513. #define CSL_CHIP_DIER_INT15_MASK (0x00008000u)
  514. #define CSL_CHIP_DIER_INT15_SHIFT (0x0000000Fu)
  515. #define CSL_CHIP_DIER_INT15_RESETVAL (0x00000000u)
  516. #define CSL_CHIP_DIER_INT14_MASK (0x00004000u)
  517. #define CSL_CHIP_DIER_INT14_SHIFT (0x0000000Eu)
  518. #define CSL_CHIP_DIER_INT14_RESETVAL (0x00000000u)
  519. #define CSL_CHIP_DIER_INT13_MASK (0x00002000u)
  520. #define CSL_CHIP_DIER_INT13_SHIFT (0x0000000Du)
  521. #define CSL_CHIP_DIER_INT13_RESETVAL (0x00000000u)
  522. #define CSL_CHIP_DIER_INT12_MASK (0x00001000u)
  523. #define CSL_CHIP_DIER_INT12_SHIFT (0x0000000Cu)
  524. #define CSL_CHIP_DIER_INT12_RESETVAL (0x00000000u)
  525. #define CSL_CHIP_DIER_INT11_MASK (0x00000800u)
  526. #define CSL_CHIP_DIER_INT11_SHIFT (0x0000000Bu)
  527. #define CSL_CHIP_DIER_INT11_RESETVAL (0x00000000u)
  528. #define CSL_CHIP_DIER_INT10_MASK (0x00000400u)
  529. #define CSL_CHIP_DIER_INT10_SHIFT (0x0000000Au)
  530. #define CSL_CHIP_DIER_INT10_RESETVAL (0x00000000u)
  531. #define CSL_CHIP_DIER_INT9_MASK (0x00000200u)
  532. #define CSL_CHIP_DIER_INT9_SHIFT (0x00000009u)
  533. #define CSL_CHIP_DIER_INT9_RESETVAL (0x00000000u)
  534. #define CSL_CHIP_DIER_INT8_MASK (0x00000100u)
  535. #define CSL_CHIP_DIER_INT8_SHIFT (0x00000008u)
  536. #define CSL_CHIP_DIER_INT8_RESETVAL (0x00000000u)
  537. #define CSL_CHIP_DIER_INT7_MASK (0x00000080u)
  538. #define CSL_CHIP_DIER_INT7_SHIFT (0x00000007u)
  539. #define CSL_CHIP_DIER_INT7_RESETVAL (0x00000000u)
  540. #define CSL_CHIP_DIER_INT6_MASK (0x00000040u)
  541. #define CSL_CHIP_DIER_INT6_SHIFT (0x00000006u)
  542. #define CSL_CHIP_DIER_INT6_RESETVAL (0x00000000u)
  543. #define CSL_CHIP_DIER_INT5_MASK (0x00000020u)
  544. #define CSL_CHIP_DIER_INT5_SHIFT (0x00000005u)
  545. #define CSL_CHIP_DIER_INT5_RESETVAL (0x00000000u)
  546. #define CSL_CHIP_DIER_INT4_MASK (0x00000010u)
  547. #define CSL_CHIP_DIER_INT4_SHIFT (0x00000004u)
  548. #define CSL_CHIP_DIER_INT4_RESETVAL (0x00000000u)
  549. #define CSL_CHIP_DIER_MSG_MASK (0x00000008u)
  550. #define CSL_CHIP_DIER_MSG_SHIFT (0x00000003u)
  551. #define CSL_CHIP_DIER_MSG_RESETVAL (0x00000000u)
  552. #define CSL_CHIP_DIER_WSEL_MASK (0x00000002u)
  553. #define CSL_CHIP_DIER_WSEL_SHIFT (0x00000001u)
  554. #define CSL_CHIP_DIER_WSEL_RESETVAL (0x00000000u)
  555. #define CSL_CHIP_DIER_TSCC_MASK (0x00000001u)
  556. #define CSL_CHIP_DIER_TSCC_SHIFT (0x00000000u)
  557. #define CSL_CHIP_DIER_TSCC_RESETVAL (0x00000000u)
  558. #define CSL_CHIP_DIER_RESETVAL (0x00000000u)
  559. /* TSR */
  560. #define CSL_CHIP_TSR_IB_MASK (0x00008000u)
  561. #define CSL_CHIP_TSR_IB_SHIFT (0x0000000Fu)
  562. #define CSL_CHIP_TSR_IB_RESETVAL (0x00000000u)
  563. /*----IB Tokens----*/
  564. #define CSL_CHIP_TSR_IB_UNBLOCKED (0x00000000u)
  565. #define CSL_CHIP_TSR_IB_BLOCKED (0x00000001u)
  566. #define CSL_CHIP_TSR_SPLX_MASK (0x00004000u)
  567. #define CSL_CHIP_TSR_SPLX_SHIFT (0x0000000Eu)
  568. #define CSL_CHIP_TSR_SPLX_RESETVAL (0x00000000u)
  569. /*----SPLX Tokens----*/
  570. #define CSL_CHIP_TSR_SPLX_NOTEXEC (0x00000000u)
  571. #define CSL_CHIP_TSR_SPLX_EXEC (0x00000001u)
  572. #define CSL_CHIP_TSR_EXC_MASK (0x00000400u)
  573. #define CSL_CHIP_TSR_EXC_SHIFT (0x0000000Au)
  574. #define CSL_CHIP_TSR_EXC_RESETVAL (0x00000000u)
  575. /*----EXC Tokens----*/
  576. #define CSL_CHIP_TSR_EXC_NOTEXEC (0x00000000u)
  577. #define CSL_CHIP_TSR_EXC_EXEC (0x00000001u)
  578. #define CSL_CHIP_TSR_INT_MASK (0x00000200u)
  579. #define CSL_CHIP_TSR_INT_SHIFT (0x00000009u)
  580. #define CSL_CHIP_TSR_INT_RESETVAL (0x00000000u)
  581. /*----INT Tokens----*/
  582. #define CSL_CHIP_TSR_INT_NOTEXEC (0x00000000u)
  583. #define CSL_CHIP_TSR_INT_EXEC (0x00000001u)
  584. #define CSL_CHIP_TSR_CXM_MASK (0x000000C0u)
  585. #define CSL_CHIP_TSR_CXM_SHIFT (0x00000006u)
  586. #define CSL_CHIP_TSR_CXM_RESETVAL (0x00000000u)
  587. /*----CXM Tokens----*/
  588. #define CSL_CHIP_TSR_CXM_SUPERVISOR (0x00000000u)
  589. #define CSL_CHIP_TSR_CXM_USER (0x00000001u)
  590. #define CSL_CHIP_TSR_XEN_MASK (0x00000008u)
  591. #define CSL_CHIP_TSR_XEN_SHIFT (0x00000003u)
  592. #define CSL_CHIP_TSR_XEN_RESETVAL (0x00000000u)
  593. /*----XEN Tokens----*/
  594. #define CSL_CHIP_TSR_XEN_ENABLE (0x00000001u)
  595. #define CSL_CHIP_TSR_XEN_DISABLE (0x00000000u)
  596. #define CSL_CHIP_TSR_GEE_MASK (0x00000004u)
  597. #define CSL_CHIP_TSR_GEE_SHIFT (0x00000002u)
  598. #define CSL_CHIP_TSR_GEE_RESETVAL (0x00000000u)
  599. /*----GEE Tokens----*/
  600. #define CSL_CHIP_TSR_GEE_ENABLE (0x00000001u)
  601. #define CSL_CHIP_TSR_GEE_DISABLE (0x00000000u)
  602. #define CSL_CHIP_TSR_SGIE_MASK (0x00000002u)
  603. #define CSL_CHIP_TSR_SGIE_SHIFT (0x00000001u)
  604. #define CSL_CHIP_TSR_SGIE_RESETVAL (0x00000000u)
  605. #define CSL_CHIP_TSR_GIE_MASK (0x00000001u)
  606. #define CSL_CHIP_TSR_GIE_SHIFT (0x00000000u)
  607. #define CSL_CHIP_TSR_GIE_RESETVAL (0x00000000u)
  608. /*----GIE Tokens----*/
  609. #define CSL_CHIP_TSR_GIE_ENABLE (0x00000001u)
  610. #define CSL_CHIP_TSR_GIE_DISABLE (0x00000000u)
  611. #define CSL_CHIP_TSR_RESETVAL (0x00000000u)
  612. /* ITSR */
  613. #define CSL_CHIP_ITSR_IB_MASK (0x00008000u)
  614. #define CSL_CHIP_ITSR_IB_SHIFT (0x0000000Fu)
  615. #define CSL_CHIP_ITSR_IB_RESETVAL (0x00000000u)
  616. /*----IB Tokens----*/
  617. #define CSL_CHIP_ITSR_IB_UNBLOCKED (0x00000000u)
  618. #define CSL_CHIP_ITSR_IB_BLOCKED (0x00000001u)
  619. #define CSL_CHIP_ITSR_SPLX_MASK (0x00004000u)
  620. #define CSL_CHIP_ITSR_SPLX_SHIFT (0x0000000Eu)
  621. #define CSL_CHIP_ITSR_SPLX_RESETVAL (0x00000000u)
  622. /*----SPLX Tokens----*/
  623. #define CSL_CHIP_ITSR_SPLX_NOTEXEC (0x00000000u)
  624. #define CSL_CHIP_ITSR_SPLX_EXEC (0x00000001u)
  625. #define CSL_CHIP_ITSR_EXC_MASK (0x00000400u)
  626. #define CSL_CHIP_ITSR_EXC_SHIFT (0x0000000Au)
  627. #define CSL_CHIP_ITSR_EXC_RESETVAL (0x00000000u)
  628. /*----EXC Tokens----*/
  629. #define CSL_CHIP_ITSR_EXC_NOTEXEC (0x00000000u)
  630. #define CSL_CHIP_ITSR_EXC_EXEC (0x00000001u)
  631. #define CSL_CHIP_ITSR_INT_MASK (0x00000200u)
  632. #define CSL_CHIP_ITSR_INT_SHIFT (0x00000009u)
  633. #define CSL_CHIP_ITSR_INT_RESETVAL (0x00000000u)
  634. /*----INT Tokens----*/
  635. #define CSL_CHIP_ITSR_INT_NOTEXEC (0x00000000u)
  636. #define CSL_CHIP_ITSR_INT_EXEC (0x00000001u)
  637. #define CSL_CHIP_ITSR_CXM_MASK (0x000000C0u)
  638. #define CSL_CHIP_ITSR_CXM_SHIFT (0x00000006u)
  639. #define CSL_CHIP_ITSR_CXM_RESETVAL (0x00000000u)
  640. /*----CXM Tokens----*/
  641. #define CSL_CHIP_ITSR_CXM_SUPERVISOR (0x00000000u)
  642. #define CSL_CHIP_ITSR_CXM_USER (0x00000001u)
  643. #define CSL_CHIP_ITSR_XEN_MASK (0x00000008u)
  644. #define CSL_CHIP_ITSR_XEN_SHIFT (0x00000003u)
  645. #define CSL_CHIP_ITSR_XEN_RESETVAL (0x00000000u)
  646. /*----XEN Tokens----*/
  647. #define CSL_CHIP_ITSR_XEN_ENABLE (0x00000001u)
  648. #define CSL_CHIP_ITSR_XEN_DISABLE (0x00000000u)
  649. #define CSL_CHIP_ITSR_GEE_MASK (0x00000004u)
  650. #define CSL_CHIP_ITSR_GEE_SHIFT (0x00000002u)
  651. #define CSL_CHIP_ITSR_GEE_RESETVAL (0x00000000u)
  652. /*----GEE Tokens----*/
  653. #define CSL_CHIP_ITSR_GEE_ENABLE (0x00000001u)
  654. #define CSL_CHIP_ITSR_GEE_DISABLE (0x00000000u)
  655. #define CSL_CHIP_ITSR_SGIE_MASK (0x00000002u)
  656. #define CSL_CHIP_ITSR_SGIE_SHIFT (0x00000001u)
  657. #define CSL_CHIP_ITSR_SGIE_RESETVAL (0x00000000u)
  658. #define CSL_CHIP_ITSR_GIE_MASK (0x00000001u)
  659. #define CSL_CHIP_ITSR_GIE_SHIFT (0x00000000u)
  660. #define CSL_CHIP_ITSR_GIE_RESETVAL (0x00000000u)
  661. /*----GIE Tokens----*/
  662. #define CSL_CHIP_ITSR_GIE_ENABLE (0x00000001u)
  663. #define CSL_CHIP_ITSR_GIE_DISABLE (0x00000000u)
  664. #define CSL_CHIP_ITSR_RESETVAL (0x00000000u)
  665. /* NTSR */
  666. #define CSL_CHIP_NTSR_IB_MASK (0x00008000u)
  667. #define CSL_CHIP_NTSR_IB_SHIFT (0x0000000Fu)
  668. #define CSL_CHIP_NTSR_IB_RESETVAL (0x00000000u)
  669. /*----IB Tokens----*/
  670. #define CSL_CHIP_NTSR_IB_UNBLOCKED (0x00000000u)
  671. #define CSL_CHIP_NTSR_IB_BLOCKED (0x00000001u)
  672. #define CSL_CHIP_NTSR_SPLX_MASK (0x00004000u)
  673. #define CSL_CHIP_NTSR_SPLX_SHIFT (0x0000000Eu)
  674. #define CSL_CHIP_NTSR_SPLX_RESETVAL (0x00000000u)
  675. /*----SPLX Tokens----*/
  676. #define CSL_CHIP_NTSR_SPLX_NOTEXEC (0x00000000u)
  677. #define CSL_CHIP_NTSR_SPLX_EXEC (0x00000001u)
  678. #define CSL_CHIP_NTSR_EXC_MASK (0x00000400u)
  679. #define CSL_CHIP_NTSR_EXC_SHIFT (0x0000000Au)
  680. #define CSL_CHIP_NTSR_EXC_RESETVAL (0x00000000u)
  681. /*----EXC Tokens----*/
  682. #define CSL_CHIP_NTSR_EXC_NOTEXEC (0x00000000u)
  683. #define CSL_CHIP_NTSR_EXC_EXEC (0x00000001u)
  684. #define CSL_CHIP_NTSR_INT_MASK (0x00000200u)
  685. #define CSL_CHIP_NTSR_INT_SHIFT (0x00000009u)
  686. #define CSL_CHIP_NTSR_INT_RESETVAL (0x00000000u)
  687. /*----INT Tokens----*/
  688. #define CSL_CHIP_NTSR_INT_NOTEXEC (0x00000000u)
  689. #define CSL_CHIP_NTSR_INT_EXEC (0x00000001u)
  690. #define CSL_CHIP_NTSR_CXM_MASK (0x000000C0u)
  691. #define CSL_CHIP_NTSR_CXM_SHIFT (0x00000006u)
  692. #define CSL_CHIP_NTSR_CXM_RESETVAL (0x00000000u)
  693. /*----CXM Tokens----*/
  694. #define CSL_CHIP_NTSR_CXM_SUPERVISOR (0x00000000u)
  695. #define CSL_CHIP_NTSR_CXM_USER (0x00000001u)
  696. #define CSL_CHIP_NTSR_XEN_MASK (0x00000008u)
  697. #define CSL_CHIP_NTSR_XEN_SHIFT (0x00000003u)
  698. #define CSL_CHIP_NTSR_XEN_RESETVAL (0x00000000u)
  699. /*----XEN Tokens----*/
  700. #define CSL_CHIP_NTSR_XEN_ENABLE (0x00000001u)
  701. #define CSL_CHIP_NTSR_XEN_DISABLE (0x00000000u)
  702. #define CSL_CHIP_NTSR_GEE_MASK (0x00000004u)
  703. #define CSL_CHIP_NTSR_GEE_SHIFT (0x00000002u)
  704. #define CSL_CHIP_NTSR_GEE_RESETVAL (0x00000000u)
  705. /*----GEE Tokens----*/
  706. #define CSL_CHIP_NTSR_GEE_ENABLE (0x00000001u)
  707. #define CSL_CHIP_NTSR_GEE_DISABLE (0x00000000u)
  708. #define CSL_CHIP_NTSR_SGIE_MASK (0x00000002u)
  709. #define CSL_CHIP_NTSR_SGIE_SHIFT (0x00000001u)
  710. #define CSL_CHIP_NTSR_SGIE_RESETVAL (0x00000000u)
  711. #define CSL_CHIP_NTSR_GIE_MASK (0x00000001u)
  712. #define CSL_CHIP_NTSR_GIE_SHIFT (0x00000000u)
  713. #define CSL_CHIP_NTSR_GIE_RESETVAL (0x00000000u)
  714. /*----GIE Tokens----*/
  715. #define CSL_CHIP_NTSR_GIE_ENABLE (0x00000001u)
  716. #define CSL_CHIP_NTSR_GIE_DISABLE (0x00000000u)
  717. #define CSL_CHIP_NTSR_RESETVAL (0x00000000u)
  718. /* EFR */
  719. #define CSL_CHIP_EFR_NXF_MASK (0x80000000u)
  720. #define CSL_CHIP_EFR_NXF_SHIFT (0x0000001Fu)
  721. #define CSL_CHIP_EFR_NXF_RESETVAL (0x00000000u)
  722. #define CSL_CHIP_EFR_EXF_MASK (0x40000000u)
  723. #define CSL_CHIP_EFR_EXF_SHIFT (0x0000001Eu)
  724. #define CSL_CHIP_EFR_EXF_RESETVAL (0x00000000u)
  725. #define CSL_CHIP_EFR_IXF_MASK (0x00000002u)
  726. #define CSL_CHIP_EFR_IXF_SHIFT (0x00000001u)
  727. #define CSL_CHIP_EFR_IXF_RESETVAL (0x00000000u)
  728. #define CSL_CHIP_EFR_OXF_MASK (0x00000001u)
  729. #define CSL_CHIP_EFR_OXF_SHIFT (0x00000000u)
  730. #define CSL_CHIP_EFR_OXF_RESETVAL (0x00000000u)
  731. #define CSL_CHIP_EFR_RESETVAL (0x00000000u)
  732. /* ECR */
  733. #define CSL_CHIP_ECR_NXC_MASK (0x80000000u)
  734. #define CSL_CHIP_ECR_NXC_SHIFT (0x0000001Fu)
  735. #define CSL_CHIP_ECR_NXC_RESETVAL (0x00000000u)
  736. /*----NXC Tokens----*/
  737. #define CSL_CHIP_ECR_NXC_CLEAR (0x00000001u)
  738. #define CSL_CHIP_ECR_EXC_MASK (0x40000000u)
  739. #define CSL_CHIP_ECR_EXC_SHIFT (0x0000001Eu)
  740. #define CSL_CHIP_ECR_EXC_RESETVAL (0x00000000u)
  741. /*----EXC Tokens----*/
  742. #define CSL_CHIP_ECR_EXC_CLEAR (0x00000001u)
  743. #define CSL_CHIP_ECR_IXC_MASK (0x00000002u)
  744. #define CSL_CHIP_ECR_IXC_SHIFT (0x00000001u)
  745. #define CSL_CHIP_ECR_IXC_RESETVAL (0x00000000u)
  746. /*----IXC Tokens----*/
  747. #define CSL_CHIP_ECR_IXC_CLEAR (0x00000001u)
  748. #define CSL_CHIP_ECR_OXC_MASK (0x00000001u)
  749. #define CSL_CHIP_ECR_OXC_SHIFT (0x00000000u)
  750. #define CSL_CHIP_ECR_OXC_RESETVAL (0x00000000u)
  751. /*----OXC Tokens----*/
  752. #define CSL_CHIP_ECR_OXC_CLEAR (0x00000001u)
  753. #define CSL_CHIP_ECR_RESETVAL (0x00000000u)
  754. /* IERR */
  755. #define CSL_CHIP_IERR_LBX_MASK (0x00000080u)
  756. #define CSL_CHIP_IERR_LBX_SHIFT (0x00000007u)
  757. #define CSL_CHIP_IERR_LBX_RESETVAL (0x00000000u)
  758. #define CSL_CHIP_IERR_PRX_MASK (0x00000040u)
  759. #define CSL_CHIP_IERR_PRX_SHIFT (0x00000006u)
  760. #define CSL_CHIP_IERR_PRX_RESETVAL (0x00000000u)
  761. #define CSL_CHIP_IERR_RAX_MASK (0x00000020u)
  762. #define CSL_CHIP_IERR_RAX_SHIFT (0x00000005u)
  763. #define CSL_CHIP_IERR_RAX_RESETVAL (0x00000000u)
  764. #define CSL_CHIP_IERR_RCX_MASK (0x00000010u)
  765. #define CSL_CHIP_IERR_RCX_SHIFT (0x00000004u)
  766. #define CSL_CHIP_IERR_RCX_RESETVAL (0x00000000u)
  767. #define CSL_CHIP_IERR_OPX_MASK (0x00000008u)
  768. #define CSL_CHIP_IERR_OPX_SHIFT (0x00000003u)
  769. #define CSL_CHIP_IERR_OPX_RESETVAL (0x00000000u)
  770. #define CSL_CHIP_IERR_EPX_MASK (0x00000004u)
  771. #define CSL_CHIP_IERR_EPX_SHIFT (0x00000002u)
  772. #define CSL_CHIP_IERR_EPX_RESETVAL (0x00000000u)
  773. #define CSL_CHIP_IERR_FPX_MASK (0x00000002u)
  774. #define CSL_CHIP_IERR_FPX_SHIFT (0x00000001u)
  775. #define CSL_CHIP_IERR_FPX_RESETVAL (0x00000000u)
  776. #define CSL_CHIP_IERR_IFX_MASK (0x00000001u)
  777. #define CSL_CHIP_IERR_IFX_SHIFT (0x00000000u)
  778. #define CSL_CHIP_IERR_IFX_RESETVAL (0x00000000u)
  779. #define CSL_CHIP_IERR_RESETVAL (0x00000000u)
  780. /* REP */
  781. #define CSL_CHIP_REP_REP_MASK (0xFFFFFFFFu)
  782. #define CSL_CHIP_REP_REP_SHIFT (0x00000000u)
  783. #define CSL_CHIP_REP_REP_RESETVAL (0x00000000u)
  784. #define CSL_CHIP_REP_RESETVAL (0x00000000u)
  785. #endif /*CSLR_CHIP_H_*/