cslr_bb2d.h 124 KB

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  1. /********************************************************************
  2. * Copyright (C) 2013-2014 Texas Instruments Incorporated.
  3. *
  4. * Redistribution and use in source and binary forms, with or without
  5. * modification, are permitted provided that the following conditions
  6. * are met:
  7. *
  8. * Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. *
  11. * Redistributions in binary form must reproduce the above copyright
  12. * notice, this list of conditions and the following disclaimer in the
  13. * documentation and/or other materials provided with the
  14. * distribution.
  15. *
  16. * Neither the name of Texas Instruments Incorporated nor the names of
  17. * its contributors may be used to endorse or promote products derived
  18. * from this software without specific prior written permission.
  19. *
  20. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  21. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  22. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  23. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  24. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  25. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  26. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  27. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  28. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  30. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31. *
  32. */
  33. #ifndef CSLR_BB2D_H_
  34. #define CSLR_BB2D_H_
  35. #ifdef __cplusplus
  36. extern "C"
  37. {
  38. #endif
  39. #include <ti/csl/cslr.h>
  40. #include <ti/csl/tistdtypes.h>
  41. /**************************************************************************
  42. * Register Overlay Structure for __ALL__
  43. **************************************************************************/
  44. typedef struct {
  45. volatile Uint32 AQHICLOCKCONTROL;
  46. volatile Uint32 AQHIIDLE;
  47. volatile Uint32 AQAXICONFIG;
  48. volatile Uint32 AQAXISTATUS;
  49. volatile Uint32 AQINTRACKNOWLEDGE;
  50. volatile Uint32 AQINTRENBL;
  51. volatile Uint32 AQIDENT;
  52. volatile Uint32 GCFEATURES;
  53. volatile Uint32 GCCHIPID;
  54. volatile Uint32 GCCHIPREV;
  55. volatile Uint32 GCCHIPDATE;
  56. volatile Uint32 GCCHIPTIME;
  57. volatile Uint32 GCCHIPCUSTOMER;
  58. volatile Uint32 GCMINORFEATURES0;
  59. volatile Uint8 RSVD0[4];
  60. volatile Uint32 GCRESETMEMCOUNTERS;
  61. volatile Uint32 GCTOTALREADS;
  62. volatile Uint32 GCTOTALWRITES;
  63. volatile Uint32 GCCHIPSPECS;
  64. volatile Uint32 GCTOTALWRITEBURSTS;
  65. volatile Uint32 GCTOTALWRITEREQS;
  66. volatile Uint32 GCTOTALWRITELASTS;
  67. volatile Uint32 GCTOTALREADBURSTS;
  68. volatile Uint32 GCTOTALREADREQS;
  69. volatile Uint32 GCTOTALREADLASTS;
  70. volatile Uint32 GCGPOUT0;
  71. volatile Uint32 GCGPOUT1;
  72. volatile Uint32 GCGPOUT2;
  73. volatile Uint32 GCAXICONTROL;
  74. volatile Uint32 GCMINORFEATURES1;
  75. volatile Uint32 GCTOTALCYCLES;
  76. volatile Uint32 GCTOTALIDLECYCLES;
  77. volatile Uint32 GCCHIPSPECS2;
  78. volatile Uint32 GCMINORFEATURES2;
  79. volatile Uint8 RSVD1[120];
  80. volatile Uint32 GCMODULEPOWERCONTROLS;
  81. volatile Uint32 GCMODULEPOWERMODULECONTROL;
  82. volatile Uint32 GCMODULEPOWERMODULESTATUS;
  83. volatile Uint8 RSVD2[124];
  84. volatile Uint32 GCREGMMUSTATUS;
  85. volatile Uint32 GCREGMMUCONTROL;
  86. volatile Uint32 GCREGMMUEXCEPTION0;
  87. volatile Uint32 GCREGMMUEXCEPTION1;
  88. volatile Uint32 GCREGMMUEXCEPTION2;
  89. volatile Uint32 GCREGMMUEXCEPTION3;
  90. volatile Uint8 RSVD3[628];
  91. volatile Uint32 AQMEMORYDEBUG;
  92. volatile Uint8 RSVD4[20];
  93. volatile Uint32 AQREGISTERTIMINGCONTROL;
  94. volatile Uint32 GCMEMORYRESERVED;
  95. volatile Uint32 GCDISPLAYPRIORITY;
  96. volatile Uint32 GCDBGCYCLECOUNTER;
  97. volatile Uint32 GCOUTSTANDINGREADS0;
  98. volatile Uint32 GCOUTSTANDINGREADS1;
  99. volatile Uint32 GCOUTSTANDINGWRITES;
  100. volatile Uint32 GCDEBUGSIGNALSRA;
  101. volatile Uint32 GCDEBUGSIGNALSTX;
  102. volatile Uint32 GCDEBUGSIGNALSFE;
  103. volatile Uint32 GCDEBUGSIGNALSPE;
  104. volatile Uint32 GCDEBUGSIGNALSDE;
  105. volatile Uint32 GCDEBUGSIGNALSSH;
  106. volatile Uint32 GCDEBUGSIGNALSPA;
  107. volatile Uint32 GCDEBUGSIGNALSSE;
  108. volatile Uint32 GCDEBUGSIGNALSMC;
  109. volatile Uint32 GCDEBUGSIGNALSHI;
  110. volatile Uint32 GCDEBUGCONTROL0;
  111. volatile Uint32 GCDEBUGCONTROL1;
  112. volatile Uint32 GCDEBUGCONTROL2;
  113. volatile Uint32 GCDEBUGCONTROL3;
  114. volatile Uint32 GCBUSCONTROL;
  115. volatile Uint32 GCREGENDIANNESS0;
  116. volatile Uint32 GCREGENDIANNESS1;
  117. volatile Uint32 GCREGENDIANNESS2;
  118. volatile Uint32 GCREGDRAWPRIMITIVESTARTTIMESTAMP;
  119. volatile Uint32 GCREGDRAWPRIMITIVEENDTIMESTAMP;
  120. volatile Uint8 RSVD5[192];
  121. volatile Uint32 GCREGCONTROL0;
  122. volatile Uint8 RSVD6[248];
  123. volatile Uint32 AQCMDBUFFERADDR;
  124. volatile Uint32 AQCMDBUFFERCTRL;
  125. volatile Uint32 AQFESTATUS;
  126. volatile Uint32 AQFEDEBUGSTATE;
  127. volatile Uint32 AQFEDEBUGCURCMDADR;
  128. volatile Uint32 AQFEDEBUGCMDLOWREG;
  129. volatile Uint32 AQFEDEBUGCMDHIREG;
  130. } CSL_Bb2dRegs;
  131. /**************************************************************************
  132. * Register Macros
  133. **************************************************************************/
  134. /* Description: Clock control register. */
  135. #define CSL_BB2D_AQHICLOCKCONTROL (0x0U)
  136. /* Description: Idle status register. */
  137. #define CSL_BB2D_AQHIIDLE (0x4U)
  138. /* Description: */
  139. #define CSL_BB2D_AQAXICONFIG (0x8U)
  140. /* Description: */
  141. #define CSL_BB2D_AQAXISTATUS (0xCU)
  142. /* Description: Interrupt acknowledge register. Each bit represents a
  143. * corresponding event being triggered. Reading frmo this register clears the
  144. * outstanding interrupt. */
  145. #define CSL_BB2D_AQINTRACKNOWLEDGE (0x10U)
  146. /* Description: Interrupt enable register. Each bit enables a corresponding
  147. * event. */
  148. #define CSL_BB2D_AQINTRENBL (0x14U)
  149. /* Description: Identification register. This register has no set reset value.
  150. * It varies with the implementation. */
  151. #define CSL_BB2D_AQIDENT (0x18U)
  152. /* Description: Shows which features are enabled in this chip. This register
  153. * has no set reset value. It varies with the implementation. 0 => NONE 1 =>
  154. * AVAILABLE */
  155. #define CSL_BB2D_GCFEATURES (0x1CU)
  156. /* Description: Shows the ID for the chip in BCD. This register has no set
  157. * reset value. It varies with the implementation. */
  158. #define CSL_BB2D_GCCHIPID (0x20U)
  159. /* Description: Shows the revision for the chip in BCD. This register has no
  160. * set reset value. It varies with the implementation. */
  161. #define CSL_BB2D_GCCHIPREV (0x24U)
  162. /* Description: Shows the release date for the IP. This register has no set
  163. * reset value. It varies with the implementation. */
  164. #define CSL_BB2D_GCCHIPDATE (0x28U)
  165. /* Description: Shows the release time for the IP. This register has no set
  166. * reset value. It varies with the implementation. */
  167. #define CSL_BB2D_GCCHIPTIME (0x2CU)
  168. /* Description: Shows the customer and group for the IP. This register has no
  169. * set reset value. It varies with the implementation. */
  170. #define CSL_BB2D_GCCHIPCUSTOMER (0x30U)
  171. /* Description: Shows which minor features are enabled in this chip. This
  172. * register has no set reset value. It varies with the implementation. 0 =>
  173. * NONE 1 => AVAILABLE */
  174. #define CSL_BB2D_GCMINORFEATURES0 (0x34U)
  175. /* Description: Writing 1 will reset the counters and stop counting. Write 0
  176. * to start counting again. This register is write only so it has no reset
  177. * value. */
  178. #define CSL_BB2D_GCRESETMEMCOUNTERS (0x3CU)
  179. /* Description: Total reads in terms of 64bits. */
  180. #define CSL_BB2D_GCTOTALREADS (0x40U)
  181. /* Description: Total writes in terms of 64bits. */
  182. #define CSL_BB2D_GCTOTALWRITES (0x44U)
  183. /* Description: Specs for the chip. This register has no set reset value. It
  184. * varies with the implementation. */
  185. #define CSL_BB2D_GCCHIPSPECS (0x48U)
  186. /* Description: Total write Data Count in terms of 64bits. This register has
  187. * no reset value. */
  188. #define CSL_BB2D_GCTOTALWRITEBURSTS (0x4CU)
  189. /* Description: Total write Request Count. This register has no reset value. */
  190. #define CSL_BB2D_GCTOTALWRITEREQS (0x50U)
  191. /* Description: Total WLAST Count. This is used to match with
  192. * GCTotalWriteReqs. This register has no reset value. */
  193. #define CSL_BB2D_GCTOTALWRITELASTS (0x54U)
  194. /* Description: Total Read Data Count in terms of 64bits. This register has no
  195. * reset value. */
  196. #define CSL_BB2D_GCTOTALREADBURSTS (0x58U)
  197. /* Description: Total Read Request Count. This register has no reset value. */
  198. #define CSL_BB2D_GCTOTALREADREQS (0x5CU)
  199. /* Description: Total RLAST Count. This is used to match with GCTotalReadReqs.
  200. * This register has no reset value. */
  201. #define CSL_BB2D_GCTOTALREADLASTS (0x60U)
  202. /* Description: General Purpose output register. R/W but not connected to
  203. * anywhere */
  204. #define CSL_BB2D_GCGPOUT0 (0x64U)
  205. /* Description: General Purpose output register. R/W but not connected to
  206. * anywhere */
  207. #define CSL_BB2D_GCGPOUT1 (0x68U)
  208. /* Description: General Purpose output register. R/W but not connected to
  209. * anywhere */
  210. #define CSL_BB2D_GCGPOUT2 (0x6CU)
  211. /* Description: Special Handling on AXI Bus */
  212. #define CSL_BB2D_GCAXICONTROL (0x70U)
  213. /* Description: Shows which features are enabled in this chip. This register
  214. * has no set reset value. It varies with the implementation. 0 => NONE 1 =>
  215. * AVAILABLE */
  216. #define CSL_BB2D_GCMINORFEATURES1 (0x74U)
  217. /* Description: Total cycles. This register is a free running counter. It can
  218. * be reset by writing 0 to it. */
  219. #define CSL_BB2D_GCTOTALCYCLES (0x78U)
  220. /* Description: Total cycles where the GPU is idle. It is reset when
  221. * gcTotalCycles register is written to. It looks at all the blocks but FE
  222. * when determining the IP is idle. */
  223. #define CSL_BB2D_GCTOTALIDLECYCLES (0x7CU)
  224. /* Description: Specs for the chip. This register has no set reset value. It
  225. * varies with the implementation. */
  226. #define CSL_BB2D_GCCHIPSPECS2 (0x80U)
  227. /* Description: Shows which features are enabled in this chip. This register
  228. * has no set reset value. It varies with the implementation. 0 => NONE 1 =>
  229. * AVAILABLE */
  230. #define CSL_BB2D_GCMINORFEATURES2 (0x84U)
  231. /* Description: Control register for module level power controls. */
  232. #define CSL_BB2D_GCMODULEPOWERCONTROLS (0x100U)
  233. /* Description: Module level control registers. */
  234. #define CSL_BB2D_GCMODULEPOWERMODULECONTROL (0x104U)
  235. /* Description: Module level control status */
  236. #define CSL_BB2D_GCMODULEPOWERMODULESTATUS (0x108U)
  237. /* Description: Status register that holds which MMU generated an exception */
  238. #define CSL_BB2D_GCREGMMUSTATUS (0x188U)
  239. /* Description: Control register that enables the MMU (only time shot). */
  240. #define CSL_BB2D_GCREGMMUCONTROL (0x18CU)
  241. /* Description: Holds the original address that generated an exception */
  242. #define CSL_BB2D_GCREGMMUEXCEPTION0 (0x190U)
  243. /* Description: Holds the original address that generated an exception */
  244. #define CSL_BB2D_GCREGMMUEXCEPTION1 (0x194U)
  245. /* Description: Holds the original address that generated an exception */
  246. #define CSL_BB2D_GCREGMMUEXCEPTION2 (0x198U)
  247. /* Description: Holds the original address that generated an exception */
  248. #define CSL_BB2D_GCREGMMUEXCEPTION3 (0x19CU)
  249. /* Description: */
  250. #define CSL_BB2D_AQMEMORYDEBUG (0x414U)
  251. /* Description: */
  252. #define CSL_BB2D_AQREGISTERTIMINGCONTROL (0x42CU)
  253. /* Description: This is reserved for future expansion. */
  254. #define CSL_BB2D_GCMEMORYRESERVED (0x430U)
  255. /* Description: Controls the priority of the display controller requests. This
  256. * works like a PWM. One register gives the period, and the other gives the ON
  257. * time. When PWM is ON, display requests are accepted if both display and the
  258. * other request is valid. If it is OFF, the other request will be accepted.
  259. * If only one request is valid, it takes the bus regardless of the PWM bit. */
  260. #define CSL_BB2D_GCDISPLAYPRIORITY (0x434U)
  261. /* Description: Increments every cycle. */
  262. #define CSL_BB2D_GCDBGCYCLECOUNTER (0x438U)
  263. /* Description: Number of outstanding reads per client in multiples of 8B. */
  264. #define CSL_BB2D_GCOUTSTANDINGREADS0 (0x43CU)
  265. /* Description: Number of outstanding reads per client in multiples of 8B. */
  266. #define CSL_BB2D_GCOUTSTANDINGREADS1 (0x440U)
  267. /* Description: Number of outstanding writes per client. */
  268. #define CSL_BB2D_GCOUTSTANDINGWRITES (0x444U)
  269. /* Description: 32 bit debug signal from Ra. This register has no reset value. */
  270. #define CSL_BB2D_GCDEBUGSIGNALSRA (0x448U)
  271. /* Description: 32 bit debug signal from Tx. This register has no reset value. */
  272. #define CSL_BB2D_GCDEBUGSIGNALSTX (0x44CU)
  273. /* Description: 32 bit debug signal from Fe. This register has no reset value. */
  274. #define CSL_BB2D_GCDEBUGSIGNALSFE (0x450U)
  275. /* Description: 32 bit debug signal from Pe. This register has no reset value. */
  276. #define CSL_BB2D_GCDEBUGSIGNALSPE (0x454U)
  277. /* Description: 32 bit debug signal from De. This register has no reset value. */
  278. #define CSL_BB2D_GCDEBUGSIGNALSDE (0x458U)
  279. /* Description: 32 bit debug signal from Sh. This register has no reset value. */
  280. #define CSL_BB2D_GCDEBUGSIGNALSSH (0x45CU)
  281. /* Description: 32 bit debug signal from Pa. This register has no reset value. */
  282. #define CSL_BB2D_GCDEBUGSIGNALSPA (0x460U)
  283. /* Description: 32 bit debug signal from Se. This register has no reset value. */
  284. #define CSL_BB2D_GCDEBUGSIGNALSSE (0x464U)
  285. /* Description: 32 bit debug signal from Mc. This register has no reset value. */
  286. #define CSL_BB2D_GCDEBUGSIGNALSMC (0x468U)
  287. /* Description: 32 bit debug signal from Hi. This register has no reset value. */
  288. #define CSL_BB2D_GCDEBUGSIGNALSHI (0x46CU)
  289. /* Description: */
  290. #define CSL_BB2D_GCDEBUGCONTROL0 (0x470U)
  291. /* Description: */
  292. #define CSL_BB2D_GCDEBUGCONTROL1 (0x474U)
  293. /* Description: */
  294. #define CSL_BB2D_GCDEBUGCONTROL2 (0x478U)
  295. /* Description: */
  296. #define CSL_BB2D_GCDEBUGCONTROL3 (0x47CU)
  297. /* Description: Shows which features are enabled in this chip. This register
  298. * has no set reset value. It varies with the implementation. 0 => NONE 1 =>
  299. * AVAILABLE */
  300. #define CSL_BB2D_GCBUSCONTROL (0x480U)
  301. /* Description: */
  302. #define CSL_BB2D_GCREGENDIANNESS0 (0x484U)
  303. /* Description: */
  304. #define CSL_BB2D_GCREGENDIANNESS1 (0x488U)
  305. /* Description: */
  306. #define CSL_BB2D_GCREGENDIANNESS2 (0x48CU)
  307. /* Description: */
  308. #define CSL_BB2D_GCREGDRAWPRIMITIVESTARTTIMESTAMP (0x490U)
  309. /* Description: */
  310. #define CSL_BB2D_GCREGDRAWPRIMITIVEENDTIMESTAMP (0x494U)
  311. /* Description: Composition trigger. */
  312. #define CSL_BB2D_GCREGCONTROL0 (0x558U)
  313. /* Description: Base address for the command buffer. The address must be
  314. * 64-bit aligned and it is always physical. To use addresses above
  315. * 0x8000_0000, program AQMemoryFE with the appropriate offset. Also, this
  316. * register cannot be read. To check the value of the current fetch address
  317. * use AQFEDebugCurCmdAdr. Since this is a write only register is has no reset
  318. * value. */
  319. #define CSL_BB2D_AQCMDBUFFERADDR (0x654U)
  320. /* Description: Since this is a write only register is has no reset value. */
  321. #define CSL_BB2D_AQCMDBUFFERCTRL (0x658U)
  322. /* Description: */
  323. #define CSL_BB2D_AQFESTATUS (0x65CU)
  324. /* Description: Reserved. */
  325. #define CSL_BB2D_AQFEDEBUGSTATE (0x660U)
  326. /* Description: This is the command decoder address. The address is always
  327. * physical so the MSB should always be 0. It has no reset value. */
  328. #define CSL_BB2D_AQFEDEBUGCURCMDADR (0x664U)
  329. /* Description: Reserved. No reset value */
  330. #define CSL_BB2D_AQFEDEBUGCMDLOWREG (0x668U)
  331. /* Description: Reserved. No reset value */
  332. #define CSL_BB2D_AQFEDEBUGCMDHIREG (0x66CU)
  333. /**************************************************************************
  334. * Field Definition Macros
  335. **************************************************************************/
  336. /* AQHICLOCKCONTROL */
  337. #define CSL_BB2D_AQHICLOCKCONTROL_DISABLE_RAM_CLOCK_GATING_MASK (0x00000400U)
  338. #define CSL_BB2D_AQHICLOCKCONTROL_DISABLE_RAM_CLOCK_GATING_SHIFT (10U)
  339. #define CSL_BB2D_AQHICLOCKCONTROL_DISABLE_RAM_CLOCK_GATING_RESETVAL (0x00000000U)
  340. #define CSL_BB2D_AQHICLOCKCONTROL_DISABLE_RAM_CLOCK_GATING_MAX (0x00000001U)
  341. #define CSL_BB2D_AQHICLOCKCONTROL_IDLE2_D_MASK (0x00020000U)
  342. #define CSL_BB2D_AQHICLOCKCONTROL_IDLE2_D_SHIFT (17U)
  343. #define CSL_BB2D_AQHICLOCKCONTROL_IDLE2_D_RESETVAL (0x00000001U)
  344. #define CSL_BB2D_AQHICLOCKCONTROL_IDLE2_D_MAX (0x00000001U)
  345. #define CSL_BB2D_AQHICLOCKCONTROL_MULTI_PIPE_REG_SELECT_MASK (0x00F00000U)
  346. #define CSL_BB2D_AQHICLOCKCONTROL_MULTI_PIPE_REG_SELECT_SHIFT (20U)
  347. #define CSL_BB2D_AQHICLOCKCONTROL_MULTI_PIPE_REG_SELECT_RESETVAL (0x00000000U)
  348. #define CSL_BB2D_AQHICLOCKCONTROL_MULTI_PIPE_REG_SELECT_MAX (0x0000000fU)
  349. #define CSL_BB2D_AQHICLOCKCONTROL_MULTI_PIPE_USE_SINGLE_AXI_MASK (0x0F000000U)
  350. #define CSL_BB2D_AQHICLOCKCONTROL_MULTI_PIPE_USE_SINGLE_AXI_SHIFT (24U)
  351. #define CSL_BB2D_AQHICLOCKCONTROL_MULTI_PIPE_USE_SINGLE_AXI_RESETVAL (0x00000000U)
  352. #define CSL_BB2D_AQHICLOCKCONTROL_MULTI_PIPE_USE_SINGLE_AXI_MAX (0x0000000fU)
  353. #define CSL_BB2D_AQHICLOCKCONTROL_IDLE3_D_MASK (0x00010000U)
  354. #define CSL_BB2D_AQHICLOCKCONTROL_IDLE3_D_SHIFT (16U)
  355. #define CSL_BB2D_AQHICLOCKCONTROL_IDLE3_D_RESETVAL (0x00000001U)
  356. #define CSL_BB2D_AQHICLOCKCONTROL_IDLE3_D_MAX (0x00000001U)
  357. #define CSL_BB2D_AQHICLOCKCONTROL_ISOLATE_GPU_MASK (0x00080000U)
  358. #define CSL_BB2D_AQHICLOCKCONTROL_ISOLATE_GPU_SHIFT (19U)
  359. #define CSL_BB2D_AQHICLOCKCONTROL_ISOLATE_GPU_RESETVAL (0x00000000U)
  360. #define CSL_BB2D_AQHICLOCKCONTROL_ISOLATE_GPU_MAX (0x00000001U)
  361. #define CSL_BB2D_AQHICLOCKCONTROL_CLK3D_DIS_MASK (0x00000001U)
  362. #define CSL_BB2D_AQHICLOCKCONTROL_CLK3D_DIS_SHIFT (0U)
  363. #define CSL_BB2D_AQHICLOCKCONTROL_CLK3D_DIS_RESETVAL (0x00000000U)
  364. #define CSL_BB2D_AQHICLOCKCONTROL_CLK3D_DIS_MAX (0x00000001U)
  365. #define CSL_BB2D_AQHICLOCKCONTROL_CLK2D_DIS_MASK (0x00000002U)
  366. #define CSL_BB2D_AQHICLOCKCONTROL_CLK2D_DIS_SHIFT (1U)
  367. #define CSL_BB2D_AQHICLOCKCONTROL_CLK2D_DIS_RESETVAL (0x00000000U)
  368. #define CSL_BB2D_AQHICLOCKCONTROL_CLK2D_DIS_MAX (0x00000001U)
  369. #define CSL_BB2D_AQHICLOCKCONTROL_FSCALE_VAL_MASK (0x000001FCU)
  370. #define CSL_BB2D_AQHICLOCKCONTROL_FSCALE_VAL_SHIFT (2U)
  371. #define CSL_BB2D_AQHICLOCKCONTROL_FSCALE_VAL_RESETVAL (0x00000040U)
  372. #define CSL_BB2D_AQHICLOCKCONTROL_FSCALE_VAL_MAX (0x0000007fU)
  373. #define CSL_BB2D_AQHICLOCKCONTROL_IDLE_VG_MASK (0x00040000U)
  374. #define CSL_BB2D_AQHICLOCKCONTROL_IDLE_VG_SHIFT (18U)
  375. #define CSL_BB2D_AQHICLOCKCONTROL_IDLE_VG_RESETVAL (0x00000001U)
  376. #define CSL_BB2D_AQHICLOCKCONTROL_IDLE_VG_MAX (0x00000001U)
  377. #define CSL_BB2D_AQHICLOCKCONTROL_FSCALE_CMD_LOAD_MASK (0x00000200U)
  378. #define CSL_BB2D_AQHICLOCKCONTROL_FSCALE_CMD_LOAD_SHIFT (9U)
  379. #define CSL_BB2D_AQHICLOCKCONTROL_FSCALE_CMD_LOAD_RESETVAL (0x00000000U)
  380. #define CSL_BB2D_AQHICLOCKCONTROL_FSCALE_CMD_LOAD_MAX (0x00000001U)
  381. #define CSL_BB2D_AQHICLOCKCONTROL_DISABLE_DEBUG_REGISTERS_MASK (0x00000800U)
  382. #define CSL_BB2D_AQHICLOCKCONTROL_DISABLE_DEBUG_REGISTERS_SHIFT (11U)
  383. #define CSL_BB2D_AQHICLOCKCONTROL_DISABLE_DEBUG_REGISTERS_RESETVAL (0x00000000U)
  384. #define CSL_BB2D_AQHICLOCKCONTROL_DISABLE_DEBUG_REGISTERS_MAX (0x00000001U)
  385. #define CSL_BB2D_AQHICLOCKCONTROL_SOFT_RESET_MASK (0x00001000U)
  386. #define CSL_BB2D_AQHICLOCKCONTROL_SOFT_RESET_SHIFT (12U)
  387. #define CSL_BB2D_AQHICLOCKCONTROL_SOFT_RESET_RESETVAL (0x00000000U)
  388. #define CSL_BB2D_AQHICLOCKCONTROL_SOFT_RESET_MAX (0x00000001U)
  389. #define CSL_BB2D_AQHICLOCKCONTROL_RESETVAL (0x00070100U)
  390. /* AQHIIDLE */
  391. #define CSL_BB2D_AQHIIDLE_IDLE_FP_MASK (0x00000400U)
  392. #define CSL_BB2D_AQHIIDLE_IDLE_FP_SHIFT (10U)
  393. #define CSL_BB2D_AQHIIDLE_IDLE_FP_RESETVAL (0x00000001U)
  394. #define CSL_BB2D_AQHIIDLE_IDLE_FP_MAX (0x00000001U)
  395. #define CSL_BB2D_AQHIIDLE_IDLE_PA_MASK (0x00000010U)
  396. #define CSL_BB2D_AQHIIDLE_IDLE_PA_SHIFT (4U)
  397. #define CSL_BB2D_AQHIIDLE_IDLE_PA_RESETVAL (0x00000001U)
  398. #define CSL_BB2D_AQHIIDLE_IDLE_PA_MAX (0x00000001U)
  399. #define CSL_BB2D_AQHIIDLE_IDLE_PE_MASK (0x00000004U)
  400. #define CSL_BB2D_AQHIIDLE_IDLE_PE_SHIFT (2U)
  401. #define CSL_BB2D_AQHIIDLE_IDLE_PE_RESETVAL (0x00000001U)
  402. #define CSL_BB2D_AQHIIDLE_IDLE_PE_MAX (0x00000001U)
  403. #define CSL_BB2D_AQHIIDLE_UNUSED_MASK (0x7FFFF000U)
  404. #define CSL_BB2D_AQHIIDLE_UNUSED_SHIFT (12U)
  405. #define CSL_BB2D_AQHIIDLE_UNUSED_RESETVAL (0x0007ffffU)
  406. #define CSL_BB2D_AQHIIDLE_UNUSED_MAX (0x0007ffffU)
  407. #define CSL_BB2D_AQHIIDLE_IDLE_SE_MASK (0x00000020U)
  408. #define CSL_BB2D_AQHIIDLE_IDLE_SE_SHIFT (5U)
  409. #define CSL_BB2D_AQHIIDLE_IDLE_SE_RESETVAL (0x00000001U)
  410. #define CSL_BB2D_AQHIIDLE_IDLE_SE_MAX (0x00000001U)
  411. #define CSL_BB2D_AQHIIDLE_IDLE_IM_MASK (0x00000200U)
  412. #define CSL_BB2D_AQHIIDLE_IDLE_IM_SHIFT (9U)
  413. #define CSL_BB2D_AQHIIDLE_IDLE_IM_RESETVAL (0x00000001U)
  414. #define CSL_BB2D_AQHIIDLE_IDLE_IM_MAX (0x00000001U)
  415. #define CSL_BB2D_AQHIIDLE_AXI_LP_MASK (0x80000000U)
  416. #define CSL_BB2D_AQHIIDLE_AXI_LP_SHIFT (31U)
  417. #define CSL_BB2D_AQHIIDLE_AXI_LP_RESETVAL (0x00000000U)
  418. #define CSL_BB2D_AQHIIDLE_AXI_LP_MAX (0x00000001U)
  419. #define CSL_BB2D_AQHIIDLE_IDLE_TS_MASK (0x00000800U)
  420. #define CSL_BB2D_AQHIIDLE_IDLE_TS_SHIFT (11U)
  421. #define CSL_BB2D_AQHIIDLE_IDLE_TS_RESETVAL (0x00000001U)
  422. #define CSL_BB2D_AQHIIDLE_IDLE_TS_MAX (0x00000001U)
  423. #define CSL_BB2D_AQHIIDLE_IDLE_VG_MASK (0x00000100U)
  424. #define CSL_BB2D_AQHIIDLE_IDLE_VG_SHIFT (8U)
  425. #define CSL_BB2D_AQHIIDLE_IDLE_VG_RESETVAL (0x00000001U)
  426. #define CSL_BB2D_AQHIIDLE_IDLE_VG_MAX (0x00000001U)
  427. #define CSL_BB2D_AQHIIDLE_IDLE_RA_MASK (0x00000040U)
  428. #define CSL_BB2D_AQHIIDLE_IDLE_RA_SHIFT (6U)
  429. #define CSL_BB2D_AQHIIDLE_IDLE_RA_RESETVAL (0x00000001U)
  430. #define CSL_BB2D_AQHIIDLE_IDLE_RA_MAX (0x00000001U)
  431. #define CSL_BB2D_AQHIIDLE_IDLE_SH_MASK (0x00000008U)
  432. #define CSL_BB2D_AQHIIDLE_IDLE_SH_SHIFT (3U)
  433. #define CSL_BB2D_AQHIIDLE_IDLE_SH_RESETVAL (0x00000001U)
  434. #define CSL_BB2D_AQHIIDLE_IDLE_SH_MAX (0x00000001U)
  435. #define CSL_BB2D_AQHIIDLE_IDLE_TX_MASK (0x00000080U)
  436. #define CSL_BB2D_AQHIIDLE_IDLE_TX_SHIFT (7U)
  437. #define CSL_BB2D_AQHIIDLE_IDLE_TX_RESETVAL (0x00000001U)
  438. #define CSL_BB2D_AQHIIDLE_IDLE_TX_MAX (0x00000001U)
  439. #define CSL_BB2D_AQHIIDLE_IDLE_FE_MASK (0x00000001U)
  440. #define CSL_BB2D_AQHIIDLE_IDLE_FE_SHIFT (0U)
  441. #define CSL_BB2D_AQHIIDLE_IDLE_FE_RESETVAL (0x00000001U)
  442. #define CSL_BB2D_AQHIIDLE_IDLE_FE_MAX (0x00000001U)
  443. #define CSL_BB2D_AQHIIDLE_IDLE_DE_MASK (0x00000002U)
  444. #define CSL_BB2D_AQHIIDLE_IDLE_DE_SHIFT (1U)
  445. #define CSL_BB2D_AQHIIDLE_IDLE_DE_RESETVAL (0x00000001U)
  446. #define CSL_BB2D_AQHIIDLE_IDLE_DE_MAX (0x00000001U)
  447. #define CSL_BB2D_AQHIIDLE_RESETVAL (0x7fffffffU)
  448. /* AQAXICONFIG */
  449. #define CSL_BB2D_AQAXICONFIG_ARCACHE_MASK (0x0000F000U)
  450. #define CSL_BB2D_AQAXICONFIG_ARCACHE_SHIFT (12U)
  451. #define CSL_BB2D_AQAXICONFIG_ARCACHE_RESETVAL (0x00000000U)
  452. #define CSL_BB2D_AQAXICONFIG_ARCACHE_MAX (0x0000000fU)
  453. #define CSL_BB2D_AQAXICONFIG_AWCACHE_MASK (0x00000F00U)
  454. #define CSL_BB2D_AQAXICONFIG_AWCACHE_SHIFT (8U)
  455. #define CSL_BB2D_AQAXICONFIG_AWCACHE_RESETVAL (0x00000000U)
  456. #define CSL_BB2D_AQAXICONFIG_AWCACHE_MAX (0x0000000fU)
  457. #define CSL_BB2D_AQAXICONFIG_AWID_MASK (0x0000000FU)
  458. #define CSL_BB2D_AQAXICONFIG_AWID_SHIFT (0U)
  459. #define CSL_BB2D_AQAXICONFIG_AWID_RESETVAL (0x00000000U)
  460. #define CSL_BB2D_AQAXICONFIG_AWID_MAX (0x0000000fU)
  461. #define CSL_BB2D_AQAXICONFIG_ARID_MASK (0x000000F0U)
  462. #define CSL_BB2D_AQAXICONFIG_ARID_SHIFT (4U)
  463. #define CSL_BB2D_AQAXICONFIG_ARID_RESETVAL (0x00000000U)
  464. #define CSL_BB2D_AQAXICONFIG_ARID_MAX (0x0000000fU)
  465. #define CSL_BB2D_AQAXICONFIG_RESETVAL (0x00000000U)
  466. /* AQAXISTATUS */
  467. #define CSL_BB2D_AQAXISTATUS_WR_ERR_ID_MASK (0x0000000FU)
  468. #define CSL_BB2D_AQAXISTATUS_WR_ERR_ID_SHIFT (0U)
  469. #define CSL_BB2D_AQAXISTATUS_WR_ERR_ID_RESETVAL (0x00000000U)
  470. #define CSL_BB2D_AQAXISTATUS_WR_ERR_ID_MAX (0x0000000fU)
  471. #define CSL_BB2D_AQAXISTATUS_DET_WR_ERR_MASK (0x00000100U)
  472. #define CSL_BB2D_AQAXISTATUS_DET_WR_ERR_SHIFT (8U)
  473. #define CSL_BB2D_AQAXISTATUS_DET_WR_ERR_RESETVAL (0x00000000U)
  474. #define CSL_BB2D_AQAXISTATUS_DET_WR_ERR_MAX (0x00000001U)
  475. #define CSL_BB2D_AQAXISTATUS_DET_RD_ERR_MASK (0x00000200U)
  476. #define CSL_BB2D_AQAXISTATUS_DET_RD_ERR_SHIFT (9U)
  477. #define CSL_BB2D_AQAXISTATUS_DET_RD_ERR_RESETVAL (0x00000000U)
  478. #define CSL_BB2D_AQAXISTATUS_DET_RD_ERR_MAX (0x00000001U)
  479. #define CSL_BB2D_AQAXISTATUS_RD_ERR_ID_MASK (0x000000F0U)
  480. #define CSL_BB2D_AQAXISTATUS_RD_ERR_ID_SHIFT (4U)
  481. #define CSL_BB2D_AQAXISTATUS_RD_ERR_ID_RESETVAL (0x00000000U)
  482. #define CSL_BB2D_AQAXISTATUS_RD_ERR_ID_MAX (0x0000000fU)
  483. #define CSL_BB2D_AQAXISTATUS_RESETVAL (0x00000000U)
  484. /* AQINTRACKNOWLEDGE */
  485. #define CSL_BB2D_AQINTRACKNOWLEDGE_INTR_VEC_MASK (0xFFFFFFFFU)
  486. #define CSL_BB2D_AQINTRACKNOWLEDGE_INTR_VEC_SHIFT (0U)
  487. #define CSL_BB2D_AQINTRACKNOWLEDGE_INTR_VEC_RESETVAL (0x00000000U)
  488. #define CSL_BB2D_AQINTRACKNOWLEDGE_INTR_VEC_MAX (0xffffffffU)
  489. #define CSL_BB2D_AQINTRACKNOWLEDGE_RESETVAL (0x00000000U)
  490. /* AQINTRENBL */
  491. #define CSL_BB2D_AQINTRENBL_INTR_ENBL_VEC_MASK (0xFFFFFFFFU)
  492. #define CSL_BB2D_AQINTRENBL_INTR_ENBL_VEC_SHIFT (0U)
  493. #define CSL_BB2D_AQINTRENBL_INTR_ENBL_VEC_RESETVAL (0x00000000U)
  494. #define CSL_BB2D_AQINTRENBL_INTR_ENBL_VEC_MAX (0xffffffffU)
  495. #define CSL_BB2D_AQINTRENBL_RESETVAL (0x00000000U)
  496. /* AQIDENT */
  497. #define CSL_BB2D_AQIDENT_PRODUCT_MASK (0x00FF0000U)
  498. #define CSL_BB2D_AQIDENT_PRODUCT_SHIFT (16U)
  499. #define CSL_BB2D_AQIDENT_PRODUCT_RESETVAL (0x00000001U)
  500. #define CSL_BB2D_AQIDENT_PRODUCT_MAX (0x000000ffU)
  501. #define CSL_BB2D_AQIDENT_TECHNOLOGY_MASK (0x00000F00U)
  502. #define CSL_BB2D_AQIDENT_TECHNOLOGY_SHIFT (8U)
  503. #define CSL_BB2D_AQIDENT_TECHNOLOGY_RESETVAL (0x00000000U)
  504. #define CSL_BB2D_AQIDENT_TECHNOLOGY_MAX (0x0000000fU)
  505. #define CSL_BB2D_AQIDENT_REVISION_MASK (0x0000F000U)
  506. #define CSL_BB2D_AQIDENT_REVISION_SHIFT (12U)
  507. #define CSL_BB2D_AQIDENT_REVISION_RESETVAL (0x00000000U)
  508. #define CSL_BB2D_AQIDENT_REVISION_MAX (0x0000000fU)
  509. #define CSL_BB2D_AQIDENT_CUSTOMER_MASK (0x000000FFU)
  510. #define CSL_BB2D_AQIDENT_CUSTOMER_SHIFT (0U)
  511. #define CSL_BB2D_AQIDENT_CUSTOMER_RESETVAL (0x00000000U)
  512. #define CSL_BB2D_AQIDENT_CUSTOMER_MAX (0x000000ffU)
  513. #define CSL_BB2D_AQIDENT_FAMILY_MASK (0xFF000000U)
  514. #define CSL_BB2D_AQIDENT_FAMILY_SHIFT (24U)
  515. #define CSL_BB2D_AQIDENT_FAMILY_RESETVAL (0x00000014U)
  516. #define CSL_BB2D_AQIDENT_FAMILY_MAX (0x000000ffU)
  517. #define CSL_BB2D_AQIDENT_RESETVAL (0x14010000U)
  518. /* GCFEATURES */
  519. #define CSL_BB2D_GCFEATURES_ETC1_TEXTURE_COMPRESSION_MASK (0x00000400U)
  520. #define CSL_BB2D_GCFEATURES_ETC1_TEXTURE_COMPRESSION_SHIFT (10U)
  521. #define CSL_BB2D_GCFEATURES_ETC1_TEXTURE_COMPRESSION_RESETVAL (0x00000001U)
  522. #define CSL_BB2D_GCFEATURES_ETC1_TEXTURE_COMPRESSION_MAX (0x00000001U)
  523. #define CSL_BB2D_GCFEATURES_HIGH_DYNAMIC_RANGE_MASK (0x00001000U)
  524. #define CSL_BB2D_GCFEATURES_HIGH_DYNAMIC_RANGE_SHIFT (12U)
  525. #define CSL_BB2D_GCFEATURES_HIGH_DYNAMIC_RANGE_RESETVAL (0x00000001U)
  526. #define CSL_BB2D_GCFEATURES_HIGH_DYNAMIC_RANGE_MAX (0x00000001U)
  527. #define CSL_BB2D_GCFEATURES_SPECIAL_ANTI_ALIASING_MASK (0x00000002U)
  528. #define CSL_BB2D_GCFEATURES_SPECIAL_ANTI_ALIASING_SHIFT (1U)
  529. #define CSL_BB2D_GCFEATURES_SPECIAL_ANTI_ALIASING_RESETVAL (0x00000001U)
  530. #define CSL_BB2D_GCFEATURES_SPECIAL_ANTI_ALIASING_MAX (0x00000001U)
  531. #define CSL_BB2D_GCFEATURES_BUFFER_INTERLEAVING_MASK (0x00040000U)
  532. #define CSL_BB2D_GCFEATURES_BUFFER_INTERLEAVING_SHIFT (18U)
  533. #define CSL_BB2D_GCFEATURES_BUFFER_INTERLEAVING_RESETVAL (0x00000001U)
  534. #define CSL_BB2D_GCFEATURES_BUFFER_INTERLEAVING_MAX (0x00000001U)
  535. #define CSL_BB2D_GCFEATURES_NO_EZ_MASK (0x00010000U)
  536. #define CSL_BB2D_GCFEATURES_NO_EZ_SHIFT (16U)
  537. #define CSL_BB2D_GCFEATURES_NO_EZ_RESETVAL (0x00000000U)
  538. #define CSL_BB2D_GCFEATURES_NO_EZ_MAX (0x00000001U)
  539. #define CSL_BB2D_GCFEATURES_DEBUG_MODE_MASK (0x00000010U)
  540. #define CSL_BB2D_GCFEATURES_DEBUG_MODE_SHIFT (4U)
  541. #define CSL_BB2D_GCFEATURES_DEBUG_MODE_RESETVAL (0x00000000U)
  542. #define CSL_BB2D_GCFEATURES_DEBUG_MODE_MAX (0x00000001U)
  543. #define CSL_BB2D_GCFEATURES_HALF_TX_CACHE_MASK (0x00800000U)
  544. #define CSL_BB2D_GCFEATURES_HALF_TX_CACHE_SHIFT (23U)
  545. #define CSL_BB2D_GCFEATURES_HALF_TX_CACHE_RESETVAL (0x00000000U)
  546. #define CSL_BB2D_GCFEATURES_HALF_TX_CACHE_MAX (0x00000001U)
  547. #define CSL_BB2D_GCFEATURES_DC_MASK (0x00000100U)
  548. #define CSL_BB2D_GCFEATURES_DC_SHIFT (8U)
  549. #define CSL_BB2D_GCFEATURES_DC_RESETVAL (0x00000000U)
  550. #define CSL_BB2D_GCFEATURES_DC_MAX (0x00000001U)
  551. #define CSL_BB2D_GCFEATURES_BYTE_WRITE_3D_MASK (0x20000000U)
  552. #define CSL_BB2D_GCFEATURES_BYTE_WRITE_3D_SHIFT (29U)
  553. #define CSL_BB2D_GCFEATURES_BYTE_WRITE_3D_RESETVAL (0x00000001U)
  554. #define CSL_BB2D_GCFEATURES_BYTE_WRITE_3D_MAX (0x00000001U)
  555. #define CSL_BB2D_GCFEATURES_MSAA_MASK (0x00000080U)
  556. #define CSL_BB2D_GCFEATURES_MSAA_SHIFT (7U)
  557. #define CSL_BB2D_GCFEATURES_MSAA_RESETVAL (0x00000001U)
  558. #define CSL_BB2D_GCFEATURES_MSAA_MAX (0x00000001U)
  559. #define CSL_BB2D_GCFEATURES_NO422_TEXTURE_MASK (0x00020000U)
  560. #define CSL_BB2D_GCFEATURES_NO422_TEXTURE_SHIFT (17U)
  561. #define CSL_BB2D_GCFEATURES_NO422_TEXTURE_RESETVAL (0x00000000U)
  562. #define CSL_BB2D_GCFEATURES_NO422_TEXTURE_MAX (0x00000001U)
  563. #define CSL_BB2D_GCFEATURES_YUY2_RENDER_TARGET_MASK (0x01000000U)
  564. #define CSL_BB2D_GCFEATURES_YUY2_RENDER_TARGET_SHIFT (24U)
  565. #define CSL_BB2D_GCFEATURES_YUY2_RENDER_TARGET_RESETVAL (0x00000000U)
  566. #define CSL_BB2D_GCFEATURES_YUY2_RENDER_TARGET_MAX (0x00000001U)
  567. #define CSL_BB2D_GCFEATURES_FE20_MASK (0x10000000U)
  568. #define CSL_BB2D_GCFEATURES_FE20_SHIFT (28U)
  569. #define CSL_BB2D_GCFEATURES_FE20_RESETVAL (0x00000000U)
  570. #define CSL_BB2D_GCFEATURES_FE20_MAX (0x00000001U)
  571. #define CSL_BB2D_GCFEATURES_RS_YUV_TARGET_MASK (0x40000000U)
  572. #define CSL_BB2D_GCFEATURES_RS_YUV_TARGET_SHIFT (30U)
  573. #define CSL_BB2D_GCFEATURES_RS_YUV_TARGET_RESETVAL (0x00000001U)
  574. #define CSL_BB2D_GCFEATURES_RS_YUV_TARGET_MAX (0x00000001U)
  575. #define CSL_BB2D_GCFEATURES_DXT_TEXTURE_COMPRESSION_MASK (0x00000008U)
  576. #define CSL_BB2D_GCFEATURES_DXT_TEXTURE_COMPRESSION_SHIFT (3U)
  577. #define CSL_BB2D_GCFEATURES_DXT_TEXTURE_COMPRESSION_RESETVAL (0x00000001U)
  578. #define CSL_BB2D_GCFEATURES_DXT_TEXTURE_COMPRESSION_MAX (0x00000001U)
  579. #define CSL_BB2D_GCFEATURES_FAST_SCALER_MASK (0x00000800U)
  580. #define CSL_BB2D_GCFEATURES_FAST_SCALER_SHIFT (11U)
  581. #define CSL_BB2D_GCFEATURES_FAST_SCALER_RESETVAL (0x00000001U)
  582. #define CSL_BB2D_GCFEATURES_FAST_SCALER_MAX (0x00000001U)
  583. #define CSL_BB2D_GCFEATURES_MIN_AREA_MASK (0x00008000U)
  584. #define CSL_BB2D_GCFEATURES_MIN_AREA_SHIFT (15U)
  585. #define CSL_BB2D_GCFEATURES_MIN_AREA_RESETVAL (0x00000000U)
  586. #define CSL_BB2D_GCFEATURES_MIN_AREA_MAX (0x00000001U)
  587. #define CSL_BB2D_GCFEATURES_HALF_PE_CACHE_MASK (0x00400000U)
  588. #define CSL_BB2D_GCFEATURES_HALF_PE_CACHE_SHIFT (22U)
  589. #define CSL_BB2D_GCFEATURES_HALF_PE_CACHE_RESETVAL (0x00000000U)
  590. #define CSL_BB2D_GCFEATURES_HALF_PE_CACHE_MAX (0x00000001U)
  591. #define CSL_BB2D_GCFEATURES_PIPE_2D_MASK (0x00000200U)
  592. #define CSL_BB2D_GCFEATURES_PIPE_2D_SHIFT (9U)
  593. #define CSL_BB2D_GCFEATURES_PIPE_2D_RESETVAL (0x00000001U)
  594. #define CSL_BB2D_GCFEATURES_PIPE_2D_MAX (0x00000001U)
  595. #define CSL_BB2D_GCFEATURES_PIPE_VG_MASK (0x04000000U)
  596. #define CSL_BB2D_GCFEATURES_PIPE_VG_SHIFT (26U)
  597. #define CSL_BB2D_GCFEATURES_PIPE_VG_RESETVAL (0x00000000U)
  598. #define CSL_BB2D_GCFEATURES_PIPE_VG_MAX (0x00000001U)
  599. #define CSL_BB2D_GCFEATURES_FAST_CLEAR_MASK (0x00000001U)
  600. #define CSL_BB2D_GCFEATURES_FAST_CLEAR_SHIFT (0U)
  601. #define CSL_BB2D_GCFEATURES_FAST_CLEAR_RESETVAL (0x00000000U)
  602. #define CSL_BB2D_GCFEATURES_FAST_CLEAR_MAX (0x00000001U)
  603. #define CSL_BB2D_GCFEATURES_FE20_BIT_INDEX_MASK (0x80000000U)
  604. #define CSL_BB2D_GCFEATURES_FE20_BIT_INDEX_SHIFT (31U)
  605. #define CSL_BB2D_GCFEATURES_FE20_BIT_INDEX_RESETVAL (0x00000001U)
  606. #define CSL_BB2D_GCFEATURES_FE20_BIT_INDEX_MAX (0x00000001U)
  607. #define CSL_BB2D_GCFEATURES_YUY2_AVERAGING_MASK (0x00200000U)
  608. #define CSL_BB2D_GCFEATURES_YUY2_AVERAGING_SHIFT (21U)
  609. #define CSL_BB2D_GCFEATURES_YUY2_AVERAGING_RESETVAL (0x00000001U)
  610. #define CSL_BB2D_GCFEATURES_YUY2_AVERAGING_MAX (0x00000001U)
  611. #define CSL_BB2D_GCFEATURES_YUV420_FILTER_MASK (0x00000040U)
  612. #define CSL_BB2D_GCFEATURES_YUV420_FILTER_SHIFT (6U)
  613. #define CSL_BB2D_GCFEATURES_YUV420_FILTER_RESETVAL (0x00000001U)
  614. #define CSL_BB2D_GCFEATURES_YUV420_FILTER_MAX (0x00000001U)
  615. #define CSL_BB2D_GCFEATURES_NO_SCALER_MASK (0x00100000U)
  616. #define CSL_BB2D_GCFEATURES_NO_SCALER_SHIFT (20U)
  617. #define CSL_BB2D_GCFEATURES_NO_SCALER_RESETVAL (0x00000000U)
  618. #define CSL_BB2D_GCFEATURES_NO_SCALER_MAX (0x00000001U)
  619. #define CSL_BB2D_GCFEATURES_MODULE_CG_MASK (0x00004000U)
  620. #define CSL_BB2D_GCFEATURES_MODULE_CG_SHIFT (14U)
  621. #define CSL_BB2D_GCFEATURES_MODULE_CG_RESETVAL (0x00000001U)
  622. #define CSL_BB2D_GCFEATURES_MODULE_CG_MAX (0x00000001U)
  623. #define CSL_BB2D_GCFEATURES_MEM32_BIT_SUPPORT_MASK (0x02000000U)
  624. #define CSL_BB2D_GCFEATURES_MEM32_BIT_SUPPORT_SHIFT (25U)
  625. #define CSL_BB2D_GCFEATURES_MEM32_BIT_SUPPORT_RESETVAL (0x00000000U)
  626. #define CSL_BB2D_GCFEATURES_MEM32_BIT_SUPPORT_MAX (0x00000001U)
  627. #define CSL_BB2D_GCFEATURES_ZCOMPRESSION_MASK (0x00000020U)
  628. #define CSL_BB2D_GCFEATURES_ZCOMPRESSION_SHIFT (5U)
  629. #define CSL_BB2D_GCFEATURES_ZCOMPRESSION_RESETVAL (0x00000000U)
  630. #define CSL_BB2D_GCFEATURES_ZCOMPRESSION_MAX (0x00000001U)
  631. #define CSL_BB2D_GCFEATURES_YUV420_TILER_MASK (0x00002000U)
  632. #define CSL_BB2D_GCFEATURES_YUV420_TILER_SHIFT (13U)
  633. #define CSL_BB2D_GCFEATURES_YUV420_TILER_RESETVAL (0x00000001U)
  634. #define CSL_BB2D_GCFEATURES_YUV420_TILER_MAX (0x00000001U)
  635. #define CSL_BB2D_GCFEATURES_BYTE_WRITE_2D_MASK (0x00080000U)
  636. #define CSL_BB2D_GCFEATURES_BYTE_WRITE_2D_SHIFT (19U)
  637. #define CSL_BB2D_GCFEATURES_BYTE_WRITE_2D_RESETVAL (0x00000001U)
  638. #define CSL_BB2D_GCFEATURES_BYTE_WRITE_2D_MAX (0x00000001U)
  639. #define CSL_BB2D_GCFEATURES_PIPE_3D_MASK (0x00000004U)
  640. #define CSL_BB2D_GCFEATURES_PIPE_3D_SHIFT (2U)
  641. #define CSL_BB2D_GCFEATURES_PIPE_3D_RESETVAL (0x00000000U)
  642. #define CSL_BB2D_GCFEATURES_PIPE_3D_MAX (0x00000001U)
  643. #define CSL_BB2D_GCFEATURES_VGTS_MASK (0x08000000U)
  644. #define CSL_BB2D_GCFEATURES_VGTS_SHIFT (27U)
  645. #define CSL_BB2D_GCFEATURES_VGTS_RESETVAL (0x00000000U)
  646. #define CSL_BB2D_GCFEATURES_VGTS_MAX (0x00000001U)
  647. #define CSL_BB2D_GCFEATURES_RESETVAL (0xe02c7ecaU)
  648. /* GCCHIPID */
  649. #define CSL_BB2D_GCCHIPID_ID_MASK (0xFFFFFFFFU)
  650. #define CSL_BB2D_GCCHIPID_ID_SHIFT (0U)
  651. #define CSL_BB2D_GCCHIPID_ID_RESETVAL (0x00000320U)
  652. #define CSL_BB2D_GCCHIPID_ID_MAX (0xffffffffU)
  653. #define CSL_BB2D_GCCHIPID_RESETVAL (0x00000320U)
  654. /* GCCHIPREV */
  655. #define CSL_BB2D_GCCHIPREV_REV_MASK (0xFFFFFFFFU)
  656. #define CSL_BB2D_GCCHIPREV_REV_SHIFT (0U)
  657. #define CSL_BB2D_GCCHIPREV_REV_RESETVAL (0x00005301U)
  658. #define CSL_BB2D_GCCHIPREV_REV_MAX (0xffffffffU)
  659. #define CSL_BB2D_GCCHIPREV_RESETVAL (0x00005301U)
  660. /* GCCHIPDATE */
  661. #define CSL_BB2D_GCCHIPDATE_DATE_MASK (0xFFFFFFFFU)
  662. #define CSL_BB2D_GCCHIPDATE_DATE_SHIFT (0U)
  663. #define CSL_BB2D_GCCHIPDATE_DATE_RESETVAL (0x20111103U)
  664. #define CSL_BB2D_GCCHIPDATE_DATE_MAX (0xffffffffU)
  665. #define CSL_BB2D_GCCHIPDATE_RESETVAL (0x20111103U)
  666. /* GCCHIPTIME */
  667. #define CSL_BB2D_GCCHIPTIME_TIME_MASK (0xFFFFFFFFU)
  668. #define CSL_BB2D_GCCHIPTIME_TIME_SHIFT (0U)
  669. #define CSL_BB2D_GCCHIPTIME_TIME_RESETVAL (0x00140300U)
  670. #define CSL_BB2D_GCCHIPTIME_TIME_MAX (0xffffffffU)
  671. #define CSL_BB2D_GCCHIPTIME_RESETVAL (0x00140300U)
  672. /* GCCHIPCUSTOMER */
  673. #define CSL_BB2D_GCCHIPCUSTOMER_GROUP_MASK (0x0000FFFFU)
  674. #define CSL_BB2D_GCCHIPCUSTOMER_GROUP_SHIFT (0U)
  675. #define CSL_BB2D_GCCHIPCUSTOMER_GROUP_RESETVAL (0x00000000U)
  676. #define CSL_BB2D_GCCHIPCUSTOMER_GROUP_MAX (0x0000ffffU)
  677. #define CSL_BB2D_GCCHIPCUSTOMER_COMPANY_MASK (0xFFFF0000U)
  678. #define CSL_BB2D_GCCHIPCUSTOMER_COMPANY_SHIFT (16U)
  679. #define CSL_BB2D_GCCHIPCUSTOMER_COMPANY_RESETVAL (0x00000000U)
  680. #define CSL_BB2D_GCCHIPCUSTOMER_COMPANY_MAX (0x0000ffffU)
  681. #define CSL_BB2D_GCCHIPCUSTOMER_RESETVAL (0x00000000U)
  682. /* GCMINORFEATURES0 */
  683. #define CSL_BB2D_GCMINORFEATURES0_EXTRA_SHADER_INSTRUCTIONS1_MASK (0x00100000U)
  684. #define CSL_BB2D_GCMINORFEATURES0_EXTRA_SHADER_INSTRUCTIONS1_SHIFT (20U)
  685. #define CSL_BB2D_GCMINORFEATURES0_EXTRA_SHADER_INSTRUCTIONS1_RESETVAL (0x00000001U)
  686. #define CSL_BB2D_GCMINORFEATURES0_EXTRA_SHADER_INSTRUCTIONS1_MAX (0x00000001U)
  687. #define CSL_BB2D_GCMINORFEATURES0_VG_FILTER_MASK (0x00020000U)
  688. #define CSL_BB2D_GCMINORFEATURES0_VG_FILTER_SHIFT (17U)
  689. #define CSL_BB2D_GCMINORFEATURES0_VG_FILTER_RESETVAL (0x00000000U)
  690. #define CSL_BB2D_GCMINORFEATURES0_VG_FILTER_MAX (0x00000001U)
  691. #define CSL_BB2D_GCMINORFEATURES0_SHADER_MSAA_SIDEBAND_MASK (0x00800000U)
  692. #define CSL_BB2D_GCMINORFEATURES0_SHADER_MSAA_SIDEBAND_SHIFT (23U)
  693. #define CSL_BB2D_GCMINORFEATURES0_SHADER_MSAA_SIDEBAND_RESETVAL (0x00000000U)
  694. #define CSL_BB2D_GCMINORFEATURES0_SHADER_MSAA_SIDEBAND_MAX (0x00000001U)
  695. #define CSL_BB2D_GCMINORFEATURES0_EXTRA_SHADER_INSTRUCTIONS0_MASK (0x00010000U)
  696. #define CSL_BB2D_GCMINORFEATURES0_EXTRA_SHADER_INSTRUCTIONS0_SHIFT (16U)
  697. #define CSL_BB2D_GCMINORFEATURES0_EXTRA_SHADER_INSTRUCTIONS0_RESETVAL (0x00000001U)
  698. #define CSL_BB2D_GCMINORFEATURES0_EXTRA_SHADER_INSTRUCTIONS0_MAX (0x00000001U)
  699. #define CSL_BB2D_GCMINORFEATURES0_MC_20_MASK (0x00400000U)
  700. #define CSL_BB2D_GCMINORFEATURES0_MC_20_SHIFT (22U)
  701. #define CSL_BB2D_GCMINORFEATURES0_MC_20_RESETVAL (0x00000000U)
  702. #define CSL_BB2D_GCMINORFEATURES0_MC_20_MAX (0x00000001U)
  703. #define CSL_BB2D_GCMINORFEATURES0_COMPRESSION_FIFO_FIXED_MASK (0x00008000U)
  704. #define CSL_BB2D_GCMINORFEATURES0_COMPRESSION_FIFO_FIXED_SHIFT (15U)
  705. #define CSL_BB2D_GCMINORFEATURES0_COMPRESSION_FIFO_FIXED_RESETVAL (0x00000001U)
  706. #define CSL_BB2D_GCMINORFEATURES0_COMPRESSION_FIFO_FIXED_MAX (0x00000001U)
  707. #define CSL_BB2D_GCMINORFEATURES0_VG_20_MASK (0x00002000U)
  708. #define CSL_BB2D_GCMINORFEATURES0_VG_20_SHIFT (13U)
  709. #define CSL_BB2D_GCMINORFEATURES0_VG_20_RESETVAL (0x00000000U)
  710. #define CSL_BB2D_GCMINORFEATURES0_VG_20_MAX (0x00000001U)
  711. #define CSL_BB2D_GCMINORFEATURES0_RENDER_8K_MASK (0x00000200U)
  712. #define CSL_BB2D_GCMINORFEATURES0_RENDER_8K_SHIFT (9U)
  713. #define CSL_BB2D_GCMINORFEATURES0_RENDER_8K_RESETVAL (0x00000001U)
  714. #define CSL_BB2D_GCMINORFEATURES0_RENDER_8K_MAX (0x00000001U)
  715. #define CSL_BB2D_GCMINORFEATURES0_CORRECT_STENCIL_MASK (0x40000000U)
  716. #define CSL_BB2D_GCMINORFEATURES0_CORRECT_STENCIL_SHIFT (30U)
  717. #define CSL_BB2D_GCMINORFEATURES0_CORRECT_STENCIL_RESETVAL (0x00000001U)
  718. #define CSL_BB2D_GCMINORFEATURES0_CORRECT_STENCIL_MAX (0x00000001U)
  719. #define CSL_BB2D_GCMINORFEATURES0_TS_EXTENDED_COMMANDS_MASK (0x00004000U)
  720. #define CSL_BB2D_GCMINORFEATURES0_TS_EXTENDED_COMMANDS_SHIFT (14U)
  721. #define CSL_BB2D_GCMINORFEATURES0_TS_EXTENDED_COMMANDS_RESETVAL (0x00000000U)
  722. #define CSL_BB2D_GCMINORFEATURES0_TS_EXTENDED_COMMANDS_MAX (0x00000001U)
  723. #define CSL_BB2D_GCMINORFEATURES0_DEFAULT_REG0_MASK (0x00200000U)
  724. #define CSL_BB2D_GCMINORFEATURES0_DEFAULT_REG0_SHIFT (21U)
  725. #define CSL_BB2D_GCMINORFEATURES0_DEFAULT_REG0_RESETVAL (0x00000001U)
  726. #define CSL_BB2D_GCMINORFEATURES0_DEFAULT_REG0_MAX (0x00000001U)
  727. #define CSL_BB2D_GCMINORFEATURES0_HIERARCHICAL_Z_MASK (0x08000000U)
  728. #define CSL_BB2D_GCMINORFEATURES0_HIERARCHICAL_Z_SHIFT (27U)
  729. #define CSL_BB2D_GCMINORFEATURES0_HIERARCHICAL_Z_RESETVAL (0x00000001U)
  730. #define CSL_BB2D_GCMINORFEATURES0_HIERARCHICAL_Z_MAX (0x00000001U)
  731. #define CSL_BB2D_GCMINORFEATURES0_DUAL_RETURN_BUS_MASK (0x00000002U)
  732. #define CSL_BB2D_GCMINORFEATURES0_DUAL_RETURN_BUS_SHIFT (1U)
  733. #define CSL_BB2D_GCMINORFEATURES0_DUAL_RETURN_BUS_RESETVAL (0x00000001U)
  734. #define CSL_BB2D_GCMINORFEATURES0_DUAL_RETURN_BUS_MAX (0x00000001U)
  735. #define CSL_BB2D_GCMINORFEATURES0_PE20_2D_MASK (0x00000080U)
  736. #define CSL_BB2D_GCMINORFEATURES0_PE20_2D_SHIFT (7U)
  737. #define CSL_BB2D_GCMINORFEATURES0_PE20_2D_RESETVAL (0x00000001U)
  738. #define CSL_BB2D_GCMINORFEATURES0_PE20_2D_MAX (0x00000001U)
  739. #define CSL_BB2D_GCMINORFEATURES0_ENHANCE_VR_MASK (0x80000000U)
  740. #define CSL_BB2D_GCMINORFEATURES0_ENHANCE_VR_SHIFT (31U)
  741. #define CSL_BB2D_GCMINORFEATURES0_ENHANCE_VR_RESETVAL (0x00000001U)
  742. #define CSL_BB2D_GCMINORFEATURES0_ENHANCE_VR_MAX (0x00000001U)
  743. #define CSL_BB2D_GCMINORFEATURES0_TEXTURE8_K_MASK (0x00000008U)
  744. #define CSL_BB2D_GCMINORFEATURES0_TEXTURE8_K_SHIFT (3U)
  745. #define CSL_BB2D_GCMINORFEATURES0_TEXTURE8_K_RESETVAL (0x00000001U)
  746. #define CSL_BB2D_GCMINORFEATURES0_TEXTURE8_K_MAX (0x00000001U)
  747. #define CSL_BB2D_GCMINORFEATURES0_SHADER_GETS_W_MASK (0x00080000U)
  748. #define CSL_BB2D_GCMINORFEATURES0_SHADER_GETS_W_SHIFT (19U)
  749. #define CSL_BB2D_GCMINORFEATURES0_SHADER_GETS_W_RESETVAL (0x00000001U)
  750. #define CSL_BB2D_GCMINORFEATURES0_SHADER_GETS_W_MAX (0x00000001U)
  751. #define CSL_BB2D_GCMINORFEATURES0_TILE_STATUS_2BITS_MASK (0x00000400U)
  752. #define CSL_BB2D_GCMINORFEATURES0_TILE_STATUS_2BITS_SHIFT (10U)
  753. #define CSL_BB2D_GCMINORFEATURES0_TILE_STATUS_2BITS_RESETVAL (0x00000001U)
  754. #define CSL_BB2D_GCMINORFEATURES0_TILE_STATUS_2BITS_MAX (0x00000001U)
  755. #define CSL_BB2D_GCMINORFEATURES0_FLIP_Y_MASK (0x00000001U)
  756. #define CSL_BB2D_GCMINORFEATURES0_FLIP_Y_SHIFT (0U)
  757. #define CSL_BB2D_GCMINORFEATURES0_FLIP_Y_RESETVAL (0x00000001U)
  758. #define CSL_BB2D_GCMINORFEATURES0_FLIP_Y_MAX (0x00000001U)
  759. #define CSL_BB2D_GCMINORFEATURES0_VAA_MASK (0x02000000U)
  760. #define CSL_BB2D_GCMINORFEATURES0_VAA_SHIFT (25U)
  761. #define CSL_BB2D_GCMINORFEATURES0_VAA_RESETVAL (0x00000000U)
  762. #define CSL_BB2D_GCMINORFEATURES0_VAA_MAX (0x00000001U)
  763. #define CSL_BB2D_GCMINORFEATURES0_SUPER_TILED_32X32_MASK (0x00001000U)
  764. #define CSL_BB2D_GCMINORFEATURES0_SUPER_TILED_32X32_SHIFT (12U)
  765. #define CSL_BB2D_GCMINORFEATURES0_SUPER_TILED_32X32_RESETVAL (0x00000001U)
  766. #define CSL_BB2D_GCMINORFEATURES0_SUPER_TILED_32X32_MAX (0x00000001U)
  767. #define CSL_BB2D_GCMINORFEATURES0_BYPASS_IN_MSAA_MASK (0x04000000U)
  768. #define CSL_BB2D_GCMINORFEATURES0_BYPASS_IN_MSAA_SHIFT (26U)
  769. #define CSL_BB2D_GCMINORFEATURES0_BYPASS_IN_MSAA_RESETVAL (0x00000000U)
  770. #define CSL_BB2D_GCMINORFEATURES0_BYPASS_IN_MSAA_MAX (0x00000001U)
  771. #define CSL_BB2D_GCMINORFEATURES0_VG_21_MASK (0x00040000U)
  772. #define CSL_BB2D_GCMINORFEATURES0_VG_21_SHIFT (18U)
  773. #define CSL_BB2D_GCMINORFEATURES0_VG_21_RESETVAL (0x00000000U)
  774. #define CSL_BB2D_GCMINORFEATURES0_VG_21_MAX (0x00000001U)
  775. #define CSL_BB2D_GCMINORFEATURES0_CORRECT_TEXTURE_CONVERTER_MASK (0x00000010U)
  776. #define CSL_BB2D_GCMINORFEATURES0_CORRECT_TEXTURE_CONVERTER_SHIFT (4U)
  777. #define CSL_BB2D_GCMINORFEATURES0_CORRECT_TEXTURE_CONVERTER_RESETVAL (0x00000001U)
  778. #define CSL_BB2D_GCMINORFEATURES0_CORRECT_TEXTURE_CONVERTER_MAX (0x00000001U)
  779. #define CSL_BB2D_GCMINORFEATURES0_FAST_CLEAR_FLUSH_MASK (0x00000040U)
  780. #define CSL_BB2D_GCMINORFEATURES0_FAST_CLEAR_FLUSH_SHIFT (6U)
  781. #define CSL_BB2D_GCMINORFEATURES0_FAST_CLEAR_FLUSH_RESETVAL (0x00000001U)
  782. #define CSL_BB2D_GCMINORFEATURES0_FAST_CLEAR_FLUSH_MAX (0x00000001U)
  783. #define CSL_BB2D_GCMINORFEATURES0_CORRECT_AUTO_DISABLE_MASK (0x00000100U)
  784. #define CSL_BB2D_GCMINORFEATURES0_CORRECT_AUTO_DISABLE_SHIFT (8U)
  785. #define CSL_BB2D_GCMINORFEATURES0_CORRECT_AUTO_DISABLE_RESETVAL (0x00000000U)
  786. #define CSL_BB2D_GCMINORFEATURES0_CORRECT_AUTO_DISABLE_MAX (0x00000001U)
  787. #define CSL_BB2D_GCMINORFEATURES0_SEPARATE_TILE_STATUS_WHEN_INTERLEAVED_MASK (0x00000800U)
  788. #define CSL_BB2D_GCMINORFEATURES0_SEPARATE_TILE_STATUS_WHEN_INTERLEAVED_SHIFT (11U)
  789. #define CSL_BB2D_GCMINORFEATURES0_SEPARATE_TILE_STATUS_WHEN_INTERLEAVED_RESETVAL (0x00000001U)
  790. #define CSL_BB2D_GCMINORFEATURES0_SEPARATE_TILE_STATUS_WHEN_INTERLEAVED_MAX (0x00000001U)
  791. #define CSL_BB2D_GCMINORFEATURES0_NEW_TEXTURE_MASK (0x10000000U)
  792. #define CSL_BB2D_GCMINORFEATURES0_NEW_TEXTURE_SHIFT (28U)
  793. #define CSL_BB2D_GCMINORFEATURES0_NEW_TEXTURE_RESETVAL (0x00000000U)
  794. #define CSL_BB2D_GCMINORFEATURES0_NEW_TEXTURE_MAX (0x00000001U)
  795. #define CSL_BB2D_GCMINORFEATURES0_A8_TARGET_SUPPORT_MASK (0x20000000U)
  796. #define CSL_BB2D_GCMINORFEATURES0_A8_TARGET_SUPPORT_SHIFT (29U)
  797. #define CSL_BB2D_GCMINORFEATURES0_A8_TARGET_SUPPORT_RESETVAL (0x00000000U)
  798. #define CSL_BB2D_GCMINORFEATURES0_A8_TARGET_SUPPORT_MAX (0x00000001U)
  799. #define CSL_BB2D_GCMINORFEATURES0_ENDIANNESS_CONFIG_MASK (0x00000004U)
  800. #define CSL_BB2D_GCMINORFEATURES0_ENDIANNESS_CONFIG_SHIFT (2U)
  801. #define CSL_BB2D_GCMINORFEATURES0_ENDIANNESS_CONFIG_RESETVAL (0x00000001U)
  802. #define CSL_BB2D_GCMINORFEATURES0_ENDIANNESS_CONFIG_MAX (0x00000001U)
  803. #define CSL_BB2D_GCMINORFEATURES0_SPECIAL_MSAA_LOD_MASK (0x00000020U)
  804. #define CSL_BB2D_GCMINORFEATURES0_SPECIAL_MSAA_LOD_SHIFT (5U)
  805. #define CSL_BB2D_GCMINORFEATURES0_SPECIAL_MSAA_LOD_RESETVAL (0x00000001U)
  806. #define CSL_BB2D_GCMINORFEATURES0_SPECIAL_MSAA_LOD_MAX (0x00000001U)
  807. #define CSL_BB2D_GCMINORFEATURES0_BUG_FIXES0_MASK (0x01000000U)
  808. #define CSL_BB2D_GCMINORFEATURES0_BUG_FIXES0_SHIFT (24U)
  809. #define CSL_BB2D_GCMINORFEATURES0_BUG_FIXES0_RESETVAL (0x00000001U)
  810. #define CSL_BB2D_GCMINORFEATURES0_BUG_FIXES0_MAX (0x00000001U)
  811. #define CSL_BB2D_GCMINORFEATURES0_RESETVAL (0xc9399effU)
  812. /* GCRESETMEMCOUNTERS */
  813. #define CSL_BB2D_GCRESETMEMCOUNTERS_RESET_MASK (0x00000001U)
  814. #define CSL_BB2D_GCRESETMEMCOUNTERS_RESET_SHIFT (0U)
  815. #define CSL_BB2D_GCRESETMEMCOUNTERS_RESET_RESETVAL (0x00000001U)
  816. #define CSL_BB2D_GCRESETMEMCOUNTERS_RESET_MAX (0x00000001U)
  817. #define CSL_BB2D_GCRESETMEMCOUNTERS_RESETVAL (0xc9399effU)
  818. /* GCTOTALREADS */
  819. #define CSL_BB2D_GCTOTALREADS_COUNT_MASK (0xFFFFFFFFU)
  820. #define CSL_BB2D_GCTOTALREADS_COUNT_SHIFT (0U)
  821. #define CSL_BB2D_GCTOTALREADS_COUNT_RESETVAL (0x00000000U)
  822. #define CSL_BB2D_GCTOTALREADS_COUNT_MAX (0xffffffffU)
  823. #define CSL_BB2D_GCTOTALREADS_RESETVAL (0x00000000U)
  824. /* GCTOTALWRITES */
  825. #define CSL_BB2D_GCTOTALWRITES_COUNT_MASK (0xFFFFFFFFU)
  826. #define CSL_BB2D_GCTOTALWRITES_COUNT_SHIFT (0U)
  827. #define CSL_BB2D_GCTOTALWRITES_COUNT_RESETVAL (0x00000000U)
  828. #define CSL_BB2D_GCTOTALWRITES_COUNT_MAX (0xffffffffU)
  829. #define CSL_BB2D_GCTOTALWRITES_RESETVAL (0x00000000U)
  830. /* GCCHIPSPECS */
  831. #define CSL_BB2D_GCCHIPSPECS_THREAD_COUNT_MASK (0x00000F00U)
  832. #define CSL_BB2D_GCCHIPSPECS_THREAD_COUNT_SHIFT (8U)
  833. #define CSL_BB2D_GCCHIPSPECS_THREAD_COUNT_RESETVAL (0x00000000U)
  834. #define CSL_BB2D_GCCHIPSPECS_THREAD_COUNT_MAX (0x0000000fU)
  835. #define CSL_BB2D_GCCHIPSPECS_TEMP_REGISTERS_MASK (0x000000F0U)
  836. #define CSL_BB2D_GCCHIPSPECS_TEMP_REGISTERS_SHIFT (4U)
  837. #define CSL_BB2D_GCCHIPSPECS_TEMP_REGISTERS_RESETVAL (0x00000000U)
  838. #define CSL_BB2D_GCCHIPSPECS_TEMP_REGISTERS_MAX (0x0000000fU)
  839. #define CSL_BB2D_GCCHIPSPECS_NUM_PIXEL_PIPES_MASK (0x0E000000U)
  840. #define CSL_BB2D_GCCHIPSPECS_NUM_PIXEL_PIPES_SHIFT (25U)
  841. #define CSL_BB2D_GCCHIPSPECS_NUM_PIXEL_PIPES_RESETVAL (0x00000000U)
  842. #define CSL_BB2D_GCCHIPSPECS_NUM_PIXEL_PIPES_MAX (0x00000007U)
  843. #define CSL_BB2D_GCCHIPSPECS_VERTEX_CACHE_SIZE_MASK (0x0001F000U)
  844. #define CSL_BB2D_GCCHIPSPECS_VERTEX_CACHE_SIZE_SHIFT (12U)
  845. #define CSL_BB2D_GCCHIPSPECS_VERTEX_CACHE_SIZE_RESETVAL (0x00000000U)
  846. #define CSL_BB2D_GCCHIPSPECS_VERTEX_CACHE_SIZE_MAX (0x0000001fU)
  847. #define CSL_BB2D_GCCHIPSPECS_NUM_SHADER_CORES_MASK (0x01F00000U)
  848. #define CSL_BB2D_GCCHIPSPECS_NUM_SHADER_CORES_SHIFT (20U)
  849. #define CSL_BB2D_GCCHIPSPECS_NUM_SHADER_CORES_RESETVAL (0x00000000U)
  850. #define CSL_BB2D_GCCHIPSPECS_NUM_SHADER_CORES_MAX (0x0000001fU)
  851. #define CSL_BB2D_GCCHIPSPECS_STREAMS_MASK (0x0000000FU)
  852. #define CSL_BB2D_GCCHIPSPECS_STREAMS_SHIFT (0U)
  853. #define CSL_BB2D_GCCHIPSPECS_STREAMS_RESETVAL (0x00000000U)
  854. #define CSL_BB2D_GCCHIPSPECS_STREAMS_MAX (0x0000000fU)
  855. #define CSL_BB2D_GCCHIPSPECS_VERTEX_OUTPUT_BUFFER_SIZE_MASK (0xF0000000U)
  856. #define CSL_BB2D_GCCHIPSPECS_VERTEX_OUTPUT_BUFFER_SIZE_SHIFT (28U)
  857. #define CSL_BB2D_GCCHIPSPECS_VERTEX_OUTPUT_BUFFER_SIZE_RESETVAL (0x00000000U)
  858. #define CSL_BB2D_GCCHIPSPECS_VERTEX_OUTPUT_BUFFER_SIZE_MAX (0x0000000fU)
  859. #define CSL_BB2D_GCCHIPSPECS_RESETVAL (0x00000000U)
  860. /* GCTOTALWRITEBURSTS */
  861. #define CSL_BB2D_GCTOTALWRITEBURSTS_COUNT_MASK (0xFFFFFFFFU)
  862. #define CSL_BB2D_GCTOTALWRITEBURSTS_COUNT_SHIFT (0U)
  863. #define CSL_BB2D_GCTOTALWRITEBURSTS_COUNT_RESETVAL (0x00000000U)
  864. #define CSL_BB2D_GCTOTALWRITEBURSTS_COUNT_MAX (0xffffffffU)
  865. #define CSL_BB2D_GCTOTALWRITEBURSTS_RESETVAL (0x00000000U)
  866. /* GCTOTALWRITEREQS */
  867. #define CSL_BB2D_GCTOTALWRITEREQS_COUNT_MASK (0xFFFFFFFFU)
  868. #define CSL_BB2D_GCTOTALWRITEREQS_COUNT_SHIFT (0U)
  869. #define CSL_BB2D_GCTOTALWRITEREQS_COUNT_RESETVAL (0x00000000U)
  870. #define CSL_BB2D_GCTOTALWRITEREQS_COUNT_MAX (0xffffffffU)
  871. #define CSL_BB2D_GCTOTALWRITEREQS_RESETVAL (0x00000000U)
  872. /* GCTOTALWRITELASTS */
  873. #define CSL_BB2D_GCTOTALWRITELASTS_COUNT_MASK (0xFFFFFFFFU)
  874. #define CSL_BB2D_GCTOTALWRITELASTS_COUNT_SHIFT (0U)
  875. #define CSL_BB2D_GCTOTALWRITELASTS_COUNT_RESETVAL (0x00000000U)
  876. #define CSL_BB2D_GCTOTALWRITELASTS_COUNT_MAX (0xffffffffU)
  877. #define CSL_BB2D_GCTOTALWRITELASTS_RESETVAL (0x00000000U)
  878. /* GCTOTALREADBURSTS */
  879. #define CSL_BB2D_GCTOTALREADBURSTS_COUNT_MASK (0xFFFFFFFFU)
  880. #define CSL_BB2D_GCTOTALREADBURSTS_COUNT_SHIFT (0U)
  881. #define CSL_BB2D_GCTOTALREADBURSTS_COUNT_RESETVAL (0x00000000U)
  882. #define CSL_BB2D_GCTOTALREADBURSTS_COUNT_MAX (0xffffffffU)
  883. #define CSL_BB2D_GCTOTALREADBURSTS_RESETVAL (0x00000000U)
  884. /* GCTOTALREADREQS */
  885. #define CSL_BB2D_GCTOTALREADREQS_COUNT_MASK (0xFFFFFFFFU)
  886. #define CSL_BB2D_GCTOTALREADREQS_COUNT_SHIFT (0U)
  887. #define CSL_BB2D_GCTOTALREADREQS_COUNT_RESETVAL (0x00000000U)
  888. #define CSL_BB2D_GCTOTALREADREQS_COUNT_MAX (0xffffffffU)
  889. #define CSL_BB2D_GCTOTALREADREQS_RESETVAL (0x00000000U)
  890. /* GCTOTALREADLASTS */
  891. #define CSL_BB2D_GCTOTALREADLASTS_COUNT_MASK (0xFFFFFFFFU)
  892. #define CSL_BB2D_GCTOTALREADLASTS_COUNT_SHIFT (0U)
  893. #define CSL_BB2D_GCTOTALREADLASTS_COUNT_RESETVAL (0x00000000U)
  894. #define CSL_BB2D_GCTOTALREADLASTS_COUNT_MAX (0xffffffffU)
  895. #define CSL_BB2D_GCTOTALREADLASTS_RESETVAL (0x00000000U)
  896. /* GCGPOUT0 */
  897. #define CSL_BB2D_GCGPOUT0_COUNT_MASK (0xFFFFFFFEU)
  898. #define CSL_BB2D_GCGPOUT0_COUNT_SHIFT (1U)
  899. #define CSL_BB2D_GCGPOUT0_COUNT_RESETVAL (0x00000000U)
  900. #define CSL_BB2D_GCGPOUT0_COUNT_MAX (0x7fffffffU)
  901. #define CSL_BB2D_GCGPOUT0_GCHOLD_MASK (0x00000001U)
  902. #define CSL_BB2D_GCGPOUT0_GCHOLD_SHIFT (0U)
  903. #define CSL_BB2D_GCGPOUT0_GCHOLD_RESETVAL (0x00000000U)
  904. #define CSL_BB2D_GCGPOUT0_GCHOLD_MAX (0x00000001U)
  905. #define CSL_BB2D_GCGPOUT0_RESETVAL (0x00000000U)
  906. /* GCGPOUT1 */
  907. #define CSL_BB2D_GCGPOUT1_COUNT_MASK (0xFFFFFFFFU)
  908. #define CSL_BB2D_GCGPOUT1_COUNT_SHIFT (0U)
  909. #define CSL_BB2D_GCGPOUT1_COUNT_RESETVAL (0x00000000U)
  910. #define CSL_BB2D_GCGPOUT1_COUNT_MAX (0xffffffffU)
  911. #define CSL_BB2D_GCGPOUT1_RESETVAL (0x00000000U)
  912. /* GCGPOUT2 */
  913. #define CSL_BB2D_GCGPOUT2_COUNT_MASK (0xFFFFFFFFU)
  914. #define CSL_BB2D_GCGPOUT2_COUNT_SHIFT (0U)
  915. #define CSL_BB2D_GCGPOUT2_COUNT_RESETVAL (0x00000000U)
  916. #define CSL_BB2D_GCGPOUT2_COUNT_MAX (0xffffffffU)
  917. #define CSL_BB2D_GCGPOUT2_RESETVAL (0x00000000U)
  918. /* GCAXICONTROL */
  919. #define CSL_BB2D_GCAXICONTROL_WR_FULL_BURST_MODE_MASK (0x00000001U)
  920. #define CSL_BB2D_GCAXICONTROL_WR_FULL_BURST_MODE_SHIFT (0U)
  921. #define CSL_BB2D_GCAXICONTROL_WR_FULL_BURST_MODE_RESETVAL (0x00000000U)
  922. #define CSL_BB2D_GCAXICONTROL_WR_FULL_BURST_MODE_MAX (0x00000001U)
  923. #define CSL_BB2D_GCAXICONTROL_RESETVAL (0x00000000U)
  924. /* GCMINORFEATURES1 */
  925. #define CSL_BB2D_GCMINORFEATURES1_CORRECT_OVERFLOW_VG_MASK (0x01000000U)
  926. #define CSL_BB2D_GCMINORFEATURES1_CORRECT_OVERFLOW_VG_SHIFT (24U)
  927. #define CSL_BB2D_GCMINORFEATURES1_CORRECT_OVERFLOW_VG_RESETVAL (0x00000000U)
  928. #define CSL_BB2D_GCMINORFEATURES1_CORRECT_OVERFLOW_VG_MAX (0x00000001U)
  929. #define CSL_BB2D_GCMINORFEATURES1_LINEAR_TEXTURE_SUPPORT_MASK (0x00400000U)
  930. #define CSL_BB2D_GCMINORFEATURES1_LINEAR_TEXTURE_SUPPORT_SHIFT (22U)
  931. #define CSL_BB2D_GCMINORFEATURES1_LINEAR_TEXTURE_SUPPORT_RESETVAL (0x00000000U)
  932. #define CSL_BB2D_GCMINORFEATURES1_LINEAR_TEXTURE_SUPPORT_MAX (0x00000001U)
  933. #define CSL_BB2D_GCMINORFEATURES1_PIXEL_DITHER_MASK (0x00001000U)
  934. #define CSL_BB2D_GCMINORFEATURES1_PIXEL_DITHER_SHIFT (12U)
  935. #define CSL_BB2D_GCMINORFEATURES1_PIXEL_DITHER_RESETVAL (0x00000001U)
  936. #define CSL_BB2D_GCMINORFEATURES1_PIXEL_DITHER_MAX (0x00000001U)
  937. #define CSL_BB2D_GCMINORFEATURES1_TWO_STENCIL_REFERENCE_MASK (0x00002000U)
  938. #define CSL_BB2D_GCMINORFEATURES1_TWO_STENCIL_REFERENCE_SHIFT (13U)
  939. #define CSL_BB2D_GCMINORFEATURES1_TWO_STENCIL_REFERENCE_RESETVAL (0x00000001U)
  940. #define CSL_BB2D_GCMINORFEATURES1_TWO_STENCIL_REFERENCE_MAX (0x00000001U)
  941. #define CSL_BB2D_GCMINORFEATURES1_FC_FLUSH_STALL_MASK (0x80000000U)
  942. #define CSL_BB2D_GCMINORFEATURES1_FC_FLUSH_STALL_SHIFT (31U)
  943. #define CSL_BB2D_GCMINORFEATURES1_FC_FLUSH_STALL_RESETVAL (0x00000001U)
  944. #define CSL_BB2D_GCMINORFEATURES1_FC_FLUSH_STALL_MAX (0x00000001U)
  945. #define CSL_BB2D_GCMINORFEATURES1_AUTO_RESTART_TS_MASK (0x00000100U)
  946. #define CSL_BB2D_GCMINORFEATURES1_AUTO_RESTART_TS_SHIFT (8U)
  947. #define CSL_BB2D_GCMINORFEATURES1_AUTO_RESTART_TS_RESETVAL (0x00000000U)
  948. #define CSL_BB2D_GCMINORFEATURES1_AUTO_RESTART_TS_MAX (0x00000001U)
  949. #define CSL_BB2D_GCMINORFEATURES1_DITHER_AND_FILTER_PLUS_ALPHA_2D_MASK (0x00010000U)
  950. #define CSL_BB2D_GCMINORFEATURES1_DITHER_AND_FILTER_PLUS_ALPHA_2D_SHIFT (16U)
  951. #define CSL_BB2D_GCMINORFEATURES1_DITHER_AND_FILTER_PLUS_ALPHA_2D_RESETVAL (0x00000001U)
  952. #define CSL_BB2D_GCMINORFEATURES1_DITHER_AND_FILTER_PLUS_ALPHA_2D_MAX (0x00000001U)
  953. #define CSL_BB2D_GCMINORFEATURES1_VG_DOUBLE_BUFFER_MASK (0x00000004U)
  954. #define CSL_BB2D_GCMINORFEATURES1_VG_DOUBLE_BUFFER_SHIFT (2U)
  955. #define CSL_BB2D_GCMINORFEATURES1_VG_DOUBLE_BUFFER_RESETVAL (0x00000000U)
  956. #define CSL_BB2D_GCMINORFEATURES1_VG_DOUBLE_BUFFER_MAX (0x00000001U)
  957. #define CSL_BB2D_GCMINORFEATURES1_CORRECT_MIN_MAX_DEPTH_MASK (0x00008000U)
  958. #define CSL_BB2D_GCMINORFEATURES1_CORRECT_MIN_MAX_DEPTH_SHIFT (15U)
  959. #define CSL_BB2D_GCMINORFEATURES1_CORRECT_MIN_MAX_DEPTH_RESETVAL (0x00000001U)
  960. #define CSL_BB2D_GCMINORFEATURES1_CORRECT_MIN_MAX_DEPTH_MAX (0x00000001U)
  961. #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES5_MASK (0x00020000U)
  962. #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES5_SHIFT (17U)
  963. #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES5_RESETVAL (0x00000001U)
  964. #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES5_MAX (0x00000001U)
  965. #define CSL_BB2D_GCMINORFEATURES1_RSUV_SWIZZLE_MASK (0x00000001U)
  966. #define CSL_BB2D_GCMINORFEATURES1_RSUV_SWIZZLE_SHIFT (0U)
  967. #define CSL_BB2D_GCMINORFEATURES1_RSUV_SWIZZLE_RESETVAL (0x00000001U)
  968. #define CSL_BB2D_GCMINORFEATURES1_RSUV_SWIZZLE_MAX (0x00000001U)
  969. #define CSL_BB2D_GCMINORFEATURES1_RESOLVE_OFFSET_MASK (0x04000000U)
  970. #define CSL_BB2D_GCMINORFEATURES1_RESOLVE_OFFSET_SHIFT (26U)
  971. #define CSL_BB2D_GCMINORFEATURES1_RESOLVE_OFFSET_RESETVAL (0x00000001U)
  972. #define CSL_BB2D_GCMINORFEATURES1_RESOLVE_OFFSET_MAX (0x00000001U)
  973. #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES2_MASK (0x00000010U)
  974. #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES2_SHIFT (4U)
  975. #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES2_RESETVAL (0x00000001U)
  976. #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES2_MAX (0x00000001U)
  977. #define CSL_BB2D_GCMINORFEATURES1_HALTI0_MASK (0x00800000U)
  978. #define CSL_BB2D_GCMINORFEATURES1_HALTI0_SHIFT (23U)
  979. #define CSL_BB2D_GCMINORFEATURES1_HALTI0_RESETVAL (0x00000000U)
  980. #define CSL_BB2D_GCMINORFEATURES1_HALTI0_MAX (0x00000001U)
  981. #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES3_MASK (0x00000040U)
  982. #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES3_SHIFT (6U)
  983. #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES3_RESETVAL (0x00000001U)
  984. #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES3_MAX (0x00000001U)
  985. #define CSL_BB2D_GCMINORFEATURES1_NEW_FLOATING_POINT_ARITHMETIC_MASK (0x00080000U)
  986. #define CSL_BB2D_GCMINORFEATURES1_NEW_FLOATING_POINT_ARITHMETIC_SHIFT (19U)
  987. #define CSL_BB2D_GCMINORFEATURES1_NEW_FLOATING_POINT_ARITHMETIC_RESETVAL (0x00000001U)
  988. #define CSL_BB2D_GCMINORFEATURES1_NEW_FLOATING_POINT_ARITHMETIC_MAX (0x00000001U)
  989. #define CSL_BB2D_GCMINORFEATURES1_TEXTURE_STRIDE_MASK (0x00000020U)
  990. #define CSL_BB2D_GCMINORFEATURES1_TEXTURE_STRIDE_SHIFT (5U)
  991. #define CSL_BB2D_GCMINORFEATURES1_TEXTURE_STRIDE_RESETVAL (0x00000000U)
  992. #define CSL_BB2D_GCMINORFEATURES1_TEXTURE_STRIDE_MAX (0x00000001U)
  993. #define CSL_BB2D_GCMINORFEATURES1_NEW_2D_MASK (0x00040000U)
  994. #define CSL_BB2D_GCMINORFEATURES1_NEW_2D_SHIFT (18U)
  995. #define CSL_BB2D_GCMINORFEATURES1_NEW_2D_RESETVAL (0x00000001U)
  996. #define CSL_BB2D_GCMINORFEATURES1_NEW_2D_MAX (0x00000001U)
  997. #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES4_MASK (0x00000200U)
  998. #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES4_SHIFT (9U)
  999. #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES4_RESETVAL (0x00000001U)
  1000. #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES4_MAX (0x00000001U)
  1001. #define CSL_BB2D_GCMINORFEATURES1_MMU_MASK (0x10000000U)
  1002. #define CSL_BB2D_GCMINORFEATURES1_MMU_SHIFT (28U)
  1003. #define CSL_BB2D_GCMINORFEATURES1_MMU_RESETVAL (0x00000001U)
  1004. #define CSL_BB2D_GCMINORFEATURES1_MMU_MAX (0x00000001U)
  1005. #define CSL_BB2D_GCMINORFEATURES1_OK_TO_GATE_AXI_CLOCK_MASK (0x08000000U)
  1006. #define CSL_BB2D_GCMINORFEATURES1_OK_TO_GATE_AXI_CLOCK_SHIFT (27U)
  1007. #define CSL_BB2D_GCMINORFEATURES1_OK_TO_GATE_AXI_CLOCK_RESETVAL (0x00000001U)
  1008. #define CSL_BB2D_GCMINORFEATURES1_OK_TO_GATE_AXI_CLOCK_MAX (0x00000001U)
  1009. #define CSL_BB2D_GCMINORFEATURES1_NON_POWER_OF_TWO_MASK (0x00200000U)
  1010. #define CSL_BB2D_GCMINORFEATURES1_NON_POWER_OF_TWO_SHIFT (21U)
  1011. #define CSL_BB2D_GCMINORFEATURES1_NON_POWER_OF_TWO_RESETVAL (0x00000000U)
  1012. #define CSL_BB2D_GCMINORFEATURES1_NON_POWER_OF_TWO_MAX (0x00000001U)
  1013. #define CSL_BB2D_GCMINORFEATURES1_EXTENDED_PIXEL_FORMAT_MASK (0x00004000U)
  1014. #define CSL_BB2D_GCMINORFEATURES1_EXTENDED_PIXEL_FORMAT_SHIFT (14U)
  1015. #define CSL_BB2D_GCMINORFEATURES1_EXTENDED_PIXEL_FORMAT_RESETVAL (0x00000000U)
  1016. #define CSL_BB2D_GCMINORFEATURES1_EXTENDED_PIXEL_FORMAT_MAX (0x00000001U)
  1017. #define CSL_BB2D_GCMINORFEATURES1_TEXTURE_HORIZONTAL_ALIGNMENT_SELECT_MASK (0x00100000U)
  1018. #define CSL_BB2D_GCMINORFEATURES1_TEXTURE_HORIZONTAL_ALIGNMENT_SELECT_SHIFT (20U)
  1019. #define CSL_BB2D_GCMINORFEATURES1_TEXTURE_HORIZONTAL_ALIGNMENT_SELECT_RESETVAL (0x00000001U)
  1020. #define CSL_BB2D_GCMINORFEATURES1_TEXTURE_HORIZONTAL_ALIGNMENT_SELECT_MAX (0x00000001U)
  1021. #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES1_MASK (0x00000008U)
  1022. #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES1_SHIFT (3U)
  1023. #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES1_RESETVAL (0x00000001U)
  1024. #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES1_MAX (0x00000001U)
  1025. #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES6_MASK (0x40000000U)
  1026. #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES6_SHIFT (30U)
  1027. #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES6_RESETVAL (0x00000001U)
  1028. #define CSL_BB2D_GCMINORFEATURES1_BUG_FIXES6_MAX (0x00000001U)
  1029. #define CSL_BB2D_GCMINORFEATURES1_V2_COMPRESSION_MASK (0x00000002U)
  1030. #define CSL_BB2D_GCMINORFEATURES1_V2_COMPRESSION_SHIFT (1U)
  1031. #define CSL_BB2D_GCMINORFEATURES1_V2_COMPRESSION_RESETVAL (0x00000001U)
  1032. #define CSL_BB2D_GCMINORFEATURES1_V2_COMPRESSION_MAX (0x00000001U)
  1033. #define CSL_BB2D_GCMINORFEATURES1_L2_WINDOWING_MASK (0x00000400U)
  1034. #define CSL_BB2D_GCMINORFEATURES1_L2_WINDOWING_SHIFT (10U)
  1035. #define CSL_BB2D_GCMINORFEATURES1_L2_WINDOWING_RESETVAL (0x00000000U)
  1036. #define CSL_BB2D_GCMINORFEATURES1_L2_WINDOWING_MAX (0x00000001U)
  1037. #define CSL_BB2D_GCMINORFEATURES1_HALF_FLOAT_PIPE_MASK (0x00000800U)
  1038. #define CSL_BB2D_GCMINORFEATURES1_HALF_FLOAT_PIPE_SHIFT (11U)
  1039. #define CSL_BB2D_GCMINORFEATURES1_HALF_FLOAT_PIPE_RESETVAL (0x00000000U)
  1040. #define CSL_BB2D_GCMINORFEATURES1_HALF_FLOAT_PIPE_MAX (0x00000001U)
  1041. #define CSL_BB2D_GCMINORFEATURES1_WIDE_LINE_MASK (0x20000000U)
  1042. #define CSL_BB2D_GCMINORFEATURES1_WIDE_LINE_SHIFT (29U)
  1043. #define CSL_BB2D_GCMINORFEATURES1_WIDE_LINE_RESETVAL (0x00000001U)
  1044. #define CSL_BB2D_GCMINORFEATURES1_WIDE_LINE_MAX (0x00000001U)
  1045. #define CSL_BB2D_GCMINORFEATURES1_CORRECT_AUTO_DISABLE_MASK (0x00000080U)
  1046. #define CSL_BB2D_GCMINORFEATURES1_CORRECT_AUTO_DISABLE_SHIFT (7U)
  1047. #define CSL_BB2D_GCMINORFEATURES1_CORRECT_AUTO_DISABLE_RESETVAL (0x00000001U)
  1048. #define CSL_BB2D_GCMINORFEATURES1_CORRECT_AUTO_DISABLE_MAX (0x00000001U)
  1049. #define CSL_BB2D_GCMINORFEATURES1_NEGATIVE_LOG_FIX_MASK (0x02000000U)
  1050. #define CSL_BB2D_GCMINORFEATURES1_NEGATIVE_LOG_FIX_SHIFT (25U)
  1051. #define CSL_BB2D_GCMINORFEATURES1_NEGATIVE_LOG_FIX_RESETVAL (0x00000001U)
  1052. #define CSL_BB2D_GCMINORFEATURES1_NEGATIVE_LOG_FIX_MAX (0x00000001U)
  1053. #define CSL_BB2D_GCMINORFEATURES1_RESETVAL (0xfe1fb2dbU)
  1054. /* GCTOTALCYCLES */
  1055. #define CSL_BB2D_GCTOTALCYCLES_CYCLES_MASK (0xFFFFFFFFU)
  1056. #define CSL_BB2D_GCTOTALCYCLES_CYCLES_SHIFT (0U)
  1057. #define CSL_BB2D_GCTOTALCYCLES_CYCLES_RESETVAL (0x00001de2U)
  1058. #define CSL_BB2D_GCTOTALCYCLES_CYCLES_MAX (0xffffffffU)
  1059. #define CSL_BB2D_GCTOTALCYCLES_RESETVAL (0x00001de2U)
  1060. /* GCTOTALIDLECYCLES */
  1061. #define CSL_BB2D_GCTOTALIDLECYCLES_CYCLES_MASK (0xFFFFFFFFU)
  1062. #define CSL_BB2D_GCTOTALIDLECYCLES_CYCLES_SHIFT (0U)
  1063. #define CSL_BB2D_GCTOTALIDLECYCLES_CYCLES_RESETVAL (0x00001e08U)
  1064. #define CSL_BB2D_GCTOTALIDLECYCLES_CYCLES_MAX (0xffffffffU)
  1065. #define CSL_BB2D_GCTOTALIDLECYCLES_RESETVAL (0x00001e08U)
  1066. /* GCCHIPSPECS2 */
  1067. #define CSL_BB2D_GCCHIPSPECS2_NUMBER_OF_CONSTANTS_MASK (0xFFFF0000U)
  1068. #define CSL_BB2D_GCCHIPSPECS2_NUMBER_OF_CONSTANTS_SHIFT (16U)
  1069. #define CSL_BB2D_GCCHIPSPECS2_NUMBER_OF_CONSTANTS_RESETVAL (0x00000000U)
  1070. #define CSL_BB2D_GCCHIPSPECS2_NUMBER_OF_CONSTANTS_MAX (0x0000ffffU)
  1071. #define CSL_BB2D_GCCHIPSPECS2_INSTRUCTION_COUNT_MASK (0x0000FF00U)
  1072. #define CSL_BB2D_GCCHIPSPECS2_INSTRUCTION_COUNT_SHIFT (8U)
  1073. #define CSL_BB2D_GCCHIPSPECS2_INSTRUCTION_COUNT_RESETVAL (0x00000000U)
  1074. #define CSL_BB2D_GCCHIPSPECS2_INSTRUCTION_COUNT_MAX (0x000000ffU)
  1075. #define CSL_BB2D_GCCHIPSPECS2_BUFFER_SIZE_MASK (0x000000FFU)
  1076. #define CSL_BB2D_GCCHIPSPECS2_BUFFER_SIZE_SHIFT (0U)
  1077. #define CSL_BB2D_GCCHIPSPECS2_BUFFER_SIZE_RESETVAL (0x00000000U)
  1078. #define CSL_BB2D_GCCHIPSPECS2_BUFFER_SIZE_MAX (0x000000ffU)
  1079. #define CSL_BB2D_GCCHIPSPECS2_RESETVAL (0x00000000U)
  1080. /* GCMINORFEATURES2 */
  1081. #define CSL_BB2D_GCMINORFEATURES2_BUG_FIXES8_MASK (0x80000000U)
  1082. #define CSL_BB2D_GCMINORFEATURES2_BUG_FIXES8_SHIFT (31U)
  1083. #define CSL_BB2D_GCMINORFEATURES2_BUG_FIXES8_RESETVAL (0x00000001U)
  1084. #define CSL_BB2D_GCMINORFEATURES2_BUG_FIXES8_MAX (0x00000001U)
  1085. #define CSL_BB2D_GCMINORFEATURES2_END_EVENT_MASK (0x00000200U)
  1086. #define CSL_BB2D_GCMINORFEATURES2_END_EVENT_SHIFT (9U)
  1087. #define CSL_BB2D_GCMINORFEATURES2_END_EVENT_RESETVAL (0x00000000U)
  1088. #define CSL_BB2D_GCMINORFEATURES2_END_EVENT_MAX (0x00000001U)
  1089. #define CSL_BB2D_GCMINORFEATURES2_INTERLEAVER_MASK (0x01000000U)
  1090. #define CSL_BB2D_GCMINORFEATURES2_INTERLEAVER_SHIFT (24U)
  1091. #define CSL_BB2D_GCMINORFEATURES2_INTERLEAVER_RESETVAL (0x00000000U)
  1092. #define CSL_BB2D_GCMINORFEATURES2_INTERLEAVER_MAX (0x00000001U)
  1093. #define CSL_BB2D_GCMINORFEATURES2_PE_SWIZZLE_MASK (0x00000100U)
  1094. #define CSL_BB2D_GCMINORFEATURES2_PE_SWIZZLE_SHIFT (8U)
  1095. #define CSL_BB2D_GCMINORFEATURES2_PE_SWIZZLE_RESETVAL (0x00000000U)
  1096. #define CSL_BB2D_GCMINORFEATURES2_PE_SWIZZLE_MAX (0x00000001U)
  1097. #define CSL_BB2D_GCMINORFEATURES2_MIXED_STREAMS_MASK (0x02000000U)
  1098. #define CSL_BB2D_GCMINORFEATURES2_MIXED_STREAMS_SHIFT (25U)
  1099. #define CSL_BB2D_GCMINORFEATURES2_MIXED_STREAMS_RESETVAL (0x00000001U)
  1100. #define CSL_BB2D_GCMINORFEATURES2_MIXED_STREAMS_MAX (0x00000001U)
  1101. #define CSL_BB2D_GCMINORFEATURES2_FLUSH_FIXED_2D_MASK (0x00800000U)
  1102. #define CSL_BB2D_GCMINORFEATURES2_FLUSH_FIXED_2D_SHIFT (23U)
  1103. #define CSL_BB2D_GCMINORFEATURES2_FLUSH_FIXED_2D_RESETVAL (0x00000001U)
  1104. #define CSL_BB2D_GCMINORFEATURES2_FLUSH_FIXED_2D_MAX (0x00000001U)
  1105. #define CSL_BB2D_GCMINORFEATURES2_TX_YUV_ASSEMBLER_MASK (0x00002000U)
  1106. #define CSL_BB2D_GCMINORFEATURES2_TX_YUV_ASSEMBLER_SHIFT (13U)
  1107. #define CSL_BB2D_GCMINORFEATURES2_TX_YUV_ASSEMBLER_RESETVAL (0x00000000U)
  1108. #define CSL_BB2D_GCMINORFEATURES2_TX_YUV_ASSEMBLER_MAX (0x00000001U)
  1109. #define CSL_BB2D_GCMINORFEATURES2_ONE_PASS_2D_FILTER_MASK (0x00020000U)
  1110. #define CSL_BB2D_GCMINORFEATURES2_ONE_PASS_2D_FILTER_SHIFT (17U)
  1111. #define CSL_BB2D_GCMINORFEATURES2_ONE_PASS_2D_FILTER_RESETVAL (0x00000001U)
  1112. #define CSL_BB2D_GCMINORFEATURES2_ONE_PASS_2D_FILTER_MAX (0x00000001U)
  1113. #define CSL_BB2D_GCMINORFEATURES2_SUPER_TILED_TEXTURE_MASK (0x00000008U)
  1114. #define CSL_BB2D_GCMINORFEATURES2_SUPER_TILED_TEXTURE_SHIFT (3U)
  1115. #define CSL_BB2D_GCMINORFEATURES2_SUPER_TILED_TEXTURE_RESETVAL (0x00000000U)
  1116. #define CSL_BB2D_GCMINORFEATURES2_SUPER_TILED_TEXTURE_MAX (0x00000001U)
  1117. #define CSL_BB2D_GCMINORFEATURES2_HALTI1_MASK (0x00000800U)
  1118. #define CSL_BB2D_GCMINORFEATURES2_HALTI1_SHIFT (11U)
  1119. #define CSL_BB2D_GCMINORFEATURES2_HALTI1_RESETVAL (0x00000000U)
  1120. #define CSL_BB2D_GCMINORFEATURES2_HALTI1_MAX (0x00000001U)
  1121. #define CSL_BB2D_GCMINORFEATURES2_S1S8_MASK (0x00000400U)
  1122. #define CSL_BB2D_GCMINORFEATURES2_S1S8_SHIFT (10U)
  1123. #define CSL_BB2D_GCMINORFEATURES2_S1S8_RESETVAL (0x00000000U)
  1124. #define CSL_BB2D_GCMINORFEATURES2_S1S8_MAX (0x00000001U)
  1125. #define CSL_BB2D_GCMINORFEATURES2_SEAMLESS_CUBE_MAP_MASK (0x00000004U)
  1126. #define CSL_BB2D_GCMINORFEATURES2_SEAMLESS_CUBE_MAP_SHIFT (2U)
  1127. #define CSL_BB2D_GCMINORFEATURES2_SEAMLESS_CUBE_MAP_RESETVAL (0x00000000U)
  1128. #define CSL_BB2D_GCMINORFEATURES2_SEAMLESS_CUBE_MAP_MAX (0x00000001U)
  1129. #define CSL_BB2D_GCMINORFEATURES2_RGB888_MASK (0x00001000U)
  1130. #define CSL_BB2D_GCMINORFEATURES2_RGB888_SHIFT (12U)
  1131. #define CSL_BB2D_GCMINORFEATURES2_RGB888_RESETVAL (0x00000000U)
  1132. #define CSL_BB2D_GCMINORFEATURES2_RGB888_MAX (0x00000001U)
  1133. #define CSL_BB2D_GCMINORFEATURES2_CORRECT_AUTO_DISABLE_COUNT_WIDTH_MASK (0x00000080U)
  1134. #define CSL_BB2D_GCMINORFEATURES2_CORRECT_AUTO_DISABLE_COUNT_WIDTH_SHIFT (7U)
  1135. #define CSL_BB2D_GCMINORFEATURES2_CORRECT_AUTO_DISABLE_COUNT_WIDTH_RESETVAL (0x00000001U)
  1136. #define CSL_BB2D_GCMINORFEATURES2_CORRECT_AUTO_DISABLE_COUNT_WIDTH_MAX (0x00000001U)
  1137. #define CSL_BB2D_GCMINORFEATURES2_TILE_FILLER_MASK (0x00080000U)
  1138. #define CSL_BB2D_GCMINORFEATURES2_TILE_FILLER_SHIFT (19U)
  1139. #define CSL_BB2D_GCMINORFEATURES2_TILE_FILLER_RESETVAL (0x00000001U)
  1140. #define CSL_BB2D_GCMINORFEATURES2_TILE_FILLER_MAX (0x00000001U)
  1141. #define CSL_BB2D_GCMINORFEATURES2_NO_INDEX_PATTERN_MASK (0x10000000U)
  1142. #define CSL_BB2D_GCMINORFEATURES2_NO_INDEX_PATTERN_SHIFT (28U)
  1143. #define CSL_BB2D_GCMINORFEATURES2_NO_INDEX_PATTERN_RESETVAL (0x00000001U)
  1144. #define CSL_BB2D_GCMINORFEATURES2_NO_INDEX_PATTERN_MAX (0x00000001U)
  1145. #define CSL_BB2D_GCMINORFEATURES2_TEXTURE_TILE_STATUS_MASK (0x20000000U)
  1146. #define CSL_BB2D_GCMINORFEATURES2_TEXTURE_TILE_STATUS_SHIFT (29U)
  1147. #define CSL_BB2D_GCMINORFEATURES2_TEXTURE_TILE_STATUS_RESETVAL (0x00000000U)
  1148. #define CSL_BB2D_GCMINORFEATURES2_TEXTURE_TILE_STATUS_MAX (0x00000001U)
  1149. #define CSL_BB2D_GCMINORFEATURES2_MULTI_SOURCE_BLT_MASK (0x00200000U)
  1150. #define CSL_BB2D_GCMINORFEATURES2_MULTI_SOURCE_BLT_SHIFT (21U)
  1151. #define CSL_BB2D_GCMINORFEATURES2_MULTI_SOURCE_BLT_RESETVAL (0x00000001U)
  1152. #define CSL_BB2D_GCMINORFEATURES2_MULTI_SOURCE_BLT_MAX (0x00000001U)
  1153. #define CSL_BB2D_GCMINORFEATURES2_TX_FILTER_MASK (0x00008000U)
  1154. #define CSL_BB2D_GCMINORFEATURES2_TX_FILTER_SHIFT (15U)
  1155. #define CSL_BB2D_GCMINORFEATURES2_TX_FILTER_RESETVAL (0x00000000U)
  1156. #define CSL_BB2D_GCMINORFEATURES2_TX_FILTER_MAX (0x00000001U)
  1157. #define CSL_BB2D_GCMINORFEATURES2_THREAD_WALKER_IN_PS_MASK (0x00040000U)
  1158. #define CSL_BB2D_GCMINORFEATURES2_THREAD_WALKER_IN_PS_SHIFT (18U)
  1159. #define CSL_BB2D_GCMINORFEATURES2_THREAD_WALKER_IN_PS_RESETVAL (0x00000001U)
  1160. #define CSL_BB2D_GCMINORFEATURES2_THREAD_WALKER_IN_PS_MAX (0x00000001U)
  1161. #define CSL_BB2D_GCMINORFEATURES2_LINEAR_PE_MASK (0x00000010U)
  1162. #define CSL_BB2D_GCMINORFEATURES2_LINEAR_PE_SHIFT (4U)
  1163. #define CSL_BB2D_GCMINORFEATURES2_LINEAR_PE_RESETVAL (0x00000000U)
  1164. #define CSL_BB2D_GCMINORFEATURES2_LINEAR_PE_MAX (0x00000001U)
  1165. #define CSL_BB2D_GCMINORFEATURES2_NOT_USED_MASK (0x04000000U)
  1166. #define CSL_BB2D_GCMINORFEATURES2_NOT_USED_SHIFT (26U)
  1167. #define CSL_BB2D_GCMINORFEATURES2_NOT_USED_RESETVAL (0x00000001U)
  1168. #define CSL_BB2D_GCMINORFEATURES2_NOT_USED_MAX (0x00000001U)
  1169. #define CSL_BB2D_GCMINORFEATURES2_YUV_CONVERSION_MASK (0x00400000U)
  1170. #define CSL_BB2D_GCMINORFEATURES2_YUV_CONVERSION_SHIFT (22U)
  1171. #define CSL_BB2D_GCMINORFEATURES2_YUV_CONVERSION_RESETVAL (0x00000001U)
  1172. #define CSL_BB2D_GCMINORFEATURES2_YUV_CONVERSION_MAX (0x00000001U)
  1173. #define CSL_BB2D_GCMINORFEATURES2_RECT_PRIMITIVE_MASK (0x00000020U)
  1174. #define CSL_BB2D_GCMINORFEATURES2_RECT_PRIMITIVE_SHIFT (5U)
  1175. #define CSL_BB2D_GCMINORFEATURES2_RECT_PRIMITIVE_RESETVAL (0x00000000U)
  1176. #define CSL_BB2D_GCMINORFEATURES2_RECT_PRIMITIVE_MAX (0x00000001U)
  1177. #define CSL_BB2D_GCMINORFEATURES2_YUV_STANDARD_MASK (0x00100000U)
  1178. #define CSL_BB2D_GCMINORFEATURES2_YUV_STANDARD_SHIFT (20U)
  1179. #define CSL_BB2D_GCMINORFEATURES2_YUV_STANDARD_RESETVAL (0x00000001U)
  1180. #define CSL_BB2D_GCMINORFEATURES2_YUV_STANDARD_MAX (0x00000001U)
  1181. #define CSL_BB2D_GCMINORFEATURES2_LINE_LOOP_MASK (0x00000001U)
  1182. #define CSL_BB2D_GCMINORFEATURES2_LINE_LOOP_SHIFT (0U)
  1183. #define CSL_BB2D_GCMINORFEATURES2_LINE_LOOP_RESETVAL (0x00000000U)
  1184. #define CSL_BB2D_GCMINORFEATURES2_LINE_LOOP_MAX (0x00000001U)
  1185. #define CSL_BB2D_GCMINORFEATURES2_DYNAMIC_FREQUENCY_SCALING_MASK (0x00004000U)
  1186. #define CSL_BB2D_GCMINORFEATURES2_DYNAMIC_FREQUENCY_SCALING_SHIFT (14U)
  1187. #define CSL_BB2D_GCMINORFEATURES2_DYNAMIC_FREQUENCY_SCALING_RESETVAL (0x00000000U)
  1188. #define CSL_BB2D_GCMINORFEATURES2_DYNAMIC_FREQUENCY_SCALING_MAX (0x00000001U)
  1189. #define CSL_BB2D_GCMINORFEATURES2_COMPOSITION_MASK (0x00000040U)
  1190. #define CSL_BB2D_GCMINORFEATURES2_COMPOSITION_SHIFT (6U)
  1191. #define CSL_BB2D_GCMINORFEATURES2_COMPOSITION_RESETVAL (0x00000000U)
  1192. #define CSL_BB2D_GCMINORFEATURES2_COMPOSITION_MAX (0x00000001U)
  1193. #define CSL_BB2D_GCMINORFEATURES2_FULL_DIRECT_FB_MASK (0x00010000U)
  1194. #define CSL_BB2D_GCMINORFEATURES2_FULL_DIRECT_FB_SHIFT (16U)
  1195. #define CSL_BB2D_GCMINORFEATURES2_FULL_DIRECT_FB_RESETVAL (0x00000001U)
  1196. #define CSL_BB2D_GCMINORFEATURES2_FULL_DIRECT_FB_MAX (0x00000001U)
  1197. #define CSL_BB2D_GCMINORFEATURES2_DECOMPRESS_Z16_MASK (0x40000000U)
  1198. #define CSL_BB2D_GCMINORFEATURES2_DECOMPRESS_Z16_SHIFT (30U)
  1199. #define CSL_BB2D_GCMINORFEATURES2_DECOMPRESS_Z16_RESETVAL (0x00000001U)
  1200. #define CSL_BB2D_GCMINORFEATURES2_DECOMPRESS_Z16_MAX (0x00000001U)
  1201. #define CSL_BB2D_GCMINORFEATURES2_LOGIC_OP_MASK (0x00000002U)
  1202. #define CSL_BB2D_GCMINORFEATURES2_LOGIC_OP_SHIFT (1U)
  1203. #define CSL_BB2D_GCMINORFEATURES2_LOGIC_OP_RESETVAL (0x00000000U)
  1204. #define CSL_BB2D_GCMINORFEATURES2_LOGIC_OP_MAX (0x00000001U)
  1205. #define CSL_BB2D_GCMINORFEATURES2_RESETVAL (0xdeff0080U)
  1206. /* GCMODULEPOWERCONTROLS */
  1207. #define CSL_BB2D_GCMODULEPOWERCONTROLS_TURN_OFF_COUNTER_MASK (0xFFFF0000U)
  1208. #define CSL_BB2D_GCMODULEPOWERCONTROLS_TURN_OFF_COUNTER_SHIFT (16U)
  1209. #define CSL_BB2D_GCMODULEPOWERCONTROLS_TURN_OFF_COUNTER_RESETVAL (0x00000014U)
  1210. #define CSL_BB2D_GCMODULEPOWERCONTROLS_TURN_OFF_COUNTER_MAX (0x0000ffffU)
  1211. #define CSL_BB2D_GCMODULEPOWERCONTROLS_TURN_ON_COUNTER_MASK (0x000000F0U)
  1212. #define CSL_BB2D_GCMODULEPOWERCONTROLS_TURN_ON_COUNTER_SHIFT (4U)
  1213. #define CSL_BB2D_GCMODULEPOWERCONTROLS_TURN_ON_COUNTER_RESETVAL (0x00000002U)
  1214. #define CSL_BB2D_GCMODULEPOWERCONTROLS_TURN_ON_COUNTER_MAX (0x0000000fU)
  1215. #define CSL_BB2D_GCMODULEPOWERCONTROLS_DISABLE_STARVE_MODULE_CLOCK_GATING_MASK (0x00000004U)
  1216. #define CSL_BB2D_GCMODULEPOWERCONTROLS_DISABLE_STARVE_MODULE_CLOCK_GATING_SHIFT (2U)
  1217. #define CSL_BB2D_GCMODULEPOWERCONTROLS_DISABLE_STARVE_MODULE_CLOCK_GATING_RESETVAL (0x00000000U)
  1218. #define CSL_BB2D_GCMODULEPOWERCONTROLS_DISABLE_STARVE_MODULE_CLOCK_GATING_MAX (0x00000001U)
  1219. #define CSL_BB2D_GCMODULEPOWERCONTROLS_DISABLE_STALL_MODULE_CLOCK_GATING_MASK (0x00000002U)
  1220. #define CSL_BB2D_GCMODULEPOWERCONTROLS_DISABLE_STALL_MODULE_CLOCK_GATING_SHIFT (1U)
  1221. #define CSL_BB2D_GCMODULEPOWERCONTROLS_DISABLE_STALL_MODULE_CLOCK_GATING_RESETVAL (0x00000000U)
  1222. #define CSL_BB2D_GCMODULEPOWERCONTROLS_DISABLE_STALL_MODULE_CLOCK_GATING_MAX (0x00000001U)
  1223. #define CSL_BB2D_GCMODULEPOWERCONTROLS_ENABLE_MODULE_CLOCK_GATING_MASK (0x00000001U)
  1224. #define CSL_BB2D_GCMODULEPOWERCONTROLS_ENABLE_MODULE_CLOCK_GATING_SHIFT (0U)
  1225. #define CSL_BB2D_GCMODULEPOWERCONTROLS_ENABLE_MODULE_CLOCK_GATING_RESETVAL (0x00000000U)
  1226. #define CSL_BB2D_GCMODULEPOWERCONTROLS_ENABLE_MODULE_CLOCK_GATING_MAX (0x00000001U)
  1227. #define CSL_BB2D_GCMODULEPOWERCONTROLS_RESETVAL (0x00140020U)
  1228. /* GCMODULEPOWERMODULECONTROL */
  1229. #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_SE_MASK (0x00000020U)
  1230. #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_SE_SHIFT (5U)
  1231. #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_SE_RESETVAL (0x00000000U)
  1232. #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_SE_MAX (0x00000001U)
  1233. #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_PE_MASK (0x00000004U)
  1234. #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_PE_SHIFT (2U)
  1235. #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_PE_RESETVAL (0x00000000U)
  1236. #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_PE_MAX (0x00000001U)
  1237. #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_SH_MASK (0x00000008U)
  1238. #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_SH_SHIFT (3U)
  1239. #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_SH_RESETVAL (0x00000000U)
  1240. #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_SH_MAX (0x00000001U)
  1241. #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_PA_MASK (0x00000010U)
  1242. #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_PA_SHIFT (4U)
  1243. #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_PA_RESETVAL (0x00000000U)
  1244. #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_PA_MAX (0x00000001U)
  1245. #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_TX_MASK (0x00000080U)
  1246. #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_TX_SHIFT (7U)
  1247. #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_TX_RESETVAL (0x00000000U)
  1248. #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_TX_MAX (0x00000001U)
  1249. #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_RA_MASK (0x00000040U)
  1250. #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_RA_SHIFT (6U)
  1251. #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_RA_RESETVAL (0x00000000U)
  1252. #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_RA_MAX (0x00000001U)
  1253. #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_FE_MASK (0x00000001U)
  1254. #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_FE_SHIFT (0U)
  1255. #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_FE_RESETVAL (0x00000000U)
  1256. #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_FE_MAX (0x00000001U)
  1257. #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_DE_MASK (0x00000002U)
  1258. #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_DE_SHIFT (1U)
  1259. #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_DE_RESETVAL (0x00000000U)
  1260. #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_DISABLE_MODULE_CLOCK_GATING_DE_MAX (0x00000001U)
  1261. #define CSL_BB2D_GCMODULEPOWERMODULECONTROL_RESETVAL (0x00000000U)
  1262. /* GCMODULEPOWERMODULESTATUS */
  1263. #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_DE_MASK (0x00000002U)
  1264. #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_DE_SHIFT (1U)
  1265. #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_DE_RESETVAL (0x00000000U)
  1266. #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_DE_MAX (0x00000001U)
  1267. #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_SE_MASK (0x00000020U)
  1268. #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_SE_SHIFT (5U)
  1269. #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_SE_RESETVAL (0x00000000U)
  1270. #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_SE_MAX (0x00000001U)
  1271. #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_SH_MASK (0x00000008U)
  1272. #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_SH_SHIFT (3U)
  1273. #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_SH_RESETVAL (0x00000000U)
  1274. #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_SH_MAX (0x00000001U)
  1275. #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_PE_MASK (0x00000004U)
  1276. #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_PE_SHIFT (2U)
  1277. #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_PE_RESETVAL (0x00000000U)
  1278. #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_PE_MAX (0x00000001U)
  1279. #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_PA_MASK (0x00000010U)
  1280. #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_PA_SHIFT (4U)
  1281. #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_PA_RESETVAL (0x00000000U)
  1282. #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_PA_MAX (0x00000001U)
  1283. #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_RA_MASK (0x00000040U)
  1284. #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_RA_SHIFT (6U)
  1285. #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_RA_RESETVAL (0x00000000U)
  1286. #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_RA_MAX (0x00000001U)
  1287. #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_TX_MASK (0x00000080U)
  1288. #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_TX_SHIFT (7U)
  1289. #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_TX_RESETVAL (0x00000000U)
  1290. #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_TX_MAX (0x00000001U)
  1291. #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_FE_MASK (0x00000001U)
  1292. #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_FE_SHIFT (0U)
  1293. #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_FE_RESETVAL (0x00000000U)
  1294. #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_MODULE_CLOCK_GATED_FE_MAX (0x00000001U)
  1295. #define CSL_BB2D_GCMODULEPOWERMODULESTATUS_RESETVAL (0x00000000U)
  1296. /* GCREGMMUSTATUS */
  1297. #define CSL_BB2D_GCREGMMUSTATUS_NA3_MASK (0xFFFFC000U)
  1298. #define CSL_BB2D_GCREGMMUSTATUS_NA3_SHIFT (14U)
  1299. #define CSL_BB2D_GCREGMMUSTATUS_NA3_RESETVAL (0x00000000U)
  1300. #define CSL_BB2D_GCREGMMUSTATUS_NA3_MAX (0x0003ffffU)
  1301. #define CSL_BB2D_GCREGMMUSTATUS_EXCEPTION0_MASK (0x00000003U)
  1302. #define CSL_BB2D_GCREGMMUSTATUS_EXCEPTION0_SHIFT (0U)
  1303. #define CSL_BB2D_GCREGMMUSTATUS_EXCEPTION0_RESETVAL (0x00000000U)
  1304. #define CSL_BB2D_GCREGMMUSTATUS_EXCEPTION0_MAX (0x00000003U)
  1305. #define CSL_BB2D_GCREGMMUSTATUS_NA2_MASK (0x00000C00U)
  1306. #define CSL_BB2D_GCREGMMUSTATUS_NA2_SHIFT (10U)
  1307. #define CSL_BB2D_GCREGMMUSTATUS_NA2_RESETVAL (0x00000000U)
  1308. #define CSL_BB2D_GCREGMMUSTATUS_NA2_MAX (0x00000003U)
  1309. #define CSL_BB2D_GCREGMMUSTATUS_NA0_MASK (0x0000000CU)
  1310. #define CSL_BB2D_GCREGMMUSTATUS_NA0_SHIFT (2U)
  1311. #define CSL_BB2D_GCREGMMUSTATUS_NA0_RESETVAL (0x00000000U)
  1312. #define CSL_BB2D_GCREGMMUSTATUS_NA0_MAX (0x00000003U)
  1313. #define CSL_BB2D_GCREGMMUSTATUS_EXCEPTION1_MASK (0x00000030U)
  1314. #define CSL_BB2D_GCREGMMUSTATUS_EXCEPTION1_SHIFT (4U)
  1315. #define CSL_BB2D_GCREGMMUSTATUS_EXCEPTION1_RESETVAL (0x00000000U)
  1316. #define CSL_BB2D_GCREGMMUSTATUS_EXCEPTION1_MAX (0x00000003U)
  1317. #define CSL_BB2D_GCREGMMUSTATUS_NA1_MASK (0x000000C0U)
  1318. #define CSL_BB2D_GCREGMMUSTATUS_NA1_SHIFT (6U)
  1319. #define CSL_BB2D_GCREGMMUSTATUS_NA1_RESETVAL (0x00000000U)
  1320. #define CSL_BB2D_GCREGMMUSTATUS_NA1_MAX (0x00000003U)
  1321. #define CSL_BB2D_GCREGMMUSTATUS_EXCEPTION2_MASK (0x00000300U)
  1322. #define CSL_BB2D_GCREGMMUSTATUS_EXCEPTION2_SHIFT (8U)
  1323. #define CSL_BB2D_GCREGMMUSTATUS_EXCEPTION2_RESETVAL (0x00000000U)
  1324. #define CSL_BB2D_GCREGMMUSTATUS_EXCEPTION2_MAX (0x00000003U)
  1325. #define CSL_BB2D_GCREGMMUSTATUS_EXCEPTION3_MASK (0x00003000U)
  1326. #define CSL_BB2D_GCREGMMUSTATUS_EXCEPTION3_SHIFT (12U)
  1327. #define CSL_BB2D_GCREGMMUSTATUS_EXCEPTION3_RESETVAL (0x00000000U)
  1328. #define CSL_BB2D_GCREGMMUSTATUS_EXCEPTION3_MAX (0x00000003U)
  1329. #define CSL_BB2D_GCREGMMUSTATUS_RESETVAL (0x00000000U)
  1330. /* GCREGMMUCONTROL */
  1331. #define CSL_BB2D_GCREGMMUCONTROL_ENABLE_MASK (0x00000001U)
  1332. #define CSL_BB2D_GCREGMMUCONTROL_ENABLE_SHIFT (0U)
  1333. #define CSL_BB2D_GCREGMMUCONTROL_ENABLE_RESETVAL (0x00000000U)
  1334. #define CSL_BB2D_GCREGMMUCONTROL_ENABLE_MAX (0x00000001U)
  1335. #define CSL_BB2D_GCREGMMUCONTROL_NA_MASK (0xFFFFFFFEU)
  1336. #define CSL_BB2D_GCREGMMUCONTROL_NA_SHIFT (1U)
  1337. #define CSL_BB2D_GCREGMMUCONTROL_NA_RESETVAL (0x00000000U)
  1338. #define CSL_BB2D_GCREGMMUCONTROL_NA_MAX (0x7fffffffU)
  1339. #define CSL_BB2D_GCREGMMUCONTROL_RESETVAL (0x00000000U)
  1340. /* GCREGMMUEXCEPTION0 */
  1341. #define CSL_BB2D_GCREGMMUEXCEPTION0_ADDRESS_MASK (0xFFFFFFFFU)
  1342. #define CSL_BB2D_GCREGMMUEXCEPTION0_ADDRESS_SHIFT (0U)
  1343. #define CSL_BB2D_GCREGMMUEXCEPTION0_ADDRESS_RESETVAL (0x00000000U)
  1344. #define CSL_BB2D_GCREGMMUEXCEPTION0_ADDRESS_MAX (0xffffffffU)
  1345. #define CSL_BB2D_GCREGMMUEXCEPTION0_RESETVAL (0x00000000U)
  1346. /* GCREGMMUEXCEPTION1 */
  1347. #define CSL_BB2D_GCREGMMUEXCEPTION1_ADDRESS_MASK (0xFFFFFFFFU)
  1348. #define CSL_BB2D_GCREGMMUEXCEPTION1_ADDRESS_SHIFT (0U)
  1349. #define CSL_BB2D_GCREGMMUEXCEPTION1_ADDRESS_RESETVAL (0x00000000U)
  1350. #define CSL_BB2D_GCREGMMUEXCEPTION1_ADDRESS_MAX (0xffffffffU)
  1351. #define CSL_BB2D_GCREGMMUEXCEPTION1_RESETVAL (0x00000000U)
  1352. /* GCREGMMUEXCEPTION2 */
  1353. #define CSL_BB2D_GCREGMMUEXCEPTION2_ADDRESS_MASK (0xFFFFFFFFU)
  1354. #define CSL_BB2D_GCREGMMUEXCEPTION2_ADDRESS_SHIFT (0U)
  1355. #define CSL_BB2D_GCREGMMUEXCEPTION2_ADDRESS_RESETVAL (0x00000000U)
  1356. #define CSL_BB2D_GCREGMMUEXCEPTION2_ADDRESS_MAX (0xffffffffU)
  1357. #define CSL_BB2D_GCREGMMUEXCEPTION2_RESETVAL (0x00000000U)
  1358. /* GCREGMMUEXCEPTION3 */
  1359. #define CSL_BB2D_GCREGMMUEXCEPTION3_ADDRESS_MASK (0xFFFFFFFFU)
  1360. #define CSL_BB2D_GCREGMMUEXCEPTION3_ADDRESS_SHIFT (0U)
  1361. #define CSL_BB2D_GCREGMMUEXCEPTION3_ADDRESS_RESETVAL (0x00000000U)
  1362. #define CSL_BB2D_GCREGMMUEXCEPTION3_ADDRESS_MAX (0xffffffffU)
  1363. #define CSL_BB2D_GCREGMMUEXCEPTION3_RESETVAL (0x00000000U)
  1364. /* AQMEMORYDEBUG */
  1365. #define CSL_BB2D_AQMEMORYDEBUG_ZCOMP_LIMIT_MASK (0x3F000000U)
  1366. #define CSL_BB2D_AQMEMORYDEBUG_ZCOMP_LIMIT_SHIFT (24U)
  1367. #define CSL_BB2D_AQMEMORYDEBUG_ZCOMP_LIMIT_RESETVAL (0x0000003cU)
  1368. #define CSL_BB2D_AQMEMORYDEBUG_ZCOMP_LIMIT_MAX (0x0000003fU)
  1369. #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_WRITE_DATA_SPEEDUP_MASK (0x00800000U)
  1370. #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_WRITE_DATA_SPEEDUP_SHIFT (23U)
  1371. #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_WRITE_DATA_SPEEDUP_RESETVAL (0x00000000U)
  1372. #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_WRITE_DATA_SPEEDUP_MAX (0x00000001U)
  1373. #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_ZCOMPRESSION_MASK (0x00200000U)
  1374. #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_ZCOMPRESSION_SHIFT (21U)
  1375. #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_ZCOMPRESSION_RESETVAL (0x00000000U)
  1376. #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_ZCOMPRESSION_MAX (0x00000001U)
  1377. #define CSL_BB2D_AQMEMORYDEBUG_INTERLEAVE_BUFFER_LOW_LATENCY_MODE_MASK (0x00020000U)
  1378. #define CSL_BB2D_AQMEMORYDEBUG_INTERLEAVE_BUFFER_LOW_LATENCY_MODE_SHIFT (17U)
  1379. #define CSL_BB2D_AQMEMORYDEBUG_INTERLEAVE_BUFFER_LOW_LATENCY_MODE_RESETVAL (0x00000000U)
  1380. #define CSL_BB2D_AQMEMORYDEBUG_INTERLEAVE_BUFFER_LOW_LATENCY_MODE_MAX (0x00000001U)
  1381. #define CSL_BB2D_AQMEMORYDEBUG_DONT_STALL_WRITES_TO_SAME_ADDRESS_MASK (0x40000000U)
  1382. #define CSL_BB2D_AQMEMORYDEBUG_DONT_STALL_WRITES_TO_SAME_ADDRESS_SHIFT (30U)
  1383. #define CSL_BB2D_AQMEMORYDEBUG_DONT_STALL_WRITES_TO_SAME_ADDRESS_RESETVAL (0x00000000U)
  1384. #define CSL_BB2D_AQMEMORYDEBUG_DONT_STALL_WRITES_TO_SAME_ADDRESS_MAX (0x00000001U)
  1385. #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_MINI_MMU_CACHE_MASK (0x00004000U)
  1386. #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_MINI_MMU_CACHE_SHIFT (14U)
  1387. #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_MINI_MMU_CACHE_RESETVAL (0x00000000U)
  1388. #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_MINI_MMU_CACHE_MAX (0x00000001U)
  1389. #define CSL_BB2D_AQMEMORYDEBUG_MAX_OUTSTANDING_READS_MASK (0x000000FFU)
  1390. #define CSL_BB2D_AQMEMORYDEBUG_MAX_OUTSTANDING_READS_SHIFT (0U)
  1391. #define CSL_BB2D_AQMEMORYDEBUG_MAX_OUTSTANDING_READS_RESETVAL (0x00000000U)
  1392. #define CSL_BB2D_AQMEMORYDEBUG_MAX_OUTSTANDING_READS_MAX (0x000000ffU)
  1393. #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_STALL_READS_MASK (0x00400000U)
  1394. #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_STALL_READS_SHIFT (22U)
  1395. #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_STALL_READS_RESETVAL (0x00000000U)
  1396. #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_STALL_READS_MAX (0x00000001U)
  1397. #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_FAST_CLEAR_MASK (0x00100000U)
  1398. #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_FAST_CLEAR_SHIFT (20U)
  1399. #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_FAST_CLEAR_RESETVAL (0x00000000U)
  1400. #define CSL_BB2D_AQMEMORYDEBUG_DISABLE_FAST_CLEAR_MAX (0x00000001U)
  1401. #define CSL_BB2D_AQMEMORYDEBUG_LIMIT_CONTROL_MASK (0x00080000U)
  1402. #define CSL_BB2D_AQMEMORYDEBUG_LIMIT_CONTROL_SHIFT (19U)
  1403. #define CSL_BB2D_AQMEMORYDEBUG_LIMIT_CONTROL_RESETVAL (0x00000000U)
  1404. #define CSL_BB2D_AQMEMORYDEBUG_LIMIT_CONTROL_MAX (0x00000001U)
  1405. #define CSL_BB2D_AQMEMORYDEBUG_RESETVAL (0x3c000000U)
  1406. /* AQREGISTERTIMINGCONTROL */
  1407. #define CSL_BB2D_AQREGISTERTIMINGCONTROL_FAST_RTC_MASK (0x00030000U)
  1408. #define CSL_BB2D_AQREGISTERTIMINGCONTROL_FAST_RTC_SHIFT (16U)
  1409. #define CSL_BB2D_AQREGISTERTIMINGCONTROL_FAST_RTC_RESETVAL (0x00000003U)
  1410. #define CSL_BB2D_AQREGISTERTIMINGCONTROL_FAST_RTC_MAX (0x00000003U)
  1411. #define CSL_BB2D_AQREGISTERTIMINGCONTROL_FAST_WTC_MASK (0x000C0000U)
  1412. #define CSL_BB2D_AQREGISTERTIMINGCONTROL_FAST_WTC_SHIFT (18U)
  1413. #define CSL_BB2D_AQREGISTERTIMINGCONTROL_FAST_WTC_RESETVAL (0x00000000U)
  1414. #define CSL_BB2D_AQREGISTERTIMINGCONTROL_FAST_WTC_MAX (0x00000003U)
  1415. #define CSL_BB2D_AQREGISTERTIMINGCONTROL_FOR_RF2P_MASK (0x0000FF00U)
  1416. #define CSL_BB2D_AQREGISTERTIMINGCONTROL_FOR_RF2P_SHIFT (8U)
  1417. #define CSL_BB2D_AQREGISTERTIMINGCONTROL_FOR_RF2P_RESETVAL (0x00000000U)
  1418. #define CSL_BB2D_AQREGISTERTIMINGCONTROL_FOR_RF2P_MAX (0x000000ffU)
  1419. #define CSL_BB2D_AQREGISTERTIMINGCONTROL_FOR_RF1P_MASK (0x000000FFU)
  1420. #define CSL_BB2D_AQREGISTERTIMINGCONTROL_FOR_RF1P_SHIFT (0U)
  1421. #define CSL_BB2D_AQREGISTERTIMINGCONTROL_FOR_RF1P_RESETVAL (0x00000000U)
  1422. #define CSL_BB2D_AQREGISTERTIMINGCONTROL_FOR_RF1P_MAX (0x000000ffU)
  1423. #define CSL_BB2D_AQREGISTERTIMINGCONTROL_DEEP_SLEEP_MASK (0x00200000U)
  1424. #define CSL_BB2D_AQREGISTERTIMINGCONTROL_DEEP_SLEEP_SHIFT (21U)
  1425. #define CSL_BB2D_AQREGISTERTIMINGCONTROL_DEEP_SLEEP_RESETVAL (0x00000000U)
  1426. #define CSL_BB2D_AQREGISTERTIMINGCONTROL_DEEP_SLEEP_MAX (0x00000001U)
  1427. #define CSL_BB2D_AQREGISTERTIMINGCONTROL_LIGHT_SLEEP_MASK (0x00400000U)
  1428. #define CSL_BB2D_AQREGISTERTIMINGCONTROL_LIGHT_SLEEP_SHIFT (22U)
  1429. #define CSL_BB2D_AQREGISTERTIMINGCONTROL_LIGHT_SLEEP_RESETVAL (0x00000000U)
  1430. #define CSL_BB2D_AQREGISTERTIMINGCONTROL_LIGHT_SLEEP_MAX (0x00000001U)
  1431. #define CSL_BB2D_AQREGISTERTIMINGCONTROL_POWER_DOWN_MASK (0x00100000U)
  1432. #define CSL_BB2D_AQREGISTERTIMINGCONTROL_POWER_DOWN_SHIFT (20U)
  1433. #define CSL_BB2D_AQREGISTERTIMINGCONTROL_POWER_DOWN_RESETVAL (0x00000000U)
  1434. #define CSL_BB2D_AQREGISTERTIMINGCONTROL_POWER_DOWN_MAX (0x00000001U)
  1435. #define CSL_BB2D_AQREGISTERTIMINGCONTROL_RESETVAL (0x00030000U)
  1436. /* GCMEMORYRESERVED */
  1437. #define CSL_BB2D_GCMEMORYRESERVED_RESETVAL (0x00000000U)
  1438. /* GCDISPLAYPRIORITY */
  1439. #define CSL_BB2D_GCDISPLAYPRIORITY_HIGH_MASK (0x0000FF00U)
  1440. #define CSL_BB2D_GCDISPLAYPRIORITY_HIGH_SHIFT (8U)
  1441. #define CSL_BB2D_GCDISPLAYPRIORITY_HIGH_RESETVAL (0x00000001U)
  1442. #define CSL_BB2D_GCDISPLAYPRIORITY_HIGH_MAX (0x000000ffU)
  1443. #define CSL_BB2D_GCDISPLAYPRIORITY_PERIOD_MASK (0x000000FFU)
  1444. #define CSL_BB2D_GCDISPLAYPRIORITY_PERIOD_SHIFT (0U)
  1445. #define CSL_BB2D_GCDISPLAYPRIORITY_PERIOD_RESETVAL (0x00000002U)
  1446. #define CSL_BB2D_GCDISPLAYPRIORITY_PERIOD_MAX (0x000000ffU)
  1447. #define CSL_BB2D_GCDISPLAYPRIORITY_RESETVAL (0x00000102U)
  1448. /* GCDBGCYCLECOUNTER */
  1449. #define CSL_BB2D_GCDBGCYCLECOUNTER_COUNT_MASK (0xFFFFFFFFU)
  1450. #define CSL_BB2D_GCDBGCYCLECOUNTER_COUNT_SHIFT (0U)
  1451. #define CSL_BB2D_GCDBGCYCLECOUNTER_COUNT_RESETVAL (0x00001c5eU)
  1452. #define CSL_BB2D_GCDBGCYCLECOUNTER_COUNT_MAX (0xffffffffU)
  1453. #define CSL_BB2D_GCDBGCYCLECOUNTER_RESETVAL (0x00001c5eU)
  1454. /* GCOUTSTANDINGREADS0 */
  1455. #define CSL_BB2D_GCOUTSTANDINGREADS0_PEC_MASK (0x000000FFU)
  1456. #define CSL_BB2D_GCOUTSTANDINGREADS0_PEC_SHIFT (0U)
  1457. #define CSL_BB2D_GCOUTSTANDINGREADS0_PEC_RESETVAL (0x00000000U)
  1458. #define CSL_BB2D_GCOUTSTANDINGREADS0_PEC_MAX (0x000000ffU)
  1459. #define CSL_BB2D_GCOUTSTANDINGREADS0_PEZ_MASK (0x0000FF00U)
  1460. #define CSL_BB2D_GCOUTSTANDINGREADS0_PEZ_SHIFT (8U)
  1461. #define CSL_BB2D_GCOUTSTANDINGREADS0_PEZ_RESETVAL (0x00000000U)
  1462. #define CSL_BB2D_GCOUTSTANDINGREADS0_PEZ_MAX (0x000000ffU)
  1463. #define CSL_BB2D_GCOUTSTANDINGREADS0_FE_MASK (0x00FF0000U)
  1464. #define CSL_BB2D_GCOUTSTANDINGREADS0_FE_SHIFT (16U)
  1465. #define CSL_BB2D_GCOUTSTANDINGREADS0_FE_RESETVAL (0x00000000U)
  1466. #define CSL_BB2D_GCOUTSTANDINGREADS0_FE_MAX (0x000000ffU)
  1467. #define CSL_BB2D_GCOUTSTANDINGREADS0_MMU_MASK (0xFF000000U)
  1468. #define CSL_BB2D_GCOUTSTANDINGREADS0_MMU_SHIFT (24U)
  1469. #define CSL_BB2D_GCOUTSTANDINGREADS0_MMU_RESETVAL (0x00000000U)
  1470. #define CSL_BB2D_GCOUTSTANDINGREADS0_MMU_MAX (0x000000ffU)
  1471. #define CSL_BB2D_GCOUTSTANDINGREADS0_RESETVAL (0x00000000U)
  1472. /* GCOUTSTANDINGREADS1 */
  1473. #define CSL_BB2D_GCOUTSTANDINGREADS1_TOTAL_MASK (0xFF000000U)
  1474. #define CSL_BB2D_GCOUTSTANDINGREADS1_TOTAL_SHIFT (24U)
  1475. #define CSL_BB2D_GCOUTSTANDINGREADS1_TOTAL_RESETVAL (0x00000000U)
  1476. #define CSL_BB2D_GCOUTSTANDINGREADS1_TOTAL_MAX (0x000000ffU)
  1477. #define CSL_BB2D_GCOUTSTANDINGREADS1_FC_MASK (0x00FF0000U)
  1478. #define CSL_BB2D_GCOUTSTANDINGREADS1_FC_SHIFT (16U)
  1479. #define CSL_BB2D_GCOUTSTANDINGREADS1_FC_RESETVAL (0x00000000U)
  1480. #define CSL_BB2D_GCOUTSTANDINGREADS1_FC_MAX (0x000000ffU)
  1481. #define CSL_BB2D_GCOUTSTANDINGREADS1_TX_MASK (0x0000FF00U)
  1482. #define CSL_BB2D_GCOUTSTANDINGREADS1_TX_SHIFT (8U)
  1483. #define CSL_BB2D_GCOUTSTANDINGREADS1_TX_RESETVAL (0x00000000U)
  1484. #define CSL_BB2D_GCOUTSTANDINGREADS1_TX_MAX (0x000000ffU)
  1485. #define CSL_BB2D_GCOUTSTANDINGREADS1_RA_MASK (0x000000FFU)
  1486. #define CSL_BB2D_GCOUTSTANDINGREADS1_RA_SHIFT (0U)
  1487. #define CSL_BB2D_GCOUTSTANDINGREADS1_RA_RESETVAL (0x00000000U)
  1488. #define CSL_BB2D_GCOUTSTANDINGREADS1_RA_MAX (0x000000ffU)
  1489. #define CSL_BB2D_GCOUTSTANDINGREADS1_RESETVAL (0x00000000U)
  1490. /* GCOUTSTANDINGWRITES */
  1491. #define CSL_BB2D_GCOUTSTANDINGWRITES_TOTAL_MASK (0xFF000000U)
  1492. #define CSL_BB2D_GCOUTSTANDINGWRITES_TOTAL_SHIFT (24U)
  1493. #define CSL_BB2D_GCOUTSTANDINGWRITES_TOTAL_RESETVAL (0x00000000U)
  1494. #define CSL_BB2D_GCOUTSTANDINGWRITES_TOTAL_MAX (0x000000ffU)
  1495. #define CSL_BB2D_GCOUTSTANDINGWRITES_FC_MASK (0x00FF0000U)
  1496. #define CSL_BB2D_GCOUTSTANDINGWRITES_FC_SHIFT (16U)
  1497. #define CSL_BB2D_GCOUTSTANDINGWRITES_FC_RESETVAL (0x00000000U)
  1498. #define CSL_BB2D_GCOUTSTANDINGWRITES_FC_MAX (0x000000ffU)
  1499. #define CSL_BB2D_GCOUTSTANDINGWRITES_PEC_MASK (0x000000FFU)
  1500. #define CSL_BB2D_GCOUTSTANDINGWRITES_PEC_SHIFT (0U)
  1501. #define CSL_BB2D_GCOUTSTANDINGWRITES_PEC_RESETVAL (0x00000000U)
  1502. #define CSL_BB2D_GCOUTSTANDINGWRITES_PEC_MAX (0x000000ffU)
  1503. #define CSL_BB2D_GCOUTSTANDINGWRITES_PEZ_MASK (0x0000FF00U)
  1504. #define CSL_BB2D_GCOUTSTANDINGWRITES_PEZ_SHIFT (8U)
  1505. #define CSL_BB2D_GCOUTSTANDINGWRITES_PEZ_RESETVAL (0x00000000U)
  1506. #define CSL_BB2D_GCOUTSTANDINGWRITES_PEZ_MAX (0x000000ffU)
  1507. #define CSL_BB2D_GCOUTSTANDINGWRITES_RESETVAL (0x00000000U)
  1508. /* GCDEBUGSIGNALSRA */
  1509. #define CSL_BB2D_GCDEBUGSIGNALSRA_SIGNAL_MASK (0xFFFFFFFFU)
  1510. #define CSL_BB2D_GCDEBUGSIGNALSRA_SIGNAL_SHIFT (0U)
  1511. #define CSL_BB2D_GCDEBUGSIGNALSRA_SIGNAL_RESETVAL (0x00000000U)
  1512. #define CSL_BB2D_GCDEBUGSIGNALSRA_SIGNAL_MAX (0xffffffffU)
  1513. #define CSL_BB2D_GCDEBUGSIGNALSRA_RESETVAL (0x00000000U)
  1514. /* GCDEBUGSIGNALSTX */
  1515. #define CSL_BB2D_GCDEBUGSIGNALSTX_SIGNAL_MASK (0xFFFFFFFFU)
  1516. #define CSL_BB2D_GCDEBUGSIGNALSTX_SIGNAL_SHIFT (0U)
  1517. #define CSL_BB2D_GCDEBUGSIGNALSTX_SIGNAL_RESETVAL (0x00000000U)
  1518. #define CSL_BB2D_GCDEBUGSIGNALSTX_SIGNAL_MAX (0xffffffffU)
  1519. #define CSL_BB2D_GCDEBUGSIGNALSTX_RESETVAL (0x00000000U)
  1520. /* GCDEBUGSIGNALSFE */
  1521. #define CSL_BB2D_GCDEBUGSIGNALSFE_SIGNAL_MASK (0xFFFFFFFFU)
  1522. #define CSL_BB2D_GCDEBUGSIGNALSFE_SIGNAL_SHIFT (0U)
  1523. #define CSL_BB2D_GCDEBUGSIGNALSFE_SIGNAL_RESETVAL (0x00000000U)
  1524. #define CSL_BB2D_GCDEBUGSIGNALSFE_SIGNAL_MAX (0xffffffffU)
  1525. #define CSL_BB2D_GCDEBUGSIGNALSFE_RESETVAL (0x00000000U)
  1526. /* GCDEBUGSIGNALSPE */
  1527. #define CSL_BB2D_GCDEBUGSIGNALSPE_SIGNAL_MASK (0xFFFFFFFFU)
  1528. #define CSL_BB2D_GCDEBUGSIGNALSPE_SIGNAL_SHIFT (0U)
  1529. #define CSL_BB2D_GCDEBUGSIGNALSPE_SIGNAL_RESETVAL (0x00000000U)
  1530. #define CSL_BB2D_GCDEBUGSIGNALSPE_SIGNAL_MAX (0xffffffffU)
  1531. #define CSL_BB2D_GCDEBUGSIGNALSPE_RESETVAL (0x00000000U)
  1532. /* GCDEBUGSIGNALSDE */
  1533. #define CSL_BB2D_GCDEBUGSIGNALSDE_SIGNAL_MASK (0xFFFFFFFFU)
  1534. #define CSL_BB2D_GCDEBUGSIGNALSDE_SIGNAL_SHIFT (0U)
  1535. #define CSL_BB2D_GCDEBUGSIGNALSDE_SIGNAL_RESETVAL (0x00000000U)
  1536. #define CSL_BB2D_GCDEBUGSIGNALSDE_SIGNAL_MAX (0xffffffffU)
  1537. #define CSL_BB2D_GCDEBUGSIGNALSDE_RESETVAL (0x00000000U)
  1538. /* GCDEBUGSIGNALSSH */
  1539. #define CSL_BB2D_GCDEBUGSIGNALSSH_SIGNAL_MASK (0xFFFFFFFFU)
  1540. #define CSL_BB2D_GCDEBUGSIGNALSSH_SIGNAL_SHIFT (0U)
  1541. #define CSL_BB2D_GCDEBUGSIGNALSSH_SIGNAL_RESETVAL (0x00000000U)
  1542. #define CSL_BB2D_GCDEBUGSIGNALSSH_SIGNAL_MAX (0xffffffffU)
  1543. #define CSL_BB2D_GCDEBUGSIGNALSSH_RESETVAL (0x00000000U)
  1544. /* GCDEBUGSIGNALSPA */
  1545. #define CSL_BB2D_GCDEBUGSIGNALSPA_SIGNAL_MASK (0xFFFFFFFFU)
  1546. #define CSL_BB2D_GCDEBUGSIGNALSPA_SIGNAL_SHIFT (0U)
  1547. #define CSL_BB2D_GCDEBUGSIGNALSPA_SIGNAL_RESETVAL (0x00000000U)
  1548. #define CSL_BB2D_GCDEBUGSIGNALSPA_SIGNAL_MAX (0xffffffffU)
  1549. #define CSL_BB2D_GCDEBUGSIGNALSPA_RESETVAL (0x00000000U)
  1550. /* GCDEBUGSIGNALSSE */
  1551. #define CSL_BB2D_GCDEBUGSIGNALSSE_SIGNAL_MASK (0xFFFFFFFFU)
  1552. #define CSL_BB2D_GCDEBUGSIGNALSSE_SIGNAL_SHIFT (0U)
  1553. #define CSL_BB2D_GCDEBUGSIGNALSSE_SIGNAL_RESETVAL (0x00000000U)
  1554. #define CSL_BB2D_GCDEBUGSIGNALSSE_SIGNAL_MAX (0xffffffffU)
  1555. #define CSL_BB2D_GCDEBUGSIGNALSSE_RESETVAL (0x00000000U)
  1556. /* GCDEBUGSIGNALSMC */
  1557. #define CSL_BB2D_GCDEBUGSIGNALSMC_SIGNAL_MASK (0xFFFFFFFFU)
  1558. #define CSL_BB2D_GCDEBUGSIGNALSMC_SIGNAL_SHIFT (0U)
  1559. #define CSL_BB2D_GCDEBUGSIGNALSMC_SIGNAL_RESETVAL (0x00000000U)
  1560. #define CSL_BB2D_GCDEBUGSIGNALSMC_SIGNAL_MAX (0xffffffffU)
  1561. #define CSL_BB2D_GCDEBUGSIGNALSMC_RESETVAL (0x00000000U)
  1562. /* GCDEBUGSIGNALSHI */
  1563. #define CSL_BB2D_GCDEBUGSIGNALSHI_SIGNAL_MASK (0xFFFFFFFFU)
  1564. #define CSL_BB2D_GCDEBUGSIGNALSHI_SIGNAL_SHIFT (0U)
  1565. #define CSL_BB2D_GCDEBUGSIGNALSHI_SIGNAL_RESETVAL (0x00000000U)
  1566. #define CSL_BB2D_GCDEBUGSIGNALSHI_SIGNAL_MAX (0xffffffffU)
  1567. #define CSL_BB2D_GCDEBUGSIGNALSHI_RESETVAL (0x00000000U)
  1568. /* GCDEBUGCONTROL0 */
  1569. #define CSL_BB2D_GCDEBUGCONTROL0_SH_MASK (0x0F000000U)
  1570. #define CSL_BB2D_GCDEBUGCONTROL0_SH_SHIFT (24U)
  1571. #define CSL_BB2D_GCDEBUGCONTROL0_SH_RESETVAL (0x00000000U)
  1572. #define CSL_BB2D_GCDEBUGCONTROL0_SH_MAX (0x0000000fU)
  1573. #define CSL_BB2D_GCDEBUGCONTROL0_DE_MASK (0x00000F00U)
  1574. #define CSL_BB2D_GCDEBUGCONTROL0_DE_SHIFT (8U)
  1575. #define CSL_BB2D_GCDEBUGCONTROL0_DE_RESETVAL (0x00000000U)
  1576. #define CSL_BB2D_GCDEBUGCONTROL0_DE_MAX (0x0000000fU)
  1577. #define CSL_BB2D_GCDEBUGCONTROL0_PE_MASK (0x000F0000U)
  1578. #define CSL_BB2D_GCDEBUGCONTROL0_PE_SHIFT (16U)
  1579. #define CSL_BB2D_GCDEBUGCONTROL0_PE_RESETVAL (0x00000000U)
  1580. #define CSL_BB2D_GCDEBUGCONTROL0_PE_MAX (0x0000000fU)
  1581. #define CSL_BB2D_GCDEBUGCONTROL0_FE_MASK (0x0000000FU)
  1582. #define CSL_BB2D_GCDEBUGCONTROL0_FE_SHIFT (0U)
  1583. #define CSL_BB2D_GCDEBUGCONTROL0_FE_RESETVAL (0x00000000U)
  1584. #define CSL_BB2D_GCDEBUGCONTROL0_FE_MAX (0x0000000fU)
  1585. #define CSL_BB2D_GCDEBUGCONTROL0_RESETVAL (0x00000000U)
  1586. /* GCDEBUGCONTROL1 */
  1587. #define CSL_BB2D_GCDEBUGCONTROL1_SE_MASK (0x00000F00U)
  1588. #define CSL_BB2D_GCDEBUGCONTROL1_SE_SHIFT (8U)
  1589. #define CSL_BB2D_GCDEBUGCONTROL1_SE_RESETVAL (0x00000000U)
  1590. #define CSL_BB2D_GCDEBUGCONTROL1_SE_MAX (0x0000000fU)
  1591. #define CSL_BB2D_GCDEBUGCONTROL1_TX_MASK (0x0F000000U)
  1592. #define CSL_BB2D_GCDEBUGCONTROL1_TX_SHIFT (24U)
  1593. #define CSL_BB2D_GCDEBUGCONTROL1_TX_RESETVAL (0x00000000U)
  1594. #define CSL_BB2D_GCDEBUGCONTROL1_TX_MAX (0x0000000fU)
  1595. #define CSL_BB2D_GCDEBUGCONTROL1_PA_MASK (0x0000000FU)
  1596. #define CSL_BB2D_GCDEBUGCONTROL1_PA_SHIFT (0U)
  1597. #define CSL_BB2D_GCDEBUGCONTROL1_PA_RESETVAL (0x00000000U)
  1598. #define CSL_BB2D_GCDEBUGCONTROL1_PA_MAX (0x0000000fU)
  1599. #define CSL_BB2D_GCDEBUGCONTROL1_RA_MASK (0x000F0000U)
  1600. #define CSL_BB2D_GCDEBUGCONTROL1_RA_SHIFT (16U)
  1601. #define CSL_BB2D_GCDEBUGCONTROL1_RA_RESETVAL (0x00000000U)
  1602. #define CSL_BB2D_GCDEBUGCONTROL1_RA_MAX (0x0000000fU)
  1603. #define CSL_BB2D_GCDEBUGCONTROL1_RESETVAL (0x00000000U)
  1604. /* GCDEBUGCONTROL2 */
  1605. #define CSL_BB2D_GCDEBUGCONTROL2_HI_MASK (0x00000F00U)
  1606. #define CSL_BB2D_GCDEBUGCONTROL2_HI_SHIFT (8U)
  1607. #define CSL_BB2D_GCDEBUGCONTROL2_HI_RESETVAL (0x00000000U)
  1608. #define CSL_BB2D_GCDEBUGCONTROL2_HI_MAX (0x0000000fU)
  1609. #define CSL_BB2D_GCDEBUGCONTROL2_MC_MASK (0x0000000FU)
  1610. #define CSL_BB2D_GCDEBUGCONTROL2_MC_SHIFT (0U)
  1611. #define CSL_BB2D_GCDEBUGCONTROL2_MC_RESETVAL (0x00000000U)
  1612. #define CSL_BB2D_GCDEBUGCONTROL2_MC_MAX (0x0000000fU)
  1613. #define CSL_BB2D_GCDEBUGCONTROL2_RESETVAL (0x00000000U)
  1614. /* GCDEBUGCONTROL3 */
  1615. #define CSL_BB2D_GCDEBUGCONTROL3_PROBE0_MASK (0x0000000FU)
  1616. #define CSL_BB2D_GCDEBUGCONTROL3_PROBE0_SHIFT (0U)
  1617. #define CSL_BB2D_GCDEBUGCONTROL3_PROBE0_RESETVAL (0x00000000U)
  1618. #define CSL_BB2D_GCDEBUGCONTROL3_PROBE0_MAX (0x0000000fU)
  1619. #define CSL_BB2D_GCDEBUGCONTROL3_PROBE1_MASK (0x00000F00U)
  1620. #define CSL_BB2D_GCDEBUGCONTROL3_PROBE1_SHIFT (8U)
  1621. #define CSL_BB2D_GCDEBUGCONTROL3_PROBE1_RESETVAL (0x00000000U)
  1622. #define CSL_BB2D_GCDEBUGCONTROL3_PROBE1_MAX (0x0000000fU)
  1623. #define CSL_BB2D_GCDEBUGCONTROL3_RESETVAL (0x00000000U)
  1624. /* GCBUSCONTROL */
  1625. #define CSL_BB2D_GCBUSCONTROL_FCC_MASK (0x00000100U)
  1626. #define CSL_BB2D_GCBUSCONTROL_FCC_SHIFT (8U)
  1627. #define CSL_BB2D_GCBUSCONTROL_FCC_RESETVAL (0x00000000U)
  1628. #define CSL_BB2D_GCBUSCONTROL_FCC_MAX (0x00000001U)
  1629. #define CSL_BB2D_GCBUSCONTROL_FC_MASK (0x00000040U)
  1630. #define CSL_BB2D_GCBUSCONTROL_FC_SHIFT (6U)
  1631. #define CSL_BB2D_GCBUSCONTROL_FC_RESETVAL (0x00000000U)
  1632. #define CSL_BB2D_GCBUSCONTROL_FC_MAX (0x00000001U)
  1633. #define CSL_BB2D_GCBUSCONTROL_PEZ_MASK (0x00000002U)
  1634. #define CSL_BB2D_GCBUSCONTROL_PEZ_SHIFT (1U)
  1635. #define CSL_BB2D_GCBUSCONTROL_PEZ_RESETVAL (0x00000000U)
  1636. #define CSL_BB2D_GCBUSCONTROL_PEZ_MAX (0x00000001U)
  1637. #define CSL_BB2D_GCBUSCONTROL_TX_MASK (0x00000080U)
  1638. #define CSL_BB2D_GCBUSCONTROL_TX_SHIFT (7U)
  1639. #define CSL_BB2D_GCBUSCONTROL_TX_RESETVAL (0x00000001U)
  1640. #define CSL_BB2D_GCBUSCONTROL_TX_MAX (0x00000001U)
  1641. #define CSL_BB2D_GCBUSCONTROL_MMU_MASK (0x00000020U)
  1642. #define CSL_BB2D_GCBUSCONTROL_MMU_SHIFT (5U)
  1643. #define CSL_BB2D_GCBUSCONTROL_MMU_RESETVAL (0x00000001U)
  1644. #define CSL_BB2D_GCBUSCONTROL_MMU_MAX (0x00000001U)
  1645. #define CSL_BB2D_GCBUSCONTROL_PEC_MASK (0x00000001U)
  1646. #define CSL_BB2D_GCBUSCONTROL_PEC_SHIFT (0U)
  1647. #define CSL_BB2D_GCBUSCONTROL_PEC_RESETVAL (0x00000000U)
  1648. #define CSL_BB2D_GCBUSCONTROL_PEC_MAX (0x00000001U)
  1649. #define CSL_BB2D_GCBUSCONTROL_FE_MASK (0x00000008U)
  1650. #define CSL_BB2D_GCBUSCONTROL_FE_SHIFT (3U)
  1651. #define CSL_BB2D_GCBUSCONTROL_FE_RESETVAL (0x00000001U)
  1652. #define CSL_BB2D_GCBUSCONTROL_FE_MAX (0x00000001U)
  1653. #define CSL_BB2D_GCBUSCONTROL_RESETVAL (0x000000a8U)
  1654. /* GCREGENDIANNESS0 */
  1655. #define CSL_BB2D_GCREGENDIANNESS0_WORD_SWAP_MASK (0xFFFFFFFFU)
  1656. #define CSL_BB2D_GCREGENDIANNESS0_WORD_SWAP_SHIFT (0U)
  1657. #define CSL_BB2D_GCREGENDIANNESS0_WORD_SWAP_RESETVAL (0x00000000U)
  1658. #define CSL_BB2D_GCREGENDIANNESS0_WORD_SWAP_MAX (0xffffffffU)
  1659. #define CSL_BB2D_GCREGENDIANNESS0_RESETVAL (0x00000000U)
  1660. /* GCREGENDIANNESS1 */
  1661. #define CSL_BB2D_GCREGENDIANNESS1_BYTE_SWAP_MASK (0xFFFFFFFFU)
  1662. #define CSL_BB2D_GCREGENDIANNESS1_BYTE_SWAP_SHIFT (0U)
  1663. #define CSL_BB2D_GCREGENDIANNESS1_BYTE_SWAP_RESETVAL (0x00000000U)
  1664. #define CSL_BB2D_GCREGENDIANNESS1_BYTE_SWAP_MAX (0xffffffffU)
  1665. #define CSL_BB2D_GCREGENDIANNESS1_RESETVAL (0x00000000U)
  1666. /* GCREGENDIANNESS2 */
  1667. #define CSL_BB2D_GCREGENDIANNESS2_BIT_SWAP_MASK (0xFFFFFFFFU)
  1668. #define CSL_BB2D_GCREGENDIANNESS2_BIT_SWAP_SHIFT (0U)
  1669. #define CSL_BB2D_GCREGENDIANNESS2_BIT_SWAP_RESETVAL (0x00000000U)
  1670. #define CSL_BB2D_GCREGENDIANNESS2_BIT_SWAP_MAX (0xffffffffU)
  1671. #define CSL_BB2D_GCREGENDIANNESS2_RESETVAL (0x00000000U)
  1672. /* GCREGDRAWPRIMITIVESTARTTIMESTAMP */
  1673. #define CSL_BB2D_GCREGDRAWPRIMITIVESTARTTIMESTAMP_START_TIME_MASK (0xFFFFFFFFU)
  1674. #define CSL_BB2D_GCREGDRAWPRIMITIVESTARTTIMESTAMP_START_TIME_SHIFT (0U)
  1675. #define CSL_BB2D_GCREGDRAWPRIMITIVESTARTTIMESTAMP_START_TIME_RESETVAL (0x00000000U)
  1676. #define CSL_BB2D_GCREGDRAWPRIMITIVESTARTTIMESTAMP_START_TIME_MAX (0xffffffffU)
  1677. #define CSL_BB2D_GCREGDRAWPRIMITIVESTARTTIMESTAMP_RESETVAL (0x00000000U)
  1678. /* GCREGDRAWPRIMITIVEENDTIMESTAMP */
  1679. #define CSL_BB2D_GCREGDRAWPRIMITIVEENDTIMESTAMP_END_TIME_MASK (0xFFFFFFFFU)
  1680. #define CSL_BB2D_GCREGDRAWPRIMITIVEENDTIMESTAMP_END_TIME_SHIFT (0U)
  1681. #define CSL_BB2D_GCREGDRAWPRIMITIVEENDTIMESTAMP_END_TIME_RESETVAL (0x00000000U)
  1682. #define CSL_BB2D_GCREGDRAWPRIMITIVEENDTIMESTAMP_END_TIME_MAX (0xffffffffU)
  1683. #define CSL_BB2D_GCREGDRAWPRIMITIVEENDTIMESTAMP_RESETVAL (0x00000000U)
  1684. /* GCREGCONTROL0 */
  1685. #define CSL_BB2D_GCREGCONTROL0_ENABLE_READ_MERGE_MASK (0x00000001U)
  1686. #define CSL_BB2D_GCREGCONTROL0_ENABLE_READ_MERGE_SHIFT (0U)
  1687. #define CSL_BB2D_GCREGCONTROL0_ENABLE_READ_MERGE_RESETVAL (0x00000001U)
  1688. #define CSL_BB2D_GCREGCONTROL0_ENABLE_READ_MERGE_MAX (0x00000001U)
  1689. #define CSL_BB2D_GCREGCONTROL0_OUTSTANDING_READS_PER_CHANNEL_MASK (0x03FF0000U)
  1690. #define CSL_BB2D_GCREGCONTROL0_OUTSTANDING_READS_PER_CHANNEL_SHIFT (16U)
  1691. #define CSL_BB2D_GCREGCONTROL0_OUTSTANDING_READS_PER_CHANNEL_RESETVAL (0x00000080U)
  1692. #define CSL_BB2D_GCREGCONTROL0_OUTSTANDING_READS_PER_CHANNEL_MAX (0x000003ffU)
  1693. #define CSL_BB2D_GCREGCONTROL0_MISC0_MASK (0x0000FFF0U)
  1694. #define CSL_BB2D_GCREGCONTROL0_MISC0_SHIFT (4U)
  1695. #define CSL_BB2D_GCREGCONTROL0_MISC0_RESETVAL (0x00000000U)
  1696. #define CSL_BB2D_GCREGCONTROL0_MISC0_MAX (0x00000fffU)
  1697. #define CSL_BB2D_GCREGCONTROL0_ENABLE_WRITE_MERGE_MASK (0x00000004U)
  1698. #define CSL_BB2D_GCREGCONTROL0_ENABLE_WRITE_MERGE_SHIFT (2U)
  1699. #define CSL_BB2D_GCREGCONTROL0_ENABLE_WRITE_MERGE_RESETVAL (0x00000001U)
  1700. #define CSL_BB2D_GCREGCONTROL0_ENABLE_WRITE_MERGE_MAX (0x00000001U)
  1701. #define CSL_BB2D_GCREGCONTROL0_MISC1_MASK (0xFC000000U)
  1702. #define CSL_BB2D_GCREGCONTROL0_MISC1_SHIFT (26U)
  1703. #define CSL_BB2D_GCREGCONTROL0_MISC1_RESETVAL (0x00000000U)
  1704. #define CSL_BB2D_GCREGCONTROL0_MISC1_MAX (0x0000003fU)
  1705. #define CSL_BB2D_GCREGCONTROL0_ENABLE_UNALIGNED_MERGE_MASK (0x00000002U)
  1706. #define CSL_BB2D_GCREGCONTROL0_ENABLE_UNALIGNED_MERGE_SHIFT (1U)
  1707. #define CSL_BB2D_GCREGCONTROL0_ENABLE_UNALIGNED_MERGE_RESETVAL (0x00000000U)
  1708. #define CSL_BB2D_GCREGCONTROL0_ENABLE_UNALIGNED_MERGE_MAX (0x00000001U)
  1709. #define CSL_BB2D_GCREGCONTROL0_ENABLE_UNALIGNED_WRITE_MERGE_MASK (0x00000008U)
  1710. #define CSL_BB2D_GCREGCONTROL0_ENABLE_UNALIGNED_WRITE_MERGE_SHIFT (3U)
  1711. #define CSL_BB2D_GCREGCONTROL0_ENABLE_UNALIGNED_WRITE_MERGE_RESETVAL (0x00000000U)
  1712. #define CSL_BB2D_GCREGCONTROL0_ENABLE_UNALIGNED_WRITE_MERGE_MAX (0x00000001U)
  1713. #define CSL_BB2D_GCREGCONTROL0_RESETVAL (0x00800005U)
  1714. /* AQCMDBUFFERADDR */
  1715. #define CSL_BB2D_AQCMDBUFFERADDR_TYPE_MASK (0x80000000U)
  1716. #define CSL_BB2D_AQCMDBUFFERADDR_TYPE_SHIFT (31U)
  1717. #define CSL_BB2D_AQCMDBUFFERADDR_TYPE_RESETVAL (0x00000000U)
  1718. #define CSL_BB2D_AQCMDBUFFERADDR_TYPE_MAX (0x00000001U)
  1719. #define CSL_BB2D_AQCMDBUFFERADDR_ADDRESS_MASK (0x7FFFFFFFU)
  1720. #define CSL_BB2D_AQCMDBUFFERADDR_ADDRESS_SHIFT (0U)
  1721. #define CSL_BB2D_AQCMDBUFFERADDR_ADDRESS_RESETVAL (0x00000000U)
  1722. #define CSL_BB2D_AQCMDBUFFERADDR_ADDRESS_MAX (0x7fffffffU)
  1723. #define CSL_BB2D_AQCMDBUFFERADDR_RESETVAL (0x00000000U)
  1724. /* AQCMDBUFFERCTRL */
  1725. #define CSL_BB2D_AQCMDBUFFERCTRL_PREFETCH_MASK (0x0000FFFFU)
  1726. #define CSL_BB2D_AQCMDBUFFERCTRL_PREFETCH_SHIFT (0U)
  1727. #define CSL_BB2D_AQCMDBUFFERCTRL_PREFETCH_RESETVAL (0x00000000U)
  1728. #define CSL_BB2D_AQCMDBUFFERCTRL_PREFETCH_MAX (0x0000ffffU)
  1729. #define CSL_BB2D_AQCMDBUFFERCTRL_ENDIAN_CONTROL_MASK (0x00300000U)
  1730. #define CSL_BB2D_AQCMDBUFFERCTRL_ENDIAN_CONTROL_SHIFT (20U)
  1731. #define CSL_BB2D_AQCMDBUFFERCTRL_ENDIAN_CONTROL_RESETVAL (0x00000000U)
  1732. #define CSL_BB2D_AQCMDBUFFERCTRL_ENDIAN_CONTROL_MAX (0x00000003U)
  1733. #define CSL_BB2D_AQCMDBUFFERCTRL_ENABLE_MASK (0x00010000U)
  1734. #define CSL_BB2D_AQCMDBUFFERCTRL_ENABLE_SHIFT (16U)
  1735. #define CSL_BB2D_AQCMDBUFFERCTRL_ENABLE_RESETVAL (0x00000000U)
  1736. #define CSL_BB2D_AQCMDBUFFERCTRL_ENABLE_MAX (0x00000001U)
  1737. #define CSL_BB2D_AQCMDBUFFERCTRL_NA1_MASK (0xFFC00000U)
  1738. #define CSL_BB2D_AQCMDBUFFERCTRL_NA1_SHIFT (22U)
  1739. #define CSL_BB2D_AQCMDBUFFERCTRL_NA1_RESETVAL (0x00000000U)
  1740. #define CSL_BB2D_AQCMDBUFFERCTRL_NA1_MAX (0x000003ffU)
  1741. #define CSL_BB2D_AQCMDBUFFERCTRL_NA_MASK (0x000E0000U)
  1742. #define CSL_BB2D_AQCMDBUFFERCTRL_NA_SHIFT (17U)
  1743. #define CSL_BB2D_AQCMDBUFFERCTRL_NA_RESETVAL (0x00000000U)
  1744. #define CSL_BB2D_AQCMDBUFFERCTRL_NA_MAX (0x00000007U)
  1745. #define CSL_BB2D_AQCMDBUFFERCTRL_RESETVAL (0x00000000U)
  1746. /* AQFESTATUS */
  1747. #define CSL_BB2D_AQFESTATUS_COMMAND_DATA_MASK (0x00000001U)
  1748. #define CSL_BB2D_AQFESTATUS_COMMAND_DATA_SHIFT (0U)
  1749. #define CSL_BB2D_AQFESTATUS_COMMAND_DATA_RESETVAL (0x00000000U)
  1750. #define CSL_BB2D_AQFESTATUS_COMMAND_DATA_MAX (0x00000001U)
  1751. #define CSL_BB2D_AQFESTATUS_RESETVAL (0x00000000U)
  1752. /* AQFEDEBUGSTATE */
  1753. #define CSL_BB2D_AQFEDEBUGSTATE_CMD_FETCH_STATE_MASK (0x00000C00U)
  1754. #define CSL_BB2D_AQFEDEBUGSTATE_CMD_FETCH_STATE_SHIFT (10U)
  1755. #define CSL_BB2D_AQFEDEBUGSTATE_CMD_FETCH_STATE_RESETVAL (0x00000000U)
  1756. #define CSL_BB2D_AQFEDEBUGSTATE_CMD_FETCH_STATE_MAX (0x00000003U)
  1757. #define CSL_BB2D_AQFEDEBUGSTATE_CMD_STATE_MASK (0x0000001FU)
  1758. #define CSL_BB2D_AQFEDEBUGSTATE_CMD_STATE_SHIFT (0U)
  1759. #define CSL_BB2D_AQFEDEBUGSTATE_CMD_STATE_RESETVAL (0x00000000U)
  1760. #define CSL_BB2D_AQFEDEBUGSTATE_CMD_STATE_MAX (0x0000001fU)
  1761. #define CSL_BB2D_AQFEDEBUGSTATE_CMD_DMA_STATE_MASK (0x00000300U)
  1762. #define CSL_BB2D_AQFEDEBUGSTATE_CMD_DMA_STATE_SHIFT (8U)
  1763. #define CSL_BB2D_AQFEDEBUGSTATE_CMD_DMA_STATE_RESETVAL (0x00000000U)
  1764. #define CSL_BB2D_AQFEDEBUGSTATE_CMD_DMA_STATE_MAX (0x00000003U)
  1765. #define CSL_BB2D_AQFEDEBUGSTATE_VE_REQ_STATE_MASK (0x00030000U)
  1766. #define CSL_BB2D_AQFEDEBUGSTATE_VE_REQ_STATE_SHIFT (16U)
  1767. #define CSL_BB2D_AQFEDEBUGSTATE_VE_REQ_STATE_RESETVAL (0x00000000U)
  1768. #define CSL_BB2D_AQFEDEBUGSTATE_VE_REQ_STATE_MAX (0x00000003U)
  1769. #define CSL_BB2D_AQFEDEBUGSTATE_CAL_STATE_MASK (0x0000C000U)
  1770. #define CSL_BB2D_AQFEDEBUGSTATE_CAL_STATE_SHIFT (14U)
  1771. #define CSL_BB2D_AQFEDEBUGSTATE_CAL_STATE_RESETVAL (0x00000000U)
  1772. #define CSL_BB2D_AQFEDEBUGSTATE_CAL_STATE_MAX (0x00000003U)
  1773. #define CSL_BB2D_AQFEDEBUGSTATE_REQ_DMA_STATE_MASK (0x00003000U)
  1774. #define CSL_BB2D_AQFEDEBUGSTATE_REQ_DMA_STATE_SHIFT (12U)
  1775. #define CSL_BB2D_AQFEDEBUGSTATE_REQ_DMA_STATE_RESETVAL (0x00000000U)
  1776. #define CSL_BB2D_AQFEDEBUGSTATE_REQ_DMA_STATE_MAX (0x00000003U)
  1777. #define CSL_BB2D_AQFEDEBUGSTATE_RESETVAL (0x00000000U)
  1778. /* AQFEDEBUGCURCMDADR */
  1779. #define CSL_BB2D_AQFEDEBUGCURCMDADR_CUR_CMD_ADR_MASK (0xFFFFFFF8U)
  1780. #define CSL_BB2D_AQFEDEBUGCURCMDADR_CUR_CMD_ADR_SHIFT (3U)
  1781. #define CSL_BB2D_AQFEDEBUGCURCMDADR_CUR_CMD_ADR_RESETVAL (0x00000000U)
  1782. #define CSL_BB2D_AQFEDEBUGCURCMDADR_CUR_CMD_ADR_MAX (0x1fffffffU)
  1783. #define CSL_BB2D_AQFEDEBUGCURCMDADR_RESETVAL (0x00000000U)
  1784. /* AQFEDEBUGCMDLOWREG */
  1785. #define CSL_BB2D_AQFEDEBUGCMDLOWREG_CMD_LOW_REG_MASK (0xFFFFFFFFU)
  1786. #define CSL_BB2D_AQFEDEBUGCMDLOWREG_CMD_LOW_REG_SHIFT (0U)
  1787. #define CSL_BB2D_AQFEDEBUGCMDLOWREG_CMD_LOW_REG_RESETVAL (0x00000000U)
  1788. #define CSL_BB2D_AQFEDEBUGCMDLOWREG_CMD_LOW_REG_MAX (0xffffffffU)
  1789. #define CSL_BB2D_AQFEDEBUGCMDLOWREG_RESETVAL (0x00000000U)
  1790. /* AQFEDEBUGCMDHIREG */
  1791. #define CSL_BB2D_AQFEDEBUGCMDHIREG_CMD_HI_REG_MASK (0xFFFFFFFFU)
  1792. #define CSL_BB2D_AQFEDEBUGCMDHIREG_CMD_HI_REG_SHIFT (0U)
  1793. #define CSL_BB2D_AQFEDEBUGCMDHIREG_CMD_HI_REG_RESETVAL (0x00000000U)
  1794. #define CSL_BB2D_AQFEDEBUGCMDHIREG_CMD_HI_REG_MAX (0xffffffffU)
  1795. #define CSL_BB2D_AQFEDEBUGCMDHIREG_RESETVAL (0x00000000U)
  1796. #ifdef __cplusplus
  1797. }
  1798. #endif
  1799. #endif