cslr_aes.h 80 KB

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  1. /********************************************************************
  2. * Copyright (C) 2013-2014 Texas Instruments Incorporated.
  3. *
  4. * Redistribution and use in source and binary forms, with or without
  5. * modification, are permitted provided that the following conditions
  6. * are met:
  7. *
  8. * Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. *
  11. * Redistributions in binary form must reproduce the above copyright
  12. * notice, this list of conditions and the following disclaimer in the
  13. * documentation and/or other materials provided with the
  14. * distribution.
  15. *
  16. * Neither the name of Texas Instruments Incorporated nor the names of
  17. * its contributors may be used to endorse or promote products derived
  18. * from this software without specific prior written permission.
  19. *
  20. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  21. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  22. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  23. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  24. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  25. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  26. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  27. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  28. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  30. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31. *
  32. */
  33. #ifndef CSLR_AES_H_
  34. #define CSLR_AES_H_
  35. #ifdef __cplusplus
  36. extern "C"
  37. {
  38. #endif
  39. #include <ti/csl/cslr.h>
  40. #include <ti/csl/tistdtypes.h>
  41. /**************************************************************************
  42. * Register Overlay Structure for __ALL__
  43. **************************************************************************/
  44. typedef struct {
  45. volatile Uint32 S_KEY2_6;
  46. volatile Uint32 S_KEY2_7;
  47. volatile Uint32 S_KEY2_4;
  48. volatile Uint32 S_KEY2_5;
  49. volatile Uint32 S_KEY2_2;
  50. volatile Uint32 S_KEY2_3;
  51. volatile Uint32 S_KEY2_0;
  52. volatile Uint32 S_KEY2_1;
  53. volatile Uint32 S_KEY1_6;
  54. volatile Uint32 S_KEY1_7;
  55. volatile Uint32 S_KEY1_4;
  56. volatile Uint32 S_KEY1_5;
  57. volatile Uint32 S_KEY1_2;
  58. volatile Uint32 S_KEY1_3;
  59. volatile Uint32 S_KEY1_0;
  60. volatile Uint32 S_KEY1_1;
  61. volatile Uint32 S_IV_IN_0;
  62. volatile Uint32 S_IV_IN_1;
  63. volatile Uint32 S_IV_IN_2;
  64. volatile Uint32 S_IV_IN_3;
  65. volatile Uint32 S_CTRL;
  66. volatile Uint32 S_C_LENGTH_0;
  67. volatile Uint32 S_C_LENGTH_1;
  68. volatile Uint32 S_AUTH_LENGTH;
  69. volatile Uint32 S_DATA_IN_0;
  70. volatile Uint32 S_DATA_IN_1;
  71. volatile Uint32 S_DATA_IN_2;
  72. volatile Uint32 S_DATA_IN_3;
  73. volatile Uint32 S_TAG_OUT_0;
  74. volatile Uint32 S_TAG_OUT_1;
  75. volatile Uint32 S_TAG_OUT_2;
  76. volatile Uint32 S_TAG_OUT_3;
  77. volatile Uint32 S_REVISION;
  78. volatile Uint32 S_SYSCONFIG;
  79. volatile Uint32 S_SYSSTS;
  80. volatile Uint32 S_IRQSTS;
  81. volatile Uint32 S_IRQEN;
  82. volatile Uint32 S_DIRTYBITS;
  83. volatile Uint32 S_LOCKDOWN;
  84. volatile Uint8 RSVD0[1048420];
  85. volatile Uint32 P_KEY2_6;
  86. volatile Uint32 P_KEY2_7;
  87. volatile Uint32 P_KEY2_4;
  88. volatile Uint32 P_KEY2_5;
  89. volatile Uint32 P_KEY2_2;
  90. volatile Uint32 P_KEY2_3;
  91. volatile Uint32 P_KEY2_0;
  92. volatile Uint32 P_KEY2_1;
  93. volatile Uint32 P_KEY1_6;
  94. volatile Uint32 P_KEY1_7;
  95. volatile Uint32 P_KEY1_4;
  96. volatile Uint32 P_KEY1_5;
  97. volatile Uint32 P_KEY1_2;
  98. volatile Uint32 P_KEY1_3;
  99. volatile Uint32 P_KEY1_0;
  100. volatile Uint32 P_KEY1_1;
  101. volatile Uint32 P_IV_IN_0;
  102. volatile Uint32 P_IV_IN_1;
  103. volatile Uint32 P_IV_IN_2;
  104. volatile Uint32 P_IV_IN_3;
  105. volatile Uint32 P_CTRL;
  106. volatile Uint32 P_C_LENGTH_0;
  107. volatile Uint32 P_C_LENGTH_1;
  108. volatile Uint32 P_AUTH_LENGTH;
  109. volatile Uint32 P_DATA_IN_0;
  110. volatile Uint32 P_DATA_IN_1;
  111. volatile Uint32 P_DATA_IN_2;
  112. volatile Uint32 P_DATA_IN_3;
  113. volatile Uint32 P_TAG_OUT_0;
  114. volatile Uint32 P_TAG_OUT_1;
  115. volatile Uint32 P_TAG_OUT_2;
  116. volatile Uint32 P_TAG_OUT_3;
  117. volatile Uint32 P_REVISION;
  118. volatile Uint32 P_SYSCONFIG;
  119. volatile Uint32 P_SYSSTS;
  120. volatile Uint32 P_IRQSTS;
  121. volatile Uint32 P_IRQEN;
  122. } CSL_AesRegs;
  123. /**************************************************************************
  124. * Register Macros
  125. **************************************************************************/
  126. /* XTS second key / CBC-MAC third key */
  127. #define CSL_AES_S_KEY2_6 (0x0U)
  128. /* XTS second key (MSW for 256-bit key) / CBC-MAC third key (MSW) */
  129. #define CSL_AES_S_KEY2_7 (0x4U)
  130. /* XTS / CCM second key / CBC-MAC third key (LSW) */
  131. #define CSL_AES_S_KEY2_4 (0x8U)
  132. /* XTS second key (MSW for 192-bit key) / CBC-MAC third key */
  133. #define CSL_AES_S_KEY2_5 (0xCU)
  134. /* XTS / CCM / CBC-MAC second key / Hash Key input */
  135. #define CSL_AES_S_KEY2_2 (0x10U)
  136. /* XTS second key (MSW for 128-bit key) + CCM/CBC-MAC second key (MSW) / Hash
  137. * Key input (MSW) */
  138. #define CSL_AES_S_KEY2_3 (0x14U)
  139. /* XTS / CCM / CBC-MAC second key (LSW) / Hash Key input (LSW) */
  140. #define CSL_AES_S_KEY2_0 (0x18U)
  141. /* XTS / CCM / CBC-MAC second key / Hash Key input */
  142. #define CSL_AES_S_KEY2_1 (0x1CU)
  143. /* Key (LSW for 256-key) */
  144. #define CSL_AES_S_KEY1_6 (0x20U)
  145. /* Key (MSW for 256-bit key) */
  146. #define CSL_AES_S_KEY1_7 (0x24U)
  147. /* Key (LSW for 192-bit key) */
  148. #define CSL_AES_S_KEY1_4 (0x28U)
  149. /* Key (MSW for 192-bit key) */
  150. #define CSL_AES_S_KEY1_5 (0x2CU)
  151. /* Key */
  152. #define CSL_AES_S_KEY1_2 (0x30U)
  153. /* Key (MSW for 128-bit key) */
  154. #define CSL_AES_S_KEY1_3 (0x34U)
  155. /* Key (LSW for 128-bit key) */
  156. #define CSL_AES_S_KEY1_0 (0x38U)
  157. /* Key */
  158. #define CSL_AES_S_KEY1_1 (0x3CU)
  159. /* Initialization Vector input (LSW) */
  160. #define CSL_AES_S_IV_IN_0 (0x40U)
  161. /* Initialization vector input */
  162. #define CSL_AES_S_IV_IN_1 (0x44U)
  163. /* Initialization vector input */
  164. #define CSL_AES_S_IV_IN_2 (0x48U)
  165. /* Initialization Vector input (MSW) */
  166. #define CSL_AES_S_IV_IN_3 (0x4CU)
  167. /* register determines the mode of operation of the AES Engine */
  168. #define CSL_AES_S_CTRL (0x50U)
  169. /* Crypto data length registers (LSW and MSW) store the cryptographic data
  170. * length in bytes for all modes. Once processing with this context is
  171. * started, this length decrements to zero. Data lengths up to (2^61 – 1)
  172. * bytes are allowed. For GCM, any value up to 2^36 - 32 bytes can be used.
  173. * This is because a 32-bit counter mode is used; the maximum number of
  174. * 128-bit blocks is 2^32 – 2, resulting in a maximum number of bytes of 2^36
  175. * - 32. A write to this register triggers the engine to start using this
  176. * context. This is valid for all modes except GCM and CCM. Note that for the
  177. * combined modes, this length does not include the authentication only data;
  178. * the authentication length is specified in the AES_AUTH_LENGTH register
  179. * below. All modes must have a length > 0. For the combined modes, it is
  180. * allowed to have one of the lengths equal to zero. For the basic encryption
  181. * modes (ECB/CBC/CTR/ICM/CFB128) it is allowed to program zero to the length
  182. * field; in that case the length is assumed infinite. All data must be byte
  183. * (8-bit) aligned; bit aligned data streams are not supported by the AES
  184. * Engine. For a Host read operation, these registers return all-zeroes. */
  185. #define CSL_AES_S_C_LENGTH_0 (0x54U)
  186. /* Crypto data length registers (LSW and MSW) store the cryptographic data
  187. * length in bytes for all modes. Once processing with this context is
  188. * started, this length decrements to zero. Data lengths up to (2^61 – 1)
  189. * bytes are allowed. For GCM, any value up to 2^36 - 32 bytes can be used.
  190. * This is because a 32-bit counter mode is used; the maximum number of
  191. * 128-bit blocks is 2^32 – 2, resulting in a maximum number of bytes of 2^36
  192. * - 32. A write to this register triggers the engine to start using this
  193. * context. This is valid for all modes except GCM and CCM. Note that for the
  194. * combined modes, this length does not include the authentication only data;
  195. * the authentication length is specified in the AES_AUTH_LENGTH register
  196. * below. All modes must have a length > 0. For the combined modes, it is
  197. * allowed to have one of the lengths equal to zero. For the basic encryption
  198. * modes (ECB/CBC/CTR/ICM/CFB128) it is allowed to program zero to the length
  199. * field; in that case the length is assumed infinite. All data must be byte
  200. * (8-bit) aligned; bit aligned data streams are not supported by the AES
  201. * Engine. For a Host read operation, these registers return all-zeroes. */
  202. #define CSL_AES_S_C_LENGTH_1 (0x58U)
  203. /* AAD data length. The authentication length register store the
  204. * authentication data length in bytes for combined modes only (GCM or CCM)
  205. * Supported AAD-lengths for CCM are from 0 to (2^16 - 2^8) bytes. For GCM any
  206. * value up to (2^32 - 1) bytes can be used. Once processing with this context
  207. * is started, this length decrements to zero. A write to this register
  208. * triggers the engine to start using this context for GCM and CCM. For XTS
  209. * this register is optionally used to load ‘j’. Loading of ‘j’ is only
  210. * required if ‘j’ != 0. ‘j’ is a 28-bit value and must be written to bits
  211. * [31-4] of this register. ‘j’ represents the sequential number of the
  212. * 128-bit block inside the data unit. For the first block in a unit, this
  213. * value is zero. It is not required to provide a ‘j’ for each new data block
  214. * within a unit. Note that it is possible to start with a ‘j’ unequal to
  215. * zero; refer to Table 4 for more details. For a Host read operation, these
  216. * registers return all-zeroes. */
  217. #define CSL_AES_S_AUTH_LENGTH (0x5CU)
  218. /* Data register to read and write plaintext/ciphertext (MSW) */
  219. #define CSL_AES_S_DATA_IN_0 (0x60U)
  220. /* Data register to read and write plaintext/ciphertext */
  221. #define CSL_AES_S_DATA_IN_1 (0x64U)
  222. /* Data register to read and write plaintext/ciphertext */
  223. #define CSL_AES_S_DATA_IN_2 (0x68U)
  224. /* Data register to read and write plaintext/ciphertext (LSW) */
  225. #define CSL_AES_S_DATA_IN_3 (0x6CU)
  226. /* S_TAG_OUT_0 */
  227. #define CSL_AES_S_TAG_OUT_0 (0x70U)
  228. /* S_TAG_OUT_1 */
  229. #define CSL_AES_S_TAG_OUT_1 (0x74U)
  230. /* S_TAG_OUT_2 */
  231. #define CSL_AES_S_TAG_OUT_2 (0x78U)
  232. /* S_TAG_OUT_3 */
  233. #define CSL_AES_S_TAG_OUT_3 (0x7CU)
  234. /* Register AES_REVISION */
  235. #define CSL_AES_S_REVISION (0x80U)
  236. /* Register AES_S_SYSCONFIG.This register configures the DMA signals and
  237. * controls the IDLE and reset logic */
  238. #define CSL_AES_S_SYSCONFIG (0x84U)
  239. /* S_SYSSTS */
  240. #define CSL_AES_S_SYSSTS (0x88U)
  241. /* This register indicates the interrupt status. If one of the interrupt bits
  242. * is set the interrupt output will be asserted */
  243. #define CSL_AES_S_IRQSTS (0x8CU)
  244. /* This register contains an enable bit for each unique interrupt generated by
  245. * the module. It matches the layout of AES_IRQSTATUS register. An interrupt
  246. * is enabled when the bit in this register is set to ‘1’. An interrupt that
  247. * is enabled is propagated to the SINTREQUEST_x output. All interrupts need
  248. * to be enabled explicitly by writing this register. */
  249. #define CSL_AES_S_IRQEN (0x90U)
  250. /* S_DIRTYBITS */
  251. #define CSL_AES_S_DIRTYBITS (0x94U)
  252. /* S_LOCKDOWN */
  253. #define CSL_AES_S_LOCKDOWN (0x98U)
  254. /* XTS second key / CBC-MAC third key */
  255. #define CSL_AES_P_KEY2_6 (0x100000U)
  256. /* XTS second key (MSW for 256-bit key) / CBC-MAC third key (MSW) */
  257. #define CSL_AES_P_KEY2_7 (0x100004U)
  258. /* XTS / CCM second key / CBC-MAC third key (LSW) */
  259. #define CSL_AES_P_KEY2_4 (0x100008U)
  260. /* XTS second key (MSW for 192-bit key) / CBC-MAC third key */
  261. #define CSL_AES_P_KEY2_5 (0x10000CU)
  262. /* XTS / CCM / CBC-MAC second key / Hash Key input */
  263. #define CSL_AES_P_KEY2_2 (0x100010U)
  264. /* XTS second key (MSW for 128-bit key) + CCM/CBC-MAC second key (MSW) / Hash
  265. * Key input (MSW) */
  266. #define CSL_AES_P_KEY2_3 (0x100014U)
  267. /* XTS / CCM / CBC-MAC second key (LSW) / Hash Key input (LSW) */
  268. #define CSL_AES_P_KEY2_0 (0x100018U)
  269. /* XTS / CCM / CBC-MAC second key / Hash Key input */
  270. #define CSL_AES_P_KEY2_1 (0x10001CU)
  271. /* Key (LSW for 256-bit key) */
  272. #define CSL_AES_P_KEY1_6 (0x100020U)
  273. /* Key (MSW for 256-bit key) */
  274. #define CSL_AES_P_KEY1_7 (0x100024U)
  275. /* Key (LSW for 192-bit key) */
  276. #define CSL_AES_P_KEY1_4 (0x100028U)
  277. /* Key (MSW for 192-bit key) */
  278. #define CSL_AES_P_KEY1_5 (0x10002CU)
  279. /* Key */
  280. #define CSL_AES_P_KEY1_2 (0x100030U)
  281. /* Key (MSW for 128-bit key) */
  282. #define CSL_AES_P_KEY1_3 (0x100034U)
  283. /* Key (LSW for 128-bit key) */
  284. #define CSL_AES_P_KEY1_0 (0x100038U)
  285. /* Key */
  286. #define CSL_AES_P_KEY1_1 (0x10003CU)
  287. /* Initialization Vector input (LSW) */
  288. #define CSL_AES_P_IV_IN_0 (0x100040U)
  289. /* Initialization vector input */
  290. #define CSL_AES_P_IV_IN_1 (0x100044U)
  291. /* Initialization vector input */
  292. #define CSL_AES_P_IV_IN_2 (0x100048U)
  293. /* Initialization Vector input (MSW) */
  294. #define CSL_AES_P_IV_IN_3 (0x10004CU)
  295. /* register determines the mode of operation of the AES Engine */
  296. #define CSL_AES_P_CTRL (0x100050U)
  297. /* Crypto data length registers (LSW and MSW) store the cryptographic data
  298. * length in bytes for all modes. Once processing with this context is
  299. * started, this length decrements to zero. Data lengths up to (2^61 – 1)
  300. * bytes are allowed. For GCM, any value up to 2^36 - 32 bytes can be used.
  301. * This is because a 32-bit counter mode is used; the maximum number of
  302. * 128-bit blocks is 2^32 – 2, resulting in a maximum number of bytes of 2^36
  303. * - 32. A write to this register triggers the engine to start using this
  304. * context. This is valid for all modes except GCM and CCM. Note that for the
  305. * combined modes, this length does not include the authentication only data;
  306. * the authentication length is specified in the AES_AUTH_LENGTH register
  307. * below. All modes must have a length > 0. For the combined modes, it is
  308. * allowed to have one of the lengths equal to zero. For the basic encryption
  309. * modes (ECB/CBC/CTR/ICM/CFB128) it is allowed to program zero to the length
  310. * field; in that case the length is assumed infinite. All data must be byte
  311. * (8-bit) aligned; bit aligned data streams are not supported by the AES
  312. * Engine. For a Host read operation, these registers return all-zeroes. */
  313. #define CSL_AES_P_C_LENGTH_0 (0x100054U)
  314. /* Crypto data length registers (LSW and MSW) store the cryptographic data
  315. * length in bytes for all modes. Once processing with this context is
  316. * started, this length decrements to zero. Data lengths up to (2^61 – 1)
  317. * bytes are allowed. For GCM, any value up to 2^36 - 32 bytes can be used.
  318. * This is because a 32-bit counter mode is used; the maximum number of
  319. * 128-bit blocks is 2^32 – 2, resulting in a maximum number of bytes of 2^36
  320. * - 32. A write to this register triggers the engine to start using this
  321. * context. This is valid for all modes except GCM and CCM. Note that for the
  322. * combined modes, this length does not include the authentication only data;
  323. * the authentication length is specified in the AES_AUTH_LENGTH register
  324. * below. All modes must have a length > 0. For the combined modes, it is
  325. * allowed to have one of the lengths equal to zero. For the basic encryption
  326. * modes (ECB/CBC/CTR/ICM/CFB128) it is allowed to program zero to the length
  327. * field; in that case the length is assumed infinite. All data must be byte
  328. * (8-bit) aligned; bit aligned data streams are not supported by the AES
  329. * Engine. For a Host read operation, these registers return all-zeroes. */
  330. #define CSL_AES_P_C_LENGTH_1 (0x100058U)
  331. /* AAD data length. The authentication length register store the
  332. * authentication data length in bytes for combined modes only (GCM or CCM)
  333. * Supported AAD-lengths for CCM are from 0 to (2^16 - 2^8) bytes. For GCM any
  334. * value up to (2^32 - 1) bytes can be used. Once processing with this context
  335. * is started, this length decrements to zero. A write to this register
  336. * triggers the engine to start using this context for GCM and CCM. For XTS
  337. * this register is optionally used to load ‘j’. Loading of ‘j’ is only
  338. * required if ‘j’ != 0. ‘j’ is a 28-bit value and must be written to bits
  339. * [31-4] of this register. ‘j’ represents the sequential number of the
  340. * 128-bit block inside the data unit. For the first block in a unit, this
  341. * value is zero. It is not required to provide a ‘j’ for each new data block
  342. * within a unit. Note that it is possible to start with a ‘j’ unequal to
  343. * zero; refer to Table 4 for more details. For a Host read operation, these
  344. * registers return all-zeroes. */
  345. #define CSL_AES_P_AUTH_LENGTH (0x10005CU)
  346. /* Data register to read and write plaintext/ciphertext (MSW) */
  347. #define CSL_AES_P_DATA_IN_0 (0x100060U)
  348. /* Data register to read and write plaintext/ciphertext */
  349. #define CSL_AES_P_DATA_IN_1 (0x100064U)
  350. /* Data register to read and write plaintext/ciphertext */
  351. #define CSL_AES_P_DATA_IN_2 (0x100068U)
  352. /* Data register to read and write plaintext/ciphertext (LSW) */
  353. #define CSL_AES_P_DATA_IN_3 (0x10006CU)
  354. /* P_TAG_OUT_0 */
  355. #define CSL_AES_P_TAG_OUT_0 (0x100070U)
  356. /* P_TAG_OUT_1 */
  357. #define CSL_AES_P_TAG_OUT_1 (0x100074U)
  358. /* P_TAG_OUT_2 */
  359. #define CSL_AES_P_TAG_OUT_2 (0x100078U)
  360. /* P_TAG_OUT_3 */
  361. #define CSL_AES_P_TAG_OUT_3 (0x10007CU)
  362. /* Register AES_REVISION */
  363. #define CSL_AES_P_REVISION (0x100080U)
  364. /* Register AES_P_SYSCONFIG.This register configures the DMA signals. */
  365. #define CSL_AES_P_SYSCONFIG (0x100084U)
  366. /* P_SYSSTS */
  367. #define CSL_AES_P_SYSSTS (0x100088U)
  368. /* This register indicates the interrupt status. If one of the interrupt bits
  369. * is set the interrupt output will be asserted */
  370. #define CSL_AES_P_IRQSTS (0x10008CU)
  371. /* This register contains an enable bit for each unique interrupt generated by
  372. * the module. It matches the layout of AES_IRQSTATUS register. An interrupt
  373. * is enabled when the bit in this register is set to ‘1’. An interrupt that
  374. * is enabled is propagated to the SINTREQUEST_x output. All interrupts need
  375. * to be enabled explicitly by writing this register. */
  376. #define CSL_AES_P_IRQEN (0x100090U)
  377. /**************************************************************************
  378. * Field Definition Macros
  379. **************************************************************************/
  380. /* S_KEY2_6 */
  381. #define CSL_AES_S_KEY2_6_KEY_MASK (0xFFFFFFFFU)
  382. #define CSL_AES_S_KEY2_6_KEY_SHIFT (0U)
  383. #define CSL_AES_S_KEY2_6_KEY_RESETVAL (0x00000000U)
  384. #define CSL_AES_S_KEY2_6_KEY_MAX (0xffffffffU)
  385. #define CSL_AES_S_KEY2_6_RESETVAL (0x00000000U)
  386. /* S_KEY2_7 */
  387. #define CSL_AES_S_KEY2_7_KEY_MASK (0xFFFFFFFFU)
  388. #define CSL_AES_S_KEY2_7_KEY_SHIFT (0U)
  389. #define CSL_AES_S_KEY2_7_KEY_RESETVAL (0x00000000U)
  390. #define CSL_AES_S_KEY2_7_KEY_MAX (0xffffffffU)
  391. #define CSL_AES_S_KEY2_7_RESETVAL (0x00000000U)
  392. /* S_KEY2_4 */
  393. #define CSL_AES_S_KEY2_4_KEY_MASK (0xFFFFFFFFU)
  394. #define CSL_AES_S_KEY2_4_KEY_SHIFT (0U)
  395. #define CSL_AES_S_KEY2_4_KEY_RESETVAL (0x00000000U)
  396. #define CSL_AES_S_KEY2_4_KEY_MAX (0xffffffffU)
  397. #define CSL_AES_S_KEY2_4_RESETVAL (0x00000000U)
  398. /* S_KEY2_5 */
  399. #define CSL_AES_S_KEY2_5_KEY_MASK (0xFFFFFFFFU)
  400. #define CSL_AES_S_KEY2_5_KEY_SHIFT (0U)
  401. #define CSL_AES_S_KEY2_5_KEY_RESETVAL (0x00000000U)
  402. #define CSL_AES_S_KEY2_5_KEY_MAX (0xffffffffU)
  403. #define CSL_AES_S_KEY2_5_RESETVAL (0x00000000U)
  404. /* S_KEY2_2 */
  405. #define CSL_AES_S_KEY2_2_KEY_MASK (0xFFFFFFFFU)
  406. #define CSL_AES_S_KEY2_2_KEY_SHIFT (0U)
  407. #define CSL_AES_S_KEY2_2_KEY_RESETVAL (0x00000000U)
  408. #define CSL_AES_S_KEY2_2_KEY_MAX (0xffffffffU)
  409. #define CSL_AES_S_KEY2_2_RESETVAL (0x00000000U)
  410. /* S_KEY2_3 */
  411. #define CSL_AES_S_KEY2_3_KEY_MASK (0xFFFFFFFFU)
  412. #define CSL_AES_S_KEY2_3_KEY_SHIFT (0U)
  413. #define CSL_AES_S_KEY2_3_KEY_RESETVAL (0x00000000U)
  414. #define CSL_AES_S_KEY2_3_KEY_MAX (0xffffffffU)
  415. #define CSL_AES_S_KEY2_3_RESETVAL (0x00000000U)
  416. /* S_KEY2_0 */
  417. #define CSL_AES_S_KEY2_0_KEY_MASK (0xFFFFFFFFU)
  418. #define CSL_AES_S_KEY2_0_KEY_SHIFT (0U)
  419. #define CSL_AES_S_KEY2_0_KEY_RESETVAL (0x00000000U)
  420. #define CSL_AES_S_KEY2_0_KEY_MAX (0xffffffffU)
  421. #define CSL_AES_S_KEY2_0_RESETVAL (0x00000000U)
  422. /* S_KEY2_1 */
  423. #define CSL_AES_S_KEY2_1_KEY_MASK (0xFFFFFFFFU)
  424. #define CSL_AES_S_KEY2_1_KEY_SHIFT (0U)
  425. #define CSL_AES_S_KEY2_1_KEY_RESETVAL (0x00000000U)
  426. #define CSL_AES_S_KEY2_1_KEY_MAX (0xffffffffU)
  427. #define CSL_AES_S_KEY2_1_RESETVAL (0x00000000U)
  428. /* S_KEY1_6 */
  429. #define CSL_AES_S_KEY1_6_KEY_MASK (0xFFFFFFFFU)
  430. #define CSL_AES_S_KEY1_6_KEY_SHIFT (0U)
  431. #define CSL_AES_S_KEY1_6_KEY_RESETVAL (0x00000000U)
  432. #define CSL_AES_S_KEY1_6_KEY_MAX (0xffffffffU)
  433. #define CSL_AES_S_KEY1_6_RESETVAL (0x00000000U)
  434. /* S_KEY1_7 */
  435. #define CSL_AES_S_KEY1_7_KEY_MASK (0xFFFFFFFFU)
  436. #define CSL_AES_S_KEY1_7_KEY_SHIFT (0U)
  437. #define CSL_AES_S_KEY1_7_KEY_RESETVAL (0x00000000U)
  438. #define CSL_AES_S_KEY1_7_KEY_MAX (0xffffffffU)
  439. #define CSL_AES_S_KEY1_7_RESETVAL (0x00000000U)
  440. /* S_KEY1_4 */
  441. #define CSL_AES_S_KEY1_4_KEY_MASK (0xFFFFFFFFU)
  442. #define CSL_AES_S_KEY1_4_KEY_SHIFT (0U)
  443. #define CSL_AES_S_KEY1_4_KEY_RESETVAL (0x00000000U)
  444. #define CSL_AES_S_KEY1_4_KEY_MAX (0xffffffffU)
  445. #define CSL_AES_S_KEY1_4_RESETVAL (0x00000000U)
  446. /* S_KEY1_5 */
  447. #define CSL_AES_S_KEY1_5_KEY_MASK (0xFFFFFFFFU)
  448. #define CSL_AES_S_KEY1_5_KEY_SHIFT (0U)
  449. #define CSL_AES_S_KEY1_5_KEY_RESETVAL (0x00000000U)
  450. #define CSL_AES_S_KEY1_5_KEY_MAX (0xffffffffU)
  451. #define CSL_AES_S_KEY1_5_RESETVAL (0x00000000U)
  452. /* S_KEY1_2 */
  453. #define CSL_AES_S_KEY1_2_KEY_MASK (0xFFFFFFFFU)
  454. #define CSL_AES_S_KEY1_2_KEY_SHIFT (0U)
  455. #define CSL_AES_S_KEY1_2_KEY_RESETVAL (0x00000000U)
  456. #define CSL_AES_S_KEY1_2_KEY_MAX (0xffffffffU)
  457. #define CSL_AES_S_KEY1_2_RESETVAL (0x00000000U)
  458. /* S_KEY1_3 */
  459. #define CSL_AES_S_KEY1_3_KEY_MASK (0xFFFFFFFFU)
  460. #define CSL_AES_S_KEY1_3_KEY_SHIFT (0U)
  461. #define CSL_AES_S_KEY1_3_KEY_RESETVAL (0x00000000U)
  462. #define CSL_AES_S_KEY1_3_KEY_MAX (0xffffffffU)
  463. #define CSL_AES_S_KEY1_3_RESETVAL (0x00000000U)
  464. /* S_KEY1_0 */
  465. #define CSL_AES_S_KEY1_0_KEY_MASK (0xFFFFFFFFU)
  466. #define CSL_AES_S_KEY1_0_KEY_SHIFT (0U)
  467. #define CSL_AES_S_KEY1_0_KEY_RESETVAL (0x00000000U)
  468. #define CSL_AES_S_KEY1_0_KEY_MAX (0xffffffffU)
  469. #define CSL_AES_S_KEY1_0_RESETVAL (0x00000000U)
  470. /* S_KEY1_1 */
  471. #define CSL_AES_S_KEY1_1_KEY_MASK (0xFFFFFFFFU)
  472. #define CSL_AES_S_KEY1_1_KEY_SHIFT (0U)
  473. #define CSL_AES_S_KEY1_1_KEY_RESETVAL (0x00000000U)
  474. #define CSL_AES_S_KEY1_1_KEY_MAX (0xffffffffU)
  475. #define CSL_AES_S_KEY1_1_RESETVAL (0x00000000U)
  476. /* S_IV_IN_0 */
  477. #define CSL_AES_S_IV_IN_0_DATA_MASK (0xFFFFFFFFU)
  478. #define CSL_AES_S_IV_IN_0_DATA_SHIFT (0U)
  479. #define CSL_AES_S_IV_IN_0_DATA_RESETVAL (0x00000000U)
  480. #define CSL_AES_S_IV_IN_0_DATA_MAX (0xffffffffU)
  481. #define CSL_AES_S_IV_IN_0_RESETVAL (0x00000000U)
  482. /* S_IV_IN_1 */
  483. #define CSL_AES_S_IV_IN_1_DATA_MASK (0xFFFFFFFFU)
  484. #define CSL_AES_S_IV_IN_1_DATA_SHIFT (0U)
  485. #define CSL_AES_S_IV_IN_1_DATA_RESETVAL (0x00000000U)
  486. #define CSL_AES_S_IV_IN_1_DATA_MAX (0xffffffffU)
  487. #define CSL_AES_S_IV_IN_1_RESETVAL (0x00000000U)
  488. /* S_IV_IN_2 */
  489. #define CSL_AES_S_IV_IN_2_DATA_MASK (0xFFFFFFFFU)
  490. #define CSL_AES_S_IV_IN_2_DATA_SHIFT (0U)
  491. #define CSL_AES_S_IV_IN_2_DATA_RESETVAL (0x00000000U)
  492. #define CSL_AES_S_IV_IN_2_DATA_MAX (0xffffffffU)
  493. #define CSL_AES_S_IV_IN_2_RESETVAL (0x00000000U)
  494. /* S_IV_IN_3 */
  495. #define CSL_AES_S_IV_IN_3_DATA_MASK (0xFFFFFFFFU)
  496. #define CSL_AES_S_IV_IN_3_DATA_SHIFT (0U)
  497. #define CSL_AES_S_IV_IN_3_DATA_RESETVAL (0x00000000U)
  498. #define CSL_AES_S_IV_IN_3_DATA_MAX (0xffffffffU)
  499. #define CSL_AES_S_IV_IN_3_RESETVAL (0x00000000U)
  500. /* S_CTRL */
  501. #define CSL_AES_S_CTRL_OUTPUT_READY_MASK (0x00000001U)
  502. #define CSL_AES_S_CTRL_OUTPUT_READY_SHIFT (0U)
  503. #define CSL_AES_S_CTRL_OUTPUT_READY_RESETVAL (0x00000000U)
  504. #define CSL_AES_S_CTRL_OUTPUT_READY_MAX (0x00000001U)
  505. #define CSL_AES_S_CTRL_DIRECTION_MASK (0x00000004U)
  506. #define CSL_AES_S_CTRL_DIRECTION_SHIFT (2U)
  507. #define CSL_AES_S_CTRL_DIRECTION_RESETVAL (0x00000000U)
  508. #define CSL_AES_S_CTRL_DIRECTION_DECRYPT (0x00000000U)
  509. #define CSL_AES_S_CTRL_DIRECTION_ENCRYPT (0x00000001U)
  510. #define CSL_AES_S_CTRL_INPUT_READY_MASK (0x00000002U)
  511. #define CSL_AES_S_CTRL_INPUT_READY_SHIFT (1U)
  512. #define CSL_AES_S_CTRL_INPUT_READY_RESETVAL (0x00000000U)
  513. #define CSL_AES_S_CTRL_INPUT_READY_MAX (0x00000001U)
  514. #define CSL_AES_S_CTRL_KEY_SIZE_MASK (0x00000018U)
  515. #define CSL_AES_S_CTRL_KEY_SIZE_SHIFT (3U)
  516. #define CSL_AES_S_CTRL_KEY_SIZE_RESETVAL (0x00000000U)
  517. #define CSL_AES_S_CTRL_KEY_SIZE_RESERVED (0x00000000U)
  518. #define CSL_AES_S_CTRL_KEY_SIZE_KEY128 (0x00000001U)
  519. #define CSL_AES_S_CTRL_KEY_SIZE_KEY192 (0x00000002U)
  520. #define CSL_AES_S_CTRL_KEY_SIZE_KEY256 (0x00000003U)
  521. #define CSL_AES_S_CTRL_MODE_MASK (0x00000020U)
  522. #define CSL_AES_S_CTRL_MODE_SHIFT (5U)
  523. #define CSL_AES_S_CTRL_MODE_RESETVAL (0x00000000U)
  524. #define CSL_AES_S_CTRL_MODE_ECB (0x00000000U)
  525. #define CSL_AES_S_CTRL_MODE_CBC (0x00000001U)
  526. #define CSL_AES_S_CTRL_CTR_MASK (0x00000040U)
  527. #define CSL_AES_S_CTRL_CTR_SHIFT (6U)
  528. #define CSL_AES_S_CTRL_CTR_RESETVAL (0x00000000U)
  529. #define CSL_AES_S_CTRL_CTR_NOOP (0x00000000U)
  530. #define CSL_AES_S_CTRL_CTR_CTR (0x00000001U)
  531. #define CSL_AES_S_CTRL_CTR_WIDTH_MASK (0x00000180U)
  532. #define CSL_AES_S_CTRL_CTR_WIDTH_SHIFT (7U)
  533. #define CSL_AES_S_CTRL_CTR_WIDTH_RESETVAL (0x00000000U)
  534. #define CSL_AES_S_CTRL_CTR_WIDTH_COUNTER32 (0x00000000U)
  535. #define CSL_AES_S_CTRL_CTR_WIDTH_COUNTER64 (0x00000001U)
  536. #define CSL_AES_S_CTRL_CTR_WIDTH_COUNTER96 (0x00000002U)
  537. #define CSL_AES_S_CTRL_CTR_WIDTH_COUNTER128 (0x00000003U)
  538. #define CSL_AES_S_CTRL_ICM_MASK (0x00000200U)
  539. #define CSL_AES_S_CTRL_ICM_SHIFT (9U)
  540. #define CSL_AES_S_CTRL_ICM_RESETVAL (0x00000000U)
  541. #define CSL_AES_S_CTRL_ICM_NO_ICM (0x00000000U)
  542. #define CSL_AES_S_CTRL_ICM_ICM (0x00000001U)
  543. #define CSL_AES_S_CTRL_CFB_MASK (0x00000400U)
  544. #define CSL_AES_S_CTRL_CFB_SHIFT (10U)
  545. #define CSL_AES_S_CTRL_CFB_RESETVAL (0x00000000U)
  546. #define CSL_AES_S_CTRL_CFB_NO_CFB (0x00000000U)
  547. #define CSL_AES_S_CTRL_CFB_CFB (0x00000001U)
  548. #define CSL_AES_S_CTRL_XTS_MASK (0x00001800U)
  549. #define CSL_AES_S_CTRL_XTS_SHIFT (11U)
  550. #define CSL_AES_S_CTRL_XTS_RESETVAL (0x00000000U)
  551. #define CSL_AES_S_CTRL_XTS_NOOP (0x00000000U)
  552. #define CSL_AES_S_CTRL_XTS_XTS01 (0x00000001U)
  553. #define CSL_AES_S_CTRL_XTS_XTS10 (0x00000002U)
  554. #define CSL_AES_S_CTRL_XTS_XTS11 (0x00000003U)
  555. #define CSL_AES_S_CTRL_F8_MASK (0x00002000U)
  556. #define CSL_AES_S_CTRL_F8_SHIFT (13U)
  557. #define CSL_AES_S_CTRL_F8_RESETVAL (0x00000000U)
  558. #define CSL_AES_S_CTRL_F8_NO_F8 (0x00000000U)
  559. #define CSL_AES_S_CTRL_F8_F8 (0x00000001U)
  560. #define CSL_AES_S_CTRL_F9_MASK (0x00004000U)
  561. #define CSL_AES_S_CTRL_F9_SHIFT (14U)
  562. #define CSL_AES_S_CTRL_F9_RESETVAL (0x00000000U)
  563. #define CSL_AES_S_CTRL_F9_NO_F9 (0x00000000U)
  564. #define CSL_AES_S_CTRL_F9_F9 (0x00000001U)
  565. #define CSL_AES_S_CTRL_CBCMAC_MASK (0x00008000U)
  566. #define CSL_AES_S_CTRL_CBCMAC_SHIFT (15U)
  567. #define CSL_AES_S_CTRL_CBCMAC_RESETVAL (0x00000000U)
  568. #define CSL_AES_S_CTRL_CBCMAC_NO_CBCMAC (0x00000000U)
  569. #define CSL_AES_S_CTRL_CBCMAC_CBCMAC (0x00000001U)
  570. #define CSL_AES_S_CTRL_GCM_MASK (0x00030000U)
  571. #define CSL_AES_S_CTRL_GCM_SHIFT (16U)
  572. #define CSL_AES_S_CTRL_GCM_RESETVAL (0x00000000U)
  573. #define CSL_AES_S_CTRL_GCM_NOOP (0x00000000U)
  574. #define CSL_AES_S_CTRL_GCM_GCM01 (0x00000001U)
  575. #define CSL_AES_S_CTRL_GCM_GCMA10 (0x00000002U)
  576. #define CSL_AES_S_CTRL_GCM_GCM11 (0x00000003U)
  577. #define CSL_AES_S_CTRL_CCM_MASK (0x00040000U)
  578. #define CSL_AES_S_CTRL_CCM_SHIFT (18U)
  579. #define CSL_AES_S_CTRL_CCM_RESETVAL (0x00000000U)
  580. #define CSL_AES_S_CTRL_CCM_NO_CCM (0x00000000U)
  581. #define CSL_AES_S_CTRL_CCM_CCM (0x00000001U)
  582. #define CSL_AES_S_CTRL_CCM_L_MASK (0x00380000U)
  583. #define CSL_AES_S_CTRL_CCM_L_SHIFT (19U)
  584. #define CSL_AES_S_CTRL_CCM_L_RESETVAL (0x00000000U)
  585. #define CSL_AES_S_CTRL_CCM_L_MAX (0x00000007U)
  586. #define CSL_AES_S_CTRL_CCM_M_MASK (0x01C00000U)
  587. #define CSL_AES_S_CTRL_CCM_M_SHIFT (22U)
  588. #define CSL_AES_S_CTRL_CCM_M_RESETVAL (0x00000000U)
  589. #define CSL_AES_S_CTRL_CCM_M_MAX (0x00000007U)
  590. #define CSL_AES_S_CTRL_SAVE_CONTEXT_MASK (0x20000000U)
  591. #define CSL_AES_S_CTRL_SAVE_CONTEXT_SHIFT (29U)
  592. #define CSL_AES_S_CTRL_SAVE_CONTEXT_RESETVAL (0x00000000U)
  593. #define CSL_AES_S_CTRL_SAVE_CONTEXT_MAX (0x00000001U)
  594. #define CSL_AES_S_CTRL_SAVE_CONTEXT_READY_MASK (0x40000000U)
  595. #define CSL_AES_S_CTRL_SAVE_CONTEXT_READY_SHIFT (30U)
  596. #define CSL_AES_S_CTRL_SAVE_CONTEXT_READY_RESETVAL (0x00000000U)
  597. #define CSL_AES_S_CTRL_SAVE_CONTEXT_READY_MAX (0x00000001U)
  598. #define CSL_AES_S_CTRL_CONTEXT_READY_MASK (0x80000000U)
  599. #define CSL_AES_S_CTRL_CONTEXT_READY_SHIFT (31U)
  600. #define CSL_AES_S_CTRL_CONTEXT_READY_RESETVAL (0x00000001U)
  601. #define CSL_AES_S_CTRL_CONTEXT_READY_MAX (0x00000001U)
  602. #define CSL_AES_S_CTRL_RESETVAL (0x80000000U)
  603. /* S_C_LENGTH_0 */
  604. #define CSL_AES_S_C_LENGTH_0_LENGTH_MASK (0xFFFFFFFFU)
  605. #define CSL_AES_S_C_LENGTH_0_LENGTH_SHIFT (0U)
  606. #define CSL_AES_S_C_LENGTH_0_LENGTH_RESETVAL (0x00000000U)
  607. #define CSL_AES_S_C_LENGTH_0_LENGTH_MAX (0xffffffffU)
  608. #define CSL_AES_S_C_LENGTH_0_RESETVAL (0x00000000U)
  609. /* S_C_LENGTH_1 */
  610. #define CSL_AES_S_C_LENGTH_1_LENGTH_MASK (0x1FFFFFFFU)
  611. #define CSL_AES_S_C_LENGTH_1_LENGTH_SHIFT (0U)
  612. #define CSL_AES_S_C_LENGTH_1_LENGTH_RESETVAL (0x00000000U)
  613. #define CSL_AES_S_C_LENGTH_1_LENGTH_MAX (0x1fffffffU)
  614. #define CSL_AES_S_C_LENGTH_1_RESETVAL (0x00000000U)
  615. /* S_AUTH_LENGTH */
  616. #define CSL_AES_S_AUTH_LENGTH_AUTH_MASK (0xFFFFFFFFU)
  617. #define CSL_AES_S_AUTH_LENGTH_AUTH_SHIFT (0U)
  618. #define CSL_AES_S_AUTH_LENGTH_AUTH_RESETVAL (0x00000000U)
  619. #define CSL_AES_S_AUTH_LENGTH_AUTH_MAX (0xffffffffU)
  620. #define CSL_AES_S_AUTH_LENGTH_RESETVAL (0x00000000U)
  621. /* S_DATA_IN_0 */
  622. #define CSL_AES_S_DATA_IN_0_DATA_MASK (0xFFFFFFFFU)
  623. #define CSL_AES_S_DATA_IN_0_DATA_SHIFT (0U)
  624. #define CSL_AES_S_DATA_IN_0_DATA_RESETVAL (0x00000000U)
  625. #define CSL_AES_S_DATA_IN_0_DATA_MAX (0xffffffffU)
  626. #define CSL_AES_S_DATA_IN_0_RESETVAL (0x00000000U)
  627. /* S_DATA_IN_1 */
  628. #define CSL_AES_S_DATA_IN_1_DATA_MASK (0xFFFFFFFFU)
  629. #define CSL_AES_S_DATA_IN_1_DATA_SHIFT (0U)
  630. #define CSL_AES_S_DATA_IN_1_DATA_RESETVAL (0x00000000U)
  631. #define CSL_AES_S_DATA_IN_1_DATA_MAX (0xffffffffU)
  632. #define CSL_AES_S_DATA_IN_1_RESETVAL (0x00000000U)
  633. /* S_DATA_IN_2 */
  634. #define CSL_AES_S_DATA_IN_2_DATA_MASK (0xFFFFFFFFU)
  635. #define CSL_AES_S_DATA_IN_2_DATA_SHIFT (0U)
  636. #define CSL_AES_S_DATA_IN_2_DATA_RESETVAL (0x00000000U)
  637. #define CSL_AES_S_DATA_IN_2_DATA_MAX (0xffffffffU)
  638. #define CSL_AES_S_DATA_IN_2_RESETVAL (0x00000000U)
  639. /* S_DATA_IN_3 */
  640. #define CSL_AES_S_DATA_IN_3_DATA_MASK (0xFFFFFFFFU)
  641. #define CSL_AES_S_DATA_IN_3_DATA_SHIFT (0U)
  642. #define CSL_AES_S_DATA_IN_3_DATA_RESETVAL (0x00000000U)
  643. #define CSL_AES_S_DATA_IN_3_DATA_MAX (0xffffffffU)
  644. #define CSL_AES_S_DATA_IN_3_RESETVAL (0x00000000U)
  645. /* S_TAG_OUT_0 */
  646. #define CSL_AES_S_TAG_OUT_0_HASH_MASK (0xFFFFFFFFU)
  647. #define CSL_AES_S_TAG_OUT_0_HASH_SHIFT (0U)
  648. #define CSL_AES_S_TAG_OUT_0_HASH_RESETVAL (0x00000000U)
  649. #define CSL_AES_S_TAG_OUT_0_HASH_MAX (0xffffffffU)
  650. #define CSL_AES_S_TAG_OUT_0_RESETVAL (0x00000000U)
  651. /* S_TAG_OUT_1 */
  652. #define CSL_AES_S_TAG_OUT_1_HASH_MASK (0xFFFFFFFFU)
  653. #define CSL_AES_S_TAG_OUT_1_HASH_SHIFT (0U)
  654. #define CSL_AES_S_TAG_OUT_1_HASH_RESETVAL (0x00000000U)
  655. #define CSL_AES_S_TAG_OUT_1_HASH_MAX (0xffffffffU)
  656. #define CSL_AES_S_TAG_OUT_1_RESETVAL (0x00000000U)
  657. /* S_TAG_OUT_2 */
  658. #define CSL_AES_S_TAG_OUT_2_HASH_MASK (0xFFFFFFFFU)
  659. #define CSL_AES_S_TAG_OUT_2_HASH_SHIFT (0U)
  660. #define CSL_AES_S_TAG_OUT_2_HASH_RESETVAL (0x00000000U)
  661. #define CSL_AES_S_TAG_OUT_2_HASH_MAX (0xffffffffU)
  662. #define CSL_AES_S_TAG_OUT_2_RESETVAL (0x00000000U)
  663. /* S_TAG_OUT_3 */
  664. #define CSL_AES_S_TAG_OUT_3_HASH_MASK (0xFFFFFFFFU)
  665. #define CSL_AES_S_TAG_OUT_3_HASH_SHIFT (0U)
  666. #define CSL_AES_S_TAG_OUT_3_HASH_RESETVAL (0x00000000U)
  667. #define CSL_AES_S_TAG_OUT_3_HASH_MAX (0xffffffffU)
  668. #define CSL_AES_S_TAG_OUT_3_RESETVAL (0x00000000U)
  669. /* S_REVISION */
  670. #define CSL_AES_S_REVISION_Y_MINOR_MASK (0x0000003FU)
  671. #define CSL_AES_S_REVISION_Y_MINOR_SHIFT (0U)
  672. #define CSL_AES_S_REVISION_Y_MINOR_RESETVAL (0x00000000U)
  673. #define CSL_AES_S_REVISION_Y_MINOR_MAX (0x0000003fU)
  674. #define CSL_AES_S_REVISION_CUSTOM_MASK (0x000000C0U)
  675. #define CSL_AES_S_REVISION_CUSTOM_SHIFT (6U)
  676. #define CSL_AES_S_REVISION_CUSTOM_RESETVAL (0x00000000U)
  677. #define CSL_AES_S_REVISION_CUSTOM_STANDARD (0x00000000U)
  678. #define CSL_AES_S_REVISION_X_MAJOR_MASK (0x00000700U)
  679. #define CSL_AES_S_REVISION_X_MAJOR_SHIFT (8U)
  680. #define CSL_AES_S_REVISION_X_MAJOR_RESETVAL (0x00000000U)
  681. #define CSL_AES_S_REVISION_X_MAJOR_MAX (0x00000007U)
  682. #define CSL_AES_S_REVISION_R_RTL_MASK (0x0000F800U)
  683. #define CSL_AES_S_REVISION_R_RTL_SHIFT (11U)
  684. #define CSL_AES_S_REVISION_R_RTL_RESETVAL (0x00000000U)
  685. #define CSL_AES_S_REVISION_R_RTL_MAX (0x0000001fU)
  686. #define CSL_AES_S_REVISION_FUNC_MASK (0x0FFF0000U)
  687. #define CSL_AES_S_REVISION_FUNC_SHIFT (16U)
  688. #define CSL_AES_S_REVISION_FUNC_RESETVAL (0x00000000U)
  689. #define CSL_AES_S_REVISION_FUNC_MAX (0x00000fffU)
  690. #define CSL_AES_S_REVISION_SCHEME_MASK (0xC0000000U)
  691. #define CSL_AES_S_REVISION_SCHEME_SHIFT (30U)
  692. #define CSL_AES_S_REVISION_SCHEME_RESETVAL (0x00000000U)
  693. #define CSL_AES_S_REVISION_SCHEME_H08 (0x00000001U)
  694. #define CSL_AES_S_REVISION_SCHEME_LEGACY (0x00000000U)
  695. #define CSL_AES_S_REVISION_RESETVAL (0x00000000U)
  696. /* S_SYSCONFIG */
  697. #define CSL_AES_S_SYSCONFIG_AUTOIDLE_MASK (0x00000001U)
  698. #define CSL_AES_S_SYSCONFIG_AUTOIDLE_SHIFT (0U)
  699. #define CSL_AES_S_SYSCONFIG_AUTOIDLE_RESETVAL (0x00000001U)
  700. #define CSL_AES_S_SYSCONFIG_AUTOIDLE_CLOCKS_ON (0x00000000U)
  701. #define CSL_AES_S_SYSCONFIG_AUTOIDLE_CLOCKS_OFF (0x00000001U)
  702. #define CSL_AES_S_SYSCONFIG_SOFTRESET_MASK (0x00000002U)
  703. #define CSL_AES_S_SYSCONFIG_SOFTRESET_SHIFT (1U)
  704. #define CSL_AES_S_SYSCONFIG_SOFTRESET_RESETVAL (0x00000000U)
  705. #define CSL_AES_S_SYSCONFIG_SOFTRESET_NOOP (0x00000000U)
  706. #define CSL_AES_S_SYSCONFIG_SOFTRESET_SOFRESET (0x00000001U)
  707. #define CSL_AES_S_SYSCONFIG_SIDLE_MASK (0x0000000CU)
  708. #define CSL_AES_S_SYSCONFIG_SIDLE_SHIFT (2U)
  709. #define CSL_AES_S_SYSCONFIG_SIDLE_RESETVAL (0x00000000U)
  710. #define CSL_AES_S_SYSCONFIG_SIDLE_FORCEIDLE (0x00000000U)
  711. #define CSL_AES_S_SYSCONFIG_SIDLE_NOIDLE (0x00000001U)
  712. #define CSL_AES_S_SYSCONFIG_SIDLE_SMARTIDLE (0x00000002U)
  713. #define CSL_AES_S_SYSCONFIG_SIDLE_RESERVED (0x00000003U)
  714. #define CSL_AES_S_SYSCONFIG_DIRECTBUSEN_MASK (0x00000010U)
  715. #define CSL_AES_S_SYSCONFIG_DIRECTBUSEN_SHIFT (4U)
  716. #define CSL_AES_S_SYSCONFIG_DIRECTBUSEN_RESETVAL (0x00000000U)
  717. #define CSL_AES_S_SYSCONFIG_DIRECTBUSEN_KEY (0x00000000U)
  718. #define CSL_AES_S_SYSCONFIG_DIRECTBUSEN_DIRECT (0x00000001U)
  719. #define CSL_AES_S_SYSCONFIG_DMA_REQ_DATA_IN_EN_MASK (0x00000020U)
  720. #define CSL_AES_S_SYSCONFIG_DMA_REQ_DATA_IN_EN_SHIFT (5U)
  721. #define CSL_AES_S_SYSCONFIG_DMA_REQ_DATA_IN_EN_RESETVAL (0x00000000U)
  722. #define CSL_AES_S_SYSCONFIG_DMA_REQ_DATA_IN_EN_DMA_DIS (0x00000000U)
  723. #define CSL_AES_S_SYSCONFIG_DMA_REQ_DATA_IN_EN_DMA_EN (0x00000001U)
  724. #define CSL_AES_S_SYSCONFIG_DMA_REQ_DATA_OUT_EN_MASK (0x00000040U)
  725. #define CSL_AES_S_SYSCONFIG_DMA_REQ_DATA_OUT_EN_SHIFT (6U)
  726. #define CSL_AES_S_SYSCONFIG_DMA_REQ_DATA_OUT_EN_RESETVAL (0x00000000U)
  727. #define CSL_AES_S_SYSCONFIG_DMA_REQ_DATA_OUT_EN_DMA_DIS (0x00000000U)
  728. #define CSL_AES_S_SYSCONFIG_DMA_REQ_DATA_OUT_EN_DMA_EN (0x00000001U)
  729. #define CSL_AES_S_SYSCONFIG_DMA_REQ_CONTEXT_IN_EN_MASK (0x00000080U)
  730. #define CSL_AES_S_SYSCONFIG_DMA_REQ_CONTEXT_IN_EN_SHIFT (7U)
  731. #define CSL_AES_S_SYSCONFIG_DMA_REQ_CONTEXT_IN_EN_RESETVAL (0x00000000U)
  732. #define CSL_AES_S_SYSCONFIG_DMA_REQ_CONTEXT_IN_EN_DMA_DIS (0x00000000U)
  733. #define CSL_AES_S_SYSCONFIG_DMA_REQ_CONTEXT_IN_EN_DMA_EN (0x00000001U)
  734. #define CSL_AES_S_SYSCONFIG_DMA_REQ_CONTEXT_OUT_EN_MASK (0x00000100U)
  735. #define CSL_AES_S_SYSCONFIG_DMA_REQ_CONTEXT_OUT_EN_SHIFT (8U)
  736. #define CSL_AES_S_SYSCONFIG_DMA_REQ_CONTEXT_OUT_EN_RESETVAL (0x00000000U)
  737. #define CSL_AES_S_SYSCONFIG_DMA_REQ_CONTEXT_OUT_EN_DMA_DIS (0x00000000U)
  738. #define CSL_AES_S_SYSCONFIG_DMA_REQ_CONTEXT_OUT_EN_DMA_EN (0x00000001U)
  739. #define CSL_AES_S_SYSCONFIG_MAP_CONTEXT_OUT_ON_DATA_MASK (0x00000200U)
  740. #define CSL_AES_S_SYSCONFIG_MAP_CONTEXT_OUT_ON_DATA_SHIFT (9U)
  741. #define CSL_AES_S_SYSCONFIG_MAP_CONTEXT_OUT_ON_DATA_RESETVAL (0x00000000U)
  742. #define CSL_AES_S_SYSCONFIG_MAP_CONTEXT_OUT_ON_DATA_MAX (0x00000001U)
  743. #define CSL_AES_S_SYSCONFIG_KEK_MODE_MASK (0x00000400U)
  744. #define CSL_AES_S_SYSCONFIG_KEK_MODE_SHIFT (10U)
  745. #define CSL_AES_S_SYSCONFIG_KEK_MODE_RESETVAL (0x00000000U)
  746. #define CSL_AES_S_SYSCONFIG_KEK_MODE_MAX (0x00000001U)
  747. #define CSL_AES_S_SYSCONFIG_KEY_ENC_MASK (0x00000800U)
  748. #define CSL_AES_S_SYSCONFIG_KEY_ENC_SHIFT (11U)
  749. #define CSL_AES_S_SYSCONFIG_KEY_ENC_RESETVAL (0x00000000U)
  750. #define CSL_AES_S_SYSCONFIG_KEY_ENC_MAX (0x00000001U)
  751. #define CSL_AES_S_SYSCONFIG_K3_MASK (0x00001000U)
  752. #define CSL_AES_S_SYSCONFIG_K3_SHIFT (12U)
  753. #define CSL_AES_S_SYSCONFIG_K3_RESETVAL (0x00000000U)
  754. #define CSL_AES_S_SYSCONFIG_K3_MAX (0x00000001U)
  755. #define CSL_AES_S_SYSCONFIG_KEK_MODE_ID_MASK (0x00004000U)
  756. #define CSL_AES_S_SYSCONFIG_KEK_MODE_ID_SHIFT (14U)
  757. #define CSL_AES_S_SYSCONFIG_KEK_MODE_ID_RESETVAL (0x00000000U)
  758. #define CSL_AES_S_SYSCONFIG_KEK_MODE_ID_MAX (0x00000001U)
  759. #define CSL_AES_S_SYSCONFIG_KEK_MODE_LEN_MASK (0x00018000U)
  760. #define CSL_AES_S_SYSCONFIG_KEK_MODE_LEN_SHIFT (15U)
  761. #define CSL_AES_S_SYSCONFIG_KEK_MODE_LEN_RESETVAL (0x00000000U)
  762. #define CSL_AES_S_SYSCONFIG_KEK_MODE_LEN_RESERVED (0x00000000U)
  763. #define CSL_AES_S_SYSCONFIG_KEK_MODE_LEN_KEY128 (0x00000001U)
  764. #define CSL_AES_S_SYSCONFIG_KEK_MODE_LEN_KEY192 (0x00000002U)
  765. #define CSL_AES_S_SYSCONFIG_KEK_MODE_LEN_KEY256 (0x00000003U)
  766. #define CSL_AES_S_SYSCONFIG_RESETVAL (0x00000001U)
  767. /* S_SYSSTS */
  768. #define CSL_AES_S_SYSSTS_RESETDONE_MASK (0x00000001U)
  769. #define CSL_AES_S_SYSSTS_RESETDONE_SHIFT (0U)
  770. #define CSL_AES_S_SYSSTS_RESETDONE_RESETVAL (0x00000000U)
  771. #define CSL_AES_S_SYSSTS_RESETDONE_MAX (0x00000001U)
  772. #define CSL_AES_S_SYSSTS_RESETVAL (0x00000000U)
  773. /* S_IRQSTS */
  774. #define CSL_AES_S_IRQSTS_CONTEX_IN_MASK (0x00000001U)
  775. #define CSL_AES_S_IRQSTS_CONTEX_IN_SHIFT (0U)
  776. #define CSL_AES_S_IRQSTS_CONTEX_IN_RESETVAL (0x00000000U)
  777. #define CSL_AES_S_IRQSTS_CONTEX_IN_MAX (0x00000001U)
  778. #define CSL_AES_S_IRQSTS_DATA_IN_MASK (0x00000002U)
  779. #define CSL_AES_S_IRQSTS_DATA_IN_SHIFT (1U)
  780. #define CSL_AES_S_IRQSTS_DATA_IN_RESETVAL (0x00000000U)
  781. #define CSL_AES_S_IRQSTS_DATA_IN_MAX (0x00000001U)
  782. #define CSL_AES_S_IRQSTS_DATA_OUT_MASK (0x00000004U)
  783. #define CSL_AES_S_IRQSTS_DATA_OUT_SHIFT (2U)
  784. #define CSL_AES_S_IRQSTS_DATA_OUT_RESETVAL (0x00000000U)
  785. #define CSL_AES_S_IRQSTS_DATA_OUT_MAX (0x00000001U)
  786. #define CSL_AES_S_IRQSTS_CONTEXT_OUT_MASK (0x00000008U)
  787. #define CSL_AES_S_IRQSTS_CONTEXT_OUT_SHIFT (3U)
  788. #define CSL_AES_S_IRQSTS_CONTEXT_OUT_RESETVAL (0x00000000U)
  789. #define CSL_AES_S_IRQSTS_CONTEXT_OUT_MAX (0x00000001U)
  790. #define CSL_AES_S_IRQSTS_RESETVAL (0x00000000U)
  791. /* S_IRQEN */
  792. #define CSL_AES_S_IRQEN_CONTEX_IN_MASK (0x00000001U)
  793. #define CSL_AES_S_IRQEN_CONTEX_IN_SHIFT (0U)
  794. #define CSL_AES_S_IRQEN_CONTEX_IN_RESETVAL (0x00000000U)
  795. #define CSL_AES_S_IRQEN_CONTEX_IN_MAX (0x00000001U)
  796. #define CSL_AES_S_IRQEN_DATA_IN_MASK (0x00000002U)
  797. #define CSL_AES_S_IRQEN_DATA_IN_SHIFT (1U)
  798. #define CSL_AES_S_IRQEN_DATA_IN_RESETVAL (0x00000000U)
  799. #define CSL_AES_S_IRQEN_DATA_IN_MAX (0x00000001U)
  800. #define CSL_AES_S_IRQEN_DATA_OUT_MASK (0x00000004U)
  801. #define CSL_AES_S_IRQEN_DATA_OUT_SHIFT (2U)
  802. #define CSL_AES_S_IRQEN_DATA_OUT_RESETVAL (0x00000000U)
  803. #define CSL_AES_S_IRQEN_DATA_OUT_MAX (0x00000001U)
  804. #define CSL_AES_S_IRQEN_CONTEXT_OUT_MASK (0x00000008U)
  805. #define CSL_AES_S_IRQEN_CONTEXT_OUT_SHIFT (3U)
  806. #define CSL_AES_S_IRQEN_CONTEXT_OUT_RESETVAL (0x00000000U)
  807. #define CSL_AES_S_IRQEN_CONTEXT_OUT_MAX (0x00000001U)
  808. #define CSL_AES_S_IRQEN_RESETVAL (0x00000000U)
  809. /* S_DIRTYBITS */
  810. #define CSL_AES_S_DIRTYBITS_S_ACCESS_MASK (0x00000001U)
  811. #define CSL_AES_S_DIRTYBITS_S_ACCESS_SHIFT (0U)
  812. #define CSL_AES_S_DIRTYBITS_S_ACCESS_RESETVAL (0x00000000U)
  813. #define CSL_AES_S_DIRTYBITS_S_ACCESS_MAX (0x00000001U)
  814. #define CSL_AES_S_DIRTYBITS_S_DIRTY_MASK (0x00000002U)
  815. #define CSL_AES_S_DIRTYBITS_S_DIRTY_SHIFT (1U)
  816. #define CSL_AES_S_DIRTYBITS_S_DIRTY_RESETVAL (0x00000000U)
  817. #define CSL_AES_S_DIRTYBITS_S_DIRTY_MAX (0x00000001U)
  818. #define CSL_AES_S_DIRTYBITS_P_ACCESS_MASK (0x00000004U)
  819. #define CSL_AES_S_DIRTYBITS_P_ACCESS_SHIFT (2U)
  820. #define CSL_AES_S_DIRTYBITS_P_ACCESS_RESETVAL (0x00000000U)
  821. #define CSL_AES_S_DIRTYBITS_P_ACCESS_MAX (0x00000001U)
  822. #define CSL_AES_S_DIRTYBITS_P_DIRTY_MASK (0x00000008U)
  823. #define CSL_AES_S_DIRTYBITS_P_DIRTY_SHIFT (3U)
  824. #define CSL_AES_S_DIRTYBITS_P_DIRTY_RESETVAL (0x00000000U)
  825. #define CSL_AES_S_DIRTYBITS_P_DIRTY_MAX (0x00000001U)
  826. #define CSL_AES_S_DIRTYBITS_RESETVAL (0x00000000U)
  827. /* S_LOCKDOWN */
  828. #define CSL_AES_S_LOCKDOWN_KEY_LOCK_MASK (0x00000001U)
  829. #define CSL_AES_S_LOCKDOWN_KEY_LOCK_SHIFT (0U)
  830. #define CSL_AES_S_LOCKDOWN_KEY_LOCK_RESETVAL (0x00000000U)
  831. #define CSL_AES_S_LOCKDOWN_KEY_LOCK_MAX (0x00000001U)
  832. #define CSL_AES_S_LOCKDOWN_IV_LOCK_MASK (0x00000008U)
  833. #define CSL_AES_S_LOCKDOWN_IV_LOCK_SHIFT (3U)
  834. #define CSL_AES_S_LOCKDOWN_IV_LOCK_RESETVAL (0x00000000U)
  835. #define CSL_AES_S_LOCKDOWN_IV_LOCK_MAX (0x00000001U)
  836. #define CSL_AES_S_LOCKDOWN_CTRL_LOCK_MASK (0x00000010U)
  837. #define CSL_AES_S_LOCKDOWN_CTRL_LOCK_SHIFT (4U)
  838. #define CSL_AES_S_LOCKDOWN_CTRL_LOCK_RESETVAL (0x00000000U)
  839. #define CSL_AES_S_LOCKDOWN_CTRL_LOCK_MAX (0x00000001U)
  840. #define CSL_AES_S_LOCKDOWN_LENGTH_LOCK_MASK (0x00000020U)
  841. #define CSL_AES_S_LOCKDOWN_LENGTH_LOCK_SHIFT (5U)
  842. #define CSL_AES_S_LOCKDOWN_LENGTH_LOCK_RESETVAL (0x00000000U)
  843. #define CSL_AES_S_LOCKDOWN_LENGTH_LOCK_MAX (0x00000001U)
  844. #define CSL_AES_S_LOCKDOWN_KEY2_LOCK_MASK (0x00000002U)
  845. #define CSL_AES_S_LOCKDOWN_KEY2_LOCK_SHIFT (1U)
  846. #define CSL_AES_S_LOCKDOWN_KEY2_LOCK_RESETVAL (0x00000000U)
  847. #define CSL_AES_S_LOCKDOWN_KEY2_LOCK_MAX (0x00000001U)
  848. #define CSL_AES_S_LOCKDOWN_KEY3_LOCK_MASK (0x00000004U)
  849. #define CSL_AES_S_LOCKDOWN_KEY3_LOCK_SHIFT (2U)
  850. #define CSL_AES_S_LOCKDOWN_KEY3_LOCK_RESETVAL (0x00000000U)
  851. #define CSL_AES_S_LOCKDOWN_KEY3_LOCK_MAX (0x00000001U)
  852. #define CSL_AES_S_LOCKDOWN_RESETVAL (0x00000000U)
  853. /* P_KEY2_6 */
  854. #define CSL_AES_P_KEY2_6_KEY_MASK (0xFFFFFFFFU)
  855. #define CSL_AES_P_KEY2_6_KEY_SHIFT (0U)
  856. #define CSL_AES_P_KEY2_6_KEY_RESETVAL (0x00000000U)
  857. #define CSL_AES_P_KEY2_6_KEY_MAX (0xffffffffU)
  858. #define CSL_AES_P_KEY2_6_RESETVAL (0x00000000U)
  859. /* P_KEY2_7 */
  860. #define CSL_AES_P_KEY2_7_KEY_MASK (0xFFFFFFFFU)
  861. #define CSL_AES_P_KEY2_7_KEY_SHIFT (0U)
  862. #define CSL_AES_P_KEY2_7_KEY_RESETVAL (0x00000000U)
  863. #define CSL_AES_P_KEY2_7_KEY_MAX (0xffffffffU)
  864. #define CSL_AES_P_KEY2_7_RESETVAL (0x00000000U)
  865. /* P_KEY2_4 */
  866. #define CSL_AES_P_KEY2_4_KEY_MASK (0xFFFFFFFFU)
  867. #define CSL_AES_P_KEY2_4_KEY_SHIFT (0U)
  868. #define CSL_AES_P_KEY2_4_KEY_RESETVAL (0x00000000U)
  869. #define CSL_AES_P_KEY2_4_KEY_MAX (0xffffffffU)
  870. #define CSL_AES_P_KEY2_4_RESETVAL (0x00000000U)
  871. /* P_KEY2_5 */
  872. #define CSL_AES_P_KEY2_5_KEY_MASK (0xFFFFFFFFU)
  873. #define CSL_AES_P_KEY2_5_KEY_SHIFT (0U)
  874. #define CSL_AES_P_KEY2_5_KEY_RESETVAL (0x00000000U)
  875. #define CSL_AES_P_KEY2_5_KEY_MAX (0xffffffffU)
  876. #define CSL_AES_P_KEY2_5_RESETVAL (0x00000000U)
  877. /* P_KEY2_2 */
  878. #define CSL_AES_P_KEY2_2_KEY_MASK (0xFFFFFFFFU)
  879. #define CSL_AES_P_KEY2_2_KEY_SHIFT (0U)
  880. #define CSL_AES_P_KEY2_2_KEY_RESETVAL (0x00000000U)
  881. #define CSL_AES_P_KEY2_2_KEY_MAX (0xffffffffU)
  882. #define CSL_AES_P_KEY2_2_RESETVAL (0x00000000U)
  883. /* P_KEY2_3 */
  884. #define CSL_AES_P_KEY2_3_KEY_MASK (0xFFFFFFFFU)
  885. #define CSL_AES_P_KEY2_3_KEY_SHIFT (0U)
  886. #define CSL_AES_P_KEY2_3_KEY_RESETVAL (0x00000000U)
  887. #define CSL_AES_P_KEY2_3_KEY_MAX (0xffffffffU)
  888. #define CSL_AES_P_KEY2_3_RESETVAL (0x00000000U)
  889. /* P_KEY2_0 */
  890. #define CSL_AES_P_KEY2_0_KEY_MASK (0xFFFFFFFFU)
  891. #define CSL_AES_P_KEY2_0_KEY_SHIFT (0U)
  892. #define CSL_AES_P_KEY2_0_KEY_RESETVAL (0x00000000U)
  893. #define CSL_AES_P_KEY2_0_KEY_MAX (0xffffffffU)
  894. #define CSL_AES_P_KEY2_0_RESETVAL (0x00000000U)
  895. /* P_KEY2_1 */
  896. #define CSL_AES_P_KEY2_1_KEY_MASK (0xFFFFFFFFU)
  897. #define CSL_AES_P_KEY2_1_KEY_SHIFT (0U)
  898. #define CSL_AES_P_KEY2_1_KEY_RESETVAL (0x00000000U)
  899. #define CSL_AES_P_KEY2_1_KEY_MAX (0xffffffffU)
  900. #define CSL_AES_P_KEY2_1_RESETVAL (0x00000000U)
  901. /* P_KEY1_6 */
  902. #define CSL_AES_P_KEY1_6_KEY_MASK (0xFFFFFFFFU)
  903. #define CSL_AES_P_KEY1_6_KEY_SHIFT (0U)
  904. #define CSL_AES_P_KEY1_6_KEY_RESETVAL (0x00000000U)
  905. #define CSL_AES_P_KEY1_6_KEY_MAX (0xffffffffU)
  906. #define CSL_AES_P_KEY1_6_RESETVAL (0x00000000U)
  907. /* P_KEY1_7 */
  908. #define CSL_AES_P_KEY1_7_KEY_MASK (0xFFFFFFFFU)
  909. #define CSL_AES_P_KEY1_7_KEY_SHIFT (0U)
  910. #define CSL_AES_P_KEY1_7_KEY_RESETVAL (0x00000000U)
  911. #define CSL_AES_P_KEY1_7_KEY_MAX (0xffffffffU)
  912. #define CSL_AES_P_KEY1_7_RESETVAL (0x00000000U)
  913. /* P_KEY1_4 */
  914. #define CSL_AES_P_KEY1_4_KEY_MASK (0xFFFFFFFFU)
  915. #define CSL_AES_P_KEY1_4_KEY_SHIFT (0U)
  916. #define CSL_AES_P_KEY1_4_KEY_RESETVAL (0x00000000U)
  917. #define CSL_AES_P_KEY1_4_KEY_MAX (0xffffffffU)
  918. #define CSL_AES_P_KEY1_4_RESETVAL (0x00000000U)
  919. /* P_KEY1_5 */
  920. #define CSL_AES_P_KEY1_5_KEY_MASK (0xFFFFFFFFU)
  921. #define CSL_AES_P_KEY1_5_KEY_SHIFT (0U)
  922. #define CSL_AES_P_KEY1_5_KEY_RESETVAL (0x00000000U)
  923. #define CSL_AES_P_KEY1_5_KEY_MAX (0xffffffffU)
  924. #define CSL_AES_P_KEY1_5_RESETVAL (0x00000000U)
  925. /* P_KEY1_2 */
  926. #define CSL_AES_P_KEY1_2_KEY_MASK (0xFFFFFFFFU)
  927. #define CSL_AES_P_KEY1_2_KEY_SHIFT (0U)
  928. #define CSL_AES_P_KEY1_2_KEY_RESETVAL (0x00000000U)
  929. #define CSL_AES_P_KEY1_2_KEY_MAX (0xffffffffU)
  930. #define CSL_AES_P_KEY1_2_RESETVAL (0x00000000U)
  931. /* P_KEY1_3 */
  932. #define CSL_AES_P_KEY1_3_KEY_MASK (0xFFFFFFFFU)
  933. #define CSL_AES_P_KEY1_3_KEY_SHIFT (0U)
  934. #define CSL_AES_P_KEY1_3_KEY_RESETVAL (0x00000000U)
  935. #define CSL_AES_P_KEY1_3_KEY_MAX (0xffffffffU)
  936. #define CSL_AES_P_KEY1_3_RESETVAL (0x00000000U)
  937. /* P_KEY1_0 */
  938. #define CSL_AES_P_KEY1_0_KEY_MASK (0xFFFFFFFFU)
  939. #define CSL_AES_P_KEY1_0_KEY_SHIFT (0U)
  940. #define CSL_AES_P_KEY1_0_KEY_RESETVAL (0x00000000U)
  941. #define CSL_AES_P_KEY1_0_KEY_MAX (0xffffffffU)
  942. #define CSL_AES_P_KEY1_0_RESETVAL (0x00000000U)
  943. /* P_KEY1_1 */
  944. #define CSL_AES_P_KEY1_1_KEY_MASK (0xFFFFFFFFU)
  945. #define CSL_AES_P_KEY1_1_KEY_SHIFT (0U)
  946. #define CSL_AES_P_KEY1_1_KEY_RESETVAL (0x00000000U)
  947. #define CSL_AES_P_KEY1_1_KEY_MAX (0xffffffffU)
  948. #define CSL_AES_P_KEY1_1_RESETVAL (0x00000000U)
  949. /* P_IV_IN_0 */
  950. #define CSL_AES_P_IV_IN_0_DATA_MASK (0xFFFFFFFFU)
  951. #define CSL_AES_P_IV_IN_0_DATA_SHIFT (0U)
  952. #define CSL_AES_P_IV_IN_0_DATA_RESETVAL (0x00000000U)
  953. #define CSL_AES_P_IV_IN_0_DATA_MAX (0xffffffffU)
  954. #define CSL_AES_P_IV_IN_0_RESETVAL (0x00000000U)
  955. /* P_IV_IN_1 */
  956. #define CSL_AES_P_IV_IN_1_DATA_MASK (0xFFFFFFFFU)
  957. #define CSL_AES_P_IV_IN_1_DATA_SHIFT (0U)
  958. #define CSL_AES_P_IV_IN_1_DATA_RESETVAL (0x00000000U)
  959. #define CSL_AES_P_IV_IN_1_DATA_MAX (0xffffffffU)
  960. #define CSL_AES_P_IV_IN_1_RESETVAL (0x00000000U)
  961. /* P_IV_IN_2 */
  962. #define CSL_AES_P_IV_IN_2_DATA_MASK (0xFFFFFFFFU)
  963. #define CSL_AES_P_IV_IN_2_DATA_SHIFT (0U)
  964. #define CSL_AES_P_IV_IN_2_DATA_RESETVAL (0x00000000U)
  965. #define CSL_AES_P_IV_IN_2_DATA_MAX (0xffffffffU)
  966. #define CSL_AES_P_IV_IN_2_RESETVAL (0x00000000U)
  967. /* P_IV_IN_3 */
  968. #define CSL_AES_P_IV_IN_3_DATA_MASK (0xFFFFFFFFU)
  969. #define CSL_AES_P_IV_IN_3_DATA_SHIFT (0U)
  970. #define CSL_AES_P_IV_IN_3_DATA_RESETVAL (0x00000000U)
  971. #define CSL_AES_P_IV_IN_3_DATA_MAX (0xffffffffU)
  972. #define CSL_AES_P_IV_IN_3_RESETVAL (0x00000000U)
  973. /* P_CTRL */
  974. #define CSL_AES_P_CTRL_OUTPUT_READY_MASK (0x00000001U)
  975. #define CSL_AES_P_CTRL_OUTPUT_READY_SHIFT (0U)
  976. #define CSL_AES_P_CTRL_OUTPUT_READY_RESETVAL (0x00000000U)
  977. #define CSL_AES_P_CTRL_OUTPUT_READY_MAX (0x00000001U)
  978. #define CSL_AES_P_CTRL_DIRECTION_MASK (0x00000004U)
  979. #define CSL_AES_P_CTRL_DIRECTION_SHIFT (2U)
  980. #define CSL_AES_P_CTRL_DIRECTION_RESETVAL (0x00000000U)
  981. #define CSL_AES_P_CTRL_DIRECTION_DECRYPT (0x00000000U)
  982. #define CSL_AES_P_CTRL_DIRECTION_ENCRYPT (0x00000001U)
  983. #define CSL_AES_P_CTRL_INPUT_READY_MASK (0x00000002U)
  984. #define CSL_AES_P_CTRL_INPUT_READY_SHIFT (1U)
  985. #define CSL_AES_P_CTRL_INPUT_READY_RESETVAL (0x00000000U)
  986. #define CSL_AES_P_CTRL_INPUT_READY_MAX (0x00000001U)
  987. #define CSL_AES_P_CTRL_KEY_SIZE_MASK (0x00000018U)
  988. #define CSL_AES_P_CTRL_KEY_SIZE_SHIFT (3U)
  989. #define CSL_AES_P_CTRL_KEY_SIZE_RESETVAL (0x00000000U)
  990. #define CSL_AES_P_CTRL_KEY_SIZE_RESERVED (0x00000000U)
  991. #define CSL_AES_P_CTRL_KEY_SIZE_KEY128 (0x00000001U)
  992. #define CSL_AES_P_CTRL_KEY_SIZE_KEY192 (0x00000002U)
  993. #define CSL_AES_P_CTRL_KEY_SIZE_KEY256 (0x00000003U)
  994. #define CSL_AES_P_CTRL_MODE_MASK (0x00000020U)
  995. #define CSL_AES_P_CTRL_MODE_SHIFT (5U)
  996. #define CSL_AES_P_CTRL_MODE_RESETVAL (0x00000000U)
  997. #define CSL_AES_P_CTRL_MODE_ECB (0x00000000U)
  998. #define CSL_AES_P_CTRL_MODE_CBC (0x00000001U)
  999. #define CSL_AES_P_CTRL_CTR_MASK (0x00000040U)
  1000. #define CSL_AES_P_CTRL_CTR_SHIFT (6U)
  1001. #define CSL_AES_P_CTRL_CTR_RESETVAL (0x00000000U)
  1002. #define CSL_AES_P_CTRL_CTR_NOOP (0x00000000U)
  1003. #define CSL_AES_P_CTRL_CTR_CTR (0x00000001U)
  1004. #define CSL_AES_P_CTRL_CTR_WIDTH_MASK (0x00000180U)
  1005. #define CSL_AES_P_CTRL_CTR_WIDTH_SHIFT (7U)
  1006. #define CSL_AES_P_CTRL_CTR_WIDTH_RESETVAL (0x00000000U)
  1007. #define CSL_AES_P_CTRL_CTR_WIDTH_COUNTER32 (0x00000000U)
  1008. #define CSL_AES_P_CTRL_CTR_WIDTH_COUNTER64 (0x00000001U)
  1009. #define CSL_AES_P_CTRL_CTR_WIDTH_COUNTER96 (0x00000002U)
  1010. #define CSL_AES_P_CTRL_CTR_WIDTH_COUNTER128 (0x00000003U)
  1011. #define CSL_AES_P_CTRL_ICM_MASK (0x00000200U)
  1012. #define CSL_AES_P_CTRL_ICM_SHIFT (9U)
  1013. #define CSL_AES_P_CTRL_ICM_RESETVAL (0x00000000U)
  1014. #define CSL_AES_P_CTRL_ICM_NO_ICM (0x00000000U)
  1015. #define CSL_AES_P_CTRL_ICM_ICM (0x00000001U)
  1016. #define CSL_AES_P_CTRL_CFB_MASK (0x00000400U)
  1017. #define CSL_AES_P_CTRL_CFB_SHIFT (10U)
  1018. #define CSL_AES_P_CTRL_CFB_RESETVAL (0x00000000U)
  1019. #define CSL_AES_P_CTRL_CFB_NO_CFB (0x00000000U)
  1020. #define CSL_AES_P_CTRL_CFB_CFB (0x00000001U)
  1021. #define CSL_AES_P_CTRL_XTS_MASK (0x00001800U)
  1022. #define CSL_AES_P_CTRL_XTS_SHIFT (11U)
  1023. #define CSL_AES_P_CTRL_XTS_RESETVAL (0x00000000U)
  1024. #define CSL_AES_P_CTRL_XTS_NOOP (0x00000000U)
  1025. #define CSL_AES_P_CTRL_XTS_XTS01 (0x00000001U)
  1026. #define CSL_AES_P_CTRL_XTS_XTS10 (0x00000002U)
  1027. #define CSL_AES_P_CTRL_XTS_XTS11 (0x00000003U)
  1028. #define CSL_AES_P_CTRL_F8_MASK (0x00002000U)
  1029. #define CSL_AES_P_CTRL_F8_SHIFT (13U)
  1030. #define CSL_AES_P_CTRL_F8_RESETVAL (0x00000000U)
  1031. #define CSL_AES_P_CTRL_F8_NO_F8 (0x00000000U)
  1032. #define CSL_AES_P_CTRL_F8_F8 (0x00000001U)
  1033. #define CSL_AES_P_CTRL_F9_MASK (0x00004000U)
  1034. #define CSL_AES_P_CTRL_F9_SHIFT (14U)
  1035. #define CSL_AES_P_CTRL_F9_RESETVAL (0x00000000U)
  1036. #define CSL_AES_P_CTRL_F9_NO_F9 (0x00000000U)
  1037. #define CSL_AES_P_CTRL_F9_F9 (0x00000001U)
  1038. #define CSL_AES_P_CTRL_CBCMAC_MASK (0x00008000U)
  1039. #define CSL_AES_P_CTRL_CBCMAC_SHIFT (15U)
  1040. #define CSL_AES_P_CTRL_CBCMAC_RESETVAL (0x00000000U)
  1041. #define CSL_AES_P_CTRL_CBCMAC_NO_CBCMAC (0x00000000U)
  1042. #define CSL_AES_P_CTRL_CBCMAC_CBCMAC (0x00000001U)
  1043. #define CSL_AES_P_CTRL_GCM_MASK (0x00030000U)
  1044. #define CSL_AES_P_CTRL_GCM_SHIFT (16U)
  1045. #define CSL_AES_P_CTRL_GCM_RESETVAL (0x00000000U)
  1046. #define CSL_AES_P_CTRL_GCM_NOOP (0x00000000U)
  1047. #define CSL_AES_P_CTRL_GCM_GCM01 (0x00000001U)
  1048. #define CSL_AES_P_CTRL_GCM_GCMA10 (0x00000002U)
  1049. #define CSL_AES_P_CTRL_GCM_GCM11 (0x00000003U)
  1050. #define CSL_AES_P_CTRL_CCM_MASK (0x00040000U)
  1051. #define CSL_AES_P_CTRL_CCM_SHIFT (18U)
  1052. #define CSL_AES_P_CTRL_CCM_RESETVAL (0x00000000U)
  1053. #define CSL_AES_P_CTRL_CCM_NO_CCM (0x00000000U)
  1054. #define CSL_AES_P_CTRL_CCM_CCM (0x00000001U)
  1055. #define CSL_AES_P_CTRL_CCM_L_MASK (0x00380000U)
  1056. #define CSL_AES_P_CTRL_CCM_L_SHIFT (19U)
  1057. #define CSL_AES_P_CTRL_CCM_L_RESETVAL (0x00000000U)
  1058. #define CSL_AES_P_CTRL_CCM_L_MAX (0x00000007U)
  1059. #define CSL_AES_P_CTRL_CCM_M_MASK (0x01C00000U)
  1060. #define CSL_AES_P_CTRL_CCM_M_SHIFT (22U)
  1061. #define CSL_AES_P_CTRL_CCM_M_RESETVAL (0x00000000U)
  1062. #define CSL_AES_P_CTRL_CCM_M_MAX (0x00000007U)
  1063. #define CSL_AES_P_CTRL_SAVE_CONTEXT_MASK (0x20000000U)
  1064. #define CSL_AES_P_CTRL_SAVE_CONTEXT_SHIFT (29U)
  1065. #define CSL_AES_P_CTRL_SAVE_CONTEXT_RESETVAL (0x00000000U)
  1066. #define CSL_AES_P_CTRL_SAVE_CONTEXT_MAX (0x00000001U)
  1067. #define CSL_AES_P_CTRL_SAVE_CONTEXT_READY_MASK (0x40000000U)
  1068. #define CSL_AES_P_CTRL_SAVE_CONTEXT_READY_SHIFT (30U)
  1069. #define CSL_AES_P_CTRL_SAVE_CONTEXT_READY_RESETVAL (0x00000000U)
  1070. #define CSL_AES_P_CTRL_SAVE_CONTEXT_READY_MAX (0x00000001U)
  1071. #define CSL_AES_P_CTRL_CONTEXT_READY_MASK (0x80000000U)
  1072. #define CSL_AES_P_CTRL_CONTEXT_READY_SHIFT (31U)
  1073. #define CSL_AES_P_CTRL_CONTEXT_READY_RESETVAL (0x00000001U)
  1074. #define CSL_AES_P_CTRL_CONTEXT_READY_MAX (0x00000001U)
  1075. #define CSL_AES_P_CTRL_RESETVAL (0x80000000U)
  1076. /* P_C_LENGTH_0 */
  1077. #define CSL_AES_P_C_LENGTH_0_LENGTH_MASK (0xFFFFFFFFU)
  1078. #define CSL_AES_P_C_LENGTH_0_LENGTH_SHIFT (0U)
  1079. #define CSL_AES_P_C_LENGTH_0_LENGTH_RESETVAL (0x00000000U)
  1080. #define CSL_AES_P_C_LENGTH_0_LENGTH_MAX (0xffffffffU)
  1081. #define CSL_AES_P_C_LENGTH_0_RESETVAL (0x00000000U)
  1082. /* P_C_LENGTH_1 */
  1083. #define CSL_AES_P_C_LENGTH_1_LENGTH_MASK (0x1FFFFFFFU)
  1084. #define CSL_AES_P_C_LENGTH_1_LENGTH_SHIFT (0U)
  1085. #define CSL_AES_P_C_LENGTH_1_LENGTH_RESETVAL (0x00000000U)
  1086. #define CSL_AES_P_C_LENGTH_1_LENGTH_MAX (0x1fffffffU)
  1087. #define CSL_AES_P_C_LENGTH_1_RESETVAL (0x00000000U)
  1088. /* P_AUTH_LENGTH */
  1089. #define CSL_AES_P_AUTH_LENGTH_AUTH_MASK (0xFFFFFFFFU)
  1090. #define CSL_AES_P_AUTH_LENGTH_AUTH_SHIFT (0U)
  1091. #define CSL_AES_P_AUTH_LENGTH_AUTH_RESETVAL (0x00000000U)
  1092. #define CSL_AES_P_AUTH_LENGTH_AUTH_MAX (0xffffffffU)
  1093. #define CSL_AES_P_AUTH_LENGTH_RESETVAL (0x00000000U)
  1094. /* P_DATA_IN_0 */
  1095. #define CSL_AES_P_DATA_IN_0_DATA_MASK (0xFFFFFFFFU)
  1096. #define CSL_AES_P_DATA_IN_0_DATA_SHIFT (0U)
  1097. #define CSL_AES_P_DATA_IN_0_DATA_RESETVAL (0x00000000U)
  1098. #define CSL_AES_P_DATA_IN_0_DATA_MAX (0xffffffffU)
  1099. #define CSL_AES_P_DATA_IN_0_RESETVAL (0x00000000U)
  1100. /* P_DATA_IN_1 */
  1101. #define CSL_AES_P_DATA_IN_1_DATA_MASK (0xFFFFFFFFU)
  1102. #define CSL_AES_P_DATA_IN_1_DATA_SHIFT (0U)
  1103. #define CSL_AES_P_DATA_IN_1_DATA_RESETVAL (0x00000000U)
  1104. #define CSL_AES_P_DATA_IN_1_DATA_MAX (0xffffffffU)
  1105. #define CSL_AES_P_DATA_IN_1_RESETVAL (0x00000000U)
  1106. /* P_DATA_IN_2 */
  1107. #define CSL_AES_P_DATA_IN_2_DATA_MASK (0xFFFFFFFFU)
  1108. #define CSL_AES_P_DATA_IN_2_DATA_SHIFT (0U)
  1109. #define CSL_AES_P_DATA_IN_2_DATA_RESETVAL (0x00000000U)
  1110. #define CSL_AES_P_DATA_IN_2_DATA_MAX (0xffffffffU)
  1111. #define CSL_AES_P_DATA_IN_2_RESETVAL (0x00000000U)
  1112. /* P_DATA_IN_3 */
  1113. #define CSL_AES_P_DATA_IN_3_DATA_MASK (0xFFFFFFFFU)
  1114. #define CSL_AES_P_DATA_IN_3_DATA_SHIFT (0U)
  1115. #define CSL_AES_P_DATA_IN_3_DATA_RESETVAL (0x00000000U)
  1116. #define CSL_AES_P_DATA_IN_3_DATA_MAX (0xffffffffU)
  1117. #define CSL_AES_P_DATA_IN_3_RESETVAL (0x00000000U)
  1118. /* P_TAG_OUT_0 */
  1119. #define CSL_AES_P_TAG_OUT_0_HASH_MASK (0xFFFFFFFFU)
  1120. #define CSL_AES_P_TAG_OUT_0_HASH_SHIFT (0U)
  1121. #define CSL_AES_P_TAG_OUT_0_HASH_RESETVAL (0x00000000U)
  1122. #define CSL_AES_P_TAG_OUT_0_HASH_MAX (0xffffffffU)
  1123. #define CSL_AES_P_TAG_OUT_0_RESETVAL (0x00000000U)
  1124. /* P_TAG_OUT_1 */
  1125. #define CSL_AES_P_TAG_OUT_1_HASH_MASK (0xFFFFFFFFU)
  1126. #define CSL_AES_P_TAG_OUT_1_HASH_SHIFT (0U)
  1127. #define CSL_AES_P_TAG_OUT_1_HASH_RESETVAL (0x00000000U)
  1128. #define CSL_AES_P_TAG_OUT_1_HASH_MAX (0xffffffffU)
  1129. #define CSL_AES_P_TAG_OUT_1_RESETVAL (0x00000000U)
  1130. /* P_TAG_OUT_2 */
  1131. #define CSL_AES_P_TAG_OUT_2_HASH_MASK (0xFFFFFFFFU)
  1132. #define CSL_AES_P_TAG_OUT_2_HASH_SHIFT (0U)
  1133. #define CSL_AES_P_TAG_OUT_2_HASH_RESETVAL (0x00000000U)
  1134. #define CSL_AES_P_TAG_OUT_2_HASH_MAX (0xffffffffU)
  1135. #define CSL_AES_P_TAG_OUT_2_RESETVAL (0x00000000U)
  1136. /* P_TAG_OUT_3 */
  1137. #define CSL_AES_P_TAG_OUT_3_HASH_MASK (0xFFFFFFFFU)
  1138. #define CSL_AES_P_TAG_OUT_3_HASH_SHIFT (0U)
  1139. #define CSL_AES_P_TAG_OUT_3_HASH_RESETVAL (0x00000000U)
  1140. #define CSL_AES_P_TAG_OUT_3_HASH_MAX (0xffffffffU)
  1141. #define CSL_AES_P_TAG_OUT_3_RESETVAL (0x00000000U)
  1142. /* P_REVISION */
  1143. #define CSL_AES_P_REVISION_Y_MINOR_MASK (0x0000003FU)
  1144. #define CSL_AES_P_REVISION_Y_MINOR_SHIFT (0U)
  1145. #define CSL_AES_P_REVISION_Y_MINOR_RESETVAL (0x00000000U)
  1146. #define CSL_AES_P_REVISION_Y_MINOR_MAX (0x0000003fU)
  1147. #define CSL_AES_P_REVISION_CUSTOM_MASK (0x000000C0U)
  1148. #define CSL_AES_P_REVISION_CUSTOM_SHIFT (6U)
  1149. #define CSL_AES_P_REVISION_CUSTOM_RESETVAL (0x00000000U)
  1150. #define CSL_AES_P_REVISION_CUSTOM_STANDARD (0x00000000U)
  1151. #define CSL_AES_P_REVISION_X_MAJOR_MASK (0x00000700U)
  1152. #define CSL_AES_P_REVISION_X_MAJOR_SHIFT (8U)
  1153. #define CSL_AES_P_REVISION_X_MAJOR_RESETVAL (0x00000000U)
  1154. #define CSL_AES_P_REVISION_X_MAJOR_MAX (0x00000007U)
  1155. #define CSL_AES_P_REVISION_R_RTL_MASK (0x0000F800U)
  1156. #define CSL_AES_P_REVISION_R_RTL_SHIFT (11U)
  1157. #define CSL_AES_P_REVISION_R_RTL_RESETVAL (0x00000000U)
  1158. #define CSL_AES_P_REVISION_R_RTL_MAX (0x0000001fU)
  1159. #define CSL_AES_P_REVISION_FUNC_MASK (0x0FFF0000U)
  1160. #define CSL_AES_P_REVISION_FUNC_SHIFT (16U)
  1161. #define CSL_AES_P_REVISION_FUNC_RESETVAL (0x00000000U)
  1162. #define CSL_AES_P_REVISION_FUNC_MAX (0x00000fffU)
  1163. #define CSL_AES_P_REVISION_SCHEME_MASK (0xC0000000U)
  1164. #define CSL_AES_P_REVISION_SCHEME_SHIFT (30U)
  1165. #define CSL_AES_P_REVISION_SCHEME_RESETVAL (0x00000000U)
  1166. #define CSL_AES_P_REVISION_SCHEME_H08 (0x00000001U)
  1167. #define CSL_AES_P_REVISION_SCHEME_LEGACY (0x00000000U)
  1168. #define CSL_AES_P_REVISION_RESETVAL (0x00000000U)
  1169. /* P_SYSCONFIG */
  1170. #define CSL_AES_P_SYSCONFIG_DMA_REQ_DATA_IN_EN_MASK (0x00000020U)
  1171. #define CSL_AES_P_SYSCONFIG_DMA_REQ_DATA_IN_EN_SHIFT (5U)
  1172. #define CSL_AES_P_SYSCONFIG_DMA_REQ_DATA_IN_EN_RESETVAL (0x00000000U)
  1173. #define CSL_AES_P_SYSCONFIG_DMA_REQ_DATA_IN_EN_DMA_DIS (0x00000000U)
  1174. #define CSL_AES_P_SYSCONFIG_DMA_REQ_DATA_IN_EN_DMA_EN (0x00000001U)
  1175. #define CSL_AES_P_SYSCONFIG_DMA_REQ_DATA_OUT_EN_MASK (0x00000040U)
  1176. #define CSL_AES_P_SYSCONFIG_DMA_REQ_DATA_OUT_EN_SHIFT (6U)
  1177. #define CSL_AES_P_SYSCONFIG_DMA_REQ_DATA_OUT_EN_RESETVAL (0x00000000U)
  1178. #define CSL_AES_P_SYSCONFIG_DMA_REQ_DATA_OUT_EN_DMA_DIS (0x00000000U)
  1179. #define CSL_AES_P_SYSCONFIG_DMA_REQ_DATA_OUT_EN_DMA_EN (0x00000001U)
  1180. #define CSL_AES_P_SYSCONFIG_DMA_REQ_CONTEXT_IN_EN_MASK (0x00000080U)
  1181. #define CSL_AES_P_SYSCONFIG_DMA_REQ_CONTEXT_IN_EN_SHIFT (7U)
  1182. #define CSL_AES_P_SYSCONFIG_DMA_REQ_CONTEXT_IN_EN_RESETVAL (0x00000000U)
  1183. #define CSL_AES_P_SYSCONFIG_DMA_REQ_CONTEXT_IN_EN_DMA_DIS (0x00000000U)
  1184. #define CSL_AES_P_SYSCONFIG_DMA_REQ_CONTEXT_IN_EN_DMA_EN (0x00000001U)
  1185. #define CSL_AES_P_SYSCONFIG_DMA_REQ_CONTEXT_OUT_EN_MASK (0x00000100U)
  1186. #define CSL_AES_P_SYSCONFIG_DMA_REQ_CONTEXT_OUT_EN_SHIFT (8U)
  1187. #define CSL_AES_P_SYSCONFIG_DMA_REQ_CONTEXT_OUT_EN_RESETVAL (0x00000000U)
  1188. #define CSL_AES_P_SYSCONFIG_DMA_REQ_CONTEXT_OUT_EN_DMA_DIS (0x00000000U)
  1189. #define CSL_AES_P_SYSCONFIG_DMA_REQ_CONTEXT_OUT_EN_DMA_EN (0x00000001U)
  1190. #define CSL_AES_P_SYSCONFIG_MAP_CONTEXT_OUT_ON_DATA_MASK (0x00000200U)
  1191. #define CSL_AES_P_SYSCONFIG_MAP_CONTEXT_OUT_ON_DATA_SHIFT (9U)
  1192. #define CSL_AES_P_SYSCONFIG_MAP_CONTEXT_OUT_ON_DATA_RESETVAL (0x00000000U)
  1193. #define CSL_AES_P_SYSCONFIG_MAP_CONTEXT_OUT_ON_DATA_MAX (0x00000001U)
  1194. #define CSL_AES_P_SYSCONFIG_RESETVAL (0x00000000U)
  1195. /* P_SYSSTS */
  1196. #define CSL_AES_P_SYSSTS_RESETDONE_MASK (0x00000001U)
  1197. #define CSL_AES_P_SYSSTS_RESETDONE_SHIFT (0U)
  1198. #define CSL_AES_P_SYSSTS_RESETDONE_RESETVAL (0x00000000U)
  1199. #define CSL_AES_P_SYSSTS_RESETDONE_MAX (0x00000001U)
  1200. #define CSL_AES_P_SYSSTS_RESETVAL (0x00000000U)
  1201. /* P_IRQSTS */
  1202. #define CSL_AES_P_IRQSTS_CONTEX_IN_MASK (0x00000001U)
  1203. #define CSL_AES_P_IRQSTS_CONTEX_IN_SHIFT (0U)
  1204. #define CSL_AES_P_IRQSTS_CONTEX_IN_RESETVAL (0x00000000U)
  1205. #define CSL_AES_P_IRQSTS_CONTEX_IN_MAX (0x00000001U)
  1206. #define CSL_AES_P_IRQSTS_DATA_IN_MASK (0x00000002U)
  1207. #define CSL_AES_P_IRQSTS_DATA_IN_SHIFT (1U)
  1208. #define CSL_AES_P_IRQSTS_DATA_IN_RESETVAL (0x00000000U)
  1209. #define CSL_AES_P_IRQSTS_DATA_IN_MAX (0x00000001U)
  1210. #define CSL_AES_P_IRQSTS_DATA_OUT_MASK (0x00000004U)
  1211. #define CSL_AES_P_IRQSTS_DATA_OUT_SHIFT (2U)
  1212. #define CSL_AES_P_IRQSTS_DATA_OUT_RESETVAL (0x00000000U)
  1213. #define CSL_AES_P_IRQSTS_DATA_OUT_MAX (0x00000001U)
  1214. #define CSL_AES_P_IRQSTS_CONTEXT_OUT_MASK (0x00000008U)
  1215. #define CSL_AES_P_IRQSTS_CONTEXT_OUT_SHIFT (3U)
  1216. #define CSL_AES_P_IRQSTS_CONTEXT_OUT_RESETVAL (0x00000000U)
  1217. #define CSL_AES_P_IRQSTS_CONTEXT_OUT_MAX (0x00000001U)
  1218. #define CSL_AES_P_IRQSTS_RESETVAL (0x00000000U)
  1219. /* P_IRQEN */
  1220. #define CSL_AES_P_IRQEN_CONTEX_IN_MASK (0x00000001U)
  1221. #define CSL_AES_P_IRQEN_CONTEX_IN_SHIFT (0U)
  1222. #define CSL_AES_P_IRQEN_CONTEX_IN_RESETVAL (0x00000000U)
  1223. #define CSL_AES_P_IRQEN_CONTEX_IN_MAX (0x00000001U)
  1224. #define CSL_AES_P_IRQEN_DATA_IN_MASK (0x00000002U)
  1225. #define CSL_AES_P_IRQEN_DATA_IN_SHIFT (1U)
  1226. #define CSL_AES_P_IRQEN_DATA_IN_RESETVAL (0x00000000U)
  1227. #define CSL_AES_P_IRQEN_DATA_IN_MAX (0x00000001U)
  1228. #define CSL_AES_P_IRQEN_DATA_OUT_MASK (0x00000004U)
  1229. #define CSL_AES_P_IRQEN_DATA_OUT_SHIFT (2U)
  1230. #define CSL_AES_P_IRQEN_DATA_OUT_RESETVAL (0x00000000U)
  1231. #define CSL_AES_P_IRQEN_DATA_OUT_MAX (0x00000001U)
  1232. #define CSL_AES_P_IRQEN_CONTEXT_OUT_MASK (0x00000008U)
  1233. #define CSL_AES_P_IRQEN_CONTEXT_OUT_SHIFT (3U)
  1234. #define CSL_AES_P_IRQEN_CONTEXT_OUT_RESETVAL (0x00000000U)
  1235. #define CSL_AES_P_IRQEN_CONTEXT_OUT_MAX (0x00000001U)
  1236. #define CSL_AES_P_IRQEN_RESETVAL (0x00000000U)
  1237. #ifdef __cplusplus
  1238. }
  1239. #endif
  1240. #endif