csl_gpioAux.h 33 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315
  1. /**
  2. * @file csl_gpioAux.h
  3. *
  4. * @brief
  5. * This is the GPIO Auxilary Header File which exposes the various
  6. * CSL Functional Layer API's to configure the GPIO Module.
  7. *
  8. * \par
  9. * ============================================================================
  10. * @n (C) Copyright 2009,2016 Texas Instruments, Inc.
  11. *
  12. * Redistribution and use in source and binary forms, with or without
  13. * modification, are permitted provided that the following conditions
  14. * are met:
  15. *
  16. * Redistributions of source code must retain the above copyright
  17. * notice, this list of conditions and the following disclaimer.
  18. *
  19. * Redistributions in binary form must reproduce the above copyright
  20. * notice, this list of conditions and the following disclaimer in the
  21. * documentation and/or other materials provided with the
  22. * distribution.
  23. *
  24. * Neither the name of Texas Instruments Incorporated nor the names of
  25. * its contributors may be used to endorse or promote products derived
  26. * from this software without specific prior written permission.
  27. *
  28. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  29. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  30. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  31. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  32. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  33. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  34. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  35. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  36. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  37. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  38. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  39. *
  40. */
  41. #ifndef CSL_GPIOAUX_H
  42. #define CSL_GPIOAUX_H
  43. #include <ti/csl/csl_gpio.h>
  44. #ifdef __cplusplus
  45. extern "C" {
  46. #endif
  47. /** @addtogroup CSL_GPIO_FUNCTION
  48. @{ */
  49. /** ============================================================================
  50. * @n@b CSL_GPIO_getPID
  51. *
  52. * @b Description
  53. * @n This function reads the peripheral ID register which identifies the
  54. * scheme of PID encoding, function, rtl id, major id, custom id and minor id.
  55. *
  56. * @b Arguments
  57. @verbatim
  58. scheme Scheme of PID encoding
  59. function GPIO function
  60. rtl RTL ID of GPIO module
  61. major Major ID of GPIO module
  62. custom Custom ID of GPIO module
  63. minor Minor ID of GPIO module
  64. @endverbatim
  65. *
  66. * <b> Return Value </b>
  67. * @n None
  68. *
  69. * <b> Pre Condition </b>
  70. * @n CSL_GPIO_open() must be called
  71. *
  72. * <b> Post Condition </b>
  73. * @n None
  74. *
  75. * @b Reads
  76. * @n GPIO_PID_SCHEME,GPIO_PID_FUNC,GPIO_PID_RTL,GPIO_PID_MAJOR,GPIO_PID_CUSTOM,GPIO_PID_MINOR
  77. *
  78. * @b Example
  79. * @verbatim
  80. CSL_GpioHandle hGpio;
  81. Uint16 function;
  82. Uint8 scheme, rtl, major, custom, minor;
  83. // Open the CSL GPIO Module 0
  84. hGpio = CSL_GPIO_open (0);
  85. ...
  86. // Get the GPIO Peripheral Identification.
  87. CSL_GPIO_getPID (hGpio, &scheme, &function, &rtl, &major, &custom, &minor);
  88. ...
  89. @endverbatim
  90. * =============================================================================
  91. */
  92. /*for misra warning*/
  93. static inline void CSL_GPIO_getPID
  94. (
  95. CSL_GpioHandle hGpio,
  96. Uint8 *scheme,
  97. Uint16 *function,
  98. Uint8 *rtl,
  99. Uint8 *major,
  100. Uint8 *custom,
  101. Uint8 *minor
  102. );
  103. static inline void CSL_GPIO_getPID
  104. (
  105. CSL_GpioHandle hGpio,
  106. Uint8 *scheme,
  107. Uint16 *function,
  108. Uint8 *rtl,
  109. Uint8 *major,
  110. Uint8 *custom,
  111. Uint8 *minor
  112. )
  113. {
  114. Uint32 value = hGpio->PID;
  115. *scheme = (Uint8)CSL_FEXT (value, GPIO_PID_SCHEME);
  116. *function = (Uint16)CSL_FEXT (value, GPIO_PID_FUNC);
  117. *rtl = (Uint8)CSL_FEXT (value, GPIO_PID_RTL);
  118. *major = (Uint8)CSL_FEXT (value, GPIO_PID_MAJOR);
  119. *custom = (Uint8)CSL_FEXT (value, GPIO_PID_CUSTOM);
  120. *minor = (Uint8)CSL_FEXT (value, GPIO_PID_MINOR);
  121. }
  122. /** ============================================================================
  123. * @n@b CSL_GPIO_getPCR
  124. *
  125. * @b Description
  126. * @n This function reads the peripheral Control register which identifies the
  127. * emulation mode.
  128. *
  129. * @b Arguments
  130. @verbatim
  131. soft Used in conjunction with FREE bit to determine
  132. the emulation suspend mode. GPIO has FREE bit set to 1
  133. so SOFT bit does not affect functionality.
  134. free For GPIO, the FREE bit is fixed at 1, which
  135. means GPIO runs free in emulation suspend.
  136. @endverbatim
  137. *
  138. * <b> Return Value </b>
  139. * @n None
  140. *
  141. * <b> Pre Condition </b>
  142. * @n CSL_GPIO_open() must be called
  143. *
  144. * <b> Post Condition </b>
  145. * @n None
  146. *
  147. * @b Reads
  148. * @n GPIO_PCR_SOFT,GPIO_PCR_FREE
  149. *
  150. * @b Example
  151. * @verbatim
  152. CSL_GpioHandle hGpio;
  153. Uint8 soft, free;
  154. ...
  155. // Open the CSL GPIO Module 0
  156. hGpio = CSL_GPIO_open (0);
  157. // Get the GPIO Peripheral Control register configuration.
  158. CSL_GPIO_getPCR (hGpio, &soft, &free);
  159. ...
  160. @endverbatim
  161. * =============================================================================
  162. */
  163. /*for misra warning*/
  164. static inline void CSL_GPIO_getPCR
  165. (
  166. CSL_GpioHandle hGpio,
  167. Uint8 *soft,
  168. Uint8 *free
  169. );
  170. static inline void CSL_GPIO_getPCR
  171. (
  172. CSL_GpioHandle hGpio,
  173. Uint8 *soft,
  174. Uint8 *free
  175. )
  176. {
  177. Uint32 value = hGpio->PCR;
  178. *soft = (Uint8)CSL_FEXT (value, GPIO_PCR_SOFT);
  179. *free = (Uint8)CSL_FEXT (value, GPIO_PCR_FREE);
  180. }
  181. /** ============================================================================
  182. * @n@b CSL_GPIO_bankInterruptEnable
  183. *
  184. * @b Description
  185. * @n This function enables the GPIO per bank interrupt. Each bank supports 16 GPIO signals.
  186. *
  187. * @b Arguments
  188. @verbatim
  189. hGpio Handle of the GPIO device
  190. bankNum GPIO Bank Number
  191. @endverbatim
  192. *
  193. * <b> Return Value </b>
  194. * @n None
  195. *
  196. * <b> Pre Condition </b>
  197. * @n CSL_GPIO_open() must be called
  198. *
  199. * <b> Post Condition </b>
  200. * @n None
  201. *
  202. * @b Writes
  203. * @n GPIO_BINTEN_EN=1
  204. *
  205. * @b Example
  206. * @verbatim
  207. CSL_GpioHandle hGpio;
  208. Uint8 bankNum = 0;
  209. // Open the CSL GPIO Module 0
  210. hGpio = CSL_GPIO_open (0);
  211. ...
  212. // Enable GPIO per bank interrupt for bank zero
  213. CSL_GPIO_bankInterruptEnable (hGpio, bankNum);
  214. ...
  215. @endverbatim
  216. * =============================================================================
  217. */
  218. /*for misra warning*/
  219. static inline void CSL_GPIO_bankInterruptEnable
  220. (
  221. CSL_GpioHandle hGpio,
  222. Uint8 bankNum
  223. );
  224. static inline void CSL_GPIO_bankInterruptEnable
  225. (
  226. CSL_GpioHandle hGpio,
  227. Uint8 bankNum
  228. )
  229. {
  230. CSL_FINSR (hGpio->BINTEN, bankNum, bankNum, 1U);
  231. return;
  232. }
  233. /** ============================================================================
  234. * @n@b CSL_GPIO_bankInterruptDisable
  235. *
  236. * @b Description
  237. * @n This function disables the GPIO per bank interrupt. Each bank supports 16 GPIO signals.
  238. *
  239. * @b Arguments
  240. @verbatim
  241. hGpio Handle of the GPIO device
  242. bankNum GPIO Bank Number
  243. @endverbatim
  244. *
  245. * <b> Return Value </b>
  246. * @n None
  247. *
  248. * <b> Pre Condition </b>
  249. * @n CSL_GPIO_open() must be called
  250. *
  251. * <b> Post Condition </b>
  252. * @n None
  253. *
  254. * @b Writes
  255. * @n GPIO_BINTEN_EN=0
  256. *
  257. * @b Example
  258. * @verbatim
  259. CSL_GpioHandle hGpio;
  260. Uint8 bankNum = 0;
  261. // Open the CSL GPIO Module 0
  262. hGpio = CSL_GPIO_open (0);
  263. ...
  264. // Disable GPIO per bank interrupt for bank zero
  265. CSL_GPIO_bankInterruptDisable (hGpio, bankNum);
  266. ...
  267. @endverbatim
  268. * =============================================================================
  269. */
  270. /*for misra warning*/
  271. static inline void CSL_GPIO_bankInterruptDisable
  272. (
  273. CSL_GpioHandle hGpio,
  274. Uint8 bankNum
  275. );
  276. static inline void CSL_GPIO_bankInterruptDisable
  277. (
  278. CSL_GpioHandle hGpio,
  279. Uint8 bankNum
  280. )
  281. {
  282. CSL_FINSR (hGpio->BINTEN, bankNum, bankNum, 0U);
  283. return;
  284. }
  285. /** ============================================================================
  286. * @n@b CSL_GPIO_isBankInterruptEnabled
  287. *
  288. * @b Description
  289. * @n This function returns the status of GPIO per bank interrupt. Each bank supports 16 GPIO signals.
  290. *
  291. * @b Arguments
  292. @verbatim
  293. hGpio Handle of the GPIO device
  294. bankNum GPIO Bank Number
  295. @endverbatim
  296. *
  297. * <b> Return Value </b>
  298. * @n TRUE - Interrupt is enabled
  299. * @n FALSE - Interrupt is disabled
  300. *
  301. * <b> Pre Condition </b>
  302. * @n CSL_GPIO_open() must be called
  303. *
  304. * <b> Post Condition </b>
  305. * @n None
  306. *
  307. * @b Reads
  308. * @n GPIO_BINTEN_EN
  309. *
  310. * @b Example
  311. * @verbatim
  312. CSL_GpioHandle hGpio;
  313. // Open the CSL GPIO Module 0
  314. hGpio = CSL_GPIO_open (0);
  315. ...
  316. // Check if GPIO per bank interrupt is enabled or disabled
  317. if (CSL_GPIO_isBankInterruptEnabled (hGpio) == TRUE)
  318. {
  319. // GPIO per bank interrupt is ENABLED
  320. }
  321. else
  322. {
  323. // GPIO per bank interrupt is DISABLED
  324. }
  325. ...
  326. @endverbatim
  327. * =============================================================================
  328. */
  329. /*for misra warning*/
  330. static inline Bool CSL_GPIO_isBankInterruptEnabled
  331. (
  332. CSL_GpioHandle hGpio,
  333. Uint8 bankNum
  334. );
  335. static inline Bool CSL_GPIO_isBankInterruptEnabled
  336. (
  337. CSL_GpioHandle hGpio,
  338. Uint8 bankNum
  339. )
  340. {
  341. Bool ret_val;
  342. if (CSL_FEXTR (hGpio->BINTEN, (Uint32)bankNum, (Uint32)bankNum) == 1U)
  343. {
  344. ret_val = TRUE;
  345. }
  346. else
  347. {
  348. ret_val = FALSE;
  349. }
  350. return ret_val;
  351. }
  352. /** ============================================================================
  353. * @n@b CSL_GPIO_setPinDirOutput
  354. *
  355. * @b Description
  356. * @n This function sets the direction of GPIO pin as an output pin.
  357. *
  358. * @b Arguments
  359. @verbatim
  360. hGpio Handle of the GPIO device
  361. pinNum GPIO Pin Number
  362. @endverbatim
  363. *
  364. * <b> Return Value </b>
  365. * @n None
  366. *
  367. * <b> Pre Condition </b>
  368. * @n CSL_GPIO_open() must be called
  369. *
  370. * <b> Post Condition </b>
  371. * @n None
  372. *
  373. * @b Writes
  374. * @n GPIO_DIR_DIR=0
  375. *
  376. * @b Example
  377. * @verbatim
  378. CSL_GpioHandle hGpio;
  379. Uint8 pinNum = 1;
  380. // Open the CSL GPIO Module 0
  381. hGpio = CSL_GPIO_open (0);
  382. ...
  383. // Set GPIO pin number 1 as an output pin
  384. CSL_GPIO_setPinDirOutput (hGpio, pinNum);
  385. ...
  386. @endverbatim
  387. * =============================================================================
  388. */
  389. /*for misra warning*/
  390. static inline void CSL_GPIO_setPinDirOutput
  391. (
  392. CSL_GpioHandle hGpio,
  393. Uint8 pinNum
  394. );
  395. static inline void CSL_GPIO_setPinDirOutput
  396. (
  397. CSL_GpioHandle hGpio,
  398. Uint8 pinNum
  399. )
  400. {
  401. Uint8 bankIndex, bitPos;
  402. bankIndex = pinNum / 32U;
  403. bitPos = pinNum % 32U;
  404. CSL_FINSR (hGpio->BANK_REGISTERS[bankIndex].DIR, bitPos, bitPos, 0U);
  405. return;
  406. }
  407. /** ============================================================================
  408. * @n@b CSL_GPIO_setPinDirInput
  409. *
  410. * @b Description
  411. * @n This function sets the direction of GPIO pin as an input pin.
  412. *
  413. * @b Arguments
  414. @verbatim
  415. hGpio Handle of the GPIO device
  416. pinNum GPIO Pin Number
  417. @endverbatim
  418. *
  419. * <b> Return Value </b>
  420. * @n None
  421. *
  422. * <b> Pre Condition </b>
  423. * @n CSL_GPIO_open() must be called
  424. *
  425. * <b> Post Condition </b>
  426. * @n None
  427. *
  428. * @b Writes
  429. * @n GPIO_DIR_DIR=1
  430. *
  431. * @b Example
  432. * @verbatim
  433. CSL_GpioHandle hGpio;
  434. Uint8 pinNum = 1;
  435. // Open the CSL GPIO Module 0
  436. hGpio = CSL_GPIO_open (0);
  437. ...
  438. // Set GPIO pin number 1 as an input pin
  439. CSL_GPIO_setPinDirInput (hGpio, pinNum);
  440. ...
  441. @endverbatim
  442. * =============================================================================
  443. */
  444. /*for misra warning*/
  445. static inline void CSL_GPIO_setPinDirInput
  446. (
  447. CSL_GpioHandle hGpio,
  448. Uint8 pinNum
  449. );
  450. static inline void CSL_GPIO_setPinDirInput
  451. (
  452. CSL_GpioHandle hGpio,
  453. Uint8 pinNum
  454. )
  455. {
  456. Uint8 bankIndex, bitPos;
  457. bankIndex = pinNum / 32U;
  458. bitPos = pinNum % 32U;
  459. CSL_FINSR (hGpio->BANK_REGISTERS[bankIndex].DIR, bitPos, bitPos, 1U);
  460. return;
  461. }
  462. /** ============================================================================
  463. * @n@b CSL_GPIO_getPinDirection
  464. *
  465. * @b Description
  466. * @n This function gets the direction configuration of GPIO pin.
  467. *
  468. * @b Arguments
  469. @verbatim
  470. hGpio Handle of the GPIO device
  471. pinNum GPIO Pin Number
  472. @endverbatim
  473. *
  474. * <b> Return Value </b>
  475. * @n 0 - Pin is configured as output pin
  476. * @n 1 - Pin is configured as input pin
  477. *
  478. * <b> Pre Condition </b>
  479. * @n CSL_GPIO_open() must be called
  480. *
  481. * <b> Post Condition </b>
  482. * @n None
  483. *
  484. * @b Reads
  485. * @n GPIO_DIR_DIR
  486. *
  487. * @b Example
  488. * @verbatim
  489. CSL_GpioHandle hGpio;
  490. Uint8 pinNum = 1;
  491. // Open the CSL GPIO Module 0
  492. hGpio = CSL_GPIO_open (0);
  493. ...
  494. // Check if pin 1 is configured as input or output pin
  495. if (CSL_GPIO_getPinDirection (hGpio, pinNum))
  496. {
  497. // GPIO pin is configured as INPUT
  498. }
  499. else
  500. {
  501. // GPIO pin is configured as OUTPUT
  502. }
  503. ...
  504. @endverbatim
  505. * =============================================================================
  506. */
  507. /*for misra warning*/
  508. static inline Bool CSL_GPIO_getPinDirection
  509. (
  510. CSL_GpioHandle hGpio,
  511. Uint8 pinNum
  512. );
  513. static inline Bool CSL_GPIO_getPinDirection
  514. (
  515. CSL_GpioHandle hGpio,
  516. Uint8 pinNum
  517. )
  518. {
  519. Uint32 bankIndex, bitPos;
  520. bankIndex = (Uint32)pinNum / 32U;
  521. bitPos = (Uint32)pinNum % 32U;
  522. return ((Bool)(CSL_FEXTR (hGpio->BANK_REGISTERS[bankIndex].DIR, bitPos, bitPos)));
  523. }
  524. /** ============================================================================
  525. * @n@b CSL_GPIO_getOutputData
  526. *
  527. * @b Description
  528. * @n This function gets the output drive state of GPIO pin when it is configured as an output pin.
  529. *
  530. * @b Arguments
  531. @verbatim
  532. hGpio Handle of the GPIO device
  533. pinNum GPIO Pin Number
  534. outData Bit data when GPIO is configured as output pin
  535. @endverbatim
  536. *
  537. * <b> Return Value </b>
  538. * @n None
  539. *
  540. * <b> Pre Condition </b>
  541. * @n CSL_GPIO_open() must be called
  542. *
  543. * <b> Post Condition </b>
  544. * @n None
  545. *
  546. * @b Reads
  547. * @n GPIO_OUT_DATA_OUT
  548. *
  549. * @b Example
  550. * @verbatim
  551. CSL_GpioHandle hGpio;
  552. Uint8 pinNum = 1, outData;
  553. // Open the CSL GPIO Module 0
  554. hGpio = CSL_GPIO_open (0);
  555. ...
  556. // Get the output data on pin 1
  557. CSL_GPIO_getOutputData (hGpio, pinNum, &outData));
  558. ...
  559. @endverbatim
  560. * =============================================================================
  561. */
  562. /*for misra warning*/
  563. static inline void CSL_GPIO_getOutputData
  564. (
  565. CSL_GpioHandle hGpio,
  566. Uint8 pinNum,
  567. Uint8 *outData
  568. );
  569. static inline void CSL_GPIO_getOutputData
  570. (
  571. CSL_GpioHandle hGpio,
  572. Uint8 pinNum,
  573. Uint8 *outData
  574. )
  575. {
  576. Uint32 bankIndex, bitPos;
  577. bankIndex = (Uint32)pinNum / 32U;
  578. bitPos = (Uint32)pinNum % 32U;
  579. *outData = (Uint8)CSL_FEXTR (hGpio->BANK_REGISTERS[bankIndex].OUT_DATA, bitPos, bitPos);
  580. return;
  581. }
  582. /** ============================================================================
  583. * @n@b CSL_GPIO_setOutputData
  584. *
  585. * @b Description
  586. * @n This function sets the output drive state of GPIO pin when it is configured as an output pin.
  587. *
  588. * @b Arguments
  589. @verbatim
  590. hGpio Handle of the GPIO device
  591. pinNum GPIO Pin Number
  592. @endverbatim
  593. *
  594. * <b> Return Value </b>
  595. * @n None
  596. *
  597. * <b> Pre Condition </b>
  598. * @n CSL_GPIO_open() must be called
  599. *
  600. * <b> Post Condition </b>
  601. * @n None
  602. *
  603. * @b Writes
  604. * @n GPIO_SET_DATA_SET=1
  605. *
  606. * @b Example
  607. * @verbatim
  608. CSL_GpioHandle hGpio;
  609. Uint8 pinNum = 0;
  610. // Open the CSL GPIO Module 0
  611. hGpio = CSL_GPIO_open (0);
  612. ...
  613. // Set output of GPIO pin number 0 to 1
  614. CSL_GPIO_setOutputData (hGpio, pinNum);
  615. ...
  616. @endverbatim
  617. * =============================================================================
  618. */
  619. /*for misra warning*/
  620. static inline void CSL_GPIO_setOutputData
  621. (
  622. CSL_GpioHandle hGpio,
  623. Uint8 pinNum
  624. );
  625. static inline void CSL_GPIO_setOutputData
  626. (
  627. CSL_GpioHandle hGpio,
  628. Uint8 pinNum
  629. )
  630. {
  631. Uint8 bankIndex, bitPos;
  632. bankIndex = pinNum / 32U;
  633. bitPos = pinNum % 32U;
  634. hGpio->BANK_REGISTERS[bankIndex].SET_DATA = (1U) << bitPos;
  635. return;
  636. }
  637. /** ============================================================================
  638. * @n@b CSL_GPIO_clearOutputData
  639. *
  640. * @b Description
  641. * @n This function clears the output drive state of GPIO pin when it is configured as an output pin.
  642. *
  643. * @b Arguments
  644. @verbatim
  645. hGpio Handle of the GPIO device
  646. pinNum GPIO Pin Number
  647. @endverbatim
  648. *
  649. * <b> Return Value </b>
  650. * @n None
  651. *
  652. * <b> Pre Condition </b>
  653. * @n CSL_GPIO_open() must be called
  654. *
  655. * <b> Post Condition </b>
  656. * @n None
  657. *
  658. * @b Writes
  659. * @n GPIO_CLR_DATA_CLR=1
  660. *
  661. * @b Example
  662. * @verbatim
  663. CSL_GpioHandle hGpio;
  664. Uint8 pinNum = 0;
  665. // Open the CSL GPIO Module 0
  666. hGpio = CSL_GPIO_open (0);
  667. ...
  668. // Clear output of GPIO pin number 0
  669. CSL_GPIO_clearOutputData (hGpio, pinNum);
  670. ...
  671. @endverbatim
  672. * =============================================================================
  673. */
  674. /*for misra warning*/
  675. static inline void CSL_GPIO_clearOutputData
  676. (
  677. CSL_GpioHandle hGpio,
  678. Uint8 pinNum
  679. );
  680. static inline void CSL_GPIO_clearOutputData
  681. (
  682. CSL_GpioHandle hGpio,
  683. Uint8 pinNum
  684. )
  685. {
  686. Uint8 bankIndex, bitPos;
  687. bankIndex = pinNum / 32U;
  688. bitPos = pinNum % 32U;
  689. hGpio->BANK_REGISTERS[bankIndex].CLR_DATA = (1U) << bitPos;
  690. return;
  691. }
  692. /** ============================================================================
  693. * @n@b CSL_GPIO_getInputData
  694. *
  695. * @b Description
  696. * @n This function gets the input bit data on GPIO pin when it is configured as an input pin.
  697. *
  698. * @b Arguments
  699. @verbatim
  700. hGpio Handle of the GPIO device
  701. pinNum GPIO Pin Number
  702. inData Bit data when GPIO is configured as input pin
  703. @endverbatim
  704. *
  705. * <b> Return Value </b>
  706. * @n None
  707. *
  708. * <b> Pre Condition </b>
  709. * @n CSL_GPIO_open() must be called
  710. *
  711. * <b> Post Condition </b>
  712. * @n None
  713. *
  714. * @b Reads
  715. * @n GPIO_IN_DATA_IN
  716. *
  717. * @b Example
  718. * @verbatim
  719. CSL_GpioHandle hGpio;
  720. Uint8 pinNum = 1, inData;
  721. // Open the CSL GPIO Module 0
  722. hGpio = CSL_GPIO_open (0);
  723. ...
  724. // Get the output data on pin 1
  725. CSL_GPIO_getInputData (hGpio, pinNum, &inData));
  726. ...
  727. @endverbatim
  728. * =============================================================================
  729. */
  730. /*for misra warning*/
  731. static inline void CSL_GPIO_getInputData
  732. (
  733. CSL_GpioHandle hGpio,
  734. Uint8 pinNum,
  735. Uint8 *inData
  736. );
  737. static inline void CSL_GPIO_getInputData
  738. (
  739. CSL_GpioHandle hGpio,
  740. Uint8 pinNum,
  741. Uint8 *inData
  742. )
  743. {
  744. Uint32 bankIndex, bitPos;
  745. bankIndex = (Uint32)pinNum / 32U;
  746. bitPos = (Uint32)pinNum % 32U;
  747. *inData = (Uint8)CSL_FEXTR (hGpio->BANK_REGISTERS[bankIndex].IN_DATA, bitPos, bitPos);
  748. return;
  749. }
  750. /** ============================================================================
  751. * @n@b CSL_GPIO_setRisingEdgeDetect
  752. *
  753. * @b Description
  754. * @n This function sets rising edge interrupt detection for GPIO pin.
  755. *
  756. * @b Arguments
  757. @verbatim
  758. hGpio Handle of the GPIO device
  759. pinNum GPIO Pin Number
  760. @endverbatim
  761. *
  762. * <b> Return Value </b>
  763. * @n None
  764. *
  765. * <b> Pre Condition </b>
  766. * @n CSL_GPIO_open() must be called
  767. *
  768. * <b> Post Condition </b>
  769. * @n None
  770. *
  771. * @b Writes
  772. * @n GPIO_SET_RIS_TRIG_SETRIS=1
  773. *
  774. * @b Example
  775. * @verbatim
  776. CSL_GpioHandle hGpio;
  777. Uint8 pinNum = 1;
  778. // Open the CSL GPIO Module 0
  779. hGpio = CSL_GPIO_open (0);
  780. ...
  781. // Set interrupt detection on GPIO pin 1 to rising edge
  782. CSL_GPIO_setRisingEdgeDetect (hGpio, pinNum));
  783. ...
  784. @endverbatim
  785. * =============================================================================
  786. */
  787. /*for misra warning*/
  788. static inline void CSL_GPIO_setRisingEdgeDetect
  789. (
  790. CSL_GpioHandle hGpio,
  791. Uint8 pinNum
  792. );
  793. static inline void CSL_GPIO_setRisingEdgeDetect
  794. (
  795. CSL_GpioHandle hGpio,
  796. Uint8 pinNum
  797. )
  798. {
  799. Uint8 bankIndex, bitPos;
  800. bankIndex = pinNum / 32U;
  801. bitPos = pinNum % 32U;
  802. CSL_FINSR (hGpio->BANK_REGISTERS[bankIndex].SET_RIS_TRIG, bitPos, bitPos, 1U);
  803. return;
  804. }
  805. /** ============================================================================
  806. * @n@b CSL_GPIO_clearRisingEdgeDetect
  807. *
  808. * @b Description
  809. * @n This function clears rising edge interrupt detection for GPIO pin.
  810. *
  811. * @b Arguments
  812. @verbatim
  813. hGpio Handle of the GPIO device
  814. pinNum GPIO Pin Number
  815. @endverbatim
  816. *
  817. * <b> Return Value </b>
  818. * @n None
  819. *
  820. * <b> Pre Condition </b>
  821. * @n CSL_GPIO_open() must be called
  822. *
  823. * <b> Post Condition </b>
  824. * @n None
  825. *
  826. * @b Writes
  827. * @n GPIO_CLR_RIS_TRIG_CLRRIS=1
  828. *
  829. * @b Example
  830. * @verbatim
  831. CSL_GpioHandle hGpio;
  832. Uint8 pinNum = 1;
  833. // Open the CSL GPIO Module 0
  834. hGpio = CSL_GPIO_open (0);
  835. ...
  836. // Clear rising edge interrupt detection on GPIO pin 1
  837. CSL_GPIO_clearRisingEdgeDetect (hGpio, pinNum));
  838. ...
  839. @endverbatim
  840. * =============================================================================
  841. */
  842. /*for misra warning*/
  843. static inline void CSL_GPIO_clearRisingEdgeDetect
  844. (
  845. CSL_GpioHandle hGpio,
  846. Uint8 pinNum
  847. );
  848. static inline void CSL_GPIO_clearRisingEdgeDetect
  849. (
  850. CSL_GpioHandle hGpio,
  851. Uint8 pinNum
  852. )
  853. {
  854. Uint8 bankIndex;
  855. bankIndex = pinNum / 32U;
  856. hGpio->BANK_REGISTERS[bankIndex].CLR_RIS_TRIG = (1U) << pinNum;
  857. return;
  858. }
  859. /** ============================================================================
  860. * @n@b CSL_GPIO_isRisingEdgeDetect
  861. *
  862. * @b Description
  863. * @n This function checks if the interrupt detection for GPIO pin is set to rising edge or not.
  864. *
  865. * @b Arguments
  866. @verbatim
  867. hGpio Handle of the GPIO device
  868. pinNum GPIO Pin Number
  869. @endverbatim
  870. *
  871. * <b> Return Value </b>
  872. * @n TRUE - Interrupt detection is set to rising edge
  873. * @n FALSE - Interrupt detection is not set to rising edge
  874. *
  875. * <b> Pre Condition </b>
  876. * @n CSL_GPIO_open() must be called
  877. *
  878. * <b> Post Condition </b>
  879. * @n None
  880. *
  881. * @b Reads
  882. * @n GPIO_SET_RIS_TRIG_SETRIS
  883. *
  884. * @b Example
  885. * @verbatim
  886. CSL_GpioHandle hGpio;
  887. Uint8 pinNum = 1;
  888. // Open the CSL GPIO Module 0
  889. hGpio = CSL_GPIO_open (0);
  890. ...
  891. // Check interrupt detection state on GPIO pin 1
  892. if (CSL_GPIO_isRisingEdgeDetect (hGpio, pinNum) == TRUE)
  893. {
  894. // Interrupt detection is set to RISING EDGE
  895. }
  896. else
  897. {
  898. // Interrupt detection is not set to RISING EDGE
  899. }
  900. ...
  901. @endverbatim
  902. * =============================================================================
  903. */
  904. /*for misra warning*/
  905. static inline Bool CSL_GPIO_isRisingEdgeDetect
  906. (
  907. CSL_GpioHandle hGpio,
  908. Uint8 pinNum
  909. );
  910. static inline Bool CSL_GPIO_isRisingEdgeDetect
  911. (
  912. CSL_GpioHandle hGpio,
  913. Uint8 pinNum
  914. )
  915. {
  916. Uint32 bankIndex, bitPos;
  917. Bool ret_val;
  918. bankIndex = (Uint32)pinNum / 32U;
  919. bitPos = (Uint32)pinNum % 32U;
  920. if (CSL_FEXTR (hGpio->BANK_REGISTERS[bankIndex].SET_RIS_TRIG, bitPos, bitPos) == 1U)
  921. {
  922. ret_val = TRUE;
  923. }
  924. else
  925. {
  926. ret_val = FALSE;
  927. }
  928. return ret_val;
  929. }
  930. /** ============================================================================
  931. * @n@b CSL_GPIO_setFallingEdgeDetect
  932. *
  933. * @b Description
  934. * @n This function sets falling edge interrupt detection for GPIO pin.
  935. *
  936. * @b Arguments
  937. @verbatim
  938. hGpio Handle of the GPIO device
  939. pinNum GPIO Pin Number
  940. @endverbatim
  941. *
  942. * <b> Return Value </b>
  943. * @n None
  944. *
  945. * <b> Pre Condition </b>
  946. * @n CSL_GPIO_open() must be called
  947. *
  948. * <b> Post Condition </b>
  949. * @n None
  950. *
  951. * @b Writes
  952. * @n GPIO_SET_FAL_TRIG_SETFAL=1
  953. *
  954. * @b Example
  955. * @verbatim
  956. CSL_GpioHandle hGpio;
  957. Uint8 pinNum = 1;
  958. // Open the CSL GPIO Module 0
  959. hGpio = CSL_GPIO_open (0);
  960. ...
  961. // Set interrupt detection on GPIO pin 1 to falling edge
  962. CSL_GPIO_setFallingEdgeDetect (hGpio, pinNum));
  963. ...
  964. @endverbatim
  965. * =============================================================================
  966. */
  967. /*for misra warning*/
  968. static inline void CSL_GPIO_setFallingEdgeDetect
  969. (
  970. CSL_GpioHandle hGpio,
  971. Uint8 pinNum
  972. );
  973. static inline void CSL_GPIO_setFallingEdgeDetect
  974. (
  975. CSL_GpioHandle hGpio,
  976. Uint8 pinNum
  977. )
  978. {
  979. Uint8 bankIndex, bitPos;
  980. bankIndex = pinNum / 32U;
  981. bitPos = pinNum % 32U;
  982. CSL_FINSR (hGpio->BANK_REGISTERS[bankIndex].SET_FAL_TRIG, bitPos, bitPos, 1U);
  983. return;
  984. }
  985. /** ============================================================================
  986. * @n@b CSL_GPIO_clearFallingEdgeDetect
  987. *
  988. * @b Description
  989. * @n This function clears falling edge interrupt detection for GPIO pin.
  990. *
  991. * @b Arguments
  992. @verbatim
  993. hGpio Handle of the GPIO device
  994. pinNum GPIO Pin Number
  995. @endverbatim
  996. *
  997. * <b> Return Value </b>
  998. * @n None
  999. *
  1000. * <b> Pre Condition </b>
  1001. * @n CSL_GPIO_open() must be called
  1002. *
  1003. * <b> Post Condition </b>
  1004. * @n None
  1005. *
  1006. * @b Writes
  1007. * @n GPIO_CLR_FAL_TRIG_CLRFAL=1
  1008. *
  1009. * @b Example
  1010. * @verbatim
  1011. CSL_GpioHandle hGpio;
  1012. Uint8 pinNum = 1;
  1013. // Open the CSL GPIO Module 0
  1014. hGpio = CSL_GPIO_open (0);
  1015. ...
  1016. // Clear falling edge interrupt detection on GPIO pin 1
  1017. CSL_GPIO_clearFallingEdgeDetect (hGpio, pinNum));
  1018. ...
  1019. @endverbatim
  1020. * =============================================================================
  1021. */
  1022. /*for misra warning*/
  1023. static inline void CSL_GPIO_clearFallingEdgeDetect
  1024. (
  1025. CSL_GpioHandle hGpio,
  1026. Uint8 pinNum
  1027. );
  1028. static inline void CSL_GPIO_clearFallingEdgeDetect
  1029. (
  1030. CSL_GpioHandle hGpio,
  1031. Uint8 pinNum
  1032. )
  1033. {
  1034. Uint8 bankIndex;
  1035. bankIndex = pinNum / 32U;
  1036. hGpio->BANK_REGISTERS[bankIndex].CLR_FAL_TRIG = (1U) << pinNum;
  1037. return;
  1038. }
  1039. /** ============================================================================
  1040. * @n@b CSL_GPIO_isFallingEdgeDetect
  1041. *
  1042. * @b Description
  1043. * @n This function checks if the interrupt detection for GPIO pin is set to falling edge or not.
  1044. *
  1045. * @b Arguments
  1046. @verbatim
  1047. hGpio Handle of the GPIO device
  1048. pinNum GPIO Pin Number
  1049. @endverbatim
  1050. *
  1051. * <b> Return Value </b>
  1052. * @n TRUE - Interrupt detection is set to falling edge
  1053. * @n FALSE - Interrupt detection is not set to falling edge
  1054. *
  1055. * <b> Pre Condition </b>
  1056. * @n CSL_GPIO_open() must be called
  1057. *
  1058. * <b> Post Condition </b>
  1059. * @n None
  1060. *
  1061. * @b Reads
  1062. * @n GPIO_SET_FAL_TRIG_SETFAL
  1063. *
  1064. * @b Example
  1065. * @verbatim
  1066. CSL_GpioHandle hGpio;
  1067. Uint8 pinNum = 1;
  1068. // Open the CSL GPIO Module 0
  1069. hGpio = CSL_GPIO_open (0);
  1070. ...
  1071. // Check interrupt detection state on GPIO pin 1
  1072. if (CSL_GPIO_isFallingEdgeDetect (hGpio, pinNum) == TRUE)
  1073. {
  1074. // Interrupt detection is set to FALLING EDGE
  1075. }
  1076. else
  1077. {
  1078. // Interrupt detection is not set to FALLING EDGE
  1079. }
  1080. ...
  1081. @endverbatim
  1082. * =============================================================================
  1083. */
  1084. /*for misra warning*/
  1085. static inline Bool CSL_GPIO_isFallingEdgeDetect
  1086. (
  1087. CSL_GpioHandle hGpio,
  1088. Uint8 pinNum
  1089. );
  1090. static inline Bool CSL_GPIO_isFallingEdgeDetect
  1091. (
  1092. CSL_GpioHandle hGpio,
  1093. Uint8 pinNum
  1094. )
  1095. {
  1096. Uint32 bankIndex, bitPos;
  1097. Bool ret_val;
  1098. bankIndex = (Uint32)pinNum / 32U;
  1099. bitPos = (Uint32)pinNum % 32U;
  1100. if (CSL_FEXTR (hGpio->BANK_REGISTERS[bankIndex].SET_FAL_TRIG, bitPos, bitPos) == 1U)
  1101. {
  1102. ret_val = TRUE;
  1103. }
  1104. else
  1105. {
  1106. ret_val = FALSE;
  1107. }
  1108. return ret_val;
  1109. }
  1110. /** ============================================================================
  1111. * @n@b CSL_GPIO_getInterruptStatus
  1112. *
  1113. * @b Description
  1114. * @n This function gets the GPIO pin interrupt status.
  1115. *
  1116. * @b Arguments
  1117. @verbatim
  1118. hGpio Handle of the GPIO device
  1119. pinNum GPIO Pin Number
  1120. @endverbatim
  1121. *
  1122. * <b> Return Value </b>
  1123. * @n 0 - Interrupt has not occurred since last cleared
  1124. * @n 1 - Interrupt has occurred
  1125. *
  1126. * <b> Pre Condition </b>
  1127. * @n CSL_GPIO_open() must be called
  1128. *
  1129. * <b> Post Condition </b>
  1130. * @n None
  1131. *
  1132. * @b Reads
  1133. * @n GPIO_INTSTAT_STAT
  1134. *
  1135. * @b Example
  1136. * @verbatim
  1137. CSL_GpioHandle hGpio;
  1138. Uint8 pinNum = 1;
  1139. // Open the CSL GPIO Module 0
  1140. hGpio = CSL_GPIO_open (0);
  1141. ...
  1142. // Check interrupt status on pin 1
  1143. if (CSL_GPIO_getInterruptStatus (hGpio, pinNum) == 0)
  1144. {
  1145. // Interrupt has not occured
  1146. }
  1147. else
  1148. {
  1149. // Interrupt has occured
  1150. }
  1151. ...
  1152. @endverbatim
  1153. * =============================================================================
  1154. */
  1155. /*for misra warning*/
  1156. static inline Bool CSL_GPIO_getInterruptStatus
  1157. (
  1158. CSL_GpioHandle hGpio,
  1159. Uint8 pinNum
  1160. );
  1161. static inline Bool CSL_GPIO_getInterruptStatus
  1162. (
  1163. CSL_GpioHandle hGpio,
  1164. Uint8 pinNum
  1165. )
  1166. {
  1167. Uint32 bankIndex, bitPos;
  1168. bankIndex = (Uint32)pinNum / 32U;
  1169. bitPos = (Uint32)pinNum % 32U;
  1170. return ((Bool)(CSL_FEXTR (hGpio->BANK_REGISTERS[bankIndex].INTSTAT, bitPos, bitPos)));
  1171. }
  1172. /** ============================================================================
  1173. * @n@b CSL_GPIO_clearInterruptStatus
  1174. *
  1175. * @b Description
  1176. * @n This function clears the GPIO pin interrupt status.
  1177. *
  1178. * @b Arguments
  1179. @verbatim
  1180. hGpio Handle of the GPIO device
  1181. pinNum GPIO Pin Number
  1182. @endverbatim
  1183. *
  1184. * <b> Return Value </b>
  1185. * @n None
  1186. *
  1187. * <b> Pre Condition </b>
  1188. * @n CSL_GPIO_open() must be called
  1189. *
  1190. * <b> Post Condition </b>
  1191. * @n None
  1192. *
  1193. * @b Writes
  1194. * @n GPIO_INTSTAT_STAT=1
  1195. *
  1196. * @b Example
  1197. * @verbatim
  1198. CSL_GpioHandle hGpio;
  1199. Uint8 pinNum = 1;
  1200. // Open the CSL GPIO Module 0
  1201. hGpio = CSL_GPIO_open (0);
  1202. ...
  1203. // Check interrupt status on pin 1
  1204. CSL_GPIO_getInterruptStatus (hGpio, pinNum));
  1205. ...
  1206. // Clear interrupt status on pin 1
  1207. CSL_GPIO_clearInterruptStatus (hGpio, pinNum));
  1208. ...
  1209. @endverbatim
  1210. * =============================================================================
  1211. */
  1212. /*for misra warning*/
  1213. static inline void CSL_GPIO_clearInterruptStatus
  1214. (
  1215. CSL_GpioHandle hGpio,
  1216. Uint8 pinNum
  1217. );
  1218. static inline void CSL_GPIO_clearInterruptStatus
  1219. (
  1220. CSL_GpioHandle hGpio,
  1221. Uint8 pinNum
  1222. )
  1223. {
  1224. Uint8 bankIndex;
  1225. bankIndex = pinNum / 32U;
  1226. hGpio->BANK_REGISTERS[bankIndex].INTSTAT = (1U) << pinNum;
  1227. return;
  1228. }
  1229. /**
  1230. @}
  1231. */
  1232. #ifdef __cplusplus
  1233. }
  1234. #endif
  1235. #endif /* CSL_GPIOAUX_H */