vexpress_aemv8a.h 9.0 KB

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  1. /*
  2. * Configuration for Versatile Express. Parts were derived from other ARM
  3. * configurations.
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. #ifndef __VEXPRESS_AEMV8A_H
  8. #define __VEXPRESS_AEMV8A_H
  9. #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
  10. #ifndef CONFIG_SEMIHOSTING
  11. #error CONFIG_TARGET_VEXPRESS64_BASE_FVP requires CONFIG_SEMIHOSTING
  12. #endif
  13. #define CONFIG_ARMV8_SWITCH_TO_EL1
  14. #endif
  15. #define CONFIG_REMAKE_ELF
  16. #define CONFIG_SUPPORT_RAW_INITRD
  17. /* Link Definitions */
  18. #if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) || \
  19. defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM)
  20. /* ATF loads u-boot here for BASE_FVP model */
  21. #define CONFIG_SYS_TEXT_BASE 0x88000000
  22. #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
  23. #elif CONFIG_TARGET_VEXPRESS64_JUNO
  24. #define CONFIG_SYS_TEXT_BASE 0xe0000000
  25. #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
  26. #endif
  27. #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
  28. /* CS register bases for the original memory map. */
  29. #define V2M_PA_CS0 0x00000000
  30. #define V2M_PA_CS1 0x14000000
  31. #define V2M_PA_CS2 0x18000000
  32. #define V2M_PA_CS3 0x1c000000
  33. #define V2M_PA_CS4 0x0c000000
  34. #define V2M_PA_CS5 0x10000000
  35. #define V2M_PERIPH_OFFSET(x) (x << 16)
  36. #define V2M_SYSREGS (V2M_PA_CS3 + V2M_PERIPH_OFFSET(1))
  37. #define V2M_SYSCTL (V2M_PA_CS3 + V2M_PERIPH_OFFSET(2))
  38. #define V2M_SERIAL_BUS_PCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(3))
  39. #define V2M_BASE 0x80000000
  40. /* Common peripherals relative to CS7. */
  41. #define V2M_AACI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4))
  42. #define V2M_MMCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5))
  43. #define V2M_KMI0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(6))
  44. #define V2M_KMI1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(7))
  45. #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
  46. #define V2M_UART0 0x7ff80000
  47. #define V2M_UART1 0x7ff70000
  48. #else /* Not Juno */
  49. #define V2M_UART0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(9))
  50. #define V2M_UART1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(10))
  51. #define V2M_UART2 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(11))
  52. #define V2M_UART3 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(12))
  53. #endif
  54. #define V2M_WDT (V2M_PA_CS3 + V2M_PERIPH_OFFSET(15))
  55. #define V2M_TIMER01 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(17))
  56. #define V2M_TIMER23 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(18))
  57. #define V2M_SERIAL_BUS_DVI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(22))
  58. #define V2M_RTC (V2M_PA_CS3 + V2M_PERIPH_OFFSET(23))
  59. #define V2M_CF (V2M_PA_CS3 + V2M_PERIPH_OFFSET(26))
  60. #define V2M_CLCD (V2M_PA_CS3 + V2M_PERIPH_OFFSET(31))
  61. /* System register offsets. */
  62. #define V2M_SYS_CFGDATA (V2M_SYSREGS + 0x0a0)
  63. #define V2M_SYS_CFGCTRL (V2M_SYSREGS + 0x0a4)
  64. #define V2M_SYS_CFGSTAT (V2M_SYSREGS + 0x0a8)
  65. /* Generic Timer Definitions */
  66. #define COUNTER_FREQUENCY (0x1800000) /* 24MHz */
  67. /* Generic Interrupt Controller Definitions */
  68. #ifdef CONFIG_GICV3
  69. #define GICD_BASE (0x2f000000)
  70. #define GICR_BASE (0x2f100000)
  71. #else
  72. #if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) || \
  73. defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM)
  74. #define GICD_BASE (0x2f000000)
  75. #define GICC_BASE (0x2c000000)
  76. #elif CONFIG_TARGET_VEXPRESS64_JUNO
  77. #define GICD_BASE (0x2C010000)
  78. #define GICC_BASE (0x2C02f000)
  79. #endif
  80. #endif /* !CONFIG_GICV3 */
  81. /* Size of malloc() pool */
  82. #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 << 20))
  83. /* Ethernet Configuration */
  84. #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
  85. /* The real hardware Versatile express uses SMSC9118 */
  86. #define CONFIG_SMC911X 1
  87. #define CONFIG_SMC911X_32_BIT 1
  88. #define CONFIG_SMC911X_BASE (0x018000000)
  89. #else
  90. /* The Vexpress64 simulators use SMSC91C111 */
  91. #define CONFIG_SMC91111 1
  92. #define CONFIG_SMC91111_BASE (0x01A000000)
  93. #endif
  94. /* PL011 Serial Configuration */
  95. #define CONFIG_BAUDRATE 115200
  96. #define CONFIG_CONS_INDEX 0
  97. #define CONFIG_PL01X_SERIAL
  98. #define CONFIG_PL011_SERIAL
  99. #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
  100. #define CONFIG_PL011_CLOCK 7273800
  101. #else
  102. #define CONFIG_PL011_CLOCK 24000000
  103. #endif
  104. /*#define CONFIG_MENU_SHOW*/
  105. #define CONFIG_CMD_UNZIP
  106. #define CONFIG_CMD_ENV
  107. #define CONFIG_DOS_PARTITION
  108. /* BOOTP options */
  109. #define CONFIG_BOOTP_BOOTFILESIZE
  110. #define CONFIG_BOOTP_BOOTPATH
  111. #define CONFIG_BOOTP_GATEWAY
  112. #define CONFIG_BOOTP_HOSTNAME
  113. #define CONFIG_BOOTP_PXE
  114. /* Miscellaneous configurable options */
  115. #define CONFIG_SYS_LOAD_ADDR (V2M_BASE + 0x10000000)
  116. /* Physical Memory Map */
  117. #define PHYS_SDRAM_1 (V2M_BASE) /* SDRAM Bank #1 */
  118. /* Top 16MB reserved for secure world use */
  119. #define DRAM_SEC_SIZE 0x01000000
  120. #define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE
  121. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
  122. #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
  123. #define CONFIG_NR_DRAM_BANKS 2
  124. #define PHYS_SDRAM_2 (0x880000000)
  125. #define PHYS_SDRAM_2_SIZE 0x180000000
  126. #else
  127. #define CONFIG_NR_DRAM_BANKS 1
  128. #endif
  129. /* Enable memtest */
  130. #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
  131. #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE)
  132. /* Initial environment variables */
  133. #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
  134. /*
  135. * Defines where the kernel and FDT exist in NOR flash and where it will
  136. * be copied into DRAM
  137. */
  138. #define CONFIG_EXTRA_ENV_SETTINGS \
  139. "kernel_name=norkern\0" \
  140. "kernel_alt_name=Image\0" \
  141. "kernel_addr=0x80080000\0" \
  142. "initrd_name=ramdisk.img\0" \
  143. "initrd_addr=0x84000000\0" \
  144. "fdtfile=board.dtb\0" \
  145. "fdt_alt_name=juno\0" \
  146. "fdt_addr=0x83000000\0" \
  147. "fdt_high=0xffffffffffffffff\0" \
  148. "initrd_high=0xffffffffffffffff\0" \
  149. /* Assume we boot with root on the first partition of a USB stick */
  150. #define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 " \
  151. "root=/dev/sda2 rw " \
  152. "rootwait "\
  153. "earlyprintk=pl011,0x7ff80000 debug "\
  154. "user_debug=31 "\
  155. "androidboot.hardware=juno "\
  156. "loglevel=9"
  157. /* Copy the kernel and FDT to DRAM memory and boot */
  158. #define CONFIG_BOOTCOMMAND "afs load ${kernel_name} ${kernel_addr} ; " \
  159. "if test $? -eq 1; then "\
  160. " echo Loading ${kernel_alt_name} instead of "\
  161. "${kernel_name}; "\
  162. " afs load ${kernel_alt_name} ${kernel_addr};"\
  163. "fi ; "\
  164. "afs load ${fdtfile} ${fdt_addr} ; " \
  165. "if test $? -eq 1; then "\
  166. " echo Loading ${fdt_alt_name} instead of "\
  167. "${fdtfile}; "\
  168. " afs load ${fdt_alt_name} ${fdt_addr}; "\
  169. "fi ; "\
  170. "fdt addr ${fdt_addr}; fdt resize; " \
  171. "if afs load ${initrd_name} ${initrd_addr} ; "\
  172. "then "\
  173. " setenv initrd_param ${initrd_addr}; "\
  174. " else setenv initrd_param -; "\
  175. "fi ; " \
  176. "booti ${kernel_addr} ${initrd_param} ${fdt_addr}"
  177. #elif CONFIG_TARGET_VEXPRESS64_BASE_FVP
  178. #define CONFIG_EXTRA_ENV_SETTINGS \
  179. "kernel_name=Image\0" \
  180. "kernel_addr=0x80080000\0" \
  181. "initrd_name=ramdisk.img\0" \
  182. "initrd_addr=0x88000000\0" \
  183. "fdtfile=devtree.dtb\0" \
  184. "fdt_addr=0x83000000\0" \
  185. "fdt_high=0xffffffffffffffff\0" \
  186. "initrd_high=0xffffffffffffffff\0"
  187. #define CONFIG_BOOTARGS "console=ttyAMA0 earlyprintk=pl011,"\
  188. "0x1c090000 debug user_debug=31 "\
  189. "loglevel=9"
  190. #define CONFIG_BOOTCOMMAND "smhload ${kernel_name} ${kernel_addr}; " \
  191. "smhload ${fdtfile} ${fdt_addr}; " \
  192. "smhload ${initrd_name} ${initrd_addr} "\
  193. "initrd_end; " \
  194. "fdt addr ${fdt_addr}; fdt resize; " \
  195. "fdt chosen ${initrd_addr} ${initrd_end}; " \
  196. "booti $kernel_addr - $fdt_addr"
  197. #elif CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM
  198. #define CONFIG_EXTRA_ENV_SETTINGS \
  199. "kernel_addr=0x80080000\0" \
  200. "initrd_addr=0x84000000\0" \
  201. "fdt_addr=0x83000000\0" \
  202. "fdt_high=0xffffffffffffffff\0" \
  203. "initrd_high=0xffffffffffffffff\0"
  204. #define CONFIG_BOOTARGS "console=ttyAMA0 earlyprintk=pl011,"\
  205. "0x1c090000 debug user_debug=31 "\
  206. "androidboot.hardware=fvpbase "\
  207. "root=/dev/vda2 rw "\
  208. "rootwait "\
  209. "loglevel=9"
  210. #define CONFIG_BOOTCOMMAND "booti $kernel_addr $initrd_addr $fdt_addr"
  211. #endif
  212. /* Monitor Command Prompt */
  213. #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
  214. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
  215. sizeof(CONFIG_SYS_PROMPT) + 16)
  216. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
  217. #define CONFIG_SYS_LONGHELP
  218. #define CONFIG_CMDLINE_EDITING
  219. #define CONFIG_SYS_MAXARGS 64 /* max command args */
  220. #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
  221. #define CONFIG_SYS_FLASH_BASE 0x08000000
  222. /* 255 x 256KiB sectors + 4 x 64KiB sectors at the end = 259 */
  223. #define CONFIG_SYS_MAX_FLASH_SECT 259
  224. /* Store environment at top of flash in the same location as blank.img */
  225. /* in the Juno firmware. */
  226. #define CONFIG_ENV_ADDR 0x0BFC0000
  227. #define CONFIG_ENV_SECT_SIZE 0x00010000
  228. #else
  229. #define CONFIG_SYS_FLASH_BASE 0x0C000000
  230. /* 256 x 256KiB sectors */
  231. #define CONFIG_SYS_MAX_FLASH_SECT 256
  232. /* Store environment at top of flash */
  233. #define CONFIG_ENV_ADDR 0x0FFC0000
  234. #define CONFIG_ENV_SECT_SIZE 0x00040000
  235. #endif
  236. #define CONFIG_SYS_FLASH_CFI 1
  237. #define CONFIG_FLASH_CFI_DRIVER 1
  238. #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT
  239. #define CONFIG_SYS_MAX_FLASH_BANKS 1
  240. #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* use buffered writes */
  241. #define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */
  242. #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */
  243. #define FLASH_MAX_SECTOR_SIZE 0x00040000
  244. #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
  245. #define CONFIG_ENV_IS_IN_FLASH 1
  246. #endif /* __VEXPRESS_AEMV8A_H */