mx6ul_14x14_evk.h 6.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241
  1. /*
  2. * Copyright (C) 2015 Freescale Semiconductor, Inc.
  3. *
  4. * Configuration settings for the Freescale i.MX6UL 14x14 EVK board.
  5. *
  6. * SPDX-License-Identifier: GPL-2.0+
  7. */
  8. #ifndef __MX6UL_14X14_EVK_CONFIG_H
  9. #define __MX6UL_14X14_EVK_CONFIG_H
  10. #include <asm/arch/imx-regs.h>
  11. #include <linux/sizes.h>
  12. #include "mx6_common.h"
  13. #include <asm/imx-common/gpio.h>
  14. #define is_mx6ul_9x9_evk() CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK)
  15. /* SPL options */
  16. #include "imx6_spl.h"
  17. #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
  18. /* Size of malloc() pool */
  19. #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
  20. #define CONFIG_BOARD_EARLY_INIT_F
  21. #define CONFIG_BOARD_LATE_INIT
  22. #define CONFIG_MXC_UART
  23. #define CONFIG_MXC_UART_BASE UART1_BASE
  24. /* MMC Configs */
  25. #ifdef CONFIG_FSL_USDHC
  26. #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
  27. /* NAND pin conflicts with usdhc2 */
  28. #ifdef CONFIG_NAND_MXS
  29. #define CONFIG_SYS_FSL_USDHC_NUM 1
  30. #else
  31. #define CONFIG_SYS_FSL_USDHC_NUM 2
  32. #endif
  33. #endif
  34. /* I2C configs */
  35. #ifdef CONFIG_CMD_I2C
  36. #define CONFIG_SYS_I2C
  37. #define CONFIG_SYS_I2C_MXC
  38. #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
  39. #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
  40. #define CONFIG_SYS_I2C_SPEED 100000
  41. /* PMIC only for 9X9 EVK */
  42. #define CONFIG_POWER
  43. #define CONFIG_POWER_I2C
  44. #define CONFIG_POWER_PFUZE3000
  45. #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
  46. #endif
  47. #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
  48. #define CONFIG_EXTRA_ENV_SETTINGS \
  49. "script=boot.scr\0" \
  50. "image=zImage\0" \
  51. "console=ttymxc0\0" \
  52. "fdt_high=0xffffffff\0" \
  53. "initrd_high=0xffffffff\0" \
  54. "fdt_file=undefined\0" \
  55. "fdt_addr=0x83000000\0" \
  56. "boot_fdt=try\0" \
  57. "ip_dyn=yes\0" \
  58. "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
  59. "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
  60. "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
  61. "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
  62. "mmcautodetect=yes\0" \
  63. "mmcargs=setenv bootargs console=${console},${baudrate} " \
  64. "root=${mmcroot}\0" \
  65. "loadbootscript=" \
  66. "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  67. "bootscript=echo Running bootscript from mmc ...; " \
  68. "source\0" \
  69. "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
  70. "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  71. "mmcboot=echo Booting from mmc ...; " \
  72. "run mmcargs; " \
  73. "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  74. "if run loadfdt; then " \
  75. "bootz ${loadaddr} - ${fdt_addr}; " \
  76. "else " \
  77. "if test ${boot_fdt} = try; then " \
  78. "bootz; " \
  79. "else " \
  80. "echo WARN: Cannot load the DT; " \
  81. "fi; " \
  82. "fi; " \
  83. "else " \
  84. "bootz; " \
  85. "fi;\0" \
  86. "netargs=setenv bootargs console=${console},${baudrate} " \
  87. "root=/dev/nfs " \
  88. "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
  89. "netboot=echo Booting from net ...; " \
  90. "run netargs; " \
  91. "if test ${ip_dyn} = yes; then " \
  92. "setenv get_cmd dhcp; " \
  93. "else " \
  94. "setenv get_cmd tftp; " \
  95. "fi; " \
  96. "${get_cmd} ${image}; " \
  97. "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  98. "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
  99. "bootz ${loadaddr} - ${fdt_addr}; " \
  100. "else " \
  101. "if test ${boot_fdt} = try; then " \
  102. "bootz; " \
  103. "else " \
  104. "echo WARN: Cannot load the DT; " \
  105. "fi; " \
  106. "fi; " \
  107. "else " \
  108. "bootz; " \
  109. "fi;\0" \
  110. "findfdt="\
  111. "if test $fdt_file = undefined; then " \
  112. "if test $board_name = EVK && test $board_rev = 9X9; then " \
  113. "setenv fdt_file imx6ul-9x9-evk.dtb; fi; " \
  114. "if test $board_name = EVK && test $board_rev = 14X14; then " \
  115. "setenv fdt_file imx6ul-14x14-evk.dtb; fi; " \
  116. "if test $fdt_file = undefined; then " \
  117. "echo WARNING: Could not determine dtb to use; fi; " \
  118. "fi;\0" \
  119. #define CONFIG_BOOTCOMMAND \
  120. "run findfdt;" \
  121. "mmc dev ${mmcdev};" \
  122. "mmc dev ${mmcdev}; if mmc rescan; then " \
  123. "if run loadbootscript; then " \
  124. "run bootscript; " \
  125. "else " \
  126. "if run loadimage; then " \
  127. "run mmcboot; " \
  128. "else run netboot; " \
  129. "fi; " \
  130. "fi; " \
  131. "else run netboot; fi"
  132. /* Miscellaneous configurable options */
  133. #define CONFIG_SYS_MEMTEST_START 0x80000000
  134. #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000)
  135. #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
  136. #define CONFIG_SYS_HZ 1000
  137. #define CONFIG_CMDLINE_EDITING
  138. #define CONFIG_STACKSIZE SZ_128K
  139. /* Physical Memory Map */
  140. #define CONFIG_NR_DRAM_BANKS 1
  141. #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
  142. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
  143. #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
  144. #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
  145. #define CONFIG_SYS_INIT_SP_OFFSET \
  146. (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  147. #define CONFIG_SYS_INIT_SP_ADDR \
  148. (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  149. /* FLASH and environment organization */
  150. #define CONFIG_SYS_NO_FLASH
  151. #define CONFIG_ENV_SIZE SZ_8K
  152. #define CONFIG_ENV_IS_IN_MMC
  153. #define CONFIG_ENV_OFFSET (8 * SZ_64K)
  154. #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
  155. #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
  156. #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
  157. #define CONFIG_CMD_BMODE
  158. #ifndef CONFIG_SYS_DCACHE_OFF
  159. #endif
  160. #ifdef CONFIG_FSL_QSPI
  161. #define CONFIG_SF_DEFAULT_BUS 0
  162. #define CONFIG_SF_DEFAULT_CS 0
  163. #define CONFIG_SF_DEFAULT_SPEED 40000000
  164. #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
  165. #define FSL_QSPI_FLASH_NUM 1
  166. #define FSL_QSPI_FLASH_SIZE SZ_32M
  167. #endif
  168. /* USB Configs */
  169. #ifdef CONFIG_CMD_USB
  170. #define CONFIG_USB_EHCI
  171. #define CONFIG_USB_EHCI_MX6
  172. #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
  173. #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
  174. #define CONFIG_MXC_USB_FLAGS 0
  175. #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
  176. #endif
  177. #ifdef CONFIG_CMD_NET
  178. #define CONFIG_FEC_MXC
  179. #define CONFIG_MII
  180. #define CONFIG_FEC_ENET_DEV 1
  181. #if (CONFIG_FEC_ENET_DEV == 0)
  182. #define IMX_FEC_BASE ENET_BASE_ADDR
  183. #define CONFIG_FEC_MXC_PHYADDR 0x2
  184. #define CONFIG_FEC_XCV_TYPE RMII
  185. #elif (CONFIG_FEC_ENET_DEV == 1)
  186. #define IMX_FEC_BASE ENET2_BASE_ADDR
  187. #define CONFIG_FEC_MXC_PHYADDR 0x1
  188. #define CONFIG_FEC_XCV_TYPE RMII
  189. #endif
  190. #define CONFIG_ETHPRIME "FEC"
  191. #define CONFIG_PHYLIB
  192. #define CONFIG_PHY_MICREL
  193. #endif
  194. #define CONFIG_IMX_THERMAL
  195. #ifndef CONFIG_SPL_BUILD
  196. #ifdef CONFIG_VIDEO
  197. #define CONFIG_VIDEO_MXS
  198. #define CONFIG_VIDEO_LOGO
  199. #define CONFIG_SPLASH_SCREEN
  200. #define CONFIG_SPLASH_SCREEN_ALIGN
  201. #define CONFIG_CMD_BMP
  202. #define CONFIG_BMP_16BPP
  203. #define CONFIG_VIDEO_BMP_RLE8
  204. #define CONFIG_VIDEO_BMP_LOGO
  205. #define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR
  206. #endif
  207. #endif
  208. #endif