mx53loco.h 5.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222
  1. /*
  2. * Copyright (C) 2011 Freescale Semiconductor, Inc.
  3. * Jason Liu <r64343@freescale.com>
  4. *
  5. * Configuration settings for Freescale MX53 low cost board.
  6. *
  7. * SPDX-License-Identifier: GPL-2.0+
  8. */
  9. #ifndef __CONFIG_H
  10. #define __CONFIG_H
  11. #define CONFIG_MX53
  12. #define CONFIG_MACH_TYPE MACH_TYPE_MX53_LOCO
  13. #include <asm/arch/imx-regs.h>
  14. #define CONFIG_CMDLINE_TAG
  15. #define CONFIG_SETUP_MEMORY_TAGS
  16. #define CONFIG_INITRD_TAG
  17. #define CONFIG_SYS_FSL_CLK
  18. /* Size of malloc() pool */
  19. #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
  20. #define CONFIG_BOARD_EARLY_INIT_F
  21. #define CONFIG_BOARD_LATE_INIT
  22. #define CONFIG_MXC_GPIO
  23. #define CONFIG_REVISION_TAG
  24. #define CONFIG_MXC_UART
  25. #define CONFIG_MXC_UART_BASE UART1_BASE
  26. /* MMC Configs */
  27. #define CONFIG_FSL_ESDHC
  28. #define CONFIG_SYS_FSL_ESDHC_ADDR 0
  29. #define CONFIG_SYS_FSL_ESDHC_NUM 2
  30. #define CONFIG_GENERIC_MMC
  31. #define CONFIG_DOS_PARTITION
  32. /* Eth Configs */
  33. #define CONFIG_MII
  34. #define CONFIG_FEC_MXC
  35. #define IMX_FEC_BASE FEC_BASE_ADDR
  36. #define CONFIG_FEC_MXC_PHYADDR 0x1F
  37. /* USB Configs */
  38. #define CONFIG_USB_EHCI
  39. #define CONFIG_USB_EHCI_MX5
  40. #define CONFIG_USB_HOST_ETHER
  41. #define CONFIG_USB_ETHER_ASIX
  42. #define CONFIG_USB_ETHER_MCS7830
  43. #define CONFIG_USB_ETHER_SMSC95XX
  44. #define CONFIG_MXC_USB_PORT 1
  45. #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
  46. #define CONFIG_MXC_USB_FLAGS 0
  47. /* I2C Configs */
  48. #define CONFIG_SYS_I2C
  49. #define CONFIG_SYS_I2C_MXC
  50. #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
  51. #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
  52. #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
  53. /* PMIC Controller */
  54. #define CONFIG_POWER
  55. #define CONFIG_POWER_I2C
  56. #define CONFIG_DIALOG_POWER
  57. #define CONFIG_POWER_FSL
  58. #define CONFIG_POWER_FSL_MC13892
  59. #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48
  60. #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8
  61. /* allow to overwrite serial and ethaddr */
  62. #define CONFIG_ENV_OVERWRITE
  63. #define CONFIG_CONS_INDEX 1
  64. #define CONFIG_BAUDRATE 115200
  65. /* Command definition */
  66. #define CONFIG_SUPPORT_RAW_INITRD
  67. #define CONFIG_ETHPRIME "FEC0"
  68. #define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */
  69. #define CONFIG_SYS_TEXT_BASE 0x77800000
  70. #define CONFIG_EXTRA_ENV_SETTINGS \
  71. "script=boot.scr\0" \
  72. "image=zImage\0" \
  73. "fdt_addr=0x71000000\0" \
  74. "boot_fdt=try\0" \
  75. "ip_dyn=yes\0" \
  76. "mmcdev=0\0" \
  77. "mmcpart=1\0" \
  78. "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
  79. "mmcargs=setenv bootargs console=ttymxc0,${baudrate} root=${mmcroot}\0" \
  80. "loadbootscript=" \
  81. "load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  82. "bootscript=echo Running bootscript from mmc ...; " \
  83. "source\0" \
  84. "loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
  85. "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  86. "mmcboot=echo Booting from mmc ...; " \
  87. "run mmcargs; " \
  88. "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  89. "if run loadfdt; then " \
  90. "bootz ${loadaddr} - ${fdt_addr}; " \
  91. "else " \
  92. "if test ${boot_fdt} = try; then " \
  93. "bootz; " \
  94. "else " \
  95. "echo WARN: Cannot load the DT; " \
  96. "fi; " \
  97. "fi; " \
  98. "else " \
  99. "bootz; " \
  100. "fi;\0" \
  101. "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
  102. "root=/dev/nfs " \
  103. "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
  104. "netboot=echo Booting from net ...; " \
  105. "run netargs; " \
  106. "if test ${ip_dyn} = yes; then " \
  107. "setenv get_cmd dhcp; " \
  108. "else " \
  109. "setenv get_cmd tftp; " \
  110. "fi; " \
  111. "${get_cmd} ${image}; " \
  112. "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  113. "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
  114. "bootz ${loadaddr} - ${fdt_addr}; " \
  115. "else " \
  116. "if test ${boot_fdt} = try; then " \
  117. "bootz; " \
  118. "else " \
  119. "echo ERROR: Cannot load the DT; " \
  120. "exit; " \
  121. "fi; " \
  122. "fi; " \
  123. "else " \
  124. "bootz; " \
  125. "fi;\0"
  126. #define CONFIG_BOOTCOMMAND \
  127. "mmc dev ${mmcdev}; if mmc rescan; then " \
  128. "if run loadbootscript; then " \
  129. "run bootscript; " \
  130. "else " \
  131. "if run loadimage; then " \
  132. "run mmcboot; " \
  133. "else run netboot; " \
  134. "fi; " \
  135. "fi; " \
  136. "else run netboot; fi"
  137. #define CONFIG_ARP_TIMEOUT 200UL
  138. /* Miscellaneous configurable options */
  139. #define CONFIG_SYS_LONGHELP /* undef to save memory */
  140. #define CONFIG_AUTO_COMPLETE
  141. #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
  142. #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
  143. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
  144. #define CONFIG_SYS_MEMTEST_START 0x70000000
  145. #define CONFIG_SYS_MEMTEST_END 0x70010000
  146. #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
  147. #define CONFIG_CMDLINE_EDITING
  148. /* Physical Memory Map */
  149. #define CONFIG_NR_DRAM_BANKS 2
  150. #define PHYS_SDRAM_1 CSD0_BASE_ADDR
  151. #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
  152. #define PHYS_SDRAM_2 CSD1_BASE_ADDR
  153. #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
  154. #define PHYS_SDRAM_SIZE (gd->ram_size)
  155. #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
  156. #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
  157. #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
  158. #define CONFIG_SYS_INIT_SP_OFFSET \
  159. (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  160. #define CONFIG_SYS_INIT_SP_ADDR \
  161. (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  162. /* FLASH and environment organization */
  163. #define CONFIG_SYS_NO_FLASH
  164. #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
  165. #define CONFIG_ENV_SIZE (8 * 1024)
  166. #define CONFIG_ENV_IS_IN_MMC
  167. #define CONFIG_SYS_MMC_ENV_DEV 0
  168. #define CONFIG_CMD_SATA
  169. #ifdef CONFIG_CMD_SATA
  170. #define CONFIG_DWC_AHSATA
  171. #define CONFIG_SYS_SATA_MAX_DEVICE 1
  172. #define CONFIG_DWC_AHSATA_PORT_ID 0
  173. #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR
  174. #define CONFIG_LBA48
  175. #define CONFIG_LIBATA
  176. #endif
  177. /* Framebuffer and LCD */
  178. #define CONFIG_PREBOOT
  179. #define CONFIG_VIDEO_IPUV3
  180. #define CONFIG_VIDEO_BMP_RLE8
  181. #define CONFIG_SPLASH_SCREEN
  182. #define CONFIG_BMP_16BPP
  183. #define CONFIG_VIDEO_LOGO
  184. #define CONFIG_IPUV3_CLK 200000000
  185. #endif /* __CONFIG_H */