123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270 |
- /*
- * (C) Copyright 2007
- * Heiko Schocher, DENX Software Engineering, hs@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
- #ifndef __CONFIG_H
- #define __CONFIG_H
- /*
- * High Level Configuration Options
- * (easy to change)
- */
- #define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */
- #define CONFIG_JUPITER 1 /* ... on Jupiter board */
- /*
- * Valid values for CONFIG_SYS_TEXT_BASE are:
- * 0xFFF00000 boot high (standard configuration)
- * 0x00100000 boot from RAM (for testing only)
- */
- #ifndef CONFIG_SYS_TEXT_BASE
- #define CONFIG_SYS_TEXT_BASE 0xFFF00000
- #endif
- #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
- #define CONFIG_BOARD_EARLY_INIT_R 1
- #define CONFIG_BOARD_EARLY_INIT_F 1
- #define CONFIG_HIGH_BATS 1 /* High BATs supported */
- /*
- * Serial console configuration
- */
- #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
- #define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
- #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
- /*
- * PCI Mapping:
- * 0x40000000 - 0x4fffffff - PCI Memory
- * 0x50000000 - 0x50ffffff - PCI IO Space
- */
- #if defined(CONFIG_PCI)
- #define CONFIG_PCI_SCAN_SHOW 1
- #define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
- #define CONFIG_PCI_MEM_BUS 0x40000000
- #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
- #define CONFIG_PCI_MEM_SIZE 0x10000000
- #define CONFIG_PCI_IO_BUS 0x50000000
- #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
- #define CONFIG_PCI_IO_SIZE 0x01000000
- #endif
- #define CONFIG_SYS_XLB_PIPELINING 1
- #define CONFIG_MII 1
- #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
- /* Partitions */
- #define CONFIG_MAC_PARTITION
- #define CONFIG_DOS_PARTITION
- #define CONFIG_ISO_PARTITION
- #define CONFIG_TIMESTAMP /* Print image info with timestamp */
- /*
- * BOOTP options
- */
- #define CONFIG_BOOTP_BOOTFILESIZE
- #define CONFIG_BOOTP_BOOTPATH
- #define CONFIG_BOOTP_GATEWAY
- #define CONFIG_BOOTP_HOSTNAME
- /*
- * Command line configuration.
- */
- #if defined(CONFIG_PCI)
- #define CODFIG_CMD_PCI
- #endif
- /*
- * Autobooting
- */
- #define CONFIG_PREBOOT "echo;" \
- "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
- "echo"
- #undef CONFIG_BOOTARGS
- #define CONFIG_EXTRA_ENV_SETTINGS \
- "netdev=eth0\0" \
- "nfsargs=setenv bootargs root=/dev/nfs rw " \
- "nfsroot=${serverip}:${rootpath}\0" \
- "ramargs=setenv bootargs root=/dev/ram rw\0" \
- "addip=setenv bootargs ${bootargs} " \
- "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
- ":${hostname}:${netdev}:off panic=1\0" \
- "flash_nfs=run nfsargs addip addcons;" \
- "bootm ${kernel_addr}\0" \
- "flash_self=run ramargs addip;" \
- "bootm ${kernel_addr} ${ramdisk_addr}\0" \
- "addcons=setenv bootargs ${bootargs} console=${contyp}," \
- "${baudrate}\0" \
- "contyp=ttyS0\0" \
- "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addcons;" \
- "bootm\0" \
- "rootpath=/opt/eldk/ppc_6xx\0" \
- "bootfile=/tftpboot/jupiter/uImage\0" \
- ""
- #define CONFIG_BOOTCOMMAND "run flash_self"
- /*
- * IPB Bus clocking configuration.
- */
- #undef CONFIG_SYS_IPBSPEED_133 /* define for 133MHz speed */
- #if 0
- /* pass open firmware flat tree */
- #define OF_CPU "PowerPC,5200@0"
- #define OF_SOC "soc5200@f0000000"
- #define OF_TBCLK (bd->bi_busfreq / 8)
- #define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
- #endif
- #if 0
- /*
- * I2C configuration
- */
- #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
- #define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
- #define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
- #define CONFIG_SYS_I2C_SLAVE 0x7F
- /*
- * EEPROM configuration
- */
- #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
- #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
- #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
- #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70
- #endif
- /*
- * Flash configuration
- */
- #define CONFIG_SYS_FLASH_BASE 0xFF000000
- #define CONFIG_SYS_FLASH_SIZE 0x01000000
- #define CONFIG_SYS_MAX_FLASH_SECT 128 /* max num of sects on one chip */
- #define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE + 0x40000) /* third sector */
- #define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
- #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
- #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */
- #define CONFIG_FLASH_CFI_DRIVER
- #define CONFIG_SYS_FLASH_CFI
- #define CONFIG_SYS_FLASH_EMPTY_INFO
- #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
- #define CONFIG_SYS_UPDATE_FLASH_SIZE 1
- #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
- /*
- * Environment settings
- */
- #define CONFIG_ENV_IS_IN_FLASH 1
- #define CONFIG_ENV_SIZE 0x20000
- #define CONFIG_ENV_SECT_SIZE 0x20000
- #define CONFIG_ENV_OVERWRITE 1
- /* Address and size of Redundant Environment Sector */
- #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
- #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
- /*
- * Memory map
- */
- #define CONFIG_SYS_MBAR 0xF0000000
- #define CONFIG_SYS_SDRAM_BASE 0x00000000
- #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
- /* Use SRAM until RAM will be available */
- #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
- #define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */
- #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
- #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
- #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
- #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
- # define CONFIG_SYS_RAMBOOT 1
- #endif
- #define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
- #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
- #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
- /*
- * Ethernet configuration
- */
- #define CONFIG_MPC5xxx_FEC 1
- #define CONFIG_MPC5xxx_FEC_MII100
- /*
- * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
- */
- /* #define CONFIG_MPC5xxx_FEC_MII10 */
- #define CONFIG_PHY_ADDR 0x00
- /*
- * GPIO configuration
- */
- #define CONFIG_SYS_GPS_PORT_CONFIG 0x10000004
- /*
- * Miscellaneous configurable options
- */
- #define CONFIG_SYS_LONGHELP /* undef to save memory */
- #define CONFIG_CMDLINE_EDITING 1 /* add command line history */
- #if defined(CONFIG_CMD_KGDB)
- #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
- #else
- #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
- #endif
- #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
- #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
- #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
- #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
- #define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
- #define CONFIG_SYS_ALT_MEMTEST 1
- #define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */
- #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
- #if defined(CONFIG_CMD_KGDB)
- # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
- #endif
- /*
- * Various low-level settings
- */
- #define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
- #define CONFIG_SYS_HID0_FINAL HID0_ICE
- #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
- #define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
- #define CONFIG_SYS_BOOTCS_CFG 0x00047801
- #define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
- #define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
- #define CONFIG_SYS_CS_BURST 0x00000000
- #define CONFIG_SYS_CS_DEADCYCLE 0x33333333
- #define CONFIG_SYS_RESET_ADDRESS 0xff000000
- #endif /* __CONFIG_H */
|