ap_sh4a_4a.h 4.6 KB

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  1. /*
  2. * Configuation settings for the Alpha Project AP-SH4A-4A board
  3. *
  4. * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
  5. *
  6. * SPDX-License-Identifier: GPL-2.0+
  7. */
  8. #ifndef __AP_SH4A_4A_H
  9. #define __AP_SH4A_4A_H
  10. #define CONFIG_CPU_SH7734 1
  11. #define CONFIG_AP_SH4A_4A 1
  12. #define CONFIG_400MHZ_MODE 1
  13. /* #define CONFIG_533MHZ_MODE 1 */
  14. #define CONFIG_BOARD_LATE_INIT
  15. #define CONFIG_SYS_TEXT_BASE 0x8BFC0000
  16. #define CONFIG_CMD_SDRAM
  17. #define CONFIG_CMD_ENV
  18. #define CONFIG_BAUDRATE 115200
  19. #define CONFIG_BOOTARGS "console=ttySC4,115200"
  20. #define CONFIG_DISPLAY_BOARDINFO
  21. #undef CONFIG_SHOW_BOOT_PROGRESS
  22. /* Ether */
  23. #define CONFIG_SH_ETHER 1
  24. #define CONFIG_SH_ETHER_USE_PORT (0)
  25. #define CONFIG_SH_ETHER_PHY_ADDR (0x0)
  26. #define CONFIG_SH_ETHER_PHY_MODE (PHY_INTERFACE_MODE_GMII)
  27. #define CONFIG_SH_ETHER_SH7734_MII (0x02) /* GMII */
  28. #define CONFIG_PHYLIB
  29. #define CONFIG_PHY_MICREL 1
  30. #define CONFIG_BITBANGMII
  31. #define CONFIG_BITBANGMII_MULTI
  32. /* I2C */
  33. #define CONFIG_SH_SH7734_I2C 1
  34. #define CONFIG_HARD_I2C 1
  35. #define CONFIG_I2C_MULTI_BUS 1
  36. #define CONFIG_SYS_MAX_I2C_BUS 2
  37. #define CONFIG_SYS_I2C_MODULE 0
  38. #define CONFIG_SYS_I2C_SPEED 400000 /* 400 kHz */
  39. #define CONFIG_SYS_I2C_SLAVE 0x50
  40. #define CONFIG_SH_I2C_DATA_HIGH 4
  41. #define CONFIG_SH_I2C_DATA_LOW 5
  42. #define CONFIG_SH_I2C_CLOCK 500000000
  43. #define CONFIG_SH_I2C_BASE0 0xFFC70000
  44. #define CONFIG_SH_I2C_BASE1 0xFFC71000
  45. /* undef to save memory */
  46. #define CONFIG_SYS_LONGHELP
  47. /* Monitor Command Prompt */
  48. /* Buffer size for input from the Console */
  49. #define CONFIG_SYS_CBSIZE 256
  50. /* Buffer size for Console output */
  51. #define CONFIG_SYS_PBSIZE 256
  52. /* max args accepted for monitor commands */
  53. #define CONFIG_SYS_MAXARGS 16
  54. /* Buffer size for Boot Arguments passed to kernel */
  55. #define CONFIG_SYS_BARGSIZE 512
  56. /* List of legal baudrate settings for this board */
  57. #define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
  58. /* SCIF */
  59. #define CONFIG_SCIF_CONSOLE 1
  60. #define CONFIG_SCIF 1
  61. #define CONFIG_CONS_SCIF4 1
  62. /* Suppress display of console information at boot */
  63. /* SDRAM */
  64. #define CONFIG_SYS_SDRAM_BASE (0x88000000)
  65. #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024)
  66. #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
  67. #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
  68. #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE)
  69. /* Enable alternate, more extensive, memory test */
  70. #undef CONFIG_SYS_ALT_MEMTEST
  71. /* Scratch address used by the alternate memory test */
  72. #undef CONFIG_SYS_MEMTEST_SCRATCH
  73. /* Enable temporary baudrate change while serial download */
  74. #undef CONFIG_SYS_LOADS_BAUD_CHANGE
  75. /* FLASH */
  76. #define CONFIG_FLASH_CFI_DRIVER 1
  77. #define CONFIG_SYS_FLASH_CFI
  78. #undef CONFIG_SYS_FLASH_QUIET_TEST
  79. #define CONFIG_SYS_FLASH_EMPTY_INFO
  80. #define CONFIG_SYS_FLASH_BASE (0xA0000000)
  81. #define CONFIG_SYS_MAX_FLASH_SECT 512
  82. /* if you use all NOR Flash , you change dip-switch. Please see Manual. */
  83. #define CONFIG_SYS_MAX_FLASH_BANKS 1
  84. #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
  85. /* Timeout for Flash erase operations (in ms) */
  86. #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
  87. /* Timeout for Flash write operations (in ms) */
  88. #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
  89. /* Timeout for Flash set sector lock bit operations (in ms) */
  90. #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
  91. /* Timeout for Flash clear lock bit operations (in ms) */
  92. #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
  93. /*
  94. * Use hardware flash sectors protection instead
  95. * of U-Boot software protection
  96. */
  97. #undef CONFIG_SYS_FLASH_PROTECTION
  98. #undef CONFIG_SYS_DIRECT_FLASH_TFTP
  99. /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
  100. #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
  101. /* Monitor size */
  102. #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
  103. /* Size of DRAM reserved for malloc() use */
  104. #define CONFIG_SYS_MALLOC_LEN (256 * 1024)
  105. #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
  106. /* ENV setting */
  107. #define CONFIG_ENV_IS_IN_FLASH
  108. #define CONFIG_ENV_OVERWRITE 1
  109. #define CONFIG_ENV_SECT_SIZE (128 * 1024)
  110. #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
  111. #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
  112. /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
  113. #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
  114. #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
  115. /* Board Clock */
  116. #if defined(CONFIG_400MHZ_MODE)
  117. #define CONFIG_SYS_CLK_FREQ 50000000
  118. #else
  119. #define CONFIG_SYS_CLK_FREQ 44444444
  120. #endif
  121. #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
  122. #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
  123. #define CONFIG_SYS_TMU_CLK_DIV 4
  124. #endif /* __AP_SH4A_4A_H */