fsl_diu_fb.c 10.0 KB

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  1. /*
  2. * Copyright 2007, 2010-2011 Freescale Semiconductor, Inc.
  3. * Authors: York Sun <yorksun@freescale.com>
  4. * Timur Tabi <timur@freescale.com>
  5. *
  6. * FSL DIU Framebuffer driver
  7. *
  8. * SPDX-License-Identifier: GPL-2.0+
  9. */
  10. #include <common.h>
  11. #include <malloc.h>
  12. #include <asm/io.h>
  13. #include "videomodes.h"
  14. #include <video_fb.h>
  15. #include <fsl_diu_fb.h>
  16. #include <linux/list.h>
  17. #include <linux/fb.h>
  18. /* This setting is used for the ifm pdm360ng with PRIMEVIEW PM070WL3 */
  19. static struct fb_videomode fsl_diu_mode_800_480 = {
  20. .name = "800x480-60",
  21. .refresh = 60,
  22. .xres = 800,
  23. .yres = 480,
  24. .pixclock = 31250,
  25. .left_margin = 86,
  26. .right_margin = 42,
  27. .upper_margin = 33,
  28. .lower_margin = 10,
  29. .hsync_len = 128,
  30. .vsync_len = 2,
  31. .sync = 0,
  32. .vmode = FB_VMODE_NONINTERLACED
  33. };
  34. /* For the SHARP LQ084S3LG01, used on the P1022DS board */
  35. static struct fb_videomode fsl_diu_mode_800_600 = {
  36. .name = "800x600-60",
  37. .refresh = 60,
  38. .xres = 800,
  39. .yres = 600,
  40. .pixclock = 25000,
  41. .left_margin = 88,
  42. .right_margin = 40,
  43. .upper_margin = 23,
  44. .lower_margin = 1,
  45. .hsync_len = 128,
  46. .vsync_len = 4,
  47. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  48. .vmode = FB_VMODE_NONINTERLACED
  49. };
  50. /*
  51. * These parameters give default parameters
  52. * for video output 1024x768,
  53. * FIXME - change timing to proper amounts
  54. * hsync 31.5kHz, vsync 60Hz
  55. */
  56. static struct fb_videomode fsl_diu_mode_1024_768 = {
  57. .name = "1024x768-60",
  58. .refresh = 60,
  59. .xres = 1024,
  60. .yres = 768,
  61. .pixclock = 15385,
  62. .left_margin = 160,
  63. .right_margin = 24,
  64. .upper_margin = 29,
  65. .lower_margin = 3,
  66. .hsync_len = 136,
  67. .vsync_len = 6,
  68. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  69. .vmode = FB_VMODE_NONINTERLACED
  70. };
  71. static struct fb_videomode fsl_diu_mode_1280_1024 = {
  72. .name = "1280x1024-60",
  73. .refresh = 60,
  74. .xres = 1280,
  75. .yres = 1024,
  76. .pixclock = 9375,
  77. .left_margin = 38,
  78. .right_margin = 128,
  79. .upper_margin = 2,
  80. .lower_margin = 7,
  81. .hsync_len = 216,
  82. .vsync_len = 37,
  83. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  84. .vmode = FB_VMODE_NONINTERLACED
  85. };
  86. static struct fb_videomode fsl_diu_mode_1280_720 = {
  87. .name = "1280x720-60",
  88. .refresh = 60,
  89. .xres = 1280,
  90. .yres = 720,
  91. .pixclock = 13426,
  92. .left_margin = 192,
  93. .right_margin = 64,
  94. .upper_margin = 22,
  95. .lower_margin = 1,
  96. .hsync_len = 136,
  97. .vsync_len = 3,
  98. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  99. .vmode = FB_VMODE_NONINTERLACED
  100. };
  101. static struct fb_videomode fsl_diu_mode_1920_1080 = {
  102. .name = "1920x1080-60",
  103. .refresh = 60,
  104. .xres = 1920,
  105. .yres = 1080,
  106. .pixclock = 5787,
  107. .left_margin = 328,
  108. .right_margin = 120,
  109. .upper_margin = 34,
  110. .lower_margin = 1,
  111. .hsync_len = 208,
  112. .vsync_len = 3,
  113. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  114. .vmode = FB_VMODE_NONINTERLACED
  115. };
  116. /*
  117. * These are the fields of area descriptor(in DDR memory) for every plane
  118. */
  119. struct diu_ad {
  120. /* Word 0(32-bit) in DDR memory */
  121. __le32 pix_fmt; /* hard coding pixel format */
  122. /* Word 1(32-bit) in DDR memory */
  123. __le32 addr;
  124. /* Word 2(32-bit) in DDR memory */
  125. __le32 src_size_g_alpha;
  126. /* Word 3(32-bit) in DDR memory */
  127. __le32 aoi_size;
  128. /* Word 4(32-bit) in DDR memory */
  129. __le32 offset_xyi;
  130. /* Word 5(32-bit) in DDR memory */
  131. __le32 offset_xyd;
  132. /* Word 6(32-bit) in DDR memory */
  133. __le32 ckmax_r:8;
  134. __le32 ckmax_g:8;
  135. __le32 ckmax_b:8;
  136. __le32 res9:8;
  137. /* Word 7(32-bit) in DDR memory */
  138. __le32 ckmin_r:8;
  139. __le32 ckmin_g:8;
  140. __le32 ckmin_b:8;
  141. __le32 res10:8;
  142. /* Word 8(32-bit) in DDR memory */
  143. __le32 next_ad;
  144. /* Word 9(32-bit) in DDR memory, just for 64-bit aligned */
  145. __le32 res[3];
  146. } __attribute__ ((packed));
  147. /*
  148. * DIU register map
  149. */
  150. struct diu {
  151. __be32 desc[3];
  152. __be32 gamma;
  153. __be32 pallete;
  154. __be32 cursor;
  155. __be32 curs_pos;
  156. __be32 diu_mode;
  157. __be32 bgnd;
  158. __be32 bgnd_wb;
  159. __be32 disp_size;
  160. __be32 wb_size;
  161. __be32 wb_mem_addr;
  162. __be32 hsyn_para;
  163. __be32 vsyn_para;
  164. __be32 syn_pol;
  165. __be32 thresholds;
  166. __be32 int_status;
  167. __be32 int_mask;
  168. __be32 colorbar[8];
  169. __be32 filling;
  170. __be32 plut;
  171. } __attribute__ ((packed));
  172. struct diu_addr {
  173. void *vaddr; /* Virtual address */
  174. u32 paddr; /* 32-bit physical address */
  175. unsigned int offset; /* Alignment offset */
  176. };
  177. static struct fb_info info;
  178. /*
  179. * Align to 64-bit(8-byte), 32-byte, etc.
  180. */
  181. static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align)
  182. {
  183. u32 offset, ssize;
  184. u32 mask;
  185. ssize = size + bytes_align;
  186. buf->vaddr = malloc(ssize);
  187. if (!buf->vaddr)
  188. return -1;
  189. memset(buf->vaddr, 0, ssize);
  190. mask = bytes_align - 1;
  191. offset = (u32)buf->vaddr & mask;
  192. if (offset) {
  193. buf->offset = bytes_align - offset;
  194. buf->vaddr += offset;
  195. } else
  196. buf->offset = 0;
  197. buf->paddr = virt_to_phys(buf->vaddr);
  198. return 0;
  199. }
  200. /*
  201. * Allocate a framebuffer and an Area Descriptor that points to it. Both
  202. * are created in the same memory block. The Area Descriptor is updated to
  203. * point to the framebuffer memory. Memory is aligned as needed.
  204. */
  205. static struct diu_ad *allocate_fb(unsigned int xres, unsigned int yres,
  206. unsigned int depth, char **fb)
  207. {
  208. unsigned long size = xres * yres * depth;
  209. struct diu_addr addr;
  210. struct diu_ad *ad;
  211. size_t ad_size = roundup(sizeof(struct diu_ad), 32);
  212. /*
  213. * Allocate a memory block that holds the Area Descriptor and the
  214. * frame buffer right behind it. To keep the code simple, everything
  215. * is aligned on a 32-byte address.
  216. */
  217. if (allocate_buf(&addr, ad_size + size, 32) < 0)
  218. return NULL;
  219. ad = addr.vaddr;
  220. ad->addr = cpu_to_le32(addr.paddr + ad_size);
  221. ad->aoi_size = cpu_to_le32((yres << 16) | xres);
  222. ad->src_size_g_alpha = cpu_to_le32((yres << 12) | xres);
  223. ad->offset_xyi = 0;
  224. ad->offset_xyd = 0;
  225. if (fb)
  226. *fb = addr.vaddr + ad_size;
  227. return ad;
  228. }
  229. int fsl_diu_init(u16 xres, u16 yres, u32 pixel_format, int gamma_fix)
  230. {
  231. struct fb_videomode *fsl_diu_mode_db;
  232. struct diu_ad *ad;
  233. struct diu *hw = (struct diu *)CONFIG_SYS_DIU_ADDR;
  234. u8 *gamma_table_base;
  235. unsigned int i, j;
  236. struct diu_addr gamma;
  237. struct diu_addr cursor;
  238. /* Convert the X,Y resolution pair into a single number */
  239. #define RESOLUTION(x, y) (((u32)(x) << 16) | (y))
  240. switch (RESOLUTION(xres, yres)) {
  241. case RESOLUTION(800, 480):
  242. fsl_diu_mode_db = &fsl_diu_mode_800_480;
  243. break;
  244. case RESOLUTION(800, 600):
  245. fsl_diu_mode_db = &fsl_diu_mode_800_600;
  246. break;
  247. case RESOLUTION(1024, 768):
  248. fsl_diu_mode_db = &fsl_diu_mode_1024_768;
  249. break;
  250. case RESOLUTION(1280, 1024):
  251. fsl_diu_mode_db = &fsl_diu_mode_1280_1024;
  252. break;
  253. case RESOLUTION(1280, 720):
  254. fsl_diu_mode_db = &fsl_diu_mode_1280_720;
  255. break;
  256. case RESOLUTION(1920, 1080):
  257. fsl_diu_mode_db = &fsl_diu_mode_1920_1080;
  258. break;
  259. default:
  260. printf("DIU: Unsupported resolution %ux%u\n", xres, yres);
  261. return -1;
  262. }
  263. /* read mode info */
  264. info.var.xres = fsl_diu_mode_db->xres;
  265. info.var.yres = fsl_diu_mode_db->yres;
  266. info.var.bits_per_pixel = 32;
  267. info.var.pixclock = fsl_diu_mode_db->pixclock;
  268. info.var.left_margin = fsl_diu_mode_db->left_margin;
  269. info.var.right_margin = fsl_diu_mode_db->right_margin;
  270. info.var.upper_margin = fsl_diu_mode_db->upper_margin;
  271. info.var.lower_margin = fsl_diu_mode_db->lower_margin;
  272. info.var.hsync_len = fsl_diu_mode_db->hsync_len;
  273. info.var.vsync_len = fsl_diu_mode_db->vsync_len;
  274. info.var.sync = fsl_diu_mode_db->sync;
  275. info.var.vmode = fsl_diu_mode_db->vmode;
  276. info.fix.line_length = info.var.xres * info.var.bits_per_pixel / 8;
  277. /* Memory allocation for framebuffer */
  278. info.screen_size =
  279. info.var.xres * info.var.yres * (info.var.bits_per_pixel / 8);
  280. ad = allocate_fb(info.var.xres, info.var.yres,
  281. info.var.bits_per_pixel / 8, &info.screen_base);
  282. if (!ad) {
  283. printf("DIU: Out of memory\n");
  284. return -1;
  285. }
  286. ad->pix_fmt = pixel_format;
  287. /* Disable chroma keying function */
  288. ad->ckmax_r = 0;
  289. ad->ckmax_g = 0;
  290. ad->ckmax_b = 0;
  291. ad->ckmin_r = 255;
  292. ad->ckmin_g = 255;
  293. ad->ckmin_b = 255;
  294. /* Initialize the gamma table */
  295. if (allocate_buf(&gamma, 256 * 3, 32) < 0) {
  296. printf("DIU: Out of memory\n");
  297. return -1;
  298. }
  299. gamma_table_base = gamma.vaddr;
  300. for (i = 0; i <= 2; i++)
  301. for (j = 0; j < 256; j++)
  302. *gamma_table_base++ = j;
  303. if (gamma_fix == 1) { /* fix the gamma */
  304. gamma_table_base = gamma.vaddr;
  305. for (i = 0; i < 256 * 3; i++) {
  306. gamma_table_base[i] = (gamma_table_base[i] << 2)
  307. | ((gamma_table_base[i] >> 6) & 0x03);
  308. }
  309. }
  310. /* Initialize the cursor */
  311. if (allocate_buf(&cursor, 32 * 32 * 2, 32) < 0) {
  312. printf("DIU: Can't alloc cursor data\n");
  313. return -1;
  314. }
  315. /* Program DIU registers */
  316. out_be32(&hw->diu_mode, 0); /* Temporarily disable the DIU */
  317. out_be32(&hw->gamma, gamma.paddr);
  318. out_be32(&hw->cursor, cursor.paddr);
  319. out_be32(&hw->bgnd, 0x007F7F7F);
  320. out_be32(&hw->disp_size, info.var.yres << 16 | info.var.xres);
  321. out_be32(&hw->hsyn_para, info.var.left_margin << 22 |
  322. info.var.hsync_len << 11 |
  323. info.var.right_margin);
  324. out_be32(&hw->vsyn_para, info.var.upper_margin << 22 |
  325. info.var.vsync_len << 11 |
  326. info.var.lower_margin);
  327. /* Pixel Clock configuration */
  328. diu_set_pixel_clock(info.var.pixclock);
  329. /* Set the frame buffers */
  330. out_be32(&hw->desc[0], virt_to_phys(ad));
  331. out_be32(&hw->desc[1], 0);
  332. out_be32(&hw->desc[2], 0);
  333. /* Enable the DIU, set display to all three planes */
  334. out_be32(&hw->diu_mode, 1);
  335. return 0;
  336. }
  337. void *video_hw_init(void)
  338. {
  339. static GraphicDevice ctfb;
  340. const char *options;
  341. unsigned int depth = 0, freq = 0;
  342. if (!video_get_video_mode(&ctfb.winSizeX, &ctfb.winSizeY, &depth, &freq,
  343. &options))
  344. return NULL;
  345. /* Find the monitor port, which is a required option */
  346. if (!options)
  347. return NULL;
  348. if (strncmp(options, "monitor=", 8) != 0)
  349. return NULL;
  350. if (platform_diu_init(ctfb.winSizeX, ctfb.winSizeY, options + 8) < 0)
  351. return NULL;
  352. /* fill in Graphic device struct */
  353. sprintf(ctfb.modeIdent, "%ix%ix%i %ikHz %iHz",
  354. ctfb.winSizeX, ctfb.winSizeY, depth, 64, freq);
  355. ctfb.frameAdrs = (unsigned int)info.screen_base;
  356. ctfb.plnSizeX = ctfb.winSizeX;
  357. ctfb.plnSizeY = ctfb.winSizeY;
  358. ctfb.gdfBytesPP = 4;
  359. ctfb.gdfIndex = GDF_32BIT_X888RGB;
  360. ctfb.isaBase = 0;
  361. ctfb.pciBase = 0;
  362. ctfb.memSize = info.screen_size;
  363. /* Cursor Start Address */
  364. ctfb.dprBase = 0;
  365. ctfb.vprBase = 0;
  366. ctfb.cprBase = 0;
  367. return &ctfb;
  368. }