omap2430.c 15 KB

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  1. /*
  2. * Copyright (C) 2005-2007 by Texas Instruments
  3. * Some code has been taken from tusb6010.c
  4. * Copyrights for that are attributable to:
  5. * Copyright (C) 2006 Nokia Corporation
  6. * Tony Lindgren <tony@atomide.com>
  7. *
  8. * This file is part of the Inventra Controller Driver for Linux.
  9. *
  10. * SPDX-License-Identifier: GPL-2.0
  11. */
  12. #ifndef __UBOOT__
  13. #include <linux/module.h>
  14. #include <linux/kernel.h>
  15. #include <linux/sched.h>
  16. #include <linux/init.h>
  17. #include <linux/list.h>
  18. #include <linux/io.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/dma-mapping.h>
  21. #include <linux/pm_runtime.h>
  22. #include <linux/err.h>
  23. #include <linux/usb/musb-omap.h>
  24. #else
  25. #include <common.h>
  26. #include <asm/omap_common.h>
  27. #include <asm/omap_musb.h>
  28. #include <twl4030.h>
  29. #include <twl6030.h>
  30. #include "linux-compat.h"
  31. #endif
  32. #include "musb_core.h"
  33. #include "omap2430.h"
  34. #ifndef __UBOOT__
  35. struct omap2430_glue {
  36. struct device *dev;
  37. struct platform_device *musb;
  38. enum omap_musb_vbus_id_status status;
  39. struct work_struct omap_musb_mailbox_work;
  40. };
  41. #define glue_to_musb(g) platform_get_drvdata(g->musb)
  42. struct omap2430_glue *_glue;
  43. static struct timer_list musb_idle_timer;
  44. static void musb_do_idle(unsigned long _musb)
  45. {
  46. struct musb *musb = (void *)_musb;
  47. unsigned long flags;
  48. u8 power;
  49. u8 devctl;
  50. spin_lock_irqsave(&musb->lock, flags);
  51. switch (musb->xceiv->state) {
  52. case OTG_STATE_A_WAIT_BCON:
  53. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  54. if (devctl & MUSB_DEVCTL_BDEVICE) {
  55. musb->xceiv->state = OTG_STATE_B_IDLE;
  56. MUSB_DEV_MODE(musb);
  57. } else {
  58. musb->xceiv->state = OTG_STATE_A_IDLE;
  59. MUSB_HST_MODE(musb);
  60. }
  61. break;
  62. case OTG_STATE_A_SUSPEND:
  63. /* finish RESUME signaling? */
  64. if (musb->port1_status & MUSB_PORT_STAT_RESUME) {
  65. power = musb_readb(musb->mregs, MUSB_POWER);
  66. power &= ~MUSB_POWER_RESUME;
  67. dev_dbg(musb->controller, "root port resume stopped, power %02x\n", power);
  68. musb_writeb(musb->mregs, MUSB_POWER, power);
  69. musb->is_active = 1;
  70. musb->port1_status &= ~(USB_PORT_STAT_SUSPEND
  71. | MUSB_PORT_STAT_RESUME);
  72. musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16;
  73. usb_hcd_poll_rh_status(musb_to_hcd(musb));
  74. /* NOTE: it might really be A_WAIT_BCON ... */
  75. musb->xceiv->state = OTG_STATE_A_HOST;
  76. }
  77. break;
  78. case OTG_STATE_A_HOST:
  79. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  80. if (devctl & MUSB_DEVCTL_BDEVICE)
  81. musb->xceiv->state = OTG_STATE_B_IDLE;
  82. else
  83. musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
  84. default:
  85. break;
  86. }
  87. spin_unlock_irqrestore(&musb->lock, flags);
  88. }
  89. static void omap2430_musb_try_idle(struct musb *musb, unsigned long timeout)
  90. {
  91. unsigned long default_timeout = jiffies + msecs_to_jiffies(3);
  92. static unsigned long last_timer;
  93. if (timeout == 0)
  94. timeout = default_timeout;
  95. /* Never idle if active, or when VBUS timeout is not set as host */
  96. if (musb->is_active || ((musb->a_wait_bcon == 0)
  97. && (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) {
  98. dev_dbg(musb->controller, "%s active, deleting timer\n",
  99. otg_state_string(musb->xceiv->state));
  100. del_timer(&musb_idle_timer);
  101. last_timer = jiffies;
  102. return;
  103. }
  104. if (time_after(last_timer, timeout)) {
  105. if (!timer_pending(&musb_idle_timer))
  106. last_timer = timeout;
  107. else {
  108. dev_dbg(musb->controller, "Longer idle timer already pending, ignoring\n");
  109. return;
  110. }
  111. }
  112. last_timer = timeout;
  113. dev_dbg(musb->controller, "%s inactive, for idle timer for %lu ms\n",
  114. otg_state_string(musb->xceiv->state),
  115. (unsigned long)jiffies_to_msecs(timeout - jiffies));
  116. mod_timer(&musb_idle_timer, timeout);
  117. }
  118. static void omap2430_musb_set_vbus(struct musb *musb, int is_on)
  119. {
  120. struct usb_otg *otg = musb->xceiv->otg;
  121. u8 devctl;
  122. unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  123. int ret = 1;
  124. /* HDRC controls CPEN, but beware current surges during device
  125. * connect. They can trigger transient overcurrent conditions
  126. * that must be ignored.
  127. */
  128. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  129. if (is_on) {
  130. if (musb->xceiv->state == OTG_STATE_A_IDLE) {
  131. /* start the session */
  132. devctl |= MUSB_DEVCTL_SESSION;
  133. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  134. /*
  135. * Wait for the musb to set as A device to enable the
  136. * VBUS
  137. */
  138. while (musb_readb(musb->mregs, MUSB_DEVCTL) & 0x80) {
  139. cpu_relax();
  140. if (time_after(jiffies, timeout)) {
  141. dev_err(musb->controller,
  142. "configured as A device timeout");
  143. ret = -EINVAL;
  144. break;
  145. }
  146. }
  147. if (ret && otg->set_vbus)
  148. otg_set_vbus(otg, 1);
  149. } else {
  150. musb->is_active = 1;
  151. otg->default_a = 1;
  152. musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
  153. devctl |= MUSB_DEVCTL_SESSION;
  154. MUSB_HST_MODE(musb);
  155. }
  156. } else {
  157. musb->is_active = 0;
  158. /* NOTE: we're skipping A_WAIT_VFALL -> A_IDLE and
  159. * jumping right to B_IDLE...
  160. */
  161. otg->default_a = 0;
  162. musb->xceiv->state = OTG_STATE_B_IDLE;
  163. devctl &= ~MUSB_DEVCTL_SESSION;
  164. MUSB_DEV_MODE(musb);
  165. }
  166. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  167. dev_dbg(musb->controller, "VBUS %s, devctl %02x "
  168. /* otg %3x conf %08x prcm %08x */ "\n",
  169. otg_state_string(musb->xceiv->state),
  170. musb_readb(musb->mregs, MUSB_DEVCTL));
  171. }
  172. static int omap2430_musb_set_mode(struct musb *musb, u8 musb_mode)
  173. {
  174. u8 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  175. devctl |= MUSB_DEVCTL_SESSION;
  176. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  177. return 0;
  178. }
  179. #endif
  180. static inline void omap2430_low_level_exit(struct musb *musb)
  181. {
  182. u32 l;
  183. /* in any role */
  184. l = musb_readl(musb->mregs, OTG_FORCESTDBY);
  185. l |= ENABLEFORCE; /* enable MSTANDBY */
  186. musb_writel(musb->mregs, OTG_FORCESTDBY, l);
  187. }
  188. static inline void omap2430_low_level_init(struct musb *musb)
  189. {
  190. u32 l;
  191. l = musb_readl(musb->mregs, OTG_FORCESTDBY);
  192. l &= ~ENABLEFORCE; /* disable MSTANDBY */
  193. musb_writel(musb->mregs, OTG_FORCESTDBY, l);
  194. }
  195. #ifndef __UBOOT__
  196. void omap_musb_mailbox(enum omap_musb_vbus_id_status status)
  197. {
  198. struct omap2430_glue *glue = _glue;
  199. struct musb *musb = glue_to_musb(glue);
  200. glue->status = status;
  201. if (!musb) {
  202. dev_err(glue->dev, "musb core is not yet ready\n");
  203. return;
  204. }
  205. schedule_work(&glue->omap_musb_mailbox_work);
  206. }
  207. EXPORT_SYMBOL_GPL(omap_musb_mailbox);
  208. static void omap_musb_set_mailbox(struct omap2430_glue *glue)
  209. {
  210. struct musb *musb = glue_to_musb(glue);
  211. struct device *dev = musb->controller;
  212. struct musb_hdrc_platform_data *pdata = dev->platform_data;
  213. struct omap_musb_board_data *data = pdata->board_data;
  214. struct usb_otg *otg = musb->xceiv->otg;
  215. switch (glue->status) {
  216. case OMAP_MUSB_ID_GROUND:
  217. dev_dbg(dev, "ID GND\n");
  218. otg->default_a = true;
  219. musb->xceiv->state = OTG_STATE_A_IDLE;
  220. musb->xceiv->last_event = USB_EVENT_ID;
  221. if (!is_otg_enabled(musb) || musb->gadget_driver) {
  222. pm_runtime_get_sync(dev);
  223. usb_phy_init(musb->xceiv);
  224. omap2430_musb_set_vbus(musb, 1);
  225. }
  226. break;
  227. case OMAP_MUSB_VBUS_VALID:
  228. dev_dbg(dev, "VBUS Connect\n");
  229. otg->default_a = false;
  230. musb->xceiv->state = OTG_STATE_B_IDLE;
  231. musb->xceiv->last_event = USB_EVENT_VBUS;
  232. if (musb->gadget_driver)
  233. pm_runtime_get_sync(dev);
  234. usb_phy_init(musb->xceiv);
  235. break;
  236. case OMAP_MUSB_ID_FLOAT:
  237. case OMAP_MUSB_VBUS_OFF:
  238. dev_dbg(dev, "VBUS Disconnect\n");
  239. musb->xceiv->last_event = USB_EVENT_NONE;
  240. if (is_otg_enabled(musb) || is_peripheral_enabled(musb))
  241. if (musb->gadget_driver) {
  242. pm_runtime_mark_last_busy(dev);
  243. pm_runtime_put_autosuspend(dev);
  244. }
  245. if (data->interface_type == MUSB_INTERFACE_UTMI) {
  246. if (musb->xceiv->otg->set_vbus)
  247. otg_set_vbus(musb->xceiv->otg, 0);
  248. }
  249. usb_phy_shutdown(musb->xceiv);
  250. break;
  251. default:
  252. dev_dbg(dev, "ID float\n");
  253. }
  254. }
  255. static void omap_musb_mailbox_work(struct work_struct *mailbox_work)
  256. {
  257. struct omap2430_glue *glue = container_of(mailbox_work,
  258. struct omap2430_glue, omap_musb_mailbox_work);
  259. omap_musb_set_mailbox(glue);
  260. }
  261. #endif
  262. static int omap2430_musb_init(struct musb *musb)
  263. {
  264. u32 l;
  265. int status = 0;
  266. unsigned long int start;
  267. #ifndef __UBOOT__
  268. struct device *dev = musb->controller;
  269. struct omap2430_glue *glue = dev_get_drvdata(dev->parent);
  270. struct musb_hdrc_platform_data *plat = dev->platform_data;
  271. struct omap_musb_board_data *data = plat->board_data;
  272. #else
  273. struct omap_musb_board_data *data =
  274. (struct omap_musb_board_data *)musb->controller;
  275. #endif
  276. /* Reset the controller */
  277. musb_writel(musb->mregs, OTG_SYSCONFIG, SOFTRST);
  278. start = get_timer(0);
  279. while (1) {
  280. l = musb_readl(musb->mregs, OTG_SYSCONFIG);
  281. if ((l & SOFTRST) == 0)
  282. break;
  283. if (get_timer(start) > (CONFIG_SYS_HZ / 1000)) {
  284. dev_err(musb->controller, "MUSB reset is taking too long\n");
  285. return -ENODEV;
  286. }
  287. }
  288. #ifndef __UBOOT__
  289. /* We require some kind of external transceiver, hooked
  290. * up through ULPI. TWL4030-family PMICs include one,
  291. * which needs a driver, drivers aren't always needed.
  292. */
  293. musb->xceiv = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2);
  294. if (IS_ERR_OR_NULL(musb->xceiv)) {
  295. pr_err("HS USB OTG: no transceiver configured\n");
  296. return -ENODEV;
  297. }
  298. status = pm_runtime_get_sync(dev);
  299. if (status < 0) {
  300. dev_err(dev, "pm_runtime_get_sync FAILED %d\n", status);
  301. goto err1;
  302. }
  303. #endif
  304. l = musb_readl(musb->mregs, OTG_INTERFSEL);
  305. if (data->interface_type == MUSB_INTERFACE_UTMI) {
  306. /* OMAP4 uses Internal PHY GS70 which uses UTMI interface */
  307. l &= ~ULPI_12PIN; /* Disable ULPI */
  308. l |= UTMI_8BIT; /* Enable UTMI */
  309. } else {
  310. l |= ULPI_12PIN;
  311. }
  312. musb_writel(musb->mregs, OTG_INTERFSEL, l);
  313. pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, "
  314. "sysstatus 0x%x, intrfsel 0x%x, simenable 0x%x\n",
  315. musb_readl(musb->mregs, OTG_REVISION),
  316. musb_readl(musb->mregs, OTG_SYSCONFIG),
  317. musb_readl(musb->mregs, OTG_SYSSTATUS),
  318. musb_readl(musb->mregs, OTG_INTERFSEL),
  319. musb_readl(musb->mregs, OTG_SIMENABLE));
  320. #ifndef __UBOOT__
  321. setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
  322. if (glue->status != OMAP_MUSB_UNKNOWN)
  323. omap_musb_set_mailbox(glue);
  324. pm_runtime_put_noidle(musb->controller);
  325. #endif
  326. return 0;
  327. err1:
  328. return status;
  329. }
  330. #ifndef __UBOOT__
  331. static void omap2430_musb_enable(struct musb *musb)
  332. #else
  333. static int omap2430_musb_enable(struct musb *musb)
  334. #endif
  335. {
  336. #ifndef __UBOOT__
  337. u8 devctl;
  338. unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  339. struct device *dev = musb->controller;
  340. struct omap2430_glue *glue = dev_get_drvdata(dev->parent);
  341. struct musb_hdrc_platform_data *pdata = dev->platform_data;
  342. struct omap_musb_board_data *data = pdata->board_data;
  343. switch (glue->status) {
  344. case OMAP_MUSB_ID_GROUND:
  345. usb_phy_init(musb->xceiv);
  346. if (data->interface_type != MUSB_INTERFACE_UTMI)
  347. break;
  348. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  349. /* start the session */
  350. devctl |= MUSB_DEVCTL_SESSION;
  351. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  352. while (musb_readb(musb->mregs, MUSB_DEVCTL) &
  353. MUSB_DEVCTL_BDEVICE) {
  354. cpu_relax();
  355. if (time_after(jiffies, timeout)) {
  356. dev_err(dev, "configured as A device timeout");
  357. break;
  358. }
  359. }
  360. break;
  361. case OMAP_MUSB_VBUS_VALID:
  362. usb_phy_init(musb->xceiv);
  363. break;
  364. default:
  365. break;
  366. }
  367. #else
  368. #ifdef CONFIG_TWL4030_USB
  369. if (twl4030_usb_ulpi_init()) {
  370. serial_printf("ERROR: %s Could not initialize PHY\n",
  371. __PRETTY_FUNCTION__);
  372. }
  373. #endif
  374. #ifdef CONFIG_TWL6030_POWER
  375. twl6030_usb_device_settings();
  376. #endif
  377. #ifdef CONFIG_OMAP4430
  378. u32 *usbotghs_control = (u32 *)((*ctrl)->control_usbotghs_ctrl);
  379. *usbotghs_control = USBOTGHS_CONTROL_AVALID |
  380. USBOTGHS_CONTROL_VBUSVALID | USBOTGHS_CONTROL_IDDIG;
  381. #endif
  382. return 0;
  383. #endif
  384. }
  385. static void omap2430_musb_disable(struct musb *musb)
  386. {
  387. #ifndef __UBOOT__
  388. struct device *dev = musb->controller;
  389. struct omap2430_glue *glue = dev_get_drvdata(dev->parent);
  390. if (glue->status != OMAP_MUSB_UNKNOWN)
  391. usb_phy_shutdown(musb->xceiv);
  392. #endif
  393. }
  394. static int omap2430_musb_exit(struct musb *musb)
  395. {
  396. del_timer_sync(&musb_idle_timer);
  397. omap2430_low_level_exit(musb);
  398. return 0;
  399. }
  400. #ifndef __UBOOT__
  401. static const struct musb_platform_ops omap2430_ops = {
  402. #else
  403. const struct musb_platform_ops omap2430_ops = {
  404. #endif
  405. .init = omap2430_musb_init,
  406. .exit = omap2430_musb_exit,
  407. #ifndef __UBOOT__
  408. .set_mode = omap2430_musb_set_mode,
  409. .try_idle = omap2430_musb_try_idle,
  410. .set_vbus = omap2430_musb_set_vbus,
  411. #endif
  412. .enable = omap2430_musb_enable,
  413. .disable = omap2430_musb_disable,
  414. };
  415. #ifndef __UBOOT__
  416. static u64 omap2430_dmamask = DMA_BIT_MASK(32);
  417. static int __devinit omap2430_probe(struct platform_device *pdev)
  418. {
  419. struct musb_hdrc_platform_data *pdata = pdev->dev.platform_data;
  420. struct platform_device *musb;
  421. struct omap2430_glue *glue;
  422. int ret = -ENOMEM;
  423. glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
  424. if (!glue) {
  425. dev_err(&pdev->dev, "failed to allocate glue context\n");
  426. goto err0;
  427. }
  428. musb = platform_device_alloc("musb-hdrc", -1);
  429. if (!musb) {
  430. dev_err(&pdev->dev, "failed to allocate musb device\n");
  431. goto err0;
  432. }
  433. musb->dev.parent = &pdev->dev;
  434. musb->dev.dma_mask = &omap2430_dmamask;
  435. musb->dev.coherent_dma_mask = omap2430_dmamask;
  436. glue->dev = &pdev->dev;
  437. glue->musb = musb;
  438. glue->status = OMAP_MUSB_UNKNOWN;
  439. pdata->platform_ops = &omap2430_ops;
  440. platform_set_drvdata(pdev, glue);
  441. /*
  442. * REVISIT if we ever have two instances of the wrapper, we will be
  443. * in big trouble
  444. */
  445. _glue = glue;
  446. INIT_WORK(&glue->omap_musb_mailbox_work, omap_musb_mailbox_work);
  447. ret = platform_device_add_resources(musb, pdev->resource,
  448. pdev->num_resources);
  449. if (ret) {
  450. dev_err(&pdev->dev, "failed to add resources\n");
  451. goto err1;
  452. }
  453. ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
  454. if (ret) {
  455. dev_err(&pdev->dev, "failed to add platform_data\n");
  456. goto err1;
  457. }
  458. pm_runtime_enable(&pdev->dev);
  459. ret = platform_device_add(musb);
  460. if (ret) {
  461. dev_err(&pdev->dev, "failed to register musb device\n");
  462. goto err1;
  463. }
  464. return 0;
  465. err1:
  466. platform_device_put(musb);
  467. err0:
  468. return ret;
  469. }
  470. static int __devexit omap2430_remove(struct platform_device *pdev)
  471. {
  472. struct omap2430_glue *glue = platform_get_drvdata(pdev);
  473. cancel_work_sync(&glue->omap_musb_mailbox_work);
  474. platform_device_del(glue->musb);
  475. platform_device_put(glue->musb);
  476. return 0;
  477. }
  478. #ifdef CONFIG_PM
  479. static int omap2430_runtime_suspend(struct device *dev)
  480. {
  481. struct omap2430_glue *glue = dev_get_drvdata(dev);
  482. struct musb *musb = glue_to_musb(glue);
  483. if (musb) {
  484. musb->context.otg_interfsel = musb_readl(musb->mregs,
  485. OTG_INTERFSEL);
  486. omap2430_low_level_exit(musb);
  487. usb_phy_set_suspend(musb->xceiv, 1);
  488. }
  489. return 0;
  490. }
  491. static int omap2430_runtime_resume(struct device *dev)
  492. {
  493. struct omap2430_glue *glue = dev_get_drvdata(dev);
  494. struct musb *musb = glue_to_musb(glue);
  495. if (musb) {
  496. omap2430_low_level_init(musb);
  497. musb_writel(musb->mregs, OTG_INTERFSEL,
  498. musb->context.otg_interfsel);
  499. usb_phy_set_suspend(musb->xceiv, 0);
  500. }
  501. return 0;
  502. }
  503. static struct dev_pm_ops omap2430_pm_ops = {
  504. .runtime_suspend = omap2430_runtime_suspend,
  505. .runtime_resume = omap2430_runtime_resume,
  506. };
  507. #define DEV_PM_OPS (&omap2430_pm_ops)
  508. #else
  509. #define DEV_PM_OPS NULL
  510. #endif
  511. static struct platform_driver omap2430_driver = {
  512. .probe = omap2430_probe,
  513. .remove = __devexit_p(omap2430_remove),
  514. .driver = {
  515. .name = "musb-omap2430",
  516. .pm = DEV_PM_OPS,
  517. },
  518. };
  519. MODULE_DESCRIPTION("OMAP2PLUS MUSB Glue Layer");
  520. MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
  521. MODULE_LICENSE("GPL v2");
  522. static int __init omap2430_init(void)
  523. {
  524. return platform_driver_register(&omap2430_driver);
  525. }
  526. subsys_initcall(omap2430_init);
  527. static void __exit omap2430_exit(void)
  528. {
  529. platform_driver_unregister(&omap2430_driver);
  530. }
  531. module_exit(omap2430_exit);
  532. #endif