isp116x-hcd.c 32 KB

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  1. /*
  2. * ISP116x HCD (Host Controller Driver) for u-boot.
  3. *
  4. * Copyright (C) 2006-2007 Rodolfo Giometti <giometti@linux.it>
  5. * Copyright (C) 2006-2007 Eurotech S.p.A. <info@eurotech.it>
  6. *
  7. * SPDX-License-Identifier: GPL-2.0+
  8. *
  9. * Derived in part from the SL811 HCD driver "u-boot/drivers/usb/sl811_usb.c"
  10. * (original copyright message follows):
  11. *
  12. * (C) Copyright 2004
  13. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  14. *
  15. * This code is based on linux driver for sl811hs chip, source at
  16. * drivers/usb/host/sl811.c:
  17. *
  18. * SL811 Host Controller Interface driver for USB.
  19. *
  20. * Copyright (c) 2003/06, Courage Co., Ltd.
  21. *
  22. * Based on:
  23. * 1.uhci.c by Linus Torvalds, Johannes Erdfelt, Randy Dunlap,
  24. * Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber,
  25. * Adam Richter, Gregory P. Smith;
  26. * 2.Original SL811 driver (hc_sl811.o) by Pei Liu <pbl@cypress.com>
  27. * 3.Rewrited as sl811.o by Yin Aihua <yinah:couragetech.com.cn>
  28. *
  29. * [[GNU/GPL disclaimer]]
  30. *
  31. * and in part from AU1x00 OHCI HCD driver "u-boot/arch/mips/cpu/au1x00_usb_ohci.c"
  32. * (original copyright message follows):
  33. *
  34. * URB OHCI HCD (Host Controller Driver) for USB on the AU1x00.
  35. *
  36. * (C) Copyright 2003
  37. * Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
  38. *
  39. * [[GNU/GPL disclaimer]]
  40. *
  41. * Note: Part of this code has been derived from linux
  42. */
  43. #include <common.h>
  44. #include <asm/io.h>
  45. #include <usb.h>
  46. #include <malloc.h>
  47. #include <linux/list.h>
  48. /*
  49. * ISP116x chips require certain delays between accesses to its
  50. * registers. The following timing options exist.
  51. *
  52. * 1. Configure your memory controller (the best)
  53. * 2. Use ndelay (easiest, poorest). For that, enable the following macro.
  54. *
  55. * Value is in microseconds.
  56. */
  57. #ifdef ISP116X_HCD_USE_UDELAY
  58. #define UDELAY 1
  59. #endif
  60. /*
  61. * On some (slowly?) machines an extra delay after data packing into
  62. * controller's FIFOs is required, * otherwise you may get the following
  63. * error:
  64. *
  65. * uboot> usb start
  66. * (Re)start USB...
  67. * USB: scanning bus for devices... isp116x: isp116x_submit_job: CTL:TIMEOUT
  68. * isp116x: isp116x_submit_job: ****** FIFO not ready! ******
  69. *
  70. * USB device not responding, giving up (status=4)
  71. * isp116x: isp116x_submit_job: ****** FIFO not empty! ******
  72. * isp116x: isp116x_submit_job: ****** FIFO not empty! ******
  73. * isp116x: isp116x_submit_job: ****** FIFO not empty! ******
  74. * 3 USB Device(s) found
  75. * scanning bus for storage devices... 0 Storage Device(s) found
  76. *
  77. * Value is in milliseconds.
  78. */
  79. #ifdef ISP116X_HCD_USE_EXTRA_DELAY
  80. #define EXTRA_DELAY 2
  81. #endif
  82. /*
  83. * Enable the following defines if you wish enable debugging messages.
  84. */
  85. #undef DEBUG /* enable debugging messages */
  86. #undef TRACE /* enable tracing code */
  87. #undef VERBOSE /* verbose debugging messages */
  88. #include "isp116x.h"
  89. #define DRIVER_VERSION "08 Jan 2007"
  90. static const char hcd_name[] = "isp116x-hcd";
  91. struct isp116x isp116x_dev;
  92. struct isp116x_platform_data isp116x_board;
  93. static int got_rhsc; /* root hub status change */
  94. struct usb_device *devgone; /* device which was disconnected */
  95. static int rh_devnum; /* address of Root Hub endpoint */
  96. /* ------------------------------------------------------------------------- */
  97. static int isp116x_reset(struct isp116x *isp116x);
  98. /* --- Debugging functions ------------------------------------------------- */
  99. #define isp116x_show_reg(d, r) { \
  100. if ((r) < 0x20) { \
  101. DBG("%-12s[%02x]: %08x", #r, \
  102. r, isp116x_read_reg32(d, r)); \
  103. } else { \
  104. DBG("%-12s[%02x]: %04x", #r, \
  105. r, isp116x_read_reg16(d, r)); \
  106. } \
  107. }
  108. #define isp116x_show_regs(d) { \
  109. isp116x_show_reg(d, HCREVISION); \
  110. isp116x_show_reg(d, HCCONTROL); \
  111. isp116x_show_reg(d, HCCMDSTAT); \
  112. isp116x_show_reg(d, HCINTSTAT); \
  113. isp116x_show_reg(d, HCINTENB); \
  114. isp116x_show_reg(d, HCFMINTVL); \
  115. isp116x_show_reg(d, HCFMREM); \
  116. isp116x_show_reg(d, HCFMNUM); \
  117. isp116x_show_reg(d, HCLSTHRESH); \
  118. isp116x_show_reg(d, HCRHDESCA); \
  119. isp116x_show_reg(d, HCRHDESCB); \
  120. isp116x_show_reg(d, HCRHSTATUS); \
  121. isp116x_show_reg(d, HCRHPORT1); \
  122. isp116x_show_reg(d, HCRHPORT2); \
  123. isp116x_show_reg(d, HCHWCFG); \
  124. isp116x_show_reg(d, HCDMACFG); \
  125. isp116x_show_reg(d, HCXFERCTR); \
  126. isp116x_show_reg(d, HCuPINT); \
  127. isp116x_show_reg(d, HCuPINTENB); \
  128. isp116x_show_reg(d, HCCHIPID); \
  129. isp116x_show_reg(d, HCSCRATCH); \
  130. isp116x_show_reg(d, HCITLBUFLEN); \
  131. isp116x_show_reg(d, HCATLBUFLEN); \
  132. isp116x_show_reg(d, HCBUFSTAT); \
  133. isp116x_show_reg(d, HCRDITL0LEN); \
  134. isp116x_show_reg(d, HCRDITL1LEN); \
  135. }
  136. #if defined(TRACE)
  137. static int isp116x_get_current_frame_number(struct usb_device *usb_dev)
  138. {
  139. struct isp116x *isp116x = &isp116x_dev;
  140. return isp116x_read_reg32(isp116x, HCFMNUM);
  141. }
  142. static void dump_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  143. int len, char *str)
  144. {
  145. #if defined(VERBOSE)
  146. int i;
  147. #endif
  148. DBG("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d stat:%#lx",
  149. str,
  150. isp116x_get_current_frame_number(dev),
  151. usb_pipedevice(pipe),
  152. usb_pipeendpoint(pipe),
  153. usb_pipeout(pipe) ? 'O' : 'I',
  154. usb_pipetype(pipe) < 2 ?
  155. (usb_pipeint(pipe) ?
  156. "INTR" : "ISOC") :
  157. (usb_pipecontrol(pipe) ? "CTRL" : "BULK"), len, dev->status);
  158. #if defined(VERBOSE)
  159. if (len > 0 && buffer) {
  160. printf(__FILE__ ": data(%d):", len);
  161. for (i = 0; i < 16 && i < len; i++)
  162. printf(" %02x", ((__u8 *) buffer)[i]);
  163. printf("%s\n", i < len ? "..." : "");
  164. }
  165. #endif
  166. }
  167. #define PTD_DIR_STR(ptd) ({char __c; \
  168. switch(PTD_GET_DIR(ptd)){ \
  169. case 0: __c = 's'; break; \
  170. case 1: __c = 'o'; break; \
  171. default: __c = 'i'; break; \
  172. }; __c;})
  173. /*
  174. Dump PTD info. The code documents the format
  175. perfectly, right :)
  176. */
  177. static inline void dump_ptd(struct ptd *ptd)
  178. {
  179. #if defined(VERBOSE)
  180. int k;
  181. #endif
  182. DBG("PTD(ext) : cc:%x %d%c%d %d,%d,%d t:%x %x%x%x",
  183. PTD_GET_CC(ptd),
  184. PTD_GET_FA(ptd), PTD_DIR_STR(ptd), PTD_GET_EP(ptd),
  185. PTD_GET_COUNT(ptd), PTD_GET_LEN(ptd), PTD_GET_MPS(ptd),
  186. PTD_GET_TOGGLE(ptd),
  187. PTD_GET_ACTIVE(ptd), PTD_GET_SPD(ptd), PTD_GET_LAST(ptd));
  188. #if defined(VERBOSE)
  189. printf("isp116x: %s: PTD(byte): ", __FUNCTION__);
  190. for (k = 0; k < sizeof(struct ptd); ++k)
  191. printf("%02x ", ((u8 *) ptd)[k]);
  192. printf("\n");
  193. #endif
  194. }
  195. static inline void dump_ptd_data(struct ptd *ptd, u8 * buf, int type)
  196. {
  197. #if defined(VERBOSE)
  198. int k;
  199. if (type == 0 /* 0ut data */ ) {
  200. printf("isp116x: %s: out data: ", __FUNCTION__);
  201. for (k = 0; k < PTD_GET_LEN(ptd); ++k)
  202. printf("%02x ", ((u8 *) buf)[k]);
  203. printf("\n");
  204. }
  205. if (type == 1 /* 1n data */ ) {
  206. printf("isp116x: %s: in data: ", __FUNCTION__);
  207. for (k = 0; k < PTD_GET_COUNT(ptd); ++k)
  208. printf("%02x ", ((u8 *) buf)[k]);
  209. printf("\n");
  210. }
  211. if (PTD_GET_LAST(ptd))
  212. DBG("--- last PTD ---");
  213. #endif
  214. }
  215. #else
  216. #define dump_msg(dev, pipe, buffer, len, str) do { } while (0)
  217. #define dump_pkt(dev, pipe, buffer, len, setup, str, small) do {} while (0)
  218. #define dump_ptd(ptd) do {} while (0)
  219. #define dump_ptd_data(ptd, buf, type) do {} while (0)
  220. #endif
  221. /* --- Virtual Root Hub ---------------------------------------------------- */
  222. #include <usbroothubdes.h>
  223. /*
  224. * Hub class-specific descriptor is constructed dynamically
  225. */
  226. /* --- Virtual root hub management functions ------------------------------- */
  227. static int rh_check_port_status(struct isp116x *isp116x)
  228. {
  229. u32 temp, ndp, i;
  230. int res;
  231. res = -1;
  232. temp = isp116x_read_reg32(isp116x, HCRHSTATUS);
  233. ndp = (temp & RH_A_NDP);
  234. for (i = 0; i < ndp; i++) {
  235. temp = isp116x_read_reg32(isp116x, HCRHPORT1 + i);
  236. /* check for a device disconnect */
  237. if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
  238. (RH_PS_PESC | RH_PS_CSC)) && ((temp & RH_PS_CCS) == 0)) {
  239. res = i;
  240. break;
  241. }
  242. }
  243. return res;
  244. }
  245. /* --- HC management functions --------------------------------------------- */
  246. /* Write len bytes to fifo, pad till 32-bit boundary
  247. */
  248. static void write_ptddata_to_fifo(struct isp116x *isp116x, void *buf, int len)
  249. {
  250. u8 *dp = (u8 *) buf;
  251. u16 *dp2 = (u16 *) buf;
  252. u16 w;
  253. int quot = len % 4;
  254. if ((unsigned long)dp2 & 1) {
  255. /* not aligned */
  256. for (; len > 1; len -= 2) {
  257. w = *dp++;
  258. w |= *dp++ << 8;
  259. isp116x_raw_write_data16(isp116x, w);
  260. }
  261. if (len)
  262. isp116x_write_data16(isp116x, (u16) * dp);
  263. } else {
  264. /* aligned */
  265. for (; len > 1; len -= 2)
  266. isp116x_raw_write_data16(isp116x, *dp2++);
  267. if (len)
  268. isp116x_write_data16(isp116x, 0xff & *((u8 *) dp2));
  269. }
  270. if (quot == 1 || quot == 2)
  271. isp116x_raw_write_data16(isp116x, 0);
  272. }
  273. /* Read len bytes from fifo and then read till 32-bit boundary
  274. */
  275. static void read_ptddata_from_fifo(struct isp116x *isp116x, void *buf, int len)
  276. {
  277. u8 *dp = (u8 *) buf;
  278. u16 *dp2 = (u16 *) buf;
  279. u16 w;
  280. int quot = len % 4;
  281. if ((unsigned long)dp2 & 1) {
  282. /* not aligned */
  283. for (; len > 1; len -= 2) {
  284. w = isp116x_raw_read_data16(isp116x);
  285. *dp++ = w & 0xff;
  286. *dp++ = (w >> 8) & 0xff;
  287. }
  288. if (len)
  289. *dp = 0xff & isp116x_read_data16(isp116x);
  290. } else {
  291. /* aligned */
  292. for (; len > 1; len -= 2)
  293. *dp2++ = isp116x_raw_read_data16(isp116x);
  294. if (len)
  295. *(u8 *) dp2 = 0xff & isp116x_read_data16(isp116x);
  296. }
  297. if (quot == 1 || quot == 2)
  298. isp116x_raw_read_data16(isp116x);
  299. }
  300. /* Write PTD's and data for scheduled transfers into the fifo ram.
  301. * Fifo must be empty and ready */
  302. static void pack_fifo(struct isp116x *isp116x, struct usb_device *dev,
  303. unsigned long pipe, struct ptd *ptd, int n, void *data,
  304. int len)
  305. {
  306. int buflen = n * sizeof(struct ptd) + len;
  307. int i, done;
  308. DBG("--- pack buffer %p - %d bytes (fifo %d) ---", data, len, buflen);
  309. isp116x_write_reg16(isp116x, HCuPINT, HCuPINT_AIIEOT);
  310. isp116x_write_reg16(isp116x, HCXFERCTR, buflen);
  311. isp116x_write_addr(isp116x, HCATLPORT | ISP116x_WRITE_OFFSET);
  312. done = 0;
  313. for (i = 0; i < n; i++) {
  314. DBG("i=%d - done=%d - len=%d", i, done, PTD_GET_LEN(&ptd[i]));
  315. dump_ptd(&ptd[i]);
  316. isp116x_write_data16(isp116x, ptd[i].count);
  317. isp116x_write_data16(isp116x, ptd[i].mps);
  318. isp116x_write_data16(isp116x, ptd[i].len);
  319. isp116x_write_data16(isp116x, ptd[i].faddr);
  320. dump_ptd_data(&ptd[i], (__u8 *) data + done, 0);
  321. write_ptddata_to_fifo(isp116x,
  322. (__u8 *) data + done,
  323. PTD_GET_LEN(&ptd[i]));
  324. done += PTD_GET_LEN(&ptd[i]);
  325. }
  326. }
  327. /* Read the processed PTD's and data from fifo ram back to URBs' buffers.
  328. * Fifo must be full and done */
  329. static int unpack_fifo(struct isp116x *isp116x, struct usb_device *dev,
  330. unsigned long pipe, struct ptd *ptd, int n, void *data,
  331. int len)
  332. {
  333. int buflen = n * sizeof(struct ptd) + len;
  334. int i, done, cc, ret;
  335. isp116x_write_reg16(isp116x, HCuPINT, HCuPINT_AIIEOT);
  336. isp116x_write_reg16(isp116x, HCXFERCTR, buflen);
  337. isp116x_write_addr(isp116x, HCATLPORT);
  338. ret = TD_CC_NOERROR;
  339. done = 0;
  340. for (i = 0; i < n; i++) {
  341. DBG("i=%d - done=%d - len=%d", i, done, PTD_GET_LEN(&ptd[i]));
  342. ptd[i].count = isp116x_read_data16(isp116x);
  343. ptd[i].mps = isp116x_read_data16(isp116x);
  344. ptd[i].len = isp116x_read_data16(isp116x);
  345. ptd[i].faddr = isp116x_read_data16(isp116x);
  346. dump_ptd(&ptd[i]);
  347. read_ptddata_from_fifo(isp116x,
  348. (__u8 *) data + done,
  349. PTD_GET_LEN(&ptd[i]));
  350. dump_ptd_data(&ptd[i], (__u8 *) data + done, 1);
  351. done += PTD_GET_LEN(&ptd[i]);
  352. cc = PTD_GET_CC(&ptd[i]);
  353. /* Data underrun means basically that we had more buffer space than
  354. * the function had data. It is perfectly normal but upper levels have
  355. * to know how much we actually transferred.
  356. */
  357. if (cc == TD_NOTACCESSED ||
  358. (cc != TD_CC_NOERROR && (ret == TD_CC_NOERROR || ret == TD_DATAUNDERRUN)))
  359. ret = cc;
  360. }
  361. DBG("--- unpack buffer %p - %d bytes (fifo %d) ---", data, len, buflen);
  362. return ret;
  363. }
  364. /* Interrupt handling
  365. */
  366. static int isp116x_interrupt(struct isp116x *isp116x)
  367. {
  368. u16 irqstat;
  369. u32 intstat;
  370. int ret = 0;
  371. isp116x_write_reg16(isp116x, HCuPINTENB, 0);
  372. irqstat = isp116x_read_reg16(isp116x, HCuPINT);
  373. isp116x_write_reg16(isp116x, HCuPINT, irqstat);
  374. DBG("------ irqstat %x ------", irqstat);
  375. if (irqstat & HCuPINT_ATL) {
  376. DBG("------ HCuPINT_ATL ------");
  377. udelay(500);
  378. ret = 1;
  379. }
  380. if (irqstat & HCuPINT_OPR) {
  381. intstat = isp116x_read_reg32(isp116x, HCINTSTAT);
  382. isp116x_write_reg32(isp116x, HCINTSTAT, intstat);
  383. DBG("------ HCuPINT_OPR %x ------", intstat);
  384. if (intstat & HCINT_UE) {
  385. ERR("unrecoverable error, controller disabled");
  386. /* FIXME: be optimistic, hope that bug won't repeat
  387. * often. Make some non-interrupt context restart the
  388. * controller. Count and limit the retries though;
  389. * either hardware or software errors can go forever...
  390. */
  391. isp116x_reset(isp116x);
  392. ret = -1;
  393. return -1;
  394. }
  395. if (intstat & HCINT_RHSC) {
  396. got_rhsc = 1;
  397. ret = 1;
  398. /* When root hub or any of its ports is going
  399. to come out of suspend, it may take more
  400. than 10ms for status bits to stabilize. */
  401. mdelay(20);
  402. }
  403. if (intstat & HCINT_SO) {
  404. ERR("schedule overrun");
  405. ret = -1;
  406. }
  407. irqstat &= ~HCuPINT_OPR;
  408. }
  409. return ret;
  410. }
  411. /* With one PTD we can transfer almost 1K in one go;
  412. * HC does the splitting into endpoint digestible transactions
  413. */
  414. struct ptd ptd[1];
  415. static inline int max_transfer_len(struct usb_device *dev, unsigned long pipe)
  416. {
  417. unsigned mpck = usb_maxpacket(dev, pipe);
  418. /* One PTD can transfer 1023 bytes but try to always
  419. * transfer multiples of endpoint buffer size
  420. */
  421. return 1023 / mpck * mpck;
  422. }
  423. /* Do an USB transfer
  424. */
  425. static int isp116x_submit_job(struct usb_device *dev, unsigned long pipe,
  426. int dir, void *buffer, int len)
  427. {
  428. struct isp116x *isp116x = &isp116x_dev;
  429. int type = usb_pipetype(pipe);
  430. int epnum = usb_pipeendpoint(pipe);
  431. int max = usb_maxpacket(dev, pipe);
  432. int dir_out = usb_pipeout(pipe);
  433. int speed_low = (dev->speed == USB_SPEED_LOW);
  434. int i, done = 0, stat, timeout, cc;
  435. /* 500 frames or 0.5s timeout when function is busy and NAKs transactions for a while */
  436. int retries = 500;
  437. DBG("------------------------------------------------");
  438. dump_msg(dev, pipe, buffer, len, "SUBMIT");
  439. DBG("------------------------------------------------");
  440. if (len >= 1024) {
  441. ERR("Too big job");
  442. dev->status = USB_ST_CRC_ERR;
  443. return -1;
  444. }
  445. if (isp116x->disabled) {
  446. ERR("EPIPE");
  447. dev->status = USB_ST_CRC_ERR;
  448. return -1;
  449. }
  450. /* device pulled? Shortcut the action. */
  451. if (devgone == dev) {
  452. ERR("ENODEV");
  453. dev->status = USB_ST_CRC_ERR;
  454. return USB_ST_CRC_ERR;
  455. }
  456. if (!max) {
  457. ERR("pipesize for pipe %lx is zero", pipe);
  458. dev->status = USB_ST_CRC_ERR;
  459. return -1;
  460. }
  461. if (type == PIPE_ISOCHRONOUS) {
  462. ERR("isochronous transfers not supported");
  463. dev->status = USB_ST_CRC_ERR;
  464. return -1;
  465. }
  466. /* FIFO not empty? */
  467. if (isp116x_read_reg16(isp116x, HCBUFSTAT) & HCBUFSTAT_ATL_FULL) {
  468. ERR("****** FIFO not empty! ******");
  469. dev->status = USB_ST_BUF_ERR;
  470. return -1;
  471. }
  472. retry:
  473. isp116x_write_reg32(isp116x, HCINTSTAT, 0xff);
  474. /* Prepare the PTD data */
  475. ptd->count = PTD_CC_MSK | PTD_ACTIVE_MSK |
  476. PTD_TOGGLE(usb_gettoggle(dev, epnum, dir_out));
  477. ptd->mps = PTD_MPS(max) | PTD_SPD(speed_low) | PTD_EP(epnum) | PTD_LAST_MSK;
  478. ptd->len = PTD_LEN(len) | PTD_DIR(dir);
  479. ptd->faddr = PTD_FA(usb_pipedevice(pipe));
  480. retry_same:
  481. /* Pack data into FIFO ram */
  482. pack_fifo(isp116x, dev, pipe, ptd, 1, buffer, len);
  483. #ifdef EXTRA_DELAY
  484. mdelay(EXTRA_DELAY);
  485. #endif
  486. /* Start the data transfer */
  487. /* Allow more time for a BULK device to react - some are slow */
  488. if (usb_pipebulk(pipe))
  489. timeout = 5000;
  490. else
  491. timeout = 100;
  492. /* Wait for it to complete */
  493. for (;;) {
  494. /* Check whether the controller is done */
  495. stat = isp116x_interrupt(isp116x);
  496. if (stat < 0) {
  497. dev->status = USB_ST_CRC_ERR;
  498. break;
  499. }
  500. if (stat > 0)
  501. break;
  502. /* Check the timeout */
  503. if (--timeout)
  504. udelay(1);
  505. else {
  506. ERR("CTL:TIMEOUT ");
  507. stat = USB_ST_CRC_ERR;
  508. break;
  509. }
  510. }
  511. /* We got an Root Hub Status Change interrupt */
  512. if (got_rhsc) {
  513. isp116x_show_regs(isp116x);
  514. got_rhsc = 0;
  515. /* Abuse timeout */
  516. timeout = rh_check_port_status(isp116x);
  517. if (timeout >= 0) {
  518. /*
  519. * FIXME! NOTE! AAAARGH!
  520. * This is potentially dangerous because it assumes
  521. * that only one device is ever plugged in!
  522. */
  523. devgone = dev;
  524. }
  525. }
  526. /* Ok, now we can read transfer status */
  527. /* FIFO not ready? */
  528. if (!(isp116x_read_reg16(isp116x, HCBUFSTAT) & HCBUFSTAT_ATL_DONE)) {
  529. ERR("****** FIFO not ready! ******");
  530. dev->status = USB_ST_BUF_ERR;
  531. return -1;
  532. }
  533. /* Unpack data from FIFO ram */
  534. cc = unpack_fifo(isp116x, dev, pipe, ptd, 1, buffer, len);
  535. i = PTD_GET_COUNT(ptd);
  536. done += i;
  537. buffer += i;
  538. len -= i;
  539. /* There was some kind of real problem; Prepare the PTD again
  540. * and retry from the failed transaction on
  541. */
  542. if (cc && cc != TD_NOTACCESSED && cc != TD_DATAUNDERRUN) {
  543. if (retries >= 100) {
  544. retries -= 100;
  545. /* The chip will have toggled the toggle bit for the failed
  546. * transaction too. We have to toggle it back.
  547. */
  548. usb_settoggle(dev, epnum, dir_out, !PTD_GET_TOGGLE(ptd));
  549. goto retry;
  550. }
  551. }
  552. /* "Normal" errors; TD_NOTACCESSED would mean in effect that the function have NAKed
  553. * the transactions from the first on for the whole frame. It may be busy and we retry
  554. * with the same PTD. PTD_ACTIVE (and not TD_NOTACCESSED) would mean that some of the
  555. * PTD didn't make it because the function was busy or the frame ended before the PTD
  556. * finished. We prepare the rest of the data and try again.
  557. */
  558. else if (cc == TD_NOTACCESSED || PTD_GET_ACTIVE(ptd) || (cc != TD_DATAUNDERRUN && PTD_GET_COUNT(ptd) < PTD_GET_LEN(ptd))) {
  559. if (retries) {
  560. --retries;
  561. if (cc == TD_NOTACCESSED && PTD_GET_ACTIVE(ptd) && !PTD_GET_COUNT(ptd)) goto retry_same;
  562. usb_settoggle(dev, epnum, dir_out, PTD_GET_TOGGLE(ptd));
  563. goto retry;
  564. }
  565. }
  566. if (cc != TD_CC_NOERROR && cc != TD_DATAUNDERRUN) {
  567. DBG("****** completition code error %x ******", cc);
  568. switch (cc) {
  569. case TD_CC_BITSTUFFING:
  570. dev->status = USB_ST_BIT_ERR;
  571. break;
  572. case TD_CC_STALL:
  573. dev->status = USB_ST_STALLED;
  574. break;
  575. case TD_BUFFEROVERRUN:
  576. case TD_BUFFERUNDERRUN:
  577. dev->status = USB_ST_BUF_ERR;
  578. break;
  579. default:
  580. dev->status = USB_ST_CRC_ERR;
  581. }
  582. return -cc;
  583. }
  584. else usb_settoggle(dev, epnum, dir_out, PTD_GET_TOGGLE(ptd));
  585. dump_msg(dev, pipe, buffer, len, "SUBMIT(ret)");
  586. dev->status = 0;
  587. return done;
  588. }
  589. /* Adapted from au1x00_usb_ohci.c
  590. */
  591. static int isp116x_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
  592. void *buffer, int transfer_len,
  593. struct devrequest *cmd)
  594. {
  595. struct isp116x *isp116x = &isp116x_dev;
  596. u32 tmp = 0;
  597. int leni = transfer_len;
  598. int len = 0;
  599. int stat = 0;
  600. u32 datab[4];
  601. u8 *data_buf = (u8 *) datab;
  602. u16 bmRType_bReq;
  603. u16 wValue;
  604. u16 wIndex;
  605. u16 wLength;
  606. if (usb_pipeint(pipe)) {
  607. INFO("Root-Hub submit IRQ: NOT implemented");
  608. return 0;
  609. }
  610. bmRType_bReq = cmd->requesttype | (cmd->request << 8);
  611. wValue = swap_16(cmd->value);
  612. wIndex = swap_16(cmd->index);
  613. wLength = swap_16(cmd->length);
  614. DBG("--- HUB ----------------------------------------");
  615. DBG("submit rh urb, req=%x val=%#x index=%#x len=%d",
  616. bmRType_bReq, wValue, wIndex, wLength);
  617. dump_msg(dev, pipe, buffer, transfer_len, "RH");
  618. DBG("------------------------------------------------");
  619. switch (bmRType_bReq) {
  620. case RH_GET_STATUS:
  621. DBG("RH_GET_STATUS");
  622. *(__u16 *) data_buf = swap_16(1);
  623. len = 2;
  624. break;
  625. case RH_GET_STATUS | RH_INTERFACE:
  626. DBG("RH_GET_STATUS | RH_INTERFACE");
  627. *(__u16 *) data_buf = swap_16(0);
  628. len = 2;
  629. break;
  630. case RH_GET_STATUS | RH_ENDPOINT:
  631. DBG("RH_GET_STATUS | RH_ENDPOINT");
  632. *(__u16 *) data_buf = swap_16(0);
  633. len = 2;
  634. break;
  635. case RH_GET_STATUS | RH_CLASS:
  636. DBG("RH_GET_STATUS | RH_CLASS");
  637. tmp = isp116x_read_reg32(isp116x, HCRHSTATUS);
  638. *(__u32 *) data_buf = swap_32(tmp & ~(RH_HS_CRWE | RH_HS_DRWE));
  639. len = 4;
  640. break;
  641. case RH_GET_STATUS | RH_OTHER | RH_CLASS:
  642. DBG("RH_GET_STATUS | RH_OTHER | RH_CLASS");
  643. tmp = isp116x_read_reg32(isp116x, HCRHPORT1 + wIndex - 1);
  644. *(__u32 *) data_buf = swap_32(tmp);
  645. isp116x_show_regs(isp116x);
  646. len = 4;
  647. break;
  648. case RH_CLEAR_FEATURE | RH_ENDPOINT:
  649. DBG("RH_CLEAR_FEATURE | RH_ENDPOINT");
  650. switch (wValue) {
  651. case RH_ENDPOINT_STALL:
  652. DBG("C_HUB_ENDPOINT_STALL");
  653. len = 0;
  654. break;
  655. }
  656. break;
  657. case RH_CLEAR_FEATURE | RH_CLASS:
  658. DBG("RH_CLEAR_FEATURE | RH_CLASS");
  659. switch (wValue) {
  660. case RH_C_HUB_LOCAL_POWER:
  661. DBG("C_HUB_LOCAL_POWER");
  662. len = 0;
  663. break;
  664. case RH_C_HUB_OVER_CURRENT:
  665. DBG("C_HUB_OVER_CURRENT");
  666. isp116x_write_reg32(isp116x, HCRHSTATUS, RH_HS_OCIC);
  667. len = 0;
  668. break;
  669. }
  670. break;
  671. case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
  672. DBG("RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS");
  673. switch (wValue) {
  674. case RH_PORT_ENABLE:
  675. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  676. RH_PS_CCS);
  677. len = 0;
  678. break;
  679. case RH_PORT_SUSPEND:
  680. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  681. RH_PS_POCI);
  682. len = 0;
  683. break;
  684. case RH_PORT_POWER:
  685. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  686. RH_PS_LSDA);
  687. len = 0;
  688. break;
  689. case RH_C_PORT_CONNECTION:
  690. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  691. RH_PS_CSC);
  692. len = 0;
  693. break;
  694. case RH_C_PORT_ENABLE:
  695. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  696. RH_PS_PESC);
  697. len = 0;
  698. break;
  699. case RH_C_PORT_SUSPEND:
  700. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  701. RH_PS_PSSC);
  702. len = 0;
  703. break;
  704. case RH_C_PORT_OVER_CURRENT:
  705. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  706. RH_PS_POCI);
  707. len = 0;
  708. break;
  709. case RH_C_PORT_RESET:
  710. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  711. RH_PS_PRSC);
  712. len = 0;
  713. break;
  714. default:
  715. ERR("invalid wValue");
  716. stat = USB_ST_STALLED;
  717. }
  718. isp116x_show_regs(isp116x);
  719. break;
  720. case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
  721. DBG("RH_SET_FEATURE | RH_OTHER | RH_CLASS");
  722. switch (wValue) {
  723. case RH_PORT_SUSPEND:
  724. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  725. RH_PS_PSS);
  726. len = 0;
  727. break;
  728. case RH_PORT_RESET:
  729. /* Spin until any current reset finishes */
  730. while (1) {
  731. tmp =
  732. isp116x_read_reg32(isp116x,
  733. HCRHPORT1 + wIndex - 1);
  734. if (!(tmp & RH_PS_PRS))
  735. break;
  736. mdelay(1);
  737. }
  738. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  739. RH_PS_PRS);
  740. mdelay(10);
  741. len = 0;
  742. break;
  743. case RH_PORT_POWER:
  744. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  745. RH_PS_PPS);
  746. len = 0;
  747. break;
  748. case RH_PORT_ENABLE:
  749. isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
  750. RH_PS_PES);
  751. len = 0;
  752. break;
  753. default:
  754. ERR("invalid wValue");
  755. stat = USB_ST_STALLED;
  756. }
  757. isp116x_show_regs(isp116x);
  758. break;
  759. case RH_SET_ADDRESS:
  760. DBG("RH_SET_ADDRESS");
  761. rh_devnum = wValue;
  762. len = 0;
  763. break;
  764. case RH_GET_DESCRIPTOR:
  765. DBG("RH_GET_DESCRIPTOR: %x, %d", wValue, wLength);
  766. switch (wValue) {
  767. case (USB_DT_DEVICE << 8): /* device descriptor */
  768. len = min_t(unsigned int,
  769. leni, min_t(unsigned int,
  770. sizeof(root_hub_dev_des),
  771. wLength));
  772. data_buf = root_hub_dev_des;
  773. break;
  774. case (USB_DT_CONFIG << 8): /* configuration descriptor */
  775. len = min_t(unsigned int,
  776. leni, min_t(unsigned int,
  777. sizeof(root_hub_config_des),
  778. wLength));
  779. data_buf = root_hub_config_des;
  780. break;
  781. case ((USB_DT_STRING << 8) | 0x00): /* string 0 descriptors */
  782. len = min_t(unsigned int,
  783. leni, min_t(unsigned int,
  784. sizeof(root_hub_str_index0),
  785. wLength));
  786. data_buf = root_hub_str_index0;
  787. break;
  788. case ((USB_DT_STRING << 8) | 0x01): /* string 1 descriptors */
  789. len = min_t(unsigned int,
  790. leni, min_t(unsigned int,
  791. sizeof(root_hub_str_index1),
  792. wLength));
  793. data_buf = root_hub_str_index1;
  794. break;
  795. default:
  796. ERR("invalid wValue");
  797. stat = USB_ST_STALLED;
  798. }
  799. break;
  800. case RH_GET_DESCRIPTOR | RH_CLASS:
  801. DBG("RH_GET_DESCRIPTOR | RH_CLASS");
  802. tmp = isp116x_read_reg32(isp116x, HCRHDESCA);
  803. data_buf[0] = 0x09; /* min length; */
  804. data_buf[1] = 0x29;
  805. data_buf[2] = tmp & RH_A_NDP;
  806. data_buf[3] = 0;
  807. if (tmp & RH_A_PSM) /* per-port power switching? */
  808. data_buf[3] |= 0x01;
  809. if (tmp & RH_A_NOCP) /* no overcurrent reporting? */
  810. data_buf[3] |= 0x10;
  811. else if (tmp & RH_A_OCPM) /* per-port overcurrent rep? */
  812. data_buf[3] |= 0x08;
  813. /* Corresponds to data_buf[4-7] */
  814. datab[1] = 0;
  815. data_buf[5] = (tmp & RH_A_POTPGT) >> 24;
  816. tmp = isp116x_read_reg32(isp116x, HCRHDESCB);
  817. data_buf[7] = tmp & RH_B_DR;
  818. if (data_buf[2] < 7)
  819. data_buf[8] = 0xff;
  820. else {
  821. data_buf[0] += 2;
  822. data_buf[8] = (tmp & RH_B_DR) >> 8;
  823. data_buf[10] = data_buf[9] = 0xff;
  824. }
  825. len = min_t(unsigned int, leni,
  826. min_t(unsigned int, data_buf[0], wLength));
  827. break;
  828. case RH_GET_CONFIGURATION:
  829. DBG("RH_GET_CONFIGURATION");
  830. *(__u8 *) data_buf = 0x01;
  831. len = 1;
  832. break;
  833. case RH_SET_CONFIGURATION:
  834. DBG("RH_SET_CONFIGURATION");
  835. isp116x_write_reg32(isp116x, HCRHSTATUS, RH_HS_LPSC);
  836. len = 0;
  837. break;
  838. default:
  839. ERR("*** *** *** unsupported root hub command *** *** ***");
  840. stat = USB_ST_STALLED;
  841. }
  842. len = min_t(int, len, leni);
  843. if (buffer != data_buf)
  844. memcpy(buffer, data_buf, len);
  845. dev->act_len = len;
  846. dev->status = stat;
  847. DBG("dev act_len %d, status %d", dev->act_len, dev->status);
  848. dump_msg(dev, pipe, buffer, transfer_len, "RH(ret)");
  849. return stat;
  850. }
  851. /* --- Transfer functions -------------------------------------------------- */
  852. int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  853. int len, int interval)
  854. {
  855. DBG("dev=%p pipe=%#lx buf=%p size=%d int=%d",
  856. dev, pipe, buffer, len, interval);
  857. return -1;
  858. }
  859. int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  860. int len, struct devrequest *setup)
  861. {
  862. int devnum = usb_pipedevice(pipe);
  863. int epnum = usb_pipeendpoint(pipe);
  864. int max = max_transfer_len(dev, pipe);
  865. int dir_in = usb_pipein(pipe);
  866. int done, ret;
  867. /* Control message is for the HUB? */
  868. if (devnum == rh_devnum)
  869. return isp116x_submit_rh_msg(dev, pipe, buffer, len, setup);
  870. /* Ok, no HUB message so send the message to the device */
  871. /* Setup phase */
  872. DBG("--- SETUP PHASE --------------------------------");
  873. usb_settoggle(dev, epnum, 1, 0);
  874. ret = isp116x_submit_job(dev, pipe,
  875. PTD_DIR_SETUP,
  876. setup, sizeof(struct devrequest));
  877. if (ret < 0) {
  878. DBG("control setup phase error (ret = %d", ret);
  879. return -1;
  880. }
  881. /* Data phase */
  882. DBG("--- DATA PHASE ---------------------------------");
  883. done = 0;
  884. usb_settoggle(dev, epnum, !dir_in, 1);
  885. while (done < len) {
  886. ret = isp116x_submit_job(dev, pipe,
  887. dir_in ? PTD_DIR_IN : PTD_DIR_OUT,
  888. (__u8 *) buffer + done,
  889. max > len - done ? len - done : max);
  890. if (ret < 0) {
  891. DBG("control data phase error (ret = %d)", ret);
  892. return -1;
  893. }
  894. done += ret;
  895. if (dir_in && ret < max) /* short packet */
  896. break;
  897. }
  898. /* Status phase */
  899. DBG("--- STATUS PHASE -------------------------------");
  900. usb_settoggle(dev, epnum, !dir_in, 1);
  901. ret = isp116x_submit_job(dev, pipe,
  902. !dir_in ? PTD_DIR_IN : PTD_DIR_OUT, NULL, 0);
  903. if (ret < 0) {
  904. DBG("control status phase error (ret = %d", ret);
  905. return -1;
  906. }
  907. dev->act_len = done;
  908. dump_msg(dev, pipe, buffer, len, "DEV(ret)");
  909. return done;
  910. }
  911. int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  912. int len)
  913. {
  914. int dir_out = usb_pipeout(pipe);
  915. int max = max_transfer_len(dev, pipe);
  916. int done, ret;
  917. DBG("--- BULK ---------------------------------------");
  918. DBG("dev=%ld pipe=%ld buf=%p size=%d dir_out=%d",
  919. usb_pipedevice(pipe), usb_pipeendpoint(pipe), buffer, len, dir_out);
  920. done = 0;
  921. while (done < len) {
  922. ret = isp116x_submit_job(dev, pipe,
  923. !dir_out ? PTD_DIR_IN : PTD_DIR_OUT,
  924. (__u8 *) buffer + done,
  925. max > len - done ? len - done : max);
  926. if (ret < 0) {
  927. DBG("error on bulk message (ret = %d)", ret);
  928. return -1;
  929. }
  930. done += ret;
  931. if (!dir_out && ret < max) /* short packet */
  932. break;
  933. }
  934. dev->act_len = done;
  935. return 0;
  936. }
  937. /* --- Basic functions ----------------------------------------------------- */
  938. static int isp116x_sw_reset(struct isp116x *isp116x)
  939. {
  940. int retries = 15;
  941. int ret = 0;
  942. DBG("");
  943. isp116x->disabled = 1;
  944. isp116x_write_reg16(isp116x, HCSWRES, HCSWRES_MAGIC);
  945. isp116x_write_reg32(isp116x, HCCMDSTAT, HCCMDSTAT_HCR);
  946. while (--retries) {
  947. /* It usually resets within 1 ms */
  948. mdelay(1);
  949. if (!(isp116x_read_reg32(isp116x, HCCMDSTAT) & HCCMDSTAT_HCR))
  950. break;
  951. }
  952. if (!retries) {
  953. ERR("software reset timeout");
  954. ret = -1;
  955. }
  956. return ret;
  957. }
  958. static int isp116x_reset(struct isp116x *isp116x)
  959. {
  960. unsigned long t;
  961. u16 clkrdy = 0;
  962. int ret, timeout = 15 /* ms */ ;
  963. DBG("");
  964. ret = isp116x_sw_reset(isp116x);
  965. if (ret)
  966. return ret;
  967. for (t = 0; t < timeout; t++) {
  968. clkrdy = isp116x_read_reg16(isp116x, HCuPINT) & HCuPINT_CLKRDY;
  969. if (clkrdy)
  970. break;
  971. mdelay(1);
  972. }
  973. if (!clkrdy) {
  974. ERR("clock not ready after %dms", timeout);
  975. /* After sw_reset the clock won't report to be ready, if
  976. H_WAKEUP pin is high. */
  977. ERR("please make sure that the H_WAKEUP pin is pulled low!");
  978. ret = -1;
  979. }
  980. return ret;
  981. }
  982. static void isp116x_stop(struct isp116x *isp116x)
  983. {
  984. u32 val;
  985. DBG("");
  986. isp116x_write_reg16(isp116x, HCuPINTENB, 0);
  987. /* Switch off ports' power, some devices don't come up
  988. after next 'start' without this */
  989. val = isp116x_read_reg32(isp116x, HCRHDESCA);
  990. val &= ~(RH_A_NPS | RH_A_PSM);
  991. isp116x_write_reg32(isp116x, HCRHDESCA, val);
  992. isp116x_write_reg32(isp116x, HCRHSTATUS, RH_HS_LPS);
  993. isp116x_sw_reset(isp116x);
  994. }
  995. /*
  996. * Configure the chip. The chip must be successfully reset by now.
  997. */
  998. static int isp116x_start(struct isp116x *isp116x)
  999. {
  1000. struct isp116x_platform_data *board = isp116x->board;
  1001. u32 val;
  1002. DBG("");
  1003. /* Clear interrupt status and disable all interrupt sources */
  1004. isp116x_write_reg16(isp116x, HCuPINT, 0xff);
  1005. isp116x_write_reg16(isp116x, HCuPINTENB, 0);
  1006. isp116x_write_reg16(isp116x, HCITLBUFLEN, ISP116x_ITL_BUFSIZE);
  1007. isp116x_write_reg16(isp116x, HCATLBUFLEN, ISP116x_ATL_BUFSIZE);
  1008. /* Hardware configuration */
  1009. val = HCHWCFG_DBWIDTH(1);
  1010. if (board->sel15Kres)
  1011. val |= HCHWCFG_15KRSEL;
  1012. /* Remote wakeup won't work without working clock */
  1013. if (board->remote_wakeup_enable)
  1014. val |= HCHWCFG_CLKNOTSTOP;
  1015. if (board->oc_enable)
  1016. val |= HCHWCFG_ANALOG_OC;
  1017. isp116x_write_reg16(isp116x, HCHWCFG, val);
  1018. /* --- Root hub configuration */
  1019. val = (25 << 24) & RH_A_POTPGT;
  1020. /* AN10003_1.pdf recommends RH_A_NPS (no power switching) to
  1021. be always set. Yet, instead, we request individual port
  1022. power switching. */
  1023. val |= RH_A_PSM;
  1024. /* Report overcurrent per port */
  1025. val |= RH_A_OCPM;
  1026. isp116x_write_reg32(isp116x, HCRHDESCA, val);
  1027. isp116x->rhdesca = isp116x_read_reg32(isp116x, HCRHDESCA);
  1028. val = RH_B_PPCM;
  1029. isp116x_write_reg32(isp116x, HCRHDESCB, val);
  1030. isp116x->rhdescb = isp116x_read_reg32(isp116x, HCRHDESCB);
  1031. val = 0;
  1032. if (board->remote_wakeup_enable)
  1033. val |= RH_HS_DRWE;
  1034. isp116x_write_reg32(isp116x, HCRHSTATUS, val);
  1035. isp116x->rhstatus = isp116x_read_reg32(isp116x, HCRHSTATUS);
  1036. isp116x_write_reg32(isp116x, HCFMINTVL, 0x27782edf);
  1037. /* Go operational */
  1038. val = HCCONTROL_USB_OPER;
  1039. if (board->remote_wakeup_enable)
  1040. val |= HCCONTROL_RWE;
  1041. isp116x_write_reg32(isp116x, HCCONTROL, val);
  1042. /* Disable ports to avoid race in device enumeration */
  1043. isp116x_write_reg32(isp116x, HCRHPORT1, RH_PS_CCS);
  1044. isp116x_write_reg32(isp116x, HCRHPORT2, RH_PS_CCS);
  1045. isp116x_show_regs(isp116x);
  1046. isp116x->disabled = 0;
  1047. return 0;
  1048. }
  1049. /* --- Init functions ------------------------------------------------------ */
  1050. int isp116x_check_id(struct isp116x *isp116x)
  1051. {
  1052. int val;
  1053. val = isp116x_read_reg16(isp116x, HCCHIPID);
  1054. if ((val & HCCHIPID_MASK) != HCCHIPID_MAGIC) {
  1055. ERR("invalid chip ID %04x", val);
  1056. return -1;
  1057. }
  1058. return 0;
  1059. }
  1060. int usb_lowlevel_init(int index, enum usb_init_type init, void **controller))
  1061. {
  1062. struct isp116x *isp116x = &isp116x_dev;
  1063. DBG("");
  1064. got_rhsc = rh_devnum = 0;
  1065. /* Init device registers addr */
  1066. isp116x->addr_reg = (u16 *) ISP116X_HCD_ADDR;
  1067. isp116x->data_reg = (u16 *) ISP116X_HCD_DATA;
  1068. /* Setup specific board settings */
  1069. #ifdef ISP116X_HCD_SEL15kRES
  1070. isp116x_board.sel15Kres = 1;
  1071. #endif
  1072. #ifdef ISP116X_HCD_OC_ENABLE
  1073. isp116x_board.oc_enable = 1;
  1074. #endif
  1075. #ifdef ISP116X_HCD_REMOTE_WAKEUP_ENABLE
  1076. isp116x_board.remote_wakeup_enable = 1;
  1077. #endif
  1078. isp116x->board = &isp116x_board;
  1079. /* Try to get ISP116x silicon chip ID */
  1080. if (isp116x_check_id(isp116x) < 0)
  1081. return -1;
  1082. isp116x->disabled = 1;
  1083. isp116x->sleeping = 0;
  1084. isp116x_reset(isp116x);
  1085. isp116x_start(isp116x);
  1086. return 0;
  1087. }
  1088. int usb_lowlevel_stop(int index)
  1089. {
  1090. struct isp116x *isp116x = &isp116x_dev;
  1091. DBG("");
  1092. if (!isp116x->disabled)
  1093. isp116x_stop(isp116x);
  1094. return 0;
  1095. }