tpm_tis_lpc.c 12 KB

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  1. /*
  2. * Copyright (c) 2011 The Chromium OS Authors.
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. /*
  7. * The code in this file is based on the article "Writing a TPM Device Driver"
  8. * published on http://ptgmedia.pearsoncmg.com.
  9. *
  10. * One principal difference is that in the simplest config the other than 0
  11. * TPM localities do not get mapped by some devices (for instance, by Infineon
  12. * slb9635), so this driver provides access to locality 0 only.
  13. */
  14. #include <common.h>
  15. #include <dm.h>
  16. #include <mapmem.h>
  17. #include <tpm.h>
  18. #include <asm/io.h>
  19. #define PREFIX "lpc_tpm: "
  20. enum i2c_chip_type {
  21. SLB9635,
  22. AT97SC3204,
  23. };
  24. static const char * const chip_name[] = {
  25. [SLB9635] = "Infineon SLB9635 TT 1.2",
  26. [AT97SC3204] = "Atmel AT97SC3204",
  27. };
  28. static const u32 chip_didvid[] = {
  29. [SLB9635] = 0xb15d1,
  30. [AT97SC3204] = 0x32041114,
  31. };
  32. struct tpm_locality {
  33. u32 access;
  34. u8 padding0[4];
  35. u32 int_enable;
  36. u8 vector;
  37. u8 padding1[3];
  38. u32 int_status;
  39. u32 int_capability;
  40. u32 tpm_status;
  41. u8 padding2[8];
  42. u8 data;
  43. u8 padding3[3803];
  44. u32 did_vid;
  45. u8 rid;
  46. u8 padding4[251];
  47. };
  48. struct tpm_tis_lpc_priv {
  49. struct tpm_locality *regs;
  50. };
  51. /*
  52. * This pointer refers to the TPM chip, 5 of its localities are mapped as an
  53. * array.
  54. */
  55. #define TPM_TOTAL_LOCALITIES 5
  56. /* Some registers' bit field definitions */
  57. #define TIS_STS_VALID (1 << 7) /* 0x80 */
  58. #define TIS_STS_COMMAND_READY (1 << 6) /* 0x40 */
  59. #define TIS_STS_TPM_GO (1 << 5) /* 0x20 */
  60. #define TIS_STS_DATA_AVAILABLE (1 << 4) /* 0x10 */
  61. #define TIS_STS_EXPECT (1 << 3) /* 0x08 */
  62. #define TIS_STS_RESPONSE_RETRY (1 << 1) /* 0x02 */
  63. #define TIS_ACCESS_TPM_REG_VALID_STS (1 << 7) /* 0x80 */
  64. #define TIS_ACCESS_ACTIVE_LOCALITY (1 << 5) /* 0x20 */
  65. #define TIS_ACCESS_BEEN_SEIZED (1 << 4) /* 0x10 */
  66. #define TIS_ACCESS_SEIZE (1 << 3) /* 0x08 */
  67. #define TIS_ACCESS_PENDING_REQUEST (1 << 2) /* 0x04 */
  68. #define TIS_ACCESS_REQUEST_USE (1 << 1) /* 0x02 */
  69. #define TIS_ACCESS_TPM_ESTABLISHMENT (1 << 0) /* 0x01 */
  70. #define TIS_STS_BURST_COUNT_MASK (0xffff)
  71. #define TIS_STS_BURST_COUNT_SHIFT (8)
  72. /* 1 second is plenty for anything TPM does. */
  73. #define MAX_DELAY_US (1000 * 1000)
  74. /* Retrieve burst count value out of the status register contents. */
  75. static u16 burst_count(u32 status)
  76. {
  77. return (status >> TIS_STS_BURST_COUNT_SHIFT) &
  78. TIS_STS_BURST_COUNT_MASK;
  79. }
  80. /* TPM access wrappers to support tracing */
  81. static u8 tpm_read_byte(struct tpm_tis_lpc_priv *priv, const u8 *ptr)
  82. {
  83. u8 ret = readb(ptr);
  84. debug(PREFIX "Read reg 0x%4.4x returns 0x%2.2x\n",
  85. (u32)(uintptr_t)ptr - (u32)(uintptr_t)priv->regs, ret);
  86. return ret;
  87. }
  88. static u32 tpm_read_word(struct tpm_tis_lpc_priv *priv, const u32 *ptr)
  89. {
  90. u32 ret = readl(ptr);
  91. debug(PREFIX "Read reg 0x%4.4x returns 0x%8.8x\n",
  92. (u32)(uintptr_t)ptr - (u32)(uintptr_t)priv->regs, ret);
  93. return ret;
  94. }
  95. static void tpm_write_byte(struct tpm_tis_lpc_priv *priv, u8 value, u8 *ptr)
  96. {
  97. debug(PREFIX "Write reg 0x%4.4x with 0x%2.2x\n",
  98. (u32)(uintptr_t)ptr - (u32)(uintptr_t)priv->regs, value);
  99. writeb(value, ptr);
  100. }
  101. static void tpm_write_word(struct tpm_tis_lpc_priv *priv, u32 value,
  102. u32 *ptr)
  103. {
  104. debug(PREFIX "Write reg 0x%4.4x with 0x%8.8x\n",
  105. (u32)(uintptr_t)ptr - (u32)(uintptr_t)priv->regs, value);
  106. writel(value, ptr);
  107. }
  108. /*
  109. * tis_wait_reg()
  110. *
  111. * Wait for at least a second for a register to change its state to match the
  112. * expected state. Normally the transition happens within microseconds.
  113. *
  114. * @reg - pointer to the TPM register
  115. * @mask - bitmask for the bitfield(s) to watch
  116. * @expected - value the field(s) are supposed to be set to
  117. *
  118. * Returns the register contents in case the expected value was found in the
  119. * appropriate register bits, or -ETIMEDOUT on timeout.
  120. */
  121. static int tis_wait_reg(struct tpm_tis_lpc_priv *priv, u32 *reg, u8 mask,
  122. u8 expected)
  123. {
  124. u32 time_us = MAX_DELAY_US;
  125. while (time_us > 0) {
  126. u32 value = tpm_read_word(priv, reg);
  127. if ((value & mask) == expected)
  128. return value;
  129. udelay(1); /* 1 us */
  130. time_us--;
  131. }
  132. return -ETIMEDOUT;
  133. }
  134. /*
  135. * Probe the TPM device and try determining its manufacturer/device name.
  136. *
  137. * Returns 0 on success, -ve on error
  138. */
  139. static int tpm_tis_lpc_probe(struct udevice *dev)
  140. {
  141. struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
  142. fdt_addr_t addr;
  143. u32 didvid;
  144. ulong chip_type = dev_get_driver_data(dev);
  145. addr = dev_get_addr(dev);
  146. if (addr == FDT_ADDR_T_NONE)
  147. return -EINVAL;
  148. priv->regs = map_sysmem(addr, 0);
  149. didvid = tpm_read_word(priv, &priv->regs[0].did_vid);
  150. if (didvid != chip_didvid[chip_type]) {
  151. u32 vid, did;
  152. vid = didvid & 0xffff;
  153. did = (didvid >> 16) & 0xffff;
  154. debug("Invalid vendor/device ID %04x/%04x\n", vid, did);
  155. return -ENODEV;
  156. }
  157. debug("Found TPM: %s\n", chip_name[chip_type]);
  158. return 0;
  159. }
  160. /*
  161. * tis_senddata()
  162. *
  163. * send the passed in data to the TPM device.
  164. *
  165. * @data - address of the data to send, byte by byte
  166. * @len - length of the data to send
  167. *
  168. * Returns 0 on success, -ve on error (in case the device does not accept
  169. * the entire command).
  170. */
  171. static int tis_senddata(struct udevice *dev, const u8 *data, size_t len)
  172. {
  173. struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
  174. struct tpm_locality *regs = priv->regs;
  175. u32 offset = 0;
  176. u16 burst = 0;
  177. u32 max_cycles = 0;
  178. u8 locality = 0;
  179. u32 value;
  180. value = tis_wait_reg(priv, &regs[locality].tpm_status,
  181. TIS_STS_COMMAND_READY, TIS_STS_COMMAND_READY);
  182. if (value == -ETIMEDOUT) {
  183. printf("%s:%d - failed to get 'command_ready' status\n",
  184. __FILE__, __LINE__);
  185. return value;
  186. }
  187. burst = burst_count(value);
  188. while (1) {
  189. unsigned count;
  190. /* Wait till the device is ready to accept more data. */
  191. while (!burst) {
  192. if (max_cycles++ == MAX_DELAY_US) {
  193. printf("%s:%d failed to feed %zd bytes of %zd\n",
  194. __FILE__, __LINE__, len - offset, len);
  195. return -ETIMEDOUT;
  196. }
  197. udelay(1);
  198. burst = burst_count(tpm_read_word(priv,
  199. &regs[locality].tpm_status));
  200. }
  201. max_cycles = 0;
  202. /*
  203. * Calculate number of bytes the TPM is ready to accept in one
  204. * shot.
  205. *
  206. * We want to send the last byte outside of the loop (hence
  207. * the -1 below) to make sure that the 'expected' status bit
  208. * changes to zero exactly after the last byte is fed into the
  209. * FIFO.
  210. */
  211. count = min((size_t)burst, len - offset - 1);
  212. while (count--)
  213. tpm_write_byte(priv, data[offset++],
  214. &regs[locality].data);
  215. value = tis_wait_reg(priv, &regs[locality].tpm_status,
  216. TIS_STS_VALID, TIS_STS_VALID);
  217. if ((value == -ETIMEDOUT) || !(value & TIS_STS_EXPECT)) {
  218. printf("%s:%d TPM command feed overflow\n",
  219. __FILE__, __LINE__);
  220. return value == -ETIMEDOUT ? value : -EIO;
  221. }
  222. burst = burst_count(value);
  223. if ((offset == (len - 1)) && burst) {
  224. /*
  225. * We need to be able to send the last byte to the
  226. * device, so burst size must be nonzero before we
  227. * break out.
  228. */
  229. break;
  230. }
  231. }
  232. /* Send the last byte. */
  233. tpm_write_byte(priv, data[offset++], &regs[locality].data);
  234. /*
  235. * Verify that TPM does not expect any more data as part of this
  236. * command.
  237. */
  238. value = tis_wait_reg(priv, &regs[locality].tpm_status,
  239. TIS_STS_VALID, TIS_STS_VALID);
  240. if ((value == -ETIMEDOUT) || (value & TIS_STS_EXPECT)) {
  241. printf("%s:%d unexpected TPM status 0x%x\n",
  242. __FILE__, __LINE__, value);
  243. return value == -ETIMEDOUT ? value : -EIO;
  244. }
  245. /* OK, sitting pretty, let's start the command execution. */
  246. tpm_write_word(priv, TIS_STS_TPM_GO, &regs[locality].tpm_status);
  247. return 0;
  248. }
  249. /*
  250. * tis_readresponse()
  251. *
  252. * read the TPM device response after a command was issued.
  253. *
  254. * @buffer - address where to read the response, byte by byte.
  255. * @len - pointer to the size of buffer
  256. *
  257. * On success stores the number of received bytes to len and returns 0. On
  258. * errors (misformatted TPM data or synchronization problems) returns
  259. * -ve value.
  260. */
  261. static int tis_readresponse(struct udevice *dev, u8 *buffer, size_t len)
  262. {
  263. struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
  264. struct tpm_locality *regs = priv->regs;
  265. u16 burst;
  266. u32 value;
  267. u32 offset = 0;
  268. u8 locality = 0;
  269. const u32 has_data = TIS_STS_DATA_AVAILABLE | TIS_STS_VALID;
  270. u32 expected_count = len;
  271. int max_cycles = 0;
  272. /* Wait for the TPM to process the command. */
  273. value = tis_wait_reg(priv, &regs[locality].tpm_status,
  274. has_data, has_data);
  275. if (value == -ETIMEDOUT) {
  276. printf("%s:%d failed processing command\n",
  277. __FILE__, __LINE__);
  278. return value;
  279. }
  280. do {
  281. while ((burst = burst_count(value)) == 0) {
  282. if (max_cycles++ == MAX_DELAY_US) {
  283. printf("%s:%d TPM stuck on read\n",
  284. __FILE__, __LINE__);
  285. return -EIO;
  286. }
  287. udelay(1);
  288. value = tpm_read_word(priv, &regs[locality].tpm_status);
  289. }
  290. max_cycles = 0;
  291. while (burst-- && (offset < expected_count)) {
  292. buffer[offset++] = tpm_read_byte(priv,
  293. &regs[locality].data);
  294. if (offset == 6) {
  295. /*
  296. * We got the first six bytes of the reply,
  297. * let's figure out how many bytes to expect
  298. * total - it is stored as a 4 byte number in
  299. * network order, starting with offset 2 into
  300. * the body of the reply.
  301. */
  302. u32 real_length;
  303. memcpy(&real_length,
  304. buffer + 2,
  305. sizeof(real_length));
  306. expected_count = be32_to_cpu(real_length);
  307. if ((expected_count < offset) ||
  308. (expected_count > len)) {
  309. printf("%s:%d bad response size %d\n",
  310. __FILE__, __LINE__,
  311. expected_count);
  312. return -ENOSPC;
  313. }
  314. }
  315. }
  316. /* Wait for the next portion. */
  317. value = tis_wait_reg(priv, &regs[locality].tpm_status,
  318. TIS_STS_VALID, TIS_STS_VALID);
  319. if (value == -ETIMEDOUT) {
  320. printf("%s:%d failed to read response\n",
  321. __FILE__, __LINE__);
  322. return value;
  323. }
  324. if (offset == expected_count)
  325. break; /* We got all we needed. */
  326. } while ((value & has_data) == has_data);
  327. /*
  328. * Make sure we indeed read all there was. The TIS_STS_VALID bit is
  329. * known to be set.
  330. */
  331. if (value & TIS_STS_DATA_AVAILABLE) {
  332. printf("%s:%d wrong receive status %x\n",
  333. __FILE__, __LINE__, value);
  334. return -EBADMSG;
  335. }
  336. /* Tell the TPM that we are done. */
  337. tpm_write_word(priv, TIS_STS_COMMAND_READY,
  338. &regs[locality].tpm_status);
  339. return offset;
  340. }
  341. static int tpm_tis_lpc_open(struct udevice *dev)
  342. {
  343. struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
  344. struct tpm_locality *regs = priv->regs;
  345. u8 locality = 0; /* we use locality zero for everything. */
  346. int ret;
  347. /* now request access to locality. */
  348. tpm_write_word(priv, TIS_ACCESS_REQUEST_USE, &regs[locality].access);
  349. /* did we get a lock? */
  350. ret = tis_wait_reg(priv, &regs[locality].access,
  351. TIS_ACCESS_ACTIVE_LOCALITY,
  352. TIS_ACCESS_ACTIVE_LOCALITY);
  353. if (ret == -ETIMEDOUT) {
  354. printf("%s:%d - failed to lock locality %d\n",
  355. __FILE__, __LINE__, locality);
  356. return ret;
  357. }
  358. tpm_write_word(priv, TIS_STS_COMMAND_READY,
  359. &regs[locality].tpm_status);
  360. return 0;
  361. }
  362. static int tpm_tis_lpc_close(struct udevice *dev)
  363. {
  364. struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
  365. struct tpm_locality *regs = priv->regs;
  366. u8 locality = 0;
  367. if (tpm_read_word(priv, &regs[locality].access) &
  368. TIS_ACCESS_ACTIVE_LOCALITY) {
  369. tpm_write_word(priv, TIS_ACCESS_ACTIVE_LOCALITY,
  370. &regs[locality].access);
  371. if (tis_wait_reg(priv, &regs[locality].access,
  372. TIS_ACCESS_ACTIVE_LOCALITY, 0) == -ETIMEDOUT) {
  373. printf("%s:%d - failed to release locality %d\n",
  374. __FILE__, __LINE__, locality);
  375. return -ETIMEDOUT;
  376. }
  377. }
  378. return 0;
  379. }
  380. static int tpm_tis_get_desc(struct udevice *dev, char *buf, int size)
  381. {
  382. ulong chip_type = dev_get_driver_data(dev);
  383. if (size < 50)
  384. return -ENOSPC;
  385. return snprintf(buf, size, "1.2 TPM (%s)",
  386. chip_name[chip_type]);
  387. }
  388. static const struct tpm_ops tpm_tis_lpc_ops = {
  389. .open = tpm_tis_lpc_open,
  390. .close = tpm_tis_lpc_close,
  391. .get_desc = tpm_tis_get_desc,
  392. .send = tis_senddata,
  393. .recv = tis_readresponse,
  394. };
  395. static const struct udevice_id tpm_tis_lpc_ids[] = {
  396. { .compatible = "infineon,slb9635lpc", .data = SLB9635 },
  397. { .compatible = "atmel,at97sc3204", .data = AT97SC3204 },
  398. { }
  399. };
  400. U_BOOT_DRIVER(tpm_tis_lpc) = {
  401. .name = "tpm_tis_lpc",
  402. .id = UCLASS_TPM,
  403. .of_match = tpm_tis_lpc_ids,
  404. .ops = &tpm_tis_lpc_ops,
  405. .probe = tpm_tis_lpc_probe,
  406. .priv_auto_alloc_size = sizeof(struct tpm_tis_lpc_priv),
  407. };