mc146818.c 6.6 KB

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  1. /*
  2. * (C) Copyright 2001
  3. * Denis Peter MPL AG Switzerland. d.peter@mpl.ch
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. /*
  8. * Date & Time support for the MC146818 (PIXX4) RTC
  9. */
  10. #include <common.h>
  11. #include <command.h>
  12. #include <dm.h>
  13. #include <rtc.h>
  14. #if defined(CONFIG_X86) || defined(CONFIG_MALTA)
  15. #include <asm/io.h>
  16. #define in8(p) inb(p)
  17. #define out8(p, v) outb(v, p)
  18. #endif
  19. #if defined(CONFIG_CMD_DATE)
  20. /* Set this to 1 to clear the CMOS RAM */
  21. #define CLEAR_CMOS 0
  22. #define RTC_PORT_MC146818 CONFIG_SYS_ISA_IO_BASE_ADDRESS + 0x70
  23. #define RTC_SECONDS 0x00
  24. #define RTC_SECONDS_ALARM 0x01
  25. #define RTC_MINUTES 0x02
  26. #define RTC_MINUTES_ALARM 0x03
  27. #define RTC_HOURS 0x04
  28. #define RTC_HOURS_ALARM 0x05
  29. #define RTC_DAY_OF_WEEK 0x06
  30. #define RTC_DATE_OF_MONTH 0x07
  31. #define RTC_MONTH 0x08
  32. #define RTC_YEAR 0x09
  33. #define RTC_CONFIG_A 0x0a
  34. #define RTC_CONFIG_B 0x0b
  35. #define RTC_CONFIG_C 0x0c
  36. #define RTC_CONFIG_D 0x0d
  37. #define RTC_REG_SIZE 0x80
  38. #define RTC_CONFIG_A_REF_CLCK_32KHZ (1 << 5)
  39. #define RTC_CONFIG_A_RATE_1024HZ 6
  40. #define RTC_CONFIG_B_24H (1 << 1)
  41. #define RTC_CONFIG_D_VALID_RAM_AND_TIME 0x80
  42. static int mc146818_read8(int reg)
  43. {
  44. #ifdef CONFIG_SYS_RTC_REG_BASE_ADDR
  45. return in8(CONFIG_SYS_RTC_REG_BASE_ADDR + reg);
  46. #else
  47. int ofs = 0;
  48. if (reg >= 128) {
  49. ofs = 2;
  50. reg -= 128;
  51. }
  52. out8(RTC_PORT_MC146818 + ofs, reg);
  53. return in8(RTC_PORT_MC146818 + ofs + 1);
  54. #endif
  55. }
  56. static void mc146818_write8(int reg, uchar val)
  57. {
  58. #ifdef CONFIG_SYS_RTC_REG_BASE_ADDR
  59. out8(CONFIG_SYS_RTC_REG_BASE_ADDR + reg, val);
  60. #else
  61. int ofs = 0;
  62. if (reg >= 128) {
  63. ofs = 2;
  64. reg -= 128;
  65. }
  66. out8(RTC_PORT_MC146818 + ofs, reg);
  67. out8(RTC_PORT_MC146818 + ofs + 1, val);
  68. #endif
  69. }
  70. static int mc146818_get(struct rtc_time *tmp)
  71. {
  72. uchar sec, min, hour, mday, wday, mon, year;
  73. /* here check if rtc can be accessed */
  74. while ((mc146818_read8(RTC_CONFIG_A) & 0x80) == 0x80)
  75. ;
  76. sec = mc146818_read8(RTC_SECONDS);
  77. min = mc146818_read8(RTC_MINUTES);
  78. hour = mc146818_read8(RTC_HOURS);
  79. mday = mc146818_read8(RTC_DATE_OF_MONTH);
  80. wday = mc146818_read8(RTC_DAY_OF_WEEK);
  81. mon = mc146818_read8(RTC_MONTH);
  82. year = mc146818_read8(RTC_YEAR);
  83. #ifdef RTC_DEBUG
  84. printf("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x hr: %02x min: %02x sec: %02x\n",
  85. year, mon, mday, wday, hour, min, sec);
  86. printf("Alarms: month: %02x hour: %02x min: %02x sec: %02x\n",
  87. mc146818_read8(RTC_CONFIG_D) & 0x3f,
  88. mc146818_read8(RTC_HOURS_ALARM),
  89. mc146818_read8(RTC_MINUTES_ALARM),
  90. mc146818_read8(RTC_SECONDS_ALARM));
  91. #endif
  92. tmp->tm_sec = bcd2bin(sec & 0x7f);
  93. tmp->tm_min = bcd2bin(min & 0x7f);
  94. tmp->tm_hour = bcd2bin(hour & 0x3f);
  95. tmp->tm_mday = bcd2bin(mday & 0x3f);
  96. tmp->tm_mon = bcd2bin(mon & 0x1f);
  97. tmp->tm_year = bcd2bin(year);
  98. tmp->tm_wday = bcd2bin(wday & 0x07);
  99. if (tmp->tm_year < 70)
  100. tmp->tm_year += 2000;
  101. else
  102. tmp->tm_year += 1900;
  103. tmp->tm_yday = 0;
  104. tmp->tm_isdst = 0;
  105. #ifdef RTC_DEBUG
  106. printf("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
  107. tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
  108. tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
  109. #endif
  110. return 0;
  111. }
  112. static int mc146818_set(struct rtc_time *tmp)
  113. {
  114. #ifdef RTC_DEBUG
  115. printf("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
  116. tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
  117. tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
  118. #endif
  119. /* Disable the RTC to update the regs */
  120. mc146818_write8(RTC_CONFIG_B, 0x82);
  121. mc146818_write8(RTC_YEAR, bin2bcd(tmp->tm_year % 100));
  122. mc146818_write8(RTC_MONTH, bin2bcd(tmp->tm_mon));
  123. mc146818_write8(RTC_DAY_OF_WEEK, bin2bcd(tmp->tm_wday));
  124. mc146818_write8(RTC_DATE_OF_MONTH, bin2bcd(tmp->tm_mday));
  125. mc146818_write8(RTC_HOURS, bin2bcd(tmp->tm_hour));
  126. mc146818_write8(RTC_MINUTES, bin2bcd(tmp->tm_min));
  127. mc146818_write8(RTC_SECONDS, bin2bcd(tmp->tm_sec));
  128. /* Enable the RTC to update the regs */
  129. mc146818_write8(RTC_CONFIG_B, 0x02);
  130. return 0;
  131. }
  132. static void mc146818_reset(void)
  133. {
  134. /* Disable the RTC to update the regs */
  135. mc146818_write8(RTC_CONFIG_B, 0x82);
  136. /* Normal OP */
  137. mc146818_write8(RTC_CONFIG_A, 0x20);
  138. mc146818_write8(RTC_CONFIG_B, 0x00);
  139. mc146818_write8(RTC_CONFIG_B, 0x00);
  140. /* Enable the RTC to update the regs */
  141. mc146818_write8(RTC_CONFIG_B, 0x02);
  142. }
  143. static void mc146818_init(void)
  144. {
  145. #if CLEAR_CMOS
  146. int i;
  147. rtc_write8(RTC_SECONDS_ALARM, 0);
  148. rtc_write8(RTC_MINUTES_ALARM, 0);
  149. rtc_write8(RTC_HOURS_ALARM, 0);
  150. for (i = RTC_CONFIG_A; i < RTC_REG_SIZE; i++)
  151. rtc_write8(i, 0);
  152. printf("RTC: zeroing CMOS RAM\n");
  153. #endif
  154. /* Setup the real time clock */
  155. mc146818_write8(RTC_CONFIG_B, RTC_CONFIG_B_24H);
  156. /* Setup the frequency it operates at */
  157. mc146818_write8(RTC_CONFIG_A, RTC_CONFIG_A_REF_CLCK_32KHZ |
  158. RTC_CONFIG_A_RATE_1024HZ);
  159. /* Ensure all reserved bits are 0 in register D */
  160. mc146818_write8(RTC_CONFIG_D, RTC_CONFIG_D_VALID_RAM_AND_TIME);
  161. /* Clear any pending interrupts */
  162. mc146818_read8(RTC_CONFIG_C);
  163. }
  164. #endif /* CONFIG_CMD_DATE */
  165. #ifdef CONFIG_DM_RTC
  166. static int rtc_mc146818_get(struct udevice *dev, struct rtc_time *time)
  167. {
  168. return mc146818_get(time);
  169. }
  170. static int rtc_mc146818_set(struct udevice *dev, const struct rtc_time *time)
  171. {
  172. return mc146818_set((struct rtc_time *)time);
  173. }
  174. static int rtc_mc146818_reset(struct udevice *dev)
  175. {
  176. mc146818_reset();
  177. return 0;
  178. }
  179. static int rtc_mc146818_read8(struct udevice *dev, unsigned int reg)
  180. {
  181. return mc146818_read8(reg);
  182. }
  183. static int rtc_mc146818_write8(struct udevice *dev, unsigned int reg, int val)
  184. {
  185. mc146818_write8(reg, val);
  186. return 0;
  187. }
  188. static int rtc_mc146818_probe(struct udevice *dev)
  189. {
  190. mc146818_init();
  191. return 0;
  192. }
  193. static const struct rtc_ops rtc_mc146818_ops = {
  194. .get = rtc_mc146818_get,
  195. .set = rtc_mc146818_set,
  196. .reset = rtc_mc146818_reset,
  197. .read8 = rtc_mc146818_read8,
  198. .write8 = rtc_mc146818_write8,
  199. };
  200. static const struct udevice_id rtc_mc146818_ids[] = {
  201. { .compatible = "motorola,mc146818" },
  202. { }
  203. };
  204. U_BOOT_DRIVER(rtc_mc146818) = {
  205. .name = "rtc_mc146818",
  206. .id = UCLASS_RTC,
  207. .of_match = rtc_mc146818_ids,
  208. .probe = rtc_mc146818_probe,
  209. .ops = &rtc_mc146818_ops,
  210. };
  211. #else /* !CONFIG_DM_RTC */
  212. int rtc_get(struct rtc_time *tmp)
  213. {
  214. return mc146818_get(tmp);
  215. }
  216. int rtc_set(struct rtc_time *tmp)
  217. {
  218. return mc146818_set(tmp);
  219. }
  220. void rtc_reset(void)
  221. {
  222. mc146818_reset();
  223. }
  224. int rtc_read8(int reg)
  225. {
  226. return mc146818_read8(reg);
  227. }
  228. void rtc_write8(int reg, uchar val)
  229. {
  230. mc146818_write8(reg, val);
  231. }
  232. u32 rtc_read32(int reg)
  233. {
  234. u32 value = 0;
  235. int i;
  236. for (i = 0; i < sizeof(value); i++)
  237. value |= rtc_read8(reg + i) << (i << 3);
  238. return value;
  239. }
  240. void rtc_write32(int reg, u32 value)
  241. {
  242. int i;
  243. for (i = 0; i < sizeof(value); i++)
  244. rtc_write8(reg + i, (value >> (i << 3)) & 0xff);
  245. }
  246. void rtc_init(void)
  247. {
  248. mc146818_init();
  249. }
  250. #endif /* CONFIG_DM_RTC */