ds1374.c 6.1 KB

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  1. /*
  2. * (C) Copyright 2001, 2002, 2003
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. * Keith Outwater, keith_outwater@mvis.com`
  5. * Steven Scholz, steven.scholz@imc-berlin.de
  6. *
  7. * SPDX-License-Identifier: GPL-2.0+
  8. */
  9. /*
  10. * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim)
  11. * DS1374 Real Time Clock (RTC).
  12. *
  13. * based on ds1337.c
  14. */
  15. #include <common.h>
  16. #include <command.h>
  17. #include <rtc.h>
  18. #include <i2c.h>
  19. #if defined(CONFIG_CMD_DATE)
  20. /*---------------------------------------------------------------------*/
  21. #undef DEBUG_RTC
  22. #define DEBUG_RTC
  23. #ifdef DEBUG_RTC
  24. #define DEBUGR(fmt,args...) printf(fmt ,##args)
  25. #else
  26. #define DEBUGR(fmt,args...)
  27. #endif
  28. /*---------------------------------------------------------------------*/
  29. #ifndef CONFIG_SYS_I2C_RTC_ADDR
  30. # define CONFIG_SYS_I2C_RTC_ADDR 0x68
  31. #endif
  32. #if defined(CONFIG_RTC_DS1374) && (CONFIG_SYS_I2C_SPEED > 400000)
  33. # error The DS1374 is specified up to 400kHz in fast mode!
  34. #endif
  35. /*
  36. * RTC register addresses
  37. */
  38. #define RTC_TOD_CNT_BYTE0_ADDR 0x00 /* TimeOfDay */
  39. #define RTC_TOD_CNT_BYTE1_ADDR 0x01
  40. #define RTC_TOD_CNT_BYTE2_ADDR 0x02
  41. #define RTC_TOD_CNT_BYTE3_ADDR 0x03
  42. #define RTC_WD_ALM_CNT_BYTE0_ADDR 0x04
  43. #define RTC_WD_ALM_CNT_BYTE1_ADDR 0x05
  44. #define RTC_WD_ALM_CNT_BYTE2_ADDR 0x06
  45. #define RTC_CTL_ADDR 0x07 /* RTC-CoNTrol-register */
  46. #define RTC_SR_ADDR 0x08 /* RTC-StatusRegister */
  47. #define RTC_TCS_DS_ADDR 0x09 /* RTC-TrickleChargeSelect DiodeSelect-register */
  48. #define RTC_CTL_BIT_AIE (1<<0) /* Bit 0 - Alarm Interrupt enable */
  49. #define RTC_CTL_BIT_RS1 (1<<1) /* Bit 1/2 - Rate Select square wave output */
  50. #define RTC_CTL_BIT_RS2 (1<<2) /* Bit 2/2 - Rate Select square wave output */
  51. #define RTC_CTL_BIT_WDSTR (1<<3) /* Bit 3 - Watchdog Reset Steering */
  52. #define RTC_CTL_BIT_BBSQW (1<<4) /* Bit 4 - Battery-Backed Square-Wave */
  53. #define RTC_CTL_BIT_WD_ALM (1<<5) /* Bit 5 - Watchdoc/Alarm Counter Select */
  54. #define RTC_CTL_BIT_WACE (1<<6) /* Bit 6 - Watchdog/Alarm Counter Enable WACE*/
  55. #define RTC_CTL_BIT_EN_OSC (1<<7) /* Bit 7 - Enable Oscilator */
  56. #define RTC_SR_BIT_AF 0x01 /* Bit 0 = Alarm Flag */
  57. #define RTC_SR_BIT_OSF 0x80 /* Bit 7 - Osc Stop Flag */
  58. const char RtcTodAddr[] = {
  59. RTC_TOD_CNT_BYTE0_ADDR,
  60. RTC_TOD_CNT_BYTE1_ADDR,
  61. RTC_TOD_CNT_BYTE2_ADDR,
  62. RTC_TOD_CNT_BYTE3_ADDR
  63. };
  64. static uchar rtc_read (uchar reg);
  65. static void rtc_write(uchar reg, uchar val, bool set);
  66. static void rtc_write_raw (uchar reg, uchar val);
  67. /*
  68. * Get the current time from the RTC
  69. */
  70. int rtc_get (struct rtc_time *tm){
  71. int rel = 0;
  72. unsigned long time1, time2;
  73. unsigned int limit;
  74. unsigned char tmp;
  75. unsigned int i;
  76. /*
  77. * Since the reads are being performed one byte at a time,
  78. * there is a chance that a carry will occur during the read.
  79. * To detect this, 2 reads are performed and compared.
  80. */
  81. limit = 10;
  82. do {
  83. i = 4;
  84. time1 = 0;
  85. while (i--) {
  86. tmp = rtc_read(RtcTodAddr[i]);
  87. time1 = (time1 << 8) | (tmp & 0xff);
  88. }
  89. i = 4;
  90. time2 = 0;
  91. while (i--) {
  92. tmp = rtc_read(RtcTodAddr[i]);
  93. time2 = (time2 << 8) | (tmp & 0xff);
  94. }
  95. } while ((time1 != time2) && limit--);
  96. if (time1 != time2) {
  97. printf("can't get consistent time from rtc chip\n");
  98. rel = -1;
  99. }
  100. DEBUGR ("Get RTC s since 1.1.1970: %ld\n", time1);
  101. rtc_to_tm(time1, tm); /* To Gregorian Date */
  102. if (rtc_read(RTC_SR_ADDR) & RTC_SR_BIT_OSF) {
  103. printf ("### Warning: RTC oscillator has stopped\n");
  104. rel = -1;
  105. }
  106. DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
  107. tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
  108. tm->tm_hour, tm->tm_min, tm->tm_sec);
  109. return rel;
  110. }
  111. /*
  112. * Set the RTC
  113. */
  114. int rtc_set (struct rtc_time *tmp){
  115. unsigned long time;
  116. unsigned i;
  117. DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
  118. tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
  119. tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
  120. if (tmp->tm_year < 1970 || tmp->tm_year > 2069)
  121. printf("WARNING: year should be between 1970 and 2069!\n");
  122. time = rtc_mktime(tmp);
  123. DEBUGR ("Set RTC s since 1.1.1970: %ld (0x%02lx)\n", time, time);
  124. /* write to RTC_TOD_CNT_BYTEn_ADDR */
  125. for (i = 0; i <= 3; i++) {
  126. rtc_write_raw(RtcTodAddr[i], (unsigned char)(time & 0xff));
  127. time = time >> 8;
  128. }
  129. /* Start clock */
  130. rtc_write(RTC_CTL_ADDR, RTC_CTL_BIT_EN_OSC, false);
  131. return 0;
  132. }
  133. /*
  134. * Reset the RTC. We setting the date back to 1970-01-01.
  135. * We also enable the oscillator output on the SQW/OUT pin and program
  136. * it for 32,768 Hz output. Note that according to the datasheet, turning
  137. * on the square wave output increases the current drain on the backup
  138. * battery to something between 480nA and 800nA.
  139. */
  140. void rtc_reset (void){
  141. struct rtc_time tmp;
  142. /* clear status flags */
  143. rtc_write(RTC_SR_ADDR, (RTC_SR_BIT_AF|RTC_SR_BIT_OSF), false); /* clearing OSF and AF */
  144. /* Initialise DS1374 oriented to MPC8349E-ADS */
  145. rtc_write (RTC_CTL_ADDR, (RTC_CTL_BIT_EN_OSC
  146. |RTC_CTL_BIT_WACE
  147. |RTC_CTL_BIT_AIE), false);/* start osc, disable WACE, clear AIE
  148. - set to 0 */
  149. rtc_write (RTC_CTL_ADDR, (RTC_CTL_BIT_WD_ALM
  150. |RTC_CTL_BIT_WDSTR
  151. |RTC_CTL_BIT_RS1
  152. |RTC_CTL_BIT_RS2
  153. |RTC_CTL_BIT_BBSQW), true);/* disable WD/ALM, WDSTR set to INT-pin,
  154. set BBSQW and SQW to 32k
  155. - set to 1 */
  156. tmp.tm_year = 1970;
  157. tmp.tm_mon = 1;
  158. tmp.tm_mday= 1;
  159. tmp.tm_hour = 0;
  160. tmp.tm_min = 0;
  161. tmp.tm_sec = 0;
  162. rtc_set(&tmp);
  163. printf("RTC: %4d-%02d-%02d %2d:%02d:%02d UTC\n",
  164. tmp.tm_year, tmp.tm_mon, tmp.tm_mday,
  165. tmp.tm_hour, tmp.tm_min, tmp.tm_sec);
  166. rtc_write(RTC_WD_ALM_CNT_BYTE2_ADDR, 0xAC, true);
  167. rtc_write(RTC_WD_ALM_CNT_BYTE1_ADDR, 0xDE, true);
  168. rtc_write(RTC_WD_ALM_CNT_BYTE2_ADDR, 0xAD, true);
  169. }
  170. /*
  171. * Helper functions
  172. */
  173. static uchar rtc_read (uchar reg)
  174. {
  175. return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg));
  176. }
  177. static void rtc_write(uchar reg, uchar val, bool set)
  178. {
  179. if (set == true) {
  180. val |= i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg);
  181. i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
  182. } else {
  183. val = i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg) & ~val;
  184. i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
  185. }
  186. }
  187. static void rtc_write_raw (uchar reg, uchar val)
  188. {
  189. i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
  190. }
  191. #endif