mc.c 31 KB

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  1. /*
  2. * Copyright (C) 2014 Freescale Semiconductor
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #include <common.h>
  7. #include <errno.h>
  8. #include <linux/bug.h>
  9. #include <asm/io.h>
  10. #include <libfdt.h>
  11. #include <fdt_support.h>
  12. #include <fsl-mc/fsl_mc.h>
  13. #include <fsl-mc/fsl_mc_sys.h>
  14. #include <fsl-mc/fsl_mc_private.h>
  15. #include <fsl-mc/fsl_dpmng.h>
  16. #include <fsl-mc/fsl_dprc.h>
  17. #include <fsl-mc/fsl_dpio.h>
  18. #include <fsl-mc/fsl_dpni.h>
  19. #include <fsl-mc/fsl_qbman_portal.h>
  20. #include <fsl-mc/ldpaa_wriop.h>
  21. #define MC_RAM_BASE_ADDR_ALIGNMENT (512UL * 1024 * 1024)
  22. #define MC_RAM_BASE_ADDR_ALIGNMENT_MASK (~(MC_RAM_BASE_ADDR_ALIGNMENT - 1))
  23. #define MC_RAM_SIZE_ALIGNMENT (256UL * 1024 * 1024)
  24. #define MC_MEM_SIZE_ENV_VAR "mcmemsize"
  25. #define MC_BOOT_TIMEOUT_ENV_VAR "mcboottimeout"
  26. DECLARE_GLOBAL_DATA_PTR;
  27. static int mc_boot_status = -1;
  28. static int mc_dpl_applied = -1;
  29. #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
  30. static int mc_aiop_applied = -1;
  31. #endif
  32. struct fsl_mc_io *root_mc_io = NULL;
  33. struct fsl_mc_io *dflt_mc_io = NULL; /* child container */
  34. uint16_t root_dprc_handle = 0;
  35. uint16_t dflt_dprc_handle = 0;
  36. int child_dprc_id;
  37. struct fsl_dpbp_obj *dflt_dpbp = NULL;
  38. struct fsl_dpio_obj *dflt_dpio = NULL;
  39. struct fsl_dpni_obj *dflt_dpni = NULL;
  40. static u64 mc_lazy_dpl_addr;
  41. #ifdef DEBUG
  42. void dump_ram_words(const char *title, void *addr)
  43. {
  44. int i;
  45. uint32_t *words = addr;
  46. printf("Dumping beginning of %s (%p):\n", title, addr);
  47. for (i = 0; i < 16; i++)
  48. printf("%#x ", words[i]);
  49. printf("\n");
  50. }
  51. void dump_mc_ccsr_regs(struct mc_ccsr_registers __iomem *mc_ccsr_regs)
  52. {
  53. printf("MC CCSR registers:\n"
  54. "reg_gcr1 %#x\n"
  55. "reg_gsr %#x\n"
  56. "reg_sicbalr %#x\n"
  57. "reg_sicbahr %#x\n"
  58. "reg_sicapr %#x\n"
  59. "reg_mcfbalr %#x\n"
  60. "reg_mcfbahr %#x\n"
  61. "reg_mcfapr %#x\n"
  62. "reg_psr %#x\n",
  63. mc_ccsr_regs->reg_gcr1,
  64. mc_ccsr_regs->reg_gsr,
  65. mc_ccsr_regs->reg_sicbalr,
  66. mc_ccsr_regs->reg_sicbahr,
  67. mc_ccsr_regs->reg_sicapr,
  68. mc_ccsr_regs->reg_mcfbalr,
  69. mc_ccsr_regs->reg_mcfbahr,
  70. mc_ccsr_regs->reg_mcfapr,
  71. mc_ccsr_regs->reg_psr);
  72. }
  73. #else
  74. #define dump_ram_words(title, addr)
  75. #define dump_mc_ccsr_regs(mc_ccsr_regs)
  76. #endif /* DEBUG */
  77. #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR
  78. /**
  79. * Copying MC firmware or DPL image to DDR
  80. */
  81. static int mc_copy_image(const char *title,
  82. u64 image_addr, u32 image_size, u64 mc_ram_addr)
  83. {
  84. debug("%s copied to address %p\n", title, (void *)mc_ram_addr);
  85. memcpy((void *)mc_ram_addr, (void *)image_addr, image_size);
  86. flush_dcache_range(mc_ram_addr, mc_ram_addr + image_size);
  87. return 0;
  88. }
  89. /**
  90. * MC firmware FIT image parser checks if the image is in FIT
  91. * format, verifies integrity of the image and calculates
  92. * raw image address and size values.
  93. * Returns 0 on success and a negative errno on error.
  94. * task fail.
  95. **/
  96. int parse_mc_firmware_fit_image(u64 mc_fw_addr,
  97. const void **raw_image_addr,
  98. size_t *raw_image_size)
  99. {
  100. int format;
  101. void *fit_hdr;
  102. int node_offset;
  103. const void *data;
  104. size_t size;
  105. const char *uname = "firmware";
  106. fit_hdr = (void *)mc_fw_addr;
  107. /* Check if Image is in FIT format */
  108. format = genimg_get_format(fit_hdr);
  109. if (format != IMAGE_FORMAT_FIT) {
  110. printf("fsl-mc: ERR: Bad firmware image (not a FIT image)\n");
  111. return -EINVAL;
  112. }
  113. if (!fit_check_format(fit_hdr)) {
  114. printf("fsl-mc: ERR: Bad firmware image (bad FIT header)\n");
  115. return -EINVAL;
  116. }
  117. node_offset = fit_image_get_node(fit_hdr, uname);
  118. if (node_offset < 0) {
  119. printf("fsl-mc: ERR: Bad firmware image (missing subimage)\n");
  120. return -ENOENT;
  121. }
  122. /* Verify MC firmware image */
  123. if (!(fit_image_verify(fit_hdr, node_offset))) {
  124. printf("fsl-mc: ERR: Bad firmware image (bad CRC)\n");
  125. return -EINVAL;
  126. }
  127. /* Get address and size of raw image */
  128. fit_image_get_data(fit_hdr, node_offset, &data, &size);
  129. *raw_image_addr = data;
  130. *raw_image_size = size;
  131. return 0;
  132. }
  133. #endif
  134. /*
  135. * Calculates the values to be used to specify the address range
  136. * for the MC private DRAM block, in the MCFBALR/MCFBAHR registers.
  137. * It returns the highest 512MB-aligned address within the given
  138. * address range, in '*aligned_base_addr', and the number of 256 MiB
  139. * blocks in it, in 'num_256mb_blocks'.
  140. */
  141. static int calculate_mc_private_ram_params(u64 mc_private_ram_start_addr,
  142. size_t mc_ram_size,
  143. u64 *aligned_base_addr,
  144. u8 *num_256mb_blocks)
  145. {
  146. u64 addr;
  147. u16 num_blocks;
  148. if (mc_ram_size % MC_RAM_SIZE_ALIGNMENT != 0) {
  149. printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n",
  150. mc_ram_size);
  151. return -EINVAL;
  152. }
  153. num_blocks = mc_ram_size / MC_RAM_SIZE_ALIGNMENT;
  154. if (num_blocks < 1 || num_blocks > 0xff) {
  155. printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n",
  156. mc_ram_size);
  157. return -EINVAL;
  158. }
  159. addr = (mc_private_ram_start_addr + mc_ram_size - 1) &
  160. MC_RAM_BASE_ADDR_ALIGNMENT_MASK;
  161. if (addr < mc_private_ram_start_addr) {
  162. printf("fsl-mc: ERROR: bad start address %#llx\n",
  163. mc_private_ram_start_addr);
  164. return -EFAULT;
  165. }
  166. *aligned_base_addr = addr;
  167. *num_256mb_blocks = num_blocks;
  168. return 0;
  169. }
  170. static int mc_fixup_dpc(u64 dpc_addr)
  171. {
  172. void *blob = (void *)dpc_addr;
  173. int nodeoffset;
  174. /* delete any existing ICID pools */
  175. nodeoffset = fdt_path_offset(blob, "/resources/icid_pools");
  176. if (fdt_del_node(blob, nodeoffset) < 0)
  177. printf("\nfsl-mc: WARNING: could not delete ICID pool\n");
  178. /* add a new pool */
  179. nodeoffset = fdt_path_offset(blob, "/resources");
  180. if (nodeoffset < 0) {
  181. printf("\nfsl-mc: ERROR: DPC is missing /resources\n");
  182. return -EINVAL;
  183. }
  184. nodeoffset = fdt_add_subnode(blob, nodeoffset, "icid_pools");
  185. nodeoffset = fdt_add_subnode(blob, nodeoffset, "icid_pool@0");
  186. do_fixup_by_path_u32(blob, "/resources/icid_pools/icid_pool@0",
  187. "base_icid", FSL_DPAA2_STREAM_ID_START, 1);
  188. do_fixup_by_path_u32(blob, "/resources/icid_pools/icid_pool@0",
  189. "num",
  190. FSL_DPAA2_STREAM_ID_END -
  191. FSL_DPAA2_STREAM_ID_START + 1, 1);
  192. flush_dcache_range(dpc_addr, dpc_addr + fdt_totalsize(blob));
  193. return 0;
  194. }
  195. static int load_mc_dpc(u64 mc_ram_addr, size_t mc_ram_size, u64 mc_dpc_addr)
  196. {
  197. u64 mc_dpc_offset;
  198. #ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR
  199. int error;
  200. void *dpc_fdt_hdr;
  201. int dpc_size;
  202. #endif
  203. #ifdef CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET
  204. BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET & 0x3) != 0 ||
  205. CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET > 0xffffffff);
  206. mc_dpc_offset = CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET;
  207. #else
  208. #error "CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET not defined"
  209. #endif
  210. /*
  211. * Load the MC DPC blob in the MC private DRAM block:
  212. */
  213. #ifdef CONFIG_SYS_LS_MC_DPC_IN_DDR
  214. printf("MC DPC is preloaded to %#llx\n", mc_ram_addr + mc_dpc_offset);
  215. #else
  216. /*
  217. * Get address and size of the DPC blob stored in flash:
  218. */
  219. dpc_fdt_hdr = (void *)mc_dpc_addr;
  220. error = fdt_check_header(dpc_fdt_hdr);
  221. if (error != 0) {
  222. /*
  223. * Don't return with error here, since the MC firmware can
  224. * still boot without a DPC
  225. */
  226. printf("\nfsl-mc: WARNING: No DPC image found");
  227. return 0;
  228. }
  229. dpc_size = fdt_totalsize(dpc_fdt_hdr);
  230. if (dpc_size > CONFIG_SYS_LS_MC_DPC_MAX_LENGTH) {
  231. printf("\nfsl-mc: ERROR: Bad DPC image (too large: %d)\n",
  232. dpc_size);
  233. return -EINVAL;
  234. }
  235. mc_copy_image("MC DPC blob",
  236. (u64)dpc_fdt_hdr, dpc_size, mc_ram_addr + mc_dpc_offset);
  237. #endif /* not defined CONFIG_SYS_LS_MC_DPC_IN_DDR */
  238. if (mc_fixup_dpc(mc_ram_addr + mc_dpc_offset))
  239. return -EINVAL;
  240. dump_ram_words("DPC", (void *)(mc_ram_addr + mc_dpc_offset));
  241. return 0;
  242. }
  243. static int load_mc_dpl(u64 mc_ram_addr, size_t mc_ram_size, u64 mc_dpl_addr)
  244. {
  245. u64 mc_dpl_offset;
  246. #ifndef CONFIG_SYS_LS_MC_DPL_IN_DDR
  247. int error;
  248. void *dpl_fdt_hdr;
  249. int dpl_size;
  250. #endif
  251. #ifdef CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET
  252. BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET & 0x3) != 0 ||
  253. CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET > 0xffffffff);
  254. mc_dpl_offset = CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET;
  255. #else
  256. #error "CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET not defined"
  257. #endif
  258. /*
  259. * Load the MC DPL blob in the MC private DRAM block:
  260. */
  261. #ifdef CONFIG_SYS_LS_MC_DPL_IN_DDR
  262. printf("MC DPL is preloaded to %#llx\n", mc_ram_addr + mc_dpl_offset);
  263. #else
  264. /*
  265. * Get address and size of the DPL blob stored in flash:
  266. */
  267. dpl_fdt_hdr = (void *)mc_dpl_addr;
  268. error = fdt_check_header(dpl_fdt_hdr);
  269. if (error != 0) {
  270. printf("\nfsl-mc: ERROR: Bad DPL image (bad header)\n");
  271. return error;
  272. }
  273. dpl_size = fdt_totalsize(dpl_fdt_hdr);
  274. if (dpl_size > CONFIG_SYS_LS_MC_DPL_MAX_LENGTH) {
  275. printf("\nfsl-mc: ERROR: Bad DPL image (too large: %d)\n",
  276. dpl_size);
  277. return -EINVAL;
  278. }
  279. mc_copy_image("MC DPL blob",
  280. (u64)dpl_fdt_hdr, dpl_size, mc_ram_addr + mc_dpl_offset);
  281. #endif /* not defined CONFIG_SYS_LS_MC_DPL_IN_DDR */
  282. dump_ram_words("DPL", (void *)(mc_ram_addr + mc_dpl_offset));
  283. return 0;
  284. }
  285. /**
  286. * Return the MC boot timeout value in milliseconds
  287. */
  288. static unsigned long get_mc_boot_timeout_ms(void)
  289. {
  290. unsigned long timeout_ms = CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS;
  291. char *timeout_ms_env_var = getenv(MC_BOOT_TIMEOUT_ENV_VAR);
  292. if (timeout_ms_env_var) {
  293. timeout_ms = simple_strtoul(timeout_ms_env_var, NULL, 10);
  294. if (timeout_ms == 0) {
  295. printf("fsl-mc: WARNING: Invalid value for \'"
  296. MC_BOOT_TIMEOUT_ENV_VAR
  297. "\' environment variable: %lu\n",
  298. timeout_ms);
  299. timeout_ms = CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS;
  300. }
  301. }
  302. return timeout_ms;
  303. }
  304. #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
  305. __weak bool soc_has_aiop(void)
  306. {
  307. return false;
  308. }
  309. static int load_mc_aiop_img(u64 aiop_fw_addr)
  310. {
  311. u64 mc_ram_addr = mc_get_dram_addr();
  312. #ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR
  313. void *aiop_img;
  314. #endif
  315. /* Check if AIOP is available */
  316. if (!soc_has_aiop())
  317. return -ENODEV;
  318. /*
  319. * Load the MC AIOP image in the MC private DRAM block:
  320. */
  321. #ifdef CONFIG_SYS_LS_MC_DPC_IN_DDR
  322. printf("MC AIOP is preloaded to %#llx\n", mc_ram_addr +
  323. CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET);
  324. #else
  325. aiop_img = (void *)aiop_fw_addr;
  326. mc_copy_image("MC AIOP image",
  327. (u64)aiop_img, CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH,
  328. mc_ram_addr + CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET);
  329. #endif
  330. mc_aiop_applied = 0;
  331. return 0;
  332. }
  333. #endif
  334. static int wait_for_mc(bool booting_mc, u32 *final_reg_gsr)
  335. {
  336. u32 reg_gsr;
  337. u32 mc_fw_boot_status;
  338. unsigned long timeout_ms = get_mc_boot_timeout_ms();
  339. struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
  340. dmb();
  341. assert(timeout_ms > 0);
  342. for (;;) {
  343. udelay(1000); /* throttle polling */
  344. reg_gsr = in_le32(&mc_ccsr_regs->reg_gsr);
  345. mc_fw_boot_status = (reg_gsr & GSR_FS_MASK);
  346. if (mc_fw_boot_status & 0x1)
  347. break;
  348. timeout_ms--;
  349. if (timeout_ms == 0)
  350. break;
  351. }
  352. if (timeout_ms == 0) {
  353. printf("ERROR: timeout\n");
  354. /* TODO: Get an error status from an MC CCSR register */
  355. return -ETIMEDOUT;
  356. }
  357. if (mc_fw_boot_status != 0x1) {
  358. /*
  359. * TODO: Identify critical errors from the GSR register's FS
  360. * field and for those errors, set error to -ENODEV or other
  361. * appropriate errno, so that the status property is set to
  362. * failure in the fsl,dprc device tree node.
  363. */
  364. printf("WARNING: Firmware returned an error (GSR: %#x)\n",
  365. reg_gsr);
  366. } else {
  367. printf("SUCCESS\n");
  368. }
  369. *final_reg_gsr = reg_gsr;
  370. return 0;
  371. }
  372. int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr)
  373. {
  374. int error = 0;
  375. int portal_id = 0;
  376. struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
  377. u64 mc_ram_addr = mc_get_dram_addr();
  378. u32 reg_gsr;
  379. u32 reg_mcfbalr;
  380. #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR
  381. const void *raw_image_addr;
  382. size_t raw_image_size = 0;
  383. #endif
  384. struct mc_version mc_ver_info;
  385. u64 mc_ram_aligned_base_addr;
  386. u8 mc_ram_num_256mb_blocks;
  387. size_t mc_ram_size = mc_get_dram_block_size();
  388. error = calculate_mc_private_ram_params(mc_ram_addr,
  389. mc_ram_size,
  390. &mc_ram_aligned_base_addr,
  391. &mc_ram_num_256mb_blocks);
  392. if (error != 0)
  393. goto out;
  394. /*
  395. * Management Complex cores should be held at reset out of POR.
  396. * U-Boot should be the first software to touch MC. To be safe,
  397. * we reset all cores again by setting GCR1 to 0. It doesn't do
  398. * anything if they are held at reset. After we setup the firmware
  399. * we kick off MC by deasserting the reset bit for core 0, and
  400. * deasserting the reset bits for Command Portal Managers.
  401. * The stop bits are not touched here. They are used to stop the
  402. * cores when they are active. Setting stop bits doesn't stop the
  403. * cores from fetching instructions when they are released from
  404. * reset.
  405. */
  406. out_le32(&mc_ccsr_regs->reg_gcr1, 0);
  407. dmb();
  408. #ifdef CONFIG_SYS_LS_MC_FW_IN_DDR
  409. printf("MC firmware is preloaded to %#llx\n", mc_ram_addr);
  410. #else
  411. error = parse_mc_firmware_fit_image(mc_fw_addr, &raw_image_addr,
  412. &raw_image_size);
  413. if (error != 0)
  414. goto out;
  415. /*
  416. * Load the MC FW at the beginning of the MC private DRAM block:
  417. */
  418. mc_copy_image("MC Firmware",
  419. (u64)raw_image_addr, raw_image_size, mc_ram_addr);
  420. #endif
  421. dump_ram_words("firmware", (void *)mc_ram_addr);
  422. error = load_mc_dpc(mc_ram_addr, mc_ram_size, mc_dpc_addr);
  423. if (error != 0)
  424. goto out;
  425. debug("mc_ccsr_regs %p\n", mc_ccsr_regs);
  426. dump_mc_ccsr_regs(mc_ccsr_regs);
  427. /*
  428. * Tell MC what is the address range of the DRAM block assigned to it:
  429. */
  430. reg_mcfbalr = (u32)mc_ram_aligned_base_addr |
  431. (mc_ram_num_256mb_blocks - 1);
  432. out_le32(&mc_ccsr_regs->reg_mcfbalr, reg_mcfbalr);
  433. out_le32(&mc_ccsr_regs->reg_mcfbahr,
  434. (u32)(mc_ram_aligned_base_addr >> 32));
  435. out_le32(&mc_ccsr_regs->reg_mcfapr, FSL_BYPASS_AMQ);
  436. /*
  437. * Tell the MC that we want delayed DPL deployment.
  438. */
  439. out_le32(&mc_ccsr_regs->reg_gsr, 0xDD00);
  440. printf("\nfsl-mc: Booting Management Complex ... ");
  441. /*
  442. * Deassert reset and release MC core 0 to run
  443. */
  444. out_le32(&mc_ccsr_regs->reg_gcr1, GCR1_P1_DE_RST | GCR1_M_ALL_DE_RST);
  445. error = wait_for_mc(true, &reg_gsr);
  446. if (error != 0)
  447. goto out;
  448. /*
  449. * TODO: need to obtain the portal_id for the root container from the
  450. * DPL
  451. */
  452. portal_id = 0;
  453. /*
  454. * Initialize the global default MC portal
  455. * And check that the MC firmware is responding portal commands:
  456. */
  457. root_mc_io = (struct fsl_mc_io *)malloc(sizeof(struct fsl_mc_io));
  458. if (!root_mc_io) {
  459. printf(" No memory: malloc() failed\n");
  460. return -ENOMEM;
  461. }
  462. root_mc_io->mmio_regs = SOC_MC_PORTAL_ADDR(portal_id);
  463. debug("Checking access to MC portal of root DPRC container (portal_id %d, portal physical addr %p)\n",
  464. portal_id, root_mc_io->mmio_regs);
  465. error = mc_get_version(root_mc_io, MC_CMD_NO_FLAGS, &mc_ver_info);
  466. if (error != 0) {
  467. printf("fsl-mc: ERROR: Firmware version check failed (error: %d)\n",
  468. error);
  469. goto out;
  470. }
  471. printf("fsl-mc: Management Complex booted (version: %d.%d.%d, boot status: %#x)\n",
  472. mc_ver_info.major, mc_ver_info.minor, mc_ver_info.revision,
  473. reg_gsr & GSR_FS_MASK);
  474. out:
  475. if (error != 0)
  476. mc_boot_status = error;
  477. else
  478. mc_boot_status = 0;
  479. return error;
  480. }
  481. int mc_apply_dpl(u64 mc_dpl_addr)
  482. {
  483. struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
  484. int error = 0;
  485. u32 reg_gsr;
  486. u64 mc_ram_addr = mc_get_dram_addr();
  487. size_t mc_ram_size = mc_get_dram_block_size();
  488. if (!mc_dpl_addr)
  489. return -1;
  490. error = load_mc_dpl(mc_ram_addr, mc_ram_size, mc_dpl_addr);
  491. if (error != 0)
  492. return error;
  493. /*
  494. * Tell the MC to deploy the DPL:
  495. */
  496. out_le32(&mc_ccsr_regs->reg_gsr, 0x0);
  497. printf("fsl-mc: Deploying data path layout ... ");
  498. error = wait_for_mc(false, &reg_gsr);
  499. if (!error)
  500. mc_dpl_applied = 0;
  501. return error;
  502. }
  503. int get_mc_boot_status(void)
  504. {
  505. return mc_boot_status;
  506. }
  507. #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
  508. int get_aiop_apply_status(void)
  509. {
  510. return mc_aiop_applied;
  511. }
  512. #endif
  513. int get_dpl_apply_status(void)
  514. {
  515. return mc_dpl_applied;
  516. }
  517. /**
  518. * Return the MC address of private DRAM block.
  519. */
  520. u64 mc_get_dram_addr(void)
  521. {
  522. u64 mc_ram_addr;
  523. /*
  524. * The MC private DRAM block was already carved at the end of DRAM
  525. * by board_init_f() using CONFIG_SYS_MEM_TOP_HIDE:
  526. */
  527. if (gd->bd->bi_dram[1].start) {
  528. mc_ram_addr =
  529. gd->bd->bi_dram[1].start + gd->bd->bi_dram[1].size;
  530. } else {
  531. mc_ram_addr =
  532. gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size;
  533. }
  534. return mc_ram_addr;
  535. }
  536. /**
  537. * Return the actual size of the MC private DRAM block.
  538. */
  539. unsigned long mc_get_dram_block_size(void)
  540. {
  541. unsigned long dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE;
  542. char *dram_block_size_env_var = getenv(MC_MEM_SIZE_ENV_VAR);
  543. if (dram_block_size_env_var) {
  544. dram_block_size = simple_strtoul(dram_block_size_env_var, NULL,
  545. 10);
  546. if (dram_block_size < CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE) {
  547. printf("fsl-mc: WARNING: Invalid value for \'"
  548. MC_MEM_SIZE_ENV_VAR
  549. "\' environment variable: %lu\n",
  550. dram_block_size);
  551. dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE;
  552. }
  553. }
  554. return dram_block_size;
  555. }
  556. int fsl_mc_ldpaa_init(bd_t *bis)
  557. {
  558. int i;
  559. for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++)
  560. if ((wriop_is_enabled_dpmac(i) == 1) &&
  561. (wriop_get_phy_address(i) != -1))
  562. ldpaa_eth_init(i, wriop_get_enet_if(i));
  563. return 0;
  564. }
  565. static int dprc_version_check(struct fsl_mc_io *mc_io, uint16_t handle)
  566. {
  567. struct dprc_attributes attr;
  568. int error;
  569. memset(&attr, 0, sizeof(struct dprc_attributes));
  570. error = dprc_get_attributes(mc_io, MC_CMD_NO_FLAGS, handle, &attr);
  571. if (error == 0) {
  572. if ((attr.version.major != DPRC_VER_MAJOR) ||
  573. (attr.version.minor != DPRC_VER_MINOR)) {
  574. printf("DPRC version mismatch found %u.%u,",
  575. attr.version.major,
  576. attr.version.minor);
  577. printf("supported version is %u.%u\n",
  578. DPRC_VER_MAJOR, DPRC_VER_MINOR);
  579. }
  580. }
  581. return error;
  582. }
  583. static int dpio_init(void)
  584. {
  585. struct qbman_swp_desc p_des;
  586. struct dpio_attr attr;
  587. struct dpio_cfg dpio_cfg;
  588. int err = 0;
  589. dflt_dpio = (struct fsl_dpio_obj *)malloc(sizeof(struct fsl_dpio_obj));
  590. if (!dflt_dpio) {
  591. printf("No memory: malloc() failed\n");
  592. err = -ENOMEM;
  593. goto err_malloc;
  594. }
  595. dpio_cfg.channel_mode = DPIO_LOCAL_CHANNEL;
  596. dpio_cfg.num_priorities = 8;
  597. err = dpio_create(dflt_mc_io, MC_CMD_NO_FLAGS, &dpio_cfg,
  598. &dflt_dpio->dpio_handle);
  599. if (err < 0) {
  600. printf("dpio_create() failed: %d\n", err);
  601. err = -ENODEV;
  602. goto err_create;
  603. }
  604. memset(&attr, 0, sizeof(struct dpio_attr));
  605. err = dpio_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS,
  606. dflt_dpio->dpio_handle, &attr);
  607. if (err < 0) {
  608. printf("dpio_get_attributes() failed: %d\n", err);
  609. goto err_get_attr;
  610. }
  611. if ((attr.version.major != DPIO_VER_MAJOR) ||
  612. (attr.version.minor != DPIO_VER_MINOR)) {
  613. printf("DPIO version mismatch found %u.%u,",
  614. attr.version.major, attr.version.minor);
  615. printf("supported version is %u.%u\n",
  616. DPIO_VER_MAJOR, DPIO_VER_MINOR);
  617. }
  618. dflt_dpio->dpio_id = attr.id;
  619. #ifdef DEBUG
  620. printf("Init: DPIO id=0x%d\n", dflt_dpio->dpio_id);
  621. #endif
  622. err = dpio_enable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  623. if (err < 0) {
  624. printf("dpio_enable() failed %d\n", err);
  625. goto err_get_enable;
  626. }
  627. debug("ce_offset=0x%llx, ci_offset=0x%llx, portalid=%d, prios=%d\n",
  628. attr.qbman_portal_ce_offset,
  629. attr.qbman_portal_ci_offset,
  630. attr.qbman_portal_id,
  631. attr.num_priorities);
  632. p_des.cena_bar = (void *)(SOC_QBMAN_PORTALS_BASE_ADDR
  633. + attr.qbman_portal_ce_offset);
  634. p_des.cinh_bar = (void *)(SOC_QBMAN_PORTALS_BASE_ADDR
  635. + attr.qbman_portal_ci_offset);
  636. dflt_dpio->sw_portal = qbman_swp_init(&p_des);
  637. if (dflt_dpio->sw_portal == NULL) {
  638. printf("qbman_swp_init() failed\n");
  639. goto err_get_swp_init;
  640. }
  641. return 0;
  642. err_get_swp_init:
  643. dpio_disable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  644. err_get_enable:
  645. err_get_attr:
  646. dpio_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  647. dpio_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  648. err_create:
  649. free(dflt_dpio);
  650. err_malloc:
  651. return err;
  652. }
  653. static int dpio_exit(void)
  654. {
  655. int err;
  656. err = dpio_disable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  657. if (err < 0) {
  658. printf("dpio_disable() failed: %d\n", err);
  659. goto err;
  660. }
  661. err = dpio_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  662. if (err < 0) {
  663. printf("dpio_destroy() failed: %d\n", err);
  664. goto err;
  665. }
  666. #ifdef DEBUG
  667. printf("Exit: DPIO id=0x%d\n", dflt_dpio->dpio_id);
  668. #endif
  669. if (dflt_dpio)
  670. free(dflt_dpio);
  671. return 0;
  672. err:
  673. return err;
  674. }
  675. static int dprc_init(void)
  676. {
  677. int err, child_portal_id, container_id;
  678. struct dprc_cfg cfg;
  679. uint64_t mc_portal_offset;
  680. /* Open root container */
  681. err = dprc_get_container_id(root_mc_io, MC_CMD_NO_FLAGS, &container_id);
  682. if (err < 0) {
  683. printf("dprc_get_container_id(): Root failed: %d\n", err);
  684. goto err_root_container_id;
  685. }
  686. #ifdef DEBUG
  687. printf("Root container id = %d\n", container_id);
  688. #endif
  689. err = dprc_open(root_mc_io, MC_CMD_NO_FLAGS, container_id,
  690. &root_dprc_handle);
  691. if (err < 0) {
  692. printf("dprc_open(): Root Container failed: %d\n", err);
  693. goto err_root_open;
  694. }
  695. if (!root_dprc_handle) {
  696. printf("dprc_open(): Root Container Handle is not valid\n");
  697. goto err_root_open;
  698. }
  699. err = dprc_version_check(root_mc_io, root_dprc_handle);
  700. if (err < 0) {
  701. printf("dprc_version_check() failed: %d\n", err);
  702. goto err_root_open;
  703. }
  704. memset(&cfg, 0, sizeof(struct dprc_cfg));
  705. cfg.options = DPRC_CFG_OPT_TOPOLOGY_CHANGES_ALLOWED |
  706. DPRC_CFG_OPT_OBJ_CREATE_ALLOWED |
  707. DPRC_CFG_OPT_ALLOC_ALLOWED;
  708. cfg.icid = DPRC_GET_ICID_FROM_POOL;
  709. cfg.portal_id = DPRC_GET_PORTAL_ID_FROM_POOL;
  710. err = dprc_create_container(root_mc_io, MC_CMD_NO_FLAGS,
  711. root_dprc_handle,
  712. &cfg,
  713. &child_dprc_id,
  714. &mc_portal_offset);
  715. if (err < 0) {
  716. printf("dprc_create_container() failed: %d\n", err);
  717. goto err_create;
  718. }
  719. dflt_mc_io = (struct fsl_mc_io *)malloc(sizeof(struct fsl_mc_io));
  720. if (!dflt_mc_io) {
  721. err = -ENOMEM;
  722. printf(" No memory: malloc() failed\n");
  723. goto err_malloc;
  724. }
  725. child_portal_id = MC_PORTAL_OFFSET_TO_PORTAL_ID(mc_portal_offset);
  726. dflt_mc_io->mmio_regs = SOC_MC_PORTAL_ADDR(child_portal_id);
  727. #ifdef DEBUG
  728. printf("MC portal of child DPRC container: %d, physical addr %p)\n",
  729. child_dprc_id, dflt_mc_io->mmio_regs);
  730. #endif
  731. err = dprc_open(dflt_mc_io, MC_CMD_NO_FLAGS, child_dprc_id,
  732. &dflt_dprc_handle);
  733. if (err < 0) {
  734. printf("dprc_open(): Child container failed: %d\n", err);
  735. goto err_child_open;
  736. }
  737. if (!dflt_dprc_handle) {
  738. printf("dprc_open(): Child container Handle is not valid\n");
  739. goto err_child_open;
  740. }
  741. return 0;
  742. err_child_open:
  743. free(dflt_mc_io);
  744. err_malloc:
  745. dprc_destroy_container(root_mc_io, MC_CMD_NO_FLAGS,
  746. root_dprc_handle, child_dprc_id);
  747. err_create:
  748. dprc_close(root_mc_io, MC_CMD_NO_FLAGS, root_dprc_handle);
  749. err_root_open:
  750. err_root_container_id:
  751. return err;
  752. }
  753. static int dprc_exit(void)
  754. {
  755. int err;
  756. err = dprc_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dprc_handle);
  757. if (err < 0) {
  758. printf("dprc_close(): Child failed: %d\n", err);
  759. goto err;
  760. }
  761. err = dprc_destroy_container(root_mc_io, MC_CMD_NO_FLAGS,
  762. root_dprc_handle, child_dprc_id);
  763. if (err < 0) {
  764. printf("dprc_destroy_container() failed: %d\n", err);
  765. goto err;
  766. }
  767. err = dprc_close(root_mc_io, MC_CMD_NO_FLAGS, root_dprc_handle);
  768. if (err < 0) {
  769. printf("dprc_close(): Root failed: %d\n", err);
  770. goto err;
  771. }
  772. if (dflt_mc_io)
  773. free(dflt_mc_io);
  774. if (root_mc_io)
  775. free(root_mc_io);
  776. return 0;
  777. err:
  778. return err;
  779. }
  780. static int dpbp_init(void)
  781. {
  782. int err;
  783. struct dpbp_attr dpbp_attr;
  784. struct dpbp_cfg dpbp_cfg;
  785. dflt_dpbp = (struct fsl_dpbp_obj *)malloc(sizeof(struct fsl_dpbp_obj));
  786. if (!dflt_dpbp) {
  787. printf("No memory: malloc() failed\n");
  788. err = -ENOMEM;
  789. goto err_malloc;
  790. }
  791. dpbp_cfg.options = 512;
  792. err = dpbp_create(dflt_mc_io, MC_CMD_NO_FLAGS, &dpbp_cfg,
  793. &dflt_dpbp->dpbp_handle);
  794. if (err < 0) {
  795. err = -ENODEV;
  796. printf("dpbp_create() failed: %d\n", err);
  797. goto err_create;
  798. }
  799. memset(&dpbp_attr, 0, sizeof(struct dpbp_attr));
  800. err = dpbp_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS,
  801. dflt_dpbp->dpbp_handle,
  802. &dpbp_attr);
  803. if (err < 0) {
  804. printf("dpbp_get_attributes() failed: %d\n", err);
  805. goto err_get_attr;
  806. }
  807. if ((dpbp_attr.version.major != DPBP_VER_MAJOR) ||
  808. (dpbp_attr.version.minor != DPBP_VER_MINOR)) {
  809. printf("DPBP version mismatch found %u.%u,",
  810. dpbp_attr.version.major, dpbp_attr.version.minor);
  811. printf("supported version is %u.%u\n",
  812. DPBP_VER_MAJOR, DPBP_VER_MINOR);
  813. }
  814. dflt_dpbp->dpbp_attr.id = dpbp_attr.id;
  815. #ifdef DEBUG
  816. printf("Init: DPBP id=0x%d\n", dflt_dpbp->dpbp_attr.id);
  817. #endif
  818. err = dpbp_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle);
  819. if (err < 0) {
  820. printf("dpbp_close() failed: %d\n", err);
  821. goto err_close;
  822. }
  823. return 0;
  824. err_close:
  825. free(dflt_dpbp);
  826. err_get_attr:
  827. dpbp_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle);
  828. dpbp_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle);
  829. err_create:
  830. err_malloc:
  831. return err;
  832. }
  833. static int dpbp_exit(void)
  834. {
  835. int err;
  836. err = dpbp_open(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_attr.id,
  837. &dflt_dpbp->dpbp_handle);
  838. if (err < 0) {
  839. printf("dpbp_open() failed: %d\n", err);
  840. goto err;
  841. }
  842. err = dpbp_destroy(dflt_mc_io, MC_CMD_NO_FLAGS,
  843. dflt_dpbp->dpbp_handle);
  844. if (err < 0) {
  845. printf("dpbp_destroy() failed: %d\n", err);
  846. goto err;
  847. }
  848. #ifdef DEBUG
  849. printf("Exit: DPBP id=0x%d\n", dflt_dpbp->dpbp_attr.id);
  850. #endif
  851. if (dflt_dpbp)
  852. free(dflt_dpbp);
  853. return 0;
  854. err:
  855. return err;
  856. }
  857. static int dpni_init(void)
  858. {
  859. int err;
  860. struct dpni_attr dpni_attr;
  861. uint8_t ext_cfg_buf[256] = {0};
  862. struct dpni_extended_cfg dpni_extended_cfg;
  863. struct dpni_cfg dpni_cfg;
  864. dflt_dpni = (struct fsl_dpni_obj *)malloc(sizeof(struct fsl_dpni_obj));
  865. if (!dflt_dpni) {
  866. printf("No memory: malloc() failed\n");
  867. err = -ENOMEM;
  868. goto err_malloc;
  869. }
  870. memset(&dpni_extended_cfg, 0, sizeof(dpni_extended_cfg));
  871. err = dpni_prepare_extended_cfg(&dpni_extended_cfg, &ext_cfg_buf[0]);
  872. if (err < 0) {
  873. err = -ENODEV;
  874. printf("dpni_prepare_extended_cfg() failed: %d\n", err);
  875. goto err_prepare_extended_cfg;
  876. }
  877. memset(&dpni_cfg, 0, sizeof(dpni_cfg));
  878. dpni_cfg.adv.options = DPNI_OPT_UNICAST_FILTER |
  879. DPNI_OPT_MULTICAST_FILTER;
  880. dpni_cfg.adv.ext_cfg_iova = (uint64_t)&ext_cfg_buf[0];
  881. err = dpni_create(dflt_mc_io, MC_CMD_NO_FLAGS, &dpni_cfg,
  882. &dflt_dpni->dpni_handle);
  883. if (err < 0) {
  884. err = -ENODEV;
  885. printf("dpni_create() failed: %d\n", err);
  886. goto err_create;
  887. }
  888. memset(&dpni_attr, 0, sizeof(struct dpni_attr));
  889. err = dpni_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS,
  890. dflt_dpni->dpni_handle,
  891. &dpni_attr);
  892. if (err < 0) {
  893. printf("dpni_get_attributes() failed: %d\n", err);
  894. goto err_get_attr;
  895. }
  896. if ((dpni_attr.version.major != DPNI_VER_MAJOR) ||
  897. (dpni_attr.version.minor != DPNI_VER_MINOR)) {
  898. printf("DPNI version mismatch found %u.%u,",
  899. dpni_attr.version.major, dpni_attr.version.minor);
  900. printf("supported version is %u.%u\n",
  901. DPNI_VER_MAJOR, DPNI_VER_MINOR);
  902. }
  903. dflt_dpni->dpni_id = dpni_attr.id;
  904. #ifdef DEBUG
  905. printf("Init: DPNI id=0x%d\n", dflt_dpni->dpni_id);
  906. #endif
  907. err = dpni_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle);
  908. if (err < 0) {
  909. printf("dpni_close() failed: %d\n", err);
  910. goto err_close;
  911. }
  912. return 0;
  913. err_close:
  914. err_get_attr:
  915. dpni_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle);
  916. dpni_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle);
  917. err_create:
  918. err_prepare_extended_cfg:
  919. free(dflt_dpni);
  920. err_malloc:
  921. return err;
  922. }
  923. static int dpni_exit(void)
  924. {
  925. int err;
  926. err = dpni_open(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_id,
  927. &dflt_dpni->dpni_handle);
  928. if (err < 0) {
  929. printf("dpni_open() failed: %d\n", err);
  930. goto err;
  931. }
  932. err = dpni_destroy(dflt_mc_io, MC_CMD_NO_FLAGS,
  933. dflt_dpni->dpni_handle);
  934. if (err < 0) {
  935. printf("dpni_destroy() failed: %d\n", err);
  936. goto err;
  937. }
  938. #ifdef DEBUG
  939. printf("Exit: DPNI id=0x%d\n", dflt_dpni->dpni_id);
  940. #endif
  941. if (dflt_dpni)
  942. free(dflt_dpni);
  943. return 0;
  944. err:
  945. return err;
  946. }
  947. static int mc_init_object(void)
  948. {
  949. int err = 0;
  950. err = dprc_init();
  951. if (err < 0) {
  952. printf("dprc_init() failed: %d\n", err);
  953. goto err;
  954. }
  955. err = dpbp_init();
  956. if (err < 0) {
  957. printf("dpbp_init() failed: %d\n", err);
  958. goto err;
  959. }
  960. err = dpio_init();
  961. if (err < 0) {
  962. printf("dpio_init() failed: %d\n", err);
  963. goto err;
  964. }
  965. err = dpni_init();
  966. if (err < 0) {
  967. printf("dpni_init() failed: %d\n", err);
  968. goto err;
  969. }
  970. return 0;
  971. err:
  972. return err;
  973. }
  974. int fsl_mc_ldpaa_exit(bd_t *bd)
  975. {
  976. int err = 0;
  977. if (bd && mc_lazy_dpl_addr && !fsl_mc_ldpaa_exit(NULL)) {
  978. mc_apply_dpl(mc_lazy_dpl_addr);
  979. mc_lazy_dpl_addr = 0;
  980. }
  981. /* MC is not loaded intentionally, So return success. */
  982. if (bd && get_mc_boot_status() != 0)
  983. return 0;
  984. if (bd && !get_mc_boot_status() && get_dpl_apply_status() == -1) {
  985. printf("ERROR: fsl-mc: DPL is not applied\n");
  986. err = -ENODEV;
  987. return err;
  988. }
  989. if (bd && !get_mc_boot_status() && !get_dpl_apply_status())
  990. return err;
  991. err = dpbp_exit();
  992. if (err < 0) {
  993. printf("dpbp_exit() failed: %d\n", err);
  994. goto err;
  995. }
  996. err = dpio_exit();
  997. if (err < 0) {
  998. printf("dpio_exit() failed: %d\n", err);
  999. goto err;
  1000. }
  1001. err = dpni_exit();
  1002. if (err < 0) {
  1003. printf("dpni_exit() failed: %d\n", err);
  1004. goto err;
  1005. }
  1006. err = dprc_exit();
  1007. if (err < 0) {
  1008. printf("dprc_exit() failed: %d\n", err);
  1009. goto err;
  1010. }
  1011. return 0;
  1012. err:
  1013. return err;
  1014. }
  1015. static int do_fsl_mc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  1016. {
  1017. int err = 0;
  1018. if (argc < 3)
  1019. goto usage;
  1020. switch (argv[1][0]) {
  1021. case 's': {
  1022. char sub_cmd;
  1023. u64 mc_fw_addr, mc_dpc_addr;
  1024. #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
  1025. u64 aiop_fw_addr;
  1026. #endif
  1027. sub_cmd = argv[2][0];
  1028. switch (sub_cmd) {
  1029. case 'm':
  1030. if (argc < 5)
  1031. goto usage;
  1032. if (get_mc_boot_status() == 0) {
  1033. printf("fsl-mc: MC is already booted");
  1034. printf("\n");
  1035. return err;
  1036. }
  1037. mc_fw_addr = simple_strtoull(argv[3], NULL, 16);
  1038. mc_dpc_addr = simple_strtoull(argv[4], NULL,
  1039. 16);
  1040. if (!mc_init(mc_fw_addr, mc_dpc_addr))
  1041. err = mc_init_object();
  1042. break;
  1043. #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
  1044. case 'a':
  1045. if (argc < 4)
  1046. goto usage;
  1047. if (get_aiop_apply_status() == 0) {
  1048. printf("fsl-mc: AIOP FW is already");
  1049. printf(" applied\n");
  1050. return err;
  1051. }
  1052. aiop_fw_addr = simple_strtoull(argv[3], NULL,
  1053. 16);
  1054. /* if SoC doesn't have AIOP, err = -ENODEV */
  1055. err = load_mc_aiop_img(aiop_fw_addr);
  1056. if (!err)
  1057. printf("fsl-mc: AIOP FW applied\n");
  1058. break;
  1059. #endif
  1060. default:
  1061. printf("Invalid option: %s\n", argv[2]);
  1062. goto usage;
  1063. break;
  1064. }
  1065. }
  1066. break;
  1067. case 'l':
  1068. case 'a': {
  1069. u64 mc_dpl_addr;
  1070. if (argc < 4)
  1071. goto usage;
  1072. if (get_dpl_apply_status() == 0) {
  1073. printf("fsl-mc: DPL already applied\n");
  1074. return err;
  1075. }
  1076. mc_dpl_addr = simple_strtoull(argv[3], NULL,
  1077. 16);
  1078. if (get_mc_boot_status() != 0) {
  1079. printf("fsl-mc: Deploying data path layout ..");
  1080. printf("ERROR (MC is not booted)\n");
  1081. return -ENODEV;
  1082. }
  1083. if (argv[1][0] == 'l') {
  1084. /*
  1085. * We will do the actual dpaa exit and dpl apply
  1086. * later from announce_and_cleanup().
  1087. */
  1088. mc_lazy_dpl_addr = mc_dpl_addr;
  1089. } else {
  1090. /* The user wants it applied now */
  1091. if (!fsl_mc_ldpaa_exit(NULL))
  1092. err = mc_apply_dpl(mc_dpl_addr);
  1093. }
  1094. break;
  1095. }
  1096. default:
  1097. printf("Invalid option: %s\n", argv[1]);
  1098. goto usage;
  1099. break;
  1100. }
  1101. return err;
  1102. usage:
  1103. return CMD_RET_USAGE;
  1104. }
  1105. U_BOOT_CMD(
  1106. fsl_mc, CONFIG_SYS_MAXARGS, 1, do_fsl_mc,
  1107. "DPAA2 command to manage Management Complex (MC)",
  1108. "start mc [FW_addr] [DPC_addr] - Start Management Complex\n"
  1109. "fsl_mc apply DPL [DPL_addr] - Apply DPL file\n"
  1110. "fsl_mc lazyapply DPL [DPL_addr] - Apply DPL file on exit\n"
  1111. "fsl_mc start aiop [FW_addr] - Start AIOP\n"
  1112. );