tegra186-clk.c 2.2 KB

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  1. /*
  2. * Copyright (c) 2016, NVIDIA CORPORATION.
  3. *
  4. * SPDX-License-Identifier: GPL-2.0
  5. */
  6. #include <common.h>
  7. #include <clk-uclass.h>
  8. #include <dm.h>
  9. #include <misc.h>
  10. #include <asm/arch-tegra/bpmp_abi.h>
  11. static ulong tegra186_clk_get_rate(struct clk *clk)
  12. {
  13. struct mrq_clk_request req;
  14. struct mrq_clk_response resp;
  15. int ret;
  16. debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev,
  17. clk->id);
  18. req.cmd_and_id = (CMD_CLK_GET_RATE << 24) | clk->id;
  19. ret = misc_call(clk->dev->parent, MRQ_CLK, &req, sizeof(req), &resp,
  20. sizeof(resp));
  21. if (ret < 0)
  22. return ret;
  23. return resp.clk_get_rate.rate;
  24. }
  25. static ulong tegra186_clk_set_rate(struct clk *clk, ulong rate)
  26. {
  27. struct mrq_clk_request req;
  28. struct mrq_clk_response resp;
  29. int ret;
  30. debug("%s(clk=%p, rate=%lu) (dev=%p, id=%lu)\n", __func__, clk, rate,
  31. clk->dev, clk->id);
  32. req.cmd_and_id = (CMD_CLK_SET_RATE << 24) | clk->id;
  33. req.clk_set_rate.rate = rate;
  34. ret = misc_call(clk->dev->parent, MRQ_CLK, &req, sizeof(req), &resp,
  35. sizeof(resp));
  36. if (ret < 0)
  37. return ret;
  38. return resp.clk_set_rate.rate;
  39. }
  40. static int tegra186_clk_en_dis(struct clk *clk,
  41. enum mrq_reset_commands cmd)
  42. {
  43. struct mrq_clk_request req;
  44. struct mrq_clk_response resp;
  45. int ret;
  46. req.cmd_and_id = (cmd << 24) | clk->id;
  47. ret = misc_call(clk->dev->parent, MRQ_CLK, &req, sizeof(req), &resp,
  48. sizeof(resp));
  49. if (ret < 0)
  50. return ret;
  51. return 0;
  52. }
  53. static int tegra186_clk_enable(struct clk *clk)
  54. {
  55. debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev,
  56. clk->id);
  57. return tegra186_clk_en_dis(clk, CMD_CLK_ENABLE);
  58. }
  59. static int tegra186_clk_disable(struct clk *clk)
  60. {
  61. debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev,
  62. clk->id);
  63. return tegra186_clk_en_dis(clk, CMD_CLK_DISABLE);
  64. }
  65. static struct clk_ops tegra186_clk_ops = {
  66. .get_rate = tegra186_clk_get_rate,
  67. .set_rate = tegra186_clk_set_rate,
  68. .enable = tegra186_clk_enable,
  69. .disable = tegra186_clk_disable,
  70. };
  71. static int tegra186_clk_probe(struct udevice *dev)
  72. {
  73. debug("%s(dev=%p)\n", __func__, dev);
  74. return 0;
  75. }
  76. U_BOOT_DRIVER(tegra186_clk) = {
  77. .name = "tegra186_clk",
  78. .id = UCLASS_CLK,
  79. .probe = tegra186_clk_probe,
  80. .ops = &tegra186_clk_ops,
  81. };