clk-peripheral.c 1.9 KB

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  1. /*
  2. * Copyright (C) 2016 Atmel Corporation
  3. * Wenyou.Yang <wenyou.yang@atmel.com>
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. #include <common.h>
  8. #include <clk-uclass.h>
  9. #include <dm/device.h>
  10. #include <linux/io.h>
  11. #include <mach/at91_pmc.h>
  12. #include "pmc.h"
  13. #define PERIPHERAL_ID_MIN 2
  14. #define PERIPHERAL_ID_MAX 31
  15. #define PERIPHERAL_MASK(id) (1 << ((id) & PERIPHERAL_ID_MAX))
  16. /**
  17. * sam9x5_periph_clk_bind() - for the periph clock driver
  18. * Recursively bind its children as clk devices.
  19. *
  20. * @return: 0 on success, or negative error code on failure
  21. */
  22. static int sam9x5_periph_clk_bind(struct udevice *dev)
  23. {
  24. return at91_clk_sub_device_bind(dev, "periph-clk");
  25. }
  26. static const struct udevice_id sam9x5_periph_clk_match[] = {
  27. { .compatible = "atmel,at91sam9x5-clk-peripheral" },
  28. {}
  29. };
  30. U_BOOT_DRIVER(sam9x5_periph_clk) = {
  31. .name = "sam9x5-periph-clk",
  32. .id = UCLASS_MISC,
  33. .of_match = sam9x5_periph_clk_match,
  34. .bind = sam9x5_periph_clk_bind,
  35. };
  36. /*---------------------------------------------------------*/
  37. static int periph_clk_enable(struct clk *clk)
  38. {
  39. struct pmc_platdata *plat = dev_get_platdata(clk->dev);
  40. struct at91_pmc *pmc = plat->reg_base;
  41. if (clk->id < PERIPHERAL_ID_MIN)
  42. return -1;
  43. writel(clk->id & AT91_PMC_PCR_PID_MASK, &pmc->pcr);
  44. setbits_le32(&pmc->pcr, AT91_PMC_PCR_CMD_WRITE | AT91_PMC_PCR_EN);
  45. return 0;
  46. }
  47. static ulong periph_get_rate(struct clk *clk)
  48. {
  49. struct udevice *dev;
  50. struct clk clk_dev;
  51. ulong clk_rate;
  52. int ret;
  53. dev = dev_get_parent(clk->dev);
  54. ret = clk_get_by_index(dev, 0, &clk_dev);
  55. if (ret)
  56. return ret;
  57. clk_rate = clk_get_rate(&clk_dev);
  58. clk_free(&clk_dev);
  59. return clk_rate;
  60. }
  61. static struct clk_ops periph_clk_ops = {
  62. .of_xlate = at91_clk_of_xlate,
  63. .enable = periph_clk_enable,
  64. .get_rate = periph_get_rate,
  65. };
  66. U_BOOT_DRIVER(clk_periph) = {
  67. .name = "periph-clk",
  68. .id = UCLASS_CLK,
  69. .platdata_auto_alloc_size = sizeof(struct pmc_platdata),
  70. .probe = at91_clk_probe,
  71. .ops = &periph_clk_ops,
  72. };