sil680.c 2.7 KB

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  1. /*
  2. * (C) Copyright 2007
  3. * Gary Jennejohn, DENX Software Engineering, garyj@denx.de.
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. /* sil680.c - ide support functions for the Sil0680A controller */
  8. /*
  9. * The following parameters must be defined in the configuration file
  10. * of the target board:
  11. *
  12. * #define CONFIG_IDE_SIL680
  13. *
  14. * #define CONFIG_PCI_PNP
  15. * NOTE it may also be necessary to define this if the default of 8 is
  16. * incorrect for the target board (e.g. the sequoia board requires 0).
  17. * #define CONFIG_SYS_PCI_CACHE_LINE_SIZE 0
  18. *
  19. * #define CONFIG_CMD_IDE
  20. * #undef CONFIG_IDE_8xx_DIRECT
  21. * #undef CONFIG_IDE_LED
  22. * #undef CONFIG_IDE_RESET
  23. * #define CONFIG_IDE_PREINIT
  24. * #define CONFIG_SYS_IDE_MAXBUS 2 - modify to suit
  25. * #define CONFIG_SYS_IDE_MAXDEVICE (CONFIG_SYS_IDE_MAXBUS*2) - modify to suit
  26. * #define CONFIG_SYS_ATA_BASE_ADDR 0
  27. * #define CONFIG_SYS_ATA_IDE0_OFFSET 0
  28. * #define CONFIG_SYS_ATA_IDE1_OFFSET 0
  29. * #define CONFIG_SYS_ATA_DATA_OFFSET 0
  30. * #define CONFIG_SYS_ATA_REG_OFFSET 0
  31. * #define CONFIG_SYS_ATA_ALT_OFFSET 0x0004
  32. *
  33. * The mapping for PCI IO-space.
  34. * NOTE this is the value for the sequoia board. Modify to suit.
  35. * #define CONFIG_SYS_PCI0_IO_SPACE 0xE8000000
  36. */
  37. #include <common.h>
  38. #include <ata.h>
  39. #include <ide.h>
  40. #include <pci.h>
  41. extern ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS];
  42. int ide_preinit (void)
  43. {
  44. int status;
  45. pci_dev_t devbusfn;
  46. int l;
  47. status = 1;
  48. for (l = 0; l < CONFIG_SYS_IDE_MAXBUS; l++) {
  49. ide_bus_offset[l] = -ATA_STATUS;
  50. }
  51. devbusfn = pci_find_device (0x1095, 0x0680, 0);
  52. if (devbusfn != -1) {
  53. status = 0;
  54. pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0,
  55. (u32 *) &ide_bus_offset[0]);
  56. ide_bus_offset[0] &= 0xfffffff8;
  57. ide_bus_offset[0] += CONFIG_SYS_PCI0_IO_SPACE;
  58. pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_2,
  59. (u32 *) &ide_bus_offset[1]);
  60. ide_bus_offset[1] &= 0xfffffff8;
  61. ide_bus_offset[1] += CONFIG_SYS_PCI0_IO_SPACE;
  62. /* init various things - taken from the Linux driver */
  63. /* set PIO mode */
  64. pci_write_config_byte(devbusfn, 0x80, 0x00);
  65. pci_write_config_byte(devbusfn, 0x84, 0x00);
  66. /* IDE0 */
  67. pci_write_config_byte(devbusfn, 0xA1, 0x02);
  68. pci_write_config_word(devbusfn, 0xA2, 0x328A);
  69. pci_write_config_dword(devbusfn, 0xA4, 0x62DD62DD);
  70. pci_write_config_dword(devbusfn, 0xA8, 0x43924392);
  71. pci_write_config_dword(devbusfn, 0xAC, 0x40094009);
  72. /* IDE1 */
  73. pci_write_config_byte(devbusfn, 0xB1, 0x02);
  74. pci_write_config_word(devbusfn, 0xB2, 0x328A);
  75. pci_write_config_dword(devbusfn, 0xB4, 0x62DD62DD);
  76. pci_write_config_dword(devbusfn, 0xB8, 0x43924392);
  77. pci_write_config_dword(devbusfn, 0xBC, 0x40094009);
  78. }
  79. return (status);
  80. }
  81. void ide_set_reset (int flag) {
  82. return;
  83. }