commproc.c 4.4 KB

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  1. /*
  2. * This file is based on "arch/powerpc/8260_io/commproc.c" - here is it's
  3. * copyright notice:
  4. *
  5. * General Purpose functions for the global management of the
  6. * 8260 Communication Processor Module.
  7. * Copyright (c) 1999 Dan Malek (dmalek@jlc.net)
  8. * Copyright (c) 2000 MontaVista Software, Inc (source@mvista.com)
  9. * 2.3.99 Updates
  10. *
  11. * In addition to the individual control of the communication
  12. * channels, there are a few functions that globally affect the
  13. * communication processor.
  14. *
  15. * Buffer descriptors must be allocated from the dual ported memory
  16. * space. The allocator for that is here. When the communication
  17. * process is reset, we reclaim the memory available. There is
  18. * currently no deallocator for this memory.
  19. */
  20. #include <common.h>
  21. #include <asm/cpm_8260.h>
  22. DECLARE_GLOBAL_DATA_PTR;
  23. void
  24. m8260_cpm_reset(void)
  25. {
  26. volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  27. volatile ulong count;
  28. /* Reclaim the DP memory for our use.
  29. */
  30. gd->arch.dp_alloc_base = CPM_DATAONLY_BASE;
  31. gd->arch.dp_alloc_top = gd->arch.dp_alloc_base + CPM_DATAONLY_SIZE;
  32. /*
  33. * Reset CPM
  34. */
  35. immr->im_cpm.cp_cpcr = CPM_CR_RST;
  36. count = 0;
  37. do { /* Spin until command processed */
  38. __asm__ __volatile__ ("eieio");
  39. } while ((immr->im_cpm.cp_cpcr & CPM_CR_FLG) && ++count < 1000000);
  40. #ifdef CONFIG_HARD_I2C
  41. immr->im_dprambase16[PROFF_I2C_BASE / sizeof(u16)] = 0;
  42. #endif
  43. }
  44. /* Allocate some memory from the dual ported ram.
  45. * To help protocols with object alignment restrictions, we do that
  46. * if they ask.
  47. */
  48. uint
  49. m8260_cpm_dpalloc(uint size, uint align)
  50. {
  51. volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  52. uint retloc;
  53. uint align_mask, off;
  54. uint savebase;
  55. align_mask = align - 1;
  56. savebase = gd->arch.dp_alloc_base;
  57. off = gd->arch.dp_alloc_base & align_mask;
  58. if (off != 0)
  59. gd->arch.dp_alloc_base += (align - off);
  60. if ((off = size & align_mask) != 0)
  61. size += align - off;
  62. if ((gd->arch.dp_alloc_base + size) >= gd->arch.dp_alloc_top) {
  63. gd->arch.dp_alloc_base = savebase;
  64. panic("m8260_cpm_dpalloc: ran out of dual port ram!");
  65. }
  66. retloc = gd->arch.dp_alloc_base;
  67. gd->arch.dp_alloc_base += size;
  68. memset((void *)&immr->im_dprambase[retloc], 0, size);
  69. return(retloc);
  70. }
  71. /* We also own one page of host buffer space for the allocation of
  72. * UART "fifos" and the like.
  73. */
  74. uint
  75. m8260_cpm_hostalloc(uint size, uint align)
  76. {
  77. /* the host might not even have RAM yet - just use dual port RAM */
  78. return (m8260_cpm_dpalloc(size, align));
  79. }
  80. /* Set a baud rate generator. This needs lots of work. There are
  81. * eight BRGs, which can be connected to the CPM channels or output
  82. * as clocks. The BRGs are in two different block of internal
  83. * memory mapped space.
  84. * The baud rate clock is the system clock divided by something.
  85. * It was set up long ago during the initial boot phase and is
  86. * is given to us.
  87. * Baud rate clocks are zero-based in the driver code (as that maps
  88. * to port numbers). Documentation uses 1-based numbering.
  89. */
  90. #define BRG_INT_CLK gd->arch.brg_clk
  91. #define BRG_UART_CLK (BRG_INT_CLK / 16)
  92. /* This function is used by UARTs, or anything else that uses a 16x
  93. * oversampled clock.
  94. */
  95. void
  96. m8260_cpm_setbrg(uint brg, uint rate)
  97. {
  98. volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  99. volatile uint *bp;
  100. uint cd = BRG_UART_CLK / rate;
  101. if ((BRG_UART_CLK % rate) < (rate / 2))
  102. cd--;
  103. if (brg < 4) {
  104. bp = (uint *)&immr->im_brgc1;
  105. }
  106. else {
  107. bp = (uint *)&immr->im_brgc5;
  108. brg -= 4;
  109. }
  110. bp += brg;
  111. *bp = (cd << 1) | CPM_BRG_EN;
  112. }
  113. /* This function is used to set high speed synchronous baud rate
  114. * clocks.
  115. */
  116. void
  117. m8260_cpm_fastbrg(uint brg, uint rate, int div16)
  118. {
  119. volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  120. volatile uint *bp;
  121. /* This is good enough to get SMCs running.....
  122. */
  123. if (brg < 4) {
  124. bp = (uint *)&immr->im_brgc1;
  125. }
  126. else {
  127. bp = (uint *)&immr->im_brgc5;
  128. brg -= 4;
  129. }
  130. bp += brg;
  131. *bp = (((((BRG_INT_CLK+rate-1)/rate)-1)&0xfff)<<1)|CPM_BRG_EN;
  132. if (div16)
  133. *bp |= CPM_BRG_DIV16;
  134. }
  135. /* This function is used to set baud rate generators using an external
  136. * clock source and 16x oversampling.
  137. */
  138. void
  139. m8260_cpm_extcbrg(uint brg, uint rate, uint extclk, int pinsel)
  140. {
  141. volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  142. volatile uint *bp;
  143. if (brg < 4) {
  144. bp = (uint *)&immr->im_brgc1;
  145. }
  146. else {
  147. bp = (uint *)&immr->im_brgc5;
  148. brg -= 4;
  149. }
  150. bp += brg;
  151. *bp = ((((((extclk/16)+rate-1)/rate)-1)&0xfff)<<1)|CPM_BRG_EN;
  152. if (pinsel == 0)
  153. *bp |= CPM_BRG_EXTC_CLK3_9;
  154. else
  155. *bp |= CPM_BRG_EXTC_CLK5_15;
  156. }